Add barriers to handle Secure Timer interrupts correctly
This patch adds instruction synchronization barriers around the code which
handles the timer interrupt in the TSP. This ensures that the interrupt is not
acknowledged after or EOIed before it is deactivated at the peripheral.

Change-Id: Ic691ab909bc671d8f0f43ffc443f46237c75536d
1 parent e9e0b05 commit cc8856432ebb790f045d34fa9296b24eea38c71c
@Achin Gupta Achin Gupta authored on 17 Jun 2014
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