Add barriers to handle Secure Timer interrupts correctly
This patch adds instruction synchronization barriers around the code which handles the timer interrupt in the TSP. This ensures that the interrupt is not acknowledged after or EOIed before it is deactivated at the peripheral. Change-Id: Ic691ab909bc671d8f0f43ffc443f46237c75536d |
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bl32/tsp/tsp_timer.c |
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