fdts: a5ds: Fix for the system timer issue.
A5DS FPGA system timer clock frequency is 7.5Mhz.
The dt is file updated inline with the hardware
clock frequency.

Change-Id: I3f6c2e0d4a7b293175a42cf398a8730448504af9
Signed-off-by: lakshmi Kailasanathan <lakshmi.Kailasanathan@arm.com>
1 parent 6428938 commit e3c152d1156af8a4b6453376454ecdceaf81704c
@lakshmi Kailasanathan lakshmi Kailasanathan authored on 17 Apr 2020
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fdts/a5ds.dts