fdts: a5ds: Fix for the system timer issue.
A5DS FPGA system timer clock frequency is 7.5Mhz. The dt is file updated inline with the hardware clock frequency. Change-Id: I3f6c2e0d4a7b293175a42cf398a8730448504af9 Signed-off-by: lakshmi Kailasanathan <lakshmi.Kailasanathan@arm.com> |
---|
|
fdts/a5ds.dts |
---|