Merge "xlat_table_v2: Fix enable WARMBOOT_ENABLE_DCACHE_EARLY config" into integration

Merge "Replace deprecated __ASSEMBLY__ macro with __ASSEMBLER__" into integration

xlat_table_v2: Fix enable WARMBOOT_ENABLE_DCACHE_EARLY config ...

The WARMBOOT_ENABLE_DCACHE_EARLY allows caches to be turned on early during
the boot. But the xlat_change_mem_attributes_ctx() API did not do the required
cache maintenance after the mmap tables are modified if
WARMBOOT_ENABLE_DCACHE_EARLY is enabled. This meant that when the caches are turned
off during power down, the tables in memory are accessed as part of cache
maintenance for power down, and the tables are not correct at this point which
results in a data abort.
This patch removes the optimization within xlat_change_mem_attributes_ctx()
when WARMBOOT_ENABLE_DCACHE_EARLY is enabled.

Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
Change-Id: I82de3decba87dd13e9856b5f3620a1c8571c8d87

Merge "Fix documentation" into integration

Merge "doc: Remove version and release variables from conf.py" into integration

doc: Remove version and release variables from conf.py ...

We would need to update this version for the release but, in fact,
it is not required for our publishing workflow; the hosted version
of the docs uses git commit/tag information in place of these
variables anyway.

Instead of updating the version, just remove these variables
entirely.

Change-Id: I424c4e45786e87604e91c7197b7983579afe4806
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Fix documentation ...

User guide:
1. Remove obsolete note saying only FVP is supported with AArch32
2. Switch compiler for Juno AArch32 to arm-eabi
3. Mention SOFTWARE folder in Juno Linaro release

Index.rst:
1. Switch default FVP model to Version 11.6 Build 45

Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
Change-Id: Ib47a2ea314e2b8394a20189bf91796de0e17de53

Merge "Correct UART PL011 initialization calculation" into integration

Merge "doc: Update Linaro release mentioned on index page" into integration

doc: Update Linaro release mentioned on index page ...

The version of the Linaro release that is used for testing was
updated in 35010bb8 and the user guide was updated with the
correct version, however the version is also mentioned on the
index page and that was missed. Update the index page with the
new version.

We can come back and de-duplicate this content later, to ease
future maintenance.

Change-Id: I3fe83d7a1c59ab8d3ce2b18bcc23e16c93f7af97
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Merge "doc: Misc syntax and spelling fixes" into integration

doc: Misc syntax and spelling fixes ...

Tidying up a few Sphinx warnings that had built-up over time.
None of these are critical but it cleans up the Sphinx output.

At the same time, fixing some spelling errors that were detected.

Change-Id: I38209e235481eed287f8008c6de9dedd6b12ab2e
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Replace deprecated __ASSEMBLY__ macro with __ASSEMBLER__ ...

Change-Id: I497072575231730a216220f84a6d349a48eaf5e3
Signed-off-by: Balint Dobszay <balint.dobszay@arm.com>

Merge "doc: Formatting fixes for readme.rst" into integration

doc: Formatting fixes for readme.rst ...

The readme.rst file in the project root is the front-page that
is displayed on Github and if viewing the TF-A repository on
git.trustedfirmware.org in the "about" view. It now contains a
small amount of stub content, and directs readers to the
ReadTheDocs documentation via trustedfirmware.org/docs/tf-a.

The Github renderer is displaying the content fine but the cgit
viewer displays some "backlink" errors because some content
substitutions were left in place (terms surrounded by pipe
symbols), e.g. |TF-A|.

This patch removes those substitutions, that are not supported
by cgit, and also updates one heading to clarify where to find
the new docs.

Change-Id: I358451df45b8c99975ba0b6db8ea61253a10560d
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Merge changes from topic "pb/readthedocs" into integration ...

* changes:
  doc: Add guide for building the docs locally
  doc: De-duplicate readme and license files
  doc: Convert internal links to RST format

doc: Add guide for building the docs locally ...

This new page contains instructions for doing a local
build of the documentation, plus information on the environment
setup that needs to be done beforehand.

Change-Id: If563145ab40639cabbe25d0f62759981a33692c6
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: De-duplicate readme and license files ...

The readme.rst and license.rst files in the project root overlap
with the index.rst and license.rst files in the docs/ folder. We
need to use the latter when building the documentation, as Sphinx
requires all included files to be under a common root. However,
the files in the root are currently used by the cgit and Github
viewers.

Using symlinks in Git presents some difficulties so the best
course of action is likely to leave these files but in stub form.

The license.rst file in the root will simply tell the reader to
refer to docs/license.rst.

The readme.rst file will contain a small amount of content that
is derived from the docs/index.rst file, so that the Github main
page will have something valid to show, but it will also contain
a link to the full documentation on ReadTheDocs.

Change-Id: I6dc46f08777e8d7ecb32ca7afc07a28486c9f77a
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Convert internal links to RST format ...

Currently links between documents are using the format:

<path/to/><filename>.rst

This was required for services like GitHub because they render each
document in isolation - linking to another document is like linking
to any other file, just provide the full path.

However, with the new approach, the .rst files are only the raw
source for the documents. Once the documents have been rendered
the output is now in another format (HTML in our case) and so,
when linking to another document, the link must point to the
rendered version and not the .rst file.

The RST spec provides a few methods for linking between content.
The parent of this patch enabled the automatic creation of anchors
for document titles - we will use these anchors as the targets for
our links. Additional anchors can be added by hand if needed, on
section and sub-section titles, for example.

An example of this new format, for a document with the title
"Firmware Design" is :ref:`Firmware Design`.

One big advantage of this is that anchors are not dependent on
paths. We can then move documents around, even between directories,
without breaking any links between documents. Links will need to be
updated only if the title of a document changes.

Change-Id: I9e2340a61dd424cbd8fd1ecc2dc166f460d81703
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Merge "doc: Add more missing platforms" into integration

Merge "delay: correct timeout_init_us()" into integration

Correct UART PL011 initialization calculation ...

Currently for Armv7 plaforms the quotient calculated in pl011
uart init code is moved to register r1.

This patch moves the quotient to register r2 as done for other
platforms in the udiv instruction. Value of register r2 is then
used to calculate the values for IBRD and FBRD register

Change-Id: Ie6622f9f0e6d634378b471df5d02823b492c8a24
Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>

delay: correct timeout_init_us() ...

The function has to use read_cntpct_el0() to update the counter, and not
read_cntfrq_el0().

Change-Id: I9c676466e784c3122e9ffc2d87e66708797086e7
Signed-off-by: Yann Gautier <yann.gautier@st.com>

doc: Add more missing platforms ...

Add meson-g12a, qemu-sbsa and rpi4 to the documentation index so
that they will have their docs rendered and integrated into the
table of contents.

Change-Id: Id972bf2fee67312dd7bff29f92bea67842e62431
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Merge "Explicitly disable the SPME bit in MDCR_EL3" into integration

Merge "Neoverse N1 Errata Workaround 1542419" into integration

Merge "Fix the CAS spinlock implementation" into integration

Explicitly disable the SPME bit in MDCR_EL3 ...

Currently the MDCR_EL3 initialisation implicitly disables
MDCR_EL3.SPME by using mov_imm.

This patch makes the SPME bit more visible by explicitly
disabling it and documenting its use in different versions
of the architecture.

Signed-off-by: Petre-Ionut Tudor <petre-ionut.tudor@arm.com>
Change-Id: I221fdf314f01622f46ac5aa43388f59fa17a29b3

Neoverse N1 Errata Workaround 1542419 ...

Coherent I-cache is causing a prefetch violation where when the core
executes an instruction that has recently been modified, the core might
fetch a stale instruction which violates the ordering of instruction
fetches.

The workaround includes an instruction sequence to implementation
defined registers to trap all EL0 IC IVAU instructions to EL3 and a trap
handler to execute a TLB inner-shareable invalidation to an arbitrary
address followed by a DSB.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: Ic3b7cbb11cf2eaf9005523ef5578a372593ae4d6

Merge "delay: timeout detection support" into integration