fdts: stm32mp157ca-dk1: Support using PLL4 as Ethernet clock ...

This enables the internal Ethernet clock and sets PLL4 to 750Mhz so
operating systems can clock PLL4_P to 125MHz and use it for Ethernet.

stm32mp1: add low power management ...

Change-Id: I8e0ba794e5ded1290fb83fe8d43ce54d4dc0e320
Signed-off-by: Yann Gautier <yann.gautier@st.com>

ddr: stm32mp1: add DDR self-refresh management ...

In order to prepare low power use cases, functions are added to manage
the entry or exit of DDR from self-refresh mode.

Change-Id: I8a1cbc48d613366fca69b4fc6870e53f8b917598
Signed-off-by: Yann Gautier <yann.gautier@st.com>

stm32mp: add function to protect access on PWR registers ...

In SMP context, we need to add spinlocks to protect against concurrent
accesses on PWR registers.

Change-Id: I27cb698ffa085eca7b61b042ce5ccaa1fd2daaf4
Signed-off-by: Yann Gautier <yann.gautier@st.com>

stm32mp1: add RTC driver ...

This driver is responsible to manage STM32MP1 Real Time Clock IP.

Change-Id: I8bb84cf2a2786be718944d69153f676d57bfbc37
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

aarch32: add virtual timer control support ...

Define virtual timer resources for a platform to be able to control
virtual timers, even if TF-A does not enable them.
This is required for example when the secure world wants to reset
the system. Virtual timers enabled from non-secure world can
jeopardize the reset sequence due to pending interrupts.

Change-Id: Ieb0ce4819809ae9c4ab11f9244a6cacf9437d6b4
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Yann Gautier <yann.gautier@st.com>

arch: rename CNTBaseN register offsets defines ...

The CNTFRQ already has a CNTBASEN_ prefix.
To be able to use CNTP_CTL from CP15, the CNTP_CTL define is renamed
CNTBASEN_CNTP_CTL.
To keep consistency, CNTPCT_LO and CNTP_CVAL_LO are also prefixed.

Change-Id: Ie328daa694a708130ee369218b57c0f4b08f7f44
Signed-off-by: Yann Gautier <yann.gautier@st.com>

fdts: stm32mp157ca-dk1: Use STPMIC on I2C2 and eMMC on SDMMC2 ...

Quick hack to get things working on the Seeed Odyssey board.

Merge "Update TF-A version to 2.2" into integration

Merge "Update change log for v2.2 Release" into integration

Merge "Update release-information for v2.2 Release" into integration

Merge "doc: Final, pre-release fixes and updates" into integration

doc: Final, pre-release fixes and updates ...

A small set of misc changes to ensure correctness before the v2.2
release tagging.

Change-Id: I888840b9483ea1a1633d204fbbc0f9594072101e
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Update release-information for v2.2 Release ...

Removed deprecated interfaces that have been removed from the TF-A
project, updated the deprecated list with new deprecations for v2.2
Release, added upcoming release information, remove mentions of PR from
github.

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Signed-off-by: Paul Beesley <paul.beesley@arm.com>
Change-Id: I2b59d351cde9860ad0dcb6520a8bd2827ad403cf

Merge "doc: Expand contact information in About section" into integration

doc: Expand contact information in About section ...

Giving a bit more background information about the issue tracker
and mailing lists.

Change-Id: I68921d54e3113d348f1e16c685f74d32df2ca19f
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Merge "doc: Move platform list to the Platform Ports index page" into integration

Merge "doc: Move "About" content from index.rst to a new chapter" into integration

Update change log for v2.2 Release ...

Signed-off-by: Lauren Wehrmeister <lauren.wehrmeister@arm.com>
Change-Id: I53a7706016539e7de7fdbe87b786d99665bbe1d8

doc: Move platform list to the Platform Ports index page ...

The list of upstream platforms on the index page is growing
quite long, especially with all the FVP variants being listed
individually.

This patch leverages the "Platform Ports" chapter in the docs
table of contents to condense this information. Almost all
platform ports now have documentation, so the table of
contents serves as the list of upstream platforms by itself.

For those upstream platforms that do not have corresponding
documentation, the top-level "Platform Ports" page mentions
them individually. It also mentions each Arm FVP, just as
the index page did before.

Note that there is an in-progress patch that creates new
platform port documentation for the Arm Juno and Arm FVP
platforms, so this list of "other platforms" will soon be
reduced further as those platforms become part of the
table of contents as well.

Change-Id: I6b1eab8cba71a599d85a6e22553a34b07f213268
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

doc: Move "About" content from index.rst to a new chapter ...

The index.rst page is now the primary landing page for the TF-A
documentation. It contains quite a lot of content these days,
including:

- The project purpose and general intro
- A list of functionality
- A list of planned functionality
- A list of supported platforms
- "Getting started" links to other documents
- Contact information for raising issues

This patch creates an "About" chapter in the table
of contents and moves some content there. In order,
the above listed content:

- Stayed where it is. This is the right place for it.
- Moved to About->Features
- Moved to About->Features (in subsection)
- Stayed where it is. Moved in a later patch.
- Was expanded in-place
- Moved to About->Contact

Change-Id: I254bb87560fd09140b9e485cf15246892aa45943
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Merge "xlat_table_v2: Fix enable WARMBOOT_ENABLE_DCACHE_EARLY config" into integration

Merge "Replace deprecated __ASSEMBLY__ macro with __ASSEMBLER__" into integration

xlat_table_v2: Fix enable WARMBOOT_ENABLE_DCACHE_EARLY config ...

The WARMBOOT_ENABLE_DCACHE_EARLY allows caches to be turned on early during
the boot. But the xlat_change_mem_attributes_ctx() API did not do the required
cache maintenance after the mmap tables are modified if
WARMBOOT_ENABLE_DCACHE_EARLY is enabled. This meant that when the caches are turned
off during power down, the tables in memory are accessed as part of cache
maintenance for power down, and the tables are not correct at this point which
results in a data abort.
This patch removes the optimization within xlat_change_mem_attributes_ctx()
when WARMBOOT_ENABLE_DCACHE_EARLY is enabled.

Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
Change-Id: I82de3decba87dd13e9856b5f3620a1c8571c8d87

Merge "Fix documentation" into integration

Merge "doc: Remove version and release variables from conf.py" into integration

doc: Remove version and release variables from conf.py ...

We would need to update this version for the release but, in fact,
it is not required for our publishing workflow; the hosted version
of the docs uses git commit/tag information in place of these
variables anyway.

Instead of updating the version, just remove these variables
entirely.

Change-Id: I424c4e45786e87604e91c7197b7983579afe4806
Signed-off-by: Paul Beesley <paul.beesley@arm.com>

Fix documentation ...

User guide:
1. Remove obsolete note saying only FVP is supported with AArch32
2. Switch compiler for Juno AArch32 to arm-eabi
3. Mention SOFTWARE folder in Juno Linaro release

Index.rst:
1. Switch default FVP model to Version 11.6 Build 45

Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com>
Change-Id: Ib47a2ea314e2b8394a20189bf91796de0e17de53

Update TF-A version to 2.2 ...

Signed-off-by: Deepika Bhavnani <deepika.bhavnani@arm.com>
Change-Id: Ia03701e2e37e3a00a501b144960a4a65aedbfde9

Merge "Correct UART PL011 initialization calculation" into integration