LuminaSensum/arm-trusted-firmware

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LuminaSensum / arm-trusted-firmware

2019-10-04	c97cba4 Browse files » Fix the CAS spinlock implementation ... Make the spinlock implementation use ARMv8.1-LSE CAS instruction based on a platform build option. The CAS-based implementation used to be unconditionally selected for all ARM8.1+ platforms. The previous CAS spinlock implementation had a bug wherein the spin_unlock() implementation had an `sev` after `stlr` which is not sufficient. A dsb is needed to ensure that the stlr completes prior to the sev. Having a dsb is heavyweight and a better solution would be to use load exclusive semantics to monitor the lock and wake up from wfe when a store happens to the lock. The patch implements the same. Change-Id: I5283ce4a889376e4cc01d1b9d09afa8229a2e522 Signed-off-by: Soby Mathew <soby.mathew@arm.com> Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Soby Mathew authored on 25 Sep 2019 Olivier Deprez committed on 4 Oct 2019
2019-10-03	0711ee5 Browse files » delay: timeout detection support ... Introduce timeout_init_us/timeout_elapsed() delay tracking with CNTPCT. timeout_init_us(some_timeout_us); returns a reference to detect timeout for the provided microsecond delay value from current time. timeout_elapsed(reference) return true/false whether the reference timeout is elapsed. Cherry picked from OP-TEE implementation [1]. [1] commit 33d30a74502b ("core: timeout detection support") Minor: - Remove stm32mp platform duplicated implementation. - Add new include in marvell ble.mk Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Iaef6d43c11a2e6992fb48efdc674a0552755ad9c Lionel Debieve committed on 3 Oct 2019
	cf9319f Browse files » Merge "TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U" into integration Soby Mathew authored on 3 Oct 2019 TrustedFirmware Code Review committed on 3 Oct 2019
	530ceda Browse files » TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U ... This patch adds support for ARMv8.3-PAuth in BL1 SMC calls and BL2U image for firmware updates by programming APIAKey_EL1 registers and enabling Pointer Authentication in EL3 and EL1 respectively. Change-Id: I875d952aba8242caf74fb5f4f2d2af6f0c768c08 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com> Alexei Fedorov committed on 3 Oct 2019
	8326aad Browse files » Merge "Introducing support for Cortex-A65AE" into integration Soby Mathew authored on 3 Oct 2019 TrustedFirmware Code Review committed on 3 Oct 2019
	78f02ae Browse files » Introducing support for Cortex-A65AE ... Change-Id: I1ea2bf088f1e001cdbd377cbfb7c6a2866af0422 Signed-off-by: Imre Kis <imre.kis@arm.com> Imre Kis committed on 3 Oct 2019
	2d35bc1 Browse files » Merge changes from topic "stm32mp_corrections_w40" into integration ... * changes: gpio: stm32_gpio: do not mix error code types fdts: stm32mp1: move FDCAN to PLL4_R mmc: increase delay between ACMD41 retries crypto: stm32_hash: align stm32_hash_update() prototype Soby Mathew authored on 3 Oct 2019 TrustedFirmware Code Review committed on 3 Oct 2019
	34c4f86 Browse files » Merge "Add missing support for BL2_AT_EL3 in XIP memory" into integration Soby Mathew authored on 3 Oct 2019 TrustedFirmware Code Review committed on 3 Oct 2019
	efcf951 Browse files » Merge changes from topic "qemu_sbsa" into integration ... * changes: qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1 qemu/qemu_sbsa: Adding Qemu SBSA platform Soby Mathew authored on 3 Oct 2019 TrustedFirmware Code Review committed on 3 Oct 2019
	82d8d4a Browse files » Merge changes I0355e084,I6a6dd1c0 into integration ... * changes: mediatek: mt8183: add EMI MPU driver for DRAM protection mediatek: mt8183: add DEVAPC driver to control protection Soby Mathew authored on 3 Oct 2019 TrustedFirmware Code Review committed on 3 Oct 2019
	251b264 Browse files » Merge "a5ds: Add handler for when user tries to switch off secondary cores" into integration Soby Mathew authored on 3 Oct 2019 TrustedFirmware Code Review committed on 3 Oct 2019
	243b61d Browse files » gpio: stm32_gpio: do not mix error code types ... Change-Id: I84f8a99be2dcdf7c51fbecdb324df8e2f32cc855 Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Nicolas Le Bayon authored on 11 Sep 2019 Yann Gautier committed on 3 Oct 2019
	2dc9fe7 Browse files » fdts: stm32mp1: move FDCAN to PLL4_R ... LTDC modifies the clock frequency to adapt it to the display. Such frequency change is not detected by the FDCAN driver that instead caches the value at probe and pretends to use it later. This change fixes the issue by moving the FDCAN to PLL4_R, leaving the LTDC alone on PLL4_Q. Signed-off-by: Antonio Borneo <antonio.borneo@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Change-Id: I8230868b2b5fd6deb6e3f9dc3911030d8d484c58 Antonio Borneo authored on 29 Jul 2019 Yann Gautier committed on 3 Oct 2019
	57f4b6f Browse files » mmc: increase delay between ACMD41 retries ... In the SD Specification, Power Up Diagram of Card figure, the Timeout value for initialization process (ACMD41 command retries) is 1 second. Align to match MMC cards (in mmc_send_op_cond()) and Linux kernel code, and set the delay between ACMD41 command retries to 10ms. Change-Id: I2e07cb9944e7d7b72f2d4b13e0505e6751458091 Signed-off-by: Yann Gautier <yann.gautier@st.com> Yann Gautier committed on 3 Oct 2019
	19e2af7 Browse files » crypto: stm32_hash: align stm32_hash_update() prototype ... Use size_t for length parameter in header file, as in .c file. Change-Id: I310f2a6159cde1c069b4f814f6558c2488c203ec Signed-off-by: Yann Gautier <yann.gautier@st.com> Yann Gautier committed on 3 Oct 2019
	59ffec1 Browse files » a5ds: Add handler for when user tries to switch off secondary cores ... a5ds only has always-on power domain and there is no power control present. However, without the pwr_domain_off handler, the kernel panics when the user will try to switch off secondary cores. The a5ds_pwr_domain_off handler will prevent kernel from crashing, i.e. the kernel will attempt but fail to shut down the secondary CPUs if the user tries to switch them offline. Change-Id: I3c2239a1b6f035113ddbdda063c8495000cbe30c Signed-off-by: Usama Arif <usama.arif@arm.com> Usama Arif committed on 3 Oct 2019
2019-10-02	f25ea7e Browse files » mediatek: mt8183: add EMI MPU driver for DRAM protection ... Add EMI MPU driver for DRAM protection. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I0355e084184b5396ad8ac99fff6ef9d050fb5e96 kenny liang committed on 2 Oct 2019
	1b0174e Browse files » mediatek: mt8183: add DEVAPC driver to control protection ... Add DEVAPC driver to control protection. Signed-off-by: kenny liang <kenny.liang@mediatek.com> Change-Id: I6a6dd1c0bffa372b6df2cb604ca5e02eabbb9d26 kenny liang committed on 2 Oct 2019
	b81167d Browse files » Merge "Introducing support for Cortex-A65" into integration Soby Mathew authored on 2 Oct 2019 TrustedFirmware Code Review committed on 2 Oct 2019
	6ad216d Browse files » Introducing support for Cortex-A65 ... Change-Id: I645442d52a295706948e2cac88c36c1a3cb0bc47 Signed-off-by: Imre Kis <imre.kis@arm.com> Imre Kis committed on 2 Oct 2019
	0a12302 Browse files » Add missing support for BL2_AT_EL3 in XIP memory ... Add the missing flag for aarch32 XIP memory mode. It was previously added in aarch64 only. Minor: Correct the aarch64 missing flag. Signed-off-by: Lionel Debieve <lionel.debieve@st.com> Change-Id: Iac0a7581a1fd580aececa75f97deb894858f776f Lionel Debieve committed on 2 Oct 2019
	5f38b53 Browse files » Merge "doc: Fix GCC version to 8.3-2019.03" into integration Sandrine Bailleux authored on 2 Oct 2019 TrustedFirmware Code Review committed on 2 Oct 2019
	b48691e Browse files » doc: Fix GCC version to 8.3-2019.03 ... Change-Id: I3b866e927d93f4b690aa4891940fc8afabf4146e Signed-off-by: Louis Mayencourt <louis.mayencourt@arm.com> Louis Mayencourt authored on 26 Sep 2019 Sandrine Bailleux committed on 2 Oct 2019
2019-10-01	3bdade5 Browse files » Merge "Cortex_hercules: Add support for Hercules-AE" into integration Soby Mathew authored on 1 Oct 2019 TrustedFirmware Code Review committed on 1 Oct 2019
	2f625c5 Browse files » Merge "doc: Migrate to Linaro release 19.06" into integration Sandrine Bailleux authored on 1 Oct 2019 TrustedFirmware Code Review committed on 1 Oct 2019
	fa405e3 Browse files » qemu/qemu_sbsa: Adding memory mapping for both FLASH0/FLASH1 ... This patch adds mapping for secure FLASH0 for qemu/virt and qemu/qemu_sbsa platforms. This change is targeted for sbsa but since both platforms share common code, changes in common defines was necessary. For qemu_sbsa, this patch adds necessary mapping in order to boot without semi-hosting from secure FLASH0. EFI need to stay in FLASH1 (share it with variables) since it need to "run in place" in non secure domain. Changes for this are under RFC at edk2-platforms mailing list: https://patches.linaro.org/patch/171327/ (edk2-platforms/Platform/Qemu/SbsaQemu/SbsaQemu.dsc). In docs qemu/virt is described as using semi-hosting, therefore this change should be orthogonal to existing assumptions while giving possibility to store both bl1 and fip in FLASH0 at some point (additional changes required for that). Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Change-Id: I782bc3637c91c01eaee680b3c5c408e24b4b6e28 Radoslaw Biernacki authored on 7 Jun 2018 Radoslaw Biernacki committed on 1 Oct 2019
	558a6f4 Browse files » qemu/qemu_sbsa: Adding Qemu SBSA platform ... This patch introduces Qemu SBSA platform. Both platform specific files where copied from qemu/qemu with changes for DRAM base above 32bit and removal of ARMv7 conditional defines/code. Documentation is aligned to rest of SBSA patches along the series and planed changes in edk2-platform repo. Fixes ARM-software/tf-issues#602 Signed-off-by: Radoslaw Biernacki <radoslaw.biernacki@linaro.org> Change-Id: I8ebc34eedb2268365e479ef05654b2df1b99128c Radoslaw Biernacki authored on 17 May 2018 Radoslaw Biernacki committed on 1 Oct 2019
2019-09-30	35010bb Browse files » doc: Migrate to Linaro release 19.06 ... - Updated Linaro release version number to 19.06 - Updated links to Linaro instructions and releases - Removed the Linaro old releases link Signed-off-by: zelalem-aweke <zelalem.aweke@arm.com> Change-Id: Ib786728106961e89182b42183e7b889f6fc74190 zelalem-aweke committed on 30 Sep 2019
2019-09-30	a4668c3 Browse files » Cortex_hercules: Add support for Hercules-AE ... Not tested on FVP Model. Change-Id: Iedebc5c1fbc7ea577e94142b7feafa5546f1f4f9 Signed-off-by: Artsem Artsemenka <artsem.artsemenka@arm.com> Artsem Artsemenka committed on 30 Sep 2019
2019-09-27	c5235ca Browse files » Merge "AArch32: Disable Secure Cycle Counter" into integration Soby Mathew authored on 27 Sep 2019 TrustedFirmware Code Review committed on 27 Sep 2019