diff --git a/drivers/arm/peripherals/pl011/console.h b/drivers/arm/peripherals/pl011/console.h deleted file mode 100644 index e285909..0000000 --- a/drivers/arm/peripherals/pl011/console.h +++ /dev/null @@ -1,39 +0,0 @@ -/* - * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * - * Redistributions of source code must retain the above copyright notice, this - * list of conditions and the following disclaimer. - * - * Redistributions in binary form must reproduce the above copyright notice, - * this list of conditions and the following disclaimer in the documentation - * and/or other materials provided with the distribution. - * - * Neither the name of ARM nor the names of its contributors may be used - * to endorse or promote products derived from this software without specific - * prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" - * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE - * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE - * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR - * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF - * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS - * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN - * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) - * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE - * POSSIBILITY OF SUCH DAMAGE. - */ - -#ifndef __CONSOLE_H__ -#define __CONSOLE_H__ - -void console_init(unsigned long base_addr); -int console_putc(int c); -int console_getc(void); - -#endif /* __CONSOLE_H__ */ - diff --git a/drivers/arm/peripherals/pl011/pl011.c b/drivers/arm/peripherals/pl011/pl011.c index a6a06e6..8288cd8 100644 --- a/drivers/arm/peripherals/pl011/pl011.c +++ b/drivers/arm/peripherals/pl011/pl011.c @@ -28,62 +28,15 @@ * POSSIBILITY OF SUCH DAMAGE. */ -#include -#include #include #include +#include -static unsigned long uart_base = PL011_BASE; - -/* - * TODO: Console init functions shoule be in a console.c. This file should - * only contain the pl011 accessors. - */ -void console_init(unsigned long base_addr) +void pl011_setbaudrate(unsigned long base_addr, unsigned int baudrate) { unsigned int divisor; - - /* Initialise internal base address variable */ - uart_base = base_addr; - - /* Baud Rate */ - -#if defined(PL011_INTEGER) && defined(PL011_FRACTIONAL) - mmio_write_32(uart_base + UARTIBRD, PL011_INTEGER); - mmio_write_32(uart_base + UARTFBRD, PL011_FRACTIONAL); -#else - divisor = (PL011_CLK_IN_HZ * 4) / PL011_BAUDRATE; - mmio_write_32(uart_base + UARTIBRD, divisor >> 6); - mmio_write_32(uart_base + UARTFBRD, divisor & 0x3F); -#endif - - - mmio_write_32(uart_base + UARTLCR_H, PL011_LINE_CONTROL); - - /* Clear any pending errors */ - mmio_write_32(uart_base + UARTECR, 0); - - /* Enable tx, rx, and uart overall */ - mmio_write_32(uart_base + UARTCR, - PL011_UARTCR_RXE | PL011_UARTCR_TXE | - PL011_UARTCR_UARTEN); -} - -int console_putc(int c) -{ - if (c == '\n') { - console_putc('\r'); - } - - while ((mmio_read_32(uart_base + UARTFR) & PL011_UARTFR_TXFE) == 0) - ; - mmio_write_32(uart_base + UARTDR, c); - return c; -} - -int console_getc(void) -{ - while ((mmio_read_32(uart_base + UARTFR) & PL011_UARTFR_RXFE) != 0) - ; - return mmio_read_32(uart_base + UARTDR); + assert(baudrate); + divisor = (PL011_CLK_IN_HZ * 4) / baudrate; + pl011_write_ibrd(base_addr, divisor >> 6); + pl011_write_fbrd(base_addr, divisor & 0x3F); } diff --git a/drivers/arm/peripherals/pl011/pl011.h b/drivers/arm/peripherals/pl011/pl011.h index 7a0b4f2..5ad2fc7 100644 --- a/drivers/arm/peripherals/pl011/pl011.h +++ b/drivers/arm/peripherals/pl011/pl011.h @@ -104,4 +104,58 @@ #define PL011_UARTLCR_H_PEN (1 << 1) /* Parity Enable */ #define PL011_UARTLCR_H_BRK (1 << 0) /* Send break */ +/******************************************************************************* + * Pl011 CPU interface accessors for writing registers + ******************************************************************************/ + +static inline void pl011_write_ibrd(unsigned int base, unsigned int val) +{ + mmio_write_32(base + UARTIBRD, val); +} + +static inline void pl011_write_fbrd(unsigned int base, unsigned int val) +{ + mmio_write_32(base + UARTFBRD, val); +} + +static inline void pl011_write_lcr_h(unsigned int base, unsigned int val) +{ + mmio_write_32(base + UARTLCR_H, val); +} + +static inline void pl011_write_ecr(unsigned int base, unsigned int val) +{ + mmio_write_32(base + UARTECR, val); +} + +static inline void pl011_write_cr(unsigned int base, unsigned int val) +{ + mmio_write_32(base + UARTCR, val); +} + +static inline void pl011_write_dr(unsigned int base, unsigned int val) +{ + mmio_write_32(base + UARTDR, val); +} + +/******************************************************************************* + * Pl011 CPU interface accessors for reading registers + ******************************************************************************/ + +static inline unsigned int pl011_read_fr(unsigned int base) +{ + return mmio_read_32(base + UARTFR); +} + +static inline unsigned int pl011_read_dr(unsigned int base) +{ + return mmio_read_32(base + UARTDR); +} + +/******************************************************************************* + * Function prototypes + ******************************************************************************/ + +void pl011_setbaudrate(unsigned long base_addr, unsigned int baudrate); + #endif /* __PL011_H__ */ diff --git a/drivers/console/console.c b/drivers/console/console.c new file mode 100644 index 0000000..efe1201 --- /dev/null +++ b/drivers/console/console.c @@ -0,0 +1,77 @@ +/* + * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#include +#include +#include + +static unsigned long uart_base = PL011_BASE; + +void console_init(unsigned long base_addr) +{ + /* Initialise internal base address variable */ + uart_base = base_addr; + + /* Baud Rate */ +#if defined(PL011_INTEGER) && defined(PL011_FRACTIONAL) + pl011_write_ibrd(uart_base, PL011_INTEGER); + pl011_write_fbrd(uart_base, PL011_FRACTIONAL); +#else + pl011_setbaudrate(uart_base, PL011_BAUDRATE); +#endif + + pl011_write_lcr_h(uart_base, PL011_LINE_CONTROL); + + /* Clear any pending errors */ + pl011_write_ecr(uart_base, 0); + + /* Enable tx, rx, and uart overall */ + pl011_write_cr(uart_base, PL011_UARTCR_RXE | PL011_UARTCR_TXE | + PL011_UARTCR_UARTEN); + +} + +int console_putc(int c) +{ + if (c == '\n') + console_putc('\r'); + + while ((pl011_read_fr(uart_base) & PL011_UARTFR_TXFF) == 1) + ; + pl011_write_dr(uart_base, c); + return c; +} + +int console_getc(void) +{ + while ((pl011_read_fr(uart_base) & PL011_UARTFR_RXFE) != 0) + ; + return pl011_read_dr(uart_base); +} diff --git a/drivers/console/console.h b/drivers/console/console.h new file mode 100644 index 0000000..e285909 --- /dev/null +++ b/drivers/console/console.h @@ -0,0 +1,39 @@ +/* + * Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * Redistributions of source code must retain the above copyright notice, this + * list of conditions and the following disclaimer. + * + * Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * + * Neither the name of ARM nor the names of its contributors may be used + * to endorse or promote products derived from this software without specific + * prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef __CONSOLE_H__ +#define __CONSOLE_H__ + +void console_init(unsigned long base_addr); +int console_putc(int c); +int console_getc(void); + +#endif /* __CONSOLE_H__ */ + diff --git a/plat/fvp/platform.mk b/plat/fvp/platform.mk index be8dcb3..e8de098 100644 --- a/plat/fvp/platform.mk +++ b/plat/fvp/platform.mk @@ -29,10 +29,12 @@ # PLAT_INCLUDES := -Idrivers/arm/interconnect/cci-400 \ + -Idrivers/console \ -Idrivers/arm/peripherals/pl011 \ -Idrivers/power PLAT_BL1_C_VPATH := drivers/arm/interconnect/cci-400 \ + drivers/console \ drivers/arm/peripherals/pl011 \ lib/arch/${ARCH} \ lib/semihosting \ @@ -42,6 +44,7 @@ PLAT_BL1_S_VPATH := lib/semihosting/${ARCH} PLAT_BL2_C_VPATH := drivers/arm/interconnect/cci-400 \ + drivers/console \ drivers/arm/peripherals/pl011 \ lib/arch/${ARCH} \ lib/stdlib \ @@ -51,6 +54,7 @@ PLAT_BL2_S_VPATH := lib/semihosting/${ARCH} PLAT_BL31_C_VPATH := drivers/arm/interconnect/cci-400 \ + drivers/console \ drivers/arm/peripherals/pl011 \ lib/arch/${ARCH} \ lib/semihosting \ @@ -62,6 +66,7 @@ PLAT_BL_COMMON_SOURCES := semihosting_call.S \ mmio.c \ + console.c \ pl011.c \ semihosting.c \ sysreg_helpers.S \