diff --git a/drivers/renesas/rcar/cpld/ulcb_cpld.c b/drivers/renesas/rcar/cpld/ulcb_cpld.c index 4830853..5ffb2e1 100644 --- a/drivers/renesas/rcar/cpld/ulcb_cpld.c +++ b/drivers/renesas/rcar/cpld/ulcb_cpld.c @@ -68,7 +68,7 @@ for (i = 0; i < 32; i++) { /* MSB first */ - gpio_set_value(GPIO_OUTDT6, MOSI, data & (1 << 31)); + gpio_set_value(GPIO_OUTDT6, MOSI, data & (1U << 31)); gpio_set_value(GPIO_OUTDT6, SCLK, 1); data <<= 1; gpio_set_value(GPIO_OUTDT6, SCLK, 0); diff --git a/drivers/renesas/rcar/pwrc/pwrc.c b/drivers/renesas/rcar/pwrc/pwrc.c index d97e593..f4c9d3a 100644 --- a/drivers/renesas/rcar/pwrc/pwrc.c +++ b/drivers/renesas/rcar/pwrc/pwrc.c @@ -763,10 +763,10 @@ reg = mmio_read_32(RCAR_PRR); - if (reg & (1 << (STATE_CA53_CPU + RCAR_CA53CPU_NUM_MAX))) + if (reg & (1U << (STATE_CA53_CPU + RCAR_CA53CPU_NUM_MAX))) return RCAR_CLUSTER_CA57; - if (reg & (1 << (STATE_CA57_CPU + RCAR_CA57CPU_NUM_MAX))) + if (reg & (1U << (STATE_CA57_CPU + RCAR_CA57CPU_NUM_MAX))) return RCAR_CLUSTER_CA53; return RCAR_CLUSTER_A53A57; @@ -810,7 +810,7 @@ count_ca57: if (IS_A53A57(c) || IS_CA57(c)) { - if (reg & (1 << (STATE_CA57_CPU + RCAR_CA57CPU_NUM_MAX))) + if (reg & (1U << (STATE_CA57_CPU + RCAR_CA57CPU_NUM_MAX))) goto done; for (i = 0; i < RCAR_CA57CPU_NUM_MAX; i++) { diff --git a/drivers/renesas/rcar/pwrc/pwrc.h b/drivers/renesas/rcar/pwrc/pwrc.h index cfb35ff..e67c6ef 100644 --- a/drivers/renesas/rcar/pwrc/pwrc.h +++ b/drivers/renesas/rcar/pwrc/pwrc.h @@ -15,7 +15,7 @@ #define PWKUPR_WEN (1ull << 31) -#define PSYSR_AFF_L2 (1 << 31) +#define PSYSR_AFF_L2 (1U << 31) #define PSYSR_AFF_L1 (1 << 30) #define PSYSR_AFF_L0 (1 << 29) #define PSYSR_WEN (1 << 28) diff --git a/plat/renesas/rcar/rcar_common.c b/plat/renesas/rcar/rcar_common.c index d24d71a..4ea753f 100644 --- a/plat/renesas/rcar/rcar_common.c +++ b/plat/renesas/rcar/rcar_common.c @@ -18,10 +18,10 @@ #define MSTP318 (1 << 18) #define MSTP319 (1 << 19) #define PMSR 0x5c -#define PMSR_L1FAEG (1 << 31) +#define PMSR_L1FAEG (1U << 31) #define PMSR_PMEL1RX (1 << 23) #define PMCTLR 0x60 -#define PMSR_L1IATN (1 << 31) +#define PMSR_L1IATN (1U << 31) static int rcar_pcie_fixup(unsigned int controller) {