diff --git a/plat/allwinner/sun50i_a64/sunxi_power.c b/plat/allwinner/sun50i_a64/sunxi_power.c
index af30477..8db248b 100644
--- a/plat/allwinner/sun50i_a64/sunxi_power.c
+++ b/plat/allwinner/sun50i_a64/sunxi_power.c
@@ -118,7 +118,7 @@
 	return rsb_write(AXP803_RT_ADDR, reg, val);
 }
 
-static int axp_setbits(uint8_t reg, uint8_t set_mask)
+static int axp_clrsetbits(uint8_t reg, uint8_t clr_mask, uint8_t set_mask)
 {
 	uint8_t regval;
 	int ret;
@@ -127,11 +127,14 @@
 	if (ret < 0)
 		return ret;
 
-	regval = ret | set_mask;
+	regval = (ret & ~clr_mask) | set_mask;
 
 	return rsb_write(AXP803_RT_ADDR, reg, regval);
 }
 
+#define axp_clrbits(reg, clr_mask) axp_clrsetbits(reg, clr_mask, 0)
+#define axp_setbits(reg, set_mask) axp_clrsetbits(reg, 0, set_mask)
+
 static bool should_enable_regulator(const void *fdt, int node)
 {
 	if (fdt_getprop(fdt, node, "phandle", NULL) != NULL)
@@ -226,8 +229,11 @@
 		return;
 	}
 
-	if (fdt_getprop(fdt, node, "x-powers,drive-vbus-en", NULL))
-		axp_setbits(0x8f, BIT(4));
+	if (fdt_getprop(fdt, node, "x-powers,drive-vbus-en", NULL)) {
+		axp_clrbits(0x8f, BIT(4));
+		axp_setbits(0x30, BIT(2));
+		INFO("PMIC: AXP803: Enabling DRIVEVBUS\n");
+	}
 
 	/* descend into the "regulators" subnode */
 	node = fdt_first_subnode(fdt, node);