diff --git a/drivers/marvell/mochi/ap807_setup.c b/drivers/marvell/mochi/ap807_setup.c index 132fffc..7b68195 100644 --- a/drivers/marvell/mochi/ap807_setup.c +++ b/drivers/marvell/mochi/ap807_setup.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -191,6 +192,38 @@ mmio_write_32(MVEBU_SYSRST_OUT_CONFIG_REG, reg); } +/* + * By default all external CPs start with configuration address space set to + * 0xf200_0000. To overcome this issue, go in the loop and initialize the + * CP one by one, using temporary window configuration which allows to access + * each CP and update its configuration space according to decoding + * windows scheme defined for each platform. + */ +void update_cp110_default_win(int cp_id) +{ + int mci_id = cp_id - 1; + uintptr_t cp110_base, cp110_temp_base; + + /* CP110 default configuration address space */ + cp110_temp_base = MVEBU_AP_IO_BASE(MVEBU_AP0); + + struct addr_map_win iowin_temp_win = { + .base_addr = cp110_temp_base, + .win_size = MVEBU_CP_OFFSET, + }; + + iowin_temp_win.target_id = mci_id; + iow_temp_win_insert(0, &iowin_temp_win, 1); + + /* Calculate the new CP110 - base address */ + cp110_base = MVEBU_CP_REGS_BASE(cp_id); + /* Go and update the CP110 configuration address space */ + iob_cfg_space_update(0, cp_id, cp110_temp_base, cp110_base); + + /* Remove the temporary IO-WIN window */ + iow_temp_win_remove(0, &iowin_temp_win, 1); +} + void ap_init(void) { /* Setup Aurora2. */ diff --git a/drivers/marvell/mochi/apn806_setup.c b/drivers/marvell/mochi/apn806_setup.c index 1e91c43..1a02bd4 100644 --- a/drivers/marvell/mochi/apn806_setup.c +++ b/drivers/marvell/mochi/apn806_setup.c @@ -250,3 +250,6 @@ return 1; } +void update_cp110_default_win(int cp_id) +{ +} diff --git a/include/drivers/marvell/mochi/ap_setup.h b/include/drivers/marvell/mochi/ap_setup.h index eff4473..5b0e75f 100644 --- a/include/drivers/marvell/mochi/ap_setup.h +++ b/include/drivers/marvell/mochi/ap_setup.h @@ -13,5 +13,6 @@ void ap_init(void); void ap_ble_init(void); int ap_get_count(void); +void update_cp110_default_win(int cp_id); #endif /* AP_SETUP_H */ diff --git a/plat/marvell/armada/a8k/common/plat_bl31_setup.c b/plat/marvell/armada/a8k/common/plat_bl31_setup.c index 98b3966..0a8a00c 100644 --- a/plat/marvell/armada/a8k/common/plat_bl31_setup.c +++ b/plat/marvell/armada/a8k/common/plat_bl31_setup.c @@ -117,8 +117,11 @@ for (cp = 0; cp < CP_COUNT; cp++) { /* configure cp110 for CP0*/ - if (cp == 1) + if (cp >= 1) { mci_initialize(MVEBU_MCI0); + update_cp110_default_win(cp); + } + /* initialize MCI & CP1 */ cp110_init(MVEBU_CP_REGS_BASE(cp), @@ -128,6 +131,12 @@ marvell_bl31_mpp_init(cp); } + /* + * There is need to configure IO_WIN windows again to overwrite + * temporary configuration done during update_cp110_default_win + */ + init_io_win(MVEBU_AP0); + /* initialize IPC between MSS and ATF */ if (mailbox[MBOX_IDX_MAGIC] != MVEBU_MAILBOX_MAGIC_NUM || mailbox[MBOX_IDX_SUSPEND_MAGIC] != MVEBU_MAILBOX_SUSPEND_STATE)