diff --git a/plat/xilinx/versal/plat_psci.c b/plat/xilinx/versal/plat_psci.c
index de581bd..5e3b6f7 100644
--- a/plat/xilinx/versal/plat_psci.c
+++ b/plat/xilinx/versal/plat_psci.c
@@ -5,56 +5,35 @@
  */
 
 #include <plat_private.h>
+#include <pm_common.h>
 #include <common/debug.h>
 #include <lib/mmio.h>
 #include <lib/psci/psci.h>
 #include <plat/common/platform.h>
 
+#include "pm_api_sys.h"
+#include "pm_client.h"
+
 static uintptr_t versal_sec_entry;
 
-static int versal_nopmc_pwr_domain_on(u_register_t mpidr)
+static int versal_pwr_domain_on(u_register_t mpidr)
 {
-	uint32_t r;
 	unsigned int cpu_id = plat_core_pos_by_mpidr(mpidr);
+	const struct pm_proc *proc;
 
 	VERBOSE("%s: mpidr: 0x%lx\n", __func__, mpidr);
 
 	if (cpu_id == -1)
 		return PSCI_E_INTERN_FAIL;
 
-	/*
-	 * program RVBAR
-	 */
-	mmio_write_32(FPD_APU_RVBAR_L_0 + (cpu_id << 3), versal_sec_entry);
-	mmio_write_32(FPD_APU_RVBAR_H_0 + (cpu_id << 3), versal_sec_entry >> 32);
+	proc = pm_get_proc(cpu_id);
 
-	/*
-	 * clear VINITHI
-	 */
-	r = mmio_read_32(FPD_APU_CONFIG_0);
-	r &= ~(1 << FPD_APU_CONFIG_0_VINITHI_SHIFT << cpu_id);
-	mmio_write_32(FPD_APU_CONFIG_0, r);
+	/* Send request to PMC to wake up selected ACPU core */
+	pm_req_wakeup(proc->node_id, (versal_sec_entry & 0xFFFFFFFF) | 0x1,
+		      versal_sec_entry >> 32, 0);
 
-	/*
-	 * FIXME: Add power up sequence, By default it works
-	 * now without the need of it as it was powered up by
-	 * default.
-	 */
-
-	/*
-	 * clear power down request
-	 */
-	r = mmio_read_32(FPD_APU_PWRCTL);
-	r &= ~(1 << cpu_id);
-	mmio_write_32(FPD_APU_PWRCTL, r);
-
-	/*
-	 * release core reset
-	 */
-	r = mmio_read_32(CRF_RST_APU);
-	r &= ~((CRF_RST_APU_ACPU_PWRON_RESET |
-			CRF_RST_APU_ACPU_RESET) << cpu_id);
-	mmio_write_32(CRF_RST_APU, r);
+	/* Clear power down request */
+	pm_client_wakeup(proc);
 
 	return PSCI_E_SUCCESS;
 }
@@ -69,7 +48,7 @@
 }
 
 static const struct plat_psci_ops versal_nopmc_psci_ops = {
-	.pwr_domain_on			= versal_nopmc_pwr_domain_on,
+	.pwr_domain_on			= versal_pwr_domain_on,
 	.pwr_domain_on_finish		= versal_pwr_domain_on_finish,
 };