diff --git a/drivers/st/ddr/stm32mp1_ddr.c b/drivers/st/ddr/stm32mp1_ddr.c index aca0450..e109e87 100644 --- a/drivers/st/ddr/stm32mp1_ddr.c +++ b/drivers/st/ddr/stm32mp1_ddr.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2018, STMicroelectronics - All Rights Reserved + * Copyright (C) 2018-2019, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause */ @@ -12,10 +12,10 @@ #include #include #include +#include #include #include #include -#include #include #include #include diff --git a/drivers/st/pmic/stm32mp1_pmic.c b/drivers/st/pmic/stm32mp1_pmic.c deleted file mode 100644 index c5bdfc0..0000000 --- a/drivers/st/pmic/stm32mp1_pmic.c +++ /dev/null @@ -1,347 +0,0 @@ -/* - * Copyright (c) 2017-2018, STMicroelectronics - All Rights Reserved - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include - -#include - -#include - -#include -#include -#include -#include -#include -#include -#include -#include - -/* I2C Timing hard-coded value, for I2C clock source is HSI at 64MHz */ -#define I2C_TIMING 0x10D07DB5 - -#define I2C_TIMEOUT 0xFFFFF - -#define MASK_RESET_BUCK3 BIT(2) - -#define STPMU1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2)) -#define STPMU1_LDO12356_OUTPUT_SHIFT 2 -#define STPMU1_LDO3_MODE (uint8_t)(BIT(7)) -#define STPMU1_LDO3_DDR_SEL 31U -#define STPMU1_LDO3_1800000 (9U << STPMU1_LDO12356_OUTPUT_SHIFT) - -#define STPMU1_BUCK_OUTPUT_SHIFT 2 -#define STPMU1_BUCK3_1V8 (39U << STPMU1_BUCK_OUTPUT_SHIFT) - -#define STPMU1_DEFAULT_START_UP_DELAY_MS 1 - -static struct i2c_handle_s i2c_handle; -static uint32_t pmic_i2c_addr; - -static int dt_get_pmic_node(void *fdt) -{ - return fdt_node_offset_by_compatible(fdt, -1, "st,stpmu1"); -} - -bool dt_check_pmic(void) -{ - int node; - void *fdt; - - if (fdt_get_address(&fdt) == 0) { - return false; - } - - node = dt_get_pmic_node(fdt); - if (node < 0) { - VERBOSE("%s: No PMIC node found in DT\n", __func__); - return false; - } - - return fdt_check_status(node); -} - -static int dt_pmic_i2c_config(struct dt_node_info *i2c_info) -{ - int pmic_node, i2c_node; - void *fdt; - const fdt32_t *cuint; - - if (fdt_get_address(&fdt) == 0) { - return -ENOENT; - } - - pmic_node = dt_get_pmic_node(fdt); - if (pmic_node < 0) { - return -FDT_ERR_NOTFOUND; - } - - cuint = fdt_getprop(fdt, pmic_node, "reg", NULL); - if (cuint == NULL) { - return -FDT_ERR_NOTFOUND; - } - - pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1; - if (pmic_i2c_addr > UINT16_MAX) { - return -EINVAL; - } - - i2c_node = fdt_parent_offset(fdt, pmic_node); - if (i2c_node < 0) { - return -FDT_ERR_NOTFOUND; - } - - dt_fill_device_info(i2c_info, i2c_node); - if (i2c_info->base == 0U) { - return -FDT_ERR_NOTFOUND; - } - - return dt_set_pinctrl_config(i2c_node); -} - -int dt_pmic_enable_boot_on_regulators(void) -{ - int pmic_node, regulators_node, regulator_node; - void *fdt; - - if (fdt_get_address(&fdt) == 0) { - return -ENOENT; - } - - pmic_node = dt_get_pmic_node(fdt); - if (pmic_node < 0) { - return -FDT_ERR_NOTFOUND; - } - - regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators"); - - fdt_for_each_subnode(regulator_node, fdt, regulators_node) { - const fdt32_t *cuint; - const char *node_name; - uint16_t voltage; - - if (fdt_getprop(fdt, regulator_node, "regulator-boot-on", - NULL) == NULL) { - continue; - } - - cuint = fdt_getprop(fdt, regulator_node, - "regulator-min-microvolt", NULL); - if (cuint == NULL) { - continue; - } - - /* DT uses microvolts, whereas driver awaits millivolts */ - voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U); - node_name = fdt_get_name(fdt, regulator_node, NULL); - - if (stpmu1_is_regulator_enabled(node_name) == 0U) { - int status; - - status = stpmu1_regulator_voltage_set(node_name, - voltage); - if (status != 0) { - return status; - } - - status = stpmu1_regulator_enable(node_name); - if (status != 0) { - return status; - } - } - } - - return 0; -} - -void initialize_pmic_i2c(void) -{ - int ret; - struct dt_node_info i2c_info; - - if (dt_pmic_i2c_config(&i2c_info) != 0) { - ERROR("I2C configuration failed\n"); - panic(); - } - - if (stm32mp1_clk_enable((uint32_t)i2c_info.clock) < 0) { - ERROR("I2C clock enable failed\n"); - panic(); - } - - /* Initialize PMIC I2C */ - i2c_handle.i2c_base_addr = i2c_info.base; - i2c_handle.i2c_init.timing = I2C_TIMING; - i2c_handle.i2c_init.own_address1 = pmic_i2c_addr; - i2c_handle.i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT; - i2c_handle.i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE; - i2c_handle.i2c_init.own_address2 = 0; - i2c_handle.i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK; - i2c_handle.i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE; - i2c_handle.i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE; - - ret = stm32_i2c_init(&i2c_handle); - if (ret != 0) { - ERROR("Cannot initialize I2C %x (%d)\n", - i2c_handle.i2c_base_addr, ret); - panic(); - } - - ret = stm32_i2c_config_analog_filter(&i2c_handle, - I2C_ANALOGFILTER_ENABLE); - if (ret != 0) { - ERROR("Cannot initialize I2C analog filter (%d)\n", ret); - panic(); - } - - ret = stm32_i2c_is_device_ready(&i2c_handle, (uint16_t)pmic_i2c_addr, 1, - I2C_TIMEOUT); - if (ret != 0) { - ERROR("I2C device not ready (%d)\n", ret); - panic(); - } - - stpmu1_bind_i2c(&i2c_handle, (uint16_t)pmic_i2c_addr); -} - -void initialize_pmic(void) -{ - int status; - uint8_t read_val; - - initialize_pmic_i2c(); - - status = stpmu1_register_read(VERSION_STATUS_REG, &read_val); - if (status != 0) { - panic(); - } - - INFO("PMIC version = 0x%x\n", read_val); - - /* Keep VDD on during the reset cycle */ - status = stpmu1_register_update(MASK_RESET_BUCK_REG, - MASK_RESET_BUCK3, - MASK_RESET_BUCK3); - if (status != 0) { - panic(); - } -} - -int pmic_ddr_power_init(enum ddr_type ddr_type) -{ - bool buck3_at_1v8 = false; - uint8_t read_val; - int status; - - switch (ddr_type) { - case STM32MP_DDR3: - /* Set LDO3 to sync mode */ - status = stpmu1_register_read(LDO3_CONTROL_REG, &read_val); - if (status != 0) { - return status; - } - - read_val &= ~STPMU1_LDO3_MODE; - read_val &= ~STPMU1_LDO12356_OUTPUT_MASK; - read_val |= STPMU1_LDO3_DDR_SEL << STPMU1_LDO12356_OUTPUT_SHIFT; - - status = stpmu1_register_write(LDO3_CONTROL_REG, read_val); - if (status != 0) { - return status; - } - - status = stpmu1_regulator_voltage_set("buck2", 1350); - if (status != 0) { - return status; - } - - status = stpmu1_regulator_enable("buck2"); - if (status != 0) { - return status; - } - - mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); - - status = stpmu1_regulator_enable("vref_ddr"); - if (status != 0) { - return status; - } - - mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); - - status = stpmu1_regulator_enable("ldo3"); - if (status != 0) { - return status; - } - - mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); - break; - - case STM32MP_LPDDR2: - /* - * Set LDO3 to 1.8V - * Set LDO3 to bypass mode if BUCK3 = 1.8V - * Set LDO3 to normal mode if BUCK3 != 1.8V - */ - status = stpmu1_register_read(BUCK3_CONTROL_REG, &read_val); - if (status != 0) { - return status; - } - - if ((read_val & STPMU1_BUCK3_1V8) == STPMU1_BUCK3_1V8) { - buck3_at_1v8 = true; - } - - status = stpmu1_register_read(LDO3_CONTROL_REG, &read_val); - if (status != 0) { - return status; - } - - read_val &= ~STPMU1_LDO3_MODE; - read_val &= ~STPMU1_LDO12356_OUTPUT_MASK; - read_val |= STPMU1_LDO3_1800000; - if (buck3_at_1v8) { - read_val |= STPMU1_LDO3_MODE; - } - - status = stpmu1_register_write(LDO3_CONTROL_REG, read_val); - if (status != 0) { - return status; - } - - status = stpmu1_regulator_voltage_set("buck2", 1200); - if (status != 0) { - return status; - } - - status = stpmu1_regulator_enable("ldo3"); - if (status != 0) { - return status; - } - - mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); - - status = stpmu1_regulator_enable("buck2"); - if (status != 0) { - return status; - } - - mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); - - status = stpmu1_regulator_enable("vref_ddr"); - if (status != 0) { - return status; - } - - mdelay(STPMU1_DEFAULT_START_UP_DELAY_MS); - break; - - default: - break; - }; - - return 0; -} diff --git a/drivers/st/pmic/stm32mp_pmic.c b/drivers/st/pmic/stm32mp_pmic.c new file mode 100644 index 0000000..80b4cab --- /dev/null +++ b/drivers/st/pmic/stm32mp_pmic.c @@ -0,0 +1,348 @@ +/* + * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include +#include + +#include + +#include + +#include +#include +#include +#include +#include +#include +#include +#include + +/* I2C Timing hard-coded value, for I2C clock source is HSI at 64MHz */ +#define I2C_TIMING 0x10D07DB5 + +#define I2C_TIMEOUT 0xFFFFF + +#define MASK_RESET_BUCK3 BIT(2) + +#define STPMIC1_LDO12356_OUTPUT_MASK (uint8_t)(GENMASK(6, 2)) +#define STPMIC1_LDO12356_OUTPUT_SHIFT 2 +#define STPMIC1_LDO3_MODE (uint8_t)(BIT(7)) +#define STPMIC1_LDO3_DDR_SEL 31U +#define STPMIC1_LDO3_1800000 (9U << STPMIC1_LDO12356_OUTPUT_SHIFT) + +#define STPMIC1_BUCK_OUTPUT_SHIFT 2 +#define STPMIC1_BUCK3_1V8 (39U << STPMIC1_BUCK_OUTPUT_SHIFT) + +#define STPMIC1_DEFAULT_START_UP_DELAY_MS 1 + +static struct i2c_handle_s i2c_handle; +static uint32_t pmic_i2c_addr; + +static int dt_get_pmic_node(void *fdt) +{ + return fdt_node_offset_by_compatible(fdt, -1, "st,stpmic1"); +} + +bool dt_check_pmic(void) +{ + int node; + void *fdt; + + if (fdt_get_address(&fdt) == 0) { + return false; + } + + node = dt_get_pmic_node(fdt); + if (node < 0) { + VERBOSE("%s: No PMIC node found in DT\n", __func__); + return false; + } + + return fdt_check_status(node); +} + +static int dt_pmic_i2c_config(struct dt_node_info *i2c_info) +{ + int pmic_node, i2c_node; + void *fdt; + const fdt32_t *cuint; + + if (fdt_get_address(&fdt) == 0) { + return -ENOENT; + } + + pmic_node = dt_get_pmic_node(fdt); + if (pmic_node < 0) { + return -FDT_ERR_NOTFOUND; + } + + cuint = fdt_getprop(fdt, pmic_node, "reg", NULL); + if (cuint == NULL) { + return -FDT_ERR_NOTFOUND; + } + + pmic_i2c_addr = fdt32_to_cpu(*cuint) << 1; + if (pmic_i2c_addr > UINT16_MAX) { + return -EINVAL; + } + + i2c_node = fdt_parent_offset(fdt, pmic_node); + if (i2c_node < 0) { + return -FDT_ERR_NOTFOUND; + } + + dt_fill_device_info(i2c_info, i2c_node); + if (i2c_info->base == 0U) { + return -FDT_ERR_NOTFOUND; + } + + return dt_set_pinctrl_config(i2c_node); +} + +int dt_pmic_enable_boot_on_regulators(void) +{ + int pmic_node, regulators_node, regulator_node; + void *fdt; + + if (fdt_get_address(&fdt) == 0) { + return -ENOENT; + } + + pmic_node = dt_get_pmic_node(fdt); + if (pmic_node < 0) { + return -FDT_ERR_NOTFOUND; + } + + regulators_node = fdt_subnode_offset(fdt, pmic_node, "regulators"); + + fdt_for_each_subnode(regulator_node, fdt, regulators_node) { + const fdt32_t *cuint; + const char *node_name; + uint16_t voltage; + + if (fdt_getprop(fdt, regulator_node, "regulator-boot-on", + NULL) == NULL) { + continue; + } + + cuint = fdt_getprop(fdt, regulator_node, + "regulator-min-microvolt", NULL); + if (cuint == NULL) { + continue; + } + + /* DT uses microvolts, whereas driver awaits millivolts */ + voltage = (uint16_t)(fdt32_to_cpu(*cuint) / 1000U); + node_name = fdt_get_name(fdt, regulator_node, NULL); + + if (stpmic1_is_regulator_enabled(node_name) == 0U) { + int status; + + status = stpmic1_regulator_voltage_set(node_name, + voltage); + if (status != 0) { + return status; + } + + status = stpmic1_regulator_enable(node_name); + if (status != 0) { + return status; + } + } + } + + return 0; +} + +void initialize_pmic_i2c(void) +{ + int ret; + struct dt_node_info i2c_info; + + if (dt_pmic_i2c_config(&i2c_info) != 0) { + ERROR("I2C configuration failed\n"); + panic(); + } + + if (stm32mp1_clk_enable((uint32_t)i2c_info.clock) < 0) { + ERROR("I2C clock enable failed\n"); + panic(); + } + + /* Initialize PMIC I2C */ + i2c_handle.i2c_base_addr = i2c_info.base; + i2c_handle.i2c_init.timing = I2C_TIMING; + i2c_handle.i2c_init.own_address1 = pmic_i2c_addr; + i2c_handle.i2c_init.addressing_mode = I2C_ADDRESSINGMODE_7BIT; + i2c_handle.i2c_init.dual_address_mode = I2C_DUALADDRESS_DISABLE; + i2c_handle.i2c_init.own_address2 = 0; + i2c_handle.i2c_init.own_address2_masks = I2C_OAR2_OA2NOMASK; + i2c_handle.i2c_init.general_call_mode = I2C_GENERALCALL_DISABLE; + i2c_handle.i2c_init.no_stretch_mode = I2C_NOSTRETCH_DISABLE; + + ret = stm32_i2c_init(&i2c_handle); + if (ret != 0) { + ERROR("Cannot initialize I2C %x (%d)\n", + i2c_handle.i2c_base_addr, ret); + panic(); + } + + ret = stm32_i2c_config_analog_filter(&i2c_handle, + I2C_ANALOGFILTER_ENABLE); + if (ret != 0) { + ERROR("Cannot initialize I2C analog filter (%d)\n", ret); + panic(); + } + + ret = stm32_i2c_is_device_ready(&i2c_handle, (uint16_t)pmic_i2c_addr, 1, + I2C_TIMEOUT); + if (ret != 0) { + ERROR("I2C device not ready (%d)\n", ret); + panic(); + } + + stpmic1_bind_i2c(&i2c_handle, (uint16_t)pmic_i2c_addr); +} + +void initialize_pmic(void) +{ + int status; + uint8_t read_val; + + initialize_pmic_i2c(); + + status = stpmic1_register_read(VERSION_STATUS_REG, &read_val); + if (status != 0) { + panic(); + } + + INFO("PMIC version = 0x%x\n", read_val); + + /* Keep VDD on during the reset cycle */ + status = stpmic1_register_update(MASK_RESET_BUCK_REG, + MASK_RESET_BUCK3, + MASK_RESET_BUCK3); + if (status != 0) { + panic(); + } +} + +int pmic_ddr_power_init(enum ddr_type ddr_type) +{ + bool buck3_at_1v8 = false; + uint8_t read_val; + int status; + + switch (ddr_type) { + case STM32MP_DDR3: + /* Set LDO3 to sync mode */ + status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); + if (status != 0) { + return status; + } + + read_val &= ~STPMIC1_LDO3_MODE; + read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; + read_val |= STPMIC1_LDO3_DDR_SEL << + STPMIC1_LDO12356_OUTPUT_SHIFT; + + status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); + if (status != 0) { + return status; + } + + status = stpmic1_regulator_voltage_set("buck2", 1350); + if (status != 0) { + return status; + } + + status = stpmic1_regulator_enable("buck2"); + if (status != 0) { + return status; + } + + mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); + + status = stpmic1_regulator_enable("vref_ddr"); + if (status != 0) { + return status; + } + + mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); + + status = stpmic1_regulator_enable("ldo3"); + if (status != 0) { + return status; + } + + mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); + break; + + case STM32MP_LPDDR2: + /* + * Set LDO3 to 1.8V + * Set LDO3 to bypass mode if BUCK3 = 1.8V + * Set LDO3 to normal mode if BUCK3 != 1.8V + */ + status = stpmic1_register_read(BUCK3_CONTROL_REG, &read_val); + if (status != 0) { + return status; + } + + if ((read_val & STPMIC1_BUCK3_1V8) == STPMIC1_BUCK3_1V8) { + buck3_at_1v8 = true; + } + + status = stpmic1_register_read(LDO3_CONTROL_REG, &read_val); + if (status != 0) { + return status; + } + + read_val &= ~STPMIC1_LDO3_MODE; + read_val &= ~STPMIC1_LDO12356_OUTPUT_MASK; + read_val |= STPMIC1_LDO3_1800000; + if (buck3_at_1v8) { + read_val |= STPMIC1_LDO3_MODE; + } + + status = stpmic1_register_write(LDO3_CONTROL_REG, read_val); + if (status != 0) { + return status; + } + + status = stpmic1_regulator_voltage_set("buck2", 1200); + if (status != 0) { + return status; + } + + status = stpmic1_regulator_enable("ldo3"); + if (status != 0) { + return status; + } + + mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); + + status = stpmic1_regulator_enable("buck2"); + if (status != 0) { + return status; + } + + mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); + + status = stpmic1_regulator_enable("vref_ddr"); + if (status != 0) { + return status; + } + + mdelay(STPMIC1_DEFAULT_START_UP_DELAY_MS); + break; + + default: + break; + }; + + return 0; +} diff --git a/drivers/st/pmic/stpmic1.c b/drivers/st/pmic/stpmic1.c new file mode 100644 index 0000000..8a9eae1 --- /dev/null +++ b/drivers/st/pmic/stpmic1.c @@ -0,0 +1,600 @@ +/* + * Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include + +#include +#include +#include + +struct regul_struct { + const char *dt_node_name; + const uint16_t *voltage_table; + uint8_t voltage_table_size; + uint8_t control_reg; + uint8_t low_power_reg; +}; + +static struct i2c_handle_s *pmic_i2c_handle; +static uint16_t pmic_i2c_addr; + +/* Voltage tables in mV */ +static const uint16_t buck1_voltage_table[] = { + 600, + 625, + 650, + 675, + 700, + 725, + 750, + 775, + 800, + 825, + 850, + 875, + 900, + 925, + 950, + 975, + 1000, + 1025, + 1050, + 1075, + 1100, + 1125, + 1150, + 1175, + 1200, + 1225, + 1250, + 1275, + 1300, + 1325, + 1350, + 1350, +}; + +static const uint16_t buck2_voltage_table[] = { + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1050, + 1050, + 1100, + 1100, + 1150, + 1150, + 1200, + 1200, + 1250, + 1250, + 1300, + 1300, + 1350, + 1350, + 1400, + 1400, + 1450, + 1450, + 1500, +}; + +static const uint16_t buck3_voltage_table[] = { + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1000, + 1100, + 1100, + 1100, + 1100, + 1200, + 1200, + 1200, + 1200, + 1300, + 1300, + 1300, + 1300, + 1400, + 1400, + 1400, + 1400, + 1500, + 1600, + 1700, + 1800, + 1900, + 2000, + 2100, + 2200, + 2300, + 2400, + 2500, + 2600, + 2700, + 2800, + 2900, + 3000, + 3100, + 3200, + 3300, + 3400, +}; + +static const uint16_t buck4_voltage_table[] = { + 600, + 625, + 650, + 675, + 700, + 725, + 750, + 775, + 800, + 825, + 850, + 875, + 900, + 925, + 950, + 975, + 1000, + 1025, + 1050, + 1075, + 1100, + 1125, + 1150, + 1175, + 1200, + 1225, + 1250, + 1275, + 1300, + 1300, + 1350, + 1350, + 1400, + 1400, + 1450, + 1450, + 1500, + 1600, + 1700, + 1800, + 1900, + 2000, + 2100, + 2200, + 2300, + 2400, + 2500, + 2600, + 2700, + 2800, + 2900, + 3000, + 3100, + 3200, + 3300, + 3400, + 3500, + 3600, + 3700, + 3800, + 3900, +}; + +static const uint16_t ldo1_voltage_table[] = { + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1800, + 1900, + 2000, + 2100, + 2200, + 2300, + 2400, + 2500, + 2600, + 2700, + 2800, + 2900, + 3000, + 3100, + 3200, + 3300, +}; + +static const uint16_t ldo2_voltage_table[] = { + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1800, + 1900, + 2000, + 2100, + 2200, + 2300, + 2400, + 2500, + 2600, + 2700, + 2800, + 2900, + 3000, + 3100, + 3200, + 3300, +}; + +static const uint16_t ldo3_voltage_table[] = { + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1800, + 1900, + 2000, + 2100, + 2200, + 2300, + 2400, + 2500, + 2600, + 2700, + 2800, + 2900, + 3000, + 3100, + 3200, + 3300, + 3300, + 3300, + 3300, + 3300, + 3300, + 3300, + 0xFFFF, /* VREFDDR */ +}; + +static const uint16_t ldo5_voltage_table[] = { + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1700, + 1800, + 1900, + 2000, + 2100, + 2200, + 2300, + 2400, + 2500, + 2600, + 2700, + 2800, + 2900, + 3000, + 3100, + 3200, + 3300, + 3400, + 3500, + 3600, + 3700, + 3800, + 3900, +}; + +static const uint16_t ldo6_voltage_table[] = { + 900, + 1000, + 1100, + 1200, + 1300, + 1400, + 1500, + 1600, + 1700, + 1800, + 1900, + 2000, + 2100, + 2200, + 2300, + 2400, + 2500, + 2600, + 2700, + 2800, + 2900, + 3000, + 3100, + 3200, + 3300, +}; + +static const uint16_t ldo4_voltage_table[] = { + 3300, +}; + +static const uint16_t vref_ddr_voltage_table[] = { + 3300, +}; + +/* Table of Regulators in PMIC SoC */ +static const struct regul_struct regulators_table[] = { + { + .dt_node_name = "buck1", + .voltage_table = buck1_voltage_table, + .voltage_table_size = ARRAY_SIZE(buck1_voltage_table), + .control_reg = BUCK1_CONTROL_REG, + .low_power_reg = BUCK1_PWRCTRL_REG, + }, + { + .dt_node_name = "buck2", + .voltage_table = buck2_voltage_table, + .voltage_table_size = ARRAY_SIZE(buck2_voltage_table), + .control_reg = BUCK2_CONTROL_REG, + .low_power_reg = BUCK2_PWRCTRL_REG, + }, + { + .dt_node_name = "buck3", + .voltage_table = buck3_voltage_table, + .voltage_table_size = ARRAY_SIZE(buck3_voltage_table), + .control_reg = BUCK3_CONTROL_REG, + .low_power_reg = BUCK3_PWRCTRL_REG, + }, + { + .dt_node_name = "buck4", + .voltage_table = buck4_voltage_table, + .voltage_table_size = ARRAY_SIZE(buck4_voltage_table), + .control_reg = BUCK4_CONTROL_REG, + .low_power_reg = BUCK4_PWRCTRL_REG, + }, + { + .dt_node_name = "ldo1", + .voltage_table = ldo1_voltage_table, + .voltage_table_size = ARRAY_SIZE(ldo1_voltage_table), + .control_reg = LDO1_CONTROL_REG, + .low_power_reg = LDO1_PWRCTRL_REG, + }, + { + .dt_node_name = "ldo2", + .voltage_table = ldo2_voltage_table, + .voltage_table_size = ARRAY_SIZE(ldo2_voltage_table), + .control_reg = LDO2_CONTROL_REG, + .low_power_reg = LDO2_PWRCTRL_REG, + }, + { + .dt_node_name = "ldo3", + .voltage_table = ldo3_voltage_table, + .voltage_table_size = ARRAY_SIZE(ldo3_voltage_table), + .control_reg = LDO3_CONTROL_REG, + .low_power_reg = LDO3_PWRCTRL_REG, + }, + { + .dt_node_name = "ldo4", + .voltage_table = ldo4_voltage_table, + .voltage_table_size = ARRAY_SIZE(ldo4_voltage_table), + .control_reg = LDO4_CONTROL_REG, + .low_power_reg = LDO4_PWRCTRL_REG, + }, + { + .dt_node_name = "ldo5", + .voltage_table = ldo5_voltage_table, + .voltage_table_size = ARRAY_SIZE(ldo5_voltage_table), + .control_reg = LDO5_CONTROL_REG, + .low_power_reg = LDO5_PWRCTRL_REG, + }, + { + .dt_node_name = "ldo6", + .voltage_table = ldo6_voltage_table, + .voltage_table_size = ARRAY_SIZE(ldo6_voltage_table), + .control_reg = LDO6_CONTROL_REG, + .low_power_reg = LDO6_PWRCTRL_REG, + }, + { + .dt_node_name = "vref_ddr", + .voltage_table = vref_ddr_voltage_table, + .voltage_table_size = ARRAY_SIZE(vref_ddr_voltage_table), + .control_reg = VREF_DDR_CONTROL_REG, + .low_power_reg = VREF_DDR_PWRCTRL_REG, + }, +}; + +#define MAX_REGUL ARRAY_SIZE(regulators_table) + +static const struct regul_struct *get_regulator_data(const char *name) +{ + uint8_t i; + + for (i = 0 ; i < MAX_REGUL ; i++) { + if (strncmp(name, regulators_table[i].dt_node_name, + strlen(regulators_table[i].dt_node_name)) == 0) { + return ®ulators_table[i]; + } + } + + /* Regulator not found */ + panic(); + return NULL; +} + +static uint8_t voltage_to_index(const char *name, uint16_t millivolts) +{ + const struct regul_struct *regul = get_regulator_data(name); + uint8_t i; + + for (i = 0 ; i < regul->voltage_table_size ; i++) { + if (regul->voltage_table[i] == millivolts) { + return i; + } + } + + /* Voltage not found */ + panic(); + + return 0; +} + +int stpmic1_switch_off(void) +{ + return stpmic1_register_update(MAIN_CONTROL_REG, 1, + SOFTWARE_SWITCH_OFF_ENABLED); +} + +int stpmic1_regulator_enable(const char *name) +{ + const struct regul_struct *regul = get_regulator_data(name); + + return stpmic1_register_update(regul->control_reg, BIT(0), BIT(0)); +} + +int stpmic1_regulator_disable(const char *name) +{ + const struct regul_struct *regul = get_regulator_data(name); + + return stpmic1_register_update(regul->control_reg, 0, BIT(0)); +} + +uint8_t stpmic1_is_regulator_enabled(const char *name) +{ + uint8_t val; + const struct regul_struct *regul = get_regulator_data(name); + + if (stpmic1_register_read(regul->control_reg, &val) != 0) { + panic(); + } + + return (val & 0x1U); +} + +int stpmic1_regulator_voltage_set(const char *name, uint16_t millivolts) +{ + uint8_t voltage_index = voltage_to_index(name, millivolts); + const struct regul_struct *regul = get_regulator_data(name); + + return stpmic1_register_update(regul->control_reg, voltage_index << 2, + 0xFC); +} + +int stpmic1_register_read(uint8_t register_id, uint8_t *value) +{ + return stm32_i2c_mem_read(pmic_i2c_handle, pmic_i2c_addr, + (uint16_t)register_id, I2C_MEMADD_SIZE_8BIT, + value, 1, 100000); +} + +int stpmic1_register_write(uint8_t register_id, uint8_t value) +{ + int status; + + status = stm32_i2c_mem_write(pmic_i2c_handle, pmic_i2c_addr, + (uint16_t)register_id, + I2C_MEMADD_SIZE_8BIT, &value, 1, 100000); + + if (status != 0) { + return status; + } + + if ((register_id != WATCHDOG_CONTROL_REG) && (register_id <= 0x40U)) { + uint8_t readval; + + status = stpmic1_register_read(register_id, &readval); + if (status != 0) { + return status; + } + + if (readval != value) { + return -1; + } + } + + return 0; +} + +int stpmic1_register_update(uint8_t register_id, uint8_t value, uint8_t mask) +{ + int status; + uint8_t val; + + status = stpmic1_register_read(register_id, &val); + if (status != 0) { + return status; + } + + /* Clear bits to update */ + val &= ~mask; + + /* Update appropriate bits*/ + val |= (value & mask); + + /* Send new value on I2C Bus */ + return stpmic1_register_write(register_id, val); +} + +void stpmic1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr) +{ + pmic_i2c_handle = i2c_handle; + pmic_i2c_addr = i2c_addr; +} diff --git a/drivers/st/pmic/stpmu1.c b/drivers/st/pmic/stpmu1.c deleted file mode 100644 index 9c36bf6..0000000 --- a/drivers/st/pmic/stpmu1.c +++ /dev/null @@ -1,601 +0,0 @@ -/* - * Copyright (c) 2016-2018, STMicroelectronics - All Rights Reserved - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include - -#include -#include -#include - -struct regul_struct { - const char *dt_node_name; - const uint16_t *voltage_table; - uint8_t voltage_table_size; - uint8_t control_reg; - uint8_t low_power_reg; -}; - -static struct i2c_handle_s *stpmu_i2c_handle; -static uint16_t stpmu_i2c_addr; - -/* Voltage tables in mV */ -static const uint16_t buck1_voltage_table[] = { - 600, - 625, - 650, - 675, - 700, - 725, - 750, - 775, - 800, - 825, - 850, - 875, - 900, - 925, - 950, - 975, - 1000, - 1025, - 1050, - 1075, - 1100, - 1125, - 1150, - 1175, - 1200, - 1225, - 1250, - 1275, - 1300, - 1325, - 1350, - 1350, -}; - -static const uint16_t buck2_voltage_table[] = { - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1050, - 1050, - 1100, - 1100, - 1150, - 1150, - 1200, - 1200, - 1250, - 1250, - 1300, - 1300, - 1350, - 1350, - 1400, - 1400, - 1450, - 1450, - 1500, -}; - -static const uint16_t buck3_voltage_table[] = { - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1000, - 1100, - 1100, - 1100, - 1100, - 1200, - 1200, - 1200, - 1200, - 1300, - 1300, - 1300, - 1300, - 1400, - 1400, - 1400, - 1400, - 1500, - 1600, - 1700, - 1800, - 1900, - 2000, - 2100, - 2200, - 2300, - 2400, - 2500, - 2600, - 2700, - 2800, - 2900, - 3000, - 3100, - 3200, - 3300, - 3400, -}; - -static const uint16_t buck4_voltage_table[] = { - 600, - 625, - 650, - 675, - 700, - 725, - 750, - 775, - 800, - 825, - 850, - 875, - 900, - 925, - 950, - 975, - 1000, - 1025, - 1050, - 1075, - 1100, - 1125, - 1150, - 1175, - 1200, - 1225, - 1250, - 1275, - 1300, - 1300, - 1350, - 1350, - 1400, - 1400, - 1450, - 1450, - 1500, - 1600, - 1700, - 1800, - 1900, - 2000, - 2100, - 2200, - 2300, - 2400, - 2500, - 2600, - 2700, - 2800, - 2900, - 3000, - 3100, - 3200, - 3300, - 3400, - 3500, - 3600, - 3700, - 3800, - 3900, -}; - -static const uint16_t ldo1_voltage_table[] = { - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1800, - 1900, - 2000, - 2100, - 2200, - 2300, - 2400, - 2500, - 2600, - 2700, - 2800, - 2900, - 3000, - 3100, - 3200, - 3300, -}; - -static const uint16_t ldo2_voltage_table[] = { - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1800, - 1900, - 2000, - 2100, - 2200, - 2300, - 2400, - 2500, - 2600, - 2700, - 2800, - 2900, - 3000, - 3100, - 3200, - 3300, -}; - -static const uint16_t ldo3_voltage_table[] = { - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1800, - 1900, - 2000, - 2100, - 2200, - 2300, - 2400, - 2500, - 2600, - 2700, - 2800, - 2900, - 3000, - 3100, - 3200, - 3300, - 3300, - 3300, - 3300, - 3300, - 3300, - 3300, - 0xFFFF, /* VREFDDR */ -}; - -static const uint16_t ldo5_voltage_table[] = { - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1700, - 1800, - 1900, - 2000, - 2100, - 2200, - 2300, - 2400, - 2500, - 2600, - 2700, - 2800, - 2900, - 3000, - 3100, - 3200, - 3300, - 3400, - 3500, - 3600, - 3700, - 3800, - 3900, -}; - -static const uint16_t ldo6_voltage_table[] = { - 900, - 1000, - 1100, - 1200, - 1300, - 1400, - 1500, - 1600, - 1700, - 1800, - 1900, - 2000, - 2100, - 2200, - 2300, - 2400, - 2500, - 2600, - 2700, - 2800, - 2900, - 3000, - 3100, - 3200, - 3300, -}; - -static const uint16_t ldo4_voltage_table[] = { - 3300, -}; - -static const uint16_t vref_ddr_voltage_table[] = { - 3300, -}; - -/* Table of Regulators in PMIC SoC */ -static const struct regul_struct regulators_table[] = { - { - .dt_node_name = "buck1", - .voltage_table = buck1_voltage_table, - .voltage_table_size = ARRAY_SIZE(buck1_voltage_table), - .control_reg = BUCK1_CONTROL_REG, - .low_power_reg = BUCK1_PWRCTRL_REG, - }, - { - .dt_node_name = "buck2", - .voltage_table = buck2_voltage_table, - .voltage_table_size = ARRAY_SIZE(buck2_voltage_table), - .control_reg = BUCK2_CONTROL_REG, - .low_power_reg = BUCK2_PWRCTRL_REG, - }, - { - .dt_node_name = "buck3", - .voltage_table = buck3_voltage_table, - .voltage_table_size = ARRAY_SIZE(buck3_voltage_table), - .control_reg = BUCK3_CONTROL_REG, - .low_power_reg = BUCK3_PWRCTRL_REG, - }, - { - .dt_node_name = "buck4", - .voltage_table = buck4_voltage_table, - .voltage_table_size = ARRAY_SIZE(buck4_voltage_table), - .control_reg = BUCK4_CONTROL_REG, - .low_power_reg = BUCK4_PWRCTRL_REG, - }, - { - .dt_node_name = "ldo1", - .voltage_table = ldo1_voltage_table, - .voltage_table_size = ARRAY_SIZE(ldo1_voltage_table), - .control_reg = LDO1_CONTROL_REG, - .low_power_reg = LDO1_PWRCTRL_REG, - }, - { - .dt_node_name = "ldo2", - .voltage_table = ldo2_voltage_table, - .voltage_table_size = ARRAY_SIZE(ldo2_voltage_table), - .control_reg = LDO2_CONTROL_REG, - .low_power_reg = LDO2_PWRCTRL_REG, - }, - { - .dt_node_name = "ldo3", - .voltage_table = ldo3_voltage_table, - .voltage_table_size = ARRAY_SIZE(ldo3_voltage_table), - .control_reg = LDO3_CONTROL_REG, - .low_power_reg = LDO3_PWRCTRL_REG, - }, - { - .dt_node_name = "ldo4", - .voltage_table = ldo4_voltage_table, - .voltage_table_size = ARRAY_SIZE(ldo4_voltage_table), - .control_reg = LDO4_CONTROL_REG, - .low_power_reg = LDO4_PWRCTRL_REG, - }, - { - .dt_node_name = "ldo5", - .voltage_table = ldo5_voltage_table, - .voltage_table_size = ARRAY_SIZE(ldo5_voltage_table), - .control_reg = LDO5_CONTROL_REG, - .low_power_reg = LDO5_PWRCTRL_REG, - }, - { - .dt_node_name = "ldo6", - .voltage_table = ldo6_voltage_table, - .voltage_table_size = ARRAY_SIZE(ldo6_voltage_table), - .control_reg = LDO6_CONTROL_REG, - .low_power_reg = LDO6_PWRCTRL_REG, - }, - { - .dt_node_name = "vref_ddr", - .voltage_table = vref_ddr_voltage_table, - .voltage_table_size = ARRAY_SIZE(vref_ddr_voltage_table), - .control_reg = VREF_DDR_CONTROL_REG, - .low_power_reg = VREF_DDR_PWRCTRL_REG, - }, -}; - -#define MAX_REGUL ARRAY_SIZE(regulators_table) - -static const struct regul_struct *stpmu1_get_regulator_data(const char *name) -{ - uint8_t i; - - for (i = 0 ; i < MAX_REGUL ; i++) { - if (strncmp(name, regulators_table[i].dt_node_name, - strlen(regulators_table[i].dt_node_name)) == 0) { - return ®ulators_table[i]; - } - } - - /* Regulator not found */ - panic(); - return NULL; -} - -static uint8_t stpmu1_voltage_find_index(const char *name, - uint16_t millivolts) -{ - const struct regul_struct *regul = stpmu1_get_regulator_data(name); - uint8_t i; - - for (i = 0 ; i < regul->voltage_table_size ; i++) { - if (regul->voltage_table[i] == millivolts) { - return i; - } - } - - /* Voltage not found */ - panic(); - - return 0; -} - -int stpmu1_switch_off(void) -{ - return stpmu1_register_update(MAIN_CONTROL_REG, 1, - SOFTWARE_SWITCH_OFF_ENABLED); -} - -int stpmu1_regulator_enable(const char *name) -{ - const struct regul_struct *regul = stpmu1_get_regulator_data(name); - - return stpmu1_register_update(regul->control_reg, BIT(0), BIT(0)); -} - -int stpmu1_regulator_disable(const char *name) -{ - const struct regul_struct *regul = stpmu1_get_regulator_data(name); - - return stpmu1_register_update(regul->control_reg, 0, BIT(0)); -} - -uint8_t stpmu1_is_regulator_enabled(const char *name) -{ - uint8_t val; - const struct regul_struct *regul = stpmu1_get_regulator_data(name); - - if (stpmu1_register_read(regul->control_reg, &val) != 0) { - panic(); - } - - return (val & 0x1U); -} - -int stpmu1_regulator_voltage_set(const char *name, uint16_t millivolts) -{ - uint8_t voltage_index = stpmu1_voltage_find_index(name, millivolts); - const struct regul_struct *regul = stpmu1_get_regulator_data(name); - - return stpmu1_register_update(regul->control_reg, voltage_index << 2, - 0xFC); -} - -int stpmu1_register_read(uint8_t register_id, uint8_t *value) -{ - return stm32_i2c_mem_read(stpmu_i2c_handle, stpmu_i2c_addr, - (uint16_t)register_id, I2C_MEMADD_SIZE_8BIT, - value, 1, 100000); -} - -int stpmu1_register_write(uint8_t register_id, uint8_t value) -{ - int status; - - status = stm32_i2c_mem_write(stpmu_i2c_handle, stpmu_i2c_addr, - (uint16_t)register_id, - I2C_MEMADD_SIZE_8BIT, &value, 1, 100000); - - if (status != 0) { - return status; - } - - if ((register_id != WATCHDOG_CONTROL_REG) && (register_id <= 0x40U)) { - uint8_t readval; - - status = stpmu1_register_read(register_id, &readval); - if (status != 0) { - return status; - } - - if (readval != value) { - return -1; - } - } - - return 0; -} - -int stpmu1_register_update(uint8_t register_id, uint8_t value, uint8_t mask) -{ - int status; - uint8_t val; - - status = stpmu1_register_read(register_id, &val); - if (status != 0) { - return status; - } - - /* Clear bits to update */ - val &= ~mask; - - /* Update appropriate bits*/ - val |= (value & mask); - - /* Send new value on I2C Bus */ - return stpmu1_register_write(register_id, val); -} - -void stpmu1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr) -{ - stpmu_i2c_handle = i2c_handle; - stpmu_i2c_addr = i2c_addr; -} diff --git a/fdts/stm32mp157c-ed1.dts b/fdts/stm32mp157c-ed1.dts index e3dabe8..0c00b13 100644 --- a/fdts/stm32mp157c-ed1.dts +++ b/fdts/stm32mp157c-ed1.dts @@ -26,8 +26,8 @@ i2c-scl-falling-time-ns = <20>; status = "okay"; - pmic: stpmu1@33 { - compatible = "st,stpmu1"; + pmic: stpmic@33 { + compatible = "st,stpmic1"; reg = <0x33>; status = "okay"; @@ -36,7 +36,7 @@ st,usb_control_register = <0x30>; regulators { - compatible = "st,stpmu1-regulators"; + compatible = "st,stpmic1-regulators"; v3v3: buck4 { regulator-name = "v3v3"; diff --git a/include/drivers/st/stm32mp1_pmic.h b/include/drivers/st/stm32mp1_pmic.h deleted file mode 100644 index 75f8e61..0000000 --- a/include/drivers/st/stm32mp1_pmic.h +++ /dev/null @@ -1,20 +0,0 @@ -/* - * Copyright (c) 2017-2018, STMicroelectronics - All Rights Reserved - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef STM32MP1_PMIC_H -#define STM32MP1_PMIC_H - -#include - -#include - -bool dt_check_pmic(void); -int dt_pmic_enable_boot_on_regulators(void); -void initialize_pmic_i2c(void); -void initialize_pmic(void); -int pmic_ddr_power_init(enum ddr_type ddr_type); - -#endif /* STM32MP1_PMIC_H */ diff --git a/include/drivers/st/stm32mp_pmic.h b/include/drivers/st/stm32mp_pmic.h new file mode 100644 index 0000000..700039b --- /dev/null +++ b/include/drivers/st/stm32mp_pmic.h @@ -0,0 +1,20 @@ +/* + * Copyright (c) 2017-2019, STMicroelectronics - All Rights Reserved + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef STM32MP_PMIC_H +#define STM32MP_PMIC_H + +#include + +#include + +bool dt_check_pmic(void); +int dt_pmic_enable_boot_on_regulators(void); +void initialize_pmic_i2c(void); +void initialize_pmic(void); +int pmic_ddr_power_init(enum ddr_type ddr_type); + +#endif /* STM32MP_PMIC_H */ diff --git a/include/drivers/st/stpmic1.h b/include/drivers/st/stpmic1.h new file mode 100644 index 0000000..7149cb5 --- /dev/null +++ b/include/drivers/st/stpmic1.h @@ -0,0 +1,140 @@ +/* + * Copyright (c) 2016-2019, STMicroelectronics - All Rights Reserved + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef STPMIC1_H +#define STPMIC1_H + +#include +#include + +#define TURN_ON_REG 0x1U +#define TURN_OFF_REG 0x2U +#define ICC_LDO_TURN_OFF_REG 0x3U +#define ICC_BUCK_TURN_OFF_REG 0x4U +#define RESET_STATUS_REG 0x5U +#define VERSION_STATUS_REG 0x6U +#define MAIN_CONTROL_REG 0x10U +#define PADS_PULL_REG 0x11U +#define BUCK_PULL_DOWN_REG 0x12U +#define LDO14_PULL_DOWN_REG 0x13U +#define LDO56_PULL_DOWN_REG 0x14U +#define VIN_CONTROL_REG 0x15U +#define PONKEY_TIMER_REG 0x16U +#define MASK_RANK_BUCK_REG 0x17U +#define MASK_RESET_BUCK_REG 0x18U +#define MASK_RANK_LDO_REG 0x19U +#define MASK_RESET_LDO_REG 0x1AU +#define WATCHDOG_CONTROL_REG 0x1BU +#define WATCHDOG_TIMER_REG 0x1CU +#define BUCK_ICC_TURNOFF_REG 0x1DU +#define LDO_ICC_TURNOFF_REG 0x1EU +#define BUCK_APM_CONTROL_REG 0x1FU +#define BUCK1_CONTROL_REG 0x20U +#define BUCK2_CONTROL_REG 0x21U +#define BUCK3_CONTROL_REG 0x22U +#define BUCK4_CONTROL_REG 0x23U +#define VREF_DDR_CONTROL_REG 0x24U +#define LDO1_CONTROL_REG 0x25U +#define LDO2_CONTROL_REG 0x26U +#define LDO3_CONTROL_REG 0x27U +#define LDO4_CONTROL_REG 0x28U +#define LDO5_CONTROL_REG 0x29U +#define LDO6_CONTROL_REG 0x2AU +#define BUCK1_PWRCTRL_REG 0x30U +#define BUCK2_PWRCTRL_REG 0x31U +#define BUCK3_PWRCTRL_REG 0x32U +#define BUCK4_PWRCTRL_REG 0x33U +#define VREF_DDR_PWRCTRL_REG 0x34U +#define LDO1_PWRCTRL_REG 0x35U +#define LDO2_PWRCTRL_REG 0x36U +#define LDO3_PWRCTRL_REG 0x37U +#define LDO4_PWRCTRL_REG 0x38U +#define LDO5_PWRCTRL_REG 0x39U +#define LDO6_PWRCTRL_REG 0x3AU +#define FREQUENCY_SPREADING_REG 0x3BU +#define USB_CONTROL_REG 0x40U +#define ITLATCH1_REG 0x50U +#define ITLATCH2_REG 0x51U +#define ITLATCH3_REG 0x52U +#define ITLATCH4_REG 0x53U +#define ITSETLATCH1_REG 0x60U +#define ITSETLATCH2_REG 0x61U +#define ITSETLATCH3_REG 0x62U +#define ITSETLATCH4_REG 0x63U +#define ITCLEARLATCH1_REG 0x70U +#define ITCLEARLATCH2_REG 0x71U +#define ITCLEARLATCH3_REG 0x72U +#define ITCLEARLATCH4_REG 0x73U +#define ITMASK1_REG 0x80U +#define ITMASK2_REG 0x81U +#define ITMASK3_REG 0x82U +#define ITMASK4_REG 0x83U +#define ITSETMASK1_REG 0x90U +#define ITSETMASK2_REG 0x91U +#define ITSETMASK3_REG 0x92U +#define ITSETMASK4_REG 0x93U +#define ITCLEARMASK1_REG 0xA0U +#define ITCLEARMASK2_REG 0xA1U +#define ITCLEARMASK3_REG 0xA2U +#define ITCLEARMASK4_REG 0xA3U +#define ITSOURCE1_REG 0xB0U +#define ITSOURCE2_REG 0xB1U +#define ITSOURCE3_REG 0xB2U +#define ITSOURCE4_REG 0xB3U +#define LDO_VOLTAGE_MASK 0x7CU +#define BUCK_VOLTAGE_MASK 0xFCU +#define LDO_BUCK_VOLTAGE_SHIFT 2 +#define LDO_ENABLE_MASK 0x01U +#define BUCK_ENABLE_MASK 0x01U +#define BUCK_HPLP_ENABLE_MASK 0x02U +#define LDO_HPLP_ENABLE_MASK 0x02U +#define LDO_BUCK_HPLP_SHIFT 1 +#define LDO_BUCK_RANK_MASK 0x01U +#define LDO_BUCK_RESET_MASK 0x01U +#define LDO_BUCK_PULL_DOWN_MASK 0x03U + +/* Main PMIC Control Register (MAIN_CONTROL_REG) */ +#define ICC_EVENT_ENABLED BIT(4) +#define PWRCTRL_POLARITY_HIGH BIT(3) +#define PWRCTRL_PIN_VALID BIT(2) +#define RESTART_REQUEST_ENABLED BIT(1) +#define SOFTWARE_SWITCH_OFF_ENABLED BIT(0) + +/* Main PMIC PADS Control Register (PADS_PULL_REG) */ +#define WAKEUP_DETECTOR_DISABLED BIT(4) +#define PWRCTRL_PD_ACTIVE BIT(3) +#define PWRCTRL_PU_ACTIVE BIT(2) +#define WAKEUP_PD_ACTIVE BIT(1) +#define PONKEY_PU_ACTIVE BIT(0) + +/* Main PMIC VINLOW Control Register (VIN_CONTROL_REGC DMSC) */ +#define SWIN_DETECTOR_ENABLED BIT(7) +#define SWOUT_DETECTOR_ENABLED BIT(6) +#define VINLOW_HYST_MASK 0x3 +#define VINLOW_HYST_SHIFT 4 +#define VINLOW_THRESHOLD_MASK 0x7 +#define VINLOW_THRESHOLD_SHIFT 1 +#define VINLOW_ENABLED 0x01 +#define VINLOW_CTRL_REG_MASK 0xFF + +/* USB Control Register */ +#define BOOST_OVP_DISABLED BIT(7) +#define VBUS_OTG_DETECTION_DISABLED BIT(6) +#define OCP_LIMIT_HIGH BIT(3) +#define SWIN_SWOUT_ENABLED BIT(2) +#define USBSW_OTG_SWITCH_ENABLED BIT(1) + +int stpmic1_switch_off(void); +int stpmic1_register_read(uint8_t register_id, uint8_t *value); +int stpmic1_register_write(uint8_t register_id, uint8_t value); +int stpmic1_register_update(uint8_t register_id, uint8_t value, uint8_t mask); +int stpmic1_regulator_enable(const char *name); +int stpmic1_regulator_disable(const char *name); +uint8_t stpmic1_is_regulator_enabled(const char *name); +int stpmic1_regulator_voltage_set(const char *name, uint16_t millivolts); +void stpmic1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr); + +#endif /* STPMIC1_H */ diff --git a/include/drivers/st/stpmu1.h b/include/drivers/st/stpmu1.h deleted file mode 100644 index e75d9a6..0000000 --- a/include/drivers/st/stpmu1.h +++ /dev/null @@ -1,140 +0,0 @@ -/* - * Copyright (c) 2016-2018, STMicroelectronics - All Rights Reserved - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef STPMU1_H -#define STPMU1_H - -#include -#include - -#define TURN_ON_REG 0x1U -#define TURN_OFF_REG 0x2U -#define ICC_LDO_TURN_OFF_REG 0x3U -#define ICC_BUCK_TURN_OFF_REG 0x4U -#define RESET_STATUS_REG 0x5U -#define VERSION_STATUS_REG 0x6U -#define MAIN_CONTROL_REG 0x10U -#define PADS_PULL_REG 0x11U -#define BUCK_PULL_DOWN_REG 0x12U -#define LDO14_PULL_DOWN_REG 0x13U -#define LDO56_PULL_DOWN_REG 0x14U -#define VIN_CONTROL_REG 0x15U -#define PONKEY_TIMER_REG 0x16U -#define MASK_RANK_BUCK_REG 0x17U -#define MASK_RESET_BUCK_REG 0x18U -#define MASK_RANK_LDO_REG 0x19U -#define MASK_RESET_LDO_REG 0x1AU -#define WATCHDOG_CONTROL_REG 0x1BU -#define WATCHDOG_TIMER_REG 0x1CU -#define BUCK_ICC_TURNOFF_REG 0x1DU -#define LDO_ICC_TURNOFF_REG 0x1EU -#define BUCK_APM_CONTROL_REG 0x1FU -#define BUCK1_CONTROL_REG 0x20U -#define BUCK2_CONTROL_REG 0x21U -#define BUCK3_CONTROL_REG 0x22U -#define BUCK4_CONTROL_REG 0x23U -#define VREF_DDR_CONTROL_REG 0x24U -#define LDO1_CONTROL_REG 0x25U -#define LDO2_CONTROL_REG 0x26U -#define LDO3_CONTROL_REG 0x27U -#define LDO4_CONTROL_REG 0x28U -#define LDO5_CONTROL_REG 0x29U -#define LDO6_CONTROL_REG 0x2AU -#define BUCK1_PWRCTRL_REG 0x30U -#define BUCK2_PWRCTRL_REG 0x31U -#define BUCK3_PWRCTRL_REG 0x32U -#define BUCK4_PWRCTRL_REG 0x33U -#define VREF_DDR_PWRCTRL_REG 0x34U -#define LDO1_PWRCTRL_REG 0x35U -#define LDO2_PWRCTRL_REG 0x36U -#define LDO3_PWRCTRL_REG 0x37U -#define LDO4_PWRCTRL_REG 0x38U -#define LDO5_PWRCTRL_REG 0x39U -#define LDO6_PWRCTRL_REG 0x3AU -#define FREQUENCY_SPREADING_REG 0x3BU -#define USB_CONTROL_REG 0x40U -#define ITLATCH1_REG 0x50U -#define ITLATCH2_REG 0x51U -#define ITLATCH3_REG 0x52U -#define ITLATCH4_REG 0x53U -#define ITSETLATCH1_REG 0x60U -#define ITSETLATCH2_REG 0x61U -#define ITSETLATCH3_REG 0x62U -#define ITSETLATCH4_REG 0x63U -#define ITCLEARLATCH1_REG 0x70U -#define ITCLEARLATCH2_REG 0x71U -#define ITCLEARLATCH3_REG 0x72U -#define ITCLEARLATCH4_REG 0x73U -#define ITMASK1_REG 0x80U -#define ITMASK2_REG 0x81U -#define ITMASK3_REG 0x82U -#define ITMASK4_REG 0x83U -#define ITSETMASK1_REG 0x90U -#define ITSETMASK2_REG 0x91U -#define ITSETMASK3_REG 0x92U -#define ITSETMASK4_REG 0x93U -#define ITCLEARMASK1_REG 0xA0U -#define ITCLEARMASK2_REG 0xA1U -#define ITCLEARMASK3_REG 0xA2U -#define ITCLEARMASK4_REG 0xA3U -#define ITSOURCE1_REG 0xB0U -#define ITSOURCE2_REG 0xB1U -#define ITSOURCE3_REG 0xB2U -#define ITSOURCE4_REG 0xB3U -#define LDO_VOLTAGE_MASK 0x7CU -#define BUCK_VOLTAGE_MASK 0xFCU -#define LDO_BUCK_VOLTAGE_SHIFT 2 -#define LDO_ENABLE_MASK 0x01U -#define BUCK_ENABLE_MASK 0x01U -#define BUCK_HPLP_ENABLE_MASK 0x02U -#define LDO_HPLP_ENABLE_MASK 0x02U -#define LDO_BUCK_HPLP_SHIFT 1 -#define LDO_BUCK_RANK_MASK 0x01U -#define LDO_BUCK_RESET_MASK 0x01U -#define LDO_BUCK_PULL_DOWN_MASK 0x03U - -/* Main PMIC Control Register (MAIN_CONTROL_REG) */ -#define ICC_EVENT_ENABLED BIT(4) -#define PWRCTRL_POLARITY_HIGH BIT(3) -#define PWRCTRL_PIN_VALID BIT(2) -#define RESTART_REQUEST_ENABLED BIT(1) -#define SOFTWARE_SWITCH_OFF_ENABLED BIT(0) - -/* Main PMIC PADS Control Register (PADS_PULL_REG) */ -#define WAKEUP_DETECTOR_DISABLED BIT(4) -#define PWRCTRL_PD_ACTIVE BIT(3) -#define PWRCTRL_PU_ACTIVE BIT(2) -#define WAKEUP_PD_ACTIVE BIT(1) -#define PONKEY_PU_ACTIVE BIT(0) - -/* Main PMIC VINLOW Control Register (VIN_CONTROL_REGC DMSC) */ -#define SWIN_DETECTOR_ENABLED BIT(7) -#define SWOUT_DETECTOR_ENABLED BIT(6) -#define VINLOW_HYST_MASK 0x3 -#define VINLOW_HYST_SHIFT 4 -#define VINLOW_THRESHOLD_MASK 0x7 -#define VINLOW_THRESHOLD_SHIFT 1 -#define VINLOW_ENABLED 0x01 -#define VINLOW_CTRL_REG_MASK 0xFF - -/* USB Control Register */ -#define BOOST_OVP_DISABLED BIT(7) -#define VBUS_OTG_DETECTION_DISABLED BIT(6) -#define OCP_LIMIT_HIGH BIT(3) -#define SWIN_SWOUT_ENABLED BIT(2) -#define USBSW_OTG_SWITCH_ENABLED BIT(1) - -int stpmu1_switch_off(void); -int stpmu1_register_read(uint8_t register_id, uint8_t *value); -int stpmu1_register_write(uint8_t register_id, uint8_t value); -int stpmu1_register_update(uint8_t register_id, uint8_t value, uint8_t mask); -int stpmu1_regulator_enable(const char *name); -int stpmu1_regulator_disable(const char *name); -uint8_t stpmu1_is_regulator_enabled(const char *name); -int stpmu1_regulator_voltage_set(const char *name, uint16_t millivolts); -void stpmu1_bind_i2c(struct i2c_handle_s *i2c_handle, uint16_t i2c_addr); - -#endif /* STPMU1_H */ diff --git a/plat/st/stm32mp1/bl2_plat_setup.c b/plat/st/stm32mp1/bl2_plat_setup.c index 6af65fd..4a41901 100644 --- a/plat/st/stm32mp1/bl2_plat_setup.c +++ b/plat/st/stm32mp1/bl2_plat_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -16,8 +16,8 @@ #include #include #include +#include #include -#include #include #include #include diff --git a/plat/st/stm32mp1/platform.mk b/plat/st/stm32mp1/platform.mk index e9a6af2..22c0c8a 100644 --- a/plat/st/stm32mp1/platform.mk +++ b/plat/st/stm32mp1/platform.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -52,8 +52,8 @@ drivers/st/ddr/stm32mp1_ddr_helpers.c \ drivers/st/gpio/stm32_gpio.c \ drivers/st/i2c/stm32_i2c.c \ - drivers/st/pmic/stm32mp1_pmic.c \ - drivers/st/pmic/stpmu1.c \ + drivers/st/pmic/stm32mp_pmic.c \ + drivers/st/pmic/stpmic1.c \ drivers/st/reset/stm32mp1_reset.c \ plat/st/stm32mp1/stm32mp1_context.c \ plat/st/stm32mp1/stm32mp1_dt.c \