diff --git a/drivers/arm/fvp/fvp_pwrc.c b/drivers/arm/fvp/fvp_pwrc.c new file mode 100644 index 0000000..75a2b66 --- /dev/null +++ b/drivers/arm/fvp/fvp_pwrc.c @@ -0,0 +1,78 @@ +/* + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include +#include +#include +#include +#include + +/* + * TODO: Someday there will be a generic power controller api. At the moment + * each platform has its own pwrc so just exporting functions is fine. + */ +ARM_INSTANTIATE_LOCK; + +unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr) +{ + return PSYSR_WK(fvp_pwrc_read_psysr(mpidr)); +} + +unsigned int fvp_pwrc_read_psysr(u_register_t mpidr) +{ + unsigned int rc; + arm_lock_get(); + mmio_write_32(PWRC_BASE + PSYSR_OFF, (unsigned int) mpidr); + rc = mmio_read_32(PWRC_BASE + PSYSR_OFF); + arm_lock_release(); + return rc; +} + +void fvp_pwrc_write_pponr(u_register_t mpidr) +{ + arm_lock_get(); + mmio_write_32(PWRC_BASE + PPONR_OFF, (unsigned int) mpidr); + arm_lock_release(); +} + +void fvp_pwrc_write_ppoffr(u_register_t mpidr) +{ + arm_lock_get(); + mmio_write_32(PWRC_BASE + PPOFFR_OFF, (unsigned int) mpidr); + arm_lock_release(); +} + +void fvp_pwrc_set_wen(u_register_t mpidr) +{ + arm_lock_get(); + mmio_write_32(PWRC_BASE + PWKUPR_OFF, + (unsigned int) (PWKUPR_WEN | mpidr)); + arm_lock_release(); +} + +void fvp_pwrc_clr_wen(u_register_t mpidr) +{ + arm_lock_get(); + mmio_write_32(PWRC_BASE + PWKUPR_OFF, + (unsigned int) mpidr); + arm_lock_release(); +} + +void fvp_pwrc_write_pcoffr(u_register_t mpidr) +{ + arm_lock_get(); + mmio_write_32(PWRC_BASE + PCOFFR_OFF, (unsigned int) mpidr); + arm_lock_release(); +} + +/* Nothing else to do here apart from initializing the lock */ +void __init plat_arm_pwrc_setup(void) +{ + arm_lock_init(); +} + + + diff --git a/include/drivers/arm/fvp/fvp_pwrc.h b/include/drivers/arm/fvp/fvp_pwrc.h new file mode 100644 index 0000000..ca173f3 --- /dev/null +++ b/include/drivers/arm/fvp/fvp_pwrc.h @@ -0,0 +1,55 @@ +/* + * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef FVP_PWRC_H +#define FVP_PWRC_H + +/* FVP Power controller register offset etc */ +#define PPOFFR_OFF U(0x0) +#define PPONR_OFF U(0x4) +#define PCOFFR_OFF U(0x8) +#define PWKUPR_OFF U(0xc) +#define PSYSR_OFF U(0x10) + +#define PWKUPR_WEN BIT_32(31) + +#define PSYSR_AFF_L2 BIT_32(31) +#define PSYSR_AFF_L1 BIT_32(30) +#define PSYSR_AFF_L0 BIT_32(29) +#define PSYSR_WEN BIT_32(28) +#define PSYSR_PC BIT_32(27) +#define PSYSR_PP BIT_32(26) + +#define PSYSR_WK_SHIFT 24 +#define PSYSR_WK_WIDTH 0x2 +#define PSYSR_WK_MASK ((1U << PSYSR_WK_WIDTH) - 1U) +#define PSYSR_WK(x) ((x) >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK + +#define WKUP_COLD U(0x0) +#define WKUP_RESET U(0x1) +#define WKUP_PPONR U(0x2) +#define WKUP_GICREQ U(0x3) + +#define PSYSR_INVALID U(0xffffffff) + +#ifndef __ASSEMBLY__ + +#include + +/******************************************************************************* + * Function & variable prototypes + ******************************************************************************/ +void fvp_pwrc_write_pcoffr(u_register_t mpidr); +void fvp_pwrc_write_ppoffr(u_register_t mpidr); +void fvp_pwrc_write_pponr(u_register_t mpidr); +void fvp_pwrc_set_wen(u_register_t mpidr); +void fvp_pwrc_clr_wen(u_register_t mpidr); +unsigned int fvp_pwrc_read_psysr(u_register_t mpidr); +unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr); + +#endif /*__ASSEMBLY__*/ + +#endif /* FVP_PWRC_H */ diff --git a/plat/arm/board/fvp/aarch32/fvp_helpers.S b/plat/arm/board/fvp/aarch32/fvp_helpers.S index f689557..9985c1d 100644 --- a/plat/arm/board/fvp/aarch32/fvp_helpers.S +++ b/plat/arm/board/fvp/aarch32/fvp_helpers.S @@ -6,10 +6,9 @@ #include #include +#include #include -#include "../drivers/pwrc/fvp_pwrc.h" - .globl plat_secondary_cold_boot_setup .globl plat_get_my_entrypoint .globl plat_is_my_cpu_primary diff --git a/plat/arm/board/fvp/aarch64/fvp_helpers.S b/plat/arm/board/fvp/aarch64/fvp_helpers.S index 02a3c7c..09f19f6 100644 --- a/plat/arm/board/fvp/aarch64/fvp_helpers.S +++ b/plat/arm/board/fvp/aarch64/fvp_helpers.S @@ -8,10 +8,9 @@ #include #include #include +#include #include -#include "../drivers/pwrc/fvp_pwrc.h" - .globl plat_secondary_cold_boot_setup .globl plat_get_my_entrypoint .globl plat_is_my_cpu_primary diff --git a/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c b/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c deleted file mode 100644 index 9080e22..0000000 --- a/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c +++ /dev/null @@ -1,80 +0,0 @@ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include - -#include "../../fvp_private.h" -#include "fvp_pwrc.h" - -/* - * TODO: Someday there will be a generic power controller api. At the moment - * each platform has its own pwrc so just exporting functions is fine. - */ -ARM_INSTANTIATE_LOCK; - -unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr) -{ - return PSYSR_WK(fvp_pwrc_read_psysr(mpidr)); -} - -unsigned int fvp_pwrc_read_psysr(u_register_t mpidr) -{ - unsigned int rc; - arm_lock_get(); - mmio_write_32(PWRC_BASE + PSYSR_OFF, (unsigned int) mpidr); - rc = mmio_read_32(PWRC_BASE + PSYSR_OFF); - arm_lock_release(); - return rc; -} - -void fvp_pwrc_write_pponr(u_register_t mpidr) -{ - arm_lock_get(); - mmio_write_32(PWRC_BASE + PPONR_OFF, (unsigned int) mpidr); - arm_lock_release(); -} - -void fvp_pwrc_write_ppoffr(u_register_t mpidr) -{ - arm_lock_get(); - mmio_write_32(PWRC_BASE + PPOFFR_OFF, (unsigned int) mpidr); - arm_lock_release(); -} - -void fvp_pwrc_set_wen(u_register_t mpidr) -{ - arm_lock_get(); - mmio_write_32(PWRC_BASE + PWKUPR_OFF, - (unsigned int) (PWKUPR_WEN | mpidr)); - arm_lock_release(); -} - -void fvp_pwrc_clr_wen(u_register_t mpidr) -{ - arm_lock_get(); - mmio_write_32(PWRC_BASE + PWKUPR_OFF, - (unsigned int) mpidr); - arm_lock_release(); -} - -void fvp_pwrc_write_pcoffr(u_register_t mpidr) -{ - arm_lock_get(); - mmio_write_32(PWRC_BASE + PCOFFR_OFF, (unsigned int) mpidr); - arm_lock_release(); -} - -/* Nothing else to do here apart from initializing the lock */ -void __init plat_arm_pwrc_setup(void) -{ - arm_lock_init(); -} - - - diff --git a/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h b/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h deleted file mode 100644 index 324f3e2..0000000 --- a/plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.h +++ /dev/null @@ -1,53 +0,0 @@ -/* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#ifndef FVP_PWRC_H -#define FVP_PWRC_H - -/* FVP Power controller register offset etc */ -#define PPOFFR_OFF U(0x0) -#define PPONR_OFF U(0x4) -#define PCOFFR_OFF U(0x8) -#define PWKUPR_OFF U(0xc) -#define PSYSR_OFF U(0x10) - -#define PWKUPR_WEN BIT_32(31) - -#define PSYSR_AFF_L2 BIT_32(31) -#define PSYSR_AFF_L1 BIT_32(30) -#define PSYSR_AFF_L0 BIT_32(29) -#define PSYSR_WEN BIT_32(28) -#define PSYSR_PC BIT_32(27) -#define PSYSR_PP BIT_32(26) - -#define PSYSR_WK_SHIFT 24 -#define PSYSR_WK_WIDTH 0x2 -#define PSYSR_WK_MASK ((1U << PSYSR_WK_WIDTH) - 1U) -#define PSYSR_WK(x) ((x) >> PSYSR_WK_SHIFT) & PSYSR_WK_MASK - -#define WKUP_COLD U(0x0) -#define WKUP_RESET U(0x1) -#define WKUP_PPONR U(0x2) -#define WKUP_GICREQ U(0x3) - -#define PSYSR_INVALID U(0xffffffff) - -#ifndef __ASSEMBLY__ - -/******************************************************************************* - * Function & variable prototypes - ******************************************************************************/ -void fvp_pwrc_write_pcoffr(u_register_t mpidr); -void fvp_pwrc_write_ppoffr(u_register_t mpidr); -void fvp_pwrc_write_pponr(u_register_t mpidr); -void fvp_pwrc_set_wen(u_register_t mpidr); -void fvp_pwrc_clr_wen(u_register_t mpidr); -unsigned int fvp_pwrc_read_psysr(u_register_t mpidr); -unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr); - -#endif /*__ASSEMBLY__*/ - -#endif /* FVP_PWRC_H */ diff --git a/plat/arm/board/fvp/fvp_pm.c b/plat/arm/board/fvp/fvp_pm.c index a51fa17..ecf0b01 100644 --- a/plat/arm/board/fvp/fvp_pm.c +++ b/plat/arm/board/fvp/fvp_pm.c @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -18,7 +19,6 @@ #include #include -#include "drivers/pwrc/fvp_pwrc.h" #include "fvp_private.h" diff --git a/plat/arm/board/fvp/fvp_topology.c b/plat/arm/board/fvp/fvp_topology.c index 5e066ea..9823fb3 100644 --- a/plat/arm/board/fvp/fvp_topology.c +++ b/plat/arm/board/fvp/fvp_topology.c @@ -7,13 +7,12 @@ #include #include +#include #include #include #include #include -#include "drivers/pwrc/fvp_pwrc.h" - /* The FVP power domain tree descriptor */ static unsigned char fvp_power_domain_tree_desc[FVP_CLUSTER_COUNT + 2]; diff --git a/plat/arm/board/fvp/platform.mk b/plat/arm/board/fvp/platform.mk index a174214..f79ac46 100644 --- a/plat/arm/board/fvp/platform.mk +++ b/plat/arm/board/fvp/platform.mk @@ -146,14 +146,14 @@ BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ ${FVP_SECURITY_SOURCES} -BL31_SOURCES += drivers/arm/smmu/smmu_v3.c \ +BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ + drivers/arm/smmu/smmu_v3.c \ drivers/cfi/v2m/v2m_flash.c \ lib/utils/mem_region.c \ plat/arm/board/fvp/fvp_bl31_setup.c \ plat/arm/board/fvp/fvp_pm.c \ plat/arm/board/fvp/fvp_topology.c \ plat/arm/board/fvp/aarch64/fvp_helpers.S \ - plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c \ plat/arm/common/arm_nor_psci_mem_protect.c \ ${FVP_CPU_LIBS} \ ${FVP_GIC_SOURCES} \ diff --git a/plat/arm/board/fvp/sp_min/sp_min-fvp.mk b/plat/arm/board/fvp/sp_min/sp_min-fvp.mk index 8b17c9b..0250a5f 100644 --- a/plat/arm/board/fvp/sp_min/sp_min-fvp.mk +++ b/plat/arm/board/fvp/sp_min/sp_min-fvp.mk @@ -5,10 +5,10 @@ # # SP_MIN source files specific to FVP platform -BL32_SOURCES += drivers/cfi/v2m/v2m_flash.c \ +BL32_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ + drivers/cfi/v2m/v2m_flash.c \ lib/utils/mem_region.c \ plat/arm/board/fvp/aarch32/fvp_helpers.S \ - plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c \ plat/arm/board/fvp/fvp_pm.c \ plat/arm/board/fvp/fvp_topology.c \ plat/arm/board/fvp/sp_min/fvp_sp_min_setup.c \ diff --git a/plat/arm/board/fvp/tsp/tsp-fvp.mk b/plat/arm/board/fvp/tsp/tsp-fvp.mk index 861fe72..ab3f225 100644 --- a/plat/arm/board/fvp/tsp/tsp-fvp.mk +++ b/plat/arm/board/fvp/tsp/tsp-fvp.mk @@ -5,8 +5,8 @@ # # TSP source files specific to FVP platform -BL32_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S \ - plat/arm/board/fvp/drivers/pwrc/fvp_pwrc.c \ +BL32_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ + plat/arm/board/fvp/aarch64/fvp_helpers.S \ plat/arm/board/fvp/fvp_topology.c \ plat/arm/board/fvp/tsp/fvp_tsp_setup.c \ ${FVP_GIC_SOURCES}