diff --git a/docs/user-guide.rst b/docs/user-guide.rst index a8bd40c..103f1c7 100644 --- a/docs/user-guide.rst +++ b/docs/user-guide.rst @@ -1875,16 +1875,16 @@ -C cluster0.NUM_CORES=4 \ -C cluster1.NUM_CORES=4 \ -C cache_state_modelled=1 \ - -C cluster0.cpu0.RVBAR=0x04020000 \ - -C cluster0.cpu1.RVBAR=0x04020000 \ - -C cluster0.cpu2.RVBAR=0x04020000 \ - -C cluster0.cpu3.RVBAR=0x04020000 \ - -C cluster1.cpu0.RVBAR=0x04020000 \ - -C cluster1.cpu1.RVBAR=0x04020000 \ - -C cluster1.cpu2.RVBAR=0x04020000 \ - -C cluster1.cpu3.RVBAR=0x04020000 \ - --data cluster0.cpu0="/"@0x04020000 \ - --data cluster0.cpu0="/"@0x04001000 \ + -C cluster0.cpu0.RVBAR=0x04010000 \ + -C cluster0.cpu1.RVBAR=0x04010000 \ + -C cluster0.cpu2.RVBAR=0x04010000 \ + -C cluster0.cpu3.RVBAR=0x04010000 \ + -C cluster1.cpu0.RVBAR=0x04010000 \ + -C cluster1.cpu1.RVBAR=0x04010000 \ + -C cluster1.cpu2.RVBAR=0x04010000 \ + -C cluster1.cpu3.RVBAR=0x04010000 \ + --data cluster0.cpu0="/"@0x04010000 \ + --data cluster0.cpu0="/"@0xff000000 \ --data cluster0.cpu0="/"@0x88000000 \ --data cluster0.cpu0="/"@0x82000000 \ --data cluster0.cpu0="/"@0x80080000 \ @@ -1892,6 +1892,9 @@ Notes: +- Since Position Independent Executable (PIE) support is enabled for BL31 + in this config, it can be loaded at any valid address for execution. + - Since a FIP is not loaded when using BL31 as reset entrypoint, the ``--data=""@`` parameter is needed to load the individual bootloader images in memory. @@ -1932,14 +1935,14 @@ -C cluster1.cpu1.CONFIG64=0 \ -C cluster1.cpu2.CONFIG64=0 \ -C cluster1.cpu3.CONFIG64=0 \ - -C cluster0.cpu0.RVBAR=0x04001000 \ - -C cluster0.cpu1.RVBAR=0x04001000 \ - -C cluster0.cpu2.RVBAR=0x04001000 \ - -C cluster0.cpu3.RVBAR=0x04001000 \ - -C cluster1.cpu0.RVBAR=0x04001000 \ - -C cluster1.cpu1.RVBAR=0x04001000 \ - -C cluster1.cpu2.RVBAR=0x04001000 \ - -C cluster1.cpu3.RVBAR=0x04001000 \ + -C cluster0.cpu0.RVBAR=0x04002000 \ + -C cluster0.cpu1.RVBAR=0x04002000 \ + -C cluster0.cpu2.RVBAR=0x04002000 \ + -C cluster0.cpu3.RVBAR=0x04002000 \ + -C cluster1.cpu0.RVBAR=0x04002000 \ + -C cluster1.cpu1.RVBAR=0x04002000 \ + -C cluster1.cpu2.RVBAR=0x04002000 \ + -C cluster1.cpu3.RVBAR=0x04002000 \ --data cluster0.cpu0="/"@0x04002000 \ --data cluster0.cpu0="/"@0x88000000 \ --data cluster0.cpu0="/"@0x82000000 \ @@ -1962,16 +1965,16 @@ -C bp.secure_memory=1 \ -C bp.tzc_400.diagnostics=1 \ -C cache_state_modelled=1 \ - -C cluster0.cpu0.RVBARADDR=0x04020000 \ - -C cluster0.cpu1.RVBARADDR=0x04020000 \ - -C cluster0.cpu2.RVBARADDR=0x04020000 \ - -C cluster0.cpu3.RVBARADDR=0x04020000 \ - -C cluster1.cpu0.RVBARADDR=0x04020000 \ - -C cluster1.cpu1.RVBARADDR=0x04020000 \ - -C cluster1.cpu2.RVBARADDR=0x04020000 \ - -C cluster1.cpu3.RVBARADDR=0x04020000 \ - --data cluster0.cpu0="/"@0x04020000 \ - --data cluster0.cpu0="/"@0x04002000 \ + -C cluster0.cpu0.RVBARADDR=0x04010000 \ + -C cluster0.cpu1.RVBARADDR=0x04010000 \ + -C cluster0.cpu2.RVBARADDR=0x04010000 \ + -C cluster0.cpu3.RVBARADDR=0x04010000 \ + -C cluster1.cpu0.RVBARADDR=0x04010000 \ + -C cluster1.cpu1.RVBARADDR=0x04010000 \ + -C cluster1.cpu2.RVBARADDR=0x04010000 \ + -C cluster1.cpu3.RVBARADDR=0x04010000 \ + --data cluster0.cpu0="/"@0x04010000 \ + --data cluster0.cpu0="/"@0xff000000 \ --data cluster0.cpu0="/"@0x88000000 \ --data cluster0.cpu0="/"@0x82000000 \ --data cluster0.cpu0="/"@0x80080000 \ @@ -1990,10 +1993,10 @@ -C bp.secure_memory=1 \ -C bp.tzc_400.diagnostics=1 \ -C cache_state_modelled=1 \ - -C cluster0.cpu0.RVBARADDR=0x04001000 \ - -C cluster0.cpu1.RVBARADDR=0x04001000 \ - -C cluster0.cpu2.RVBARADDR=0x04001000 \ - -C cluster0.cpu3.RVBARADDR=0x04001000 \ + -C cluster0.cpu0.RVBARADDR=0x04002000 \ + -C cluster0.cpu1.RVBARADDR=0x04002000 \ + -C cluster0.cpu2.RVBARADDR=0x04002000 \ + -C cluster0.cpu3.RVBARADDR=0x04002000 \ --data cluster0.cpu0="/"@0x04002000 \ --data cluster0.cpu0="/"@0x88000000 \ --data cluster0.cpu0="/"@0x82000000 \