diff --git a/plat/fvp/aarch64/bl1_plat_helpers.S b/plat/fvp/aarch64/bl1_plat_helpers.S
index e3cf5c8..c487f03 100644
--- a/plat/fvp/aarch64/bl1_plat_helpers.S
+++ b/plat/fvp/aarch64/bl1_plat_helpers.S
@@ -67,22 +67,6 @@
 	mov	x20, x0
 
 	/* ---------------------------------------------
-	 * Mark this cpu as being present. This is a
-	 * SO write. This array will be read using
-	 * normal memory so invalidate any prefetched
-	 * stale copies first.
-	 * ---------------------------------------------
-	 */
-	ldr	x1, =TZDRAM_BASE
-	mov	x0, #AFFMAP_OFF
-	add	x1, x0, x1
-	mov	x2, #PLATFORM_CACHE_LINE_SIZE
-	mul	x2, x2, x20
-	add	x0, x1, x2
-	bl	dcivac
-	str	x19, [x1, x2]
-
-	/* ---------------------------------------------
 	 * Power down this cpu.
 	 * TODO: Do we need to worry about powering the
 	 * cluster down as well here. That will need
@@ -207,25 +191,6 @@
 	bl	platform_set_coherent_stack
 
 	/* ---------------------------------------------
-	 * Mark this cpu as being present. This is a
-	 * SO write. Invalidate any stale copies out of
-	 * paranoia as there is no one else around.
-	 * ---------------------------------------------
-	 */
-	mov	x0, x19
-	bl	platform_get_core_pos
-	mov	x21, x0
-
-	ldr	x1, =TZDRAM_BASE
-	mov	x0, #AFFMAP_OFF
-	add	x1, x0, x1
-	mov	x2, #PLATFORM_CACHE_LINE_SIZE
-	mul	x2, x2, x21
-	add	x0, x1, x2
-	bl	dcivac
-	str	x19, [x1, x2]
-
-	/* ---------------------------------------------
 	 * Architectural init. can be generic e.g.
 	 * enabling stack alignment and platform spec-
 	 * ific e.g. MMU & page table setup as per the
diff --git a/plat/fvp/platform.h b/plat/fvp/platform.h
index 6b915a8..53f14aa 100644
--- a/plat/fvp/platform.h
+++ b/plat/fvp/platform.h
@@ -127,7 +127,6 @@
 #define TZDRAM_BASE		0x06000000
 #define TZDRAM_SIZE		0x02000000
 #define MBOX_OFF		0x1000
-#define AFFMAP_OFF		0x1200
 
 #define DRAM_BASE              0x80000000ull
 #define DRAM_SIZE              0x80000000ull