diff --git a/bl31/ehf.c b/bl31/ehf.c index 8673564..3d6d674 100644 --- a/bl31/ehf.c +++ b/bl31/ehf.c @@ -18,6 +18,7 @@ #include #include #include +#include /* Output EHF logs as verbose */ #define EHF_LOG(...) VERBOSE("EHF: " __VA_ARGS__) @@ -26,43 +27,44 @@ /* For a valid handler, return the actual function pointer; otherwise, 0. */ #define RAW_HANDLER(h) \ - ((ehf_handler_t) ((h & _EHF_PRI_VALID) ? (h & ~_EHF_PRI_VALID) : 0)) + ((ehf_handler_t) ((((h) & EHF_PRI_VALID_) != 0U) ? \ + ((h) & ~EHF_PRI_VALID_) : 0U)) -#define PRI_BIT(idx) (((ehf_pri_bits_t) 1) << idx) +#define PRI_BIT(idx) (((ehf_pri_bits_t) 1u) << (idx)) /* * Convert index into secure priority using the platform-defined priority bits * field. */ #define IDX_TO_PRI(idx) \ - ((idx << (7 - exception_data.pri_bits)) & 0x7f) + ((((unsigned) idx) << (7u - exception_data.pri_bits)) & 0x7fU) /* Check whether a given index is valid */ #define IS_IDX_VALID(idx) \ - ((exception_data.ehf_priorities[idx].ehf_handler & _EHF_PRI_VALID) != 0) + ((exception_data.ehf_priorities[idx].ehf_handler & EHF_PRI_VALID_) != 0U) /* Returns whether given priority is in secure priority range */ -#define IS_PRI_SECURE(pri) ((pri & 0x80) == 0) +#define IS_PRI_SECURE(pri) (((pri) & 0x80U) == 0U) /* To be defined by the platform */ extern const ehf_priorities_t exception_data; /* Translate priority to the index in the priority array */ -static int pri_to_idx(unsigned int priority) +static unsigned int pri_to_idx(unsigned int priority) { - int idx; + unsigned int idx; idx = EHF_PRI_TO_IDX(priority, exception_data.pri_bits); - assert((idx >= 0) && (idx < exception_data.num_priorities)); + assert(idx < exception_data.num_priorities); assert(IS_IDX_VALID(idx)); return idx; } /* Return whether there are outstanding priority activation */ -static int has_valid_pri_activations(pe_exc_data_t *pe_data) +static bool has_valid_pri_activations(pe_exc_data_t *pe_data) { - return pe_data->active_pri_bits != 0; + return pe_data->active_pri_bits != 0U; } static pe_exc_data_t *this_cpu_data(void) @@ -80,7 +82,7 @@ return EHF_INVALID_IDX; /* Current priority is the right-most bit */ - return __builtin_ctz(pe_data->active_pri_bits); + return (int) __builtin_ctz(pe_data->active_pri_bits); } /* @@ -95,8 +97,8 @@ */ void ehf_activate_priority(unsigned int priority) { - int idx, cur_pri_idx; - unsigned int old_mask, run_pri; + int cur_pri_idx; + unsigned int old_mask, run_pri, idx; pe_exc_data_t *pe_data = this_cpu_data(); /* @@ -118,7 +120,8 @@ */ cur_pri_idx = get_pe_highest_active_idx(pe_data); idx = pri_to_idx(priority); - if ((cur_pri_idx != EHF_INVALID_IDX) && (idx >= cur_pri_idx)) { + if ((cur_pri_idx != EHF_INVALID_IDX) && + (idx >= ((unsigned int) cur_pri_idx))) { ERROR("Activation priority mismatch: req=0x%x current=0x%x\n", priority, IDX_TO_PRI(cur_pri_idx)); panic(); @@ -144,7 +147,7 @@ * restored after the last deactivation. */ if (cur_pri_idx == EHF_INVALID_IDX) - pe_data->init_pri_mask = old_mask; + pe_data->init_pri_mask = (uint8_t) old_mask; EHF_LOG("activate prio=%d\n", get_pe_highest_active_idx(pe_data)); } @@ -161,9 +164,9 @@ */ void ehf_deactivate_priority(unsigned int priority) { - int idx, cur_pri_idx; + int cur_pri_idx; pe_exc_data_t *pe_data = this_cpu_data(); - unsigned int old_mask, run_pri; + unsigned int old_mask, run_pri, idx; /* * Query interrupt controller for the running priority, or idle priority @@ -184,21 +187,22 @@ */ cur_pri_idx = get_pe_highest_active_idx(pe_data); idx = pri_to_idx(priority); - if ((cur_pri_idx == EHF_INVALID_IDX) || (idx != cur_pri_idx)) { + if ((cur_pri_idx == EHF_INVALID_IDX) || + (idx != ((unsigned int) cur_pri_idx))) { ERROR("Deactivation priority mismatch: req=0x%x current=0x%x\n", priority, IDX_TO_PRI(cur_pri_idx)); panic(); } /* Clear bit corresponding to highest priority */ - pe_data->active_pri_bits &= (pe_data->active_pri_bits - 1); + pe_data->active_pri_bits &= (pe_data->active_pri_bits - 1u); /* * Restore priority mask corresponding to the next priority, or the * one stashed earlier if there are no more to deactivate. */ - idx = get_pe_highest_active_idx(pe_data); - if (idx == EHF_INVALID_IDX) + cur_pri_idx = get_pe_highest_active_idx(pe_data); + if (cur_pri_idx == EHF_INVALID_IDX) old_mask = plat_ic_set_priority_mask(pe_data->init_pri_mask); else old_mask = plat_ic_set_priority_mask(priority); @@ -231,16 +235,16 @@ /* If the running priority is in the secure range, do nothing */ run_pri = plat_ic_get_running_priority(); if (IS_PRI_SECURE(run_pri)) - return 0; + return NULL; /* Do nothing if there are explicit activations */ if (has_valid_pri_activations(pe_data)) - return 0; + return NULL; - assert(pe_data->ns_pri_mask == 0); + assert(pe_data->ns_pri_mask == 0u); pe_data->ns_pri_mask = - plat_ic_set_priority_mask(GIC_HIGHEST_NS_PRIORITY); + (uint8_t) plat_ic_set_priority_mask(GIC_HIGHEST_NS_PRIORITY); /* The previous Priority Mask is not expected to be in secure range */ if (IS_PRI_SECURE(pe_data->ns_pri_mask)) { @@ -252,7 +256,7 @@ EHF_LOG("Priority Mask: 0x%x => 0x%x\n", pe_data->ns_pri_mask, GIC_HIGHEST_NS_PRIORITY); - return 0; + return NULL; } /* @@ -274,18 +278,18 @@ /* If the running priority is in the secure range, do nothing */ run_pri = plat_ic_get_running_priority(); if (IS_PRI_SECURE(run_pri)) - return 0; + return NULL; /* * If there are explicit activations, do nothing. The Priority Mask will * be restored upon the last deactivation. */ if (has_valid_pri_activations(pe_data)) - return 0; + return NULL; /* Do nothing if we don't have a valid Priority Mask to restore */ - if (pe_data->ns_pri_mask == 0) - return 0; + if (pe_data->ns_pri_mask == 0U) + return NULL; old_pmr = plat_ic_set_priority_mask(pe_data->ns_pri_mask); @@ -304,7 +308,7 @@ pe_data->ns_pri_mask = 0; - return 0; + return NULL; } /* @@ -328,7 +332,7 @@ * We should have been notified earlier of entering secure world, and * therefore have stashed the Non-secure priority mask. */ - assert(pe_data->ns_pri_mask != 0); + assert(pe_data->ns_pri_mask != 0U); /* Make sure no priority levels are active when requesting this */ if (has_valid_pri_activations(pe_data)) { @@ -343,7 +347,7 @@ * to populate it, the caller would find the correct return value. */ ns_ctx = cm_get_context(NON_SECURE); - assert(ns_ctx); + assert(ns_ctx != NULL); write_ctx_reg(get_gpregs_ctx(ns_ctx), CTX_GPREG_X0, preempt_ret_code); old_pmr = plat_ic_set_priority_mask(pe_data->ns_pri_mask); @@ -376,7 +380,7 @@ */ if (has_valid_pri_activations(pe_data)) return 0; - if (pe_data->ns_pri_mask != 0) + if (pe_data->ns_pri_mask != 0U) return 0; return 1; @@ -388,7 +392,9 @@ static uint64_t ehf_el3_interrupt_handler(uint32_t id, uint32_t flags, void *handle, void *cookie) { - int pri, idx, intr, intr_raw, ret = 0; + int ret = 0; + uint32_t intr_raw; + unsigned int intr, pri, idx; ehf_handler_t handler; /* @@ -425,8 +431,9 @@ /* Validate priority */ assert(pri == IDX_TO_PRI(idx)); - handler = RAW_HANDLER(exception_data.ehf_priorities[idx].ehf_handler); - if (!handler) { + handler = (ehf_handler_t) RAW_HANDLER( + exception_data.ehf_priorities[idx].ehf_handler); + if (handler == NULL) { ERROR("No EL3 exception handler for priority 0x%x\n", IDX_TO_PRI(idx)); panic(); @@ -438,7 +445,7 @@ */ ret = handler(intr_raw, flags, handle, cookie); - return ret; + return (uint64_t) ret; } /* @@ -450,21 +457,22 @@ int ret __unused; /* Ensure EL3 interrupts are supported */ - assert(plat_ic_has_interrupt_type(INTR_TYPE_EL3)); + assert(plat_ic_has_interrupt_type(INTR_TYPE_EL3) != 0); /* * Make sure that priority water mark has enough bits to represent the * whole priority array. */ - assert(exception_data.num_priorities <= (sizeof(ehf_pri_bits_t) * 8)); + assert(exception_data.num_priorities <= (sizeof(ehf_pri_bits_t) * 8U)); - assert(exception_data.ehf_priorities); + assert(exception_data.ehf_priorities != NULL); /* * Bit 7 of GIC priority must be 0 for secure interrupts. This means * platforms must use at least 1 of the remaining 7 bits. */ - assert((exception_data.pri_bits >= 1) || (exception_data.pri_bits < 8)); + assert((exception_data.pri_bits >= 1U) || + (exception_data.pri_bits < 8U)); /* Route EL3 interrupts when in Secure and Non-secure. */ set_interrupt_rm_flag(flags, NON_SECURE); @@ -484,13 +492,13 @@ */ void ehf_register_priority_handler(unsigned int pri, ehf_handler_t handler) { - int idx; + unsigned int idx; /* Sanity check for handler */ assert(handler != NULL); /* Handler ought to be 4-byte aligned */ - assert((((uintptr_t) handler) & 3) == 0); + assert((((uintptr_t) handler) & 3U) == 0U); /* Ensure we register for valid priority */ idx = pri_to_idx(pri); @@ -498,7 +506,7 @@ assert(IDX_TO_PRI(idx) == pri); /* Return failure if a handler was already registered */ - if (exception_data.ehf_priorities[idx].ehf_handler != _EHF_NO_HANDLER) { + if (exception_data.ehf_priorities[idx].ehf_handler != EHF_NO_HANDLER_) { ERROR("Handler already registered for priority 0x%x\n", pri); panic(); } @@ -508,7 +516,7 @@ * is 4-byte aligned, which is usually the case. */ exception_data.ehf_priorities[idx].ehf_handler = - (((uintptr_t) handler) | _EHF_PRI_VALID); + (((uintptr_t) handler) | EHF_PRI_VALID_); EHF_LOG("register pri=0x%x handler=%p\n", pri, handler); } diff --git a/include/bl31/ehf.h b/include/bl31/ehf.h index f963f8d..1446279 100644 --- a/include/bl31/ehf.h +++ b/include/bl31/ehf.h @@ -4,8 +4,8 @@ * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __EHF_H__ -#define __EHF_H__ +#ifndef EHF_H +#define EHF_H #ifndef __ASSEMBLY__ @@ -13,27 +13,27 @@ #include /* Valid priorities set bit 0 of the priority handler. */ -#define _EHF_PRI_VALID (((uintptr_t) 1) << 0) +#define EHF_PRI_VALID_ (((uintptr_t) 1) << 0) /* Marker for no handler registered for a valid priority */ -#define _EHF_NO_HANDLER (0 | _EHF_PRI_VALID) +#define EHF_NO_HANDLER_ (0U | EHF_PRI_VALID_) /* Extract the specified number of top bits from 7 lower bits of priority */ #define EHF_PRI_TO_IDX(pri, plat_bits) \ - ((pri & 0x7f) >> (7 - plat_bits)) + ((((unsigned) (pri)) & 0x7fu) >> (7u - (plat_bits))) /* Install exception priority descriptor at a suitable index */ #define EHF_PRI_DESC(plat_bits, priority) \ [EHF_PRI_TO_IDX(priority, plat_bits)] = { \ - .ehf_handler = _EHF_NO_HANDLER, \ + .ehf_handler = EHF_NO_HANDLER_, \ } /* Macro for platforms to regiter its exception priorities */ #define EHF_REGISTER_PRIORITIES(priorities, num, bits) \ const ehf_priorities_t exception_data = { \ - .num_priorities = num, \ - .ehf_priorities = priorities, \ - .pri_bits = bits, \ + .num_priorities = (num), \ + .ehf_priorities = (priorities), \ + .pri_bits = (bits), \ } /* @@ -72,10 +72,10 @@ uintptr_t ehf_handler; } ehf_pri_desc_t; -typedef struct ehf_priorities { +typedef struct ehf_priority_type { ehf_pri_desc_t *ehf_priorities; unsigned int num_priorities; - int pri_bits; + unsigned int pri_bits; } ehf_priorities_t; void ehf_init(void); @@ -87,4 +87,4 @@ #endif /* __ASSEMBLY__ */ -#endif /* __EHF_H__ */ +#endif /* EHF_H */ diff --git a/include/bl31/interrupt_mgmt.h b/include/bl31/interrupt_mgmt.h index 13c46e3..49ba9f7 100644 --- a/include/bl31/interrupt_mgmt.h +++ b/include/bl31/interrupt_mgmt.h @@ -61,10 +61,10 @@ #define INTR_RM_FROM_SEC_SHIFT SECURE /* BIT[0] */ #define INTR_RM_FROM_NS_SHIFT NON_SECURE /* BIT[1] */ #define INTR_RM_FROM_FLAG_MASK U(1) -#define get_interrupt_rm_flag(flag, ss) (((flag >> INTR_RM_FLAGS_SHIFT) >> ss) \ - & INTR_RM_FROM_FLAG_MASK) -#define set_interrupt_rm_flag(flag, ss) (flag |= U(1) << ss) -#define clr_interrupt_rm_flag(flag, ss) (flag &= ~(U(1) << ss)) +#define get_interrupt_rm_flag(flag, ss) \ + ((((flag) >> INTR_RM_FLAGS_SHIFT) >> (ss)) & INTR_RM_FROM_FLAG_MASK) +#define set_interrupt_rm_flag(flag, ss) ((flag) |= U(1) << (ss)) +#define clr_interrupt_rm_flag(flag, ss) ((flag) &= ~(U(1) << (ss))) /******************************************************************************* diff --git a/include/drivers/arm/gic_common.h b/include/drivers/arm/gic_common.h index 6e953a0..00cbd1d 100644 --- a/include/drivers/arm/gic_common.h +++ b/include/drivers/arm/gic_common.h @@ -7,6 +7,8 @@ #ifndef __GIC_COMMON_H__ #define __GIC_COMMON_H__ +#include + /******************************************************************************* * GIC Distributor interface general definitions ******************************************************************************/ @@ -34,10 +36,10 @@ #define GIC_INTR_CFG_EDGE (1 << 1) /* Constants to categorise priorities */ -#define GIC_HIGHEST_SEC_PRIORITY 0x0 -#define GIC_LOWEST_SEC_PRIORITY 0x7f -#define GIC_HIGHEST_NS_PRIORITY 0x80 -#define GIC_LOWEST_NS_PRIORITY 0xfe /* 0xff would disable all interrupts */ +#define GIC_HIGHEST_SEC_PRIORITY U(0x00) +#define GIC_LOWEST_SEC_PRIORITY U(0x7f) +#define GIC_HIGHEST_NS_PRIORITY U(0x80) +#define GIC_LOWEST_NS_PRIORITY U(0xfe) /* 0xff would disable all interrupts */ /******************************************************************************* * GIC Distributor interface register offsets that are common to GICv3 & GICv2