diff --git a/services/std_svc/spm_mm/aarch64/spm_helpers.S b/services/std_svc/spm_mm/aarch64/spm_helpers.S deleted file mode 100644 index 2c3aaf7..0000000 --- a/services/std_svc/spm_mm/aarch64/spm_helpers.S +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include "../spm_mm_private.h" - - .global spm_secure_partition_enter - .global spm_secure_partition_exit - - /* --------------------------------------------------------------------- - * This function is called with SP_EL0 as stack. Here we stash our EL3 - * callee-saved registers on to the stack as a part of saving the C - * runtime and enter the secure payload. - * 'x0' contains a pointer to the memory where the address of the C - * runtime context is to be saved. - * --------------------------------------------------------------------- - */ -func spm_secure_partition_enter - /* Make space for the registers that we're going to save */ - mov x3, sp - str x3, [x0, #0] - sub sp, sp, #SP_C_RT_CTX_SIZE - - /* Save callee-saved registers on to the stack */ - stp x19, x20, [sp, #SP_C_RT_CTX_X19] - stp x21, x22, [sp, #SP_C_RT_CTX_X21] - stp x23, x24, [sp, #SP_C_RT_CTX_X23] - stp x25, x26, [sp, #SP_C_RT_CTX_X25] - stp x27, x28, [sp, #SP_C_RT_CTX_X27] - stp x29, x30, [sp, #SP_C_RT_CTX_X29] - - /* --------------------------------------------------------------------- - * Everything is setup now. el3_exit() will use the secure context to - * restore to the general purpose and EL3 system registers to ERET - * into the secure payload. - * --------------------------------------------------------------------- - */ - b el3_exit -endfunc spm_secure_partition_enter - - /* --------------------------------------------------------------------- - * This function is called with 'x0' pointing to a C runtime context - * saved in spm_secure_partition_enter(). - * It restores the saved registers and jumps to that runtime with 'x0' - * as the new SP register. This destroys the C runtime context that had - * been built on the stack below the saved context by the caller. Later - * the second parameter 'x1' is passed as a return value to the caller. - * --------------------------------------------------------------------- - */ -func spm_secure_partition_exit - /* Restore the previous stack */ - mov sp, x0 - - /* Restore callee-saved registers on to the stack */ - ldp x19, x20, [x0, #(SP_C_RT_CTX_X19 - SP_C_RT_CTX_SIZE)] - ldp x21, x22, [x0, #(SP_C_RT_CTX_X21 - SP_C_RT_CTX_SIZE)] - ldp x23, x24, [x0, #(SP_C_RT_CTX_X23 - SP_C_RT_CTX_SIZE)] - ldp x25, x26, [x0, #(SP_C_RT_CTX_X25 - SP_C_RT_CTX_SIZE)] - ldp x27, x28, [x0, #(SP_C_RT_CTX_X27 - SP_C_RT_CTX_SIZE)] - ldp x29, x30, [x0, #(SP_C_RT_CTX_X29 - SP_C_RT_CTX_SIZE)] - - /* --------------------------------------------------------------------- - * This should take us back to the instruction after the call to the - * last spm_secure_partition_enter().* Place the second parameter to x0 - * so that the caller will see it as a return value from the original - * entry call. - * --------------------------------------------------------------------- - */ - mov x0, x1 - ret -endfunc spm_secure_partition_exit diff --git a/services/std_svc/spm_mm/aarch64/spm_mm_helpers.S b/services/std_svc/spm_mm/aarch64/spm_mm_helpers.S new file mode 100644 index 0000000..2c3aaf7 --- /dev/null +++ b/services/std_svc/spm_mm/aarch64/spm_mm_helpers.S @@ -0,0 +1,74 @@ +/* + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include +#include "../spm_mm_private.h" + + .global spm_secure_partition_enter + .global spm_secure_partition_exit + + /* --------------------------------------------------------------------- + * This function is called with SP_EL0 as stack. Here we stash our EL3 + * callee-saved registers on to the stack as a part of saving the C + * runtime and enter the secure payload. + * 'x0' contains a pointer to the memory where the address of the C + * runtime context is to be saved. + * --------------------------------------------------------------------- + */ +func spm_secure_partition_enter + /* Make space for the registers that we're going to save */ + mov x3, sp + str x3, [x0, #0] + sub sp, sp, #SP_C_RT_CTX_SIZE + + /* Save callee-saved registers on to the stack */ + stp x19, x20, [sp, #SP_C_RT_CTX_X19] + stp x21, x22, [sp, #SP_C_RT_CTX_X21] + stp x23, x24, [sp, #SP_C_RT_CTX_X23] + stp x25, x26, [sp, #SP_C_RT_CTX_X25] + stp x27, x28, [sp, #SP_C_RT_CTX_X27] + stp x29, x30, [sp, #SP_C_RT_CTX_X29] + + /* --------------------------------------------------------------------- + * Everything is setup now. el3_exit() will use the secure context to + * restore to the general purpose and EL3 system registers to ERET + * into the secure payload. + * --------------------------------------------------------------------- + */ + b el3_exit +endfunc spm_secure_partition_enter + + /* --------------------------------------------------------------------- + * This function is called with 'x0' pointing to a C runtime context + * saved in spm_secure_partition_enter(). + * It restores the saved registers and jumps to that runtime with 'x0' + * as the new SP register. This destroys the C runtime context that had + * been built on the stack below the saved context by the caller. Later + * the second parameter 'x1' is passed as a return value to the caller. + * --------------------------------------------------------------------- + */ +func spm_secure_partition_exit + /* Restore the previous stack */ + mov sp, x0 + + /* Restore callee-saved registers on to the stack */ + ldp x19, x20, [x0, #(SP_C_RT_CTX_X19 - SP_C_RT_CTX_SIZE)] + ldp x21, x22, [x0, #(SP_C_RT_CTX_X21 - SP_C_RT_CTX_SIZE)] + ldp x23, x24, [x0, #(SP_C_RT_CTX_X23 - SP_C_RT_CTX_SIZE)] + ldp x25, x26, [x0, #(SP_C_RT_CTX_X25 - SP_C_RT_CTX_SIZE)] + ldp x27, x28, [x0, #(SP_C_RT_CTX_X27 - SP_C_RT_CTX_SIZE)] + ldp x29, x30, [x0, #(SP_C_RT_CTX_X29 - SP_C_RT_CTX_SIZE)] + + /* --------------------------------------------------------------------- + * This should take us back to the instruction after the call to the + * last spm_secure_partition_enter().* Place the second parameter to x0 + * so that the caller will see it as a return value from the original + * entry call. + * --------------------------------------------------------------------- + */ + mov x0, x1 + ret +endfunc spm_secure_partition_exit diff --git a/services/std_svc/spm_mm/aarch64/spm_mm_shim_exceptions.S b/services/std_svc/spm_mm/aarch64/spm_mm_shim_exceptions.S new file mode 100644 index 0000000..dab6150 --- /dev/null +++ b/services/std_svc/spm_mm/aarch64/spm_mm_shim_exceptions.S @@ -0,0 +1,128 @@ +/* + * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include +#include +#include +#include + +/* ----------------------------------------------------------------------------- + * Very simple stackless exception handlers used by the spm shim layer. + * ----------------------------------------------------------------------------- + */ + .globl spm_shim_exceptions_ptr + +vector_base spm_shim_exceptions_ptr, .spm_shim_exceptions + + /* ----------------------------------------------------- + * Current EL with SP0 : 0x0 - 0x200 + * ----------------------------------------------------- + */ +vector_entry SynchronousExceptionSP0, .spm_shim_exceptions + b . +end_vector_entry SynchronousExceptionSP0 + +vector_entry IrqSP0, .spm_shim_exceptions + b . +end_vector_entry IrqSP0 + +vector_entry FiqSP0, .spm_shim_exceptions + b . +end_vector_entry FiqSP0 + +vector_entry SErrorSP0, .spm_shim_exceptions + b . +end_vector_entry SErrorSP0 + + /* ----------------------------------------------------- + * Current EL with SPx: 0x200 - 0x400 + * ----------------------------------------------------- + */ +vector_entry SynchronousExceptionSPx, .spm_shim_exceptions + b . +end_vector_entry SynchronousExceptionSPx + +vector_entry IrqSPx, .spm_shim_exceptions + b . +end_vector_entry IrqSPx + +vector_entry FiqSPx, .spm_shim_exceptions + b . +end_vector_entry FiqSPx + +vector_entry SErrorSPx, .spm_shim_exceptions + b . +end_vector_entry SErrorSPx + + /* ----------------------------------------------------- + * Lower EL using AArch64 : 0x400 - 0x600. No exceptions + * are handled since secure_partition does not implement + * a lower EL + * ----------------------------------------------------- + */ +vector_entry SynchronousExceptionA64, .spm_shim_exceptions + msr tpidr_el1, x30 + mrs x30, esr_el1 + ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH + + cmp x30, #EC_AARCH64_SVC + b.eq do_smc + + cmp x30, #EC_AARCH32_SVC + b.eq do_smc + + cmp x30, #EC_AARCH64_SYS + b.eq handle_sys_trap + + /* Fail in all the other cases */ + b panic + + /* --------------------------------------------- + * Tell SPM that we are done initialising + * --------------------------------------------- + */ +do_smc: + mrs x30, tpidr_el1 + smc #0 + eret + + /* AArch64 system instructions trap are handled as a panic for now */ +handle_sys_trap: +panic: + b panic +end_vector_entry SynchronousExceptionA64 + +vector_entry IrqA64, .spm_shim_exceptions + b . +end_vector_entry IrqA64 + +vector_entry FiqA64, .spm_shim_exceptions + b . +end_vector_entry FiqA64 + +vector_entry SErrorA64, .spm_shim_exceptions + b . +end_vector_entry SErrorA64 + + /* ----------------------------------------------------- + * Lower EL using AArch32 : 0x600 - 0x800 + * ----------------------------------------------------- + */ +vector_entry SynchronousExceptionA32, .spm_shim_exceptions + b . +end_vector_entry SynchronousExceptionA32 + +vector_entry IrqA32, .spm_shim_exceptions + b . +end_vector_entry IrqA32 + +vector_entry FiqA32, .spm_shim_exceptions + b . +end_vector_entry FiqA32 + +vector_entry SErrorA32, .spm_shim_exceptions + b . +end_vector_entry SErrorA32 diff --git a/services/std_svc/spm_mm/aarch64/spm_shim_exceptions.S b/services/std_svc/spm_mm/aarch64/spm_shim_exceptions.S deleted file mode 100644 index dab6150..0000000 --- a/services/std_svc/spm_mm/aarch64/spm_shim_exceptions.S +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - */ - -#include -#include -#include -#include - -/* ----------------------------------------------------------------------------- - * Very simple stackless exception handlers used by the spm shim layer. - * ----------------------------------------------------------------------------- - */ - .globl spm_shim_exceptions_ptr - -vector_base spm_shim_exceptions_ptr, .spm_shim_exceptions - - /* ----------------------------------------------------- - * Current EL with SP0 : 0x0 - 0x200 - * ----------------------------------------------------- - */ -vector_entry SynchronousExceptionSP0, .spm_shim_exceptions - b . -end_vector_entry SynchronousExceptionSP0 - -vector_entry IrqSP0, .spm_shim_exceptions - b . -end_vector_entry IrqSP0 - -vector_entry FiqSP0, .spm_shim_exceptions - b . -end_vector_entry FiqSP0 - -vector_entry SErrorSP0, .spm_shim_exceptions - b . -end_vector_entry SErrorSP0 - - /* ----------------------------------------------------- - * Current EL with SPx: 0x200 - 0x400 - * ----------------------------------------------------- - */ -vector_entry SynchronousExceptionSPx, .spm_shim_exceptions - b . -end_vector_entry SynchronousExceptionSPx - -vector_entry IrqSPx, .spm_shim_exceptions - b . -end_vector_entry IrqSPx - -vector_entry FiqSPx, .spm_shim_exceptions - b . -end_vector_entry FiqSPx - -vector_entry SErrorSPx, .spm_shim_exceptions - b . -end_vector_entry SErrorSPx - - /* ----------------------------------------------------- - * Lower EL using AArch64 : 0x400 - 0x600. No exceptions - * are handled since secure_partition does not implement - * a lower EL - * ----------------------------------------------------- - */ -vector_entry SynchronousExceptionA64, .spm_shim_exceptions - msr tpidr_el1, x30 - mrs x30, esr_el1 - ubfx x30, x30, #ESR_EC_SHIFT, #ESR_EC_LENGTH - - cmp x30, #EC_AARCH64_SVC - b.eq do_smc - - cmp x30, #EC_AARCH32_SVC - b.eq do_smc - - cmp x30, #EC_AARCH64_SYS - b.eq handle_sys_trap - - /* Fail in all the other cases */ - b panic - - /* --------------------------------------------- - * Tell SPM that we are done initialising - * --------------------------------------------- - */ -do_smc: - mrs x30, tpidr_el1 - smc #0 - eret - - /* AArch64 system instructions trap are handled as a panic for now */ -handle_sys_trap: -panic: - b panic -end_vector_entry SynchronousExceptionA64 - -vector_entry IrqA64, .spm_shim_exceptions - b . -end_vector_entry IrqA64 - -vector_entry FiqA64, .spm_shim_exceptions - b . -end_vector_entry FiqA64 - -vector_entry SErrorA64, .spm_shim_exceptions - b . -end_vector_entry SErrorA64 - - /* ----------------------------------------------------- - * Lower EL using AArch32 : 0x600 - 0x800 - * ----------------------------------------------------- - */ -vector_entry SynchronousExceptionA32, .spm_shim_exceptions - b . -end_vector_entry SynchronousExceptionA32 - -vector_entry IrqA32, .spm_shim_exceptions - b . -end_vector_entry IrqA32 - -vector_entry FiqA32, .spm_shim_exceptions - b . -end_vector_entry FiqA32 - -vector_entry SErrorA32, .spm_shim_exceptions - b . -end_vector_entry SErrorA32 diff --git a/services/std_svc/spm_mm/spm_mm.mk b/services/std_svc/spm_mm/spm_mm.mk index 1de31a6..656488b 100644 --- a/services/std_svc/spm_mm/spm_mm.mk +++ b/services/std_svc/spm_mm/spm_mm.mk @@ -12,8 +12,8 @@ endif SPM_SOURCES := $(addprefix services/std_svc/spm_mm/, \ - ${ARCH}/spm_helpers.S \ - ${ARCH}/spm_shim_exceptions.S \ + ${ARCH}/spm_mm_helpers.S \ + ${ARCH}/spm_mm_shim_exceptions.S \ spm_mm_main.c \ spm_mm_setup.c \ spm_mm_xlat.c)