diff --git a/common/desc_image_load.c b/common/desc_image_load.c index 405bb83..f2e8f60 100644 --- a/common/desc_image_load.c +++ b/common/desc_image_load.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,6 +9,7 @@ #include #include #include +#include static bl_load_info_t bl_load_info; static bl_params_t next_bl_params; @@ -275,3 +276,47 @@ } } } + +/******************************************************************************* + * Helper to extract BL32/BL33 entry point info from arg0 passed to BL31, for + * platforms that are only interested in those. Platforms that need to extract + * more information can parse the structures themselves. + ******************************************************************************/ + +void bl31_params_parse_helper(u_register_t param, + entry_point_info_t *bl32_ep_info_out, + entry_point_info_t *bl33_ep_info_out) +{ + bl_params_node_t *node; + bl_params_t *v2 = (void *)(uintptr_t)param; + +#if !ERROR_DEPRECATED + if (v2->h.version == PARAM_VERSION_1) { + struct { /* Deprecated version 1 parameter structure. */ + param_header_t h; + image_info_t *bl31_image_info; + entry_point_info_t *bl32_ep_info; + image_info_t *bl32_image_info; + entry_point_info_t *bl33_ep_info; + image_info_t *bl33_image_info; + } *v1 = (void *)(uintptr_t)param; + assert(v1->h.type == PARAM_BL31); + if (bl32_ep_info_out) + *bl32_ep_info_out = *v1->bl32_ep_info; + if (bl33_ep_info_out) + *bl33_ep_info_out = *v1->bl33_ep_info; + return; + } +#endif /* !ERROR_DEPRECATED */ + + assert(v2->h.version == PARAM_VERSION_2); + assert(v2->h.type == PARAM_BL_PARAMS); + for (node = v2->head; node; node = node->next_params_info) { + if (node->image_id == BL32_IMAGE_ID) + if (bl32_ep_info_out) + *bl32_ep_info_out = *node->ep_info; + if (node->image_id == BL33_IMAGE_ID) + if (bl33_ep_info_out) + *bl33_ep_info_out = *node->ep_info; + } +} diff --git a/include/common/bl_common.h b/include/common/bl_common.h index 457dc2a..eb96df0 100644 --- a/include/common/bl_common.h +++ b/include/common/bl_common.h @@ -11,6 +11,14 @@ #include #include +#ifndef __ASSEMBLY__ +#include +#include +#include +#endif /* __ASSEMBLY__ */ + +#include + #define UP U(1) #define DOWN U(0) @@ -21,22 +29,6 @@ #define TOP U(0x1) #define BOTTOM U(0x0) -/* - * The following are used for image state attributes. - * Image can only be in one of the following state. - */ -#define IMAGE_STATE_RESET U(0) -#define IMAGE_STATE_COPIED U(1) -#define IMAGE_STATE_COPYING U(2) -#define IMAGE_STATE_AUTHENTICATED U(3) -#define IMAGE_STATE_EXECUTED U(4) -#define IMAGE_STATE_INTERRUPTED U(5) - -#define IMAGE_ATTRIB_SKIP_LOADING U(0x02) -#define IMAGE_ATTRIB_PLAT_SETUP U(0x04) - -#define INVALID_IMAGE_ID U(0xFFFFFFFF) - /******************************************************************************* * Constants to indicate type of exception to the common exception handler. ******************************************************************************/ @@ -101,11 +93,6 @@ #ifndef __ASSEMBLY__ -#include -#include - -#include - /* * Declarations of linker defined symbols to help determine memory layout of * BL images @@ -165,66 +152,6 @@ size_t total_size; } meminfo_t; -/***************************************************************************** - * Image info binary provides information from the image loader that - * can be used by the firmware to manage available trusted RAM. - * More advanced firmware image formats can provide additional - * information that enables optimization or greater flexibility in the - * common firmware code - *****************************************************************************/ -typedef struct image_info { - param_header_t h; - uintptr_t image_base; /* physical address of base of image */ - uint32_t image_size; /* bytes read from image file */ - uint32_t image_max_size; -} image_info_t; - -/***************************************************************************** - * The image descriptor struct definition. - *****************************************************************************/ -typedef struct image_desc { - /* Contains unique image id for the image. */ - unsigned int image_id; - /* - * This member contains Image state information. - * Refer IMAGE_STATE_XXX defined above. - */ - unsigned int state; - uint32_t copied_size; /* image size copied in blocks */ - image_info_t image_info; - entry_point_info_t ep_info; -} image_desc_t; - -/* BL image node in the BL image loading sequence */ -typedef struct bl_load_info_node { - unsigned int image_id; - image_info_t *image_info; - struct bl_load_info_node *next_load_info; -} bl_load_info_node_t; - -/* BL image head node in the BL image loading sequence */ -typedef struct bl_load_info { - param_header_t h; - bl_load_info_node_t *head; -} bl_load_info_t; - -/* BL image node in the BL image execution sequence */ -typedef struct bl_params_node { - unsigned int image_id; - image_info_t *image_info; - entry_point_info_t *ep_info; - struct bl_params_node *next_params_info; -} bl_params_node_t; - -/* - * BL image head node in the BL image execution sequence - * It is also used to pass information to next BL image. - */ -typedef struct bl_params { - param_header_t h; - bl_params_node_t *head; -} bl_params_t; - /******************************************************************************* * Function & variable prototypes ******************************************************************************/ diff --git a/include/common/desc_image_load.h b/include/common/desc_image_load.h index e46eb27..b044f3e 100644 --- a/include/common/desc_image_load.h +++ b/include/common/desc_image_load.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -40,4 +40,9 @@ bl_params_t *get_next_bl_params_from_mem_params_desc(void); void populate_next_bl_params_config(bl_params_t *bl2_to_next_bl_params); +/* Helper to extract BL32/BL33 entry point info from arg0 passed to BL31. */ +void bl31_params_parse_helper(u_register_t param, + entry_point_info_t *bl32_ep_info_out, + entry_point_info_t *bl33_ep_info_out); + #endif /* DESC_IMAGE_LOAD_H */ diff --git a/include/common/ep_info.h b/include/common/ep_info.h index a09d03b..6cb903e 100644 --- a/include/common/ep_info.h +++ b/include/common/ep_info.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,104 +8,29 @@ #define EP_INFO_H #include -#include - -#define SECURE U(0x0) -#define NON_SECURE U(0x1) -#define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE)) - -/******************************************************************************* - * Constants that allow assembler code to access members of and the - * 'entry_point_info' structure at their correct offsets. - ******************************************************************************/ -#define ENTRY_POINT_INFO_PC_OFFSET U(0x08) -#ifdef AARCH32 -#define ENTRY_POINT_INFO_LR_SVC_OFFSET U(0x10) -#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x14) -#else -#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x18) -#endif - -/* The following are used to set/get image attributes. */ -#define PARAM_EP_SECURITY_MASK U(0x1) - -/* Secure or Non-secure image */ -#define GET_SECURITY_STATE(x) ((x) & PARAM_EP_SECURITY_MASK) -#define SET_SECURITY_STATE(x, security) \ - ((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security)) - -/* Endianness of the image. */ -#define EP_EE_MASK U(0x2) -#define EP_EE_SHIFT U(1) -#define EP_EE_LITTLE U(0x0) -#define EP_EE_BIG U(0x2) -#define EP_GET_EE(x) ((x) & EP_EE_MASK) -#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee)) - -/* Enable or disable access to the secure timer from secure images. */ -#define EP_ST_MASK U(0x4) -#define EP_ST_DISABLE U(0x0) -#define EP_ST_ENABLE U(0x4) -#define EP_GET_ST(x) ((x) & EP_ST_MASK) -#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee)) - -/* Determine if an image is executable or not. */ -#define EP_EXE_MASK U(0x8) -#define NON_EXECUTABLE U(0x0) -#define EXECUTABLE U(0x8) -#define EP_GET_EXE(x) ((x) & EP_EXE_MASK) -#define EP_SET_EXE(x, ee) ((x) = ((x) & ~EP_EXE_MASK) | (ee)) - -/* Flag to indicate the first image that is executed. */ -#define EP_FIRST_EXE_MASK U(0x10) -#define EP_FIRST_EXE U(0x10) -#define EP_GET_FIRST_EXE(x) ((x) & EP_FIRST_EXE_MASK) -#define EP_SET_FIRST_EXE(x, ee) ((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee)) #ifndef __ASSEMBLY__ - #include - #include +#endif /* __ASSEMBLY__ */ -typedef struct aapcs64_params { - u_register_t arg0; - u_register_t arg1; - u_register_t arg2; - u_register_t arg3; - u_register_t arg4; - u_register_t arg5; - u_register_t arg6; - u_register_t arg7; -} aapcs64_params_t; +#include -typedef struct aapcs32_params { - u_register_t arg0; - u_register_t arg1; - u_register_t arg2; - u_register_t arg3; -} aapcs32_params_t; +#define SECURE EP_SECURE +#define NON_SECURE EP_NON_SECURE +#define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE)) -/***************************************************************************** - * This structure represents the superset of information needed while - * switching exception levels. The only two mechanisms to do so are - * ERET & SMC. Security state is indicated using bit zero of header - * attribute - * NOTE: BL1 expects entrypoint followed by spsr at an offset from the start - * of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while - * processing SMC to jump to BL31. - *****************************************************************************/ -typedef struct entry_point_info { - param_header_t h; - uintptr_t pc; - uint32_t spsr; -#ifdef AARCH32 - uintptr_t lr_svc; - aapcs32_params_t args; -#else - aapcs64_params_t args; -#endif -} entry_point_info_t; +#define PARAM_EP_SECURITY_MASK EP_SECURITY_MASK + +#define NON_EXECUTABLE EP_NON_EXECUTABLE +#define EXECUTABLE EP_EXECUTABLE + +/* Secure or Non-secure image */ +#define GET_SECURITY_STATE(x) ((x) & EP_SECURITY_MASK) +#define SET_SECURITY_STATE(x, security) \ + ((x) = ((x) & ~EP_SECURITY_MASK) | (security)) + +#ifndef __ASSEMBLY__ /* * Compile time assertions related to the 'entry_point_info' structure to diff --git a/include/common/param_header.h b/include/common/param_header.h index 0c1503f..b885286 100644 --- a/include/common/param_header.h +++ b/include/common/param_header.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,20 +9,14 @@ #include -#include +#ifndef __ASSEMBLY__ +#include +#endif /*__ASSEMBLY__*/ -/* Param header types */ -#define PARAM_EP U(0x01) -#define PARAM_IMAGE_BINARY U(0x02) -#define PARAM_BL31 U(0x03) -#define PARAM_BL_LOAD_INFO U(0x04) -#define PARAM_BL_PARAMS U(0x05) -#define PARAM_PSCI_LIB_ARGS U(0x06) -#define PARAM_SP_IMAGE_BOOT_INFO U(0x07) +#include -/* Param header version */ -#define VERSION_1 U(0x01) -#define VERSION_2 U(0x02) +#define VERSION_1 PARAM_VERSION_1 +#define VERSION_2 PARAM_VERSION_2 #define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \ (_p)->h.type = (uint8_t)(_type); \ @@ -38,21 +32,4 @@ ._p.h.size = (uint16_t)sizeof(_p_type), \ ._p.h.attr = (uint32_t)(_attr) -#ifndef __ASSEMBLY__ - -#include - -/*************************************************************************** - * This structure provides version information and the size of the - * structure, attributes for the structure it represents - ***************************************************************************/ -typedef struct param_header { - uint8_t type; /* type of the structure */ - uint8_t version; /* version of this structure */ - uint16_t size; /* size of this structure in bytes */ - uint32_t attr; /* attributes: unused bits SBZ */ -} param_header_t; - -#endif /*__ASSEMBLY__*/ - #endif /* PARAM_HEADER_H */ diff --git a/include/common/tbbr/tbbr_img_def.h b/include/common/tbbr/tbbr_img_def.h index 672886d..1701995 100644 --- a/include/common/tbbr/tbbr_img_def.h +++ b/include/common/tbbr/tbbr_img_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -7,83 +7,6 @@ #ifndef TBBR_IMG_DEF_H #define TBBR_IMG_DEF_H -#include - -/* Firmware Image Package */ -#define FIP_IMAGE_ID U(0) - -/* Trusted Boot Firmware BL2 */ -#define BL2_IMAGE_ID U(1) - -/* SCP Firmware SCP_BL2 */ -#define SCP_BL2_IMAGE_ID U(2) - -/* EL3 Runtime Firmware BL31 */ -#define BL31_IMAGE_ID U(3) - -/* Secure Payload BL32 (Trusted OS) */ -#define BL32_IMAGE_ID U(4) - -/* Non-Trusted Firmware BL33 */ -#define BL33_IMAGE_ID U(5) - -/* Certificates */ -#define TRUSTED_BOOT_FW_CERT_ID U(6) -#define TRUSTED_KEY_CERT_ID U(7) - -#define SCP_FW_KEY_CERT_ID U(8) -#define SOC_FW_KEY_CERT_ID U(9) -#define TRUSTED_OS_FW_KEY_CERT_ID U(10) -#define NON_TRUSTED_FW_KEY_CERT_ID U(11) - -#define SCP_FW_CONTENT_CERT_ID U(12) -#define SOC_FW_CONTENT_CERT_ID U(13) -#define TRUSTED_OS_FW_CONTENT_CERT_ID U(14) -#define NON_TRUSTED_FW_CONTENT_CERT_ID U(15) - -/* Non-Trusted ROM Firmware NS_BL1U */ -#define NS_BL1U_IMAGE_ID U(16) - -/* Trusted FWU Certificate */ -#define FWU_CERT_ID U(17) - -/* Trusted FWU SCP Firmware SCP_BL2U */ -#define SCP_BL2U_IMAGE_ID U(18) - -/* Trusted FWU Boot Firmware BL2U */ -#define BL2U_IMAGE_ID U(19) - -/* Non-Trusted FWU Firmware NS_BL2U */ -#define NS_BL2U_IMAGE_ID U(20) - -/* Secure Payload BL32_EXTRA1 (Trusted OS Extra1) */ -#define BL32_EXTRA1_IMAGE_ID U(21) - -/* Secure Payload BL32_EXTRA2 (Trusted OS Extra2) */ -#define BL32_EXTRA2_IMAGE_ID U(22) - -/* HW_CONFIG (e.g. Kernel DT) */ -#define HW_CONFIG_ID U(23) - -/* TB_FW_CONFIG */ -#define TB_FW_CONFIG_ID U(24) - -/* SOC_FW_CONFIG */ -#define SOC_FW_CONFIG_ID U(25) - -/* TOS_FW_CONFIG */ -#define TOS_FW_CONFIG_ID U(26) - -/* NT_FW_CONFIG */ -#define NT_FW_CONFIG_ID U(27) - -/* GPT Partition */ -#define GPT_IMAGE_ID U(28) - -/* Binary with STM32 header */ -#define STM32_IMAGE_ID U(29) - -/* Define size of the array */ -#define MAX_NUMBER_IDS U(30) +#include #endif /* TBBR_IMG_DEF_H */ diff --git a/include/drivers/gpio.h b/include/drivers/gpio.h index bef62f7..99c18a4 100644 --- a/include/drivers/gpio.h +++ b/include/drivers/gpio.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -7,15 +7,17 @@ #ifndef GPIO_H #define GPIO_H -#define GPIO_DIR_OUT 0 -#define GPIO_DIR_IN 1 +#include -#define GPIO_LEVEL_LOW 0 -#define GPIO_LEVEL_HIGH 1 +#define GPIO_DIR_OUT ARM_TF_GPIO_DIR_OUT +#define GPIO_DIR_IN ARM_TF_GPIO_DIR_IN -#define GPIO_PULL_NONE 0 -#define GPIO_PULL_UP 1 -#define GPIO_PULL_DOWN 2 +#define GPIO_LEVEL_LOW ARM_TF_GPIO_LEVEL_LOW +#define GPIO_LEVEL_HIGH ARM_TF_GPIO_LEVEL_HIGH + +#define GPIO_PULL_NONE ARM_TF_GPIO_PULL_NONE +#define GPIO_PULL_UP ARM_TF_GPIO_PULL_UP +#define GPIO_PULL_DOWN ARM_TF_GPIO_PULL_DOWN typedef struct gpio_ops { int (*get_direction)(int gpio); diff --git a/include/export/README b/include/export/README new file mode 100644 index 0000000..2de8d6b --- /dev/null +++ b/include/export/README @@ -0,0 +1,33 @@ +All headers under include/export/ are export headers that are intended for +inclusion in third-party code which needs to interact with TF-A data structures +or interfaces. They must follow these special rules: + +- Header guards should start with ARM_TRUSTED_FIRMWARE_ to reduce clash risk. + +- All definitions should be sufficiently namespaced (e.g. with BL_ or TF_) to + make name clashes with third-party code unlikely. + +- They must not #include any headers except other export headers, and those + includes must use relative paths with "../double_quotes.h" notation. + +- They must not rely on any type definitions other that types defined + in the ISO C standard (i.e. uint64_t is fine, but not u_register_t). They + should still not #include . Instead, wrapper headers including + export headers need to ensure that they #include earlier in their + include order. + +- They must not rely on any macro definitions other than those which are + pre-defined by all common compilers (e.g. __ASSEMBLER__ or __aarch64__). + +- They must only contain macro, type and structure definitions, no prototypes. + +- They should avoid using integer types with architecture-dependent widths + (e.g. long, uintptr_t, pointer types) where possible. (Some existing export + headers are violating this for now.) + +- Their names should always end in "_exp.h". + +- Normal TF-A code should never include export headers directly. Instead, it + should include a wrapper header that ensures the export header is included in + the right manner. (The wrapper header for include/export/x/y/z_exp.h should + normally be placed at include/x/y/z.h.) diff --git a/include/export/common/bl_common_exp.h b/include/export/common/bl_common_exp.h new file mode 100644 index 0000000..8f09017 --- /dev/null +++ b/include/export/common/bl_common_exp.h @@ -0,0 +1,95 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_BL_COMMON_EXP_H +#define ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_BL_COMMON_EXP_H + +/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */ + +#include "ep_info_exp.h" +#include "tbbr/tbbr_img_def_exp.h" + +/* + * The following are used for image state attributes. + * Image can only be in one of the following state. + */ +#define IMAGE_STATE_RESET U(0) +#define IMAGE_STATE_COPIED U(1) +#define IMAGE_STATE_COPYING U(2) +#define IMAGE_STATE_AUTHENTICATED U(3) +#define IMAGE_STATE_EXECUTED U(4) +#define IMAGE_STATE_INTERRUPTED U(5) + +#define IMAGE_ATTRIB_SKIP_LOADING U(0x02) +#define IMAGE_ATTRIB_PLAT_SETUP U(0x04) + +#define INVALID_IMAGE_ID U(0xFFFFFFFF) + +#ifndef __ASSEMBLER__ + +/***************************************************************************** + * Image info binary provides information from the image loader that + * can be used by the firmware to manage available trusted RAM. + * More advanced firmware image formats can provide additional + * information that enables optimization or greater flexibility in the + * common firmware code + *****************************************************************************/ +typedef struct image_info { + param_header_t h; + uintptr_t image_base; /* physical address of base of image */ + uint32_t image_size; /* bytes read from image file */ + uint32_t image_max_size; +} image_info_t; + +/* BL image node in the BL image execution sequence */ +typedef struct bl_params_node { + unsigned int image_id; + image_info_t *image_info; + entry_point_info_t *ep_info; + struct bl_params_node *next_params_info; +} bl_params_node_t; + +/* + * BL image head node in the BL image execution sequence + * It is also used to pass information to next BL image. + */ +typedef struct bl_params { + param_header_t h; + bl_params_node_t *head; +} bl_params_t; + +/***************************************************************************** + * The image descriptor struct definition. + *****************************************************************************/ +typedef struct image_desc { + /* Contains unique image id for the image. */ + unsigned int image_id; + /* + * This member contains Image state information. + * Refer IMAGE_STATE_XXX defined above. + */ + unsigned int state; + uint32_t copied_size; /* image size copied in blocks */ + image_info_t image_info; + entry_point_info_t ep_info; +} image_desc_t; + +/* BL image node in the BL image loading sequence */ +typedef struct bl_load_info_node { + unsigned int image_id; + image_info_t *image_info; + struct bl_load_info_node *next_load_info; +} bl_load_info_node_t; + +/* BL image head node in the BL image loading sequence */ +typedef struct bl_load_info { + param_header_t h; + bl_load_info_node_t *head; +} bl_load_info_t; + +#endif /* __ASSEMBLER__ */ + +#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_BL_COMMON_EXP_H */ diff --git a/include/export/common/ep_info_exp.h b/include/export/common/ep_info_exp.h new file mode 100644 index 0000000..4c703e6 --- /dev/null +++ b/include/export/common/ep_info_exp.h @@ -0,0 +1,107 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_EP_INFO_EXP_H +#define ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_EP_INFO_EXP_H + +/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */ + +#include "../lib/utils_def_exp.h" +#include "param_header_exp.h" + +/******************************************************************************* + * Constants that allow assembler code to access members of and the + * 'entry_point_info' structure at their correct offsets. + ******************************************************************************/ +#define ENTRY_POINT_INFO_PC_OFFSET U(0x08) +#ifdef __aarch64__ +#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x18) +#else +#define ENTRY_POINT_INFO_LR_SVC_OFFSET U(0x10) +#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x14) +#endif + +/* Security state of the image. */ +#define EP_SECURITY_MASK U(0x1) +#define EP_SECURITY_SHIFT U(0) +#define EP_SECURE U(0x0) +#define EP_NON_SECURE U(0x1) + +/* Endianness of the image. */ +#define EP_EE_MASK U(0x2) +#define EP_EE_SHIFT U(1) +#define EP_EE_LITTLE U(0x0) +#define EP_EE_BIG U(0x2) +#define EP_GET_EE(x) ((x) & EP_EE_MASK) +#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee)) + +/* Enable or disable access to the secure timer from secure images. */ +#define EP_ST_MASK U(0x4) +#define EP_ST_SHIFT U(2) +#define EP_ST_DISABLE U(0x0) +#define EP_ST_ENABLE U(0x4) +#define EP_GET_ST(x) ((x) & EP_ST_MASK) +#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee)) + +/* Determine if an image is executable or not. */ +#define EP_EXE_MASK U(0x8) +#define EP_EXE_SHIFT U(3) +#define EP_NON_EXECUTABLE U(0x0) +#define EP_EXECUTABLE U(0x8) +#define EP_GET_EXE(x) ((x) & EP_EXE_MASK) +#define EP_SET_EXE(x, ee) ((x) = ((x) & ~EP_EXE_MASK) | (ee)) + +/* Flag to indicate the first image that is executed. */ +#define EP_FIRST_EXE_MASK U(0x10) +#define EP_FIRST_EXE_SHIFT U(4) +#define EP_FIRST_EXE U(0x10) +#define EP_GET_FIRST_EXE(x) ((x) & EP_FIRST_EXE_MASK) +#define EP_SET_FIRST_EXE(x, ee) ((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee)) + +#ifndef __ASSEMBLER__ + +typedef struct aapcs64_params { + uint64_t arg0; + uint64_t arg1; + uint64_t arg2; + uint64_t arg3; + uint64_t arg4; + uint64_t arg5; + uint64_t arg6; + uint64_t arg7; +} aapcs64_params_t; + +typedef struct aapcs32_params { + uint32_t arg0; + uint32_t arg1; + uint32_t arg2; + uint32_t arg3; +} aapcs32_params_t; + +/***************************************************************************** + * This structure represents the superset of information needed while + * switching exception levels. The only two mechanisms to do so are + * ERET & SMC. Security state is indicated using bit zero of header + * attribute + * NOTE: BL1 expects entrypoint followed by spsr at an offset from the start + * of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while + * processing SMC to jump to BL31. + *****************************************************************************/ +typedef struct entry_point_info { + param_header_t h; + uintptr_t pc; + uint32_t spsr; +#ifdef __aarch64__ + aapcs64_params_t args; +#else + uintptr_t lr_svc; + aapcs32_params_t args; +#endif +} entry_point_info_t; + +#endif /*__ASSEMBLER__*/ + +#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_EP_INFO_EXP_H */ diff --git a/include/export/common/param_header_exp.h b/include/export/common/param_header_exp.h new file mode 100644 index 0000000..15bb6f2 --- /dev/null +++ b/include/export/common/param_header_exp.h @@ -0,0 +1,42 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_PARAM_HEADER_EXP_H +#define ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_PARAM_HEADER_EXP_H + +/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */ + +#include "../lib/utils_def_exp.h" + +/* Param header types */ +#define PARAM_EP U(0x01) +#define PARAM_IMAGE_BINARY U(0x02) +#define PARAM_BL31 U(0x03) +#define PARAM_BL_LOAD_INFO U(0x04) +#define PARAM_BL_PARAMS U(0x05) +#define PARAM_PSCI_LIB_ARGS U(0x06) +#define PARAM_SP_IMAGE_BOOT_INFO U(0x07) + +/* Param header version */ +#define PARAM_VERSION_1 U(0x01) +#define PARAM_VERSION_2 U(0x02) + +#ifndef __ASSEMBLER__ + +/*************************************************************************** + * This structure provides version information and the size of the + * structure, attributes for the structure it represents + ***************************************************************************/ +typedef struct param_header { + uint8_t type; /* type of the structure */ + uint8_t version; /* version of this structure */ + uint16_t size; /* size of this structure in bytes */ + uint32_t attr; /* attributes: unused bits SBZ */ +} param_header_t; + +#endif /*__ASSEMBLER__*/ + +#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_PARAM_HEADER_EXP_H */ diff --git a/include/export/common/tbbr/tbbr_img_def_exp.h b/include/export/common/tbbr/tbbr_img_def_exp.h new file mode 100644 index 0000000..ff0d16c --- /dev/null +++ b/include/export/common/tbbr/tbbr_img_def_exp.h @@ -0,0 +1,91 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_TBBR_TBBR_IMG_DEF_EXP_H +#define ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_TBBR_TBBR_IMG_DEF_EXP_H + +/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */ + +#include "../../lib/utils_def_exp.h" + +/* Firmware Image Package */ +#define FIP_IMAGE_ID U(0) + +/* Trusted Boot Firmware BL2 */ +#define BL2_IMAGE_ID U(1) + +/* SCP Firmware SCP_BL2 */ +#define SCP_BL2_IMAGE_ID U(2) + +/* EL3 Runtime Firmware BL31 */ +#define BL31_IMAGE_ID U(3) + +/* Secure Payload BL32 (Trusted OS) */ +#define BL32_IMAGE_ID U(4) + +/* Non-Trusted Firmware BL33 */ +#define BL33_IMAGE_ID U(5) + +/* Certificates */ +#define TRUSTED_BOOT_FW_CERT_ID U(6) +#define TRUSTED_KEY_CERT_ID U(7) + +#define SCP_FW_KEY_CERT_ID U(8) +#define SOC_FW_KEY_CERT_ID U(9) +#define TRUSTED_OS_FW_KEY_CERT_ID U(10) +#define NON_TRUSTED_FW_KEY_CERT_ID U(11) + +#define SCP_FW_CONTENT_CERT_ID U(12) +#define SOC_FW_CONTENT_CERT_ID U(13) +#define TRUSTED_OS_FW_CONTENT_CERT_ID U(14) +#define NON_TRUSTED_FW_CONTENT_CERT_ID U(15) + +/* Non-Trusted ROM Firmware NS_BL1U */ +#define NS_BL1U_IMAGE_ID U(16) + +/* Trusted FWU Certificate */ +#define FWU_CERT_ID U(17) + +/* Trusted FWU SCP Firmware SCP_BL2U */ +#define SCP_BL2U_IMAGE_ID U(18) + +/* Trusted FWU Boot Firmware BL2U */ +#define BL2U_IMAGE_ID U(19) + +/* Non-Trusted FWU Firmware NS_BL2U */ +#define NS_BL2U_IMAGE_ID U(20) + +/* Secure Payload BL32_EXTRA1 (Trusted OS Extra1) */ +#define BL32_EXTRA1_IMAGE_ID U(21) + +/* Secure Payload BL32_EXTRA2 (Trusted OS Extra2) */ +#define BL32_EXTRA2_IMAGE_ID U(22) + +/* HW_CONFIG (e.g. Kernel DT) */ +#define HW_CONFIG_ID U(23) + +/* TB_FW_CONFIG */ +#define TB_FW_CONFIG_ID U(24) + +/* SOC_FW_CONFIG */ +#define SOC_FW_CONFIG_ID U(25) + +/* TOS_FW_CONFIG */ +#define TOS_FW_CONFIG_ID U(26) + +/* NT_FW_CONFIG */ +#define NT_FW_CONFIG_ID U(27) + +/* GPT Partition */ +#define GPT_IMAGE_ID U(28) + +/* Binary with STM32 header */ +#define STM32_IMAGE_ID U(29) + +/* Define size of the array */ +#define MAX_NUMBER_IDS U(30) + +#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_COMMON_TBBR_TBBR_IMG_DEF_EXP_H */ diff --git a/include/export/drivers/gpio_exp.h b/include/export/drivers/gpio_exp.h new file mode 100644 index 0000000..a37f190 --- /dev/null +++ b/include/export/drivers/gpio_exp.h @@ -0,0 +1,22 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_DRIVERS_GPIO_EXP_H +#define ARM_TRUSTED_FIRMWARE_EXPORT_DRIVERS_GPIO_EXP_H + +/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */ + +#define ARM_TF_GPIO_DIR_OUT 0 +#define ARM_TF_GPIO_DIR_IN 1 + +#define ARM_TF_GPIO_LEVEL_LOW 0 +#define ARM_TF_GPIO_LEVEL_HIGH 1 + +#define ARM_TF_GPIO_PULL_NONE 0 +#define ARM_TF_GPIO_PULL_UP 1 +#define ARM_TF_GPIO_PULL_DOWN 2 + +#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_DRIVERS_GPIO_EXP_H */ diff --git a/include/export/lib/bl_aux_params/bl_aux_params_exp.h b/include/export/lib/bl_aux_params/bl_aux_params_exp.h new file mode 100644 index 0000000..7391dec --- /dev/null +++ b/include/export/lib/bl_aux_params/bl_aux_params_exp.h @@ -0,0 +1,89 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_LIB_BL_AUX_PARAMS_EXP_H +#define ARM_TRUSTED_FIRMWARE_EXPORT_LIB_BL_AUX_PARAMS_EXP_H + +/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */ + +#include "../../drivers/gpio_exp.h" + +/* + * This API implements a lightweight parameter passing mechanism that can be + * used to pass SoC Firmware configuration data from BL2 to BL31 by platforms or + * configurations that do not want to depend on libfdt. It is structured as a + * singly-linked list of parameter structures that all share the same common + * header but may have different (and differently-sized) structure bodies after + * that. The header contains a type field to indicate the parameter type (which + * is used to infer the structure length and how to interpret its contents) and + * a next pointer which contains the absolute physical address of the next + * parameter structure. The next pointer in the last structure block is set to + * NULL. The picture below shows how the parameters are kept in memory. + * + * head of list ---> +----------------+ --+ + * | type | | + * +----------------+ |--> struct bl_aux_param + * +----| next | | + * | +----------------+ --+ + * | | parameter data | + * | +----------------+ + * | + * +--> +----------------+ --+ + * | type | | + * +----------------+ |--> struct bl_aux_param + * NULL <---| next | | + * +----------------+ --+ + * | parameter data | + * +----------------+ + * + * Note: The SCTLR_EL3.A bit (Alignment fault check enable) is set in TF-A, so + * BL2 must ensure that each parameter struct starts on a 64-bit aligned address + * to avoid alignment faults. Parameters may be allocated in any address range + * accessible at the time of BL31 handoff (e.g. SRAM, DRAM, SoC-internal scratch + * registers, etc.), in particular address ranges that may not be mapped in + * BL31's page tables, so the parameter list must be parsed before the MMU is + * enabled and any information that is required at a later point should be + * deep-copied out into BL31-internal data structures. + */ + +enum bl_aux_param_type { + BL_AUX_PARAM_NONE = 0, + BL_AUX_PARAM_VENDOR_SPECIFIC_FIRST = 0x1, + /* 0x1 - 0x7fffffff can be used by vendor-specific handlers. */ + BL_AUX_PARAM_VENDOR_SPECIFIC_LAST = 0x7fffffff, + BL_AUX_PARAM_GENERIC_FIRST = 0x80000001, + BL_AUX_PARAM_COREBOOT_TABLE = BL_AUX_PARAM_GENERIC_FIRST, + /* 0x80000001 - 0xffffffff are reserved for the generic handler. */ + BL_AUX_PARAM_GENERIC_LAST = 0xffffffff, + /* Top 32 bits of the type field are reserved for future use. */ +}; + +/* common header for all BL aux parameters */ +struct bl_aux_param_header { + uint64_t type; + uint64_t next; +}; + +/* commonly useful parameter structures that can be shared by multiple types */ +struct bl_aux_param_uint64 { + struct bl_aux_param_header h; + uint64_t value; +}; + +struct bl_aux_gpio_info { + uint8_t polarity; + uint8_t direction; + uint8_t pull_mode; + uint8_t reserved; + uint32_t index; +}; + +struct bl_aux_param_gpio { + struct bl_aux_param_header h; + struct bl_aux_gpio_info gpio; +}; + +#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_LIB_BL_AUX_PARAMS_EXP_H */ diff --git a/include/export/lib/utils_def_exp.h b/include/export/lib/utils_def_exp.h new file mode 100644 index 0000000..86c409c --- /dev/null +++ b/include/export/lib/utils_def_exp.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_LIB_UTILS_DEF_EXP_H +#define ARM_TRUSTED_FIRMWARE_EXPORT_LIB_UTILS_DEF_EXP_H + +/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */ + +/* + * For those constants to be shared between C and other sources, apply a 'U', + * 'UL', 'ULL', 'L' or 'LL' suffix to the argument only in C, to avoid + * undefined or unintended behaviour. + * + * The GNU assembler and linker do not support these suffixes (it causes the + * build process to fail) therefore the suffix is omitted when used in linker + * scripts and assembler files. +*/ +#if defined(__ASSEMBLER__) +# define U(_x) (_x) +# define UL(_x) (_x) +# define ULL(_x) (_x) +# define L(_x) (_x) +# define LL(_x) (_x) +#else +# define U(_x) (_x##U) +# define UL(_x) (_x##UL) +# define ULL(_x) (_x##ULL) +# define L(_x) (_x##L) +# define LL(_x) (_x##LL) +#endif + +#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_LIB_UTILS_DEF_EXP_H */ diff --git a/include/export/plat/rockchip/common/plat_params_exp.h b/include/export/plat/rockchip/common/plat_params_exp.h new file mode 100644 index 0000000..ccc9cd9 --- /dev/null +++ b/include/export/plat/rockchip/common/plat_params_exp.h @@ -0,0 +1,35 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#ifndef ARM_TRUSTED_FIRMWARE_EXPORT_PLAT_ROCKCHIP_COMMON_PLAT_PARAMS_EXP_H +#define ARM_TRUSTED_FIRMWARE_EXPORT_PLAT_ROCKCHIP_COMMON_PLAT_PARAMS_EXP_H + +/* EXPORT HEADER -- See include/export/README for details! -- EXPORT HEADER */ + +#include "../../../lib/bl_aux_params/bl_aux_params_exp.h" + +/* param type */ +enum bl_aux_rk_param_type { + BL_AUX_PARAM_RK_RESET_GPIO = BL_AUX_PARAM_VENDOR_SPECIFIC_FIRST, + BL_AUX_PARAM_RK_POWEROFF_GPIO, + BL_AUX_PARAM_RK_SUSPEND_GPIO, + BL_AUX_PARAM_RK_SUSPEND_APIO, +}; + +struct bl_aux_rk_apio_info { + uint8_t apio1 : 1; + uint8_t apio2 : 1; + uint8_t apio3 : 1; + uint8_t apio4 : 1; + uint8_t apio5 : 1; +}; + +struct bl_aux_param_rk_apio { + struct bl_aux_param_header h; + struct bl_aux_rk_apio_info apio; +}; + +#endif /* ARM_TRUSTED_FIRMWARE_EXPORT_PLAT_ROCKCHIP_COMMON_PLAT_PARAMS_EXP_H */ diff --git a/include/lib/bl_aux_params/bl_aux_params.h b/include/lib/bl_aux_params/bl_aux_params.h new file mode 100644 index 0000000..f6ce802 --- /dev/null +++ b/include/lib/bl_aux_params/bl_aux_params.h @@ -0,0 +1,30 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ +#ifndef LIB_BL_AUX_PARAMS_H +#define LIB_BL_AUX_PARAMS_H + +#include +#include + +#include + +/* + * Handler function that handles an individual aux parameter. Return true if + * the parameter was handled, and flase if bl_aux_params_parse() should make its + * own attempt at handling it (for generic parameters). + */ +typedef bool (*bl_aux_param_handler_t)(struct bl_aux_param_header *param); + +/* + * Interprets head as the start of an aux parameter list, and passes the + * parameters individually to handler(). Handles generic parameters directly if + * handler() hasn't already done so. If only generic parameters are expected, + * handler() can be NULL. + */ +void bl_aux_params_parse(u_register_t head, + bl_aux_param_handler_t handler); + +#endif /* LIB_BL_AUX_PARAMS_H */ diff --git a/include/lib/utils_def.h b/include/lib/utils_def.h index 2b48967..41f71e8 100644 --- a/include/lib/utils_def.h +++ b/include/lib/utils_def.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -7,6 +7,8 @@ #ifndef UTILS_DEF_H #define UTILS_DEF_H +#include + /* Compute the number of elements in the given array */ #define ARRAY_SIZE(a) \ (sizeof(a) / sizeof((a)[0])) @@ -106,29 +108,6 @@ #define check_u32_overflow(_u32, _inc) \ ((_u32) > (UINT32_MAX - (_inc))) -/* - * For those constants to be shared between C and other sources, apply a 'U', - * 'UL', 'ULL', 'L' or 'LL' suffix to the argument only in C, to avoid - * undefined or unintended behaviour. - * - * The GNU assembler and linker do not support these suffixes (it causes the - * build process to fail) therefore the suffix is omitted when used in linker - * scripts and assembler files. -*/ -#if defined(__LINKER__) || defined(__ASSEMBLY__) -# define U(_x) (_x) -# define UL(_x) (_x) -# define ULL(_x) (_x) -# define L(_x) (_x) -# define LL(_x) (_x) -#else -# define U(_x) (_x##U) -# define UL(_x) (_x##UL) -# define ULL(_x) (_x##ULL) -# define L(_x) (_x##L) -# define LL(_x) (_x##LL) -#endif - /* Register size of the current architecture. */ #ifdef AARCH32 #define REGSZ U(4) diff --git a/lib/bl_aux_params/bl_aux_params.c b/lib/bl_aux_params/bl_aux_params.c new file mode 100644 index 0000000..7a8115c --- /dev/null +++ b/lib/bl_aux_params/bl_aux_params.c @@ -0,0 +1,33 @@ +/* + * Copyright (c) 2019, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include +#include +#include + +void bl_aux_params_parse(u_register_t head, + bl_aux_param_handler_t handler) +{ + struct bl_aux_param_header *p; + + for (p = (void *)head; p; p = (void *)(uintptr_t)p->next) { + if (handler && handler(p)) + continue; + + switch (p->type) { +#if COREBOOT + case BL_AUX_PARAM_COREBOOT_TABLE: + coreboot_table_setup((void *)(uintptr_t) + ((struct bl_aux_param_uint64 *)p)->value); + break; +#endif + default: + ERROR("Ignoring unknown BL aux parameter: 0x%llx", + p->type); + break; + } + } +} diff --git a/plat/hisilicon/poplar/bl31_plat_setup.c b/plat/hisilicon/poplar/bl31_plat_setup.c index f81078f..981ef37 100644 --- a/plat/hisilicon/poplar/bl31_plat_setup.c +++ b/plat/hisilicon/poplar/bl31_plat_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -130,6 +130,6 @@ BL_COHERENT_RAM_BASE, BL_COHERENT_RAM_END); - INFO("Boot BL33 from 0x%lx for %lu Bytes\n", + INFO("Boot BL33 from 0x%lx for %llu Bytes\n", bl33_image_ep_info.pc, bl33_image_ep_info.args.arg2); } diff --git a/plat/mediatek/mt8173/bl31_plat_setup.c b/plat/mediatek/mt8173/bl31_plat_setup.c index dd23e63..ad81b16 100644 --- a/plat/mediatek/mt8173/bl31_plat_setup.c +++ b/plat/mediatek/mt8173/bl31_plat_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -79,6 +80,7 @@ entry_point_info_t *next_image_info; next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; + assert(next_image_info->h.type == PARAM_EP); /* None of the images on this platform can have 0x0 as the entrypoint */ if (next_image_info->pc) @@ -98,18 +100,11 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3) { - struct mtk_bl31_params *arg_from_bl2 = (struct mtk_bl31_params *)arg0; - console_init(MT8173_UART0_BASE, MT8173_UART_CLOCK, MT8173_BAUDRATE); VERBOSE("bl31_setup\n"); - assert(arg_from_bl2 != NULL); - assert(arg_from_bl2->h.type == PARAM_BL31); - assert(arg_from_bl2->h.version >= VERSION_1); - - bl32_ep_info = *arg_from_bl2->bl32_ep_info; - bl33_ep_info = *arg_from_bl2->bl33_ep_info; + bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); } /******************************************************************************* diff --git a/plat/mediatek/mt8173/platform.mk b/plat/mediatek/mt8173/platform.mk index 0726efe..24e4ec6 100644 --- a/plat/mediatek/mt8173/platform.mk +++ b/plat/mediatek/mt8173/platform.mk @@ -23,7 +23,8 @@ plat/arm/common/arm_gicv2.c \ plat/common/plat_gicv2.c -BL31_SOURCES += drivers/arm/cci/cci.c \ +BL31_SOURCES += common/desc_image_load.c \ + drivers/arm/cci/cci.c \ drivers/arm/gic/common/gic_common.c \ drivers/arm/gic/v2/gicv2_main.c \ drivers/arm/gic/v2/gicv2_helpers.c \ diff --git a/plat/mediatek/mt8183/bl31_plat_setup.c b/plat/mediatek/mt8183/bl31_plat_setup.c index b451189..e623e96 100644 --- a/plat/mediatek/mt8183/bl31_plat_setup.c +++ b/plat/mediatek/mt8183/bl31_plat_setup.c @@ -7,6 +7,7 @@ #include #include #include +#include #include #include #include @@ -50,6 +51,7 @@ entry_point_info_t *next_image_info; next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; + assert(next_image_info->h.type == PARAM_EP); /* None of the images on this platform can have 0x0 as the entrypoint */ if (next_image_info->pc) @@ -69,19 +71,13 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1, u_register_t arg2, u_register_t arg3) { - struct mtk_bl31_params *arg_from_bl2 = (struct mtk_bl31_params *)arg0; static console_16550_t console; console_16550_register(UART0_BASE, UART_CLOCK, UART_BAUDRATE, &console); NOTICE("MT8183 bl31_setup\n"); - assert(arg_from_bl2 != NULL); - assert(arg_from_bl2->h.type == PARAM_BL31); - assert(arg_from_bl2->h.version >= VERSION_1); - - bl32_ep_info = *arg_from_bl2->bl32_ep_info; - bl33_ep_info = *arg_from_bl2->bl33_ep_info; + bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); } diff --git a/plat/mediatek/mt8183/platform.mk b/plat/mediatek/mt8183/platform.mk index 8c8e2fe..f0a598a 100644 --- a/plat/mediatek/mt8183/platform.mk +++ b/plat/mediatek/mt8183/platform.mk @@ -16,7 +16,8 @@ plat/common/plat_psci_common.c \ plat/common/aarch64/crash_console_helpers.S -BL31_SOURCES += drivers/arm/cci/cci.c \ +BL31_SOURCES += common/desc_image_load.c \ + drivers/arm/cci/cci.c \ drivers/arm/gic/common/gic_common.c \ drivers/arm/gic/v3/arm_gicv3_common.c \ drivers/arm/gic/v3/gicv3_helpers.c \ diff --git a/plat/rockchip/common/bl31_plat_setup.c b/plat/rockchip/common/bl31_plat_setup.c index 18f8dd9..a13ee49 100644 --- a/plat/rockchip/common/bl31_plat_setup.c +++ b/plat/rockchip/common/bl31_plat_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -10,6 +10,7 @@ #include #include +#include #include #include #include @@ -32,6 +33,7 @@ entry_point_info_t *next_image_info; next_image_info = (type == NON_SECURE) ? &bl33_ep_info : &bl32_ep_info; + assert(next_image_info->h.type == PARAM_EP); /* None of the images on this platform can have 0x0 as the entrypoint */ if (next_image_info->pc) @@ -41,7 +43,7 @@ } #pragma weak params_early_setup -void params_early_setup(void *plat_param_from_bl2) +void params_early_setup(u_register_t plat_param_from_bl2) { } @@ -57,10 +59,8 @@ u_register_t arg2, u_register_t arg3) { static console_16550_t console; - struct rockchip_bl31_params *arg_from_bl2 = (struct rockchip_bl31_params *) arg0; - void *plat_params_from_bl2 = (void *) arg1; - params_early_setup(plat_params_from_bl2); + params_early_setup(arg1); #if COREBOOT if (coreboot_serial.type) @@ -75,14 +75,7 @@ VERBOSE("bl31_setup\n"); - /* Passing a NULL context is a critical programming error */ - assert(arg_from_bl2); - - assert(arg_from_bl2->h.type == PARAM_BL31); - assert(arg_from_bl2->h.version >= VERSION_1); - - bl32_ep_info = *arg_from_bl2->bl32_ep_info; - bl33_ep_info = *arg_from_bl2->bl33_ep_info; + bl31_params_parse_helper(arg0, &bl32_ep_info, &bl33_ep_info); } /******************************************************************************* diff --git a/plat/rockchip/common/include/plat_params.h b/plat/rockchip/common/include/plat_params.h index 1ec02f5..95b850f 100644 --- a/plat/rockchip/common/include/plat_params.h +++ b/plat/rockchip/common/include/plat_params.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -9,90 +9,6 @@ #include -/* - * We defined several plat parameter structs for BL2 to pass platform related - * parameters to Rockchip BL31 platform code. All plat parameters start with - * a common header, which has a type field to indicate the parameter type, and - * a next pointer points to next parameter. If the parameter is the last one in - * the list, next pointer will points to NULL. After the header comes the - * variable-sized members that describe the parameter. The picture below shows - * how the parameters are kept in memory. - * - * head of list ---> +----------------+ --+ - * | type | | - * +----------------+ |--> struct bl31_plat_param - * +----| next | | - * | +----------------+ --+ - * | | parameter data | - * | +----------------+ - * | - * +--> +----------------+ --+ - * | type | | - * +----------------+ |--> struct bl31_plat_param - * NULL <---| next | | - * +----------------+ --+ - * | parameter data | - * +----------------+ - * - * Note: The SCTLR_EL3.A bit (Alignment fault check enable) of ARM TF is set, - * so be sure each parameter struct starts on 64-bit aligned address. If not, - * alignment fault will occur during accessing its data member. - */ - -#define BL31_GPIO_DIR_OUT 0 -#define BL31_GPIO_DIR_IN 1 - -#define BL31_GPIO_LEVEL_LOW 0 -#define BL31_GPIO_LEVEL_HIGH 1 - -#define BL31_GPIO_PULL_NONE 0 -#define BL31_GPIO_PULL_UP 1 -#define BL31_GPIO_PULL_DOWN 2 - -/* param type */ -enum { - PARAM_NONE = 0, - PARAM_RESET, - PARAM_POWEROFF, - PARAM_SUSPEND_GPIO, - PARAM_SUSPEND_APIO, - PARAM_COREBOOT_TABLE, -}; - -struct apio_info { - uint8_t apio1 : 1; - uint8_t apio2 : 1; - uint8_t apio3 : 1; - uint8_t apio4 : 1; - uint8_t apio5 : 1; -}; - -struct gpio_info { - uint8_t polarity; - uint8_t direction; - uint8_t pull_mode; - uint32_t index; -}; - -/* common header for all plat parameter type */ -struct bl31_plat_param { - uint64_t type; - void *next; -}; - -struct bl31_gpio_param { - struct bl31_plat_param h; - struct gpio_info gpio; -}; - -struct bl31_apio_param { - struct bl31_plat_param h; - struct apio_info apio; -}; - -struct bl31_u64_param { - struct bl31_plat_param h; - uint64_t value; -}; +#include #endif /* PLAT_PARAMS_H */ diff --git a/plat/rockchip/common/include/plat_private.h b/plat/rockchip/common/include/plat_private.h index c0ebefc..66b6185 100644 --- a/plat/rockchip/common/include/plat_private.h +++ b/plat/rockchip/common/include/plat_private.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2014-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -14,6 +14,7 @@ #include #include #include +#include #define __sramdata __attribute__((section(".sram.data"))) #define __sramconst __attribute__((section(".sram.rodata"))) @@ -30,15 +31,6 @@ extern uint32_t __sram_incbin_start, __sram_incbin_end; extern uint32_t __sram_incbin_real_end; -struct rockchip_bl31_params { - param_header_t h; - image_info_t *bl31_image_info; - entry_point_info_t *bl32_ep_info; - image_info_t *bl32_image_info; - entry_point_info_t *bl33_ep_info; - image_info_t *bl33_image_info; -}; - /****************************************************************************** * The register have write-mask bits, it is mean, if you want to set the bits, * you needs set the write-mask bits at the same time, @@ -94,7 +86,7 @@ void plat_delay_timer_init(void); -void params_early_setup(void *plat_params_from_bl2); +void params_early_setup(u_register_t plat_params_from_bl2); void plat_rockchip_gic_driver_init(void); void plat_rockchip_gic_init(void); @@ -108,10 +100,10 @@ void platform_cpu_warmboot(void); -struct gpio_info *plat_get_rockchip_gpio_reset(void); -struct gpio_info *plat_get_rockchip_gpio_poweroff(void); -struct gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count); -struct apio_info *plat_get_rockchip_suspend_apio(void); +struct bl_aux_gpio_info *plat_get_rockchip_gpio_reset(void); +struct bl_aux_gpio_info *plat_get_rockchip_gpio_poweroff(void); +struct bl_aux_gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count); +struct bl_aux_rk_apio_info *plat_get_rockchip_suspend_apio(void); void plat_rockchip_gpio_init(void); void plat_rockchip_save_gpio(void); void plat_rockchip_restore_gpio(void); diff --git a/plat/rockchip/common/params_setup.c b/plat/rockchip/common/params_setup.c index 8a743bf..d0fea4f 100644 --- a/plat/rockchip/common/params_setup.c +++ b/plat/rockchip/common/params_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,6 +8,7 @@ #include #include +#include #include #include #include @@ -20,14 +21,11 @@ #include #include -static struct gpio_info param_reset; -static struct gpio_info param_poweroff; -static struct bl31_apio_param param_apio; -static struct gpio_info *rst_gpio; -static struct gpio_info *poweroff_gpio; -static struct gpio_info suspend_gpio[10]; +static struct bl_aux_gpio_info rst_gpio; +static struct bl_aux_gpio_info poweroff_gpio; +static struct bl_aux_gpio_info suspend_gpio[10]; uint32_t suspend_gpio_cnt; -static struct apio_info *suspend_apio; +static struct bl_aux_rk_apio_info suspend_apio; static uint32_t rk_uart_base = PLAT_RK_UART_BASE; uint32_t rockchip_get_uart_base(void) @@ -36,7 +34,7 @@ } #if COREBOOT -static int dt_process_fdt(void *blob) +static int dt_process_fdt(u_register_t param_from_bl2) { return -ENODEV; } @@ -105,12 +103,12 @@ rk_uart_base = uart_base; } -static int dt_process_fdt(void *blob) +static int dt_process_fdt(u_register_t param_from_bl2) { void *fdt = plat_get_fdt(); int ret; - ret = fdt_open_into(blob, fdt, 0x10000); + ret = fdt_open_into((void *)param_from_bl2, fdt, 0x10000); if (ret < 0) return ret; @@ -120,33 +118,56 @@ } #endif -struct gpio_info *plat_get_rockchip_gpio_reset(void) +struct bl_aux_gpio_info *plat_get_rockchip_gpio_reset(void) { - return rst_gpio; + return &rst_gpio; } -struct gpio_info *plat_get_rockchip_gpio_poweroff(void) +struct bl_aux_gpio_info *plat_get_rockchip_gpio_poweroff(void) { - return poweroff_gpio; + return &poweroff_gpio; } -struct gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count) +struct bl_aux_gpio_info *plat_get_rockchip_suspend_gpio(uint32_t *count) { *count = suspend_gpio_cnt; return &suspend_gpio[0]; } -struct apio_info *plat_get_rockchip_suspend_apio(void) +struct bl_aux_rk_apio_info *plat_get_rockchip_suspend_apio(void) { - return suspend_apio; + return &suspend_apio; } -void params_early_setup(void *plat_param_from_bl2) +static bool rk_aux_param_handler(struct bl_aux_param_header *param) { - struct bl31_plat_param *bl2_param; - struct bl31_gpio_param *gpio_param; + /* Store platform parameters for later processing if needed. */ + switch (param->type) { + case BL_AUX_PARAM_RK_RESET_GPIO: + rst_gpio = ((struct bl_aux_param_gpio *)param)->gpio; + return true; + case BL_AUX_PARAM_RK_POWEROFF_GPIO: + poweroff_gpio = ((struct bl_aux_param_gpio *)param)->gpio; + return true; + case BL_AUX_PARAM_RK_SUSPEND_GPIO: + if (suspend_gpio_cnt >= ARRAY_SIZE(suspend_gpio)) { + ERROR("Exceeded the supported suspend GPIO number.\n"); + return true; + } + suspend_gpio[suspend_gpio_cnt++] = + ((struct bl_aux_param_gpio *)param)->gpio; + return true; + case BL_AUX_PARAM_RK_SUSPEND_APIO: + suspend_apio = ((struct bl_aux_param_rk_apio *)param)->apio; + return true; + } + return false; +} + +void params_early_setup(u_register_t plat_param_from_bl2) +{ /* * Test if this is a FDT passed as a platform-specific parameter * block. @@ -154,49 +175,5 @@ if (!dt_process_fdt(plat_param_from_bl2)) return; - /* keep plat parameters for later processing if need */ - bl2_param = (struct bl31_plat_param *)plat_param_from_bl2; - while (bl2_param) { - switch (bl2_param->type) { - case PARAM_RESET: - gpio_param = (struct bl31_gpio_param *)bl2_param; - memcpy(¶m_reset, &gpio_param->gpio, - sizeof(struct gpio_info)); - rst_gpio = ¶m_reset; - break; - case PARAM_POWEROFF: - gpio_param = (struct bl31_gpio_param *)bl2_param; - memcpy(¶m_poweroff, &gpio_param->gpio, - sizeof(struct gpio_info)); - poweroff_gpio = ¶m_poweroff; - break; - case PARAM_SUSPEND_GPIO: - if (suspend_gpio_cnt >= ARRAY_SIZE(suspend_gpio)) { - ERROR("exceed support suspend gpio number\n"); - break; - } - gpio_param = (struct bl31_gpio_param *)bl2_param; - memcpy(&suspend_gpio[suspend_gpio_cnt], - &gpio_param->gpio, - sizeof(struct gpio_info)); - suspend_gpio_cnt++; - break; - case PARAM_SUSPEND_APIO: - memcpy(¶m_apio, bl2_param, - sizeof(struct bl31_apio_param)); - suspend_apio = ¶m_apio.apio; - break; -#if COREBOOT - case PARAM_COREBOOT_TABLE: - coreboot_table_setup((void *) - ((struct bl31_u64_param *)bl2_param)->value); - break; -#endif - default: - ERROR("not expected type found %lld\n", - bl2_param->type); - break; - } - bl2_param = bl2_param->next; - } + bl_aux_params_parse(plat_param_from_bl2, rk_aux_param_handler); } diff --git a/plat/rockchip/common/sp_min_plat_setup.c b/plat/rockchip/common/sp_min_plat_setup.c index 7cdbaba..7b1a0b5 100644 --- a/plat/rockchip/common/sp_min_plat_setup.c +++ b/plat/rockchip/common/sp_min_plat_setup.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016-2018, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -40,7 +41,7 @@ } #pragma weak params_early_setup -void params_early_setup(void *plat_param_from_bl2) +void params_early_setup(u_register_t plat_param_from_bl2) { } @@ -53,10 +54,8 @@ u_register_t arg2, u_register_t arg3) { static console_16550_t console; - struct rockchip_bl31_params *arg_from_bl2 = (struct rockchip_bl31_params *) arg0; - void *plat_params_from_bl2 = (void *) arg1; - params_early_setup(plat_params_from_bl2); + params_early_setup(arg1); #if COREBOOT if (coreboot_serial.type) @@ -70,13 +69,7 @@ #endif VERBOSE("sp_min_setup\n"); - /* Passing a NULL context is a critical programming error */ - assert(arg_from_bl2); - - assert(arg_from_bl2->h.type == PARAM_BL31); - assert(arg_from_bl2->h.version >= VERSION_1); - - bl33_ep_info = *arg_from_bl2->bl33_ep_info; + bl31_params_parse_helper(arg0, NULL, &bl33_ep_info); } /******************************************************************************* diff --git a/plat/rockchip/rk3288/platform.mk b/plat/rockchip/rk3288/platform.mk index 1811b3a..faf7a15 100644 --- a/plat/rockchip/rk3288/platform.mk +++ b/plat/rockchip/rk3288/platform.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -30,7 +30,9 @@ plat/common/plat_gicv2.c \ ${RK_PLAT}/common/rockchip_gicv2.c -PLAT_BL_COMMON_SOURCES := plat/common/aarch32/crash_console_helpers.S \ +PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \ + lib/bl_aux_params/bl_aux_params.c \ + plat/common/aarch32/crash_console_helpers.S \ plat/common/plat_psci_common.c PLAT_BL_COMMON_SOURCES += lib/xlat_tables/xlat_tables_common.c \ diff --git a/plat/rockchip/rk3328/platform.mk b/plat/rockchip/rk3328/platform.mk index fa207aa..0da4f2d 100644 --- a/plat/rockchip/rk3328/platform.mk +++ b/plat/rockchip/rk3328/platform.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2017-2019, ARM Limited and Contributors. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -28,7 +28,9 @@ plat/common/plat_gicv2.c \ ${RK_PLAT}/common/rockchip_gicv2.c -PLAT_BL_COMMON_SOURCES := lib/xlat_tables/aarch64/xlat_tables.c \ +PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \ + lib/bl_aux_params/bl_aux_params.c \ + lib/xlat_tables/aarch64/xlat_tables.c \ lib/xlat_tables/xlat_tables_common.c \ plat/common/aarch64/crash_console_helpers.S \ plat/common/plat_psci_common.c diff --git a/plat/rockchip/rk3368/platform.mk b/plat/rockchip/rk3368/platform.mk index f8878f1..cb0cb89 100644 --- a/plat/rockchip/rk3368/platform.mk +++ b/plat/rockchip/rk3368/platform.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -26,7 +26,9 @@ plat/common/plat_gicv2.c \ ${RK_PLAT}/common/rockchip_gicv2.c -PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ +PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \ + lib/bl_aux_params/bl_aux_params.c \ + lib/xlat_tables/xlat_tables_common.c \ lib/xlat_tables/aarch64/xlat_tables.c \ plat/common/aarch64/crash_console_helpers.S \ plat/common/plat_psci_common.c diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.c b/plat/rockchip/rk3399/drivers/pmu/pmu.c index 42589b9..a6b5973 100644 --- a/plat/rockchip/rk3399/drivers/pmu/pmu.c +++ b/plat/rockchip/rk3399/drivers/pmu/pmu.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -890,7 +890,7 @@ static void suspend_apio(void) { - struct apio_info *suspend_apio; + struct bl_aux_rk_apio_info *suspend_apio; int i; suspend_apio = plat_get_rockchip_suspend_apio(); @@ -1010,7 +1010,7 @@ static void resume_apio(void) { - struct apio_info *suspend_apio; + struct bl_aux_rk_apio_info *suspend_apio; int i; suspend_apio = plat_get_rockchip_suspend_apio(); @@ -1038,7 +1038,7 @@ static void suspend_gpio(void) { - struct gpio_info *suspend_gpio; + struct bl_aux_gpio_info *suspend_gpio; uint32_t count; int i; @@ -1053,7 +1053,7 @@ static void resume_gpio(void) { - struct gpio_info *suspend_gpio; + struct bl_aux_gpio_info *suspend_gpio; uint32_t count; int i; @@ -1491,7 +1491,7 @@ void __dead2 rockchip_soc_soft_reset(void) { - struct gpio_info *rst_gpio; + struct bl_aux_gpio_info *rst_gpio; rst_gpio = plat_get_rockchip_gpio_reset(); @@ -1508,7 +1508,7 @@ void __dead2 rockchip_soc_system_off(void) { - struct gpio_info *poweroff_gpio; + struct bl_aux_gpio_info *poweroff_gpio; poweroff_gpio = plat_get_rockchip_gpio_poweroff(); diff --git a/plat/rockchip/rk3399/drivers/pmu/pmu.h b/plat/rockchip/rk3399/drivers/pmu/pmu.h index e1ba410..74db82f 100644 --- a/plat/rockchip/rk3399/drivers/pmu/pmu.h +++ b/plat/rockchip/rk3399/drivers/pmu/pmu.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2016, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ diff --git a/plat/rockchip/rk3399/platform.mk b/plat/rockchip/rk3399/platform.mk index 1d81d7e..cfc48e8 100644 --- a/plat/rockchip/rk3399/platform.mk +++ b/plat/rockchip/rk3399/platform.mk @@ -1,5 +1,5 @@ # -# Copyright (c) 2016-2017, ARM Limited and Contributors. All rights reserved. +# Copyright (c) 2016-2019, ARM Limited and Contributors. All rights reserved. # # SPDX-License-Identifier: BSD-3-Clause # @@ -32,7 +32,9 @@ plat/common/plat_gicv3.c \ ${RK_PLAT}/common/rockchip_gicv3.c -PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ +PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \ + lib/bl_aux_params/bl_aux_params.c \ + lib/xlat_tables/xlat_tables_common.c \ lib/xlat_tables/aarch64/xlat_tables.c \ plat/common/aarch64/crash_console_helpers.S \ plat/common/plat_psci_common.c