diff --git a/plat/st/stm32mp1/bl2_io_storage.c b/plat/st/stm32mp1/bl2_io_storage.c index 7346c0c..9a02312 100644 --- a/plat/st/stm32mp1/bl2_io_storage.c +++ b/plat/st/stm32mp1/bl2_io_storage.c @@ -8,12 +8,18 @@ #include #include #include +#include #include #include +#include +#include #include +#include #include +#include #include #include +#include #include #include #include @@ -24,6 +30,50 @@ static uintptr_t dummy_dev_handle; static uintptr_t dummy_dev_spec; +static uintptr_t image_dev_handle; + +static io_block_spec_t gpt_block_spec = { + .offset = 0, + .length = 34 * MMC_BLOCK_SIZE, /* Size of GPT table */ +}; + +uint32_t block_buffer[MMC_BLOCK_SIZE] __aligned(MMC_BLOCK_SIZE); + +static const io_block_dev_spec_t mmc_block_dev_spec = { + /* It's used as temp buffer in block driver */ + .buffer = { + .offset = (size_t)&block_buffer, + .length = MMC_BLOCK_SIZE, + }, + .ops = { + .read = mmc_read_blocks, + .write = NULL, + }, + .block_size = MMC_BLOCK_SIZE, +}; + +static uintptr_t storage_dev_handle; +static const io_dev_connector_t *mmc_dev_con; + +#define IMG_IDX_BL33 0 + +static const struct stm32image_part_info bl33_partition_spec = { + .name = BL33_IMAGE_NAME, + .binary_type = BL33_BINARY_TYPE, +}; + +static struct stm32image_device_info stm32image_dev_info_spec = { + .lba_size = MMC_BLOCK_SIZE, + .part_info[IMG_IDX_BL33] = { + .name = BL33_IMAGE_NAME, + .binary_type = BL33_BINARY_TYPE, + }, +}; + +static io_block_spec_t stm32image_block_spec; + +static const io_dev_connector_t *stm32image_dev_con; + static const io_block_spec_t bl32_block_spec = { .offset = BL32_BASE, .length = STM32MP1_BL32_SIZE @@ -35,6 +85,8 @@ }; static int open_dummy(const uintptr_t spec); +static int open_image(const uintptr_t spec); +static int open_storage(const uintptr_t spec); struct plat_io_policy { uintptr_t *dev_handle; @@ -53,6 +105,21 @@ .image_spec = (uintptr_t)&bl32_block_spec, .check = open_dummy }, + [BL33_IMAGE_ID] = { + .dev_handle = &image_dev_handle, + .image_spec = (uintptr_t)&bl33_partition_spec, + .check = open_image + }, + [GPT_IMAGE_ID] = { + .dev_handle = &storage_dev_handle, + .image_spec = (uintptr_t)&gpt_block_spec, + .check = open_storage + }, + [STM32_IMAGE_ID] = { + .dev_handle = &storage_dev_handle, + .image_spec = (uintptr_t)&stm32image_block_spec, + .check = open_storage + } }; static int open_dummy(const uintptr_t spec) @@ -60,6 +127,16 @@ return io_dev_init(dummy_dev_handle, 0); } +static int open_image(const uintptr_t spec) +{ + return io_dev_init(image_dev_handle, 0); +} + +static int open_storage(const uintptr_t spec) +{ + return io_dev_init(storage_dev_handle, 0); +} + static void print_boot_device(boot_api_context_t *boot_context) { switch (boot_context->boot_interface_selected) { @@ -149,6 +226,9 @@ void stm32mp1_io_setup(void) { int io_result __unused; + struct stm32_sdmmc2_params params; + struct mmc_device_info device_info; + uintptr_t mmc_default_instance; boot_api_context_t *boot_context = (boot_api_context_t *)stm32mp1_get_boot_ctx_address(); @@ -168,6 +248,93 @@ io_result = io_dev_open(dummy_dev_con, dummy_dev_spec, &dummy_dev_handle); assert(io_result == 0); + + switch (boot_context->boot_interface_selected) { + case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_SD: + case BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC: + dmb(); + + memset(¶ms, 0, sizeof(struct stm32_sdmmc2_params)); + + if (boot_context->boot_interface_selected == + BOOT_API_CTX_BOOT_INTERFACE_SEL_FLASH_EMMC) { + device_info.mmc_dev_type = MMC_IS_EMMC; + mmc_default_instance = STM32MP1_SDMMC2_BASE; + } else { + device_info.mmc_dev_type = MMC_IS_SD; + mmc_default_instance = STM32MP1_SDMMC1_BASE; + } + + switch (boot_context->boot_interface_instance) { + case 1: + params.reg_base = STM32MP1_SDMMC1_BASE; + break; + case 2: + params.reg_base = STM32MP1_SDMMC2_BASE; + break; + case 3: + params.reg_base = STM32MP1_SDMMC3_BASE; + break; + default: + WARN("SDMMC instance not found, using default\n"); + params.reg_base = mmc_default_instance; + break; + } + + params.device_info = &device_info; + stm32_sdmmc2_mmc_init(¶ms); + + /* Open MMC as a block device to read GPT table */ + io_result = register_io_dev_block(&mmc_dev_con); + if (io_result != 0) { + panic(); + } + + io_result = io_dev_open(mmc_dev_con, + (uintptr_t)&mmc_block_dev_spec, + &storage_dev_handle); + assert(io_result == 0); + + partition_init(GPT_IMAGE_ID); + + io_result = io_dev_close(storage_dev_handle); + assert(io_result == 0); + + stm32image_dev_info_spec.device_size = + stm32_sdmmc2_mmc_get_device_size(); + stm32image_dev_info_spec.part_info[IMG_IDX_BL33].part_offset = + get_partition_entry(BL33_IMAGE_NAME)->start; + stm32image_dev_info_spec.part_info[IMG_IDX_BL33].bkp_offset = + get_partition_entry(BL33_IMAGE_NAME)->length; + + stm32image_block_spec.offset = 0; + stm32image_block_spec.length = + get_partition_entry(BL33_IMAGE_NAME)->length; + + /* + * Re-open MMC with io_mmc, for better perfs compared to + * io_block. + */ + io_result = register_io_dev_mmc(&mmc_dev_con); + assert(io_result == 0); + + io_result = io_dev_open(mmc_dev_con, 0, &storage_dev_handle); + assert(io_result == 0); + + io_result = register_io_dev_stm32image(&stm32image_dev_con); + assert(io_result == 0); + + io_result = io_dev_open(stm32image_dev_con, + (uintptr_t)&stm32image_dev_info_spec, + &image_dev_handle); + assert(io_result == 0); + break; + + default: + ERROR("Boot interface %d not supported\n", + boot_context->boot_interface_selected); + break; + } } /* diff --git a/plat/st/stm32mp1/include/boot_api.h b/plat/st/stm32mp1/include/boot_api.h index 71c3593..e019cff 100644 --- a/plat/st/stm32mp1/include/boot_api.h +++ b/plat/st/stm32mp1/include/boot_api.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2017, STMicroelectronics - All Rights Reserved + * Copyright (c) 2017-2018, STMicroelectronics - All Rights Reserved * * SPDX-License-Identifier: BSD-3-Clause */ @@ -8,6 +8,7 @@ #define __BOOT_API_H #include +#include /* * Possible value of boot context field 'boot_interface_sel' @@ -229,7 +230,9 @@ */ uint8_t ecc_pubk[BOOT_API_ECDSA_PUB_KEY_LEN_IN_BYTES]; /* Pad up to 256 byte total size */ - uint8_t pad[84]; + uint8_t pad[83]; + /* Add binary type information */ + uint8_t binary_type; } __packed boot_api_image_header_t; #endif /* __BOOT_API_H */ diff --git a/plat/st/stm32mp1/include/platform_def.h b/plat/st/stm32mp1/include/platform_def.h index 47e1ffc..2ba6cc6 100644 --- a/plat/st/stm32mp1/include/platform_def.h +++ b/plat/st/stm32mp1/include/platform_def.h @@ -26,6 +26,7 @@ /* SSBL = second stage boot loader */ #define BL33_IMAGE_NAME "ssbl" +#define BL33_BINARY_TYPE U(0x0) #define STM32MP1_PRIMARY_CPU U(0x0) @@ -39,6 +40,7 @@ #define MAX_IO_DEVICES 4 #define MAX_IO_HANDLES 4 +#define MAX_IO_BLOCK_DEVICES 1 /******************************************************************************* * BL2 specific defines. diff --git a/plat/st/stm32mp1/platform.mk b/plat/st/stm32mp1/platform.mk index 30b2932..678a852 100644 --- a/plat/st/stm32mp1/platform.mk +++ b/plat/st/stm32mp1/platform.mk @@ -14,8 +14,15 @@ # Not needed for Cortex-A7 WORKAROUND_CVE_2017_5715:= 0 +# Number of TF-A copies in the device +STM32_TF_A_COPIES := 2 +$(eval $(call add_define,STM32_TF_A_COPIES)) +PLAT_PARTITION_MAX_ENTRIES := $(shell echo $$(($(STM32_TF_A_COPIES) + 1))) +$(eval $(call add_define,PLAT_PARTITION_MAX_ENTRIES)) + PLAT_INCLUDES := -Iplat/st/stm32mp1/include/ PLAT_INCLUDES += -Iinclude/common/tbbr +PLAT_INCLUDES += -Iinclude/drivers/partition PLAT_INCLUDES += -Iinclude/drivers/st # Device tree @@ -56,11 +63,19 @@ plat/st/stm32mp1/stm32mp1_helper.S \ plat/st/stm32mp1/stm32mp1_security.c -BL2_SOURCES += drivers/io/io_dummy.c \ +BL2_SOURCES += drivers/io/io_block.c \ + drivers/io/io_dummy.c \ drivers/io/io_storage.c \ + drivers/st/io/io_stm32image.c \ plat/st/stm32mp1/bl2_io_storage.c \ plat/st/stm32mp1/bl2_plat_setup.c +BL2_SOURCES += drivers/mmc/mmc.c \ + drivers/partition/gpt.c \ + drivers/partition/partition.c \ + drivers/st/io/io_mmc.c \ + drivers/st/mmc/stm32_sdmmc2.c + BL2_SOURCES += drivers/st/ddr/stm32mp1_ddr.c \ drivers/st/ddr/stm32mp1_ram.c diff --git a/tools/stm32image/stm32image.c b/tools/stm32image/stm32image.c index 2607928..41024e2 100644 --- a/tools/stm32image/stm32image.c +++ b/tools/stm32image/stm32image.c @@ -22,7 +22,7 @@ #define VER_MINOR 1 #define VER_VARIANT 0 #define HEADER_VERSION_V1 0x1 -#define TF_BINARY_TYPE 0x0 +#define TF_BINARY_TYPE 0x10 /* Default option : bit0 => no signature */ #define HEADER_DEFAULT_OPTION (__cpu_to_le32(0x00000001))