diff --git a/plat/st/common/include/stm32mp_common.h b/plat/st/common/include/stm32mp_common.h index 27ddab0..fa59588 100644 --- a/plat/st/common/include/stm32mp_common.h +++ b/plat/st/common/include/stm32mp_common.h @@ -33,6 +33,10 @@ /* Check MMU status to allow spinlock use */ bool stm32mp_lock_available(void); +/* SMP protection on PWR registers access */ +void stm32mp_pwr_regs_lock(void); +void stm32mp_pwr_regs_unlock(void); + /* Get IWDG platform instance ID from peripheral IO memory base address */ uint32_t stm32_iwdg_get_instance(uintptr_t base); diff --git a/plat/st/common/stm32mp_common.c b/plat/st/common/stm32mp_common.c index 9af1564..996dd6d 100644 --- a/plat/st/common/stm32mp_common.c +++ b/plat/st/common/stm32mp_common.c @@ -13,8 +13,11 @@ #include #include #include +#include #include +static struct spinlock lock; + uintptr_t plat_get_ns_image_entrypoint(void) { return BL33_BASE; @@ -97,6 +100,20 @@ return (read_sctlr() & c_m_bits) == c_m_bits; } +void stm32mp_pwr_regs_lock(void) +{ + if (stm32mp_lock_available()) { + spin_lock(&lock); + } +} + +void stm32mp_pwr_regs_unlock(void) +{ + if (stm32mp_lock_available()) { + spin_unlock(&lock); + } +} + uintptr_t stm32_get_gpio_bank_base(unsigned int bank) { if (bank == GPIO_BANK_Z) {