diff --git a/docs/plat/socionext-uniphier.md b/docs/plat/socionext-uniphier.md index 75e6545..91d72ec 100644 --- a/docs/plat/socionext-uniphier.md +++ b/docs/plat/socionext-uniphier.md @@ -121,3 +121,10 @@ ``` SPD= BL32= ``` + +If you use TSP for BL32, `BL32=` is not required. Just add the +following: + +``` + SPD=tspd +``` diff --git a/plat/socionext/uniphier/include/platform_def.h b/plat/socionext/uniphier/include/platform_def.h index 7e603a3..b5dc16a 100644 --- a/plat/socionext/uniphier/include/platform_def.h +++ b/plat/socionext/uniphier/include/platform_def.h @@ -61,4 +61,9 @@ #define MAX_IO_DEVICES 2 #define MAX_IO_BLOCK_DEVICES 1 +#define TSP_SEC_MEM_BASE (BL32_BASE) +#define TSP_SEC_MEM_SIZE ((BL32_LIMIT) - (BL32_BASE)) +#define TSP_PROGBITS_LIMIT (UNIPHIER_BLOCK_BUF_BASE) +#define TSP_IRQ_SEC_PHY_TIMER 29 + #endif /* __PLATFORM_DEF_H__ */ diff --git a/plat/socionext/uniphier/tsp/tsp-uniphier.mk b/plat/socionext/uniphier/tsp/tsp-uniphier.mk new file mode 100644 index 0000000..54d4f51 --- /dev/null +++ b/plat/socionext/uniphier/tsp/tsp-uniphier.mk @@ -0,0 +1,9 @@ +# +# Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. +# +# SPDX-License-Identifier: BSD-3-Clause +# + +BL32_SOURCES += plat/common/plat_gicv3.c \ + plat/common/aarch64/platform_mp_stack.S \ + $(PLAT_PATH)/tsp/uniphier_tsp_setup.c diff --git a/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c b/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c new file mode 100644 index 0000000..7df17d3 --- /dev/null +++ b/plat/socionext/uniphier/tsp/uniphier_tsp_setup.c @@ -0,0 +1,28 @@ +/* + * Copyright (c) 2017, ARM Limited and Contributors. All rights reserved. + * + * SPDX-License-Identifier: BSD-3-Clause + */ + +#include +#include + +#include "../uniphier.h" + +#define BL32_END (unsigned long)(&__BL32_END__) +#define BL32_SIZE ((BL32_END) - (BL32_BASE)) + +void tsp_early_platform_setup(void) +{ + uniphier_console_setup(); +} + +void tsp_platform_setup(void) +{ +} + +void tsp_plat_arch_setup(void) +{ + uniphier_mmap_setup(BL32_BASE, BL32_SIZE, NULL); + enable_mmu_el1(0); +}