diff --git a/bl1/bl1_main.c b/bl1/bl1_main.c index ab9fa8c..5dfb564 100644 --- a/bl1/bl1_main.c +++ b/bl1/bl1_main.c @@ -50,7 +50,8 @@ unsigned long sctlr_el3 = read_sctlr(); unsigned long bl2_base; unsigned int load_type = TOP_LOAD, spsr; - meminfo bl1_tzram_layout, *bl2_tzram_layout = 0x0; + meminfo *bl1_tzram_layout; + meminfo *bl2_tzram_layout = 0x0; /* * Ensure that MMU/Caches and coherency are turned on @@ -73,8 +74,8 @@ * Find out how much free trusted ram remains after BL1 load * & load the BL2 image at its top */ - bl1_tzram_layout = bl1_get_sec_mem_layout(); - bl2_base = load_image(&bl1_tzram_layout, + bl1_tzram_layout = bl1_plat_sec_mem_layout(); + bl2_base = load_image(bl1_tzram_layout, (const char *) BL2_IMAGE_NAME, load_type, BL2_BASE); @@ -85,8 +86,8 @@ * to BL2. BL2 will read the memory layout before using its * memory for other purposes. */ - bl2_tzram_layout = (meminfo *) bl1_tzram_layout.free_base; - init_bl2_mem_layout(&bl1_tzram_layout, + bl2_tzram_layout = (meminfo *) bl1_tzram_layout->free_base; + init_bl2_mem_layout(bl1_tzram_layout, bl2_tzram_layout, load_type, bl2_base); diff --git a/bl2/bl2_main.c b/bl2/bl2_main.c index c738677..2d976fc 100644 --- a/bl2/bl2_main.c +++ b/bl2/bl2_main.c @@ -46,7 +46,8 @@ ******************************************************************************/ void bl2_main(void) { - meminfo bl2_tzram_layout, *bl31_tzram_layout; + meminfo *bl2_tzram_layout; + meminfo *bl31_tzram_layout; el_change_info *ns_image_info; unsigned long bl31_base, el_status; unsigned int bl2_load, bl31_load, mode; @@ -62,7 +63,7 @@ #endif /* Find out how much free trusted ram remains after BL2 load */ - bl2_tzram_layout = bl2_get_sec_mem_layout(); + bl2_tzram_layout = bl2_plat_sec_mem_layout(); /* * Load BL31. BL1 tells BL2 whether it has been TOP or BOTTOM loaded. @@ -70,10 +71,10 @@ * loaded opposite to BL2. This allows BL31 to reclaim BL2 memory * while maintaining its free space in one contiguous chunk. */ - bl2_load = bl2_tzram_layout.attr & LOAD_MASK; + bl2_load = bl2_tzram_layout->attr & LOAD_MASK; assert((bl2_load == TOP_LOAD) || (bl2_load == BOT_LOAD)); bl31_load = (bl2_load == TOP_LOAD) ? BOT_LOAD : TOP_LOAD; - bl31_base = load_image(&bl2_tzram_layout, BL31_IMAGE_NAME, + bl31_base = load_image(bl2_tzram_layout, BL31_IMAGE_NAME, bl31_load, BL31_BASE); /* Assert if it has not been possible to load BL31 */ @@ -84,7 +85,7 @@ * will gobble up all the BL2 memory. */ bl31_tzram_layout = (meminfo *) get_el_change_mem_ptr(); - init_bl31_mem_layout(&bl2_tzram_layout, bl31_tzram_layout, bl31_load); + init_bl31_mem_layout(bl2_tzram_layout, bl31_tzram_layout, bl31_load); /* * BL2 also needs to tell BL31 where the non-trusted software image diff --git a/docs/change-log.md b/docs/change-log.md index 4e5b9aa..e813cb1 100644 --- a/docs/change-log.md +++ b/docs/change-log.md @@ -73,6 +73,11 @@ CPU_SUSPEND and CPU_OFF apis simultaneously across cpus & clusters should not result in unexpected behaviour. +* The API to return the memory layout structures for each bootloader stage has + undergone change. A pointer to these structures is returned instead of their + copy. + + ARM Trusted Firmware - version 0.2 ================================== diff --git a/docs/porting-guide.md b/docs/porting-guide.md index c0e6ace..aa1451f 100644 --- a/docs/porting-guide.md +++ b/docs/porting-guide.md @@ -436,14 +436,15 @@ This function helps fulfill requirement 5 above. -### Function : bl1_get_sec_mem_layout() [mandatory] +### Function : bl1_plat_sec_mem_layout() [mandatory] Argument : void - Return : meminfo + Return : meminfo * -This function executes with the MMU and data caches enabled. The `meminfo` -structure returned by this function must contain the extents and availability of -secure RAM for the BL1 stage. +This function should only be called on the cold boot path. It executes with the +MMU and data caches enabled. The pointer returned by this function must point to +a `meminfo` structure containing the extents and availability of secure RAM for +the BL1 stage. meminfo.total_base = Base address of secure RAM visible to BL1 meminfo.total_size = Size of secure RAM visible to BL1 @@ -533,7 +534,7 @@ The platform must copy the contents of the `meminfo` structure into a private variable as the original memory may be subsequently overwritten by BL2. The copied structure is made available to all BL2 code through the -`bl2_get_sec_mem_layout()` function. +`bl2_plat_sec_mem_layout()` function. ### Function : bl2_plat_arch_setup() [mandatory] @@ -576,17 +577,17 @@ structure can be populated. -### Function : bl2_get_sec_mem_layout() [mandatory] +### Function : bl2_plat_sec_mem_layout() [mandatory] Argument : void - Return : meminfo + Return : meminfo * -This function may execute with the MMU and data caches enabled if the platform -port does the necessary initialization in `bl2_plat_arch_setup()`. It is only -called by the primary CPU. +This function should only be called on the cold boot path. It may execute with +the MMU and data caches enabled if the platform port does the necessary +initialization in `bl2_plat_arch_setup()`. It is only called by the primary CPU. -The purpose of this function is to return a `meminfo` structure populated with -the extents of secure RAM available for BL2 to use. See +The purpose of this function is to return a pointer to a `meminfo` structure +populated with the extents of secure RAM available for BL2 to use. See `bl2_early_platform_setup()` above. @@ -663,7 +664,7 @@ The platform must copy the contents of the `meminfo` structure into a private variable as the original memory may be subsequently overwritten by BL3-1. The copied structure is made available to all BL3-1 code through the -`bl31_get_sec_mem_layout()` function. +`bl31_plat_sec_mem_layout()` function. ### Function : bl31_plat_arch_setup() [mandatory] @@ -713,17 +714,18 @@ copied during `bl31_early_platform_setup()`). -### Function : bl31_get_sec_mem_layout() [mandatory] +### Function : bl31_plat_sec_mem_layout() [mandatory] Argument : void - Return : meminfo + Return : meminfo * -This function may execute with the MMU and data caches enabled if the platform -port does the necessary initializations in `bl31_plat_arch_setup()`. It is only -called by the primary CPU. +This function should only be called on the cold boot path. This function may +execute with the MMU and data caches enabled if the platform port does the +necessary initializations in `bl31_plat_arch_setup()`. It is only called by the +primary CPU. -The purpose of this function is to return a `meminfo` structure populated with -the extents of secure RAM available for BL3-1 to use. See +The purpose of this function is to return a pointer to a `meminfo` structure +populated with the extents of secure RAM available for BL3-1 to use. See `bl31_early_platform_setup()` above. diff --git a/include/bl1.h b/include/bl1.h index 81b5bc4..9920cb8 100644 --- a/include/bl1.h +++ b/include/bl1.h @@ -45,7 +45,7 @@ * Function prototypes *****************************************/ extern void bl1_platform_setup(void); -extern meminfo bl1_get_sec_mem_layout(void); +extern meminfo *bl1_plat_sec_mem_layout(void); #endif /*__ASSEMBLY__*/ diff --git a/include/bl2.h b/include/bl2.h index 3981a86..e105641 100644 --- a/include/bl2.h +++ b/include/bl2.h @@ -42,7 +42,7 @@ * Function prototypes *****************************************/ extern void bl2_platform_setup(void); -extern meminfo bl2_get_sec_mem_layout(void); +extern meminfo *bl2_plat_sec_mem_layout(void); extern meminfo bl2_get_ns_mem_layout(void); #endif /* __BL2_H__ */ diff --git a/include/bl31.h b/include/bl31.h index dbf7e5a..acb1229 100644 --- a/include/bl31.h +++ b/include/bl31.h @@ -42,7 +42,7 @@ * Function prototypes ******************************************************************************/ extern void bl31_platform_setup(void); -extern meminfo bl31_get_sec_mem_layout(void); +extern meminfo *bl31_plat_sec_mem_layout(void); extern el_change_info* bl31_get_next_image_info(unsigned long); extern void gic_cpuif_deactivate(unsigned int); extern void gic_cpuif_setup(unsigned int); diff --git a/plat/fvp/bl1_plat_setup.c b/plat/fvp/bl1_plat_setup.c index 9d19bb8..8fe4c95 100644 --- a/plat/fvp/bl1_plat_setup.c +++ b/plat/fvp/bl1_plat_setup.c @@ -63,9 +63,9 @@ /* Data structure which holds the extents of the trusted SRAM for BL1*/ static meminfo bl1_tzram_layout; -meminfo bl1_get_sec_mem_layout(void) +meminfo *bl1_plat_sec_mem_layout(void) { - return bl1_tzram_layout; + return &bl1_tzram_layout; } /******************************************************************************* diff --git a/plat/fvp/bl2_plat_setup.c b/plat/fvp/bl2_plat_setup.c index 7212df1..978cc9b 100644 --- a/plat/fvp/bl2_plat_setup.c +++ b/plat/fvp/bl2_plat_setup.c @@ -72,9 +72,9 @@ __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), section("tzfw_coherent_mem"))); -meminfo bl2_get_sec_mem_layout(void) +meminfo *bl2_plat_sec_mem_layout(void) { - return bl2_tzram_layout; + return &bl2_tzram_layout; } /******************************************************************************* diff --git a/plat/fvp/bl31_plat_setup.c b/plat/fvp/bl31_plat_setup.c index ab8e378..221b85a 100644 --- a/plat/fvp/bl31_plat_setup.c +++ b/plat/fvp/bl31_plat_setup.c @@ -85,9 +85,9 @@ __attribute__ ((aligned(PLATFORM_CACHE_LINE_SIZE), section("tzfw_coherent_mem"))); -meminfo bl31_get_sec_mem_layout(void) +meminfo *bl31_plat_sec_mem_layout(void) { - return bl31_tzram_layout; + return &bl31_tzram_layout; } /*******************************************************************************