diff --git a/drivers/arm/sp805/sp805.c b/drivers/arm/sp805/sp805.c index 98df7e2..aee9016 100644 --- a/drivers/arm/sp805/sp805.c +++ b/drivers/arm/sp805/sp805.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ @@ -10,17 +10,17 @@ /* Inline register access functions */ -static inline void sp805_write_wdog_load(uintptr_t base, unsigned long value) +static inline void sp805_write_wdog_load(uintptr_t base, uint32_t value) { mmio_write_32(base + SP805_WDOG_LOAD_OFF, value); } -static inline void sp805_write_wdog_ctrl(uintptr_t base, unsigned long value) +static inline void sp805_write_wdog_ctrl(uintptr_t base, uint32_t value) { mmio_write_32(base + SP805_WDOG_CTR_OFF, value); } -static inline void sp805_write_wdog_lock(uintptr_t base, unsigned long value) +static inline void sp805_write_wdog_lock(uintptr_t base, uint32_t value) { mmio_write_32(base + SP805_WDOG_LOCK_OFF, value); } @@ -28,23 +28,23 @@ /* Public API implementation */ -void sp805_start(uintptr_t base, unsigned long ticks) +void sp805_start(uintptr_t base, unsigned int ticks) { sp805_write_wdog_load(base, ticks); sp805_write_wdog_ctrl(base, SP805_CTR_RESEN | SP805_CTR_INTEN); /* Lock registers access */ - sp805_write_wdog_lock(base, 0); + sp805_write_wdog_lock(base, 0U); } void sp805_stop(uintptr_t base) { sp805_write_wdog_lock(base, WDOG_UNLOCK_KEY); - sp805_write_wdog_ctrl(base, 0); + sp805_write_wdog_ctrl(base, 0U); } -void sp805_refresh(uintptr_t base, unsigned long ticks) +void sp805_refresh(uintptr_t base, unsigned int ticks) { sp805_write_wdog_lock(base, WDOG_UNLOCK_KEY); sp805_write_wdog_load(base, ticks); - sp805_write_wdog_lock(base, 0); + sp805_write_wdog_lock(base, 0U); } diff --git a/include/drivers/arm/sp805.h b/include/drivers/arm/sp805.h index f00bcba..e7714a3 100644 --- a/include/drivers/arm/sp805.h +++ b/include/drivers/arm/sp805.h @@ -1,23 +1,25 @@ /* - * Copyright (c) 2015, ARM Limited and Contributors. All rights reserved. + * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved. * * SPDX-License-Identifier: BSD-3-Clause */ -#ifndef __SP805_H__ -#define __SP805_H__ +#ifndef SP805_H +#define SP805_H + +#include /* SP805 register offset */ -#define SP805_WDOG_LOAD_OFF 0x000 -#define SP805_WDOG_CTR_OFF 0x008 -#define SP805_WDOG_LOCK_OFF 0xc00 +#define SP805_WDOG_LOAD_OFF UL(0x000) +#define SP805_WDOG_CTR_OFF UL(0x008) +#define SP805_WDOG_LOCK_OFF UL(0xc00) /* Magic word to unlock the wd registers */ -#define WDOG_UNLOCK_KEY 0x1ACCE551 +#define WDOG_UNLOCK_KEY U(0x1ACCE551) /* Register field definitions */ -#define SP805_CTR_RESEN (1 << 1) -#define SP805_CTR_INTEN (1 << 0) +#define SP805_CTR_RESEN (U(1) << 1) +#define SP805_CTR_INTEN (U(1) << 0) #ifndef __ASSEMBLY__ @@ -25,10 +27,10 @@ /* Public high level API */ -void sp805_start(uintptr_t base, unsigned long ticks); +void sp805_start(uintptr_t base, unsigned int ticks); void sp805_stop(uintptr_t base); -void sp805_refresh(uintptr_t base, unsigned long ticks); +void sp805_refresh(uintptr_t base, unsigned int ticks); #endif /* __ASSEMBLY__ */ -#endif /* __SP805_H__ */ +#endif /* SP805_H */