diff --git a/bl31/aarch64/bl31_entrypoint.S b/bl31/aarch64/bl31_entrypoint.S index 593cc1d..2a4c979 100644 --- a/bl31/aarch64/bl31_entrypoint.S +++ b/bl31/aarch64/bl31_entrypoint.S @@ -28,7 +28,6 @@ * POSSIBILITY OF SUCH DAMAGE. */ -#include #include #include #include diff --git a/common/bl_common.c b/common/bl_common.c index 8183337..d6ee954 100644 --- a/common/bl_common.c +++ b/common/bl_common.c @@ -37,7 +37,6 @@ #include #include #include -#include /*********************************************************** * Memory for sharing data while changing exception levels. diff --git a/include/bl1.h b/include/bl1.h index 9920cb8..ddb5ecf 100644 --- a/include/bl1.h +++ b/include/bl1.h @@ -33,12 +33,6 @@ #include -/****************************************************************************** - * Function ID of the only SMC that the BL1 exception handlers service. - * The chosen value is the first function ID of the ARM SMC64 range. - *****************************************************************************/ -#define RUN_IMAGE 0xC0000000 - #ifndef __ASSEMBLY__ /****************************************** diff --git a/include/bl_common.h b/include/bl_common.h index 0af98d6..995b5e6 100644 --- a/include/bl_common.h +++ b/include/bl_common.h @@ -71,6 +71,15 @@ ******************************************************************************/ #define CASSERT(cond, msg) typedef char msg[(cond) ? 0 : -1] +/****************************************************************************** + * Opcode passed in x0 to tell next EL that we want to run an image. + * Corresponds to the function ID of the only SMC that the BL1 exception + * handlers service. That's why the chosen value is the first function ID of + * the ARM SMC64 range. + *****************************************************************************/ +#define RUN_IMAGE 0xC0000000 + + #ifndef __ASSEMBLY__ /******************************************************************************* * Structure used for telling the next BL how much of a particular type of