* Renesas R-Car Compare Match Timer (CMT)

The CMT is a multi-channel 16/32/48-bit timer/counter with configurable clock
inputs and programmable compare match.

Channels share hardware resources but their counter and compare match value
are independent. A particular CMT instance can implement only a subset of the
channels supported by the CMT model. Channel indices represent the hardware
position of the channel in the CMT and don't match the channel numbers in the
datasheets.

Required Properties:

  - compatible: must contain one of the following.
    - "renesas,cmt-32" for the 32-bit CMT
		(CMT0 on sh7372, sh73a0 and r8a7740)
    - "renesas,cmt-32-fast" for the 32-bit CMT with fast clock support
		(CMT[234] on sh7372, sh73a0 and r8a7740)
    - "renesas,cmt-48" for the 48-bit CMT
		(CMT1 on sh7372, sh73a0 and r8a7740)
    - "renesas,cmt-48-gen2" for the second generation 48-bit CMT
		(CMT[01] on r8a73a4, r8a7790 and r8a7791)

  - reg: base address and length of the registers block for the timer module.
  - interrupts: interrupt-specifier for the timer, one per channel.
  - clocks: a list of phandle + clock-specifier pairs, one for each entry
    in clock-names.
  - clock-names: must contain "fck" for the functional clock.

  - renesas,channels-mask: bitmask of the available channels.


Example: R8A7790 (R-Car H2) CMT0 node

	CMT0 on R8A7790 implements hardware channels 5 and 6 only and names
	them channels 0 and 1 in the documentation.

	cmt0: timer@ffca0000 {
		compatible = "renesas,cmt-48-gen2";
		reg = <0 0xffca0000 0 0x1004>;
		interrupts = <0 142 IRQ_TYPE_LEVEL_HIGH>,
			     <0 142 IRQ_TYPE_LEVEL_HIGH>;
		clocks = <&mstp1_clks R8A7790_CLK_CMT0>;
		clock-names = "fck";

		renesas,channels-mask = <0x60>;
	};
