Release v2018.07.1 ...

Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

ARM: mmu: fix cache flushing when replacing a section with a PTE ...

When replacing a section with a PTE, we must make sure that the newly
initialized PTE entries are flushed from the cache before changing the
entry in the TTB. Otherwise a L1 TLB miss causes the hardware pagetable
walker to walk into a PTE with undefined content, causing exactly that
behaviour.

Move all the necessary cache flushing to arm_create_pte(), to avoid any
caller getting this wrong in the future.

Fixes: e3e54c644180 (ARM: mmu: Implement on-demand PTE allocation)
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

ARM: MMU: fix arch_remap_range() across section boundaries ...

Fixes: e3e54c6441 ARM: mmu: Implement on-demand PTE allocation

PGD_FLAGS_WC_V7 lacks the PMD_TYPE_SECT and PMD_SECT_BUFFERABLE flags.
Without them a dma_alloc_writecombine() creates an invalid section when
it crosses a section boundary.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>

Release v2018.07.0 ...

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: imx6qp: fix NoC QoS passthrough for new cpu type functions. ...

On i.MX6QP/DP cpu_mx6_is_mx6q/d do not return true anymore.
Use the new cpu_mx6_is_mx6qp/dp to reenable NoC regulator bypass.

Fixes: d4c05d29d484 ("ARM: i.MX6: Add cpu type for 'plus' variants")
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: VFxxx: Record cpu boot source as a part of startup ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Documentation: use https for Pengutronix services ...

Also adapt the links to git.pengutronix.de to use the cgit URLs instead the
old gitweb ones.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: esdctl: Add support for i.MX6SoloX's memory controller ...

Add code needed to dynamically detect the offset and amount of RAM.

Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Merge branch 'for-next/of-bootsource'

Merge branch 'for-next/mvebu'

Merge branch 'for-next/misc'

Merge branch 'for-next/mips'

Merge branch 'for-next/imx-ocotp'

Merge branch 'for-next/imx'

Merge branch 'for-next/dts'

Merge branch 'for-next/clk'

Merge branch 'for-next/arm-mmu'

Merge branch 'for-next/arm'

scripts: create a separate section for host tools ...

This allows to enable host tools even if they are not needed for the
current configuration to improve compile coverage and simplify packaging
these tools. The conversion doesn't cover all tools available but can be
extended later.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: omap3-usb-loader: fix compiler warning ...

Compiling omap3-usb-loader issues the warning:

warning: self-comparison always evaluates to true [-Wtautological-compare]

Just remove the bogus test.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX8: Add DDRC PHY and DDR CTL base addresses ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: lib64: Make string functions aware of MMU configuration ...

Optimized version of memset() in memset.S if called as:

    memset(foo, 0, size)

will try to explicitly zero out data cache with:

    dc	zva, dst

which will result in Alignement Exception (DABT) if MMU is not
enabled.

For more info see:

    - C4.4.8 "DC ZVA, Data Cache Zero by VA"
    - D5.2.8 "The effects of disabling a stage of address translation"

in "ARM Architecture Reference Manual. ARMv8, for ARMv8-A architecture
profile"

In similar vein, using optimized version of memcpy() could lead to a
unaligned 16-byte write (using 'stp'), which is not allowed for
Device-nGnRnE type of memory (see D5.2.8) and would liead to
Alignement Exception.

To fix both problems expose non-optimized and optimzied versions of
the function and created a wrapper to dispatch the call to either one
based on if MMU is enabled or not.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: Limit v2 header size to HEADER_LEN ...

Given the following:

 1. Assembly code, namely "b 0x1000" instruction, in bb_header[]
    assumes that i.MX image header occupies first HEADER_LEN bytes and
    bootloader executable is located right after.

 2. Code in imx_image_size() assumes that i.MX image header is
    HEADER_LEN bytes

 3. Original code handling v2 header allocated more than HEADER_LEN
    buffer to store IVT + boot data + DCD. However, the code writing
    that buffer to disk is only set up to use first HEADER_LEN bytes
    and to silently discard the rest as a side effect.

Let's be conservative and limit total size of v2 header to not exceed
Inital Load Region (4K or HEADER_LEN) to match what's being done for
v1.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

scripts: imx-image: Drop error return from write_dcd() ...

Write_dcd() exits early in case of failure, so there's no realy reason
to have it return a error code as a result. Drop it and simplify the
caller code.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clocksource: armv8-timer: Make use of postcore_platform_driver() ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

clocksource: armv8-timer: Make armv8_clocksource_read() static ...

There are no users of that function outside of the driver itself, so
re-declare it as static.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Documentation: i.MX: Add missing <soctype> ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

Documentation: imx: Change block size for 'dd' to 1024 ...

Real image starts at offset 0x400 (1024), so we can skip copying extra
512 bytes of zeros.

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

pinctrl: i.MX: Add support for i.MX8 ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

ARM: i.MX: xload-esdhc: Add support for i.MX8 ...

Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>