diff --git a/arch/mips/dts/ar9331.dtsi b/arch/mips/dts/ar9331.dtsi deleted file mode 100644 index efc0531..0000000 --- a/arch/mips/dts/ar9331.dtsi +++ /dev/null @@ -1,44 +0,0 @@ -#include - -#include "skeleton.dtsi" - -/ { - soc { - #address-cells = <1>; - #size-cells = <1>; - compatible = "simple-bus"; - device_type = "soc"; - ranges; - - serial0: serial@18020000 { - compatible = "qca,ar9330-uart"; - reg = <0x18020000 0x14>; - clocks = <&ar9331_clk AR933X_CLK_UART>; - status = "disabled"; - }; - - gpio: gpio@18040000 { - compatible = "qca,ar7100-gpio"; - gpio-controller; - reg = <0x18040000 0x100>; - #gpio-cells = <2>; - - ngpios = <30>; - status = "disabled"; - }; - - ar9331_clk: clock { - compatible = "qca,ar933x-clk"; - reg = <0x18050000 0x48>; - #clock-cells = <1>; - }; - - spi: spi@1f000000 { - #address-cells = <1>; - #size-cells = <0>; - compatible = "qca,ath79-spi"; - reg = <0x1f000000 0x01000000>; - status = "disabled"; - }; - }; -}; diff --git a/arch/mips/dts/black-swift.dts b/arch/mips/dts/black-swift.dts index d19c381..af817db 100644 --- a/arch/mips/dts/black-swift.dts +++ b/arch/mips/dts/black-swift.dts @@ -1,21 +1,23 @@ /dts-v1/; -#include "ar9331.dtsi" #include #include +#include + / { model = "Black Swift"; compatible = "smartlx,black-swift"; - memory { - reg = <0x00000000 0x4000000>; - }; - aliases { spiflash = &spiflash; }; + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x4000000>; + }; + buttons { compatible = "gpio-keys"; @@ -37,7 +39,11 @@ }; }; -&serial0 { +&ref { + clock-frequency = <25000000>; +}; + +&uart { status = "okay"; }; @@ -50,10 +56,10 @@ status = "okay"; /* Winbond W25Q128FV SPI flash */ - spiflash: m25p80@0 { + spiflash: w25q128@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "m25p80"; + compatible = "winbond,w25q128", "jedec,spi-nor"; spi-max-frequency = <104000000>; reg = <0>; }; diff --git a/arch/mips/dts/tplink-mr3020.dts b/arch/mips/dts/tplink-mr3020.dts index 804d290..831fab8 100644 --- a/arch/mips/dts/tplink-mr3020.dts +++ b/arch/mips/dts/tplink-mr3020.dts @@ -1,20 +1,22 @@ /dts-v1/; -#include "ar9331.dtsi" #include -/ { - model = "TP-LINK MR3020"; - compatible = "tplink,mr3020"; +#include - memory { - reg = <0x00000000 0x2000000>; - }; +/ { + model = "TP-Link TL-MR3020"; + compatible = "tplink,tl-mr3020"; aliases { spiflash = &spiflash; }; + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x2000000>; + }; + leds { compatible = "gpio-leds"; @@ -44,7 +46,11 @@ }; }; -&serial0 { +&ref { + clock-frequency = <25000000>; +}; + +&uart { status = "okay"; }; @@ -57,10 +63,10 @@ status = "okay"; /* Spansion S25FL032PIF SPI flash */ - spiflash: m25p80@0 { + spiflash: s25sl032p@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "m25p80"; + compatible = "spansion,s25sl032p", "jedec,spi-nor"; spi-max-frequency = <104000000>; reg = <0>; }; diff --git a/drivers/clk/clk-ar933x.c b/drivers/clk/clk-ar933x.c index 373f8cc..f5cfd39 100644 --- a/drivers/clk/clk-ar933x.c +++ b/drivers/clk/clk-ar933x.c @@ -1,7 +1,7 @@ /* - * Copyright (C) 2013 Lucas Stach + * Copyright (C) 2014 Antony Pavlov * - * Based on the Linux Tegra clock code + * Based on the Linux ath79 clock code * * This program is free software; you can redistribute it and/or modify it * under the terms and conditions of the GNU General Public License, @@ -24,9 +24,9 @@ #include #include -#include +#include -static struct clk *clks[AR933X_CLK_END]; +static struct clk *clks[ATH79_CLK_END]; static struct clk_onecell_data clk_data; struct clk_ar933x { @@ -100,39 +100,19 @@ return &f->clk; } -static void ar933x_ref_clk_init(void __iomem *base) -{ - u32 t; - unsigned long ref_rate; - - t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); - if (t & AR933X_BOOTSTRAP_REF_CLK_40) - ref_rate = (40 * 1000 * 1000); - else - ref_rate = (25 * 1000 * 1000); - - clks[AR933X_CLK_REF] = clk_fixed("ref", ref_rate); -} - static void ar933x_pll_init(void __iomem *base) { - clks[AR933X_CLK_UART] = clk_fixed_factor("uart", "ref", 1, 1, - CLK_SET_RATE_PARENT); - - clks[AR933X_CLK_CPU] = clk_ar933x("cpu", "ref", base, + clks[ATH79_CLK_CPU] = clk_ar933x("cpu", "ref", base, AR933X_PLL_CLOCK_CTRL_CPU_DIV_SHIFT, AR933X_PLL_CLOCK_CTRL_CPU_DIV_MASK); - clks[AR933X_CLK_DDR] = clk_ar933x("ddr", "ref", base, + clks[ATH79_CLK_DDR] = clk_ar933x("ddr", "ref", base, AR933X_PLL_CLOCK_CTRL_DDR_DIV_SHIFT, AR933X_PLL_CLOCK_CTRL_DDR_DIV_MASK); - clks[AR933X_CLK_AHB] = clk_ar933x("ahb", "ref", base, + clks[ATH79_CLK_AHB] = clk_ar933x("ahb", "ref", base, AR933X_PLL_CLOCK_CTRL_AHB_DIV_SHIFT, AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK); - - clks[AR933X_CLK_WDT] = clk_fixed_factor("wdt", "ahb", 1, 1, - CLK_SET_RATE_PARENT); } static int ar933x_clk_probe(struct device_d *dev) @@ -145,7 +125,6 @@ return PTR_ERR(iores); base = IOMEM(iores->start); - ar933x_ref_clk_init(base); ar933x_pll_init(base); clk_data.clks = clks; @@ -158,7 +137,7 @@ static __maybe_unused struct of_device_id ar933x_clk_dt_ids[] = { { - .compatible = "qca,ar933x-clk", + .compatible = "qca,ar9330-pll", }, { /* sentinel */ } diff --git a/drivers/spi/ath79_spi.c b/drivers/spi/ath79_spi.c index 68b4c7c..bb63d86 100644 --- a/drivers/spi/ath79_spi.c +++ b/drivers/spi/ath79_spi.c @@ -289,7 +289,7 @@ static __maybe_unused struct of_device_id ath79_spi_dt_ids[] = { { - .compatible = "qca,ath79-spi", + .compatible = "qca,ar7100-spi", }, { /* sentinel */ diff --git a/include/dt-bindings/clock/ar933x-clk.h b/include/dt-bindings/clock/ar933x-clk.h deleted file mode 100644 index f048930..0000000 --- a/include/dt-bindings/clock/ar933x-clk.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (C) 2014 Antony Pavlov - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#ifndef __DT_BINDINGS_AR933X_CLK_H -#define __DT_BINDINGS_AR933X_CLK_H - -#define AR933X_CLK_REF 0 -#define AR933X_CLK_UART 1 -#define AR933X_CLK_CPU 2 -#define AR933X_CLK_DDR 3 -#define AR933X_CLK_AHB 4 -#define AR933X_CLK_WDT 5 - -#define AR933X_CLK_END 6 - -#endif /* __DT_BINDINGS_AR933X_CLK_H */