diff --git a/Documentation/boards/socfpga.rst b/Documentation/boards/socfpga.rst index d732374..19d6060 100644 --- a/Documentation/boards/socfpga.rst +++ b/Documentation/boards/socfpga.rst @@ -116,19 +116,12 @@ 1. Regenerate the project with Qsys 2. Load up your project in Quartus II and assemble the design -3. Go to the SoCEDS installation and run - ``./embedded_command_shell.sh`` -4. Now run ``bsp-editor`` -5. Create a new BSP -6. Select the directory `hps_isw_handoff/soc_system_hps_0` under the - preloader settings directory -7. Click ``Ok`` than ``Generate`` Now run the command: .. code-block:: sh - scripts/socfpga_import_preloader + scripts/socfpga_import_preloader where `` is the directory where the bsp-editor generated the files, `` is the directory where Quartus generated the handoff files, and diff --git a/scripts/socfpga_import_preloader b/scripts/socfpga_import_preloader index 63ff30e..6c748fa 100755 --- a/scripts/socfpga_import_preloader +++ b/scripts/socfpga_import_preloader @@ -2,12 +2,13 @@ if [ "$#" -lt "2" ] then - echo "USAGE: $0 " - echo "EXAMPLE: $0 ~/cv_soc_devkit_ghrd/software/spl_bsp/generated ~/cv_soc_devkit_ghrd/hps_isw_handoff/soc_system_hps_0/ arch/arm/boards/altera-socdk" + echo "USAGE: $0 " + echo "EXAMPLE: $0 ~/altera-embedded-sdk/ ~/cv_soc_devkit_ghrd/hps_isw_handoff/soc_system_hps_0/ arch/arm/boards/altera-socdk" exit 1 fi -splroot=$1 +splroot="$(mktemp -d)" +embeddedsw=$1 handoff=$2 boardroot=$3 bareboxsrc=. @@ -56,6 +57,8 @@ sed -i 's/ $//g' $tgt } +python2.7 ${embeddedsw}/embedded/ip/altera/preloader/scripts/iswgen.py -i ${handoff} -o ${splroot}/ + copy_source ${splroot}/iocsr_config_cyclone5.c ${boardroot}/iocsr_config_cyclone5.c copy_source ${splroot}/pinmux_config_cyclone5.c ${boardroot}/pinmux_config.c copy_source ${splroot}/pll_config.h ${boardroot}/pll_config.h @@ -66,4 +69,6 @@ copy_source ${handoff}/sequencer_auto_inst_init.c ${boardroot}/sequencer_auto_inst_init.c copy_source ${handoff}/sequencer_defines.h ${boardroot}/sequencer_defines.h +rm -r ${splroot} + echo "DONE"