diff --git a/arch/arm/mach-imx/include/mach/imx21-regs.h b/arch/arm/mach-imx/include/mach/imx21-regs.h index b8cb060..08520e9 100644 --- a/arch/arm/mach-imx/include/mach/imx21-regs.h +++ b/arch/arm/mach-imx/include/mach/imx21-regs.h @@ -107,6 +107,7 @@ #define MPCTL1_BRMO (1 << 6) #define MPCTL1_LF (1 << 15) +#define PCCR0_NFC_EN (1 << 19) #define PCCR1_GPT1_EN (1 << 25) #define CCSR_32K_SR (1 << 15) diff --git a/arch/arm/mach-imx/nand.c b/arch/arm/mach-imx/nand.c index 7c57ec4..c228f96 100644 --- a/arch/arm/mach-imx/nand.c +++ b/arch/arm/mach-imx/nand.c @@ -59,7 +59,7 @@ writel(rcsr, IMX_CCM_BASE + CCM_RCSR); } -#elif defined CONFIG_ARCH_IMX27 +#elif defined(CONFIG_ARCH_IMX21) || defined (CONFIG_ARCH_IMX27) #define FMCR_NF_FMS (1 << 5) #define FMCR_NF_16BIT_SEL (1 << 4) diff --git a/drivers/nand/nand_imx.c b/drivers/nand/nand_imx.c index 5811e27..831ba62 100644 --- a/drivers/nand/nand_imx.c +++ b/drivers/nand/nand_imx.c @@ -32,8 +32,8 @@ #define DVR_VER "2.0" -#define nfc_is_v21() (cpu_is_mx25() || cpu_is_mx35() || cpu_is_mx21()) -#define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27()) +#define nfc_is_v21() (cpu_is_mx25() || cpu_is_mx35()) +#define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21()) /* * Addresses for NFC registers @@ -249,8 +249,18 @@ writew(cmd, host->regs + NFC_FLASH_CMD); writew(NFC_CMD, host->regs + NFC_CONFIG2); - /* Wait for operation to complete */ - wait_op_done(host); + if (cpu_is_mx21() && (cmd == NAND_CMD_RESET)) { + /* Reset completion is indicated by NFC_CONFIG2 */ + /* being set to 0 */ + int i; + for (i = 0; i < 100000; i++) { + if (readw(host->regs + NFC_CONFIG2) == 0) { + break; + } + } + } else + /* Wait for operation to complete */ + wait_op_done(host); } /* @@ -826,9 +836,13 @@ struct nand_ecclayout *oob_smallpage, *oob_largepage; u16 tmp; int err = 0; + #ifdef CONFIG_ARCH_IMX27 PCCR1 |= PCCR1_NFC_BAUDEN; #endif +#ifdef CONFIG_ARCH_IMX21 + PCCR0 |= PCCR0_NFC_EN; +#endif /* Allocate memory for MTD device structure and private data */ host = kzalloc(sizeof(struct imx_nand_host) + NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE, GFP_KERNEL); @@ -1015,7 +1029,13 @@ { struct imx_nand_host host; u32 tmp, page, block, blocksize, pagesize; - +#ifdef CONFIG_ARCH_IMX21 + tmp = readl(IMX_SYSTEM_CTL_BASE + 0x14); + if (tmp & (1 << 5)) + host.pagesize_2k = 1; + else + host.pagesize_2k = 0; +#endif #ifdef CONFIG_ARCH_IMX27 tmp = readl(IMX_SYSTEM_CTL_BASE + 0x14); if (tmp & (1 << 5))