diff --git a/arch/arm/boards/cm-fx6/flash-header-mx6-cm-fx6.imxcfg b/arch/arm/boards/cm-fx6/flash-header-mx6-cm-fx6.imxcfg
index 400a870..9e8dce5 100644
--- a/arch/arm/boards/cm-fx6/flash-header-mx6-cm-fx6.imxcfg
+++ b/arch/arm/boards/cm-fx6/flash-header-mx6-cm-fx6.imxcfg
@@ -1,3 +1,4 @@
 soc imx6
 loadaddr 0x00907000
+max_load_size 0x11000
 dcdofs 0x400
diff --git a/arch/arm/boards/guf-vincell/flash-header.imxcfg b/arch/arm/boards/guf-vincell/flash-header.imxcfg
index bb0c318..8bfb5d0 100644
--- a/arch/arm/boards/guf-vincell/flash-header.imxcfg
+++ b/arch/arm/boards/guf-vincell/flash-header.imxcfg
@@ -1,3 +1,130 @@
+loadaddr 0x71000000
 soc imx53
-loadaddr 0xf8020000
 dcdofs 0x400
+
+//=============================================================================
+//init script for i.MX53 DDR3
+//=============================================================================
+
+//=============================================================================
+// Enable all clocks (they are disabled by ROM code)
+//=============================================================================
+
+//=============================================================================
+// IOMUX
+//=============================================================================
+//DDR IO TYPE:
+wm 32	0x53fa8724 	0x00000000	// IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE
+wm 32	0x53fa86fc 	0x00000000	// IOMUXC_SW_PAD_CTL_GRP_DDRPKE
+
+//CLOCK:
+wm 32	0x53fa8578 	0x00300000	// IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_0
+wm 32	0x53fa8570 	0x00300000	// IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_1
+
+//ADDRESS:
+wm 32	0x53fa8574 	0x00300000	// IOMUXC_SW_PAD_CTL_PAD_DRAM_CAS
+wm 32	0x53fa8588 	0x00300000	// IOMUXC_SW_PAD_CTL_PAD_DRAM_RAS
+wm 32	0x53fa86f0 	0x00300000	// IOMUXC_SW_PAD_CTL_GRP_ADDDS
+
+//Control:
+wm 32	0x53fa856c 	0x00300040	// IOMUXC_SW_PAD_CTL_PAD_DRAM_RESET
+wm 32	0x53fa8580 	0x00300040	// IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT0
+wm 32	0x53fa8564 	0x00300040	// IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT1
+wm 32	0x53fa8720 	0x00300000	// IOMUXC_SW_PAD_CTL_GRP_CTLDS
+
+//Data Strobes:
+wm 32	0x53fa86f4 	0x00000000	// IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL
+wm 32	0x53fa857c 	0x00300040	// IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0
+wm 32	0x53fa8590 	0x00300040	// IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1
+wm 32	0x53fa8568 	0x00300040	// IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2
+wm 32	0x53fa8558 	0x00300040	// IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3
+
+//Data:
+wm 32	0x53fa8714	0x00000000	// IOMUXC_SW_PAD_CTL_GRP_DDRMODE
+wm 32	0x53fa8718 	0x00300000	// IOMUXC_SW_PAD_CTL_GRP_B0DS
+wm 32	0x53fa871c 	0x00300000	// IOMUXC_SW_PAD_CTL_GRP_B1DS
+wm 32	0x53fa8728 	0x00300000	// IOMUXC_SW_PAD_CTL_GRP_B2DS
+wm 32	0x53fa872c 	0x00300000	// IOMUXC_SW_PAD_CTL_GRP_B3DS
+
+wm 32	0x53fa8584 	0x00300000	// IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM0
+wm 32	0x53fa8594 	0x00300000	// IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM1
+wm 32	0x53fa8560 	0x00300000	// IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM2
+wm 32	0x53fa8554 	0x00300000	// IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM3
+
+
+//=============================================================================
+// DDR Controller Registers
+//=============================================================================
+// Manufacturer:	Micron
+// Device Part Number:	MT41J128M16HA-15E
+// Clock Freq.: 	400MHz
+// Density per CS in Gb: 	4
+// Chip Selects used:	1
+// Number of Banks:	8
+// Row address:    	14
+// Column address: 	10
+// Data bus width	32
+//=============================================================================
+wm 32	0x63fd901c 	0x00008000	//ESDSCR, set the Configuration request bit during MMDC set up
+
+//=============================================================================
+// Calibration setup.
+//=============================================================================
+wm 32	0x63fd9040 	0x05390003	// ZQHWCTRL, enable both one-time & periodic HW ZQ calibration.
+
+// For target board, may need to run write leveling calibration to fine tune these settings.
+wm 32	0x63fd904c 	0x00000000	//WLDECTRL0
+wm 32	0x63fd9050 	0x00000000	//WLDECTRL1
+
+////Read DQS Gating calibration
+wm 32	0x63fd907c 	0x01320135	// DGCTRL0
+wm 32	0x63fd9080 	0x01370137	// DGCTRL1
+
+//Read calibration
+wm 32	0x63fd9088 	0x3a413c3f	// RDDLCTL
+
+//Write calibration
+wm 32	0x63fd9090 	0x49434b43	// WRDLCTL
+
+// Complete calibration by forced measurement:
+wm 32	0x63fd90F8 	0x00000800	// MUR
+//=============================================================================
+// Calibration setup end
+//=============================================================================
+
+//MMDC init:
+wm 32	0x63fd9004 	0x0002002D	// ESDPDC
+wm 32	0x63fd9008 	0x00333030	// ESDOTC
+wm 32	0x63fd900c 	0x3F435333	// ESDCFG0
+wm 32	0x63fd9010 	0xB5058B63	// ESDCFG1
+wm 32	0x63fd9014 	0x01FF00DB	// ESDCFG2
+
+//MDMISC: RALAT kept to the high level of 5.
+//MDMISC: consider reducing RALAT if your 528MHz board design allow that. Lower RALAT benefits:
+//a. better operation at low frequency, for LPDDR2 freq < 100MHz, change RALAT to 3
+//b. Small performence improvment
+wm 32	0x63fd9018 	0x00011740	// ESDMISC
+wm 32	0x63fd902c 	0x000026D2	// ESDRWD
+wm 32	0x63fd9030 	0x00430E21	// ESDOR
+wm 32	0x63fd9000 	0x83190000	// ESDCTL
+
+//Mode register writes
+wm 32	0x63fd901c 	0x02008032	// ESDSCR, MR2 write, CS0
+wm 32	0x63fd901c 	0x00008033	// ESDSCR, MR3 write, CS0
+wm 32	0x63fd901c 	0x00448031	// ESDSCR, MR1 write, CS0
+wm 32	0x63fd901c 	0x15208030	// ESDSCR, MR0write, CS0
+wm 32	0x63fd901c 	0x04008040	// ESDSCR, ZQ calibration command sent to device on CS0
+
+//wm 32	0x63fd901c 	0x0200803A	// ESDSCR, MR2 write, CS1
+//wm 32	0x63fd901c 	0x0000803B	// ESDSCR, MR3 write, CS1
+//wm 32	0x63fd901c 	0x00448039	// ESDSCR, MR1 write, CS1
+//wm 32	0x63fd901c 	0x15208038	// ESDSCR, MR0write, CS1
+//wm 32	0x63fd901c 	0x04008048	// ESDSCR, ZQ calibration command sent to device on CS1
+
+wm 32	0x63fd9020 	0x00001800	// ESDREF
+
+wm 32	0x63fd9058 	0x00033337	// ODTCTRL
+
+wm 32	0x63fd901c 	0x00000000	// MMDC0_ESDSCR, clear this register (especially the configuration bit as initialization is complete)
+
+wm 32	0x53fa8004 	0x00194005	// For TO2 only, increase LDO for VDIG_PLL to 1.3V
diff --git a/arch/arm/boards/guf-vincell/lowlevel.c b/arch/arm/boards/guf-vincell/lowlevel.c
index 0d2216f..715e8b3 100644
--- a/arch/arm/boards/guf-vincell/lowlevel.c
+++ b/arch/arm/boards/guf-vincell/lowlevel.c
@@ -12,130 +12,14 @@
 #include <asm/barebox-arm.h>
 #include <asm/barebox-arm-head.h>
 #include <asm/cache.h>
-#include <mach/xload.h>
-
-#define IOMUX_PADCTL_DDRI_DDR (1 << 9)
-
-#define IOMUX_PADCTL_DDRDSE(x)	((x) << 19)
-#define IOMUX_PADCTL_DDRSEL(x)	((x) << 25)
-
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM3		0x554
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3	0x558
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM2		0x560
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT1	0x564
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2	0x568
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_1	0x570
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_CAS		0x574
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_0	0x578
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0	0x57c
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT0	0x580
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_RAS		0x588
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1	0x590
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM1		0x594
-#define IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM0		0x584
-#define IOMUXC_SW_PAD_CTL_GRP_ADDDS		0x6f0
-#define IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL	0x6f4
-#define IOMUXC_SW_PAD_CTL_GRP_DDRPKE		0x6fc
-#define IOMUXC_SW_PAD_CTL_GRP_DDRHYS		0x710
-#define IOMUXC_SW_PAD_CTL_GRP_DDRMODE		0x714
-#define IOMUXC_SW_PAD_CTL_GRP_B0DS		0x718
-#define IOMUXC_SW_PAD_CTL_GRP_B1DS		0x71c
-#define IOMUXC_SW_PAD_CTL_GRP_CTLDS		0x720
-#define IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE		0x724
-#define IOMUXC_SW_PAD_CTL_GRP_B2DS		0x728
-#define IOMUXC_SW_PAD_CTL_GRP_B3DS		0x72c
-
-
-static void configure_dram_iomux(void)
-{
-	void __iomem *iomux = (void *)MX53_IOMUXC_BASE_ADDR;
-	u32 r1, r2, r4, r5, r6;
-
-	/* define the INPUT mode for DRAM_D[31:0] */
-	writel(0, iomux + IOMUXC_SW_PAD_CTL_GRP_DDRMODE);
-
-	/*
-	 * define the INPUT mode for SDQS[3:0]
-	 * (Freescale's documentation suggests DDR-mode for the
-	 * control line, but their source actually uses CMOS)
-	 */
-	writel(IOMUX_PADCTL_DDRI_DDR, iomux + IOMUXC_SW_PAD_CTL_GRP_DDRMODE_CTL);
-
-	r1 = IOMUX_PADCTL_DDRDSE(5);
-	r2 = IOMUX_PADCTL_DDRDSE(5) | PAD_CTL_PUE;
-	r4 = IOMUX_PADCTL_DDRSEL(2);
-	r5 = IOMUX_PADCTL_DDRDSE(5) | PAD_CTL_PKE | PAD_CTL_PUE | IOMUX_PADCTL_DDRI_DDR | PAD_CTL_PUS_47K_UP;
-	r6 = IOMUX_PADCTL_DDRDSE(4);
-
-	/*
-	 * this will adisable the Pull/Keeper for DRAM_x pins EXCEPT,
-	 * for DRAM_SDQS[3:0] and DRAM_SDODT[1:0]
-	 */
-	writel(0, iomux + IOMUXC_SW_PAD_CTL_GRP_DDRPKE);
-
-	/* set global drive strength for all DRAM_x pins */
-	writel(r4, iomux + IOMUXC_SW_PAD_CTL_GRP_DDR_TYPE);
-
-	/* set data dqs dqm drive strength */
-	writel(r6, iomux + IOMUXC_SW_PAD_CTL_GRP_B0DS);
-	writel(r6, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM0);
-	writel(r5, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS0);
-
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_GRP_B1DS);
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM1);
-	writel(r5, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS1);
-
-	writel(r6, iomux + IOMUXC_SW_PAD_CTL_GRP_B2DS);
-	writel(r6, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM2);
-	writel(r5, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS2);
-
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_GRP_B3DS);
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_DQM3);
-	writel(r5, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDQS3);
-
-	/* SDCLK pad drive strength control options */
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_0);
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDCLK_1);
-
-	/* Control and addr bus pad drive strength control options */
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_RAS);
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_CAS);
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_GRP_ADDDS);
-	writel(r1, iomux + IOMUXC_SW_PAD_CTL_GRP_CTLDS);
-	writel(r2, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT0);
-	writel(r2, iomux + IOMUXC_SW_PAD_CTL_PAD_DRAM_SDODT1);
-
-	/*
-	 * enable hysteresis on input pins
-	 * (Freescale's documentation suggests that enable hysteresis
-	 * would be better, but their source-code doesn't)
-	 */
-	writel(PAD_CTL_HYS, iomux + IOMUXC_SW_PAD_CTL_GRP_DDRHYS);
-}
-
-static void disable_watchdog(void)
-{
-	/*
-	 * configure WDOG to generate external reset on trigger
-	 * and disable power down counter
-	 */
-	writew(0x38, MX53_WDOG1_BASE_ADDR);
-	writew(0x0, MX53_WDOG1_BASE_ADDR + 8);
-	writew(0x38, MX53_WDOG2_BASE_ADDR);
-	writew(0x0, MX53_WDOG2_BASE_ADDR + 8);
-}
 
 extern char __dtb_imx53_guf_vincell_lt_start[];
 extern char __dtb_imx53_guf_vincell_start[];
 
-static noinline void imx53_guf_vincell_init(int is_lt)
+static noinline void imx53_guf_vincell_init(void *fdt)
 {
 	void __iomem *ccm = (void *)MX53_CCM_BASE_ADDR;
 	void __iomem *uart = IOMEM(MX53_UART2_BASE_ADDR);
-	void *fdt;
-	u32 r;
-	enum bootsource src;
-	int instance;
 
 	arm_setup_stack(MX53_IRAM_BASE_ADDR + MX53_IRAM_SIZE - 8);
 
@@ -151,29 +35,10 @@
 	pbl_set_putc(imx_uart_putc, uart);
 	pr_debug("GuF Vincell\n");
 
-	/* Skip SDRAM initialization if we run from RAM */
-	r = get_pc();
-	if (!(r > 0x70000000 && r < 0xf0000000)) {
-		disable_watchdog();
-		configure_dram_iomux();
-		imx_esdctlv4_init();
-
-		imx53_get_boot_source(&src, &instance);
-
-		if (src == BOOTSOURCE_NAND &&
-		    IS_ENABLED(CONFIG_MACH_GUF_VINCELL_XLOAD))
-			imx53_nand_start_image();
-	}
-
-	if (is_lt)
-		fdt = __dtb_imx53_guf_vincell_lt_start;
-	else
-		fdt = __dtb_imx53_guf_vincell_start;
-
 	imx53_barebox_entry(fdt);
 }
 
-static void __imx53_guf_vincell_init(int is_lt)
+static noinline void __imx53_guf_vincell_init(void *fdt)
 {
 	arm_early_mmu_cache_invalidate();
 	imx5_cpu_lowlevel_init();
@@ -181,15 +46,19 @@
 	setup_c();
 	barrier();
 
-	imx53_guf_vincell_init(is_lt);
+	imx53_guf_vincell_init(fdt);
 }
 
 ENTRY_FUNCTION(start_imx53_guf_vincell_lt, r0, r1, r2)
 {
-	__imx53_guf_vincell_init(1);
+	void *fdt = __dtb_imx53_guf_vincell_lt_start + get_runtime_offset();
+
+	__imx53_guf_vincell_init(fdt);
 }
 
 ENTRY_FUNCTION(start_imx53_guf_vincell, r0, r1, r2)
 {
-	__imx53_guf_vincell_init(0);
+	void *fdt = __dtb_imx53_guf_vincell_start + get_runtime_offset();
+
+	__imx53_guf_vincell_init(fdt);
 }
diff --git a/arch/arm/boards/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg b/arch/arm/boards/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg
index a12c28f..aff8321 100644
--- a/arch/arm/boards/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg
+++ b/arch/arm/boards/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg
@@ -1,4 +1,5 @@
 soc imx8mq
 
 loadaddr 0x007E1000
+max_load_size 0x3F000
 dcdofs 0x400
diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c
index 05f918f..9d81c27 100644
--- a/arch/arm/boards/phytec-som-imx6/lowlevel.c
+++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c
@@ -116,4 +116,5 @@
 PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_2gib, imx6q_phytec_phycore_som_emmc, SZ_2G, true);
 
 PHYTEC_ENTRY(start_phytec_phycore_imx6ul_som_512mb, imx6ul_phytec_phycore_som, SZ_512M, false);
-PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_256mb, imx6ull_phytec_phycore_som, SZ_256M, false);
+PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_lc_256mb, imx6ull_phytec_phycore_som_lc, SZ_256M, false);
+PHYTEC_ENTRY(start_phytec_phycore_imx6ull_som_512mb, imx6ull_phytec_phycore_som, SZ_512M, false);
diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c b/arch/arm/boards/reflex-achilles/lowlevel.c
index 9cedc74..b3da58f 100644
--- a/arch/arm/boards/reflex-achilles/lowlevel.c
+++ b/arch/arm/boards/reflex-achilles/lowlevel.c
@@ -74,18 +74,17 @@
 	arria10_start_image(barebox);
 }
 
+ENTRY_FUNCTION(start_socfpga_achilles_xload, r0, r1, r2)
+{
+	arm_cpu_lowlevel_init();
+	arm_setup_stack(ARRIA10_OCRAM_ADDR + SZ_256K - 32);
+	achilles_start();
+}
+
 ENTRY_FUNCTION(start_socfpga_achilles, r0, r1, r2)
 {
 	void *fdt;
 
-	if (get_pc() > ARRIA10_OCRAM_ADDR) {
-		arm_cpu_lowlevel_init();
-
-		arm_setup_stack(ARRIA10_OCRAM_ADDR + SZ_256K - 32);
-
-		achilles_start();
-	}
-
 	fdt = __dtb_socfpga_arria10_achilles_start + get_runtime_offset();
 
 	barebox_arm_entry(0x0, SZ_2G + SZ_1G, fdt);
diff --git a/arch/arm/boards/technexion-wandboard/flash-header-technexion-wandboard.imxcfg b/arch/arm/boards/technexion-wandboard/flash-header-technexion-wandboard.imxcfg
index 3362111..68cb08e 100644
--- a/arch/arm/boards/technexion-wandboard/flash-header-technexion-wandboard.imxcfg
+++ b/arch/arm/boards/technexion-wandboard/flash-header-technexion-wandboard.imxcfg
@@ -1,3 +1,4 @@
 loadaddr 0x00907000
 soc imx6
+max_load_size 0x11000
 dcdofs 0x400
diff --git a/arch/arm/boards/zii-imx6q-rdu2/flash-header-rdu2.imxcfg b/arch/arm/boards/zii-imx6q-rdu2/flash-header-rdu2.imxcfg
index 400a870..a4abe19 100644
--- a/arch/arm/boards/zii-imx6q-rdu2/flash-header-rdu2.imxcfg
+++ b/arch/arm/boards/zii-imx6q-rdu2/flash-header-rdu2.imxcfg
@@ -1,3 +1,4 @@
 soc imx6
 loadaddr 0x00907000
+max_load_size 0x31000
 dcdofs 0x400
diff --git a/arch/arm/configs/imx_v7_defconfig b/arch/arm/configs/imx_v7_defconfig
index bf84dfa..64b202b 100644
--- a/arch/arm/configs/imx_v7_defconfig
+++ b/arch/arm/configs/imx_v7_defconfig
@@ -7,7 +7,6 @@
 CONFIG_MACH_CCMX53=y
 CONFIG_MACH_FREESCALE_MX53_LOCO=y
 CONFIG_MACH_GUF_VINCELL=y
-CONFIG_MACH_GUF_VINCELL_XLOAD=y
 CONFIG_MACH_TQMA53=y
 CONFIG_MACH_FREESCALE_MX53_VMX53=y
 CONFIG_MACH_TX53=y
diff --git a/arch/arm/cpu/sections.c b/arch/arm/cpu/sections.c
index ab08ebf..a53236d 100644
--- a/arch/arm/cpu/sections.c
+++ b/arch/arm/cpu/sections.c
@@ -10,4 +10,3 @@
 char __bss_stop[0] __attribute__((section(".__bss_stop")));
 char __image_start[0] __attribute__((section(".__image_start")));
 char __image_end[0] __attribute__((section(".__image_end")));
-uint32_t __image_end_marker[1] __attribute__((section(".__image_end_marker"))) = { 0xdeadbeef };
diff --git a/arch/arm/cpu/uncompress.c b/arch/arm/cpu/uncompress.c
index 048bca0..be92bda 100644
--- a/arch/arm/cpu/uncompress.c
+++ b/arch/arm/cpu/uncompress.c
@@ -37,6 +37,9 @@
 unsigned long free_mem_ptr;
 unsigned long free_mem_end_ptr;
 
+extern unsigned char input_data[];
+extern unsigned char input_data_end[];
+
 void __noreturn barebox_multi_pbl_start(unsigned long membase,
 		unsigned long memsize, void *boarddata)
 {
@@ -44,11 +47,11 @@
 	void __noreturn (*barebox)(unsigned long, unsigned long, void *);
 	unsigned long endmem = membase + memsize;
 	unsigned long barebox_base;
-	uint32_t *image_end;
-	void *pg_start;
+	void *pg_start, *pg_end;
 	unsigned long pc = get_pc();
 
-	image_end = (void *)__image_end_marker + global_variable_offset();
+	pg_start = input_data + global_variable_offset();
+	pg_end = input_data_end + global_variable_offset();
 
 	if (IS_ENABLED(CONFIG_PBL_RELOCATABLE)) {
 		/*
@@ -62,14 +65,7 @@
 			relocate_to_adr(membase);
 	}
 
-	/*
-	 * image_end is the image_end_marker defined above. It is the last location
-	 * in the executable. Right after the executable the build process adds
-	 * the size of the appended compressed binary followed by the compressed
-	 * binary itself.
-	 */
-	pg_start = image_end + 2;
-	pg_len = *(image_end + 1);
+	pg_len = pg_end - pg_start;
 	uncompressed_len = get_unaligned((const u32 *)(pg_start + pg_len - 4));
 
 	if (IS_ENABLED(CONFIG_RELOCATABLE))
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 503d9b1..c08b35a 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -63,6 +63,7 @@
 				imx6dl-phytec-phycore-som-nand.dtb.o \
 				imx6dl-phytec-phycore-som-emmc.dtb.o \
 				imx6ul-phytec-phycore-som.dtb.o \
+				imx6ull-phytec-phycore-som-lc.dtb.o \
 				imx6ull-phytec-phycore-som.dtb.o
 pbl-dtb-$(CONFIG_MACH_PHYTEC_PHYCORE_IMX7) += imx7d-phyboard-zeta.dtb.o
 pbl-dtb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += armada-xp-openblocks-ax3-4-bb.dtb.o
diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som.dts b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
index 73f7dbe..6d18767 100644
--- a/arch/arm/dts/imx6ul-phytec-phycore-som.dts
+++ b/arch/arm/dts/imx6ul-phytec-phycore-som.dts
@@ -39,3 +39,11 @@
 &usdhc1 {
 	status = "okay";
 };
+
+&usbotg1 {
+	status = "okay";
+};
+
+&usbotg2 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi b/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi
index 2504c97..d829fdd 100644
--- a/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi
+++ b/arch/arm/dts/imx6ul-phytec-phycore-som.dtsi
@@ -89,6 +89,20 @@
 	status = "disabled";
 };
 
+&usbotg1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usb_otg1>;
+	dr_mode = "otg";
+	disable-over-current;
+	status = "disabled";
+};
+
+&usbotg2 {
+	dr_mode = "host";
+	disable-over-current;
+	status = "disabled";
+};
+
 &usdhc1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pinctrl_usdhc1>;
@@ -163,6 +177,12 @@
 			>;
 		};
 
+		pinctrl_usb_otg1: usbotg1grp {
+			fsl,pins = <
+				MX6UL_PAD_GPIO1_IO00__ANATOP_OTG1_ID	0x17059
+			>;
+		};
+
 		pinctrl_usdhc1: usdhc1grp {
 			fsl,pins = <
 				MX6UL_PAD_SD1_CMD__USDHC1_CMD     	0x17059
diff --git a/arch/arm/dts/imx6ull-phytec-phycore-som-lc.dts b/arch/arm/dts/imx6ull-phytec-phycore-som-lc.dts
new file mode 100644
index 0000000..94a7830
--- /dev/null
+++ b/arch/arm/dts/imx6ull-phytec-phycore-som-lc.dts
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
+/*
+ * Copyright (C) 2018 PHYTEC Messtechnik GmbH
+ * Author: Stefan Riedmueller <s.riedmueller@phytec.de>
+ */
+
+/dts-v1/;
+
+#include <arm/imx6ull.dtsi>
+#include "imx6ul-phytec-phycore-som.dtsi"
+
+/ {
+	model = "Phytec phyCORE-i.MX6 ULL SOM low-cost";
+	compatible = "phytec,imx6ul-pcl063", "fsl,imx6ull";
+};
+
+&fec1 {
+	status = "okay";
+};
+
+&gpmi {
+	status = "okay";
+};
+
+&i2c1 {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&usdhc1 {
+	status = "okay";
+};
+
+&usbotg1 {
+	status = "okay";
+};
diff --git a/arch/arm/dts/imx6ull-phytec-phycore-som.dts b/arch/arm/dts/imx6ull-phytec-phycore-som.dts
index de04132..4d73010 100644
--- a/arch/arm/dts/imx6ull-phytec-phycore-som.dts
+++ b/arch/arm/dts/imx6ull-phytec-phycore-som.dts
@@ -39,3 +39,11 @@
 &usdhc1 {
 	status = "okay";
 };
+
+&usbotg1 {
+	status = "okay";
+};
+
+&usbotg2 {
+	status = "okay";
+};
diff --git a/arch/arm/include/asm/sections.h b/arch/arm/include/asm/sections.h
index b465925..8ab01f2 100644
--- a/arch/arm/include/asm/sections.h
+++ b/arch/arm/include/asm/sections.h
@@ -11,7 +11,6 @@
 extern char __dynsym_end[];
 extern char __exceptions_start[];
 extern char __exceptions_stop[];
-extern uint32_t __image_end_marker[];
 
 #endif
 
diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S
index ddc65bb..53c9ce0 100644
--- a/arch/arm/lib/pbl.lds.S
+++ b/arch/arm/lib/pbl.lds.S
@@ -36,6 +36,8 @@
 {
 	. = BASE;
 
+	.image_start : { *(.__image_start) }
+
 	PRE_IMAGE
 
 	. = ALIGN(4);
@@ -91,9 +93,7 @@
 	}
 	__piggydata_end = .;
 
-	. = ALIGN(4);
-	.image_end : { *(.__image_end_marker) }
-	__image_end = .;
+	.image_end : { *(.__image_end) }
 
 	_barebox_image_size = __image_end - BASE;
 	_barebox_pbl_size = __bss_start - BASE;
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index edfc851..d9b6005 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -190,6 +190,7 @@
 	select ARCH_HAS_FEC_IMX
 	select CPU_V7
 	select PINCTRL
+	select OFDEVICE
 	select OFTREE
 	select COMMON_CLK
 	select COMMON_CLK_OF_PROVIDER
@@ -284,15 +285,6 @@
 	bool "Garz-Fricke Vincell"
 	select ARCH_IMX53
 
-config MACH_GUF_VINCELL_XLOAD
-	depends on MACH_GUF_VINCELL
-	bool "Garz-Fricke Vincell NAND xload support"
-	help
-	  The Vincell initializes SDRAM from board code. This normally limits
-	  the image size to the size of the SoC internal SRAM. Enable this
-	  option to be able to use bigger images when booting from NAND. Images
-	  built with this option are no longer bootable from USB though.
-
 config MACH_TQMA53
 	bool "TQ i.MX53 TQMa53"
 	select ARCH_IMX53
diff --git a/arch/arm/mach-imx/include/mach/imx-header.h b/arch/arm/mach-imx/include/mach/imx-header.h
index 05f1669..50584bb 100644
--- a/arch/arm/mach-imx/include/mach/imx-header.h
+++ b/arch/arm/mach-imx/include/mach/imx-header.h
@@ -96,6 +96,7 @@
 	uint32_t image_load_addr;
 	uint32_t image_dcd_offset;
 	uint32_t image_size;
+	uint32_t max_load_size;
 	uint32_t load_size;
 	char *outfile;
 	char *srkfile;
diff --git a/arch/arm/mach-imx/xload-common.c b/arch/arm/mach-imx/xload-common.c
index 13cd612..c5727eb 100644
--- a/arch/arm/mach-imx/xload-common.c
+++ b/arch/arm/mach-imx/xload-common.c
@@ -5,25 +5,6 @@
 
 int imx_image_size(void)
 {
-	uint32_t *image_end = (void *)__image_end;
-	uint32_t payload_len, pbl_len, imx_header_len, sizep;
-	void *pg_start;
-
-	pg_start = image_end + 1;
-
 	/* i.MX header is 4k */
-	imx_header_len = SZ_4K;
-
-	/* The length of the PBL image */
-	pbl_len = __image_end - _text;
-
-	sizep = 4;
-
-	/* The length of the payload is appended directly behind the PBL */
-	payload_len = *(image_end);
-
-	pr_debug("%s: payload_len: 0x%08x pbl_len: 0x%08x\n",
-			__func__, payload_len, pbl_len);
-
-	return imx_header_len + pbl_len + sizep + payload_len;
+	return barebox_image_size + SZ_4K;
 }
diff --git a/drivers/clk/imx/clk-imx5.c b/drivers/clk/imx/clk-imx5.c
index ae94e07..f59a41b 100644
--- a/drivers/clk/imx/clk-imx5.c
+++ b/drivers/clk/imx/clk-imx5.c
@@ -60,6 +60,7 @@
 #define CCM_CMEOR	0x84
 
 static struct clk *clks[IMX5_CLK_END];
+static struct clk_onecell_data clk_data;
 
 /* This is used multiple times */
 static const char *standard_pll_sel[] = {
@@ -411,6 +412,10 @@
 
 	mx51_clocks_init(dev, regs);
 
+	clk_data.clks = clks;
+	clk_data.clk_num = IMX5_CLK_END;
+	of_clk_add_provider(dev->device_node, of_clk_src_onecell_get, &clk_data);
+
 	return 0;
 }
 
@@ -503,6 +508,10 @@
 
 	mx53_clocks_init(dev, regs);
 
+	clk_data.clks = clks;
+	clk_data.clk_num = IMX5_CLK_END;
+	of_clk_add_provider(dev->device_node, of_clk_src_onecell_get, &clk_data);
+
 	return 0;
 }
 
diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig
index 2ab509d..56b9070 100644
--- a/drivers/crypto/caam/Kconfig
+++ b/drivers/crypto/caam/Kconfig
@@ -33,3 +33,27 @@
 	default y
 	help
 	  Selecting this will register the SEC4 hardware rng.
+
+if CRYPTO_DEV_FSL_CAAM_RNG
+
+config CRYPTO_DEV_FSL_CAAM_RNG_SELF_TEST
+	bool "Run RNG software self-test on impacted chips"
+	depends on ARCH_IMX6
+	depends on HABV4
+	default y
+	help
+	  Some chips with HAB >= 4.2.3 have an incorrect implementation of the
+	  RNG self-test in ROM code. In this case, a software self-test should
+	  be run to ensure correctness of the RNG. By enabling this config
+	  option, the software self-test is run automatically when this case
+	  is detected.
+
+	  Currently known impacted chips:
+	  * i.MX6DQ+ silicon revision 1.1
+	  * i.MX6DQ silicon revision 1.6
+	  * i.MX6DLS silicon revision 1.4
+	  * i.MX6SX silicon revision 1.4
+	  * i.MX6UL silicon revision 1.2
+	  * i.MX67SD silicon revision 1.3
+
+endif
diff --git a/drivers/crypto/caam/Makefile b/drivers/crypto/caam/Makefile
index 74d32da..7bd6f3e 100644
--- a/drivers/crypto/caam/Makefile
+++ b/drivers/crypto/caam/Makefile
@@ -3,3 +3,4 @@
 #
 obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM) += ctrl.o error.o jr.o
 obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_RNG) += caamrng.o
+obj-$(CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_SELF_TEST) += rng_self_test.o
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 9e62bd6..3991013 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -8,6 +8,7 @@
 #include <common.h>
 #include <clock.h>
 #include <driver.h>
+#include <hab.h>
 #include <init.h>
 #include <linux/barebox-wrapper.h>
 #include <linux/spinlock.h>
@@ -19,6 +20,7 @@
 #include "desc_constr.h"
 #include "error.h"
 #include "ctrl.h"
+#include "rng_self_test.h"
 
 bool caam_little_end;
 EXPORT_SYMBOL(caam_little_end);
@@ -570,6 +572,24 @@
 
 	cha_vid_ls = rd_reg32(&ctrl->perfmon.cha_id_ls);
 
+	/* habv4_need_rng_software_self_test is determined by habv4_get_status() */
+	if (IS_ENABLED(CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_SELF_TEST) &&
+	    habv4_need_rng_software_self_test) {
+		u8 caam_era;
+		u8 rngvid;
+		u8 rngrev;
+
+		caam_era = (rd_reg32(&ctrl->perfmon.ccb_id) & CCBVID_ERA_MASK) >> CCBVID_ERA_SHIFT;
+		rngvid = (cha_vid_ls & CHAVID_LS_RNGVID_MASK) >> CHAVID_LS_RNGVID_SHIFT;
+		rngrev = (rd_reg32(&ctrl->perfmon.cha_rev_ls) & CRNR_LS_RNGRN_MASK) >> CRNR_LS_RNGRN_SHIFT;
+
+		ret = caam_rng_self_test(ctrlpriv->jrpdev[0], caam_era, rngvid, rngrev);
+		if (ret != 0) {
+			caam_remove(dev);
+			return ret;
+		}
+	}
+
 	/*
 	 * If SEC has RNG version >= 4 and RNG state handle has not been
 	 * already instantiated, do RNG instantiation
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
index 6c9d6d7..19e7d6d 100644
--- a/drivers/crypto/caam/regs.h
+++ b/drivers/crypto/caam/regs.h
@@ -279,6 +279,8 @@
 
 	/* CAAM Hardware Instantiation Parameters		fa0-fbf */
 	u32 cha_rev_ms;		/* CRNR - CHA Rev No. Most significant half*/
+#define CRNR_LS_RNGRN_SHIFT	16
+#define CRNR_LS_RNGRN_MASK	(0xfull << CRNR_LS_RNGRN_SHIFT)
 	u32 cha_rev_ls;		/* CRNR - CHA Rev No. Least significant half*/
 #define CTPR_MS_QI_SHIFT	25
 #define CTPR_MS_QI_MASK		(0x1ull << CTPR_MS_QI_SHIFT)
@@ -311,6 +313,8 @@
 #define CCBVID_ERA_SHIFT	24
 	u32 ccb_id;		/* CCBVID - CCB Version ID	*/
 	u32 cha_id_ms;		/* CHAVID - CHA Version ID Most Significant*/
+#define CHAVID_LS_RNGVID_SHIFT	16
+#define CHAVID_LS_RNGVID_MASK	(0xfull << CHAVID_LS_RNGVID_SHIFT)
 	u32 cha_id_ls;		/* CHAVID - CHA Version ID Least Significant*/
 	u32 cha_num_ms;		/* CHANUM - CHA Number Most Significant	*/
 	u32 cha_num_ls;		/* CHANUM - CHA Number Least Significant*/
diff --git a/drivers/crypto/caam/rng_self_test.c b/drivers/crypto/caam/rng_self_test.c
new file mode 100644
index 0000000..aab4fa2
--- /dev/null
+++ b/drivers/crypto/caam/rng_self_test.c
@@ -0,0 +1,206 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+/*
+ * Copyright 2018 NXP
+ * Copyright (C) 2018 Pengutronix, Roland Hieber <r.hieber@pengutronix.de>
+ *
+ * CAAM RNG self-test -- based on the vendor patch for U-Boot:
+ * https://portland.source.codeaurora.org/patches/external/imxsupport/uboot-imx/imx_v2016.03_4.1.15_2.0.0_ga/HAB-238-Run-RNG-self-test-for-impacted-i.MX-chips.zip
+ *
+ * |    From: Utkarsh Gupta <utkarsh.gupta@nxp.com>
+ * |    Subject: [PATCH] HAB-238 Run RNG self test for impacted i.MX chips
+ * |
+ * |    Patch is only applicable to imx_v2016.03_4.1.15_2.0.0_ga branch of u-boot.
+ * |    Please adapt the patch for your respective release version.
+ * |
+ * |    Background:
+ * |    Few i.MX chips which have HAB 4.2.3 or beyond, have oberserved following
+ * |    warning message generated by HAB due to incorrect implementation of drng
+ * |    self test in boot ROM.
+ * |
+ * |        Event       |0xdb|0x0024|0x42| SRCE Field: 69 30 e1 1d
+ * |                    |    |      |    |             STS = HAB_WARNING (0x69)
+ * |                    |    |      |    |             RSN = HAB_ENG_FAIL (0x30)
+ * |                    |    |      |    |             CTX = HAB_CTX_ENTRY (0xE1)
+ * |                    |    |      |    |             ENG = HAB_ENG_CAAM (0x1D)
+ * |                    |    |      |    | Evt Data (hex):
+ * |                    |    |      |    |  00 08 00 02 40 00 36 06 55 55 00 03 00 00 00 00
+ * |                    |    |      |    |  00 00 00 00 00 00 00 00 00 00 00 01
+ * |
+ * |    It is recommended to run this rng self test before any RNG related crypto
+ * |    implementations are done.
+ * [...]
+ * |
+ * |    Signed-off-by: Utkarsh Gupta <utkarsh.gupta@nxp.com>
+ *
+ * Known impacted chips:
+ *
+ * - i.MX6DQ+ silicon revision 1.1
+ * - i.MX6DQ silicon revision 1.6
+ * - i.MX6DLS silicon revision 1.4
+ * - i.MX6SX silicon revision 1.4
+ * - i.MX6UL silicon revision 1.2
+ * - i.MX67SD silicon revision 1.3
+ */
+
+#define pr_fmt(fmt) "rng_self_test: " fmt
+
+#include <dma.h>
+#include <common.h>
+#include <linux/kernel.h>
+
+#include "error.h"
+#include "regs.h"
+#include "jr.h"
+
+static const u32 rng_dsc1[] = {
+	0xb0800036, 0x04800010, 0x3c85a15b, 0x50a9d0b1,
+	0x71a09fee, 0x2eecf20b, 0x02800020, 0xb267292e,
+	0x85bf712d, 0xe85ff43a, 0xa716b7fb, 0xc40bb528,
+	0x27b6f564, 0x8821cb5d, 0x9b5f6c26, 0x12a00020,
+	0x0a20de17, 0x6529357e, 0x316277ab, 0x2846254e,
+	0x34d23ba5, 0x6f5e9c32, 0x7abdc1bb, 0x0197a385,
+	0x82500405, 0xa2000001, 0x10880004, 0x00000005,
+	0x12820004, 0x00000020, 0x82500001, 0xa2000001,
+	0x10880004, 0x40000045, 0x02800020, 0x8f389cc7,
+	0xe7f7cbb0, 0x6bf2073d, 0xfc380b6d, 0xb22e9d1a,
+	0xee64fcb7, 0xa2b48d49, 0xdf9bc3a4, 0x82500009,
+	0xa2000001, 0x10880004, 0x00000005, 0x82500001,
+	0x60340020, 0xFFFFFFFF, 0xa2000001, 0x10880004,
+	0x00000005, 0x8250000d
+};
+
+static const u8 rng_result1[] = {
+	0x3a, 0xfe, 0x2c, 0x87, 0xcc, 0xb6, 0x44, 0x49,
+	0x19, 0x16, 0x9a, 0x74, 0xa1, 0x31, 0x8b, 0xef,
+	0xf4, 0x86, 0x0b, 0xb9, 0x5e, 0xee, 0xae, 0x91,
+	0x92, 0xf4, 0xa9, 0x8f, 0xb0, 0x37, 0x18, 0xa4
+};
+
+static const u32 rng_dsc2[] = {
+	0xb080003a, 0x04800020, 0x27b73130, 0x30b4b10f,
+	0x7c62b1ad, 0x77abe899, 0x67452301, 0xefcdab89,
+	0x98badcfe, 0x10325476, 0x02800020, 0x63f757cf,
+	0xb9165584, 0xc3c1b407, 0xcc4ce8ad, 0x1ffe8a58,
+	0xfb4fa893, 0xbb5f4af0, 0x3fb946a1, 0x12a00020,
+	0x56cbcaa5, 0xfff3adad, 0xe804dcbf, 0x9a900c71,
+	0xa42017e3, 0x826948e2, 0xd0cfeb3e, 0xaf1a136a,
+	0x82500405, 0xa2000001, 0x10880004, 0x00000005,
+	0x12820004, 0x00000020, 0x82500001, 0xa2000001,
+	0x10880004, 0x40000045, 0x02800020, 0x2e882f8a,
+	0xe929943e, 0x8132c0a8, 0x12037f90, 0x809fbd66,
+	0x8684ea04, 0x00cbafa7, 0x7b82d12a, 0x82500009,
+	0xa2000001, 0x10880004, 0x00000005, 0x82500001,
+	0x60340020, 0xFFFFFFFF, 0xa2000001, 0x10880004,
+	0x00000005, 0x8250000d
+};
+
+static const u8 rng_result2[] = {
+	0x76, 0x87, 0x66, 0x4e, 0xd8, 0x1d, 0x1f, 0x43,
+	0x76, 0x50, 0x85, 0x5d, 0x1e, 0x1d, 0x9d, 0x0f,
+	0x93, 0x75, 0x83, 0xff, 0x9a, 0x9b, 0x61, 0xa9,
+	0xa5, 0xeb, 0xa3, 0x28, 0x2a, 0x15, 0xc1, 0x57
+};
+
+/*
+ * construct_rng_self_test_jobdesc() - Implement destination address in RNG self test descriptors
+ * Returns zero on success, and negative on error.
+ */
+static void construct_rng_self_test_jobdesc(u32 *desc, const u32 *rng_st_dsc, u8 *res_addr, int desc_size)
+{
+	int result_addr_idx = desc_size - 5;
+	int i;
+
+	for (i = 0; i < desc_size; i++) {
+		desc[i] = rng_st_dsc[i];
+	}
+
+	/* Replace destination address in the descriptor */
+	desc[result_addr_idx] = (u32)res_addr;
+}
+
+/* rng_self_test_done() - callback for caam_jr_enqueue */
+static void rng_self_test_done(struct device_d *dev, u32 *desc, u32 err, void *arg)
+{
+	int * job_err = arg;
+	*job_err = err;
+}
+
+/*
+ * caam_rng_self_test() - Perform RNG self test
+ * Returns zero on success, and negative on error.
+ */
+int caam_rng_self_test(struct device_d *dev, const u8 caam_era, const u8 rngvid, const u8 rngrev)
+{
+	int ret, desc_size = 0, result_size = 0, job_err = 0;
+	const u32 *rng_st_dsc;
+	const u8 *exp_result;
+	u32 *desc;
+	u8 *result;
+
+	pr_debug("got CAAM ERA %d, RNG Version ID %d, RNG revision %d\n",
+		 caam_era, rngvid, rngrev);
+
+	if (caam_era < 8 && rngvid == 4 && rngrev < 3) {
+		/* older affected i.MX chipsets have CAAM < 8 and have RNG4 < 4.3 */
+		rng_st_dsc = rng_dsc1;
+		desc_size = ARRAY_SIZE(rng_dsc1);
+		exp_result = rng_result1;
+		result_size = ARRAY_SIZE(rng_result1);
+	} else if (caam_era >= 8 || (rngvid >= 4 && rngrev >= 3)) {
+		/* newer affected chipsets have CAAM >= 8 or RNG4 >= 4.3 */
+		rng_st_dsc = rng_dsc2;
+		desc_size = ARRAY_SIZE(rng_dsc2);
+		exp_result = rng_result2;
+		result_size = ARRAY_SIZE(rng_result2);
+	} else {
+		pr_err("Invalid CAAM version: %d,%d,%d\n",
+				caam_era, rngvid, rngrev);
+		return -EINVAL;
+	}
+
+	result = dma_alloc(sizeof(*result) * result_size);
+	desc = dma_alloc(sizeof(*desc) * desc_size);
+
+	if (!result || !desc) {
+		ret = -ENOMEM;
+		goto err;
+	}
+
+	construct_rng_self_test_jobdesc(desc, rng_st_dsc, result, desc_size);
+
+	dma_sync_single_for_device((unsigned long)desc,
+			desc_size * sizeof(*desc), DMA_TO_DEVICE);
+	dma_sync_single_for_device((unsigned long)result,
+			result_size * sizeof(*result), DMA_FROM_DEVICE);
+
+	/* wait for job completion */
+	ret = caam_jr_enqueue(dev, desc, rng_self_test_done, &job_err);
+	if (ret) {
+		pr_err("Running RNG self-test descriptor failed: %d %s\n",
+				ret, strerror(ret));
+		goto err;
+	}
+	if (job_err) {
+		ret = -EINVAL;
+		pr_err("Job Error:\n");
+		caam_jr_strstatus(dev, job_err);
+		goto err;
+	}
+
+	dma_sync_single_for_cpu((unsigned long)result, result_size * sizeof(*result),
+			DMA_FROM_DEVICE);
+
+	if (memcmp(result, exp_result, sizeof(*result) * result_size) != 0) {
+		pr_err("RNG self-test failed with unexpected result\n");
+		ret = -ERANGE;
+		goto err;
+	}
+
+	pr_info("RNG software self-test passed\n");
+	ret = 0;
+
+err:
+	dma_free(desc);
+	dma_free(result);
+	return ret;
+}
diff --git a/drivers/crypto/caam/rng_self_test.h b/drivers/crypto/caam/rng_self_test.h
new file mode 100644
index 0000000..1f5bf32
--- /dev/null
+++ b/drivers/crypto/caam/rng_self_test.h
@@ -0,0 +1,24 @@
+/*
+ * CAAM RNG self test
+ *
+ * Copyright (C) 2018 Pengutronix, Roland Hieber <r.hieber@pengutronix.de>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef RNG_SELF_TEST_H
+#define RNG_SELF_TEST_H
+
+int caam_rng_self_test(struct device_d *dev, const u8 caam_era, const u8 rngvid, const u8 rngrev);
+
+#endif /* RNG_SELF_TEST_H */
diff --git a/drivers/hab/habv3.c b/drivers/hab/habv3.c
index 82ae245..47d3caf 100644
--- a/drivers/hab/habv3.c
+++ b/drivers/hab/habv3.c
@@ -78,5 +78,9 @@
 
 int imx25_hab_get_status(void)
 {
+	if (!cpu_is_mx25())
+		return 0;
+
 	return imx_habv3_get_status(readl(IOMEM(0x780018d4)));
 }
+postmmu_initcall(imx25_hab_get_status);
diff --git a/drivers/hab/habv4.c b/drivers/hab/habv4.c
index 28fd42e..ca95c01 100644
--- a/drivers/hab/habv4.c
+++ b/drivers/hab/habv4.c
@@ -20,6 +20,7 @@
 
 #include <common.h>
 #include <hab.h>
+#include <init.h>
 #include <types.h>
 
 #include <mach/generic.h>
@@ -387,6 +388,39 @@
 	habv4_display_event_record((struct hab_event_record *)data);
 }
 
+/* Some chips with HAB >= 4.2.3 have an incorrect implementation of the RNG
+ * self-test in ROM code. In this case, an HAB event is generated, and a
+ * software self-test should be run. This variable is set to @c true by
+ * habv4_get_status() when this occurs. */
+bool habv4_need_rng_software_self_test = false;
+EXPORT_SYMBOL(habv4_need_rng_software_self_test);
+
+#define RNG_FAIL_EVENT_SIZE 36
+static uint8_t habv4_known_rng_fail_events[][RNG_FAIL_EVENT_SIZE] = {
+	{ 0xdb, 0x00, 0x24, 0x42,  0x69, 0x30, 0xe1, 0x1d,
+	  0x00, 0x80, 0x00, 0x02,  0x40, 0x00, 0x36, 0x06,
+	  0x55, 0x55, 0x00, 0x03,  0x00, 0x00, 0x00, 0x00,
+	  0x00, 0x00, 0x00, 0x00,  0x00, 0x00, 0x00, 0x00,
+	  0x00, 0x00, 0x00, 0x01 },
+	{ 0xdb, 0x00, 0x24, 0x42,  0x69, 0x30, 0xe1, 0x1d,
+	  0x00, 0x04, 0x00, 0x02,  0x40, 0x00, 0x36, 0x06,
+	  0x55, 0x55, 0x00, 0x03,  0x00, 0x00, 0x00, 0x00,
+	  0x00, 0x00, 0x00, 0x00,  0x00, 0x00, 0x00, 0x00,
+	  0x00, 0x00, 0x00, 0x01 },
+};
+
+static bool is_known_rng_fail_event(const uint8_t *data, size_t len)
+{
+	int i;
+	for (i = 0; i < ARRAY_SIZE(habv4_known_rng_fail_events); i++) {
+		if (memcmp(data, habv4_known_rng_fail_events[i],
+			   min(len, (uint32_t)RNG_FAIL_EVENT_SIZE)) == 0) {
+			return true;
+		}
+	}
+	return false;
+}
+
 static int habv4_get_status(const struct habv4_rvt *rvt)
 {
 	uint8_t data[256];
@@ -413,10 +447,18 @@
 
 	len = sizeof(data);
 	while (rvt->report_event(HAB_STATUS_WARNING, index, data, &len) == HAB_STATUS_SUCCESS) {
-		pr_err("-------- HAB warning Event %d --------\n", index);
-		pr_err("event data:\n");
 
-		habv4_display_event(data, len);
+		/* suppress RNG self-test fail events if they can be handled in software */
+		if (IS_ENABLED(CONFIG_CRYPTO_DEV_FSL_CAAM_RNG_SELF_TEST) &&
+		    is_known_rng_fail_event(data, len)) {
+			pr_debug("RNG self-test failure detected, will run software self-test\n");
+			habv4_need_rng_software_self_test = true;
+		} else {
+			pr_err("-------- HAB warning Event %d --------\n", index);
+			pr_err("event data:\n");
+			habv4_display_event(data, len);
+		}
+
 		len = sizeof(data);
 		index++;
 	}
@@ -460,9 +502,54 @@
 	return -EINVAL;
 }
 
+static int init_imx6_hab_get_status(void)
+{
+	int ret = 0;
+
+	if (!cpu_is_mx6())
+		/* can happen in multi-image builds and is not an error */
+		return 0;
+
+	ret = imx6_hab_get_status();
+
+	/*
+	 * Nobody will check the return value if there were HAB errors, but the
+	 * initcall will fail spectaculously with a strange error message.
+	 */
+	if (ret == -EPERM)
+		return 0;
+	return ret;
+}
+
+/*
+ * Need to run before MMU setup because i.MX6 ROM code is mapped near 0x0,
+ * which will no longer be accessible when the MMU sets the zero page to
+ * faulting.
+ */
+postconsole_initcall(init_imx6_hab_get_status);
+
 int imx28_hab_get_status(void)
 {
 	const struct habv4_rvt *rvt = (void *)HABV4_RVT_IMX28;
 
 	return habv4_get_status(rvt);
 }
+
+static int init_imx28_hab_get_status(void)
+{
+	int ret = 0;
+
+	if (!cpu_is_mx28())
+		/* can happen in multi-image builds and is not an error */
+		return 0;
+
+	ret = imx28_hab_get_status();
+
+	/* nobody will check the return value if there were HAB errors, but the
+	 * initcall will fail spectaculously with a strange error message. */
+	if (ret == -EPERM)
+		return 0;
+	return ret;
+}
+/* i.MX28 ROM code can be run after MMU setup to make use of caching */
+postmmu_initcall(init_imx28_hab_get_status);
diff --git a/drivers/nvmem/ocotp.c b/drivers/nvmem/ocotp.c
index e689559..e0cf35f 100644
--- a/drivers/nvmem/ocotp.c
+++ b/drivers/nvmem/ocotp.c
@@ -70,6 +70,7 @@
 #define IMX6_OTP_DATA_ERROR_VAL		0xBADABADA
 #define DEF_RELAX			20
 #define MAC_OFFSET_0			(0x22 * 4)
+#define IMX6UL_MAC_OFFSET_1		(0x23 * 4)
 #define MAC_OFFSET_1			(0x24 * 4)
 #define MAX_MAC_OFFSETS			2
 #define MAC_BYTES			8
@@ -421,10 +422,14 @@
 	int ret;
 
 	ret = regmap_bulk_read(map, offset, buf, MAC_BYTES);
+
 	if (ret < 0)
 		return ret;
 
-	data->format_mac(mac, buf, OCOTP_HW_TO_MAC);
+	if (offset != IMX6UL_MAC_OFFSET_1)
+		data->format_mac(mac, buf, OCOTP_HW_TO_MAC);
+	else
+		data->format_mac(mac, buf + 2, OCOTP_HW_TO_MAC);
 
 	return 0;
 }
@@ -639,6 +644,14 @@
 	.format_mac = imx_ocotp_format_mac,
 };
 
+static struct imx_ocotp_data imx6ul_ocotp_data = {
+	.num_regs = 512,
+	.addr_to_offset = imx6q_addr_to_offset,
+	.mac_offsets_num = 2,
+	.mac_offsets = { MAC_OFFSET_0, IMX6UL_MAC_OFFSET_1 },
+	.format_mac = imx_ocotp_format_mac,
+};
+
 static struct imx_ocotp_data vf610_ocotp_data = {
 	.num_regs = 512,
 	.addr_to_offset = vf610_addr_to_offset,
@@ -667,7 +680,7 @@
 		.data = &imx6sl_ocotp_data,
 	}, {
 		.compatible = "fsl,imx6ul-ocotp",
-		.data = &imx6q_ocotp_data,
+		.data = &imx6ul_ocotp_data,
 	}, {
 		.compatible = "fsl,imx8mq-ocotp",
 		.data = &imx8mq_ocotp_data,
diff --git a/drivers/video/imx-ipu-v3/imx-pd.c b/drivers/video/imx-ipu-v3/imx-pd.c
index 09d8a3a..601be35 100644
--- a/drivers/video/imx-ipu-v3/imx-pd.c
+++ b/drivers/video/imx-ipu-v3/imx-pd.c
@@ -45,7 +45,7 @@
 	case IMX_IPU_VPL_DI_MODE:
 		mode = data;
 
-		mode->di_clkflags = IPU_DI_CLKMODE_SYNC;
+		mode->di_clkflags = IPU_DI_CLKMODE_NON_FRACTIONAL;
 		mode->bus_format = imx_pd->bus_format;
 		return 0;
 
diff --git a/drivers/video/imx-ipu-v3/ipu-di.c b/drivers/video/imx-ipu-v3/ipu-di.c
index b6e64fe..b430241 100644
--- a/drivers/video/imx-ipu-v3/ipu-di.c
+++ b/drivers/video/imx-ipu-v3/ipu-di.c
@@ -140,6 +140,7 @@
 	int div;
 
 	tmp *= 16;
+	tmp += outrate / 2;
 
 	do_div(tmp, outrate);
 
diff --git a/images/.gitignore b/images/.gitignore
index d6e85fa..7a74937 100644
--- a/images/.gitignore
+++ b/images/.gitignore
@@ -1,6 +1,4 @@
 *.pbl
-*.pblx.*
-*.pblx
 *.pblb
 *.img
 *.imximg
diff --git a/images/Makefile b/images/Makefile
index 5c4d99a..4c6d486 100644
--- a/images/Makefile
+++ b/images/Makefile
@@ -6,14 +6,12 @@
 # encapsulated in SoC (or SoC boot type) specific image formats.
 #
 # The basic idea here is that we generate a single barebox main binary. This
-# is compressed and prepended with a self extractor, generated as barebox.x.
-# barebox.x is then prepended with different board specific pbls. The pbls
+# is compressed and included into a board specific PBL image. The PBL images
 # are generally named after their entrypoints. So a pcm038 specific pbl will
 # generate the following files:
 #
 # start_imx27_pcm038.pbl - The ELF file, linked with the entrypoint start_imx27_pcm038
 # start_imx27_pcm038.pblb - The raw binary of the above.
-# start_imx27_pcm038.pblx - The pblb appended with barebox.x
 # start_imx27_pcm038.pbl.map - The linker map file
 # start_imx27_pcm038.pbl.s - the disassembled ELF, generated with:
 #                            make images/start_imx27_pcm038.pbl.s
@@ -25,21 +23,21 @@
 #
 # For CONFIG_MACH_FREESCALE_MX51_PDK build barebox-imx51-babbage.img
 #
-## FILE_barebox-imx51-babbage.img = start_imx51_babbage.pblx.imximg
+## FILE_barebox-imx51-babbage.img = start_imx51_babbage.pblb.imximg
 #
 # barebox-imx51-babbage.img should be generated (copied) from
-# start_imx51_babbage.pblx.imximg. This copy process is only done so that we
+# start_imx51_babbage.pblb.imximg. This copy process is only done so that we
 # can generate images with a sane name. So what we really need for this
 # board is a i.MX specific image, a .imximg
 #
-## CFG_start_imx51_babbage.pblx.imximg = $(board)/freescale-mx51-pdk/flash-header.imxcfg
+## CFG_start_imx51_babbage.pblb.imximg = $(board)/freescale-mx51-pdk/flash-header.imxcfg
 #
-# The .imximg can be generated from a .pblx using a rule specified in Makefile.imx.
+# The .imximg can be generated from a .pblb using a rule specified in Makefile.imx.
 # The configfile needed for this image is specified with CFG_<filename> = <configfile>
 #
-## pblx-$(CONFIG_MACH_FREESCALE_MX51_PDK) += start_imx51_babbage
+## pblb-$(CONFIG_MACH_FREESCALE_MX51_PDK) += start_imx51_babbage
 #
-# For this image we need a pblx (self extracting barebox binary) with
+# For this image we need a pblb (self extracting barebox binary) with
 # start_imx51_babbage as entrypoint. start_imx51_babbage will be used
 # both as entrypoint and as filename
 #
@@ -57,27 +55,18 @@
       cmd_elf__ ?= $(LD) $(LDFLAGS_barebox) --gc-sections -pie			\
 		-e $(2) -Map $@.map $(LDFLAGS_$(@F)) -o $@		\
 		-T $(pbl-lds)						\
-		--start-group $(barebox-pbl-common) --end-group
+		--start-group $(barebox-pbl-common) $(obj)/piggy.o --end-group
 
 PBL_CPPFLAGS	+= -fdata-sections -ffunction-sections
 
-$(obj)/%.pbl: $(pbl-lds) $(barebox-pbl-common) FORCE
+piggy_o := piggy.$(suffix_y).o
+
+$(obj)/%.pbl: $(pbl-lds) $(barebox-pbl-common) $(obj)/piggy.o FORCE
 	$(call if_changed,elf__,$(*F))
 
 $(obj)/%.pblb: $(obj)/%.pbl FORCE
 	$(call if_changed,objcopy_bin,$(*F))
 
-quiet_cmd_pblx ?= PBLX    $@
-      cmd_pblx ?= cat $(obj)/$(patsubst %.pblx,%.pblb,$(2)) > $@; \
-		  $(call size_append, $(obj)/barebox.z) >> $@; \
-		  cat $(obj)/barebox.z >> $@; \
-		  $(objtree)/scripts/fix_size -f $@
-
-$(obj)/%.pblx: $(obj)/%.pblb $(obj)/barebox.z FORCE
-	$(call if_changed,pblx,$(@F))
-	$(call cmd,check_file_size,$@,$(CONFIG_BAREBOX_MAX_PBLX_SIZE))
-
-
 $(obj)/%.s: $(obj)/% FORCE
 	$(call if_changed,disasm)
 
@@ -87,6 +76,8 @@
 suffix_$(CONFIG_IMAGE_COMPRESSION_XZKERN) = xzkern
 suffix_$(CONFIG_IMAGE_COMPRESSION_NONE) = comp_copy
 
+$(obj)/piggy.o: $(obj)/barebox.z FORCE
+
 # barebox.z - compressed barebox binary
 # ----------------------------------------------------------------
 $(obj)/barebox.z: $(obj)/../barebox.bin FORCE
@@ -115,10 +106,9 @@
 include $(srctree)/images/Makefile.at91
 
 targets += $(image-y) pbl.lds barebox.x barebox.z
-targets += $(patsubst %,%.pblx,$(pblx-y))
-targets += $(patsubst %,%.pblb,$(pblx-y))
-targets += $(patsubst %,%.pbl,$(pblx-y))
-targets += $(patsubst %,%.s,$(pblx-y))
+targets += $(patsubst %,%.pblb,$(pblb-y))
+targets += $(patsubst %,%.pbl,$(pblb-y))
+targets += $(patsubst %,%.s,$(pblb-y))
 targets += $(foreach m, $(image-y), $(FILE_$(m)))
 
 SECONDARY: $(addprefix $(obj)/,$(targets))
@@ -143,7 +133,7 @@
 $(flash-list): $(image-y-path)
 	@for i in $^; do echo $$i; done > $@
 
-clean-files := *.pbl *.pblb *.pblx *.map start_*.imximg *.img barebox.z start_*.kwbimg \
+clean-files := *.pbl *.pblb *.map start_*.imximg *.img barebox.z start_*.kwbimg \
 	start_*.kwbuartimg *.socfpgaimg *.mlo *.t20img *.t20img.cfg *.t30img \
 	*.t30img.cfg *.t124img *.t124img.cfg *.mlospi *.mlo *.mxsbs *.mxssd \
 	start_*.simximg start_*.usimximg *.imx-sram-img
diff --git a/images/Makefile.am33xx b/images/Makefile.am33xx
index 50fa019..1de2474 100644
--- a/images/Makefile.am33xx
+++ b/images/Makefile.am33xx
@@ -15,124 +15,124 @@
 $(obj)/%.mlospi: $(obj)/% $(obj)/%.mlo FORCE
 	$(call if_changed,mlo_spi_image)
 
-pblx-$(CONFIG_MACH_AFI_GF) += start_am33xx_afi_gf_sdram
-FILE_barebox-am33xx-afi-gf.img = start_am33xx_afi_gf_sdram.pblx
+pblb-$(CONFIG_MACH_AFI_GF) += start_am33xx_afi_gf_sdram
+FILE_barebox-am33xx-afi-gf.img = start_am33xx_afi_gf_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_AFI_GF) += barebox-am33xx-afi-gf.img
 
-pblx-$(CONFIG_MACH_AFI_GF) += start_am33xx_afi_gf_sram
-FILE_barebox-am33xx-afi-gf-mlo.img = start_am33xx_afi_gf_sram.pblx.mlo
-FILE_barebox-am33xx-afi-gf-mlo.spi.img = start_am33xx_afi_gf_sram.pblx.mlospi
+pblb-$(CONFIG_MACH_AFI_GF) += start_am33xx_afi_gf_sram
+FILE_barebox-am33xx-afi-gf-mlo.img = start_am33xx_afi_gf_sram.pblb.mlo
+FILE_barebox-am33xx-afi-gf-mlo.spi.img = start_am33xx_afi_gf_sram.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_AFI_GF) += barebox-am33xx-afi-gf-mlo.img
 am33xx-mlospi-$(CONFIG_MACH_AFI_GF) += barebox-am33xx-afi-gf-mlo.spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_sdram
-FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_nand_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_sdram
+FILE_barebox-am33xx-phytec-phycore.img = start_am33xx_phytec_phycore_nand_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_emmc_sdram
-FILE_barebox-am33xx-phytec-phycore-emmc.img = start_am33xx_phytec_phycore_emmc_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_emmc_sdram
+FILE_barebox-am33xx-phytec-phycore-emmc.img = start_am33xx_phytec_phycore_emmc_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-emmc.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_spi_sdram
-FILE_barebox-am33xx-phytec-phycore-no-spi.img = start_am33xx_phytec_phycore_nand_no_spi_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_spi_sdram
+FILE_barebox-am33xx-phytec-phycore-no-spi.img = start_am33xx_phytec_phycore_nand_no_spi_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-no-spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_eeprom_sdram
-FILE_barebox-am33xx-phytec-phycore-no-eeprom.img = start_am33xx_phytec_phycore_nand_no_eeprom_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_eeprom_sdram
+FILE_barebox-am33xx-phytec-phycore-no-eeprom.img = start_am33xx_phytec_phycore_nand_no_eeprom_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-no-eeprom.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram
-FILE_barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img = start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram
+FILE_barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img = start_am33xx_phytec_phycore_nand_no_spi_no_eeprom_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-no-spi-no-eeprom.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram
-FILE_barebox-am33xx-phytec-phycore-r2-mlo.img = start_am33xx_phytec_phycore_r2_sram.pblx.mlo
-FILE_barebox-am33xx-phytec-phycore-r2-mlo.spi.img = start_am33xx_phytec_phycore_r2_sram.pblx.mlospi
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram
+FILE_barebox-am33xx-phytec-phycore-r2-mlo.img = start_am33xx_phytec_phycore_r2_sram.pblb.mlo
+FILE_barebox-am33xx-phytec-phycore-r2-mlo.spi.img = start_am33xx_phytec_phycore_r2_sram.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo.spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_1024mb
-FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.spi.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblx.mlospi
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_r2_sram_1024mb
+FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblb.mlo
+FILE_barebox-am33xx-phytec-phycore-r2-mlo-1024mb.spi.img = start_am33xx_phytec_phycore_r2_sram_1024mb.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-1024mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-r2-mlo-1024mb.spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_256mb
-FILE_barebox-am33xx-phytec-phycore-mlo-256mb.img = start_am33xx_phytec_phycore_sram_256mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phycore-mlo-256mb.spi.img = start_am33xx_phytec_phycore_sram_256mb.pblx.mlospi
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_256mb
+FILE_barebox-am33xx-phytec-phycore-mlo-256mb.img = start_am33xx_phytec_phycore_sram_256mb.pblb.mlo
+FILE_barebox-am33xx-phytec-phycore-mlo-256mb.spi.img = start_am33xx_phytec_phycore_sram_256mb.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-256mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-256mb.spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_128mb
-FILE_barebox-am33xx-phytec-phycore-mlo-128mb.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phycore-mlo-128mb.spi.img = start_am33xx_phytec_phycore_sram_128mb.pblx.mlospi
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_128mb
+FILE_barebox-am33xx-phytec-phycore-mlo-128mb.img = start_am33xx_phytec_phycore_sram_128mb.pblb.mlo
+FILE_barebox-am33xx-phytec-phycore-mlo-128mb.spi.img = start_am33xx_phytec_phycore_sram_128mb.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-128mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-128mb.spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_512mb
-FILE_barebox-am33xx-phytec-phycore-mlo-512mb.img = start_am33xx_phytec_phycore_sram_512mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phycore-mlo-512mb.spi.img = start_am33xx_phytec_phycore_sram_512mb.pblx.mlospi
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_512mb
+FILE_barebox-am33xx-phytec-phycore-mlo-512mb.img = start_am33xx_phytec_phycore_sram_512mb.pblb.mlo
+FILE_barebox-am33xx-phytec-phycore-mlo-512mb.spi.img = start_am33xx_phytec_phycore_sram_512mb.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-512mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-512mb.spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_2x512mb
-FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img = start_am33xx_phytec_phycore_sram_2x512mb.pblx.mlospi
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycore_sram_2x512mb
+FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.img = start_am33xx_phytec_phycore_sram_2x512mb.pblb.mlo
+FILE_barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img = start_am33xx_phytec_phycore_sram_2x512mb.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-2x512mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycore-mlo-2x512mb.spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sdram
-FILE_barebox-am33xx-phytec-phyflex.img = start_am33xx_phytec_phyflex_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sdram
+FILE_barebox-am33xx-phytec-phyflex.img = start_am33xx_phytec_phyflex_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_no_spi_sdram
-FILE_barebox-am33xx-phytec-phyflex-no-spi.img = start_am33xx_phytec_phyflex_no_spi_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_no_spi_sdram
+FILE_barebox-am33xx-phytec-phyflex-no-spi.img = start_am33xx_phytec_phyflex_no_spi_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex-no-spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_no_eeprom_sdram
-FILE_barebox-am33xx-phytec-phyflex-no-eeprom.img = start_am33xx_phytec_phyflex_no_eeprom_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_no_eeprom_sdram
+FILE_barebox-am33xx-phytec-phyflex-no-eeprom.img = start_am33xx_phytec_phyflex_no_eeprom_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex-no-eeprom.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_no_spi_no_eeprom_sdram
-FILE_barebox-am33xx-phytec-phyflex-no-spi-no-eeprom.img = start_am33xx_phytec_phyflex_no_spi_no_eeprom_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_no_spi_no_eeprom_sdram
+FILE_barebox-am33xx-phytec-phyflex-no-spi-no-eeprom.img = start_am33xx_phytec_phyflex_no_spi_no_eeprom_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex-no-spi-no-eeprom.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sram_256mb
-FILE_barebox-am33xx-phytec-phyflex-mlo-256mb.img = start_am33xx_phytec_phyflex_sram_256mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phyflex-mlo-256mb.spi.img = start_am33xx_phytec_phyflex_sram_256mb.pblx.mlospi
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sram_256mb
+FILE_barebox-am33xx-phytec-phyflex-mlo-256mb.img = start_am33xx_phytec_phyflex_sram_256mb.pblb.mlo
+FILE_barebox-am33xx-phytec-phyflex-mlo-256mb.spi.img = start_am33xx_phytec_phyflex_sram_256mb.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex-mlo-256mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex-mlo-256mb.spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sram_512mb
-FILE_barebox-am33xx-phytec-phyflex-mlo-512mb.img = start_am33xx_phytec_phyflex_sram_512mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phyflex-mlo-512mb.spi.img = start_am33xx_phytec_phyflex_sram_512mb.pblx.mlospi
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phyflex_sram_512mb
+FILE_barebox-am33xx-phytec-phyflex-mlo-512mb.img = start_am33xx_phytec_phyflex_sram_512mb.pblb.mlo
+FILE_barebox-am33xx-phytec-phyflex-mlo-512mb.spi.img = start_am33xx_phytec_phyflex_sram_512mb.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex-mlo-512mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phyflex-mlo-512mb.spi.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycard_sdram
-FILE_barebox-am33xx-phytec-phycard.img = start_am33xx_phytec_phycard_sdram.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycard_sdram
+FILE_barebox-am33xx-phytec-phycard.img = start_am33xx_phytec_phycard_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycard.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycard_sram_256mb
-FILE_barebox-am33xx-phytec-phycard-mlo-256mb.img = start_am33xx_phytec_phycard_sram_256mb.pblx.mlo
-FILE_barebox-am33xx-phytec-phycard-mlo-256mb.spi.img = start_am33xx_phytec_phycard_sram_256mb.pblx.mlospi
+pblb-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += start_am33xx_phytec_phycard_sram_256mb
+FILE_barebox-am33xx-phytec-phycard-mlo-256mb.img = start_am33xx_phytec_phycard_sram_256mb.pblb.mlo
+FILE_barebox-am33xx-phytec-phycard-mlo-256mb.spi.img = start_am33xx_phytec_phycard_sram_256mb.pblb.mlospi
 am33xx-mlo-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycard-mlo-256mb.img
 am33xx-mlospi-$(CONFIG_MACH_PHYTEC_SOM_AM335X) += barebox-am33xx-phytec-phycard-mlo-256mb.spi.img
 
-pblx-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sdram
-FILE_barebox-am33xx-beaglebone.img = start_am33xx_beaglebone_sdram.pblx
+pblb-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sdram
+FILE_barebox-am33xx-beaglebone.img = start_am33xx_beaglebone_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_BEAGLEBONE) += barebox-am33xx-beaglebone.img
 
-pblx-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sram
-FILE_barebox-am33xx-beaglebone-mlo.img = start_am33xx_beaglebone_sram.pblx.mlo
+pblb-$(CONFIG_MACH_BEAGLEBONE) += start_am33xx_beaglebone_sram
+FILE_barebox-am33xx-beaglebone-mlo.img = start_am33xx_beaglebone_sram.pblb.mlo
 am33xx-mlo-$(CONFIG_MACH_BEAGLEBONE) += barebox-am33xx-beaglebone-mlo.img
 
-pblx-$(CONFIG_MACH_VSCOM_BALTOS) += start_am33xx_baltos_sdram
-FILE_barebox-am33xx-baltos.img = start_am33xx_baltos_sdram.pblx
+pblb-$(CONFIG_MACH_VSCOM_BALTOS) += start_am33xx_baltos_sdram
+FILE_barebox-am33xx-baltos.img = start_am33xx_baltos_sdram.pblb
 am33xx-barebox-$(CONFIG_MACH_VSCOM_BALTOS) += barebox-am33xx-baltos.img
 
-pblx-$(CONFIG_MACH_VSCOM_BALTOS) += start_am33xx_baltos_sram
-FILE_barebox-am33xx-baltos-mlo.img = start_am33xx_baltos_sram.pblx.mlo
+pblb-$(CONFIG_MACH_VSCOM_BALTOS) += start_am33xx_baltos_sram
+FILE_barebox-am33xx-baltos-mlo.img = start_am33xx_baltos_sram.pblb.mlo
 am33xx-mlo-$(CONFIG_MACH_VSCOM_BALTOS) += barebox-am33xx-baltos-mlo.img
 
 ifdef CONFIG_OMAP_BUILD_IFT
diff --git a/images/Makefile.at91 b/images/Makefile.at91
index 90860fc..acdb591 100644
--- a/images/Makefile.at91
+++ b/images/Makefile.at91
@@ -2,14 +2,14 @@
 # barebox image generation Makefile for AT91 images
 #
 
-pblx-$(CONFIG_MACH_AT91SAM9X5EK) += start_at91sam9x5ek
-FILE_barebox-at91sam9x5ek.img = start_at91sam9x5ek.pblx
+pblb-$(CONFIG_MACH_AT91SAM9X5EK) += start_at91sam9x5ek
+FILE_barebox-at91sam9x5ek.img = start_at91sam9x5ek.pblb
 image-$(CONFIG_MACH_AT91SAM9X5EK) += barebox-at91sam9x5ek.img
 
-pblx-$(CONFIG_MACH_AT91SAM9263EK) += start_at91sam9263ek
-FILE_barebox-at91sam9263ek.img = start_at91sam9263ek.pblx
+pblb-$(CONFIG_MACH_AT91SAM9263EK) += start_at91sam9263ek
+FILE_barebox-at91sam9263ek.img = start_at91sam9263ek.pblb
 image-$(CONFIG_MACH_AT91SAM9263EK) += barebox-at91sam9263ek.img
 
-pblx-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += start_sama5d3_xplained_ung8071
-FILE_barebox-microchip-ksz9477-evb.img = start_sama5d3_xplained_ung8071.pblx
+pblb-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += start_sama5d3_xplained_ung8071
+FILE_barebox-microchip-ksz9477-evb.img = start_sama5d3_xplained_ung8071.pblb
 image-$(CONFIG_MACH_MICROCHIP_KSZ9477_EVB) += barebox-microchip-ksz9477-evb.img
diff --git a/images/Makefile.bcm283x b/images/Makefile.bcm283x
index d14e648..9199f15 100644
--- a/images/Makefile.bcm283x
+++ b/images/Makefile.bcm283x
@@ -2,14 +2,14 @@
 # barebox image generation Makefile for BCM283x images
 #
 
-pblx-$(CONFIG_MACH_RPI) += start_raspberry_pi1
-FILE_barebox-raspberry-pi-1.img = start_raspberry_pi1.pblx
+pblb-$(CONFIG_MACH_RPI) += start_raspberry_pi1
+FILE_barebox-raspberry-pi-1.img = start_raspberry_pi1.pblb
 image-$(CONFIG_MACH_RPI) += barebox-raspberry-pi-1.img
 
-pblx-$(CONFIG_MACH_RPI2) += start_raspberry_pi2
-FILE_barebox-raspberry-pi-2.img = start_raspberry_pi2.pblx
+pblb-$(CONFIG_MACH_RPI2) += start_raspberry_pi2
+FILE_barebox-raspberry-pi-2.img = start_raspberry_pi2.pblb
 image-$(CONFIG_MACH_RPI2) += barebox-raspberry-pi-2.img
 
-pblx-$(CONFIG_MACH_RPI3) += start_raspberry_pi3
-FILE_barebox-raspberry-pi-3.img = start_raspberry_pi3.pblx
+pblb-$(CONFIG_MACH_RPI3) += start_raspberry_pi3
+FILE_barebox-raspberry-pi-3.img = start_raspberry_pi3.pblb
 image-$(CONFIG_MACH_RPI3) += barebox-raspberry-pi-3.img
\ No newline at end of file
diff --git a/images/Makefile.imx b/images/Makefile.imx
index 9b5cd57..8b8a545 100644
--- a/images/Makefile.imx
+++ b/images/Makefile.imx
@@ -22,533 +22,521 @@
 	$(Q)if [ -z $(FILE_$(@F)) ]; then echo "FILE_$(@F) empty!"; false; fi
 	$(call if_changed,shipped)
 
-quiet_cmd_imx_sram_img ?= IMX-SRAM-IMG    $@
-      cmd_imx_sram_img ?= cat $(obj)/$(patsubst %.imx-sram-img,%.pblb,$(2)) > $@; \
-		  $(call size_append, $(obj)/barebox.z) >> $@; \
-		  $(CPP) $(imxcfg_cpp_flags) -o $(imximg-tmp) $(CFG_$(@F)) ; \
-		  $(objtree)/scripts/imx/imx-image -o $@ -b -c $(imximg-tmp) -f $@; \
-		  cat $(obj)/barebox.z >> $@; \
-		  $(objtree)/scripts/fix_size -f $@
-
-$(obj)/%.imx-sram-img: $(obj)/%.pblb $(obj)/barebox.z FORCE
-	$(call if_changed,imx_sram_img,$(@F))
-
 # ----------------------- i.MX25 based boards ---------------------------
-pblx-$(CONFIG_MACH_TX25) += start_imx25_karo_tx25
-FILE_barebox-karo-tx25.img = start_imx25_karo_tx25.pblx
+pblb-$(CONFIG_MACH_TX25) += start_imx25_karo_tx25
+FILE_barebox-karo-tx25.img = start_imx25_karo_tx25.pblb
 image-$(CONFIG_MACH_TX25) += barebox-karo-tx25.img
 
-pblx-$(CONFIG_MACH_TX25) += start_imx25_karo_tx25
-CFG_start_imx25_karo_tx25.pblx.imximg = $(board)/karo-tx25/flash-header-tx25.imxcfg
-FILE_barebox-karo-tx25-internal.img = start_imx25_karo_tx25.pblx.imximg
+pblb-$(CONFIG_MACH_TX25) += start_imx25_karo_tx25
+CFG_start_imx25_karo_tx25.pblb.imximg = $(board)/karo-tx25/flash-header-tx25.imxcfg
+FILE_barebox-karo-tx25-internal.img = start_imx25_karo_tx25.pblb.imximg
 image-$(CONFIG_MACH_TX25) += barebox-karo-tx25-internal.img
 
-pblx-$(CONFIG_MACH_PCA100) += start_phytec_phycard_imx27
-FILE_barebox-phytec-phycard-imx27.img = start_phytec_phycard_imx27.pblx
+pblb-$(CONFIG_MACH_PCA100) += start_phytec_phycard_imx27
+FILE_barebox-phytec-phycard-imx27.img = start_phytec_phycard_imx27.pblb
 image-$(CONFIG_MACH_PCA100) += barebox-phytec-phycard-imx27.img
 
-pblx-$(CONFIG_MACH_PCM038) += start_phytec_phycore_imx27
-FILE_barebox-phytec-phycore-imx27.img = start_phytec_phycore_imx27.pblx
+pblb-$(CONFIG_MACH_PCM038) += start_phytec_phycore_imx27
+FILE_barebox-phytec-phycore-imx27.img = start_phytec_phycore_imx27.pblb
 image-$(CONFIG_MACH_PCM038) += barebox-phytec-phycore-imx27.img
 
 # ----------------------- i.MX50 based boards ---------------------------
-pblx-$(CONFIG_MACH_KINDLE_MX50) += start_imx50_kindle_d01100
-CFG_start_imx50_kindle_d01100.pblx.imximg = $(board)/kindle-mx50/flash-header-kindle-lpddr1.imxcfg
-FILE_barebox-kindle-d01100.img = start_imx50_kindle_d01100.pblx.imximg
+pblb-$(CONFIG_MACH_KINDLE_MX50) += start_imx50_kindle_d01100
+CFG_start_imx50_kindle_d01100.pblb.imximg = $(board)/kindle-mx50/flash-header-kindle-lpddr1.imxcfg
+FILE_barebox-kindle-d01100.img = start_imx50_kindle_d01100.pblb.imximg
 image-$(CONFIG_MACH_KINDLE_MX50) += barebox-kindle-d01100.img
 
-pblx-$(CONFIG_MACH_KINDLE_MX50) += start_imx50_kindle_d01200
-CFG_start_imx50_kindle_d01200.pblx.imximg = $(board)/kindle-mx50/flash-header-kindle-lpddr1.imxcfg
-FILE_barebox-kindle-d01200.img = start_imx50_kindle_d01200.pblx.imximg
+pblb-$(CONFIG_MACH_KINDLE_MX50) += start_imx50_kindle_d01200
+CFG_start_imx50_kindle_d01200.pblb.imximg = $(board)/kindle-mx50/flash-header-kindle-lpddr1.imxcfg
+FILE_barebox-kindle-d01200.img = start_imx50_kindle_d01200.pblb.imximg
 image-$(CONFIG_MACH_KINDLE_MX50) += barebox-kindle-d01200.img
 
-pblx-$(CONFIG_MACH_KINDLE_MX50) += start_imx50_kindle_ey21
-CFG_start_imx50_kindle_ey21.pblx.imximg = $(board)/kindle-mx50/flash-header-kindle-lpddr2.imxcfg
-FILE_barebox-kindle-ey21.img = start_imx50_kindle_ey21.pblx.imximg
+pblb-$(CONFIG_MACH_KINDLE_MX50) += start_imx50_kindle_ey21
+CFG_start_imx50_kindle_ey21.pblb.imximg = $(board)/kindle-mx50/flash-header-kindle-lpddr2.imxcfg
+FILE_barebox-kindle-ey21.img = start_imx50_kindle_ey21.pblb.imximg
 image-$(CONFIG_MACH_KINDLE_MX50) += barebox-kindle-ey21.img
 
 # ----------------------- i.MX51 based boards ---------------------------
-pblx-$(CONFIG_MACH_FREESCALE_MX51_PDK) += start_imx51_babbage
-CFG_start_imx51_babbage.pblx.imximg = $(board)/freescale-mx51-babbage/flash-header-imx51-babbage.imxcfg
-FILE_barebox-freescale-imx51-babbage.img = start_imx51_babbage.pblx.imximg
+pblb-$(CONFIG_MACH_FREESCALE_MX51_PDK) += start_imx51_babbage
+CFG_start_imx51_babbage.pblb.imximg = $(board)/freescale-mx51-babbage/flash-header-imx51-babbage.imxcfg
+FILE_barebox-freescale-imx51-babbage.img = start_imx51_babbage.pblb.imximg
 image-$(CONFIG_MACH_FREESCALE_MX51_PDK) += barebox-freescale-imx51-babbage.img
 
-pblx-$(CONFIG_MACH_ZII_RDU1) += start_imx51_zii_rdu1
-CFG_start_imx51_zii_rdu1.pblx.imximg = $(board)/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
-FILE_barebox-zii-imx51-rdu1.img = start_imx51_zii_rdu1.pblx.imximg
+pblb-$(CONFIG_MACH_ZII_RDU1) += start_imx51_zii_rdu1
+CFG_start_imx51_zii_rdu1.pblb.imximg = $(board)/zii-imx51-rdu1/flash-header-imx51-zii-rdu1.imxcfg
+FILE_barebox-zii-imx51-rdu1.img = start_imx51_zii_rdu1.pblb.imximg
 image-$(CONFIG_MACH_ZII_RDU1) += barebox-zii-imx51-rdu1.img
 
-pblx-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += start_imx51_genesi_efikasb
-CFG_start_imx51_genesi_efikasb.pblx.imximg = $(board)/efika-mx-smartbook/flash-header-imx51-genesi-efikasb.imxcfg
-FILE_barebox-genesi-efikasb.img = start_imx51_genesi_efikasb.pblx.imximg
+pblb-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += start_imx51_genesi_efikasb
+CFG_start_imx51_genesi_efikasb.pblb.imximg = $(board)/efika-mx-smartbook/flash-header-imx51-genesi-efikasb.imxcfg
+FILE_barebox-genesi-efikasb.img = start_imx51_genesi_efikasb.pblb.imximg
 image-$(CONFIG_MACH_EFIKA_MX_SMARTBOOK) += barebox-genesi-efikasb.img
 
 # ----------------------- i.MX53 based boards ---------------------------
-pblx-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += start_imx53_loco
-CFG_start_imx53_loco.pblx.imximg = $(board)/freescale-mx53-qsb/flash-header-imx53-loco.imxcfg
-FILE_barebox-freescale-imx53-loco.img = start_imx53_loco.pblx.imximg
+pblb-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += start_imx53_loco
+CFG_start_imx53_loco.pblb.imximg = $(board)/freescale-mx53-qsb/flash-header-imx53-loco.imxcfg
+FILE_barebox-freescale-imx53-loco.img = start_imx53_loco.pblb.imximg
 image-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += barebox-freescale-imx53-loco.img
 
-pblx-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += start_imx53_loco_r
-CFG_start_imx53_loco_r.pblx.imximg = $(board)/freescale-mx53-qsb/flash-header-imx53-loco.imxcfg
-FILE_barebox-freescale-imx53-loco-r.img = start_imx53_loco_r.pblx.imximg
+pblb-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += start_imx53_loco_r
+CFG_start_imx53_loco_r.pblb.imximg = $(board)/freescale-mx53-qsb/flash-header-imx53-loco.imxcfg
+FILE_barebox-freescale-imx53-loco-r.img = start_imx53_loco_r.pblb.imximg
 image-$(CONFIG_MACH_FREESCALE_MX53_LOCO) += barebox-freescale-imx53-loco-r.img
 
-pblx-$(CONFIG_MACH_CCMX53) += start_ccxmx53_512mb
-CFG_start_ccxmx53_512mb.pblx.imximg = $(board)/ccxmx53/flash-header-imx53-ccxmx53_512mb.imxcfg
-FILE_barebox-imx53-ccxmx53_512mb.img = start_ccxmx53_512mb.pblx.imximg
+pblb-$(CONFIG_MACH_CCMX53) += start_ccxmx53_512mb
+CFG_start_ccxmx53_512mb.pblb.imximg = $(board)/ccxmx53/flash-header-imx53-ccxmx53_512mb.imxcfg
+FILE_barebox-imx53-ccxmx53_512mb.img = start_ccxmx53_512mb.pblb.imximg
 image-$(CONFIG_MACH_CCMX53) += barebox-imx53-ccxmx53_512mb.img
 
-pblx-$(CONFIG_MACH_CCMX53) += start_ccxmx53_1gib
-CFG_start_ccxmx53_1gib.pblx.imximg = $(board)/ccxmx53/flash-header-imx53-ccxmx53_1gib.imxcfg
-FILE_barebox-imx53-ccxmx53_1gib.img = start_ccxmx53_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_CCMX53) += start_ccxmx53_1gib
+CFG_start_ccxmx53_1gib.pblb.imximg = $(board)/ccxmx53/flash-header-imx53-ccxmx53_1gib.imxcfg
+FILE_barebox-imx53-ccxmx53_1gib.img = start_ccxmx53_1gib.pblb.imximg
 image-$(CONFIG_MACH_CCMX53) += barebox-imx53-ccxmx53_1gib.img
 
-pblx-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += start_imx53_vmx53
-CFG_start_imx53_vmx53.pblx.imximg = $(board)/freescale-mx53-vmx53/flash-header-imx53-vmx53.imxcfg
-FILE_barebox-freescale-imx53-vmx53.img = start_imx53_vmx53.pblx.imximg
+pblb-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += start_imx53_vmx53
+CFG_start_imx53_vmx53.pblb.imximg = $(board)/freescale-mx53-vmx53/flash-header-imx53-vmx53.imxcfg
+FILE_barebox-freescale-imx53-vmx53.img = start_imx53_vmx53.pblb.imximg
 image-$(CONFIG_MACH_FREESCALE_MX53_VMX53) += barebox-freescale-imx53-vmx53.img
 
-ifdef CONFIG_MACH_GUF_VINCELL_XLOAD
-VINCELL_IMAGE := imx-sram-img
-else
-VINCELL_IMAGE := pblx.imximg
-endif
-
-pblx-$(CONFIG_MACH_GUF_VINCELL) += start_imx53_guf_vincell
-CFG_start_imx53_guf_vincell.$(VINCELL_IMAGE) = $(board)/guf-vincell/flash-header.imxcfg
-FILE_barebox-guf-vincell.img = start_imx53_guf_vincell.$(VINCELL_IMAGE)
+pblb-$(CONFIG_MACH_GUF_VINCELL) += start_imx53_guf_vincell
+CFG_start_imx53_guf_vincell.pblb.imximg = $(board)/guf-vincell/flash-header.imxcfg
+FILE_barebox-guf-vincell.img = start_imx53_guf_vincell.pblb.imximg
 image-$(CONFIG_MACH_GUF_VINCELL) += barebox-guf-vincell.img
 
-pblx-$(CONFIG_MACH_GUF_VINCELL) += start_imx53_guf_vincell_lt
-CFG_start_imx53_guf_vincell_lt.$(VINCELL_IMAGE) = $(board)/guf-vincell/flash-header.imxcfg
-FILE_barebox-guf-vincell-lt.img = start_imx53_guf_vincell_lt.$(VINCELL_IMAGE)
+pblb-$(CONFIG_MACH_GUF_VINCELL) += start_imx53_guf_vincell_lt
+CFG_start_imx53_guf_vincell_lt.pblb.imximg = $(board)/guf-vincell/flash-header.imxcfg
+FILE_barebox-guf-vincell-lt.img = start_imx53_guf_vincell_lt.pblb.imximg
 image-$(CONFIG_MACH_GUF_VINCELL) += barebox-guf-vincell-lt.img
 
-pblx-$(CONFIG_MACH_TQMA53) += start_imx53_mba53_512mib
-CFG_start_imx53_mba53_512mib.pblx.imximg = $(board)/tqma53/flash-header-tq-tqma53-512mib.imxcfg
-FILE_barebox-tq-mba53-512mib.img = start_imx53_mba53_512mib.pblx.imximg
+pblb-$(CONFIG_MACH_TQMA53) += start_imx53_mba53_512mib
+CFG_start_imx53_mba53_512mib.pblb.imximg = $(board)/tqma53/flash-header-tq-tqma53-512mib.imxcfg
+FILE_barebox-tq-mba53-512mib.img = start_imx53_mba53_512mib.pblb.imximg
 image-$(CONFIG_MACH_TQMA53) += barebox-tq-mba53-512mib.img
 
-pblx-$(CONFIG_MACH_TQMA53) += start_imx53_mba53_1gib
-CFG_start_imx53_mba53_1gib.pblx.imximg = $(board)/tqma53/flash-header-tq-tqma53-1gib.imxcfg
-FILE_barebox-tq-mba53-1gib.img = start_imx53_mba53_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_TQMA53) += start_imx53_mba53_1gib
+CFG_start_imx53_mba53_1gib.pblb.imximg = $(board)/tqma53/flash-header-tq-tqma53-1gib.imxcfg
+FILE_barebox-tq-mba53-1gib.img = start_imx53_mba53_1gib.pblb.imximg
 image-$(CONFIG_MACH_TQMA53) += barebox-tq-mba53-1gib.img
 
-pblx-$(CONFIG_MACH_TX53) += start_imx53_tx53_xx30_samsung
-CFG_start_imx53_tx53_xx30_samsung.pblx.imximg = $(board)/karo-tx53/flash-header-tx53-revxx30-samsung.imxcfg
-FILE_barebox-tx53-xx30-samsung.img = start_imx53_tx53_xx30_samsung.pblx.imximg
+pblb-$(CONFIG_MACH_TX53) += start_imx53_tx53_xx30_samsung
+CFG_start_imx53_tx53_xx30_samsung.pblb.imximg = $(board)/karo-tx53/flash-header-tx53-revxx30-samsung.imxcfg
+FILE_barebox-tx53-xx30-samsung.img = start_imx53_tx53_xx30_samsung.pblb.imximg
 image-$(CONFIG_MACH_TX53) += barebox-tx53-xx30-samsung.img
 
-pblx-$(CONFIG_MACH_TX53) += start_imx53_tx53_xx30
-CFG_start_imx53_tx53_xx30.pblx.imximg = $(board)/karo-tx53/flash-header-tx53-revxx30.imxcfg
-FILE_barebox-tx53-xx30.img = start_imx53_tx53_xx30.pblx.imximg
+pblb-$(CONFIG_MACH_TX53) += start_imx53_tx53_xx30
+CFG_start_imx53_tx53_xx30.pblb.imximg = $(board)/karo-tx53/flash-header-tx53-revxx30.imxcfg
+FILE_barebox-tx53-xx30.img = start_imx53_tx53_xx30.pblb.imximg
 image-$(CONFIG_MACH_TX53) += barebox-tx53-xx30.img
 
-pblx-$(CONFIG_MACH_TX53) += start_imx53_tx53_1011
-CFG_start_imx53_tx53_1011.pblx.imximg = $(board)/karo-tx53/flash-header-tx53-rev1011.imxcfg
-FILE_barebox-tx53-1011.img = start_imx53_tx53_1011.pblx.imximg
+pblb-$(CONFIG_MACH_TX53) += start_imx53_tx53_1011
+CFG_start_imx53_tx53_1011.pblb.imximg = $(board)/karo-tx53/flash-header-tx53-rev1011.imxcfg
+FILE_barebox-tx53-1011.img = start_imx53_tx53_1011.pblb.imximg
 image-$(CONFIG_MACH_TX53) += barebox-tx53-1011.img
 
 # ----------------------- i.MX6 based boards ---------------------------
-pblx-$(CONFIG_MACH_REALQ7) += start_imx6_realq7
-CFG_start_imx6_realq7.pblx.imximg = $(board)/datamodul-edm-qmx6/flash-header.imxcfg
-FILE_barebox-datamodul-edm-qmx6.img = start_imx6_realq7.pblx.imximg
+pblb-$(CONFIG_MACH_REALQ7) += start_imx6_realq7
+CFG_start_imx6_realq7.pblb.imximg = $(board)/datamodul-edm-qmx6/flash-header.imxcfg
+FILE_barebox-datamodul-edm-qmx6.img = start_imx6_realq7.pblb.imximg
 image-$(CONFIG_MACH_REALQ7) += barebox-datamodul-edm-qmx6.img
 
-pblx-$(CONFIG_MACH_GUF_SANTARO) += start_imx6q_guf_santaro
-CFG_start_imx6q_guf_santaro.pblx.imximg = $(board)/guf-santaro/flash-header.imxcfg
-FILE_barebox-guf-santaro.img = start_imx6q_guf_santaro.pblx.imximg
+pblb-$(CONFIG_MACH_GUF_SANTARO) += start_imx6q_guf_santaro
+CFG_start_imx6q_guf_santaro.pblb.imximg = $(board)/guf-santaro/flash-header.imxcfg
+FILE_barebox-guf-santaro.img = start_imx6q_guf_santaro.pblb.imximg
 image-$(CONFIG_MACH_GUF_SANTARO) += barebox-guf-santaro.img
 
-pblx-$(CONFIG_MACH_GK802) += start_imx6_gk802
-CFG_start_imx6_gk802.pblx.imximg = $(board)/gk802/flash-header.imxcfg
-FILE_barebox-gk802.img = start_imx6_gk802.pblx.imximg
+pblb-$(CONFIG_MACH_GK802) += start_imx6_gk802
+CFG_start_imx6_gk802.pblb.imximg = $(board)/gk802/flash-header.imxcfg
+FILE_barebox-gk802.img = start_imx6_gk802.pblb.imximg
 image-$(CONFIG_MACH_GK802) += barebox-gk802.img
 
-pblx-$(CONFIG_MACH_TQMA6X) += start_imx6dl_mba6x
-CFG_start_imx6dl_mba6x.pblx.imximg = $(board)/tqma6x/flash-header-tqma6dl.imxcfg
-FILE_barebox-tq-tqma6s-mba6x.img = start_imx6dl_mba6x.pblx.imximg
+pblb-$(CONFIG_MACH_TQMA6X) += start_imx6dl_mba6x
+CFG_start_imx6dl_mba6x.pblb.imximg = $(board)/tqma6x/flash-header-tqma6dl.imxcfg
+FILE_barebox-tq-tqma6s-mba6x.img = start_imx6dl_mba6x.pblb.imximg
 image-$(CONFIG_MACH_TQMA6X) += barebox-tq-tqma6s-mba6x.img
 
-pblx-$(CONFIG_MACH_TQMA6X) += start_imx6q_mba6x
-CFG_start_imx6q_mba6x.pblx.imximg = $(board)/tqma6x/flash-header-tqma6q.imxcfg
-FILE_barebox-tq-tqma6q-mba6x.img = start_imx6q_mba6x.pblx.imximg
+pblb-$(CONFIG_MACH_TQMA6X) += start_imx6q_mba6x
+CFG_start_imx6q_mba6x.pblb.imximg = $(board)/tqma6x/flash-header-tqma6q.imxcfg
+FILE_barebox-tq-tqma6q-mba6x.img = start_imx6q_mba6x.pblb.imximg
 image-$(CONFIG_MACH_TQMA6X) += barebox-tq-tqma6q-mba6x.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_4gib
-CFG_start_phytec_pbab01_4gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-4gib.imxcfg
-FILE_barebox-phytec-pbab01-4gib.img = start_phytec_pbab01_4gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_4gib
+CFG_start_phytec_pbab01_4gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-4gib.imxcfg
+FILE_barebox-phytec-pbab01-4gib.img = start_phytec_pbab01_4gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-4gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_2gib
-CFG_start_phytec_pbab01_2gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-2gib.imxcfg
-FILE_barebox-phytec-pbab01-2gib.img = start_phytec_pbab01_2gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_2gib
+CFG_start_phytec_pbab01_2gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-2gib.imxcfg
+FILE_barebox-phytec-pbab01-2gib.img = start_phytec_pbab01_2gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-2gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_1gib
-CFG_start_phytec_pbab01_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg
-FILE_barebox-phytec-pbab01-1gib.img = start_phytec_pbab01_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_1gib
+CFG_start_phytec_pbab01_1gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg
+FILE_barebox-phytec-pbab01-1gib.img = start_phytec_pbab01_1gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-1gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_1gib_1bank
-CFG_start_phytec_pbab01_1gib_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg
-FILE_barebox-phytec-pbab01-1gib-1bank.img = start_phytec_pbab01_1gib_1bank.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_1gib_1bank
+CFG_start_phytec_pbab01_1gib_1bank.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg
+FILE_barebox-phytec-pbab01-1gib-1bank.img = start_phytec_pbab01_1gib_1bank.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-1gib-1bank.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_512mb_1bank
-CFG_start_phytec_pbab01_512mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg
-FILE_barebox-phytec-pbab01-512mb-1bank.img = start_phytec_pbab01_512mb_1bank.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01_512mb_1bank
+CFG_start_phytec_pbab01_512mb_1bank.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-512mb-1bank.imxcfg
+FILE_barebox-phytec-pbab01-512mb-1bank.img = start_phytec_pbab01_512mb_1bank.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01-512mb-1bank.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01dl_1gib
-CFG_start_phytec_pbab01dl_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg
-FILE_barebox-phytec-pbab01dl-1gib.img = start_phytec_pbab01dl_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01dl_1gib
+CFG_start_phytec_pbab01dl_1gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib.imxcfg
+FILE_barebox-phytec-pbab01dl-1gib.img = start_phytec_pbab01dl_1gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01dl-1gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01dl_1gib_1bank
-CFG_start_phytec_pbab01dl_1gib_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg
-FILE_barebox-phytec-pbab01dl-1gib-1bank.img = start_phytec_pbab01dl_1gib_1bank.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01dl_1gib_1bank
+CFG_start_phytec_pbab01dl_1gib_1bank.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02dl-1gib-1bank.imxcfg
+FILE_barebox-phytec-pbab01dl-1gib-1bank.img = start_phytec_pbab01dl_1gib_1bank.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01dl-1gib-1bank.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01s_512mb_1bank
-CFG_start_phytec_pbab01s_512mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg
-FILE_barebox-phytec-pbab01s-512mb-1bank.img = start_phytec_pbab01s_512mb_1bank.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01s_512mb_1bank
+CFG_start_phytec_pbab01s_512mb_1bank.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg
+FILE_barebox-phytec-pbab01s-512mb-1bank.img = start_phytec_pbab01s_512mb_1bank.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01s-512mb-1bank.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01s_256mb_1bank
-CFG_start_phytec_pbab01s_256mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg
-FILE_barebox-phytec-pbab01s-256mb-1bank.img = start_phytec_pbab01s_256mb_1bank.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01s_256mb_1bank
+CFG_start_phytec_pbab01s_256mb_1bank.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-256mb-1bank.imxcfg
+FILE_barebox-phytec-pbab01s-256mb-1bank.img = start_phytec_pbab01s_256mb_1bank.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01s-256mb-1bank.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01s_128mb_1bank
-CFG_start_phytec_pbab01s_128mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg
-FILE_barebox-phytec-pbab01s-128mb-1bank.img = start_phytec_pbab01s_128mb_1bank.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbab01s_128mb_1bank
+CFG_start_phytec_pbab01s_128mb_1bank.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-128mb-1bank.imxcfg
+FILE_barebox-phytec-pbab01s-128mb-1bank.img = start_phytec_pbab01s_128mb_1bank.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbab01s-128mb-1bank.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phyboard_alcor_1gib
-CFG_start_phytec_phyboard_alcor_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg
-FILE_barebox-phytec-phyboard-alcor-1gib.img = start_phytec_phyboard_alcor_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phyboard_alcor_1gib
+CFG_start_phytec_phyboard_alcor_1gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib.imxcfg
+FILE_barebox-phytec-phyboard-alcor-1gib.img = start_phytec_phyboard_alcor_1gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phyboard-alcor-1gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phyboard_subra_512mb_1bank
-CFG_start_phytec_phyboard_subra_512mb_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg
-FILE_barebox-phytec-phyboard-subra-512mb-1bank.img = start_phytec_phyboard_subra_512mb_1bank.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phyboard_subra_512mb_1bank
+CFG_start_phytec_phyboard_subra_512mb_1bank.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02s-512mb-1bank.imxcfg
+FILE_barebox-phytec-phyboard-subra-512mb-1bank.img = start_phytec_phyboard_subra_512mb_1bank.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phyboard-subra-512mb-1bank.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phyboard_subra_1gib_1bank
-CFG_start_phytec_phyboard_subra_1gib_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg
-FILE_barebox-phytec-phyboard-subra-1gib-1bank.img = start_phytec_phyboard_subra_1gib_1bank.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phyboard_subra_1gib_1bank
+CFG_start_phytec_phyboard_subra_1gib_1bank.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pfla02-1gib-1bank.imxcfg
+FILE_barebox-phytec-phyboard-subra-1gib-1bank.img = start_phytec_phyboard_subra_1gib_1bank.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phyboard-subra-1gib-1bank.img
 
-pblx-$(CONFIG_MACH_DFI_FS700_M60) += start_imx6dl_dfi_fs700_m60_6s
-CFG_start_imx6dl_dfi_fs700_m60_6s.pblx.imximg = $(board)/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg
-FILE_barebox-dfi-fs700-m60-6s.img = start_imx6dl_dfi_fs700_m60_6s.pblx.imximg
+pblb-$(CONFIG_MACH_DFI_FS700_M60) += start_imx6dl_dfi_fs700_m60_6s
+CFG_start_imx6dl_dfi_fs700_m60_6s.pblb.imximg = $(board)/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg
+FILE_barebox-dfi-fs700-m60-6s.img = start_imx6dl_dfi_fs700_m60_6s.pblb.imximg
 image-$(CONFIG_MACH_DFI_FS700_M60) += barebox-dfi-fs700-m60-6s.img
 
-pblx-$(CONFIG_MACH_DFI_FS700_M60) += start_imx6q_dfi_fs700_m60_6q_micron
-CFG_start_imx6q_dfi_fs700_m60_6q_micron.pblx.imximg = $(board)/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg
-FILE_barebox-dfi-fs700-m60-6q-micron.img = start_imx6q_dfi_fs700_m60_6q_micron.pblx.imximg
+pblb-$(CONFIG_MACH_DFI_FS700_M60) += start_imx6q_dfi_fs700_m60_6q_micron
+CFG_start_imx6q_dfi_fs700_m60_6q_micron.pblb.imximg = $(board)/dfi-fs700-m60/flash-header-fs700-m60-6q-micron.imxcfg
+FILE_barebox-dfi-fs700-m60-6q-micron.img = start_imx6q_dfi_fs700_m60_6q_micron.pblb.imximg
 image-$(CONFIG_MACH_DFI_FS700_M60) += barebox-dfi-fs700-m60-6q-micron.img
 
-pblx-$(CONFIG_MACH_DFI_FS700_M60) += start_imx6q_dfi_fs700_m60_6q_nanya
-CFG_start_imx6q_dfi_fs700_m60_6q_nanya.pblx.imximg = $(board)/dfi-fs700-m60/flash-header-fs700-m60-6q-nanya.imxcfg
-FILE_barebox-dfi-fs700-m60-6q-nanya.img = start_imx6q_dfi_fs700_m60_6q_nanya.pblx.imximg
+pblb-$(CONFIG_MACH_DFI_FS700_M60) += start_imx6q_dfi_fs700_m60_6q_nanya
+CFG_start_imx6q_dfi_fs700_m60_6q_nanya.pblb.imximg = $(board)/dfi-fs700-m60/flash-header-fs700-m60-6q-nanya.imxcfg
+FILE_barebox-dfi-fs700-m60-6q-nanya.img = start_imx6q_dfi_fs700_m60_6q_nanya.pblb.imximg
 image-$(CONFIG_MACH_DFI_FS700_M60) += barebox-dfi-fs700-m60-6q-nanya.img
 
-pblx-$(CONFIG_MACH_SABRELITE) += start_imx6q_sabrelite
-CFG_start_imx6q_sabrelite.pblx.imximg = $(board)/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg
-FILE_barebox-freescale-imx6q-sabrelite.img = start_imx6q_sabrelite.pblx.imximg
+pblb-$(CONFIG_MACH_SABRELITE) += start_imx6q_sabrelite
+CFG_start_imx6q_sabrelite.pblb.imximg = $(board)/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg
+FILE_barebox-freescale-imx6q-sabrelite.img = start_imx6q_sabrelite.pblb.imximg
 image-$(CONFIG_MACH_SABRELITE) += barebox-freescale-imx6q-sabrelite.img
 
-pblx-$(CONFIG_MACH_SABRELITE) += start_imx6dl_sabrelite
-CFG_start_imx6dl_sabrelite.pblx.imximg = $(board)/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg
-FILE_barebox-freescale-imx6dl-sabrelite.img = start_imx6dl_sabrelite.pblx.imximg
+pblb-$(CONFIG_MACH_SABRELITE) += start_imx6dl_sabrelite
+CFG_start_imx6dl_sabrelite.pblb.imximg = $(board)/freescale-mx6-sabrelite/flash-header-mx6-sabrelite.imxcfg
+FILE_barebox-freescale-imx6dl-sabrelite.img = start_imx6dl_sabrelite.pblb.imximg
 image-$(CONFIG_MACH_SABRELITE) += barebox-freescale-imx6dl-sabrelite.img
 
-pblx-$(CONFIG_MACH_SABRESD) += start_imx6q_sabresd
-CFG_start_imx6q_sabresd.pblx.imximg = $(board)/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg
-FILE_barebox-freescale-imx6q-sabresd.img = start_imx6q_sabresd.pblx.imximg
+pblb-$(CONFIG_MACH_SABRESD) += start_imx6q_sabresd
+CFG_start_imx6q_sabresd.pblb.imximg = $(board)/freescale-mx6-sabresd/flash-header-mx6-sabresd.imxcfg
+FILE_barebox-freescale-imx6q-sabresd.img = start_imx6q_sabresd.pblb.imximg
 image-$(CONFIG_MACH_SABRESD) += barebox-freescale-imx6q-sabresd.img
 
-pblx-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += start_imx6sx_sabresdb
-CFG_start_imx6sx_sabresdb.pblx.imximg = $(board)/freescale-mx6sx-sabresdb/flash-header-mx6sx-sabresdb.imxcfg
-FILE_barebox-freescale-imx6sx-sabresdb.img = start_imx6sx_sabresdb.pblx.imximg
+pblb-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += start_imx6sx_sabresdb
+CFG_start_imx6sx_sabresdb.pblb.imximg = $(board)/freescale-mx6sx-sabresdb/flash-header-mx6sx-sabresdb.imxcfg
+FILE_barebox-freescale-imx6sx-sabresdb.img = start_imx6sx_sabresdb.pblb.imximg
 image-$(CONFIG_MACH_FREESCALE_IMX6SX_SABRESDB) += barebox-freescale-imx6sx-sabresdb.img
 
-pblx-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += start_imx6_wandboard
-CFG_start_imx6_wandboard.imx-sram-img = $(board)/technexion-wandboard/flash-header-technexion-wandboard.imxcfg
-FILE_barebox-imx6-wandboard.img = start_imx6_wandboard.imx-sram-img
+pblb-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += start_imx6_wandboard
+CFG_start_imx6_wandboard.pblb.imximg = $(board)/technexion-wandboard/flash-header-technexion-wandboard.imxcfg
+FILE_barebox-imx6-wandboard.img = start_imx6_wandboard.pblb.imximg
 image-$(CONFIG_MACH_TECHNEXION_WANDBOARD) += barebox-imx6-wandboard.img
 
-pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i1
-CFG_start_hummingboard_microsom_i1.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i1.imxcfg
-FILE_barebox-solidrun-hummingboard-microsom-i1.img = start_hummingboard_microsom_i1.pblx.imximg
+pblb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i1
+CFG_start_hummingboard_microsom_i1.pblb.imximg = $(board)/solidrun-microsom/flash-header-microsom-i1.imxcfg
+FILE_barebox-solidrun-hummingboard-microsom-i1.img = start_hummingboard_microsom_i1.pblb.imximg
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard-microsom-i1.img
 
-pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i2
-CFG_start_hummingboard_microsom_i2.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2.imxcfg
-FILE_barebox-solidrun-hummingboard-microsom-i2.img = start_hummingboard_microsom_i2.pblx.imximg
+pblb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i2
+CFG_start_hummingboard_microsom_i2.pblb.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2.imxcfg
+FILE_barebox-solidrun-hummingboard-microsom-i2.img = start_hummingboard_microsom_i2.pblb.imximg
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard-microsom-i2.img
 
-pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i2ex
-CFG_start_hummingboard_microsom_i2ex.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2eX.imxcfg
-FILE_barebox-solidrun-hummingboard-microsom-i2eX.img = start_hummingboard_microsom_i2ex.pblx.imximg
+pblb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i2ex
+CFG_start_hummingboard_microsom_i2ex.pblb.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2eX.imxcfg
+FILE_barebox-solidrun-hummingboard-microsom-i2eX.img = start_hummingboard_microsom_i2ex.pblb.imximg
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard-microsom-i2eX.img
 
-pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i4
-CFG_start_hummingboard_microsom_i4.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i4.imxcfg
-FILE_barebox-solidrun-hummingboard-microsom-i4.img = start_hummingboard_microsom_i4.pblx.imximg
+pblb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard_microsom_i4
+CFG_start_hummingboard_microsom_i4.pblb.imximg = $(board)/solidrun-microsom/flash-header-microsom-i4.imxcfg
+FILE_barebox-solidrun-hummingboard-microsom-i4.img = start_hummingboard_microsom_i4.pblb.imximg
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard-microsom-i4.img
 
-pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard2_microsom_i1
-CFG_start_hummingboard2_microsom_i1.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i1.imxcfg
-FILE_barebox-solidrun-hummingboard2-microsom-i1.img = start_hummingboard2_microsom_i1.pblx.imximg
+pblb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard2_microsom_i1
+CFG_start_hummingboard2_microsom_i1.pblb.imximg = $(board)/solidrun-microsom/flash-header-microsom-i1.imxcfg
+FILE_barebox-solidrun-hummingboard2-microsom-i1.img = start_hummingboard2_microsom_i1.pblb.imximg
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard2-microsom-i1.img
 
-pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard2_microsom_i2
-CFG_start_hummingboard2_microsom_i2.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2.imxcfg
-FILE_barebox-solidrun-hummingboard2-microsom-i2.img = start_hummingboard2_microsom_i2.pblx.imximg
+pblb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard2_microsom_i2
+CFG_start_hummingboard2_microsom_i2.pblb.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2.imxcfg
+FILE_barebox-solidrun-hummingboard2-microsom-i2.img = start_hummingboard2_microsom_i2.pblb.imximg
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard2-microsom-i2.img
 
-pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard2_microsom_i2ex
-CFG_start_hummingboard2_microsom_i2ex.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2eX.imxcfg
-FILE_barebox-solidrun-hummingboard2-microsom-i2eX.img = start_hummingboard2_microsom_i2ex.pblx.imximg
+pblb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard2_microsom_i2ex
+CFG_start_hummingboard2_microsom_i2ex.pblb.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2eX.imxcfg
+FILE_barebox-solidrun-hummingboard2-microsom-i2eX.img = start_hummingboard2_microsom_i2ex.pblb.imximg
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard2-microsom-i2eX.img
 
-pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard2_microsom_i4
-CFG_start_hummingboard2_microsom_i4.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i4.imxcfg
-FILE_barebox-solidrun-hummingboard2-microsom-i4.img = start_hummingboard2_microsom_i4.pblx.imximg
+pblb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_hummingboard2_microsom_i4
+CFG_start_hummingboard2_microsom_i4.pblb.imximg = $(board)/solidrun-microsom/flash-header-microsom-i4.imxcfg
+FILE_barebox-solidrun-hummingboard2-microsom-i4.img = start_hummingboard2_microsom_i4.pblb.imximg
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-solidrun-hummingboard2-microsom-i4.img
 
-pblx-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_h100_microsom_i2ex
-CFG_start_h100_microsom_i2ex.pblx.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2eX.imxcfg
-FILE_barebox-auvidea-h100-microsom-i2eX.img = start_h100_microsom_i2ex.pblx.imximg
+pblb-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += start_h100_microsom_i2ex
+CFG_start_h100_microsom_i2ex.pblb.imximg = $(board)/solidrun-microsom/flash-header-microsom-i2eX.imxcfg
+FILE_barebox-auvidea-h100-microsom-i2eX.img = start_h100_microsom_i2ex.pblb.imximg
 image-$(CONFIG_MACH_SOLIDRUN_MICROSOM) += barebox-auvidea-h100-microsom-i2eX.img
 
-pblx-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += start_imx6ul_pico_hobbit_256mb
-CFG_start_imx6ul_pico_hobbit_256mb.pblx.imximg = $(board)/technexion-pico-hobbit/flash-header-imx6ul-pico-hobbit-256.imxcfg
-FILE_barebox-imx6ul-pico-hobbit-256mb.img = start_imx6ul_pico_hobbit_256mb.pblx.imximg
+pblb-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += start_imx6ul_pico_hobbit_256mb
+CFG_start_imx6ul_pico_hobbit_256mb.pblb.imximg = $(board)/technexion-pico-hobbit/flash-header-imx6ul-pico-hobbit-256.imxcfg
+FILE_barebox-imx6ul-pico-hobbit-256mb.img = start_imx6ul_pico_hobbit_256mb.pblb.imximg
 image-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += barebox-imx6ul-pico-hobbit-256mb.img
 
-pblx-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += start_imx6ul_pico_hobbit_512mb
-CFG_start_imx6ul_pico_hobbit_512mb.pblx.imximg = $(board)/technexion-pico-hobbit/flash-header-imx6ul-pico-hobbit-512.imxcfg
-FILE_barebox-imx6ul-pico-hobbit-512mb.img = start_imx6ul_pico_hobbit_512mb.pblx.imximg
+pblb-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += start_imx6ul_pico_hobbit_512mb
+CFG_start_imx6ul_pico_hobbit_512mb.pblb.imximg = $(board)/technexion-pico-hobbit/flash-header-imx6ul-pico-hobbit-512.imxcfg
+FILE_barebox-imx6ul-pico-hobbit-512mb.img = start_imx6ul_pico_hobbit_512mb.pblb.imximg
 image-$(CONFIG_MACH_TECHNEXION_PICO_HOBBIT) += barebox-imx6ul-pico-hobbit-512mb.img
 
-pblx-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += start_nxp_imx6ull_evk
-CFG_start_nxp_imx6ull_evk.pblx.imximg = $(board)/nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk.imxcfg
-FILE_barebox-nxp-imx6ull-evk.img = start_nxp_imx6ull_evk.pblx.imximg
+pblb-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += start_nxp_imx6ull_evk
+CFG_start_nxp_imx6ull_evk.pblb.imximg = $(board)/nxp-imx6ull-evk/flash-header-nxp-imx6ull-evk.imxcfg
+FILE_barebox-nxp-imx6ull-evk.img = start_nxp_imx6ull_evk.pblb.imximg
 image-$(CONFIG_MACH_NXP_IMX6ULL_EVK) += barebox-nxp-imx6ull-evk.img
 
-pblx-$(CONFIG_MACH_NITROGEN6) += start_imx6q_nitrogen6x_1g
-CFG_start_imx6q_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6q-1g.imxcfg
-FILE_barebox-boundarydevices-imx6q-nitrogen6x-1g.img = start_imx6q_nitrogen6x_1g.pblx.imximg
+pblb-$(CONFIG_MACH_NITROGEN6) += start_imx6q_nitrogen6x_1g
+CFG_start_imx6q_nitrogen6x_1g.pblb.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6q-1g.imxcfg
+FILE_barebox-boundarydevices-imx6q-nitrogen6x-1g.img = start_imx6q_nitrogen6x_1g.pblb.imximg
 image-$(CONFIG_MACH_NITROGEN6) += barebox-boundarydevices-imx6q-nitrogen6x-1g.img
 
-pblx-$(CONFIG_MACH_NITROGEN6) += start_imx6q_nitrogen6x_2g
-CFG_start_imx6q_nitrogen6x_2g.pblx.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6q-2g.imxcfg
-FILE_barebox-boundarydevices-imx6q-nitrogen6x-2g.img = start_imx6q_nitrogen6x_2g.pblx.imximg
+pblb-$(CONFIG_MACH_NITROGEN6) += start_imx6q_nitrogen6x_2g
+CFG_start_imx6q_nitrogen6x_2g.pblb.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6q-2g.imxcfg
+FILE_barebox-boundarydevices-imx6q-nitrogen6x-2g.img = start_imx6q_nitrogen6x_2g.pblb.imximg
 image-$(CONFIG_MACH_NITROGEN6) += barebox-boundarydevices-imx6q-nitrogen6x-2g.img
 
-pblx-$(CONFIG_MACH_NITROGEN6) += start_imx6dl_nitrogen6x_1g
-CFG_start_imx6dl_nitrogen6x_1g.pblx.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6dl-1g.imxcfg
-FILE_barebox-boundarydevices-imx6dl-nitrogen6x-1g.img = start_imx6dl_nitrogen6x_1g.pblx.imximg
+pblb-$(CONFIG_MACH_NITROGEN6) += start_imx6dl_nitrogen6x_1g
+CFG_start_imx6dl_nitrogen6x_1g.pblb.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6dl-1g.imxcfg
+FILE_barebox-boundarydevices-imx6dl-nitrogen6x-1g.img = start_imx6dl_nitrogen6x_1g.pblb.imximg
 image-$(CONFIG_MACH_NITROGEN6) += barebox-boundarydevices-imx6dl-nitrogen6x-1g.img
 
-pblx-$(CONFIG_MACH_NITROGEN6) += start_imx6dl_nitrogen6x_2g
-CFG_start_imx6dl_nitrogen6x_2g.pblx.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6dl-2g.imxcfg
-FILE_barebox-boundarydevices-imx6dl-nitrogen6x-2g.img = start_imx6dl_nitrogen6x_2g.pblx.imximg
+pblb-$(CONFIG_MACH_NITROGEN6) += start_imx6dl_nitrogen6x_2g
+CFG_start_imx6dl_nitrogen6x_2g.pblb.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6dl-2g.imxcfg
+FILE_barebox-boundarydevices-imx6dl-nitrogen6x-2g.img = start_imx6dl_nitrogen6x_2g.pblb.imximg
 image-$(CONFIG_MACH_NITROGEN6) += barebox-boundarydevices-imx6dl-nitrogen6x-2g.img
 
-pblx-$(CONFIG_MACH_NITROGEN6) += start_imx6qp_nitrogen6_max
-CFG_start_imx6qp_nitrogen6_max.pblx.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6qp-max.imxcfg
-FILE_barebox-boundarydevices-imx6qp-nitrogen6_max.img = start_imx6qp_nitrogen6_max.pblx.imximg
+pblb-$(CONFIG_MACH_NITROGEN6) += start_imx6qp_nitrogen6_max
+CFG_start_imx6qp_nitrogen6_max.pblb.imximg = $(board)/boundarydevices-nitrogen6/flash-header-nitrogen6qp-max.imxcfg
+FILE_barebox-boundarydevices-imx6qp-nitrogen6_max.img = start_imx6qp_nitrogen6_max.pblb.imximg
 image-$(CONFIG_MACH_NITROGEN6) += barebox-boundarydevices-imx6qp-nitrogen6_max.img
 
-pblx-$(CONFIG_MACH_TX6X) += start_imx6dl_tx6x_512m
-CFG_start_imx6dl_tx6x_512m.pblx.imximg = $(board)/karo-tx6x/flash-header-tx6dl-512m.imxcfg
-FILE_barebox-karo-imx6dl-tx6x-512m.img = start_imx6dl_tx6x_512m.pblx.imximg
+pblb-$(CONFIG_MACH_TX6X) += start_imx6dl_tx6x_512m
+CFG_start_imx6dl_tx6x_512m.pblb.imximg = $(board)/karo-tx6x/flash-header-tx6dl-512m.imxcfg
+FILE_barebox-karo-imx6dl-tx6x-512m.img = start_imx6dl_tx6x_512m.pblb.imximg
 image-$(CONFIG_MACH_TX6X) += barebox-karo-imx6dl-tx6x-512m.img
 
-pblx-$(CONFIG_MACH_TX6X) += start_imx6dl_tx6x_1g
-CFG_start_imx6dl_tx6x_1g.pblx.imximg = $(board)/karo-tx6x/flash-header-tx6dl-1g.imxcfg
-FILE_barebox-karo-imx6dl-tx6x-1g.img = start_imx6dl_tx6x_1g.pblx.imximg
+pblb-$(CONFIG_MACH_TX6X) += start_imx6dl_tx6x_1g
+CFG_start_imx6dl_tx6x_1g.pblb.imximg = $(board)/karo-tx6x/flash-header-tx6dl-1g.imxcfg
+FILE_barebox-karo-imx6dl-tx6x-1g.img = start_imx6dl_tx6x_1g.pblb.imximg
 image-$(CONFIG_MACH_TX6X) += barebox-karo-imx6dl-tx6x-1g.img
 
-pblx-$(CONFIG_MACH_TX6X) += start_imx6q_tx6x_1g
-CFG_start_imx6q_tx6x_1g.pblx.imximg = $(board)/karo-tx6x/flash-header-tx6q-1g.imxcfg
-FILE_barebox-karo-imx6q-tx6x-1g.img = start_imx6q_tx6x_1g.pblx.imximg
+pblb-$(CONFIG_MACH_TX6X) += start_imx6q_tx6x_1g
+CFG_start_imx6q_tx6x_1g.pblb.imximg = $(board)/karo-tx6x/flash-header-tx6q-1g.imxcfg
+FILE_barebox-karo-imx6q-tx6x-1g.img = start_imx6q_tx6x_1g.pblb.imximg
 image-$(CONFIG_MACH_TX6X) += barebox-karo-imx6q-tx6x-1g.img
 
-pblx-$(CONFIG_MACH_TX6X) += start_imx6q_tx6x_2g
-CFG_start_imx6q_tx6x_2g.pblx.imximg = $(board)/karo-tx6x/flash-header-tx6qp-2g.imxcfg
-FILE_barebox-karo-imx6qp-tx6x-2g.img = start_imx6q_tx6x_2g.pblx.imximg
+pblb-$(CONFIG_MACH_TX6X) += start_imx6q_tx6x_2g
+CFG_start_imx6q_tx6x_2g.pblb.imximg = $(board)/karo-tx6x/flash-header-tx6qp-2g.imxcfg
+FILE_barebox-karo-imx6qp-tx6x-2g.img = start_imx6q_tx6x_2g.pblb.imximg
 image-$(CONFIG_MACH_TX6X) += barebox-karo-imx6qp-tx6x-2g.img
 
-pblx-$(CONFIG_MACH_UDOO) += start_imx6_udoo
-CFG_start_imx6_udoo.pblx.imximg = $(board)/udoo/flash-header-mx6-udoo.imxcfg
-FILE_barebox-udoo-imx6q.img = start_imx6_udoo.pblx.imximg
+pblb-$(CONFIG_MACH_UDOO) += start_imx6_udoo
+CFG_start_imx6_udoo.pblb.imximg = $(board)/udoo/flash-header-mx6-udoo.imxcfg
+FILE_barebox-udoo-imx6q.img = start_imx6_udoo.pblb.imximg
 image-$(CONFIG_MACH_UDOO) += barebox-udoo-imx6q.img
 
-pblx-$(CONFIG_MACH_CM_FX6) += start_imx6_cm_fx6
-CFG_start_imx6_cm_fx6.imx-sram-img = $(board)/cm-fx6/flash-header-mx6-cm-fx6.imxcfg
-FILE_barebox-cm-fx6.img = start_imx6_cm_fx6.imx-sram-img
+pblb-$(CONFIG_MACH_CM_FX6) += start_imx6_cm_fx6
+CFG_start_imx6_cm_fx6.pblb.imximg = $(board)/cm-fx6/flash-header-mx6-cm-fx6.imxcfg
+FILE_barebox-cm-fx6.img = start_imx6_cm_fx6.pblb.imximg
 image-$(CONFIG_MACH_CM_FX6) += barebox-cm-fx6.img
 
-pblx-$(CONFIG_MACH_CM_FX6) += start_imx6_utilite
-CFG_start_imx6_utilite.imx-sram-img = $(board)/cm-fx6/flash-header-mx6-cm-fx6.imxcfg
-FILE_barebox-utilite.img = start_imx6_utilite.imx-sram-img
+pblb-$(CONFIG_MACH_CM_FX6) += start_imx6_utilite
+CFG_start_imx6_utilite.pblb.imximg = $(board)/cm-fx6/flash-header-mx6-cm-fx6.imxcfg
+FILE_barebox-utilite.img = start_imx6_utilite.pblb.imximg
 image-$(CONFIG_MACH_CM_FX6) += barebox-utilite.img
 
-pblx-$(CONFIG_MACH_VARISCITE_MX6) += start_variscite_custom
-CFG_start_variscite_custom.pblx.imximg = $(board)/variscite-mx6/flash-header-variscite.imxcfg
-FILE_barebox-variscite-custom.img = start_variscite_custom.pblx.imximg
+pblb-$(CONFIG_MACH_VARISCITE_MX6) += start_variscite_custom
+CFG_start_variscite_custom.pblb.imximg = $(board)/variscite-mx6/flash-header-variscite.imxcfg
+FILE_barebox-variscite-custom.img = start_variscite_custom.pblb.imximg
 image-$(CONFIG_MACH_VARISCITE_MX6) += barebox-variscite-custom.img
 
-pblx-$(CONFIG_MACH_EMBEDSKY_E9) += start_imx6q_embedsky_e9
-CFG_start_imx6q_embedsky_e9.pblx.imximg = $(board)/embedsky-e9/flash-header-e9.imxcfg
-FILE_barebox-embedsky-imx6q-e9.img = start_imx6q_embedsky_e9.pblx.imximg
+pblb-$(CONFIG_MACH_EMBEDSKY_E9) += start_imx6q_embedsky_e9
+CFG_start_imx6q_embedsky_e9.pblb.imximg = $(board)/embedsky-e9/flash-header-e9.imxcfg
+FILE_barebox-embedsky-imx6q-e9.img = start_imx6q_embedsky_e9.pblb.imximg
 image-$(CONFIG_MACH_EMBEDSKY_E9) += barebox-embedsky-imx6q-e9.img
 
-pblx-$(CONFIG_MACH_EMBEST_RIOTBOARD) += start_imx6s_riotboard
-CFG_start_imx6s_riotboard.pblx.imximg = $(board)/embest-riotboard/flash-header-embest-riotboard.imxcfg
-FILE_barebox-embest-imx6s-riotboard.img = start_imx6s_riotboard.pblx.imximg
+pblb-$(CONFIG_MACH_EMBEST_RIOTBOARD) += start_imx6s_riotboard
+CFG_start_imx6s_riotboard.pblb.imximg = $(board)/embest-riotboard/flash-header-embest-riotboard.imxcfg
+FILE_barebox-embest-imx6s-riotboard.img = start_imx6s_riotboard.pblb.imximg
 image-$(CONFIG_MACH_EMBEST_RIOTBOARD) += barebox-embest-imx6s-riotboard.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbaa03_1gib
-CFG_start_phytec_pbaa03_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg
-FILE_barebox-phytec-pbaa03-1gib.img = start_phytec_pbaa03_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbaa03_1gib
+CFG_start_phytec_pbaa03_1gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib.imxcfg
+FILE_barebox-phytec-pbaa03-1gib.img = start_phytec_pbaa03_1gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbaa03-1gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbaa03_1gib_1bank
-CFG_start_phytec_pbaa03_1gib_1bank.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg
-FILE_barebox-phytec-pbaa03-1gib-1bank.img = start_phytec_pbaa03_1gib_1bank.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbaa03_1gib_1bank
+CFG_start_phytec_pbaa03_1gib_1bank.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcaaxl3-1gib-1bank.imxcfg
+FILE_barebox-phytec-pbaa03-1gib-1bank.img = start_phytec_pbaa03_1gib_1bank.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbaa03-1gib-1bank.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbaa03_2gib
-CFG_start_phytec_pbaa03_2gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg
-FILE_barebox-phytec-pbaa03-2gib.img = start_phytec_pbaa03_2gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_pbaa03_2gib
+CFG_start_phytec_pbaa03_2gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcaaxl3-2gib.imxcfg
+FILE_barebox-phytec-pbaa03-2gib.img = start_phytec_pbaa03_2gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-pbaa03-2gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6q_som_nand_1gib
-CFG_start_phytec_phycore_imx6q_som_nand_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg
-FILE_barebox-phytec-phycore-imx6q-som-nand-1gib.img = start_phytec_phycore_imx6q_som_nand_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6q_som_nand_1gib
+CFG_start_phytec_phycore_imx6q_som_nand_1gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg
+FILE_barebox-phytec-phycore-imx6q-som-nand-1gib.img = start_phytec_phycore_imx6q_som_nand_1gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6q-som-nand-1gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6qp_som_nand_1gib
-CFG_start_phytec_phycore_imx6qp_som_nand_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg
-FILE_barebox-phytec-phycore-imx6qp-som-nand-1gib.img = start_phytec_phycore_imx6qp_som_nand_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6qp_som_nand_1gib
+CFG_start_phytec_phycore_imx6qp_som_nand_1gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058qp-1gib.imxcfg
+FILE_barebox-phytec-phycore-imx6qp-som-nand-1gib.img = start_phytec_phycore_imx6qp_som_nand_1gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6qp-som-nand-1gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6q_som_emmc_1gib
-CFG_start_phytec_phycore_imx6q_som_emmc_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg
-FILE_barebox-phytec-phycore-imx6q-som-emmc-1gib.img = start_phytec_phycore_imx6q_som_emmc_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6q_som_emmc_1gib
+CFG_start_phytec_phycore_imx6q_som_emmc_1gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058-1gib.imxcfg
+FILE_barebox-phytec-phycore-imx6q-som-emmc-1gib.img = start_phytec_phycore_imx6q_som_emmc_1gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6q-som-emmc-1gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6q_som_emmc_2gib
-CFG_start_phytec_phycore_imx6q_som_emmc_2gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg
-FILE_barebox-phytec-phycore-imx6q-som-emmc-2gib.img = start_phytec_phycore_imx6q_som_emmc_2gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6q_som_emmc_2gib
+CFG_start_phytec_phycore_imx6q_som_emmc_2gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058-2gib.imxcfg
+FILE_barebox-phytec-phycore-imx6q-som-emmc-2gib.img = start_phytec_phycore_imx6q_som_emmc_2gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6q-som-emmc-2gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6dl_som_nand_256mb
-CFG_start_phytec_phycore_imx6dl_som_nand_256mb.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg
-FILE_barebox-phytec-phycore-imx6dl-som-nand-256mb.img = start_phytec_phycore_imx6dl_som_nand_256mb.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6dl_som_nand_256mb
+CFG_start_phytec_phycore_imx6dl_som_nand_256mb.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058dl-256mb.imxcfg
+FILE_barebox-phytec-phycore-imx6dl-som-nand-256mb.img = start_phytec_phycore_imx6dl_som_nand_256mb.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6dl-som-nand-256mb.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6dl_som_nand_1gib
-CFG_start_phytec_phycore_imx6dl_som_nand_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg
-FILE_barebox-phytec-phycore-imx6dl-som-nand-1gib.img = start_phytec_phycore_imx6dl_som_nand_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6dl_som_nand_1gib
+CFG_start_phytec_phycore_imx6dl_som_nand_1gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg
+FILE_barebox-phytec-phycore-imx6dl-som-nand-1gib.img = start_phytec_phycore_imx6dl_som_nand_1gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6dl-som-nand-1gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6dl_som_emmc_1gib
-CFG_start_phytec_phycore_imx6dl_som_emmc_1gib.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib.imxcfg
-FILE_barebox-phytec-phycore-imx6dl-som-emmc-1gib.img = start_phytec_phycore_imx6dl_som_emmc_1gib.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6dl_som_emmc_1gib
+CFG_start_phytec_phycore_imx6dl_som_emmc_1gib.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib.imxcfg
+FILE_barebox-phytec-phycore-imx6dl-som-emmc-1gib.img = start_phytec_phycore_imx6dl_som_emmc_1gib.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6dl-som-emmc-1gib.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6ul_som_512mb
-CFG_start_phytec_phycore_imx6ul_som_512mb.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcl063-512mb.imxcfg
-FILE_barebox-phytec-phycore-imx6ul-512mb.img = start_phytec_phycore_imx6ul_som_512mb.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6ul_som_512mb
+CFG_start_phytec_phycore_imx6ul_som_512mb.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcl063-512mb.imxcfg
+FILE_barebox-phytec-phycore-imx6ul-512mb.img = start_phytec_phycore_imx6ul_som_512mb.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6ul-512mb.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6ull_som_256mb
-CFG_start_phytec_phycore_imx6ull_som_256mb.pblx.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcl063-256mb.imxcfg
-FILE_barebox-phytec-phycore-imx6ull-256mb.img = start_phytec_phycore_imx6ull_som_256mb.pblx.imximg
-image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6ull-256mb.img
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6ull_som_lc_256mb
+CFG_start_phytec_phycore_imx6ull_som_lc_256mb.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcl063-256mb.imxcfg
+FILE_barebox-phytec-phycore-imx6ull-lc-256mb.img = start_phytec_phycore_imx6ull_som_lc_256mb.pblb.imximg
+image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6ull-lc-256mb.img
 
-pblx-$(CONFIG_MACH_KONTRON_SAMX6I) += start_imx6q_samx6i
-CFG_start_imx6q_samx6i.pblx.imximg = $(board)/kontron-samx6i/flash-header-samx6i-quad.imxcfg
-FILE_barebox-imx6q-samx6i.img = start_imx6q_samx6i.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += start_phytec_phycore_imx6ull_som_512mb
+CFG_start_phytec_phycore_imx6ull_som_512mb.pblb.imximg = $(board)/phytec-som-imx6/flash-header-phytec-pcl063-512mb.imxcfg
+FILE_barebox-phytec-phycore-imx6ull-512mb.img = start_phytec_phycore_imx6ull_som_512mb.pblb.imximg
+image-$(CONFIG_MACH_PHYTEC_SOM_IMX6) += barebox-phytec-phycore-imx6ull-512mb.img
+
+pblb-$(CONFIG_MACH_KONTRON_SAMX6I) += start_imx6q_samx6i
+CFG_start_imx6q_samx6i.pblb.imximg = $(board)/kontron-samx6i/flash-header-samx6i-quad.imxcfg
+FILE_barebox-imx6q-samx6i.img = start_imx6q_samx6i.pblb.imximg
 image-$(CONFIG_MACH_KONTRON_SAMX6I) += barebox-imx6q-samx6i.img
 
-pblx-$(CONFIG_MACH_KONTRON_SAMX6I) += start_imx6dl_samx6i
-CFG_start_imx6dl_samx6i.pblx.imximg = $(board)/kontron-samx6i/flash-header-samx6i-duallite.imxcfg
-FILE_barebox-imx6dl-samx6i.img = start_imx6dl_samx6i.pblx.imximg
+pblb-$(CONFIG_MACH_KONTRON_SAMX6I) += start_imx6dl_samx6i
+CFG_start_imx6dl_samx6i.pblb.imximg = $(board)/kontron-samx6i/flash-header-samx6i-duallite.imxcfg
+FILE_barebox-imx6dl-samx6i.img = start_imx6dl_samx6i.pblb.imximg
 image-$(CONFIG_MACH_KONTRON_SAMX6I) += barebox-imx6dl-samx6i.img
 
-pblx-$(CONFIG_MACH_GRINN_LITEBOARD) += start_imx6ul_liteboard_256mb
-CFG_start_imx6ul_liteboard_256mb.pblx.imximg = $(board)/grinn-liteboard/flash-header-liteboard-256mb.imxcfg
-FILE_barebox-grinn-liteboard-256mb.img = start_imx6ul_liteboard_256mb.pblx.imximg
+pblb-$(CONFIG_MACH_GRINN_LITEBOARD) += start_imx6ul_liteboard_256mb
+CFG_start_imx6ul_liteboard_256mb.pblb.imximg = $(board)/grinn-liteboard/flash-header-liteboard-256mb.imxcfg
+FILE_barebox-grinn-liteboard-256mb.img = start_imx6ul_liteboard_256mb.pblb.imximg
 image-$(CONFIG_MACH_GRINN_LITEBOARD) += barebox-grinn-liteboard-256mb.img
 
-pblx-$(CONFIG_MACH_GRINN_LITEBOARD) += start_imx6ul_liteboard_512mb
-CFG_start_imx6ul_liteboard_512mb.pblx.imximg = $(board)/grinn-liteboard/flash-header-liteboard-512mb.imxcfg
-FILE_barebox-grinn-liteboard-512mb.img = start_imx6ul_liteboard_512mb.pblx.imximg
+pblb-$(CONFIG_MACH_GRINN_LITEBOARD) += start_imx6ul_liteboard_512mb
+CFG_start_imx6ul_liteboard_512mb.pblb.imximg = $(board)/grinn-liteboard/flash-header-liteboard-512mb.imxcfg
+FILE_barebox-grinn-liteboard-512mb.img = start_imx6ul_liteboard_512mb.pblb.imximg
 image-$(CONFIG_MACH_GRINN_LITEBOARD) += barebox-grinn-liteboard-512mb.img
 
-pblx-$(CONFIG_MACH_GW_VENTANA) += start_imx6q_gw54xx_1gx64
-CFG_start_imx6q_gw54xx_1gx64.pblx.imximg = $(board)/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg
-FILE_barebox-gateworks-imx6q-ventana-1gx64.img = start_imx6q_gw54xx_1gx64.pblx.imximg
+pblb-$(CONFIG_MACH_GW_VENTANA) += start_imx6q_gw54xx_1gx64
+CFG_start_imx6q_gw54xx_1gx64.pblb.imximg = $(board)/gateworks-ventana/flash-header-ventana-quad-1gx64.imxcfg
+FILE_barebox-gateworks-imx6q-ventana-1gx64.img = start_imx6q_gw54xx_1gx64.pblb.imximg
 image-$(CONFIG_MACH_GW_VENTANA) += barebox-gateworks-imx6q-ventana-1gx64.img
 
-pblx-$(CONFIG_MACH_ELTEC_HIPERCAM) += start_imx6dl_eltec_hipercam
-CFG_start_imx6dl_eltec_hipercam.pblx.imximg = $(board)/eltec-hipercam/flash-header-eltec-hipercam.imxcfg
-FILE_barebox-eltec-hipercam.img = start_imx6dl_eltec_hipercam.pblx.imximg
+pblb-$(CONFIG_MACH_ELTEC_HIPERCAM) += start_imx6dl_eltec_hipercam
+CFG_start_imx6dl_eltec_hipercam.pblb.imximg = $(board)/eltec-hipercam/flash-header-eltec-hipercam.imxcfg
+FILE_barebox-eltec-hipercam.img = start_imx6dl_eltec_hipercam.pblb.imximg
 image-$(CONFIG_MACH_ELTEC_HIPERCAM) += barebox-eltec-hipercam.img
 
-pblx-$(CONFIG_MACH_ADVANTECH_ROM_742X) += start_advantech_imx6dl_rom_7421
-CFG_start_advantech_imx6dl_rom_7421.pblx.imximg = $(board)/advantech-mx6/flash-header-advantech-rom-7421.imxcfg
-FILE_barebox-advantech-imx6dl-rom-7421.img = start_advantech_imx6dl_rom_7421.pblx.imximg
+pblb-$(CONFIG_MACH_ADVANTECH_ROM_742X) += start_advantech_imx6dl_rom_7421
+CFG_start_advantech_imx6dl_rom_7421.pblb.imximg = $(board)/advantech-mx6/flash-header-advantech-rom-7421.imxcfg
+FILE_barebox-advantech-imx6dl-rom-7421.img = start_advantech_imx6dl_rom_7421.pblb.imximg
 image-$(CONFIG_MACH_ADVANTECH_ROM_742X) += barebox-advantech-imx6dl-rom-7421.img
 
-pblx-$(CONFIG_MACH_WARP7) += start_imx7s_element14_warp7
-CFG_start_imx7s_element14_warp7.pblx.imximg = $(board)/element14-warp7/flash-header-mx7-warp.imxcfg
-FILE_barebox-element14-imx7s-warp7.img = start_imx7s_element14_warp7.pblx.imximg
+pblb-$(CONFIG_MACH_WARP7) += start_imx7s_element14_warp7
+CFG_start_imx7s_element14_warp7.pblb.imximg = $(board)/element14-warp7/flash-header-mx7-warp.imxcfg
+FILE_barebox-element14-imx7s-warp7.img = start_imx7s_element14_warp7.pblb.imximg
 image-$(CONFIG_MACH_WARP7) += barebox-element14-imx7s-warp7.img
 
-pblx-$(CONFIG_MACH_PHYTEC_PHYCORE_IMX7) += start_phytec_phycore_imx7
-CFG_start_phytec_phycore_imx7.pblx.imximg = $(board)/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg
-FILE_barebox-phytec-phycore-imx7.img = start_phytec_phycore_imx7.pblx.imximg
+pblb-$(CONFIG_MACH_PHYTEC_PHYCORE_IMX7) += start_phytec_phycore_imx7
+CFG_start_phytec_phycore_imx7.pblb.imximg = $(board)/phytec-phycore-imx7/flash-header-phytec-phycore-imx7.imxcfg
+FILE_barebox-phytec-phycore-imx7.img = start_phytec_phycore_imx7.pblb.imximg
 image-$(CONFIG_MACH_PHYTEC_PHYCORE_IMX7) += barebox-phytec-phycore-imx7.img
 
-pblx-$(CONFIG_MACH_VF610_TWR) += start_vf610_twr
-CFG_start_vf610_twr.pblx.imximg = $(board)/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
-FILE_barebox-vf610-twr.img = start_vf610_twr.pblx.imximg
+pblb-$(CONFIG_MACH_VF610_TWR) += start_vf610_twr
+CFG_start_vf610_twr.pblb.imximg = $(board)/freescale-vf610-twr/flash-header-vf610-twr.imxcfg
+FILE_barebox-vf610-twr.img = start_vf610_twr.pblb.imximg
 image-$(CONFIG_MACH_VF610_TWR) += barebox-vf610-twr.img
 
-pblx-$(CONFIG_MACH_ZII_RDU2) += start_imx6_zii_rdu2
-CFG_start_imx6_zii_rdu2.imx-sram-img = $(board)/zii-imx6q-rdu2/flash-header-rdu2.imxcfg
-FILE_barebox-zii-imx6-rdu2.img = start_imx6_zii_rdu2.imx-sram-img
+pblb-$(CONFIG_MACH_ZII_RDU2) += start_imx6_zii_rdu2
+CFG_start_imx6_zii_rdu2.pblb.imximg = $(board)/zii-imx6q-rdu2/flash-header-rdu2.imxcfg
+FILE_barebox-zii-imx6-rdu2.img = start_imx6_zii_rdu2.pblb.imximg
 image-$(CONFIG_MACH_ZII_RDU2) += barebox-zii-imx6-rdu2.img
 
-pblx-$(CONFIG_MACH_ZII_VF610_DEV) += start_zii_vf610_dev
-CFG_start_zii_vf610_dev.pblx.imximg = $(board)/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg
-FILE_barebox-zii-vf610-dev.img = start_zii_vf610_dev.pblx.imximg
+pblb-$(CONFIG_MACH_ZII_VF610_DEV) += start_zii_vf610_dev
+CFG_start_zii_vf610_dev.pblb.imximg = $(board)/zii-vf610-dev/flash-header-zii-vf610-dev.imxcfg
+FILE_barebox-zii-vf610-dev.img = start_zii_vf610_dev.pblb.imximg
 image-$(CONFIG_MACH_ZII_VF610_DEV) += barebox-zii-vf610-dev.img
 
 # ----------------------- i.MX7 based boards ---------------------------
-pblx-$(CONFIG_MACH_FREESCALE_MX7_SABRESD) += start_imx7d_sabresd
-CFG_start_imx7d_sabresd.pblx.imximg = $(board)/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg
-FILE_barebox-freescale-mx7-sabresd.img = start_imx7d_sabresd.pblx.imximg
+pblb-$(CONFIG_MACH_FREESCALE_MX7_SABRESD) += start_imx7d_sabresd
+CFG_start_imx7d_sabresd.pblb.imximg = $(board)/freescale-mx7-sabresd/flash-header-mx7-sabresd.imxcfg
+FILE_barebox-freescale-mx7-sabresd.img = start_imx7d_sabresd.pblb.imximg
 image-$(CONFIG_MACH_FREESCALE_MX7_SABRESD) += barebox-freescale-mx7-sabresd.img
 
-pblx-$(CONFIG_MACH_ZII_IMX7D_RPU2) += start_zii_imx7d_rpu2
-CFG_start_zii_imx7d_rpu2.pblx.imximg = $(board)/zii-imx7d-rpu2/flash-header-zii-imx7d-rpu2.imxcfg
-FILE_barebox-zii-imx7d-rpu2.img = start_zii_imx7d_rpu2.pblx.imximg
+pblb-$(CONFIG_MACH_ZII_IMX7D_RPU2) += start_zii_imx7d_rpu2
+CFG_start_zii_imx7d_rpu2.pblb.imximg = $(board)/zii-imx7d-rpu2/flash-header-zii-imx7d-rpu2.imxcfg
+FILE_barebox-zii-imx7d-rpu2.img = start_zii_imx7d_rpu2.pblb.imximg
 image-$(CONFIG_MACH_ZII_IMX7D_RPU2) += barebox-zii-imx7d-rpu2.img
 
 # ----------------------- i.MX8mq based boards --------------------------
-pblx-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += start_nxp_imx8mq_evk
-CFG_start_nxp_imx8mq_evk.imx-sram-img = $(board)/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg
-FILE_barebox-nxp-imx8mq-evk.img = start_nxp_imx8mq_evk.imx-sram-img
+pblb-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += start_nxp_imx8mq_evk
+CFG_start_nxp_imx8mq_evk.pblb.imximg = $(board)/nxp-imx8mq-evk/flash-header-imx8mq-evk.imxcfg
+FILE_barebox-nxp-imx8mq-evk.img = start_nxp_imx8mq_evk.pblb.imximg
 image-$(CONFIG_MACH_NXP_IMX8MQ_EVK) += barebox-nxp-imx8mq-evk.img
diff --git a/images/Makefile.mvebu b/images/Makefile.mvebu
index 17fa061..8d6a5bd 100644
--- a/images/Makefile.mvebu
+++ b/images/Makefile.mvebu
@@ -11,92 +11,92 @@
 
 # ----------------------- Armada 370 based boards ---------------------------
 GLOBALSCALE_MIRABOX_KWBOPTS = ${KWBOPTS} -i $(board)/globalscale-mirabox/kwbimage.cfg
-OPTS_start_globalscale_mirabox.pblx.kwbimg = $(GLOBALSCALE_MIRABOX_KWBOPTS)
-FILE_barebox-globalscale-mirabox.img	= start_globalscale_mirabox.pblx.kwbimg
-FILE_barebox-globalscale-mirabox-2nd.img = start_globalscale_mirabox.pblx
-pblx-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += start_globalscale_mirabox
+OPTS_start_globalscale_mirabox.pblb.kwbimg = $(GLOBALSCALE_MIRABOX_KWBOPTS)
+FILE_barebox-globalscale-mirabox.img	= start_globalscale_mirabox.pblb.kwbimg
+FILE_barebox-globalscale-mirabox-2nd.img = start_globalscale_mirabox.pblb
+pblb-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += start_globalscale_mirabox
 image-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += barebox-globalscale-mirabox.img
 image-$(CONFIG_MACH_GLOBALSCALE_MIRABOX) += barebox-globalscale-mirabox-2nd.img
 
 NETGEAR_RN104_KWBOPTS = ${KWBOPTS} -i $(board)/netgear-rn104/kwbimage.cfg
-OPTS_start_netgear_rn104.pblx.kwbimg = $(NETGEAR_RN104_KWBOPTS)
-FILE_barebox-netgear-rn104.img	= start_netgear_rn104.pblx.kwbimg
-FILE_barebox-netgear-rn104-2nd.img = start_netgear_rn104.pblx
-pblx-$(CONFIG_MACH_NETGEAR_RN104) += start_netgear_rn104
+OPTS_start_netgear_rn104.pblb.kwbimg = $(NETGEAR_RN104_KWBOPTS)
+FILE_barebox-netgear-rn104.img	= start_netgear_rn104.pblb.kwbimg
+FILE_barebox-netgear-rn104-2nd.img = start_netgear_rn104.pblb
+pblb-$(CONFIG_MACH_NETGEAR_RN104) += start_netgear_rn104
 image-$(CONFIG_MACH_NETGEAR_RN104) += barebox-netgear-rn104.img
 image-$(CONFIG_MACH_NETGEAR_RN104) += barebox-netgear-rn104-2nd.img
 
 # ----------------------- Armada XP based boards ---------------------------
 LENOVO_IX4_300D_KWBOPTS = ${KWBOPTS} -i $(board)/lenovo-ix4-300d/kwbimage.cfg
-OPTS_start_lenovo_ix4_300d.pblx.kwbimg = $(LENOVO_IX4_300D_KWBOPTS)
-FILE_barebox-lenovo-ix4-300d.img   = start_lenovo_ix4_300d.pblx.kwbimg
-FILE_barebox-lenovo-ix4-300d-2nd.img = start_lenovo_ix4_300d.pblx
-pblx-$(CONFIG_MACH_LENOVO_IX4_300D) += start_lenovo_ix4_300d
+OPTS_start_lenovo_ix4_300d.pblb.kwbimg = $(LENOVO_IX4_300D_KWBOPTS)
+FILE_barebox-lenovo-ix4-300d.img   = start_lenovo_ix4_300d.pblb.kwbimg
+FILE_barebox-lenovo-ix4-300d-2nd.img = start_lenovo_ix4_300d.pblb
+pblb-$(CONFIG_MACH_LENOVO_IX4_300D) += start_lenovo_ix4_300d
 image-$(CONFIG_MACH_LENOVO_IX4_300D) += barebox-lenovo-ix4-300d.img
 image-$(CONFIG_MACH_LENOVO_IX4_300D) += barebox-lenovo-ix4-300d-2nd.img
 
 MARVELL_ARMADA_XP_GP_KWBOPTS = ${KWBOPTS} -i $(board)/marvell-armada-xp-gp/kwbimage.cfg
-OPTS_start_marvell_armada_xp_gp.pblx.kwbimg = $(MARVELL_ARMADA_XP_GP_KWBOPTS)
-FILE_barebox-marvell-armada-xp-gp.img   = start_marvell_armada_xp_gp.pblx.kwbimg
-FILE_barebox-marvell-armada-xp-gp-2nd.img = start_marvell_armada_xp_gp.pblx
-pblx-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += start_marvell_armada_xp_gp
+OPTS_start_marvell_armada_xp_gp.pblb.kwbimg = $(MARVELL_ARMADA_XP_GP_KWBOPTS)
+FILE_barebox-marvell-armada-xp-gp.img   = start_marvell_armada_xp_gp.pblb.kwbimg
+FILE_barebox-marvell-armada-xp-gp-2nd.img = start_marvell_armada_xp_gp.pblb
+pblb-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += start_marvell_armada_xp_gp
 image-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += barebox-marvell-armada-xp-gp.img
 image-$(CONFIG_MACH_MARVELL_ARMADA_XP_GP) += barebox-marvell-armada-xp-gp-2nd.img
 
 NETGEAR_RN2120_KWBOPTS = ${KWBOPTS} -i $(board)/netgear-rn2120/kwbimage.cfg
-OPTS_start_netgear_rn2120.pblx.kwbimg = $(NETGEAR_RN2120_KWBOPTS)
-FILE_barebox-netgear-rn2120.img	= start_netgear_rn2120.pblx.kwbimg
-FILE_barebox-netgear-rn2120-2nd.img = start_netgear_rn2120.pblx
-pblx-$(CONFIG_MACH_NETGEAR_RN2120) += start_netgear_rn2120
+OPTS_start_netgear_rn2120.pblb.kwbimg = $(NETGEAR_RN2120_KWBOPTS)
+FILE_barebox-netgear-rn2120.img	= start_netgear_rn2120.pblb.kwbimg
+FILE_barebox-netgear-rn2120-2nd.img = start_netgear_rn2120.pblb
+pblb-$(CONFIG_MACH_NETGEAR_RN2120) += start_netgear_rn2120
 image-$(CONFIG_MACH_NETGEAR_RN2120) += barebox-netgear-rn2120.img
 image-$(CONFIG_MACH_NETGEAR_RN2120) += barebox-netgear-rn2120-2nd.img
 
 # ----------------------- Armada 38x based boards ---------------------------
 TURRIS_OMNIA_KWBOPTS = ${KWBOPTS} -i $(board)/turris-omnia/kwbimage.cfg
-OPTS_start_turris_omnia.pblx.kwbimg = $(TURRIS_OMNIA_KWBOPTS)
-FILE_barebox-turris-omnia.img = start_turris_omnia.pblx.kwbimg
-FILE_barebox-turris-omnia-2nd.img = start_turris_omnia.pblx
-pblx-$(CONFIG_MACH_TURRIS_OMNIA) += start_turris_omnia
+OPTS_start_turris_omnia.pblb.kwbimg = $(TURRIS_OMNIA_KWBOPTS)
+FILE_barebox-turris-omnia.img = start_turris_omnia.pblb.kwbimg
+FILE_barebox-turris-omnia-2nd.img = start_turris_omnia.pblb
+pblb-$(CONFIG_MACH_TURRIS_OMNIA) += start_turris_omnia
 image-$(CONFIG_MACH_TURRIS_OMNIA) += barebox-turris-omnia.img
 
 PLATHOME_OPENBLOCKS_AX3_KWBOPTS = ${KWBOPTS} -i $(board)/plathome-openblocks-ax3/kwbimage.cfg
-OPTS_start_plathome_openblocks_ax3.pblx.kwbimg = $(PLATHOME_OPENBLOCKS_AX3_KWBOPTS)
-FILE_barebox-plathome-openblocks-ax3.img   = start_plathome_openblocks_ax3.pblx.kwbimg
-FILE_barebox-plathome-openblocks-ax3-2nd.img = start_plathome_openblocks_ax3.pblx
-pblx-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += start_plathome_openblocks_ax3
+OPTS_start_plathome_openblocks_ax3.pblb.kwbimg = $(PLATHOME_OPENBLOCKS_AX3_KWBOPTS)
+FILE_barebox-plathome-openblocks-ax3.img   = start_plathome_openblocks_ax3.pblb.kwbimg
+FILE_barebox-plathome-openblocks-ax3-2nd.img = start_plathome_openblocks_ax3.pblb
+pblb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += start_plathome_openblocks_ax3
 image-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += barebox-plathome-openblocks-ax3.img
 image-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3) += barebox-plathome-openblocks-ax3-2nd.img
 
 # ----------------------- Dove 88AP510 based boards ---------------------------
 SOLIDRUN_CUBOX_KWBOPTS = ${KWBOPTS} -i $(board)/solidrun-cubox/kwbimage.cfg
-OPTS_start_solidrun_cubox.pblx.kwbimg = $(SOLIDRUN_CUBOX_KWBOPTS)
-FILE_barebox-solidrun-cubox.img	= start_solidrun_cubox.pblx.kwbimg
-FILE_barebox-solidrun-cubox-2nd.img = start_solidrun_cubox.pblx
-pblx-$(CONFIG_MACH_SOLIDRUN_CUBOX) += start_solidrun_cubox
+OPTS_start_solidrun_cubox.pblb.kwbimg = $(SOLIDRUN_CUBOX_KWBOPTS)
+FILE_barebox-solidrun-cubox.img	= start_solidrun_cubox.pblb.kwbimg
+FILE_barebox-solidrun-cubox-2nd.img = start_solidrun_cubox.pblb
+pblb-$(CONFIG_MACH_SOLIDRUN_CUBOX) += start_solidrun_cubox
 image-$(CONFIG_MACH_SOLIDRUN_CUBOX) += barebox-solidrun-cubox.img
 image-$(CONFIG_MACH_SOLIDRUN_CUBOX) += barebox-solidrun-cubox-2nd.img
 
 # ----------------------- Kirkwood based boards ---------------------------
 GLOBALSCALE_GURUPLUG_KWBOPTS = ${KWBOPTS} -i $(board)/globalscale-guruplug/kwbimage.cfg
-OPTS_start_globalscale_guruplug.pblx.kwbimg = $(GLOBALSCALE_GURUPLUG_KWBOPTS)
-FILE_barebox-globalscale-guruplug.img	= start_globalscale_guruplug.pblx.kwbimg
-FILE_barebox-globalscale-guruplug-2nd.img = start_globalscale_guruplug.pblx
-pblx-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += start_globalscale_guruplug
+OPTS_start_globalscale_guruplug.pblb.kwbimg = $(GLOBALSCALE_GURUPLUG_KWBOPTS)
+FILE_barebox-globalscale-guruplug.img	= start_globalscale_guruplug.pblb.kwbimg
+FILE_barebox-globalscale-guruplug-2nd.img = start_globalscale_guruplug.pblb
+pblb-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += start_globalscale_guruplug
 image-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += barebox-globalscale-guruplug.img
 image-$(CONFIG_MACH_GLOBALSCALE_GURUPLUG) += barebox-globalscale-guruplug-2nd.img
 
 PLATHOME_OPENBLOCKS_A6_KWBOPTS = ${KWBOPTS} -i $(board)/plathome-openblocks-a6/kwbimage.cfg
-OPTS_start_plathome_openblocks_a6.pblx.kwbimg = $(PLATHOME_OPENBLOCKS_A6_KWBOPTS)
-FILE_barebox-plathome-openblocks-a6.img   = start_plathome_openblocks_a6.pblx.kwbimg
-FILE_barebox-plathome-openblocks-a6-2nd.img = start_plathome_openblocks_a6.pblx
-pblx-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += start_plathome_openblocks_a6
+OPTS_start_plathome_openblocks_a6.pblb.kwbimg = $(PLATHOME_OPENBLOCKS_A6_KWBOPTS)
+FILE_barebox-plathome-openblocks-a6.img   = start_plathome_openblocks_a6.pblb.kwbimg
+FILE_barebox-plathome-openblocks-a6-2nd.img = start_plathome_openblocks_a6.pblb
+pblb-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += start_plathome_openblocks_a6
 image-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += barebox-plathome-openblocks-a6.img
 image-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6) += barebox-plathome-openblocks-a6-2nd.img
 
 USI_TOPKICK_KWBOPTS = ${KWBOPTS} -i $(board)/usi-topkick/kwbimage.cfg
-OPTS_start_usi_topkick.pblx.kwbimg = $(USI_TOPKICK_KWBOPTS)
-FILE_barebox-usi-topkick.img	= start_usi_topkick.pblx.kwbimg
-FILE_barebox-usi-topkick-2nd.img = start_usi_topkick.pblx
-pblx-$(CONFIG_MACH_USI_TOPKICK) += start_usi_topkick
+OPTS_start_usi_topkick.pblb.kwbimg = $(USI_TOPKICK_KWBOPTS)
+FILE_barebox-usi-topkick.img	= start_usi_topkick.pblb.kwbimg
+FILE_barebox-usi-topkick-2nd.img = start_usi_topkick.pblb
+pblb-$(CONFIG_MACH_USI_TOPKICK) += start_usi_topkick
 image-$(CONFIG_MACH_USI_TOPKICK) += barebox-usi-topkick.img
 image-$(CONFIG_MACH_USI_TOPKICK) += barebox-usi-topkick-2nd.img
diff --git a/images/Makefile.mxs b/images/Makefile.mxs
index aab8832..f93c3fd 100644
--- a/images/Makefile.mxs
+++ b/images/Makefile.mxs
@@ -7,7 +7,7 @@
 quiet_cmd_mxs_bootstream = MXS-BOOTSTREAM $@
       cmd_mxs_bootstream = $(objtree)/scripts/mxsimage -c $(CFG_$(@F)) -b $< -o $@ -p $(word 2,$^)
 
-$(obj)/%.mxsbs: $(obj)/%.pblx $(obj)/prep_%.pblb FORCE
+$(obj)/%.mxsbs: $(obj)/%.pblb $(obj)/prep_%.pblb FORCE
 	$(call if_changed,mxs_bootstream)
 
 # %.mxsbsu - convert into unencrypted MXS BootStream image
@@ -15,7 +15,7 @@
 quiet_cmd_mxs_bootstream_u = MXS-BOOTSTREAM-U $@
       cmd_mxs_bootstream_u = $(objtree)/scripts/mxsimage -u -c $(CFG_$(@F)) -b $< -o $@ -p $(word 2,$^)
 
-$(obj)/%.mxsbsu: $(obj)/%.pblx $(obj)/prep_%.pblb FORCE
+$(obj)/%.mxsbsu: $(obj)/%.pblb $(obj)/prep_%.pblb FORCE
 	$(call if_changed,mxs_bootstream_u)
 
 # %.mxssd - convert into MXS SD card image
@@ -29,38 +29,38 @@
 mxs23cfg = $(srctree)/arch/arm/mach-mxs/mxs23img.cfg
 mxs28cfg = $(srctree)/arch/arm/mach-mxs/mxs28img.cfg
 
-pblx-$(CONFIG_MACH_DUCKBILL) += start_barebox_duckbill prep_start_barebox_duckbill
+pblb-$(CONFIG_MACH_DUCKBILL) += start_barebox_duckbill prep_start_barebox_duckbill
 CFG_start_barebox_duckbill.mxsbs = $(mxs28cfg)
 FILE_barebox-duckbill-bootstream.img = start_barebox_duckbill.mxsbs
 image-$(CONFIG_MACH_DUCKBILL) += barebox-duckbill-bootstream.img
 FILE_barebox-duckbill-sd.img = start_barebox_duckbill.mxsbs.mxssd
 image-$(CONFIG_MACH_DUCKBILL) += barebox-duckbill-sd.img
-FILE_barebox-duckbill-2nd.img = start_barebox_duckbill.pblx
+FILE_barebox-duckbill-2nd.img = start_barebox_duckbill.pblb
 image-$(CONFIG_MACH_DUCKBILL) += barebox-duckbill-2nd.img
 
-pblx-$(CONFIG_MACH_TX28) += start_barebox_karo_tx28 prep_start_barebox_karo_tx28
+pblb-$(CONFIG_MACH_TX28) += start_barebox_karo_tx28 prep_start_barebox_karo_tx28
 CFG_start_barebox_karo_tx28.mxsbs = $(mxs28cfg)
 FILE_barebox-karo-tx28-bootstream.img = start_barebox_karo_tx28.mxsbs
 image-$(CONFIG_MACH_TX28) += barebox-karo-tx28-bootstream.img
 FILE_barebox-karo-tx28-sd.img = start_barebox_karo_tx28.mxsbs.mxssd
 image-$(CONFIG_MACH_TX28) += barebox-karo-tx28-sd.img
-FILE_barebox-karo-tx28-2nd.img = start_barebox_karo_tx28.pblx
+FILE_barebox-karo-tx28-2nd.img = start_barebox_karo_tx28.pblb
 image-$(CONFIG_MACH_TX28) += barebox-karo-tx28-2nd.img
 
-pblx-$(CONFIG_MACH_MX28EVK) += start_barebox_freescale_mx28evk prep_start_barebox_freescale_mx28evk
+pblb-$(CONFIG_MACH_MX28EVK) += start_barebox_freescale_mx28evk prep_start_barebox_freescale_mx28evk
 CFG_start_barebox_freescale_mx28evk.mxsbs = $(mxs28cfg)
 FILE_barebox-freescale-mx28evk-bootstream.img = start_barebox_freescale_mx28evk.mxsbs
 image-$(CONFIG_MACH_MX28EVK) += barebox-freescale-mx28evk-bootstream.img
 FILE_barebox-freescale-mx28evk-sd.img = start_barebox_freescale_mx28evk.mxsbs.mxssd
 image-$(CONFIG_MACH_MX28EVK) += barebox-freescale-mx28evk-sd.img
-FILE_barebox-freescale-mx28evk-2nd.img = start_barebox_freescale_mx28evk.pblx
+FILE_barebox-freescale-mx28evk-2nd.img = start_barebox_freescale_mx28evk.pblb
 image-$(CONFIG_MACH_MX28EVK) += barebox-freescale-mx28evk-2nd.img
 
-pblx-$(CONFIG_MACH_IMX233_OLINUXINO) += start_barebox_olinuxino_imx23 prep_start_barebox_olinuxino_imx23
+pblb-$(CONFIG_MACH_IMX233_OLINUXINO) += start_barebox_olinuxino_imx23 prep_start_barebox_olinuxino_imx23
 CFG_start_barebox_olinuxino_imx23.mxsbs = $(mxs23cfg)
 FILE_barebox-olinuxino-imx23-bootstream.img = start_barebox_olinuxino_imx23.mxsbs
 image-$(CONFIG_MACH_IMX233_OLINUXINO) += barebox-olinuxino-imx23-bootstream.img
 FILE_barebox-olinuxino-imx23-sd.img = start_barebox_olinuxino_imx23.mxsbs.mxssd
 image-$(CONFIG_MACH_IMX233_OLINUXINO) += barebox-olinuxino-imx23-sd.img
-FILE_barebox-olinuxino-imx23-2nd.img = start_barebox_olinuxino_imx23.pblx
+FILE_barebox-olinuxino-imx23-2nd.img = start_barebox_olinuxino_imx23.pblb
 image-$(CONFIG_MACH_IMX233_OLINUXINO) += barebox-olinuxino-imx23-2nd.img
diff --git a/images/Makefile.omap3 b/images/Makefile.omap3
index 694ec30..4d87b1d 100644
--- a/images/Makefile.omap3
+++ b/images/Makefile.omap3
@@ -6,10 +6,10 @@
 $(obj)/%.omap3_mlo: $(obj)/% FORCE
 	$(call if_changed,omap3_mlo_image)
 
-pblx-$(CONFIG_MACH_BEAGLE) += start_omap3_beagleboard_sdram start_omap3_beagleboard_sram
-FILE_barebox-beagleboard.img = start_omap3_beagleboard_sdram.pblx
+pblb-$(CONFIG_MACH_BEAGLE) += start_omap3_beagleboard_sdram start_omap3_beagleboard_sram
+FILE_barebox-beagleboard.img = start_omap3_beagleboard_sdram.pblb
 omap3-barebox-$(CONFIG_MACH_BEAGLE) += barebox-beagleboard.img
-FILE_barebox-beagleboard-mlo.img = start_omap3_beagleboard_sram.pblx.omap3_mlo
+FILE_barebox-beagleboard-mlo.img = start_omap3_beagleboard_sram.pblb.omap3_mlo
 omap3-mlo-$(CONFIG_MACH_BEAGLE) += barebox-beagleboard-mlo.img
 
 ifdef CONFIG_OMAP_BUILD_IFT
diff --git a/images/Makefile.rockchip b/images/Makefile.rockchip
index 3f1ee57..1630316 100644
--- a/images/Makefile.rockchip
+++ b/images/Makefile.rockchip
@@ -2,10 +2,10 @@
 # barebox image generation Makefile for Rockchip images
 #
 
-pblx-$(CONFIG_MACH_RADXA_ROCK) += start_radxa_rock
-FILE_barebox-radxa-rock.img = start_radxa_rock.pblx
+pblb-$(CONFIG_MACH_RADXA_ROCK) += start_radxa_rock
+FILE_barebox-radxa-rock.img = start_radxa_rock.pblb
 image-$(CONFIG_MACH_RADXA_ROCK) += barebox-radxa-rock.img
 
-pblx-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += start_rk3288_phycore_som
-FILE_barebox-rk3288-phycore-som.img = start_rk3288_phycore_som.pblx
+pblb-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += start_rk3288_phycore_som
+FILE_barebox-rk3288-phycore-som.img = start_rk3288_phycore_som.pblb
 image-$(CONFIG_MACH_PHYTEC_SOM_RK3288) += barebox-rk3288-phycore-som.img
diff --git a/images/Makefile.socfpga b/images/Makefile.socfpga
index a075b36..6b346a5 100644
--- a/images/Makefile.socfpga
+++ b/images/Makefile.socfpga
@@ -13,56 +13,49 @@
 $(obj)/%.socfpgaimg: $(obj)/% FORCE
 	$(call if_changed,socfpga_image)
 
-ocram-tmp = $(subst $(comma),_,$(dot-target).ocram.tmp)
-
-quiet_cmd_socfpga_ocram_img ?= SOCFPGA-OCRAM-IMG    $@
-      cmd_socfpga_ocram_img ?= cat $(obj)/$(patsubst %.socfpga-ocram-img,%.pblb,$(2)) > $(ocram-tmp); \
-		  $(call size_append, $(obj)/barebox.z) >> $(ocram-tmp); \
-		  $(objtree)/scripts/socfpga_mkimage -v1 -b -s -o $@ $(ocram-tmp); \
-		  cat $(obj)/barebox.z >> $@
-
-$(obj)/%.socfpga-ocram-img: $(obj)/%.pblb $(obj)/barebox.z FORCE
-	$(call if_changed,socfpga_ocram_img,$(@F))
-
 # ----------------------- Cyclone5 based boards ---------------------------
-pblx-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += start_socfpga_socdk_xload
-FILE_barebox-socfpga-socdk-xload.img = start_socfpga_socdk_xload.pblx.socfpgaimg
+pblb-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += start_socfpga_socdk_xload
+FILE_barebox-socfpga-socdk-xload.img = start_socfpga_socdk_xload.pblb.socfpgaimg
 socfpga-xload-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += barebox-socfpga-socdk-xload.img
 
-pblx-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += start_socfpga_socdk
-FILE_barebox-socfpga-socdk.img = start_socfpga_socdk.pblx
+pblb-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += start_socfpga_socdk
+FILE_barebox-socfpga-socdk.img = start_socfpga_socdk.pblb
 socfpga-barebox-$(CONFIG_MACH_SOCFPGA_ALTERA_SOCDK) += barebox-socfpga-socdk.img
 
-pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc_xload
-FILE_barebox-socfpga-de0_nano_soc-xload.img = start_socfpga_de0_nano_soc_xload.pblx.socfpgaimg
+pblb-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc_xload
+FILE_barebox-socfpga-de0_nano_soc-xload.img = start_socfpga_de0_nano_soc_xload.pblb.socfpgaimg
 socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += barebox-socfpga-de0_nano_soc-xload.img
 
-pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc
-FILE_barebox-socfpga-de0_nano_soc.img = start_socfpga_de0_nano_soc.pblx
+pblb-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += start_socfpga_de0_nano_soc
+FILE_barebox-socfpga-de0_nano_soc.img = start_socfpga_de0_nano_soc.pblb
 socfpga-barebox-$(CONFIG_MACH_SOCFPGA_TERASIC_DE0_NANO_SOC) += barebox-socfpga-de0_nano_soc.img
 
-pblx-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += start_socfpga_achilles
-FILE_barebox-socfpga-achilles.img = start_socfpga_achilles.socfpga-ocram-img
+pblb-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += start_socfpga_achilles_xload
+FILE_barebox-socfpga-achilles-xload.img = start_socfpga_achilles_xload.pblb.socfpgaimg
+socfpga-barebox-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += barebox-socfpga-achilles-xload.img
+
+pblb-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += start_socfpga_achilles
+FILE_barebox-socfpga-achilles.img = start_socfpga_achilles.pblb
 socfpga-barebox-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += barebox-socfpga-achilles.img
 
-pblx-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += start_socfpga_achilles_bringup
-FILE_barebox-socfpga-achilles-bringup.img = start_socfpga_achilles_bringup.pblx
+pblb-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += start_socfpga_achilles_bringup
+FILE_barebox-socfpga-achilles-bringup.img = start_socfpga_achilles_bringup.pblb
 socfpga-barebox-$(CONFIG_MACH_SOCFPGA_REFLEX_ACHILLES) += barebox-socfpga-achilles-bringup.img
 
-pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit_xload
-FILE_barebox-socfpga-sockit-xload.img = start_socfpga_sockit_xload.pblx.socfpgaimg
+pblb-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit_xload
+FILE_barebox-socfpga-sockit-xload.img = start_socfpga_sockit_xload.pblb.socfpgaimg
 socfpga-xload-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit-xload.img
 
-pblx-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit
-FILE_barebox-socfpga-sockit.img = start_socfpga_sockit.pblx
+pblb-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += start_socfpga_sockit
+FILE_barebox-socfpga-sockit.img = start_socfpga_sockit.pblb
 socfpga-barebox-$(CONFIG_MACH_SOCFPGA_TERASIC_SOCKIT) += barebox-socfpga-sockit.img
 
-pblx-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += start_socfpga_socrates_xload
-FILE_barebox-socfpga-socrates-xload.img = start_socfpga_socrates_xload.pblx.socfpgaimg
+pblb-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += start_socfpga_socrates_xload
+FILE_barebox-socfpga-socrates-xload.img = start_socfpga_socrates_xload.pblb.socfpgaimg
 socfpga-xload-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += barebox-socfpga-socrates-xload.img
 
-pblx-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += start_socfpga_socrates
-FILE_barebox-socfpga-socrates.img = start_socfpga_socrates.pblx
+pblb-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += start_socfpga_socrates
+FILE_barebox-socfpga-socrates.img = start_socfpga_socrates.pblb
 socfpga-barebox-$(CONFIG_MACH_SOCFPGA_EBV_SOCRATES) += barebox-socfpga-socrates.img
 
 ifdef CONFIG_ARCH_SOCFPGA_XLOAD
diff --git a/images/Makefile.tegra b/images/Makefile.tegra
index c1e0b20..f5b5841 100644
--- a/images/Makefile.tegra
+++ b/images/Makefile.tegra
@@ -29,64 +29,64 @@
 	$(call if_changed,tegra124_image)
 
 # ----------------------- Tegra20 based boards ---------------------------
-pblx-$(CONFIG_MACH_TOSHIBA_AC100) += start_toshiba_ac100
-FILE_barebox-tegra20-toshiba-ac100-usbloader.img = start_toshiba_ac100.pblx
+pblb-$(CONFIG_MACH_TOSHIBA_AC100) += start_toshiba_ac100
+FILE_barebox-tegra20-toshiba-ac100-usbloader.img = start_toshiba_ac100.pblb
 image-$(CONFIG_MACH_TOSHIBA_AC100) += barebox-tegra20-toshiba-ac100-usbloader.img
 
-pblx-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_256_usbload
-FILE_barebox-tegra20-toradex-colibri-t20-256-usbloader-iris.img = start_colibri_t20_256_usbload.pblx
+pblb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_256_usbload
+FILE_barebox-tegra20-toradex-colibri-t20-256-usbloader-iris.img = start_colibri_t20_256_usbload.pblb
 image-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += barebox-tegra20-toradex-colibri-t20-256-usbloader-iris.img
 
-pblx-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_256_hsmmc
-BCT_start_colibri_t20_256_hsmmc.pblx.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_256_hsmmc.bct
-FILE_barebox-tegra20-toradex-colibri-t20-256-hsmmc-iris.img = start_colibri_t20_256_hsmmc.pblx.t20img
+pblb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_256_hsmmc
+BCT_start_colibri_t20_256_hsmmc.pblb.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_256_hsmmc.bct
+FILE_barebox-tegra20-toradex-colibri-t20-256-hsmmc-iris.img = start_colibri_t20_256_hsmmc.pblb.t20img
 image-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += barebox-tegra20-toradex-colibri-t20-256-hsmmc-iris.img
 
-pblx-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_256_v11_nand
-BCT_start_colibri_t20_256_v11_nand.pblx.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_256_v11_nand.bct
-FILE_barebox-tegra20-toradex-colibri-t20-256-v11-nand-iris.img = start_colibri_t20_256_v11_nand.pblx.t20img
+pblb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_256_v11_nand
+BCT_start_colibri_t20_256_v11_nand.pblb.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_256_v11_nand.bct
+FILE_barebox-tegra20-toradex-colibri-t20-256-v11-nand-iris.img = start_colibri_t20_256_v11_nand.pblb.t20img
 image-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += barebox-tegra20-toradex-colibri-t20-256-v11-nand-iris.img
 
-pblx-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_256_v12_nand
-BCT_start_colibri_t20_256_v12_nand.pblx.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_256_v12_nand.bct
-FILE_barebox-tegra20-toradex-colibri-t20-256-v12-nand-iris.img = start_colibri_t20_256_v12_nand.pblx.t20img
+pblb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_256_v12_nand
+BCT_start_colibri_t20_256_v12_nand.pblb.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_256_v12_nand.bct
+FILE_barebox-tegra20-toradex-colibri-t20-256-v12-nand-iris.img = start_colibri_t20_256_v12_nand.pblb.t20img
 image-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += barebox-tegra20-toradex-colibri-t20-256-v12-nand-iris.img
 
-pblx-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_512_usbload
-FILE_barebox-tegra20-toradex-colibri-t20-512-usbloader-iris.img = start_colibri_t20_512_usbload.pblx
+pblb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_512_usbload
+FILE_barebox-tegra20-toradex-colibri-t20-512-usbloader-iris.img = start_colibri_t20_512_usbload.pblb
 image-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += barebox-tegra20-toradex-colibri-t20-512-usbloader-iris.img
 
-pblx-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_512_hsmmc
-BCT_start_colibri_t20_512_hsmmc.pblx.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_512_hsmmc.bct
-FILE_barebox-tegra20-toradex-colibri-t20-512-hsmmc-iris.img = start_colibri_t20_512_hsmmc.pblx.t20img
+pblb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_512_hsmmc
+BCT_start_colibri_t20_512_hsmmc.pblb.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_512_hsmmc.bct
+FILE_barebox-tegra20-toradex-colibri-t20-512-hsmmc-iris.img = start_colibri_t20_512_hsmmc.pblb.t20img
 image-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += barebox-tegra20-toradex-colibri-t20-512-hsmmc-iris.img
 
-pblx-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_512_v11_nand
-BCT_start_colibri_t20_512_v11_nand.pblx.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_512_v11_nand.bct
-FILE_barebox-tegra20-toradex-colibri-t20-512-v11-nand-iris.img = start_colibri_t20_512_v11_nand.pblx.t20img
+pblb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_512_v11_nand
+BCT_start_colibri_t20_512_v11_nand.pblb.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_512_v11_nand.bct
+FILE_barebox-tegra20-toradex-colibri-t20-512-v11-nand-iris.img = start_colibri_t20_512_v11_nand.pblb.t20img
 image-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += barebox-tegra20-toradex-colibri-t20-512-v11-nand-iris.img
 
-pblx-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_512_v12_nand
-BCT_start_colibri_t20_512_v12_nand.pblx.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_512_v12_nand.bct
-FILE_barebox-tegra20-toradex-colibri-t20-512-v12-nand-iris.img = start_colibri_t20_512_v12_nand.pblx.t20img
+pblb-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += start_colibri_t20_512_v12_nand
+BCT_start_colibri_t20_512_v12_nand.pblb.t20img = $(objboard)/toradex-colibri-t20/colibri-t20_512_v12_nand.bct
+FILE_barebox-tegra20-toradex-colibri-t20-512-v12-nand-iris.img = start_colibri_t20_512_v12_nand.pblb.t20img
 image-$(CONFIG_MACH_TORADEX_COLIBRI_T20) += barebox-tegra20-toradex-colibri-t20-512-v12-nand-iris.img
 
 # ----------------------- Tegra30 based boards ---------------------------
-pblx-$(CONFIG_MACH_NVIDIA_BEAVER) += start_nvidia_beaver
-FILE_barebox-tegra30-nvidia-beaver-usbloader.img = start_nvidia_beaver.pblx
+pblb-$(CONFIG_MACH_NVIDIA_BEAVER) += start_nvidia_beaver
+FILE_barebox-tegra30-nvidia-beaver-usbloader.img = start_nvidia_beaver.pblb
 image-$(CONFIG_MACH_NVIDIA_BEAVER) += barebox-tegra30-nvidia-beaver-usbloader.img
 
-pblx-$(CONFIG_MACH_NVIDIA_BEAVER) += start_nvidia_beaver
-BCT_start_nvidia_beaver.pblx.t30img = $(objboard)/nvidia-beaver/beaver-2gb-emmc.bct
-FILE_barebox-tegra30-nvidia-beaver-emmc.img = start_nvidia_beaver.pblx.t30img
+pblb-$(CONFIG_MACH_NVIDIA_BEAVER) += start_nvidia_beaver
+BCT_start_nvidia_beaver.pblb.t30img = $(objboard)/nvidia-beaver/beaver-2gb-emmc.bct
+FILE_barebox-tegra30-nvidia-beaver-emmc.img = start_nvidia_beaver.pblb.t30img
 image-$(CONFIG_MACH_NVIDIA_BEAVER) += barebox-tegra30-nvidia-beaver-emmc.img
 
 # ----------------------- Tegra124 based boards --------------------------
-pblx-$(CONFIG_MACH_NVIDIA_JETSON) += start_nvidia_jetson
-FILE_barebox-tegra124-nvidia-jetson-tk1-usbloader.img = start_nvidia_jetson.pblx
+pblb-$(CONFIG_MACH_NVIDIA_JETSON) += start_nvidia_jetson
+FILE_barebox-tegra124-nvidia-jetson-tk1-usbloader.img = start_nvidia_jetson.pblb
 image-$(CONFIG_MACH_NVIDIA_JETSON) += barebox-tegra124-nvidia-jetson-tk1-usbloader.img
 
-pblx-$(CONFIG_MACH_NVIDIA_JETSON) += start_nvidia_jetson
-BCT_start_nvidia_jetson.pblx.t124img = $(objboard)/nvidia-jetson-tk1/jetson-tk1-2gb-emmc.bct
-FILE_barebox-tegra124-nvidia-jetson-tk1-emmc.img = start_nvidia_jetson.pblx.t124img
+pblb-$(CONFIG_MACH_NVIDIA_JETSON) += start_nvidia_jetson
+BCT_start_nvidia_jetson.pblb.t124img = $(objboard)/nvidia-jetson-tk1/jetson-tk1-2gb-emmc.bct
+FILE_barebox-tegra124-nvidia-jetson-tk1-emmc.img = start_nvidia_jetson.pblb.t124img
 image-$(CONFIG_MACH_NVIDIA_JETSON) += barebox-tegra124-nvidia-jetson-tk1-emmc.img
diff --git a/images/Makefile.vexpress b/images/Makefile.vexpress
index 0f12dc1..d2af191 100644
--- a/images/Makefile.vexpress
+++ b/images/Makefile.vexpress
@@ -2,10 +2,10 @@
 # barebox image generation Makefile for VExpress images
 #
 
-pblx-$(CONFIG_MACH_VEXPRESS) += start_vexpress_ca9
-FILE_barebox-vexpress-ca9.img = start_vexpress_ca9.pblx
+pblb-$(CONFIG_MACH_VEXPRESS) += start_vexpress_ca9
+FILE_barebox-vexpress-ca9.img = start_vexpress_ca9.pblb
 image-$(CONFIG_MACH_VEXPRESS) += barebox-vexpress-ca9.img
 
-pblx-$(CONFIG_MACH_VEXPRESS) += start_vexpress_ca15
-FILE_barebox-vexpress-ca15.img = start_vexpress_ca15.pblx
+pblb-$(CONFIG_MACH_VEXPRESS) += start_vexpress_ca15
+FILE_barebox-vexpress-ca15.img = start_vexpress_ca15.pblb
 image-$(CONFIG_MACH_VEXPRESS) += barebox-vexpress-ca15.img
diff --git a/images/piggy.S b/images/piggy.S
new file mode 100644
index 0000000..84396ae
--- /dev/null
+++ b/images/piggy.S
@@ -0,0 +1,6 @@
+        .section .piggydata,#alloc
+        .globl  input_data
+input_data:
+        .incbin "images/barebox.z"
+        .globl  input_data_end
+input_data_end:
diff --git a/include/hab.h b/include/hab.h
index 78c2b86..abfce18 100644
--- a/include/hab.h
+++ b/include/hab.h
@@ -21,6 +21,7 @@
 #include <errno.h>
 
 #ifdef CONFIG_HABV4
+extern bool habv4_need_rng_software_self_test;
 int imx28_hab_get_status(void);
 int imx6_hab_get_status(void);
 #else
diff --git a/include/linux/clk.h b/include/linux/clk.h
index c6465b1..26da111 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -325,6 +325,11 @@
 struct of_phandle_args;
 struct of_device_id;
 
+struct clk_onecell_data {
+	struct clk **clks;
+	unsigned int clk_num;
+};
+
 #if defined(CONFIG_COMMON_CLK_OF_PROVIDER)
 
 #define CLK_OF_DECLARE(name, compat, fn)				\
@@ -336,10 +341,6 @@
 
 typedef int (*of_clk_init_cb_t)(struct device_node *);
 
-struct clk_onecell_data {
-	struct clk **clks;
-	unsigned int clk_num;
-};
 struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec, void *data);
 struct clk *of_clk_src_simple_get(struct of_phandle_args *clkspec, void *data);
 
@@ -350,6 +351,10 @@
 int of_clk_parent_fill(struct device_node *np, const char **parents,
 		       unsigned int size);
 int of_clk_init(struct device_node *root, const struct of_device_id *matches);
+int of_clk_add_provider(struct device_node *np,
+			struct clk *(*clk_src_get)(struct of_phandle_args *args,
+						   void *data),
+			void *data);
 #else
 
 
@@ -362,12 +367,16 @@
 __attribute__ ((unused)) = { .data = fn }
 
 
+static inline struct clk *of_clk_src_onecell_get(struct of_phandle_args *clkspec,
+						 void *data)
+{
+	return ERR_PTR(-ENOENT);
+}
 static inline struct clk *
 of_clk_src_simple_get(struct of_phandle_args *clkspec, void *data)
 {
 	return ERR_PTR(-ENOENT);
 }
-
 static inline struct clk *of_clk_get(struct device_node *np, int index)
 {
 	return ERR_PTR(-ENOENT);
@@ -382,16 +391,19 @@
 {
 	return 0;
 }
+static inline int of_clk_add_provider(struct device_node *np,
+			struct clk *(*clk_src_get)(struct of_phandle_args *args,
+						   void *data),
+			void *data)
+{
+	return 0;
+}
 #endif
 
 struct string_list;
 
 int clk_name_complete(struct string_list *sl, char *instr);
 
-int of_clk_add_provider(struct device_node *np,
-			struct clk *(*clk_src_get)(struct of_phandle_args *args,
-						   void *data),
-			void *data);
 char *of_clk_get_parent_name(struct device_node *np, unsigned int index);
 
 #endif
diff --git a/scripts/imx/imx-image.c b/scripts/imx/imx-image.c
index fa93e47..34a0720 100644
--- a/scripts/imx/imx-image.c
+++ b/scripts/imx/imx-image.c
@@ -132,6 +132,14 @@
 	if (d != NULL)
 		*d = r->d;
 }
+
+RSA *EVP_PKEY_get0_RSA(EVP_PKEY *pkey)
+{
+    if (pkey->type != EVP_PKEY_RSA)
+        return NULL;
+
+    return pkey->pkey.rsa;
+}
 #endif
 
 static int extract_key(const char *certfile, uint8_t **modulus, int *modulus_len,
@@ -324,7 +332,10 @@
 	hdr->self		= loadaddr + offset;
 
 	hdr->boot_data.start	= loadaddr;
-	hdr->boot_data.size	= imagesize;
+	if (data->max_load_size && imagesize > data->max_load_size)
+		hdr->boot_data.size	= data->max_load_size;
+	else
+		hdr->boot_data.size	= imagesize;
 
 	if (data->csf) {
 		hdr->csf = loadaddr + imagesize;
@@ -797,12 +808,12 @@
 	}
 
 	/*
-	 * Add HEADER_LEN to the image size for the blank aera + IVT + DCD.
+	 * Add HEADER_LEN to the image size for the blank area + IVT + DCD.
 	 * Align up to a 4k boundary, because:
 	 * - at least i.MX5 NAND boot only reads full NAND pages and misses the
 	 *   last partial NAND page.
 	 * - i.MX6 SPI NOR boot corrupts the last few bytes of an image loaded
-	 *   in ver funy ways when the image size is not 4 byte aligned
+	 *   in very funny ways when the image size is not 4 byte aligned
 	 */
 	data.load_size = roundup(data.image_size + header_len, 0x1000);
 
@@ -810,6 +821,11 @@
 	if (ret)
 		exit(1);
 
+	if (data.max_load_size && (sign_image || data.encrypt_image)) {
+		fprintf(stderr, "Specifying max_load_size is incompatible with HAB signing/encrypting\n");
+		exit(1);
+	}
+
 	if (!sign_image)
 		data.csf = NULL;
 
diff --git a/scripts/imx/imx.c b/scripts/imx/imx.c
index 43f67da..f37f151 100644
--- a/scripts/imx/imx.c
+++ b/scripts/imx/imx.c
@@ -279,6 +279,16 @@
 	return -EINVAL;
 }
 
+static int do_max_load_size(struct config_data *data, int argc, char *argv[])
+{
+	if (argc < 2)
+		return -EINVAL;
+
+	data->max_load_size = strtoul(argv[1], NULL, 0);
+
+	return 0;
+}
+
 static int hab_add_str(struct config_data *data, const char *str)
 {
 	int len = strlen(str);
@@ -590,6 +600,9 @@
 	}, {
 		.name = "soc",
 		.parse = do_soc,
+	},  {
+		.name = "max_load_size",
+		.parse = do_max_load_size,
 	}, {
 		.name = "hab",
 		.parse = do_hab,