diff --git a/Documentation/user/networking.rst b/Documentation/user/networking.rst index 6bb99b0..9231ebd 100644 --- a/Documentation/user/networking.rst +++ b/Documentation/user/networking.rst @@ -45,8 +45,8 @@ | | | any directly visible subnet. May be set | | | | automatically by DHCP. | +------------------------------+--------------+------------------------------------------------+ -| global.net.server | ipv4 host | The default server address. If unspecified, may| -| | | be set by DHCP | +| global.net.server | hostname or | The default server. If unspecified, may be set | +| | ipv4 address | by DHCP | +------------------------------+--------------+------------------------------------------------+ | global.net.nameserver | ipv4 address | The DNS server used for resolving host names. | | | | May be set by DHCP | diff --git a/commands/ip-route-get.c b/commands/ip-route-get.c index d393218..d3c15b7 100644 --- a/commands/ip-route-get.c +++ b/commands/ip-route-get.c @@ -40,10 +40,10 @@ if (argc == optind + 2) variable = argv[optind + 1]; - ret = string_to_ip(argv[optind], &ip); + ret = resolv(argv[optind], &ip); if (ret) { - printf("Cannot convert %s into a IP address: %s\n", - argv[1], strerror(-ret)); + printf("Cannot convert \"%s\" into a IP address: %s\n", + argv[optind], strerror(-ret)); return 1; } @@ -93,4 +93,5 @@ BAREBOX_CMD_OPTS("[-b] [variable]") BAREBOX_CMD_GROUP(CMD_GRP_MISC) BAREBOX_CMD_COMPLETE(empty_complete) + BAREBOX_CMD_HELP(cmd_ip_route_get_help) BAREBOX_CMD_END diff --git a/common/Kconfig b/common/Kconfig index 3ec3d46..21b33f0 100644 --- a/common/Kconfig +++ b/common/Kconfig @@ -858,6 +858,8 @@ select FLEXIBLE_BOOTARGS select CMD_BOOT select NET_CMD_IFUP if NET + select CMD_IP_ROUTE_GET if NET + select CMD_HOST if NET config DEFAULT_ENVIRONMENT_GENERIC bool "Generic environment template (old version)" diff --git a/defaultenv/defaultenv-2-base/boot/net b/defaultenv/defaultenv-2-base/boot/net index aaa5394..f889529 100644 --- a/defaultenv/defaultenv-2-base/boot/net +++ b/defaultenv/defaultenv-2-base/boot/net @@ -9,7 +9,13 @@ global.bootm.oftree="$oftree" fi -nfsroot="/home/${global.user}/nfsroot/${global.hostname}" +host ${global.net.server} nfsserver +if [ $? != 0 ]; then + echo "Cannot resolve \"${global.net.server}\"" + exit 1 +fi + +nfsroot="${nfsserver}:/home/${global.user}/nfsroot/${global.hostname}" ip_route_get -b ${global.net.server} global.linux.bootargs.dyn.ip diff --git a/drivers/net/macb.c b/drivers/net/macb.c index 1a8f6da..2a30457 100644 --- a/drivers/net/macb.c +++ b/drivers/net/macb.c @@ -46,9 +46,11 @@ #define RX_BUFFER_MULTIPLE 64 /* bytes */ #define RX_NB_PACKET 10 #define TX_RING_SIZE 2 /* must be power of 2 */ +#define GEM_Q1_DESCS 2 #define RX_RING_BYTES(bp) (sizeof(struct macb_dma_desc) * bp->rx_ring_size) #define TX_RING_BYTES (sizeof(struct macb_dma_desc) * TX_RING_SIZE) +#define GEM_Q1_DESC_BYTES (sizeof(struct macb_dma_desc) * GEM_Q1_DESCS) struct macb_device { void __iomem *regs; @@ -60,6 +62,7 @@ void *tx_buffer; struct macb_dma_desc *rx_ring; struct macb_dma_desc *tx_ring; + struct macb_dma_desc *gem_q1_descs; int rx_buffer_size; int rx_ring_size; @@ -86,7 +89,7 @@ static inline bool read_is_gem(struct macb_device *macb) { - return MACB_BFEXT(IDNUM, macb_readl(macb, MID)) == 0x2; + return MACB_BFEXT(IDNUM, macb_readl(macb, MID)) >= 0x2; } static int macb_send(struct eth_device *edev, void *packet, @@ -340,6 +343,20 @@ macb_writel(macb, RBQP, (ulong)macb->rx_ring); macb_writel(macb, TBQP, (ulong)macb->tx_ring); + if (macb->is_gem && macb->gem_q1_descs) { + /* Disable the second priority queue */ + macb->gem_q1_descs[0].addr = 0; + macb->gem_q1_descs[0].ctrl = MACB_BIT(TX_WRAP) | + MACB_BIT(TX_LAST) | + MACB_BIT(TX_USED); + macb->gem_q1_descs[1].addr = MACB_BIT(RX_USED) | + MACB_BIT(RX_WRAP); + macb->gem_q1_descs[1].ctrl = 0; + + gem_writel(macb, TQ1, (ulong)&macb->gem_q1_descs[0]); + gem_writel(macb, RQ1, (ulong)&macb->gem_q1_descs[1]); + } + switch(macb->interface) { case PHY_INTERFACE_MODE_RGMII: val = GEM_BIT(RGMII); @@ -592,11 +609,9 @@ bp->rx_buffer_size = roundup(bp->rx_buffer_size, RX_BUFFER_MULTIPLE); } - bp->rx_buffer = dma_alloc_coherent(bp->rx_buffer_size * bp->rx_ring_size, - DMA_ADDRESS_BROKEN); } - dev_dbg(bp->dev, "[%d] rx_buffer_size [%d]\n", + dev_dbg(bp->dev, "[%zu] rx_buffer_size [%d]\n", size, bp->rx_buffer_size); } @@ -691,6 +706,10 @@ macb->rx_ring = dma_alloc_coherent(RX_RING_BYTES(macb), DMA_ADDRESS_BROKEN); macb->tx_ring = dma_alloc_coherent(TX_RING_BYTES, DMA_ADDRESS_BROKEN); + if (macb->is_gem) + macb->gem_q1_descs = dma_alloc_coherent(GEM_Q1_DESC_BYTES, + DMA_ADDRESS_BROKEN); + macb_reset_hw(macb); ncfgr = macb_mdc_clk_div(macb); ncfgr |= MACB_BIT(PAE); /* PAuse Enable */ diff --git a/drivers/net/macb.h b/drivers/net/macb.h index 6be9732..979f53c 100644 --- a/drivers/net/macb.h +++ b/drivers/net/macb.h @@ -72,6 +72,8 @@ #define GEM_DCFG5 0x0290 #define GEM_DCFG6 0x0294 #define GEM_DCFG7 0x0298 +#define GEM_TQ1 0x0440 +#define GEM_RQ1 0x0480 /* Bitfields in NCR */ #define MACB_LB_OFFSET 0 diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index 3b1a6ea..0665aef 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig @@ -23,6 +23,11 @@ ---help--- Currently supports dm9161e and dm9131 +config DP83867_PHY + tristate "Texas Instruments DP83867 Gigabit PHY" + ---help--- + Currently supports the DP83867 PHY. + config LXT_PHY bool "Driver for the Intel LXT PHYs" ---help--- diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index e4d9ec6..5f11a85 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile @@ -14,4 +14,5 @@ obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o obj-$(CONFIG_MDIO_BUS_MUX) += mdio-mux.o obj-$(CONFIG_MDIO_BUS_MUX_GPIO) += mdio-mux-gpio.o +obj-$(CONFIG_DP83867_PHY) += dp83867.o diff --git a/drivers/net/phy/dp83867.c b/drivers/net/phy/dp83867.c new file mode 100644 index 0000000..b3328b7 --- /dev/null +++ b/drivers/net/phy/dp83867.c @@ -0,0 +1,323 @@ +/* + * Driver for the Texas Instruments DP83867 PHY + * + * Copyright (C) 2015 Texas Instruments Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include + +#include + +#define DP83867_PHY_ID 0x2000a231 +#define DP83867_DEVADDR 0x1f + +#define MII_DP83867_PHYCTRL 0x10 +#define MII_DP83867_MICR 0x12 +#define MII_DP83867_ISR 0x13 +#define MII_DP83867_CFG2 0x14 +#define MII_DP83867_BISCR 0x16 +#define DP83867_CTRL 0x1f +#define DP83867_CFG3 0x1e + +/* Extended Registers */ +#define DP83867_CFG4 0x0031 +#define DP83867_RGMIICTL 0x0032 +#define DP83867_STRAP_STS1 0x006E +#define DP83867_RGMIIDCTL 0x0086 +#define DP83867_IO_MUX_CFG 0x0170 + +#define DP83867_SW_RESET BIT(15) +#define DP83867_SW_RESTART BIT(14) + +/* MICR Interrupt bits */ +#define MII_DP83867_MICR_AN_ERR_INT_EN BIT(15) +#define MII_DP83867_MICR_SPEED_CHNG_INT_EN BIT(14) +#define MII_DP83867_MICR_DUP_MODE_CHNG_INT_EN BIT(13) +#define MII_DP83867_MICR_PAGE_RXD_INT_EN BIT(12) +#define MII_DP83867_MICR_AUTONEG_COMP_INT_EN BIT(11) +#define MII_DP83867_MICR_LINK_STS_CHNG_INT_EN BIT(10) +#define MII_DP83867_MICR_FALSE_CARRIER_INT_EN BIT(8) +#define MII_DP83867_MICR_SLEEP_MODE_CHNG_INT_EN BIT(4) +#define MII_DP83867_MICR_WOL_INT_EN BIT(3) +#define MII_DP83867_MICR_XGMII_ERR_INT_EN BIT(2) +#define MII_DP83867_MICR_POL_CHNG_INT_EN BIT(1) +#define MII_DP83867_MICR_JABBER_INT_EN BIT(0) + +/* RGMIICTL bits */ +#define DP83867_RGMII_TX_CLK_DELAY_EN BIT(1) +#define DP83867_RGMII_RX_CLK_DELAY_EN BIT(0) + +/* STRAP_STS1 bits */ +#define DP83867_STRAP_STS1_RESERVED BIT(11) + +/* PHY CTRL bits */ +#define DP83867_PHYCR_FIFO_DEPTH_SHIFT 14 +#define DP83867_PHYCR_FIFO_DEPTH_MASK (3 << 14) +#define DP83867_MDI_CROSSOVER 5 +#define DP83867_MDI_CROSSOVER_AUTO 0b10 +#define DP83867_MDI_CROSSOVER_MDIX 0b01 +#define DP83867_PHYCTRL_SGMIIEN 0x0800 +#define DP83867_PHYCTRL_RXFIFO_SHIFT 12 +#define DP83867_PHYCTRL_TXFIFO_SHIFT 14 +#define DP83867_PHYCR_RESERVED_MASK BIT(11) + +/* RGMIIDCTL bits */ +#define DP83867_RGMII_TX_CLK_DELAY_SHIFT 4 + +/* CFG2 bits */ +#define MII_DP83867_CFG2_SPEEDOPT_10EN 0x0040 +#define MII_DP83867_CFG2_SGMII_AUTONEGEN 0x0080 +#define MII_DP83867_CFG2_SPEEDOPT_ENH 0x0100 +#define MII_DP83867_CFG2_SPEEDOPT_CNT 0x0800 +#define MII_DP83867_CFG2_SPEEDOPT_INTLOW 0x2000 +#define MII_DP83867_CFG2_MASK 0x003F + +/* CFG4 bits */ +#define DP83867_CFG4_SGMII_AUTONEG_TIMER_MASK 0x60 +#define DP83867_CFG4_SGMII_AUTONEG_TIMER_16MS 0x00 +#define DP83867_CFG4_SGMII_AUTONEG_TIMER_2US 0x20 +#define DP83867_CFG4_SGMII_AUTONEG_TIMER_800US 0x40 +#define DP83867_CFG4_SGMII_AUTONEG_TIMER_11MS 0x60 +#define DP83867_CFG4_RESVDBIT7 BIT(7) +#define DP83867_CFG4_RESVDBIT8 BIT(8) + +/* IO_MUX_CFG bits */ +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL 0x1f + +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX 0x0 +#define DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN 0x1f + +/* CFG4 bits */ +#define DP83867_CFG4_PORT_MIRROR_EN BIT(0) + +enum { + DP83867_PORT_MIRROING_KEEP, + DP83867_PORT_MIRROING_EN, + DP83867_PORT_MIRROING_DIS, +}; + +struct dp83867_private { + int rx_id_delay; + int tx_id_delay; + int fifo_depth; + int io_impedance; + int port_mirroring; + bool rxctrl_strap_quirk; +}; + +static int dp83867_config_port_mirroring(struct phy_device *phydev) +{ + struct dp83867_private *dp83867 = (struct dp83867_private *)phydev->priv; + u16 val; + + val = phy_read_mmd_indirect(phydev, DP83867_CFG4, DP83867_DEVADDR); + + if (dp83867->port_mirroring == DP83867_PORT_MIRROING_EN) + val |= DP83867_CFG4_PORT_MIRROR_EN; + else + val &= ~DP83867_CFG4_PORT_MIRROR_EN; + + phy_write_mmd_indirect(phydev, DP83867_CFG4, DP83867_DEVADDR, val); + + return 0; +} + +static int dp83867_of_init(struct phy_device *phydev) +{ + struct dp83867_private *dp83867 = phydev->priv; + struct device_d *dev = &phydev->dev; + struct device_node *of_node = dev->device_node; + int ret; + + if (!of_node) + return -ENODEV; + + dp83867->io_impedance = -EINVAL; + + /* Optional configuration */ + if (of_property_read_bool(of_node, "ti,max-output-impedance")) + dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MAX; + else if (of_property_read_bool(of_node, "ti,min-output-impedance")) + dp83867->io_impedance = DP83867_IO_MUX_CFG_IO_IMPEDANCE_MIN; + + dp83867->rxctrl_strap_quirk = + of_property_read_bool(of_node, + "ti,dp83867-rxctrl-strap-quirk"); + + ret = of_property_read_u32(of_node, "ti,rx-internal-delay", + &dp83867->rx_id_delay); + if (ret && (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_RXID)) + return ret; + + ret = of_property_read_u32(of_node, "ti,tx-internal-delay", + &dp83867->tx_id_delay); + if (ret && (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID || + phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)) + return ret; + + if (of_property_read_bool(of_node, "enet-phy-lane-swap")) + dp83867->port_mirroring = DP83867_PORT_MIRROING_EN; + + if (of_property_read_bool(of_node, "enet-phy-lane-no-swap")) + dp83867->port_mirroring = DP83867_PORT_MIRROING_DIS; + + return of_property_read_u32(of_node, "ti,fifo-depth", + &dp83867->fifo_depth); +} + +static inline bool phy_interface_is_rgmii(struct phy_device *phydev) +{ + return phydev->interface >= PHY_INTERFACE_MODE_RGMII && + phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID; +} + +static inline bool phy_interface_is_sgmii(struct phy_device *phydev) +{ + return phydev->interface == PHY_INTERFACE_MODE_SGMII || + phydev->interface == PHY_INTERFACE_MODE_QSGMII; +} + +static int dp83867_config_init(struct phy_device *phydev) +{ + struct dp83867_private *dp83867; + int ret; + u16 val, delay, cfg2; + + if (!phydev->priv) { + dp83867 = kzalloc(sizeof(*dp83867), GFP_KERNEL); + if (!dp83867) + return -ENOMEM; + + phydev->priv = dp83867; + ret = dp83867_of_init(phydev); + if (ret) + return ret; + } else { + dp83867 = (struct dp83867_private *)phydev->priv; + } + + /* Restart the PHY. */ + val = phy_read(phydev, DP83867_CTRL); + phy_write(phydev, DP83867_CTRL, val | DP83867_SW_RESTART); + + if (dp83867->rxctrl_strap_quirk) { + val = phy_read_mmd_indirect(phydev, DP83867_CFG4, + DP83867_DEVADDR); + val &= ~BIT(7); + phy_write_mmd_indirect(phydev, DP83867_CFG4, DP83867_DEVADDR, + val); + } + + if (phy_interface_is_rgmii(phydev)) { + val = DP83867_MDI_CROSSOVER_AUTO << DP83867_MDI_CROSSOVER | + dp83867->fifo_depth << DP83867_PHYCR_FIFO_DEPTH_SHIFT; + ret = phy_write(phydev, MII_DP83867_PHYCTRL, val); + if (ret) + return ret; + } else if (phy_interface_is_sgmii(phydev)) { + phy_write(phydev, MII_BMCR, BMCR_ANENABLE | + BMCR_FULLDPLX | + BMCR_SPEED1000); + + cfg2 = phy_read(phydev, MII_DP83867_CFG2); + cfg2 &= MII_DP83867_CFG2_MASK; + cfg2 |= MII_DP83867_CFG2_SPEEDOPT_10EN | + MII_DP83867_CFG2_SGMII_AUTONEGEN | + MII_DP83867_CFG2_SPEEDOPT_ENH | + MII_DP83867_CFG2_SPEEDOPT_CNT | + MII_DP83867_CFG2_SPEEDOPT_INTLOW; + + phy_write(phydev, MII_DP83867_CFG2, cfg2); + + phy_write_mmd_indirect(phydev, DP83867_RGMIICTL, + DP83867_DEVADDR, 0x0); + + val = DP83867_PHYCTRL_SGMIIEN | + DP83867_MDI_CROSSOVER_MDIX << DP83867_MDI_CROSSOVER | + dp83867->fifo_depth << DP83867_PHYCTRL_RXFIFO_SHIFT | + dp83867->fifo_depth << DP83867_PHYCTRL_TXFIFO_SHIFT; + + phy_write(phydev, MII_DP83867_PHYCTRL, val); + phy_write(phydev, MII_DP83867_BISCR, 0x0); + } + + if (phy_interface_is_rgmii(phydev)) { + val = phy_read_mmd_indirect(phydev, DP83867_RGMIICTL, + DP83867_DEVADDR); + + switch (phydev->interface) { + case PHY_INTERFACE_MODE_RGMII_ID: + val |= (DP83867_RGMII_TX_CLK_DELAY_EN + | DP83867_RGMII_RX_CLK_DELAY_EN); + break; + case PHY_INTERFACE_MODE_RGMII_TXID: + val |= DP83867_RGMII_TX_CLK_DELAY_EN; + break; + case PHY_INTERFACE_MODE_RGMII_RXID: + val |= DP83867_RGMII_RX_CLK_DELAY_EN; + break; + default: + break; + } + phy_write_mmd_indirect(phydev, DP83867_RGMIICTL, + DP83867_DEVADDR, val); + + delay = (dp83867->rx_id_delay | + (dp83867->tx_id_delay << DP83867_RGMII_TX_CLK_DELAY_SHIFT)); + + phy_write_mmd_indirect(phydev, DP83867_RGMIIDCTL, + DP83867_DEVADDR, delay); + + if (dp83867->io_impedance >= 0) { + val = phy_read_mmd_indirect(phydev, DP83867_IO_MUX_CFG, + DP83867_DEVADDR); + val &= ~DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; + val |= dp83867->io_impedance + & DP83867_IO_MUX_CFG_IO_IMPEDANCE_CTRL; + + phy_write_mmd_indirect(phydev, DP83867_IO_MUX_CFG, + DP83867_DEVADDR, val); + } + } + + genphy_config_aneg(phydev); + + if (dp83867->port_mirroring != DP83867_PORT_MIRROING_KEEP) + dp83867_config_port_mirroring(phydev); + + dev_info(&phydev->dev, "DP83867\n"); + + return 0; +} + +static struct phy_driver dp83867_driver[] = { + { + .phy_id = DP83867_PHY_ID, + .phy_id_mask = 0xfffffff0, + .drv.name = "TI DP83867", + .features = PHY_GBIT_FEATURES, + + .config_init = dp83867_config_init, + + .config_aneg = genphy_config_aneg, + .read_status = genphy_read_status, + }, +}; + +static int dp83867_phy_init(void) +{ + return phy_drivers_register(dp83867_driver, ARRAY_SIZE(dp83867_driver)); +} +fs_initcall(dp83867_phy_init); diff --git a/net/dns.c b/net/dns.c index 4516235..ffe98ef 100644 --- a/net/dns.c +++ b/net/dns.c @@ -258,15 +258,26 @@ { IPaddr_t ip; int ret; + char *hostname, *varname = NULL; - if (argc != 2) + if (argc < 2) return COMMAND_ERROR_USAGE; + hostname = argv[1]; + + if (argc > 2) + varname = argv[2]; + ret = resolv(argv[1], &ip); - if (ret) - printf("unknown host %s\n", argv[1]); + if (ret) { + printf("unknown host %s\n", hostname); + return 1; + } + + if (varname) + setenv_ip(varname, ip); else - printf("%s is at %pI4\n", argv[1], &ip); + printf("%s is at %pI4\n", hostname, &ip); return 0; } @@ -274,7 +285,7 @@ BAREBOX_CMD_START(host) .cmd = do_host, BAREBOX_CMD_DESC("resolve a hostname") - BAREBOX_CMD_OPTS("HOSTNAME") + BAREBOX_CMD_OPTS(" [VARIABLE]") BAREBOX_CMD_GROUP(CMD_GRP_NET) BAREBOX_CMD_END #endif diff --git a/net/eth.c b/net/eth.c index b3e8124..53d24ba 100644 --- a/net/eth.c +++ b/net/eth.c @@ -344,7 +344,7 @@ late_initcall(eth_register_of_fixup); #endif -extern IPaddr_t net_serverip; +extern char *net_server; extern IPaddr_t net_gateway; static const char * const eth_mode_names[] = { @@ -384,7 +384,7 @@ edev->devname = xstrdup(dev_name(&edev->dev)); dev_add_param_ip(dev, "ipaddr", NULL, NULL, &edev->ipaddr, edev); - dev_add_param_ip(dev, "serverip", NULL, NULL, &net_serverip, edev); + dev_add_param_string(dev, "serverip", NULL, NULL, &net_server, edev); dev_add_param_ip(dev, "gateway", NULL, NULL, &net_gateway, edev); dev_add_param_ip(dev, "netmask", NULL, NULL, &edev->netmask, edev); dev_add_param_mac(dev, "ethaddr", eth_param_set_ethaddr, NULL, diff --git a/net/net.c b/net/net.c index f1a7df0..0d889dd 100644 --- a/net/net.c +++ b/net/net.c @@ -44,7 +44,7 @@ unsigned char *NetRxPackets[PKTBUFSRX]; /* Receive packets */ static unsigned int net_ip_id; -IPaddr_t net_serverip; +char *net_server; IPaddr_t net_gateway; static IPaddr_t net_nameserver; static char *net_domainname; @@ -271,17 +271,26 @@ IPaddr_t net_get_serverip(void) { - return net_serverip; + IPaddr_t ip; + int ret; + + ret = resolv(net_server, &ip); + if (ret) + return 0; + + return ip; } void net_set_serverip(IPaddr_t ip) { - net_serverip = ip; + free(net_server); + + net_server = xasprintf("%pI4", &ip); } void net_set_serverip_empty(IPaddr_t ip) { - if (net_serverip) + if (net_server && *net_server) return; net_set_serverip(ip); @@ -647,7 +656,7 @@ globalvar_add_simple_ip("net.nameserver", &net_nameserver); globalvar_add_simple_string("net.domainname", &net_domainname); - globalvar_add_simple_ip("net.server", &net_serverip); + globalvar_add_simple_string("net.server", &net_server); globalvar_add_simple_ip("net.gateway", &net_gateway); return 0;