diff --git a/arch/arm/boards/beaglebone/lowlevel.c b/arch/arm/boards/beaglebone/lowlevel.c index a9737d9..28959ff 100644 --- a/arch/arm/boards/beaglebone/lowlevel.c +++ b/arch/arm/boards/beaglebone/lowlevel.c @@ -55,7 +55,7 @@ static void beaglebone_data_macro_config(int dataMacroNum) { - u32 BaseAddrOffset = 0x00;; + u32 BaseAddrOffset = 0x00; if (dataMacroNum == 1) BaseAddrOffset = 0xA4; diff --git a/arch/arm/mach-omap/Kconfig b/arch/arm/mach-omap/Kconfig index 0913d0e..f7aa8c5 100644 --- a/arch/arm/mach-omap/Kconfig +++ b/arch/arm/mach-omap/Kconfig @@ -104,6 +104,13 @@ You need the utility program omap4_usbboot to boot from USB. Please read omap4_usb_booting.txt for more information. +config CMD_BOOT_ORDER + tristate + depends on ARCH_OMAP4 + prompt "boot_order" + help + A command to choose the next boot device on a warm reset. + config BOARDINFO default "Archos G9" if MACH_ARCHOSG9 default "Texas Instrument's SDP343x" if MACH_OMAP343xSDP diff --git a/arch/arm/mach-omap/Makefile b/arch/arm/mach-omap/Makefile index d9e00f7..973068d 100644 --- a/arch/arm/mach-omap/Makefile +++ b/arch/arm/mach-omap/Makefile @@ -30,4 +30,5 @@ obj-$(CONFIG_SHELL_NONE) += xload.o obj-$(CONFIG_MFD_TWL6030) += omap4_twl6030_mmc.o obj-$(CONFIG_OMAP4_USBBOOT) += omap4_rom_usb.o +obj-$(CONFIG_CMD_BOOT_ORDER) += boot_order.o obj-y += gpio.o diff --git a/arch/arm/mach-omap/am33xx_generic.c b/arch/arm/mach-omap/am33xx_generic.c index 059c55e..96432c9 100644 --- a/arch/arm/mach-omap/am33xx_generic.c +++ b/arch/arm/mach-omap/am33xx_generic.c @@ -19,12 +19,13 @@ */ #include +#include +#include #include #include #include #include #include -#include #include void __noreturn reset_cpu(unsigned long addr) @@ -94,10 +95,13 @@ return 0; /* running in SRAM or FLASH */ } -enum omap_boot_src am33xx_bootsrc(void) +static int am33xx_bootsource(void) { - return OMAP_BOOTSRC_MMC1; /* only MMC for now */ + bootsource_set(BOOTSOURCE_MMC); /* only MMC for now */ + bootsource_set_instance(0); + return 0; } +postcore_initcall(am33xx_bootsource); int am33xx_register_ethaddr(int eth_id, int mac_id) { diff --git a/arch/arm/mach-omap/boot_order.c b/arch/arm/mach-omap/boot_order.c new file mode 100644 index 0000000..2f2846d --- /dev/null +++ b/arch/arm/mach-omap/boot_order.c @@ -0,0 +1,83 @@ +/* + * boot_order.c - configure omap warm boot + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 + * as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + */ + +#include +#include +#include +#include + +struct bootsrc { + const char *name; + uint32_t sar; +}; + +const struct bootsrc src_list[] = { + {"xip" , OMAP44XX_SAR_BOOT_XIP }, + {"xipwait" , OMAP44XX_SAR_BOOT_XIPWAIT }, + {"nand" , OMAP44XX_SAR_BOOT_NAND }, + {"onenand" , OMAP44XX_SAR_BOOT_ONENAND }, + {"mmc1" , OMAP44XX_SAR_BOOT_MMC1 }, + {"mmc2_1" , OMAP44XX_SAR_BOOT_MMC2_1 }, + {"mmc2_2" , OMAP44XX_SAR_BOOT_MMC2_2 }, + {"uart" , OMAP44XX_SAR_BOOT_UART }, + {"usb_1" , OMAP44XX_SAR_BOOT_USB_1 }, + {"usb_ulpi", OMAP44XX_SAR_BOOT_USB_ULPI}, + {"usb_2" , OMAP44XX_SAR_BOOT_USB_2 }, +}; + +static uint32_t parse_device(char *str) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(src_list); i++) { + if (strcmp(str, src_list[i].name) == 0) + return src_list[i].sar; + } + printf("Unknown device '%s'\n", str); + return OMAP44XX_SAR_BOOT_VOID; +} + +static int cmd_boot_order(int argc, char *argv[]) +{ + uint32_t device_list[] = { + OMAP44XX_SAR_BOOT_VOID, + OMAP44XX_SAR_BOOT_VOID, + OMAP44XX_SAR_BOOT_VOID, + OMAP44XX_SAR_BOOT_VOID, + }; + int i; + + if (argc < 2) + return COMMAND_ERROR_USAGE; + for (i = 0; i + 1 < argc && i < ARRAY_SIZE(device_list); i++) { + device_list[i] = parse_device(argv[i + 1]); + if (device_list[i] == OMAP44XX_SAR_BOOT_VOID) + return COMMAND_ERROR_USAGE; + } + omap4_set_warmboot_order(device_list); + return 0; +} + +static const __maybe_unused char cmd_boot_order_help[] = +"Usage: boot_order []\n" +"Set warm boot order of up to four devices.\n" +"Each device can be one of:\n" +"xip xipwait nand onenand mmc1 mmc2_1 mmc2_2 uart usb_1 usb_ulpi usb_2\n"; + +BAREBOX_CMD_START(boot_order) + .cmd = cmd_boot_order, + .usage = "boot_order []", + BAREBOX_CMD_HELP(cmd_boot_order_help) + BAREBOX_CMD_COMPLETE(empty_complete) +BAREBOX_CMD_END diff --git a/arch/arm/mach-omap/include/mach/am33xx-clock.h b/arch/arm/mach-omap/include/mach/am33xx-clock.h index 39c107f..2ecfc5f 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-clock.h +++ b/arch/arm/mach-omap/include/mach/am33xx-clock.h @@ -31,12 +31,12 @@ #define MPUPLL_M_600 600 /* 125 * n */ #define MPUPLL_M_720 720 /* 125 * n */ -#define MPUPLL_N 23 /* (n -1 ) */ +#define MPUPLL_N (OSC - 1) #define MPUPLL_M2 1 /* Core PLL Fdll = 1 GHZ, */ #define COREPLL_M 1000 /* 125 * n */ -#define COREPLL_N 23 /* (n -1 ) */ +#define COREPLL_N (OSC - 1) #define COREPLL_M4 10 /* CORE_CLKOUTM4 = 200 MHZ */ #define COREPLL_M5 8 /* CORE_CLKOUTM5 = 250 MHZ */ @@ -48,19 +48,13 @@ * For clkout = 192 MHZ, Fdll = 960 MHZ, divider values are given below */ #define PERPLL_M 960 -#define PERPLL_N 23 +#define PERPLL_N (OSC - 1) #define PERPLL_M2 5 -/* DDR Freq is 166 MHZ for now*/ +/* DDR Freq is 266 MHZ for now*/ /* Set Fdll = 400 MHZ , Fdll = M * 2 * CLKINP/ N + 1; clkout = Fdll /(2 * M2) */ -//#if (CONFIG_AM335X_EVM_IS_13x13 == 1) -#if 0 -#define DDRPLL_M 166 /* M/N + 1 = 25/3 */ -#else #define DDRPLL_M 266 -#endif - -#define DDRPLL_N 23 +#define DDRPLL_N (OSC - 1) #define DDRPLL_M2 1 /* PRCM */ @@ -139,7 +133,9 @@ #define CM_PER_CPGMAC0_CLKCTRL (CM_PER + 0x14) /* Ethernet */ #define CM_PER_CPSW_CLKSTCTRL (CM_PER + 0x144)/* Ethernet */ #define CM_PER_OCMCRAM_CLKCTRL (CM_PER + 0x2C) /* OCMC RAM */ +#define CM_PER_GPIO1_CLKCTRL (CM_PER + 0xAC) /* GPIO1 */ #define CM_PER_GPIO2_CLKCTRL (CM_PER + 0xB0) /* GPIO2 */ +#define CM_PER_GPIO3_CLKCTRL (CM_PER + 0xB4) /* GPIO3 */ #define CM_PER_UART3_CLKCTRL (CM_PER + 0x74) /* UART3 */ #define CM_PER_I2C1_CLKCTRL (CM_PER + 0x48) /* I2C1 */ #define CM_PER_I2C2_CLKCTRL (CM_PER + 0x44) /* I2C2 */ diff --git a/arch/arm/mach-omap/include/mach/am33xx-silicon.h b/arch/arm/mach-omap/include/mach/am33xx-silicon.h index e69d345..9edf4ca 100644 --- a/arch/arm/mach-omap/include/mach/am33xx-silicon.h +++ b/arch/arm/mach-omap/include/mach/am33xx-silicon.h @@ -29,6 +29,12 @@ #define AM33XX_UART1_BASE (AM33XX_L4_PER_BASE + 0x22000) #define AM33XX_UART2_BASE (AM33XX_L4_PER_BASE + 0x24000) +/* GPIO */ +#define AM33XX_GPIO0_BASE (AM33XX_L4_WKUP_BASE + 0x207000 + 0x100) +#define AM33XX_GPIO1_BASE (AM33XX_L4_PER_BASE + 0x4C000 + 0x100) +#define AM33XX_GPIO2_BASE (AM33XX_L4_PER_BASE + 0x1AC000 + 0x100) +#define AM33XX_GPIO3_BASE (AM33XX_L4_PER_BASE + 0x1AE000 + 0x100) + /* EMFI Registers */ #define AM33XX_EMFI0_BASE 0x4C000000 diff --git a/arch/arm/mach-omap/include/mach/generic.h b/arch/arm/mach-omap/include/mach/generic.h index 7455404..5a10a54 100644 --- a/arch/arm/mach-omap/include/mach/generic.h +++ b/arch/arm/mach-omap/include/mach/generic.h @@ -27,17 +27,4 @@ #define cpu_is_omap4xxx() (0) #endif -enum omap_boot_src { - OMAP_BOOTSRC_UNKNOWN, - OMAP_BOOTSRC_MMC1, - OMAP_BOOTSRC_NAND, - OMAP_BOOTSRC_SPI1, - OMAP_BOOTSRC_USB1, -}; - -enum omap_boot_src omap_bootsrc(void); -enum omap_boot_src am33xx_bootsrc(void); -enum omap_boot_src omap3_bootsrc(void); -enum omap_boot_src omap4_bootsrc(void); - #endif diff --git a/arch/arm/mach-omap/include/mach/omap4-silicon.h b/arch/arm/mach-omap/include/mach/omap4-silicon.h index 9e82435..666e721 100644 --- a/arch/arm/mach-omap/include/mach/omap4-silicon.h +++ b/arch/arm/mach-omap/include/mach/omap4-silicon.h @@ -161,6 +161,25 @@ #define OMAP44XX_PRM_RSTCTRL_RESET 0x01 /* + * SAR (Save & Rescue) memory region + */ +#define OMAP44XX_SAR_RAM_BASE 0x4a326000 +#define OMAP44XX_SAR_CH_ADDRESS (OMAP44XX_SAR_RAM_BASE + 0xA00) +#define OMAP44XX_SAR_CH_START (OMAP44XX_SAR_RAM_BASE + 0xA0C) +#define OMAP44XX_SAR_BOOT_VOID 0x00 +#define OMAP44XX_SAR_BOOT_XIP 0x01 +#define OMAP44XX_SAR_BOOT_XIPWAIT 0x02 +#define OMAP44XX_SAR_BOOT_NAND 0x03 +#define OMAP44XX_SAR_BOOT_ONENAND 0x04 +#define OMAP44XX_SAR_BOOT_MMC1 0x05 +#define OMAP44XX_SAR_BOOT_MMC2_1 0x06 +#define OMAP44XX_SAR_BOOT_MMC2_2 0x07 +#define OMAP44XX_SAR_BOOT_UART 0x43 +#define OMAP44XX_SAR_BOOT_USB_1 0x45 +#define OMAP44XX_SAR_BOOT_USB_ULPI 0x46 +#define OMAP44XX_SAR_BOOT_USB_2 0x47 + +/* * Non-secure SRAM Addresses * Non-secure RAM starts at 0x40300000 for GP devices. But we keep SRAM_BASE * at 0x40304000(EMU base) so that our code works for both EMU and GP @@ -212,6 +231,7 @@ void omap4_power_i2c_send(u32); unsigned int omap4_revision(void); noinline int omap4_scale_vcores(unsigned vsel0_pin); +void omap4_set_warmboot_order(u32 *device_list); #endif diff --git a/arch/arm/mach-omap/omap3_generic.c b/arch/arm/mach-omap/omap3_generic.c index 10e03ae..f144813 100644 --- a/arch/arm/mach-omap/omap3_generic.c +++ b/arch/arm/mach-omap/omap3_generic.c @@ -28,6 +28,7 @@ */ #include +#include #include #include #include @@ -40,7 +41,6 @@ #include #include #include -#include /** * @brief Reset the CPU @@ -461,21 +461,25 @@ #ifdef CONFIG_OMAP3_CLOCK_CONFIG prcm_init(); #endif - } #define OMAP3_TRACING_VECTOR1 0x4020ffb4 -enum omap_boot_src omap3_bootsrc(void) +static int omap3_bootsource(void) { + enum bootsource src = BOOTSOURCE_UNKNOWN; u32 bootsrc = readl(OMAP3_TRACING_VECTOR1); if (bootsrc & (1 << 2)) - return OMAP_BOOTSRC_NAND; + src = BOOTSOURCE_NAND; if (bootsrc & (1 << 6)) - return OMAP_BOOTSRC_MMC1; - return OMAP_BOOTSRC_UNKNOWN; + src = BOOTSOURCE_MMC; + bootsource_set(src); + bootsource_set_instance(0); + + return 0; } +postcore_initcall(omap3_bootsource); /* GPMC timing for OMAP3 nand device */ const struct gpmc_config omap3_nand_cfg = { diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c index e1edffa..3d6ec25 100644 --- a/arch/arm/mach-omap/omap4_generic.c +++ b/arch/arm/mach-omap/omap4_generic.c @@ -1,11 +1,11 @@ #include +#include #include #include #include #include #include #include -#include #include #include #include @@ -41,6 +41,26 @@ while (1); } +void omap4_set_warmboot_order(u32 *device_list) +{ + const u32 CH[] = { + 0xCF00AA01, + 0x0000000C, + (device_list[0] << 16) | 0x0000, + (device_list[2] << 16) | device_list[1], + 0x0000 | device_list[3], + 0x00000000, + 0x00000000, + 0x00000000, + 0x00000000 + }; + int i; + + for (i = 0; i < ARRAY_SIZE(CH); i++) + writel(CH[i], OMAP44XX_SAR_CH_START + i*sizeof(CH[0])); + writel(OMAP44XX_SAR_CH_START, OMAP44XX_SAR_CH_ADDRESS); +} + #define WATCHDOG_WSPR 0x48 #define WATCHDOG_WWPS 0x34 @@ -339,7 +359,7 @@ /* PHY control values */ sr32(CM_MEMIF_EMIF_1_CLKCTRL, 0, 32, 0x1); - sr32(CM_MEMIF_EMIF_2_CLKCTRL, 0, 32, 0x1); + sr32(CM_MEMIF_EMIF_2_CLKCTRL, 0, 32, 0x1); /* Put the Core Subsystem PD to ON State */ @@ -466,7 +486,7 @@ * The ROM code uses interrupts for the transfers, so do not modify the * interrupt vectors in this case. */ - if (omap4_bootsrc() != OMAP_BOOTSRC_USB1) { + if (bootsource_get() != BOOTSOURCE_USB) { __asm__ __volatile__ ( "mov r0, #0;" "mcr p15, #0, r0, c12, c0, #0;" @@ -478,22 +498,28 @@ return 0; } -core_initcall(omap_vector_init); #define OMAP4_TRACING_VECTOR3 0x4030d048 -enum omap_boot_src omap4_bootsrc(void) +static int omap4_bootsource(void) { + enum bootsource src = BOOTSOURCE_UNKNOWN; u32 bootsrc = readl(OMAP4_TRACING_VECTOR3); if (bootsrc & (1 << 5)) - return OMAP_BOOTSRC_MMC1; + src = BOOTSOURCE_MMC; if (bootsrc & (1 << 3)) - return OMAP_BOOTSRC_NAND; + src = BOOTSOURCE_NAND; if (bootsrc & (1<<20)) - return OMAP_BOOTSRC_USB1; - return OMAP_BOOTSRC_UNKNOWN; + src = BOOTSOURCE_USB; + bootsource_set(src); + bootsource_set_instance(0); + + omap_vector_init(); + + return 0; } +core_initcall(omap4_bootsource); #define GPIO_MASK 0x1f diff --git a/arch/arm/mach-omap/omap_generic.c b/arch/arm/mach-omap/omap_generic.c index 580ed3e..cfd3dec 100644 --- a/arch/arm/mach-omap/omap_generic.c +++ b/arch/arm/mach-omap/omap_generic.c @@ -13,23 +13,12 @@ * */ #include +#include #include #include #include #include #include -#include - -enum omap_boot_src omap_bootsrc(void) -{ -#if defined(CONFIG_ARCH_OMAP3) - return omap3_bootsrc(); -#elif defined(CONFIG_ARCH_OMAP4) - return omap4_bootsrc(); -#elif defined(CONFIG_ARCH_AM33XX) - return am33xx_bootsrc(); -#endif -} #if defined(CONFIG_DEFAULT_ENVIRONMENT) && defined(CONFIG_MCI_STARTUP) static int omap_env_init(void) @@ -38,7 +27,7 @@ char *diskdev = "/dev/disk0.0"; int ret; - if (omap_bootsrc() != OMAP_BOOTSRC_MMC1) + if (bootsource_get() != BOOTSOURCE_MMC) return 0; ret = stat(diskdev, &s); diff --git a/arch/arm/mach-omap/xload.c b/arch/arm/mach-omap/xload.c index 72aa379..3cce3f2 100644 --- a/arch/arm/mach-omap/xload.c +++ b/arch/arm/mach-omap/xload.c @@ -1,4 +1,5 @@ #include +#include #include #include #include @@ -6,7 +7,6 @@ #include #include #include -#include #include #include @@ -165,30 +165,32 @@ { int (*func)(void) = NULL; - switch (omap_bootsrc()) + switch (bootsource_get()) { - case OMAP_BOOTSRC_MMC1: - printf("booting from MMC1\n"); + case BOOTSOURCE_MMC: + printf("booting from MMC\n"); func = omap_xload_boot_mmc(); break; - case OMAP_BOOTSRC_USB1: + case BOOTSOURCE_USB: if (IS_ENABLED(CONFIG_FS_OMAP4_USBBOOT)) { - printf("booting from USB1\n"); + printf("booting from USB\n"); func = omap4_xload_boot_usb(); break; } else { - printf("booting from usb1 not enabled\n"); + printf("booting from USB not enabled\n"); } - case OMAP_BOOTSRC_UNKNOWN: - printf("unknown boot source. Fall back to nand\n"); - case OMAP_BOOTSRC_NAND: + case BOOTSOURCE_NAND: printf("booting from NAND\n"); func = omap_xload_boot_nand(SZ_128K); break; - case OMAP_BOOTSRC_SPI1: - printf("booting from SPI1\n"); + case BOOTSOURCE_SPI: + printf("booting from SPI\n"); func = omap_xload_boot_spi(SZ_128K); break; + default: + printf("unknown boot source. Fall back to nand\n"); + func = omap_xload_boot_nand(SZ_128K); + break; } if (!func) {