diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index c2c555d..359f678 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -25,6 +25,9 @@ config HAS_NO_BOARD_HL_CODE bool +config PHYS_ADDR_T_64BIT + bool + menu "Machine selection" config BUILTIN_DTB @@ -275,6 +278,7 @@ bool "64-bit barebox" depends on CPU_SUPPORTS_64BIT_KERNEL && SYS_SUPPORTS_64BIT_KERNEL select ARCH_DMA_ADDR_T_64BIT + select PHYS_ADDR_T_64BIT help Select this option if you want to build a 64-bit barebox. @@ -337,6 +341,7 @@ config MIPS_OPTIMIZED_STRING_FUNCTIONS bool "use assembler optimized string functions" + depends on !64BIT default y help Say yes here to use assembler optimized memcpy / memset functions. diff --git a/arch/mips/boot/dtb.c b/arch/mips/boot/dtb.c index e7633a5..3f7f466 100644 --- a/arch/mips/boot/dtb.c +++ b/arch/mips/boot/dtb.c @@ -30,10 +30,10 @@ if (IS_ENABLED(CONFIG_MMU)) { sprintf(str, "kseg0_ram%d", r); - barebox_add_memory_bank(str, KSEG0 | base, size); + barebox_add_memory_bank(str, CKSEG0 | base, size); } else { sprintf(str, "kseg1_ram%d", r); - barebox_add_memory_bank(str, KSEG1 | base, size); + barebox_add_memory_bank(str, CKSEG1 | base, size); } if (dump) diff --git a/arch/mips/include/asm/addrspace.h b/arch/mips/include/asm/addrspace.h index 17d480d..dc44d7f 100644 --- a/arch/mips/include/asm/addrspace.h +++ b/arch/mips/include/asm/addrspace.h @@ -73,6 +73,26 @@ #define CKSEG2ADDR(a) (CPHYSADDR(a) | CKSEG2) #define CKSEG3ADDR(a) (CPHYSADDR(a) | CKSEG3) +/* + * Cache modes for XKPHYS address conversion macros + */ +#define K_CALG_COH_EXCL1_NOL2 0 +#define K_CALG_COH_SHRL1_NOL2 1 +#define K_CALG_UNCACHED 2 +#define K_CALG_NONCOHERENT 3 +#define K_CALG_COH_EXCL 4 +#define K_CALG_COH_SHAREABLE 5 +#define K_CALG_NOTUSED 6 +#define K_CALG_UNCACHED_ACCEL 7 + +/* + * 64-bit address conversions + */ +#define PHYS_TO_XKSEG_UNCACHED(p) PHYS_TO_XKPHYS(K_CALG_UNCACHED, (p)) +#define PHYS_TO_XKSEG_CACHED(p) PHYS_TO_XKPHYS(K_CALG_COH_SHAREABLE, (p)) +#define XKPHYS_TO_PHYS(p) ((p) & TO_PHYS_MASK) +#define PHYS_TO_XKPHYS(cm, a) (XKPHYS | (_ACAST64_(cm) << 59) | (a)) + #else #define CKSEG0ADDR(a) (CPHYSADDR(a) | KSEG0) diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h index 5a4cbf5..c155199 100644 --- a/arch/mips/include/asm/io.h +++ b/arch/mips/include/asm/io.h @@ -106,6 +106,12 @@ #define out_be16(a, v) __raw_writew(__cpu_to_be16(v), a) #define out_be32(a, v) __raw_writel(__cpu_to_be32(v), a) +#ifdef CONFIG_64BIT +#define IOMEM(addr) ((void __force __iomem *)PHYS_TO_XKSEG_UNCACHED(addr)) +#else +#define IOMEM(addr) ((void __force __iomem *)CKSEG1ADDR(addr)) +#endif + #include #endif /* __ASM_MIPS_IO_H */ diff --git a/arch/mips/include/asm/pbl_macros.h b/arch/mips/include/asm/pbl_macros.h index 37b150a..18115c8 100644 --- a/arch/mips/include/asm/pbl_macros.h +++ b/arch/mips/include/asm/pbl_macros.h @@ -134,21 +134,22 @@ subu t2, t1, t0 /* t2 <- size of pbl */ addu a2, a0, t2 /* a2 <- source end address */ +#define WSIZE 4 copy_loop: /* copy from source address [a0] */ - lw t4, LONGSIZE * 0(a0) - lw t5, LONGSIZE * 1(a0) - lw t6, LONGSIZE * 2(a0) - lw t7, LONGSIZE * 3(a0) + lw t4, WSIZE * 0(a0) + lw t5, WSIZE * 1(a0) + lw t6, WSIZE * 2(a0) + lw t7, WSIZE * 3(a0) /* copy to target address [a1] */ - sw t4, LONGSIZE * 0(a1) - sw t5, LONGSIZE * 1(a1) - sw t6, LONGSIZE * 2(a1) - sw t7, LONGSIZE * 3(a1) - addi a0, LONGSIZE * 4 + sw t4, WSIZE * 0(a1) + sw t5, WSIZE * 1(a1) + sw t6, WSIZE * 2(a1) + sw t7, WSIZE * 3(a1) + addi a0, WSIZE * 4 subu t3, a0, a2 blez t3, copy_loop - addi a1, LONGSIZE * 4 + addi a1, WSIZE * 4 copy_loop_exit: diff --git a/arch/mips/lib/c-r4k.c b/arch/mips/lib/c-r4k.c index 1502058..cb0544a 100644 --- a/arch/mips/lib/c-r4k.c +++ b/arch/mips/lib/c-r4k.c @@ -58,14 +58,14 @@ dcache_size = c->dcache.waysize * c->dcache.ways; lsize = c->dcache.linesz; - aend = (KSEG0 + dcache_size - 1) & ~(lsize - 1); - for (addr = KSEG0; addr <= aend; addr += lsize) + aend = (CKSEG0 + dcache_size - 1) & ~(lsize - 1); + for (addr = CKSEG0; addr <= aend; addr += lsize) cache_op(Index_Writeback_Inv_D, addr); icache_size = c->icache.waysize * c->icache.ways; lsize = c->icache.linesz; - aend = (KSEG0 + icache_size - 1) & ~(lsize - 1); - for (addr = KSEG0; addr <= aend; addr += lsize) + aend = (CKSEG0 + icache_size - 1) & ~(lsize - 1); + for (addr = CKSEG0; addr <= aend; addr += lsize) cache_op(Index_Invalidate_I, addr); /* secondatory cache skipped */ diff --git a/common/resource.c b/common/resource.c index e4bbe15..abc0814 100644 --- a/common/resource.c +++ b/common/resource.c @@ -114,7 +114,7 @@ /* The root resource for the whole memory-mapped io space */ struct resource iomem_resource = { .start = 0, - .end = 0xffffffff, + .end = ~(resource_size_t)0, .name = "iomem", .children = LIST_HEAD_INIT(iomem_resource.children), }; diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c index 0d5515b..395254c 100644 --- a/drivers/i2c/muxes/i2c-mux-pca954x.c +++ b/drivers/i2c/muxes/i2c-mux-pca954x.c @@ -180,6 +180,7 @@ struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); int num, force; struct pca954x *data; + uintptr_t tmp; int ret = -ENODEV; int gpio; @@ -203,7 +204,8 @@ goto exit_free; } - ret = dev_get_drvdata(dev, (const void **)&data->type); + ret = dev_get_drvdata(dev, (const void **)&tmp); + data->type = tmp; if (ret) goto exit_free; diff --git a/drivers/mtd/nor/cfi_flash.c b/drivers/mtd/nor/cfi_flash.c index 5bdccca..01ab1aa 100644 --- a/drivers/mtd/nor/cfi_flash.c +++ b/drivers/mtd/nor/cfi_flash.c @@ -515,7 +515,7 @@ int buffered_size; #endif /* get lower aligned address */ - wp = addr & ~(info->portwidth - 1); + wp = addr & ~((unsigned long)info->portwidth - 1); /* handle unaligned start */ aln = addr - wp; diff --git a/include/common.h b/include/common.h index 60e5005..f93bd7f 100644 --- a/include/common.h +++ b/include/common.h @@ -30,6 +30,7 @@ #include #include #include +#include #include /* @@ -139,11 +140,7 @@ void barebox_set_hostname(const char *); void barebox_set_hostname_no_overwrite(const char *); -#if defined(CONFIG_MIPS) -#include - -#define IOMEM(addr) ((void __force __iomem *)CKSEG1ADDR(addr)) -#else +#ifndef IOMEM #define IOMEM(addr) ((void __force __iomem *)(addr)) #endif