diff --git a/CHANGELOG b/CHANGELOG index 328703e..5034083 100644 --- a/CHANGELOG +++ b/CHANGELOG @@ -1,11 +1,25 @@ ====================================================================== -Changes since U-Boot 0.3.1: +Changes since U-Boot 0.4.0: +====================================================================== + +* Code cleanup: + - remove trailing white space, trailing empty lines, C++ comments, etc. + - split cmd_boot.c (separate cmd_bdinfo.c and cmd_load.c) + +* Patches by Kenneth Johansson, 25 Jun 2003: + - major rework of command structure + (work done mostly by Michal Cendrowski and Joakim Kristiansen) + +====================================================================== +Changes for U-Boot 0.4.0: ====================================================================== * Patches by Robert Schwebel, 26 Jun 2003: - - logdl - - csb226 - - innokom + - csb226 configuration updated + - credits for logodl port updated + - innokom configuration updated + - logodl tree update, still with coding style inconsistencies + - added OCM for ppc405 warning to README * Patch by Pantelis Antoniou, 25 Jun 2003: update NetVia with V2 board support diff --git a/CREDITS b/CREDITS index e815857..52a3ea1 100644 --- a/CREDITS +++ b/CREDITS @@ -67,7 +67,7 @@ D: Port to Siemens IAD210 board N: Ken Chou -E: kchou@ieee.org +E: kchou@ieee.org D: Support for A3000 SBC board N: Conn Clark diff --git a/MAKEALL b/MAKEALL index 4dc2f9a..9945f2b 100644 --- a/MAKEALL +++ b/MAKEALL @@ -45,10 +45,10 @@ LIST_4xx=" \ ADCIOP AR405 ASH405 BUBINGA405EP \ - CANBT CPCI405 CPCI4052 CPCI405AB \ - CPCI440 CPCIISER4 CRAYL1 DASA_SIM \ - DU405 EBONY ERIC MIP405 \ - MIP405T ML2 OCRTC ORSG \ + CANBT CPCI405 CPCI4052 CPCI405AB \ + CPCI440 CPCIISER4 CRAYL1 DASA_SIM \ + DU405 EBONY ERIC MIP405 \ + MIP405T ML2 OCRTC ORSG \ PCI405 PIP405 PMC405 W7OLMC \ W7OLMG WALNUT405 \ " @@ -58,7 +58,7 @@ ######################################################################### LIST_824x=" \ - A3000 BMW CPC45 CU824 \ + A3000 BMW CPC45 CU824 \ MOUSSE MUSENKI OXC PN62 \ Sandpoint8240 Sandpoint8245 utx8245 \ " diff --git a/Makefile b/Makefile index af14042..b223161 100644 --- a/Makefile +++ b/Makefile @@ -134,7 +134,8 @@ $(OBJDUMP) -d $< > $@ u-boot: depend subdirs $(OBJS) $(LIBS) $(LDSCRIPT) - $(LD) $(LDFLAGS) $(OBJS) \ + UNDEF_SYM=`$(OBJDUMP) -x $(LIBS) |sed -n -e 's/.*\(__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\ + $(LD) $(LDFLAGS) $$UNDEF_SYM $(OBJS) \ --start-group $(LIBS) --end-group \ -Map u-boot.map -o u-boot @@ -741,7 +742,7 @@ ######################################################################### cradle_config : unconfig - @./mkconfig $(@:_config=) arm pxa cradle + @./mkconfig $(@:_config=) arm pxa cradle csb226_config : unconfig @./mkconfig $(@:_config=) arm pxa csb226 diff --git a/README b/README index e33c601..668c4e0 100644 --- a/README +++ b/README @@ -735,12 +735,12 @@ (TEAC FD-05PUB). - MMC Support: - The MMC controller on the Intel PXA is supported. To - enable this define CONFIG_MMC. The MMC can be - accessed from the boot prompt by mapping the device + The MMC controller on the Intel PXA is supported. To + enable this define CONFIG_MMC. The MMC can be + accessed from the boot prompt by mapping the device to physical memory similar to flash. Command line is enabled with CFG_CMD_MMC. The MMC driver also works with - the FAT fs. This is enabled with CFG_CMD_FAT. + the FAT fs. This is enabled with CFG_CMD_FAT. - Keyboard Support: CONFIG_ISA_KEYBOARD @@ -782,12 +782,12 @@ or CONFIG_VIDEO_SED13806_16BPP - Keyboard Support: - CONFIG_KEYBOARD + CONFIG_KEYBOARD - Define this to enable a custom keyboard support. - This simply calls drv_keyboard_init() which must be - defined in your board-specific files. - The only board using this so far is RBC823. + Define this to enable a custom keyboard support. + This simply calls drv_keyboard_init() which must be + defined in your board-specific files. + The only board using this so far is RBC823. - LCD Support: CONFIG_LCD @@ -834,14 +834,14 @@ - Spash Screen Support: CONFIG_SPLASH_SCREEN - If this option is set, the environment is checked for - a variable "splashimage". If found, the usual display - of logo, copyright and system information on the LCD - is supressed and the BMP image at the address - specified in "splashimage" is loaded instead. The - console is redirected to the "nulldev", too. This - allows for a "silent" boot where a splash screen is - loaded very quickly after power-on. + If this option is set, the environment is checked for + a variable "splashimage". If found, the usual display + of logo, copyright and system information on the LCD + is supressed and the BMP image at the address + specified in "splashimage" is loaded instead. The + console is redirected to the "nulldev", too. This + allows for a "silent" boot where a splash screen is + loaded very quickly after power-on. - Ethernet address: @@ -968,14 +968,14 @@ CFG_I2C_INIT_BOARD - When a board is reset during an i2c bus transfer - chips might think that the current transfer is still - in progress. On some boards it is possible to access - the i2c SCLK line directly, either by using the - processor pin as a GPIO or by having a second pin - connected to the bus. If this option is defined a - custom i2c_init_board() routine in boards/xxx/board.c - is run early in the boot sequence. + When a board is reset during an i2c bus transfer + chips might think that the current transfer is still + in progress. On some boards it is possible to access + the i2c SCLK line directly, either by using the + processor pin as a GPIO or by having a second pin + connected to the bus. If this option is defined a + custom i2c_init_board() routine in boards/xxx/board.c + is run early in the boot sequence. - SPI Support: CONFIG_SPI @@ -1006,9 +1006,9 @@ Used to specify the types of FPGA devices. For example, - #define CONFIG_FPGA CFG_XILINX_VIRTEX2 + #define CONFIG_FPGA CFG_XILINX_VIRTEX2 - CFG_FPGA_PROG_FEEDBACK + CFG_FPGA_PROG_FEEDBACK Enable printing of hash marks during FPGA configuration. @@ -1054,16 +1054,16 @@ - FPGA Support: CONFIG_FPGA_COUNT - Specify the number of FPGA devices to support. + Specify the number of FPGA devices to support. - CONFIG_FPGA + CONFIG_FPGA - Used to specify the types of FPGA devices. For example, - #define CONFIG_FPGA CFG_XILINX_VIRTEX2 + Used to specify the types of FPGA devices. For example, + #define CONFIG_FPGA CFG_XILINX_VIRTEX2 - CFG_FPGA_PROG_FEEDBACK + CFG_FPGA_PROG_FEEDBACK - Enable printing of hash marks during FPGA configuration. + Enable printing of hash marks during FPGA configuration. CFG_FPGA_CHECK_BUSY @@ -1205,13 +1205,13 @@ Note: - In the current implementation, the local variables - space and global environment variables space are - separated. Local variables are those you define by - simply typing `name=value'. To access a local - variable later on, you have write `$name' or - `${name}'; to execute the contents of a variable - directly type `$name' at the command prompt. + In the current implementation, the local variables + space and global environment variables space are + separated. Local variables are those you define by + simply typing `name=value'. To access a local + variable later on, you have write `$name' or + `${name}'; to execute the contents of a variable + directly type `$name' at the command prompt. Global environment variables are those you use setenv/printenv to work with. To run a command stored @@ -1253,9 +1253,9 @@ - DataFlash Support CONFIG_HAS_DATAFLASH - Defining this option enables DataFlash features and - allows to read/write in Dataflash via the standard - commands cp, md... + Defining this option enables DataFlash features and + allows to read/write in Dataflash via the standard + commands cp, md... - Show boot progress CONFIG_SHOW_BOOT_PROGRESS @@ -1349,8 +1349,6 @@ See also: doc/README.Modem - - Configuration Settings: ----------------------- @@ -1374,16 +1372,16 @@ List of legal baudrate settings for this board. - CFG_CONSOLE_INFO_QUIET - Suppress display of console information at boot. + Suppress display of console information at boot. - CFG_CONSOLE_IS_IN_ENV - If the board specific function - extern int overwrite_console (void); - returns 1, the stdin, stderr and stdout are switched to the + If the board specific function + extern int overwrite_console (void); + returns 1, the stdin, stderr and stdout are switched to the serial port, else the settings in the environment are used. - CFG_CONSOLE_OVERWRITE_ROUTINE - Enable the call to overwrite_console(). + Enable the call to overwrite_console(). - CFG_CONSOLE_ENV_OVERWRITE Enable overwrite of previous console environment settings. @@ -1393,7 +1391,7 @@ simple memory test. - CFG_ALT_MEMTEST: - Enable an alternate, more extensive memory test. + Enable an alternate, more extensive memory test. - CFG_TFTP_LOADADDR: Default load address for network file downloads @@ -1418,10 +1416,10 @@ CFG_FLASH_BASE when booting from flash. - CFG_MONITOR_LEN: - Size of memory reserved for monitor code, used to - determine _at_compile_time_ (!) if the environment is - embedded within the U-Boot image, or in a separate - flash sector. + Size of memory reserved for monitor code, used to + determine _at_compile_time_ (!) if the environment is + embedded within the U-Boot image, or in a separate + flash sector. - CFG_MALLOC_LEN: Size of DRAM reserved for malloc() use. @@ -1842,7 +1840,6 @@ etc. - Finally, type "make all", and you should get some working U-Boot images ready for downlod to / installation on your system: @@ -1906,7 +1903,6 @@ See also "U-Boot Porting Guide" below. - Monitor Commands - Overview: ============================ @@ -2029,13 +2025,13 @@ setenv initrd_high 00c00000 - If you set initrd_high to 0xFFFFFFFF, this is an - indication to U-Boot that all addresses are legal - for the Linux kernel, including addresses in flash - memory. In this case U-Boot will NOT COPY the - ramdisk at all. This may be useful to reduce the - boot time on your system, but requires that this - feature is supported by your Linux kernel. + If you set initrd_high to 0xFFFFFFFF, this is an + indication to U-Boot that all addresses are legal + for the Linux kernel, including addresses in flash + memory. In this case U-Boot will NOT COPY the + ramdisk at all. This may be useful to reduce the + boot time on your system, but requires that this + feature is supported by your Linux kernel. ipaddr - IP address; needed for tftpboot command @@ -2165,7 +2161,6 @@ is raised. - Image Formats: ============== @@ -2428,7 +2423,6 @@ Verifying Checksum ... OK - Boot Linux: ----------- @@ -2518,39 +2512,39 @@ U-Boot supports the following image types: "Standalone Programs" are directly runnable in the environment - provided by U-Boot; it is expected that (if they behave - well) you can continue to work in U-Boot after return from - the Standalone Program. + provided by U-Boot; it is expected that (if they behave + well) you can continue to work in U-Boot after return from + the Standalone Program. "OS Kernel Images" are usually images of some Embedded OS which - will take over control completely. Usually these programs - will install their own set of exception handlers, device - drivers, set up the MMU, etc. - this means, that you cannot - expect to re-enter U-Boot except by resetting the CPU. + will take over control completely. Usually these programs + will install their own set of exception handlers, device + drivers, set up the MMU, etc. - this means, that you cannot + expect to re-enter U-Boot except by resetting the CPU. "RAMDisk Images" are more or less just data blocks, and their - parameters (address, size) are passed to an OS kernel that is - being started. + parameters (address, size) are passed to an OS kernel that is + being started. "Multi-File Images" contain several images, typically an OS - (Linux) kernel image and one or more data images like - RAMDisks. This construct is useful for instance when you want - to boot over the network using BOOTP etc., where the boot - server provides just a single image file, but you want to get - for instance an OS kernel and a RAMDisk image. + (Linux) kernel image and one or more data images like + RAMDisks. This construct is useful for instance when you want + to boot over the network using BOOTP etc., where the boot + server provides just a single image file, but you want to get + for instance an OS kernel and a RAMDisk image. - "Multi-File Images" start with a list of image sizes, each - image size (in bytes) specified by an "uint32_t" in network - byte order. This list is terminated by an "(uint32_t)0". - Immediately after the terminating 0 follow the images, one by - one, all aligned on "uint32_t" boundaries (size rounded up to - a multiple of 4 bytes). + "Multi-File Images" start with a list of image sizes, each + image size (in bytes) specified by an "uint32_t" in network + byte order. This list is terminated by an "(uint32_t)0". + Immediately after the terminating 0 follow the images, one by + one, all aligned on "uint32_t" boundaries (size rounded up to + a multiple of 4 bytes). "Firmware Images" are binary images containing firmware (like - U-Boot or FPGA images) which usually will be programmed to - flash memory. + U-Boot or FPGA images) which usually will be programmed to + flash memory. "Script files" are command sequences that will be executed by - U-Boot's command interpreter; this feature is especially - useful when you configure U-Boot to use a real shell (hush) - as command interpreter. + U-Boot's command interpreter; this feature is especially + useful when you configure U-Boot to use a real shell (hush) + as command interpreter. Standalone HOWTO: @@ -2641,7 +2635,6 @@ [q, b, e, ?] ## Application terminated, rc = 0x0 - Minicom warning: ================ @@ -2813,7 +2806,6 @@ ==> U-Boot will use R8 to hold a pointer to the global data - Memory Management: ------------------ @@ -2959,7 +2951,6 @@ } - Coding Standards: ----------------- @@ -3016,7 +3007,7 @@ * Changesets that contain different, unrelated modifications shall be submitted as SEPARATE patches, one patch per changeset. - + Notes: diff --git a/board/LEOX/elpt860/Makefile b/board/LEOX/elpt860/Makefile index abca765..3e73163 100644 --- a/board/LEOX/elpt860/Makefile +++ b/board/LEOX/elpt860/Makefile @@ -1,3 +1,4 @@ + ####################################################################### # # Copyright (C) 2000, 2001, 2002, 2003 @@ -35,7 +36,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/LEOX/elpt860/README.LEOX b/board/LEOX/elpt860/README.LEOX index 9ace97b..23bc302 100644 --- a/board/LEOX/elpt860/README.LEOX +++ b/board/LEOX/elpt860/README.LEOX @@ -1,20 +1,20 @@ ============================================================================= - U-Boot port on the LEOX's ELPT860 CPU board - ------------------------------------------- + U-Boot port on the LEOX's ELPT860 CPU board + ------------------------------------------- LEOX.org is about the development of free hardware and software resources - for system on chip. + for system on chip. For more information, contact The LEOX team References: ~~~~~~~~~~ 1) Get the last stable release from denx.de: - o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2 + o ftp://ftp.denx.de/pub/u-boot/u-boot-0.2.0.tar.bz2 2) Get the current CVS snapshot: - o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login - o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot + o cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login + o cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot ============================================================================= @@ -42,7 +42,7 @@ ============================================================================= - U-Boot test results + U-Boot test results ============================================================================= @@ -54,7 +54,7 @@ U-Boot 0.2.2 (Jan 19 2003 - 11:08:39) CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present - *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** + *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** Board: ### No HW ID - assuming ELPT860 DRAM: 16 MB FLASH: 512 kB @@ -101,7 +101,7 @@ setenv - set environment variables sleep - delay execution for some time tftpboot- boot image via network using TFTP protocol - and env variables ipaddr and serverip + and env variables ipaddr and serverip version - print monitor version ? - alias for 'help' @@ -143,8 +143,8 @@ Bank # 1: AMD AM29F040 (4 Mbits) Size: 512 KB in 8 Sectors Sector Start Addresses: - 02000000 (RO) 02010000 (RO) 02020000 (RO) 02030000 (RO) 02040000 - 02050000 02060000 02070000 + 02000000 (RO) 02010000 (RO) 02020000 (RO) 02030000 (RO) 02040000 + 02050000 02060000 02070000 ################################################## # Board Information Structure @@ -177,7 +177,7 @@ U-Boot 0.2.2 (Jan 19 2003 - 11:08:39) CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present - *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** + *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** Board: ### No HW ID - assuming ELPT860 DRAM: 16 MB FLASH: 512 kB @@ -219,7 +219,7 @@ U-Boot 0.2.2 (Jan 19 2003 - 11:08:39) CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present - *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** + *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** Board: ### No HW ID - assuming ELPT860 DRAM: 16 MB FLASH: 512 kB @@ -237,7 +237,7 @@ Filename '/home/leox/uImage'. Load address: 0x400000 Loading: ################################################################# - ############################# + ############################# done Bytes transferred = 477294 (7486e hex) ## Booting image at 00400000 ... @@ -282,8 +282,8 @@ VFS: Mounted root (nfs filesystem). Freeing unused kernel memory: 44k init INIT: version 2.78 booting - Welcome to DENX Embedded Linux Environment - Press 'I' to enter interactive startup. + Welcome to DENX Embedded Linux Environment + Press 'I' to enter interactive startup. Mounting proc filesystem: [ OK ] Configuring kernel parameters: [ OK ] Cannot access the Hardware Clock via any known method. @@ -316,7 +316,7 @@ U-Boot 0.2.2 (Jan 19 2003 - 11:08:39) CPU: XPC860xxZPnnB at 50 MHz: 4 kB I-Cache 4 kB D-Cache FEC present - *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** + *** Warning: CPU Core has Silicon Bugs -- Check the Errata *** Board: ### No HW ID - assuming ELPT860 DRAM: 16 MB FLASH: 512 kB @@ -334,11 +334,11 @@ Filename '/home/leox/pMulti'. Load address: 0x400000 Loading: ################################################################# - ################################################################# - ################################################################# - ################################################################# - ################################################################# - ######################################################## + ################################################################# + ################################################################# + ################################################################# + ################################################################# + ######################################################## done Bytes transferred = 1947816 (1db8a8 hex) ## Booting image at 00400000 ... @@ -398,22 +398,22 @@ Password: Welcome to Linux-2.4.4 for ELPT CPU board (MPC860T @ 50MHz) - a8888b. - d888888b. - 8P"YP"Y88 + a8888b. + d888888b. + 8P"YP"Y88 _ _ 8|o||o|88 | | |_| 8' .88 | | _ ____ _ _ _ _ 8`._.' Y8. | | | | _ \| | | |\ \/ / d/ `8b. | |___ | | | | | |_| |/ \ .dP . Y8b. |_____||_|_| |_|\____|\_/\_/ d8:' " `::88b. - d8" `Y88b - :8P ' :888 - 8a. : _a88P - ._/"Yaa_ : .| 88P| - \ YP" `| 8P `. - / \._____.d| .' - `--..__)888888P`._.' + d8" `Y88b + :8P ' :888 + 8a. : _a88P + ._/"Yaa_ : .| 88P| + \ YP" `| 8P `. + / \._____.d| .' + `--..__)888888P`._.' login[21]: root login on `ttyS0' diff --git a/board/LEOX/elpt860/elpt860.c b/board/LEOX/elpt860/elpt860.c index 2564546..254497f 100644 --- a/board/LEOX/elpt860/elpt860.c +++ b/board/LEOX/elpt860/elpt860.c @@ -95,7 +95,7 @@ /* * Single Read. (Offset 0 in UPMA RAM) */ - 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04, + 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04, 0xFF0FFC00, /* last */ /* * SDRAM Initialization (offset 5 in UPMA RAM) @@ -109,28 +109,28 @@ /* * Burst Read. (Offset 8 in UPMA RAM) */ - 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04, + 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF3C04, 0xF00FFC00, 0xF00FFC00, 0xF00FFC00, 0xFF0FFC00, - 0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04, + 0x0FFCCC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */ /* * Single Write. (Offset 18 in UPMA RAM) */ - 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF0C00, + 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC04, 0x00AF0C00, 0xFF0FFC04, 0x0FFCCC04, 0xFFAFFC05, /* last */ - _NOT_USED_, + _NOT_USED_, /* * Burst Write. (Offset 20 in UPMA RAM) */ - 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC00, 0x00AF0C00, - 0xF00FFC00, 0xF00FFC00, 0xF00FFC04, 0x0FFCCC04, - 0xFFAFFC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04, + 0x0F0FFC24, 0x0F0CFC04, 0xFF0FFC00, 0x00AF0C00, + 0xF00FFC00, 0xF00FFC00, 0xF00FFC04, 0x0FFCCC04, + 0xFFAFFC04, 0xFFAFFC05, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */ /* * Refresh (Offset 30 in UPMA RAM) */ - 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, - 0xFFFFFC05, 0xFFFFFC04, 0xFFFFFC05, _NOT_USED_, + 0x0FFC3C04, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, + 0xFFFFFC05, 0xFFFFFC04, 0xFFFFFC05, _NOT_USED_, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, 0xFFAFFC04, /* last */ /* * Exception. (Offset 3c in UPMA RAM) @@ -152,8 +152,8 @@ { volatile immap_t *immr = (immap_t *) CFG_IMMR; - /* - * Light up the red led on ELPT860 pcb (DS1) (PCDAT) + /* + * Light up the red led on ELPT860 pcb (DS1) (PCDAT) */ immr->im_ioport.iop_pcdat &= ~CFG_DS1; /* PCDAT (DS1 = 0) */ immr->im_ioport.iop_pcpar &= ~CFG_DS1; /* PCPAR (0=general purpose I/O) */ @@ -170,20 +170,20 @@ * Return 1 if no second DRAM bank, otherwise returns 0 */ -int +int checkboard (void) { unsigned char *s = getenv("serial#"); if ( !s || strncmp(s, "ELPT860", 7) ) printf ("### No HW ID - assuming ELPT860\n"); - + return ( 0 ); /* success */ } /* ------------------------------------------------------------------------- */ -long int +long int initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; @@ -194,7 +194,7 @@ /* * This sequence initializes SDRAM chips on ELPT860 board */ - upmconfig(UPMA, (uint *)init_sdram_table, + upmconfig(UPMA, (uint *)init_sdram_table, sizeof(init_sdram_table)/sizeof(uint)); memctl->memc_mptpr = 0x0200; @@ -203,7 +203,7 @@ memctl->memc_mar = 0x00000088; memctl->memc_mcr = 0x80002000; /* CS1: SDRAM bank 0 */ - upmconfig(UPMA, (uint *)sdram_table, + upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint)); /* @@ -257,8 +257,8 @@ * * try 8 column mode */ - size8 = dram_size (CFG_MAMR_8COL, - (ulong *) SDRAM_BASE1_PRELIM, + size8 = dram_size (CFG_MAMR_8COL, + (ulong *) SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE); udelay (1000); @@ -266,15 +266,15 @@ /* * try 9 column mode */ - size9 = dram_size (CFG_MAMR_9COL, - (ulong *) SDRAM_BASE1_PRELIM, + size9 = dram_size (CFG_MAMR_9COL, + (ulong *) SDRAM_BASE1_PRELIM, SDRAM_MAX_SIZE); if ( size8 < size9 ) /* leave configuration at 9 columns */ { size_b0 = size9; /* debug ("SDRAM Bank 0 in 9 column mode: %ld MB\n", size >> 20); */ - } + } else /* back to 8 columns */ { size_b0 = size8; @@ -282,14 +282,14 @@ udelay (500); /* debug ("SDRAM Bank 0 in 8 column mode: %ld MB\n", size >> 20); */ } - + udelay (1000); /* * Adjust refresh rate depending on SDRAM type, both banks * For types > 128 MBit leave it at the current (fast) rate */ - if ( size_b0 < 0x02000000 ) + if ( size_b0 < 0x02000000 ) { /* reduce to 15.6 us (62.4 us / quad) */ memctl->memc_mptpr = CFG_MPTPR_2BK_4K; @@ -304,7 +304,7 @@ { unsigned long reg; - + /* adjust refresh rate depending on SDRAM type, one bank */ reg = memctl->memc_mptpr; reg >>= 1; /* reduce to CFG_MPTPR_1BK_8K / _4K */ @@ -312,7 +312,7 @@ } udelay(10000); - + return (size_b0); } @@ -326,9 +326,9 @@ * - short between data lines */ -static long int -dram_size (long int mamr_value, - long int *base, +static long int +dram_size (long int mamr_value, + long int *base, long int maxsize) { volatile immap_t *immap = (immap_t *)CFG_IMMR; @@ -337,38 +337,38 @@ ulong cnt, val; ulong save[32]; /* to make test non-destructive */ unsigned char i = 0; - + memctl->memc_mamr = mamr_value; - - for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) + + for (cnt = maxsize/sizeof(long); cnt > 0; cnt >>= 1) { addr = base + cnt; /* pointer arith! */ - + save[i++] = *addr; *addr = ~cnt; } - + /* write 0 to base address */ addr = base; save[i] = *addr; *addr = 0; - + /* check at base address */ - if ( (val = *addr) != 0 ) + if ( (val = *addr) != 0 ) { *addr = save[i]; return (0); } - - for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1) + + for (cnt = 1; cnt <= maxsize/sizeof(long); cnt <<= 1) { addr = base + cnt; /* pointer arith! */ - + val = *addr; *addr = save[--i]; - - if ( val != (~cnt) ) + + if ( val != (~cnt) ) { return (cnt * sizeof(long)); } @@ -388,7 +388,7 @@ reset_phy (void) { volatile immap_t *immr = (immap_t *) CFG_IMMR; - + /* * Ensure LBK LXT901 ethernet 1 & 2 = 0 ... for normal loopback in effect * and no AUI loopback diff --git a/board/LEOX/elpt860/flash.c b/board/LEOX/elpt860/flash.c index 7107aaa..c1b3b85 100644 --- a/board/LEOX/elpt860/flash.c +++ b/board/LEOX/elpt860/flash.c @@ -79,41 +79,41 @@ /*----------------------------------------------------------------------- */ -unsigned long +unsigned long flash_init (void) { volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; unsigned long size_b0; int i; - + /* Init: no FLASHes known */ - for (i=0; imemc_or0 = CFG_OR_TIMING_FLASH | (-size_b0 & OR_AM_MSK); memctl->memc_br0 = (CFG_FLASH_BASE & BR_BA_MSK) | BR_MS_GPCM | BR_PS_8 | BR_V; - + /* Re-do sizing to get full correct info */ - size_b0 = flash_get_size ((volatile unsigned char *)CFG_FLASH_BASE, + size_b0 = flash_get_size ((volatile unsigned char *)CFG_FLASH_BASE, &flash_info[0]); - + flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); - + #if CFG_MONITOR_BASE >= CFG_FLASH_BASE /* monitor protection ON by default */ flash_protect (FLAG_PROTECT_SET, @@ -121,7 +121,7 @@ CFG_MONITOR_BASE + monitor_flash_len-1, &flash_info[0]); #endif - + #ifdef CFG_ENV_IS_IN_FLASH /* ENV protection ON by default */ flash_protect(FLAG_PROTECT_SET, @@ -131,14 +131,14 @@ #endif flash_info[0].size = size_b0; - + return (size_b0); } /*----------------------------------------------------------------------- */ -static void -flash_get_offsets (ulong base, +static void +flash_get_offsets (ulong base, flash_info_t *info) { int i; @@ -146,7 +146,7 @@ #define SECTOR_64KB 0x00010000 /* set up sector start adress table */ - for (i = 0; i < info->sector_count; i++) + for (i = 0; i < info->sector_count; i++) { info->start[i] = base + (i * SECTOR_64KB); } @@ -154,38 +154,38 @@ /*----------------------------------------------------------------------- */ -void +void flash_print_info (flash_info_t *info) { int i; - - if ( info->flash_id == FLASH_UNKNOWN ) + + if ( info->flash_id == FLASH_UNKNOWN ) { printf ("missing or unknown FLASH type\n"); return; } - switch ( info->flash_id & FLASH_VENDMASK ) + switch ( info->flash_id & FLASH_VENDMASK ) { case FLASH_MAN_AMD: printf ("AMD "); break; case FLASH_MAN_FUJ: printf ("FUJITSU "); break; case FLASH_MAN_STM: printf ("STM (Thomson) "); break; default: printf ("Unknown Vendor "); break; } - - switch ( info->flash_id & FLASH_TYPEMASK ) + + switch ( info->flash_id & FLASH_TYPEMASK ) { case FLASH_AM040: printf ("AM29F040 (4 Mbits)\n"); break; default: printf ("Unknown Chip Type\n"); break; } - - printf (" Size: %ld KB in %d Sectors\n", + + printf (" Size: %ld KB in %d Sectors\n", info->size >> 10, info->sector_count); - + printf (" Sector Start Addresses:"); - for (i=0; isector_count; ++i) + for (i=0; isector_count; ++i) { if ((i % 5) == 0) printf ("\n "); @@ -210,9 +210,9 @@ * The following code cannot be run from FLASH! */ -static ulong -flash_get_size (volatile unsigned char *addr, - flash_info_t *info) +static ulong +flash_get_size (volatile unsigned char *addr, + flash_info_t *info) { short i; uchar value; @@ -222,10 +222,10 @@ addr[0x0555] = 0xAA; addr[0x02AA] = 0x55; addr[0x0555] = 0x90; - + value = addr[0]; - switch ( value ) + switch ( value ) { /* case AMD_MANUFACT: */ case 0x01: @@ -246,10 +246,10 @@ info->size = 0; return (0); /* no or unknown flash */ } - + value = addr[1]; /* device ID */ - - switch ( value ) + + switch ( value ) { case STM_ID_F040B: case AMD_ID_F040B: @@ -264,13 +264,13 @@ } /* set up sector start adress table */ - for (i = 0; i < info->sector_count; i++) + for (i = 0; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00010000); } - + /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) + for (i = 0; i < info->sector_count; i++) { /* read sector protection at sector address, (A7 .. A0) = 0x02 */ /* D0 = 1 if protected */ @@ -281,13 +281,13 @@ /* * Prevent writes to uninitialized FLASH. */ - if ( info->flash_id != FLASH_UNKNOWN ) + if ( info->flash_id != FLASH_UNKNOWN ) { addr = (volatile unsigned char *)info->start[0]; - + *addr = 0xF0; /* reset bank */ } - + return (info->size); } @@ -296,21 +296,21 @@ */ int -flash_erase (flash_info_t *info, - int s_first, +flash_erase (flash_info_t *info, + int s_first, int s_last) { volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]); int flag, prot, sect, l_sect; ulong start, now, last; - - if ( (s_first < 0) || (s_first > s_last) ) + + if ( (s_first < 0) || (s_first > s_last) ) { - if ( info->flash_id == FLASH_UNKNOWN ) + if ( info->flash_id == FLASH_UNKNOWN ) { printf ("- missing\n"); - } - else + } + else { printf ("- no sectors to erase\n"); } @@ -318,44 +318,44 @@ } if ( (info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > FLASH_AMD_COMP) ) + (info->flash_id > FLASH_AMD_COMP) ) { printf ("Can't erase unknown flash type %08lx - aborted\n", info->flash_id); return ( 1 ); } - + prot = 0; - for (sect=s_first; sect<=s_last; ++sect) + for (sect=s_first; sect<=s_last; ++sect) { - if ( info->protect[sect] ) + if ( info->protect[sect] ) { prot++; } } - - if ( prot ) + + if ( prot ) { printf ("- Warning: %d protected sectors will not be erased!\n", prot); - } - else + } + else { printf ("\n"); } - + l_sect = -1; - + /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - + addr[0x0555] = 0xAA; addr[0x02AA] = 0x55; addr[0x0555] = 0x80; addr[0x0555] = 0xAA; addr[0x02AA] = 0x55; - + /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) + for (sect = s_first; sect<=s_last; sect++) { if (info->protect[sect] == 0) /* not protected */ { @@ -364,26 +364,26 @@ l_sect = sect; } } - + /* re-enable interrupts if necessary */ if ( flag ) enable_interrupts(); - + /* wait at least 80us - let's wait 1 ms */ udelay (1000); - + /* * We wait for the last triggered sector */ if ( l_sect < 0 ) goto DONE; - + start = get_timer (0); last = start; addr = (volatile unsigned char *)(info->start[l_sect]); - while ( (addr[0] & 0x80) != 0x80 ) + while ( (addr[0] & 0x80) != 0x80 ) { - if ( (now = get_timer(start)) > CFG_FLASH_ERASE_TOUT ) + if ( (now = get_timer(start)) > CFG_FLASH_ERASE_TOUT ) { printf ("Timeout\n"); return ( 1 ); @@ -395,14 +395,14 @@ last = now; } } - + DONE: /* reset to read mode */ addr = (volatile unsigned char *)info->start[0]; addr[0] = 0xF0; /* reset bank */ - + printf (" done\n"); - + return ( 0 ); } @@ -413,10 +413,10 @@ * 2 - Flash not erased */ -int -write_buff (flash_info_t *info, - uchar *src, - ulong addr, +int +write_buff (flash_info_t *info, + uchar *src, + ulong addr, ulong cnt) { ulong cp, wp, data; @@ -428,16 +428,16 @@ /* Width of the data bus: 8 bits */ wp = addr; - + while ( cnt ) { bdata = *src++; - + if ( (rc = write_byte(info, wp, bdata)) != 0 ) { return (rc); } - + ++wp; --cnt; } @@ -449,72 +449,72 @@ /* Width of the data bus: 32 bits */ wp = (addr & ~3); /* get lower word aligned address */ - + /* * handle unaligned start bytes */ - if ( (l = addr - wp) != 0 ) + if ( (l = addr - wp) != 0 ) { data = 0; - for (i=0, cp=wp; i0; ++i) + for (; i<4 && cnt>0; ++i) { data = (data << 8) | *src++; --cnt; ++cp; } - for (; cnt==0 && i<4; ++i, ++cp) + for (; cnt==0 && i<4; ++i, ++cp) { data = (data << 8) | (*(uchar *)cp); } - - if ( (rc = write_word(info, wp, data)) != 0 ) + + if ( (rc = write_word(info, wp, data)) != 0 ) { return (rc); } wp += 4; } - + /* * handle word aligned part */ - while ( cnt >= 4 ) + while ( cnt >= 4 ) { data = 0; - for (i=0; i<4; ++i) + for (i=0; i<4; ++i) { data = (data << 8) | *src++; } - if ( (rc = write_word(info, wp, data)) != 0 ) + if ( (rc = write_word(info, wp, data)) != 0 ) { return (rc); } wp += 4; cnt -= 4; } - - if ( cnt == 0 ) + + if ( cnt == 0 ) { return (0); } - + /* * handle unaligned tail bytes */ data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) + for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { data = (data << 8) | *src++; --cnt; } - for (; i<4; ++i, ++cp) + for (; i<4; ++i, ++cp) { data = (data << 8) | (*(uchar *)cp); } - + return (write_word(info, wp, data)); } } @@ -525,38 +525,38 @@ * 1 - write timeout * 2 - Flash not erased */ -static int -write_word (flash_info_t *info, - ulong dest, +static int +write_word (flash_info_t *info, + ulong dest, ulong data) { vu_long *addr = (vu_long*)(info->start[0]); ulong start; int flag; - + /* Check if Flash is (sufficiently) erased */ - if ( (*((vu_long *)dest) & data) != data ) + if ( (*((vu_long *)dest) & data) != data ) { return (2); } /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - + addr[0x0555] = 0x00AA00AA; addr[0x02AA] = 0x00550055; addr[0x0555] = 0x00A000A0; - + *((vu_long *)dest) = data; - + /* re-enable interrupts if necessary */ if ( flag ) enable_interrupts(); /* data polling for D7 */ start = get_timer (0); - while ( (*((vu_long *)dest) & 0x00800080) != (data & 0x00800080) ) + while ( (*((vu_long *)dest) & 0x00800080) != (data & 0x00800080) ) { - if ( get_timer(start) > CFG_FLASH_WRITE_TOUT ) + if ( get_timer(start) > CFG_FLASH_WRITE_TOUT ) { return (1); } @@ -571,38 +571,38 @@ * 1 - write timeout * 2 - Flash not erased */ -static int -write_byte (flash_info_t *info, - ulong dest, +static int +write_byte (flash_info_t *info, + ulong dest, uchar data) { volatile unsigned char *addr = (volatile unsigned char *)(info->start[0]); ulong start; int flag; - + /* Check if Flash is (sufficiently) erased */ - if ( (*((volatile unsigned char *)dest) & data) != data ) + if ( (*((volatile unsigned char *)dest) & data) != data ) { return (2); } /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - + addr[0x0555] = 0xAA; addr[0x02AA] = 0x55; addr[0x0555] = 0xA0; - + *((volatile unsigned char *)dest) = data; - + /* re-enable interrupts if necessary */ if ( flag ) enable_interrupts(); /* data polling for D7 */ start = get_timer (0); - while ( (*((volatile unsigned char *)dest) & 0x80) != (data & 0x80) ) + while ( (*((volatile unsigned char *)dest) & 0x80) != (data & 0x80) ) { - if ( get_timer(start) > CFG_FLASH_WRITE_TOUT ) + if ( get_timer(start) > CFG_FLASH_WRITE_TOUT ) { return (1); } diff --git a/board/LEOX/elpt860/u-boot.lds b/board/LEOX/elpt860/u-boot.lds index cecb210..d23af96 100644 --- a/board/LEOX/elpt860/u-boot.lds +++ b/board/LEOX/elpt860/u-boot.lds @@ -123,6 +123,10 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/LEOX/elpt860/u-boot.lds.debug b/board/LEOX/elpt860/u-boot.lds.debug index b81235f..269e8d9 100644 --- a/board/LEOX/elpt860/u-boot.lds.debug +++ b/board/LEOX/elpt860/u-boot.lds.debug @@ -137,4 +137,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c index 1d6ca81..0934e1b 100644 --- a/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c +++ b/board/MAI/AmigaOneG3SE/AmigaOneG3SE.c @@ -30,47 +30,47 @@ #include "via686.h" __asm(" .globl send_kb \n - send_kb: \n - lis r9, 0xfe00 \n - \n - li r4, 0x10 # retries \n - mtctr r4 \n - \n - idle: \n - lbz r4, 0x64(r9) \n - andi. r4, r4, 0x02 \n - bne idle \n - \n - ready: \n - stb r3, 0x60(r9) \n - \n - check: \n - lbz r4, 0x64(r9) \n - andi. r4, r4, 0x01 \n - beq check \n - \n - lbz r4, 0x60(r9) \n - cmpwi r4, 0xfa \n - beq done \n - \n - bdnz idle \n - \n - li r3, 0 \n - blr \n - \n - done: \n - li r3, 1 \n - blr \n - \n - .globl test_kb \n - test_kb: \n - mflr r10 \n - li r3, 0xed \n - bl send_kb \n - li r3, 0x01 \n - bl send_kb \n - mtlr r10 \n - blr \n + send_kb: \n + lis r9, 0xfe00 \n + \n + li r4, 0x10 # retries \n + mtctr r4 \n + \n + idle: \n + lbz r4, 0x64(r9) \n + andi. r4, r4, 0x02 \n + bne idle \n + \n + ready: \n + stb r3, 0x60(r9) \n + \n + check: \n + lbz r4, 0x64(r9) \n + andi. r4, r4, 0x01 \n + beq check \n + \n + lbz r4, 0x60(r9) \n + cmpwi r4, 0xfa \n + beq done \n + \n + bdnz idle \n + \n + li r3, 0 \n + blr \n + \n + done: \n + li r3, 1 \n + blr \n + \n + .globl test_kb \n + test_kb: \n + mflr r10 \n + li r3, 0xed \n + bl send_kb \n + li r3, 0x01 \n + bl send_kb \n + mtlr r10 \n + blr \n "); @@ -86,7 +86,6 @@ } - void after_reloc (ulong dest_addr, gd_t *gd) { /* HJF: DECLARE_GLOBAL_DATA_PTR; */ diff --git a/board/MAI/AmigaOneG3SE/Makefile b/board/MAI/AmigaOneG3SE/Makefile index 785f01f..b1247fe 100644 --- a/board/MAI/AmigaOneG3SE/Makefile +++ b/board/MAI/AmigaOneG3SE/Makefile @@ -33,14 +33,14 @@ AOBJS = board_asm_init.o memio.o -OBJS = $(COBJS) $(AOBJS) +OBJS = $(COBJS) $(AOBJS) EMUDIR = ../bios_emulator/scitech/src/x86emu/ EMUOBJ = $(EMUDIR)decode.o $(EMUDIR)ops2.o $(EMUDIR)fpu.o $(EMUDIR)prim_ops.o \ $(EMUDIR)ops.o $(EMUDIR)sys.o EMUSRC = $(EMUOBJ:.o=.c) -$(LIB): .depend $(OBJS) $(EMUSRC) +$(LIB): .depend $(OBJS) $(EMUSRC) make libx86emu.a -C ../bios_emulator/scitech/src/x86emu -f makefile.uboot CROSS_COMPILE=$(CROSS_COMPILE) -rm $(LIB) $(AR) crv $@ $(OBJS) $(EMUOBJ) diff --git a/board/MAI/AmigaOneG3SE/articiaS.c b/board/MAI/AmigaOneG3SE/articiaS.c index 5eddfc6..9fd6b95 100644 --- a/board/MAI/AmigaOneG3SE/articiaS.c +++ b/board/MAI/AmigaOneG3SE/articiaS.c @@ -1,6 +1,6 @@ /* * (C) Copyright 2002 - * Hyperion Entertainment, ThomasF@hyperion-entertainment.com + * Hyperion Entertainment, ThomasF@hyperion-entertainment.com * * See file CREDITS for list of people who contributed to this * project. @@ -572,7 +572,7 @@ if (banks[3].used) burst_support = banks[3].burst_len; - /* + /* ** Mode register: ** Bits Use ** 0-2 Burst len diff --git a/board/MAI/AmigaOneG3SE/articiaS.h b/board/MAI/AmigaOneG3SE/articiaS.h index 158d70a..ce20d03 100644 --- a/board/MAI/AmigaOneG3SE/articiaS.h +++ b/board/MAI/AmigaOneG3SE/articiaS.h @@ -99,14 +99,14 @@ #define XDBCR_HWTOXD (1<<0) #define XDBCR_KBTOXD (1<<1) #define XDBCR_RTCTOXD (1<<2) -#define XDBCR_SCALE_1_1 (0x0<<3) -#define XDBCR_SCALE_2_2 (0x1<<3) -#define XDBCR_SCALE_3_2 (0x2<<3) -#define XDBCR_SCALE_4_4 (0x3<<3) -#define XDBCR_SCALE_5_8 (0x4<<3) -#define XDBCR_SCALE_6_8 (0x5<<3) -#define XDBCR_SCALE_8_8 (0x6<<3) -#define XDBCR_SCALE_0_16 (0x7<<3) +#define XDBCR_SCALE_1_1 (0x0<<3) +#define XDBCR_SCALE_2_2 (0x1<<3) +#define XDBCR_SCALE_3_2 (0x2<<3) +#define XDBCR_SCALE_4_4 (0x3<<3) +#define XDBCR_SCALE_5_8 (0x4<<3) +#define XDBCR_SCALE_6_8 (0x5<<3) +#define XDBCR_SCALE_8_8 (0x6<<3) +#define XDBCR_SCALE_0_16 (0x7<<3) #define XDBCR_XDPROM (1<<7) @@ -134,7 +134,6 @@ #define ARTICIAS_ISAIO_PHYS 0xfe002000 - /* Prototypes */ long articiaS_ram_init(void); void articiaS_pci_init(void); diff --git a/board/MAI/AmigaOneG3SE/articiaS_pci.c b/board/MAI/AmigaOneG3SE/articiaS_pci.c index 2a7763d..d2e9f29 100644 --- a/board/MAI/AmigaOneG3SE/articiaS_pci.c +++ b/board/MAI/AmigaOneG3SE/articiaS_pci.c @@ -123,14 +123,14 @@ { { 0, 0, 0, 0xff}, /* Articia S host bridge */ { 0, 1, 0, 0xff}, /* Articia S AGP bridge */ -// { 0, 6, 0, 0x05}, /* 3COM ethernet */ +/* { 0, 6, 0, 0x05}, /###* 3COM ethernet */ { 0, 7, 0, 0xff}, /* VIA southbridge */ { 0, 7, 1, 0x0e}, /* IDE controller in legacy mode */ -// { 0, 7, 2, 0x05}, /* First USB controller */ -// { 0, 7, 3, 0x0c}, /* Second USB controller (shares interrupt with ethernet) */ +/* { 0, 7, 2, 0x05}, /###* First USB controller */ +/* { 0, 7, 3, 0x0c}, /###* Second USB controller (shares interrupt with ethernet) */ { 0, 7, 4, 0xff}, /* ACPI Power Management */ -// { 0, 7, 5, 0x08}, /* AC97 */ -// { 0, 7, 6, 0x08}, /* MC97 */ +/* { 0, 7, 5, 0x08}, /###* AC97 */ +/* { 0, 7, 6, 0x08}, /###* MC97 */ { 0xff, 0xff, 0xff, 0xff} }; @@ -287,7 +287,7 @@ PRINTF("atriciaS_pci_init\n"); - // Why aren't these relocated?? + /* Why aren't these relocated?? */ for (i=0; config_table[i].config_device; i++) { switch((int)config_table[i].config_device) @@ -335,7 +335,6 @@ PCI_REGION_IO); - articiaS_hose.region_count = 4; pci_setup_indirect(&articiaS_hose, ARTICIAS_PCI_CFGADDR, ARTICIAS_PCI_CFGDATA); @@ -410,8 +409,8 @@ pci_hose_read_config_byte(hose, dev, 0x0B, &c1); pci_hose_read_config_byte(hose, dev, 0x0A, &c2); class = c1<<8 | c2; - //printf("At %02x:%02x:%02x: class %x\n", - // PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); + /*printf("At %02x:%02x:%02x: class %x\n", */ + /* PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev), class); */ if (class == find_class) { if (index == 0) @@ -441,7 +440,7 @@ if (hose == NULL) hose = &articiaS_hose; - if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; // Not in range + if (busnr < hose->first_busno || busnr > hose->last_busno) return PCI_ANY_ID; /* Not in range */ /* * The bridge must be on a lower bus number @@ -467,7 +466,7 @@ if (!PCI_FUNC(dev)) found_multi = header_type & 0x80; - if (header_type == 1) // Bridge device header + if (header_type == 1) /* Bridge device header */ { pci_hose_read_config_byte(hose, dev, PCI_SECONDARY_BUS, &secondary_bus); if ((int)secondary_bus == busnr) return dev; @@ -512,7 +511,7 @@ PRINTF("Searching for class 0x%x on bus %d\n", classes[classnr], busnr); /* Find the first of this class on this bus */ dev = pci_hose_find_class(&articiaS_hose, busnr, classes[classnr], 0); - if (dev != ~0) + if (dev != ~0) { PRINTF("Found VGA Card at %02x:%02x:%02x\n", PCI_BUS(dev), PCI_DEV(dev), PCI_FUNC(dev)); break; diff --git a/board/MAI/AmigaOneG3SE/board_asm_init.S b/board/MAI/AmigaOneG3SE/board_asm_init.S index a421c5d..086b19c 100644 --- a/board/MAI/AmigaOneG3SE/board_asm_init.S +++ b/board/MAI/AmigaOneG3SE/board_asm_init.S @@ -1,14 +1,13 @@ - #include "macros.h" - - +#include "macros.h" -#define GLOBALINFO0 0x50 + +#define GLOBALINFO0 0x50 #define GLOBALINFO0_BO (1<<7) #define GLOBALINFO2_B1ARBITER (1<<6) #define HBUSACR0 0x5c #define HBUSACR2_BURST (1<<0) #define HBUSACR2_LAT (1<<1) - + #define RECEIVER_HOLDING 0 #define TRANSMITTER_HOLDING 0 #define INTERRUPT_ENABLE 1 @@ -35,9 +34,9 @@ #define SUPERIO_1 ((7 << 3) | (0)) #define SUPERIO_2 ((7 << 3) | (1)) - + .globl board_asm_init - + board_asm_init: mflr r29 /* Set 'Must-set' register */ @@ -77,7 +76,7 @@ li r5, 0x47 bl pci_write_cfg_byte*/ - + /* Enable NVRAM for environment */ li r3, 0 li r4, 0 @@ -91,7 +90,7 @@ siowb 0x40, 0x08 siowb 0x41, 0x01 siowb 0x45, 0x80 - siowb 0x46, 0x60 + siowb 0x46, 0x60 siowb 0x47, 0x20 siowb 0x48, 0x01 siowb 0x4a, 0xc4 @@ -103,7 +102,7 @@ siowb 0x56, 0x99 siowb 0x57, 0x90 siowb 0x85, 0x01 - + /* Enable configuration mode for SuperIO */ li r3, 0 li r4, (7<<3) @@ -128,7 +127,7 @@ ori r3, r3, 0x0c outb 0x3f0, 0xe2 outbr 0x3f1, r3 - + /* Disable configuration mode */ li r3, 0 li r4, (7<<3) @@ -145,7 +144,7 @@ mtlr r29 blr - + .globl new_reset .globl new_reset_end new_reset: @@ -153,5 +152,5 @@ oris r0, r0, 0xFFF0 mtlr r0 blr - -new_reset_end: \ No newline at end of file + +new_reset_end: diff --git a/board/MAI/AmigaOneG3SE/cmd_boota.c b/board/MAI/AmigaOneG3SE/cmd_boota.c index 140aaff..db1ecfc 100644 --- a/board/MAI/AmigaOneG3SE/cmd_boota.c +++ b/board/MAI/AmigaOneG3SE/cmd_boota.c @@ -1,6 +1,5 @@ #include #include -#include #include "../disk/part_amiga.h" #include @@ -121,3 +120,10 @@ return 0; } +#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP) +cmd_tbl_t U_BOOT_CMD(BOOTA) = MK_CMD_ENTRY( + "boota", 3, 1, do_boota, + "boota - boot an Amiga kernel\n", + "address disk" +); +#endif /* _CMD_BOOTA_H */ diff --git a/board/MAI/AmigaOneG3SE/config.mk b/board/MAI/AmigaOneG3SE/config.mk index d7d0e6b..930a793 100644 --- a/board/MAI/AmigaOneG3SE/config.mk +++ b/board/MAI/AmigaOneG3SE/config.mk @@ -29,5 +29,4 @@ TEXT_BASE = 0xfff00000 -PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG - +PLATFORM_CPPFLAGS += -DTEXT_BASE=$(TEXT_BASE) -Wa,-mregnames -DEASTEREGG $(X86EMU) -Dprintk=printf #-DDEBUG diff --git a/board/MAI/AmigaOneG3SE/enet.c b/board/MAI/AmigaOneG3SE/enet.c index 0aaa8bf..d4be889 100644 --- a/board/MAI/AmigaOneG3SE/enet.c +++ b/board/MAI/AmigaOneG3SE/enet.c @@ -36,45 +36,45 @@ /* 3Com Ethernet PCI definitions*/ -// #define PCI_VENDOR_ID_3COM 0x10B7 +/* #define PCI_VENDOR_ID_3COM 0x10B7 */ #define PCI_DEVICE_ID_3COM_3C905C 0x9200 /* 3Com Commands, top 5 bits are command and bottom 11 bits are parameters */ -#define TotalReset (0<<11) +#define TotalReset (0<<11) #define SelectWindow (1<<11) #define StartCoax (2<<11) -#define RxDisable (3<<11) -#define RxEnable (4<<11) +#define RxDisable (3<<11) +#define RxEnable (4<<11) #define RxReset (5<<11) -#define UpStall (6<<11) +#define UpStall (6<<11) #define UpUnstall (6<<11)+1 -#define DownStall (6<<11)+2 +#define DownStall (6<<11)+2 #define DownUnstall (6<<11)+3 #define RxDiscard (8<<11) #define TxEnable (9<<11) -#define TxDisable (10<<11) +#define TxDisable (10<<11) #define TxReset (11<<11) -#define FakeIntr (12<<11) -#define AckIntr (13<<11) +#define FakeIntr (12<<11) +#define AckIntr (13<<11) #define SetIntrEnb (14<<11) -#define SetStatusEnb (15<<11) +#define SetStatusEnb (15<<11) #define SetRxFilter (16<<11) #define SetRxThreshold (17<<11) -#define SetTxThreshold (18<<11) +#define SetTxThreshold (18<<11) #define SetTxStart (19<<11) #define StartDMAUp (20<<11) #define StartDMADown (20<<11)+1 #define StatsEnable (21<<11) -#define StatsDisable (22<<11) +#define StatsDisable (22<<11) #define StopCoax (23<<11) #define SetFilterBit (25<<11) /* The SetRxFilter command accepts the following classes */ -#define RxStation 1 -#define RxMulticast 2 -#define RxBroadcast 4 +#define RxStation 1 +#define RxMulticast 2 +#define RxBroadcast 4 #define RxProm 8 /* 3Com status word defnitions */ @@ -83,12 +83,12 @@ #define HostError 0x0002 #define TxComplete 0x0004 #define TxAvailable 0x0008 -#define RxComplete 0x0010 +#define RxComplete 0x0010 #define RxEarly 0x0020 #define IntReq 0x0040 #define StatsFull 0x0080 #define DMADone (1<<8) -#define DownComplete (1<<9) +#define DownComplete (1<<9) #define UpComplete (1<<10) #define DMAInProgress (1<<11) /* DMA controller is still busy.*/ #define CmdInProgress (1<<12) /* EL3_CMD is still busy.*/ @@ -114,31 +114,31 @@ /* EEPROM locations. */ -#define PhysAddr01 0 +#define PhysAddr01 0 #define PhysAddr23 1 -#define PhysAddr45 2 +#define PhysAddr45 2 #define ModelID 3 -#define EtherLink3ID 7 -#define IFXcvrIO 8 +#define EtherLink3ID 7 +#define IFXcvrIO 8 #define IRQLine 9 -#define NodeAddr01 10 -#define NodeAddr23 11 +#define NodeAddr01 10 +#define NodeAddr23 11 #define NodeAddr45 12 -#define DriverTune 13 +#define DriverTune 13 #define Checksum 15 /* Register window 1 offsets, the window used in normal operation */ -#define TX_FIFO 0x10 -#define RX_FIFO 0x10 +#define TX_FIFO 0x10 +#define RX_FIFO 0x10 #define RxErrors 0x14 -#define RxStatus 0x18 -#define Timer 0x1A +#define RxStatus 0x18 +#define Timer 0x1A #define TxStatus 0x1B #define TxFree 0x1C /* Remaining free bytes in Tx buffer. */ /* Register Window 2 */ - + #define Wn2_ResetOptions 12 /* Register Window 3: MAC/config bits */ @@ -148,11 +148,11 @@ #define Wn3_Options 8 #define BFEXT(value, offset, bitcount) \ - ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1)) + ((((unsigned long)(value)) >> (offset)) & ((1 << (bitcount)) - 1)) #define BFINS(lhs, rhs, offset, bitcount) \ - (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \ - (((rhs) & ((1 << (bitcount)) - 1)) << (offset))) + (((lhs) & ~((((1 << (bitcount)) - 1)) << (offset))) | \ + (((rhs) & ((1 << (bitcount)) - 1)) << (offset))) #define RAM_SIZE(v) BFEXT(v, 0, 3) #define RAM_WIDTH(v) BFEXT(v, 3, 1) @@ -163,7 +163,7 @@ #define AUTOSELECT(v) BFEXT(v, 24, 1) /* Register Window 4: Xcvr/media bits */ - + #define Wn4_FIFODiag 4 #define Wn4_NetDiag 6 #define Wn4_PhysicalMgmt 8 @@ -196,28 +196,28 @@ #define DN_COMPLETE 0x00010000 /* This packet has been downloaded */ struct rx_desc_3com { - u32 next; /* Last entry points to 0 */ - u32 status; /* FSH -> Frame Start Header */ - u32 addr; /* Up to 63 addr/len pairs possible */ - u32 length; /* Set LAST_FRAG to indicate last pair */ + u32 next; /* Last entry points to 0 */ + u32 status; /* FSH -> Frame Start Header */ + u32 addr; /* Up to 63 addr/len pairs possible */ + u32 length; /* Set LAST_FRAG to indicate last pair */ }; /* Values for the Rx status entry. */ #define RxDComplete 0x00008000 #define RxDError 0x4000 -#define IPChksumErr (1<<25) -#define TCPChksumErr (1<<26) +#define IPChksumErr (1<<25) +#define TCPChksumErr (1<<26) #define UDPChksumErr (1<<27) -#define IPChksumValid (1<<29) +#define IPChksumValid (1<<29) #define TCPChksumValid (1<<30) #define UDPChksumValid (1<<31) struct tx_desc_3com { - u32 next; /* Last entry points to 0 */ - u32 status; /* bits 0:12 length, others see below */ - u32 addr; - u32 length; + u32 next; /* Last entry points to 0 */ + u32 status; /* bits 0:12 length, others see below */ + u32 addr; + u32 length; }; /* Values for the Tx status entry. */ @@ -232,9 +232,9 @@ /* XCVR Types */ #define XCVR_10baseT 0 -#define XCVR_AUI 1 +#define XCVR_AUI 1 #define XCVR_10baseTOnly 2 -#define XCVR_10base2 3 +#define XCVR_10base2 3 #define XCVR_100baseTx 4 #define XCVR_100baseFx 5 #define XCVR_MII 6 @@ -243,10 +243,10 @@ #define XCVR_Default 10 /* I don't think this is correct -> should have been 0x10 if Auto Negotiate */ struct descriptor { /* A generic descriptor. */ - u32 next; /* Last entry points to 0 */ - u32 status; /* FSH -> Frame Start Header */ - u32 addr; /* Up to 63 addr/len pairs possible */ - u32 length; /* Set LAST_FRAG to indicate last pair */ + u32 next; /* Last entry points to 0 */ + u32 status; /* FSH -> Frame Start Header */ + u32 addr; /* Up to 63 addr/len pairs possible */ + u32 length; /* Set LAST_FRAG to indicate last pair */ }; /* Misc. definitions */ @@ -338,7 +338,7 @@ static inline void ETH_CMD(struct eth_device* dev, int command) { - *(volatile u16 *)io_to_phys(EL3_CMD + dev->iobase) = cpu_to_le16(command); + *(volatile u16 *)io_to_phys(EL3_CMD + dev->iobase) = cpu_to_le16(command); __asm volatile ("eieio"); } @@ -348,24 +348,24 @@ static int issue_and_wait(struct eth_device* dev, int command) { - int i, status; + int i, status; ETH_CMD(dev, command); - for (i = 0; i < 2000; i++) { - status = ETH_STATUS(dev); - //printf ("Issue: status 0x%4x.\n", status); + for (i = 0; i < 2000; i++) { + status = ETH_STATUS(dev); + /*printf ("Issue: status 0x%4x.\n", status); */ if (!(status & CmdInProgress)) - return 1; - } + return 1; + } - /* OK, that didn't work. Do it the slow way. One second */ - for (i = 0; i < 100000; i++) { - status = ETH_STATUS(dev); - //printf ("Issue: status 0x%4x.\n", status); - return 1; - udelay(10); - } - PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) ); + /* OK, that didn't work. Do it the slow way. One second */ + for (i = 0; i < 100000; i++) { + status = ETH_STATUS(dev); + /*printf ("Issue: status 0x%4x.\n", status); */ + return 1; + udelay(10); + } + PRINTF("Ethernet command: 0x%4x did not complete! Status: 0x%4x\n", command, ETH_STATUS(dev) ); return 0; } @@ -378,7 +378,7 @@ EL3WINDOW(dev, 1); - // Wait for Auto negotiation to complete + /* Wait for Auto negotiation to complete */ for (i = 0; i <= 1000; i++) { if (ETH_INW(dev, 2) & 0x04) @@ -391,7 +391,6 @@ return 0; } } - return 1; @@ -430,10 +429,10 @@ int eth_3com_initialize(bd_t *bis) { - u32 eth_iobase = 0, status; - int card_number = 0, ret; - struct eth_device* dev; - pci_dev_t devno; + u32 eth_iobase = 0, status; + int card_number = 0, ret; + struct eth_device* dev; + pci_dev_t devno; char *s; s = getenv("3com_base"); @@ -453,10 +452,10 @@ } ret = pci_read_config_dword(devno, PCI_BASE_ADDRESS_0, ð_iobase); - eth_iobase &= ~0xf; + eth_iobase &= ~0xf; PRINTF("eth: 3Com Found at Address: 0x%x\n", eth_iobase); - + pci_write_config_dword(devno, PCI_COMMAND, PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); /* Check if I/O accesses and Bus Mastering are enabled */ @@ -481,28 +480,28 @@ goto Done; } - dev = (struct eth_device*) malloc(sizeof(*dev)); //struct eth_device)); + dev = (struct eth_device*) malloc(sizeof(*dev)); /*struct eth_device)); */ - sprintf(dev->name, "3Com 3c920c#%d", card_number); - dev->iobase = eth_iobase; - dev->priv = (void*) devno; - dev->init = eth_3com_init; - dev->halt = eth_3com_halt; - dev->send = eth_3com_send; - dev->recv = eth_3com_recv; + sprintf(dev->name, "3Com 3c920c#%d", card_number); + dev->iobase = eth_iobase; + dev->priv = (void*) devno; + dev->init = eth_3com_init; + dev->halt = eth_3com_halt; + dev->send = eth_3com_send; + dev->recv = eth_3com_recv; - eth_register(dev); + eth_register(dev); /* { */ /* char interrupt; */ /* devno = pci_find_device(PCI_VENDOR_ID_3COM, PCI_DEVICE_ID_3COM_3C905C, 0); */ /* pci_read_config_byte(devno, PCI_INTERRUPT_LINE, &interrupt); */ - + /* printf("Installing eth0 interrupt handler to %d\n", interrupt); */ /* irq_install_handler(interrupt, eth_interrupt, dev); */ /* } */ - card_number++; + card_number++; /* Set the latency timer for value */ s = getenv("3com_latency"); @@ -532,13 +531,13 @@ PRINTF ("Cannot allocate memory for RX_RING.....\n"); goto Done; } - + if (!(tx_ring = memalign(sizeof(struct tx_desc_3com) * NUM_TX_DESC, 16))) { PRINTF ("Cannot allocate memory for TX_RING.....\n"); goto Done; } - + Done: return status; } @@ -552,7 +551,7 @@ struct descriptor *ias_cmd; /* Determine what type of network the machine is connected to */ - /* presently drops the connect to 10Mbps */ + /* presently drops the connect to 10Mbps */ if (!auto_negotiate(dev)) { @@ -560,43 +559,43 @@ goto Done; } - issue_and_wait(dev, TxReset); - issue_and_wait(dev, RxReset|0x04); + issue_and_wait(dev, TxReset); + issue_and_wait(dev, RxReset|0x04); - /* Switch to register set 7 for normal use. */ - EL3WINDOW(dev, 7); + /* Switch to register set 7 for normal use. */ + EL3WINDOW(dev, 7); /* Initialize Rx and Tx rings */ init_rx_ring(dev); purge_tx_ring(dev); - ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm); + ETH_CMD(dev, SetRxFilter | RxStation | RxBroadcast | RxProm); - issue_and_wait(dev,SetTxStart|0x07ff); + issue_and_wait(dev,SetTxStart|0x07ff); - /* Below sets which indication bits to be seen. */ + /* Below sets which indication bits to be seen. */ - status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6); - ETH_CMD(dev, status_enable); + status_enable = SetStatusEnb | HostError | DownComplete | UpComplete | (1<<6); + ETH_CMD(dev, status_enable); /* Below sets no bits are to cause an interrupt since this is just polling */ - intr_enable = SetIntrEnb; -// intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); - ETH_CMD(dev, intr_enable); + intr_enable = SetIntrEnb; +/* intr_enable = SetIntrEnb | (1<<9) | (1<<10) | (1<<6); */ + ETH_CMD(dev, intr_enable); ETH_OUTB(dev, 127, UpPoll); - /* Ack all pending events, and set active indicator mask */ + /* Ack all pending events, and set active indicator mask */ - ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq); - ETH_CMD(dev, intr_enable); + ETH_CMD(dev, AckIntr | IntLatch | TxAvailable | RxEarly | IntReq); + ETH_CMD(dev, intr_enable); /* Tell the adapter where the RX ring is located */ issue_and_wait(dev,UpStall); /* Stall and set the UplistPtr */ ETH_OUTL(dev, (u32)&rx_ring[rx_next], UpListPtr); - ETH_CMD(dev, RxEnable); /* Enable the receiver. */ + ETH_CMD(dev, RxEnable); /* Enable the receiver. */ issue_and_wait(dev,UpUnstall); /* Send the Individual Address Setup frame */ @@ -612,7 +611,7 @@ /* Tell the adapter where the TX ring is located */ - ETH_CMD(dev, TxEnable); /* Enable transmitter. */ + ETH_CMD(dev, TxEnable); /* Enable transmitter. */ issue_and_wait(dev, DownStall); /* Stall and set the DownListPtr. */ ETH_OUTL(dev, (u32)&tx_ring[tx_cur], DownListPtr); issue_and_wait(dev, DownUnstall); @@ -627,13 +626,13 @@ } if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */ { - ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */ - issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */ + ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */ + issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */ ETH_OUTL(dev, 0, DownListPtr); issue_and_wait(dev, DownUnstall); } status = 1; - + Done: return status; } @@ -673,8 +672,8 @@ } if (ETH_STATUS(dev) & DownComplete) /* If DownLoad Complete ACK the bit */ { - ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */ - issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */ + ETH_CMD(dev, AckIntr | DownComplete); /* acknowledge the indication bit */ + issue_and_wait(dev, DownStall); /* stall and clear DownListPtr */ ETH_OUTL(dev, 0, DownListPtr); issue_and_wait(dev, DownUnstall); } @@ -710,15 +709,15 @@ status = le32_to_cpu(rx_ring[rx_next].status); /* packet status */ while (status & (1<<15)) - { + { /* A packet has been received */ - if (status & (1<<15)) + if (status & (1<<15)) { /* A valid frame received */ - + length = le32_to_cpu(rx_ring[rx_next].status) & 0x1fff; /* length is in bits 0 - 12 */ - + /* Pass the packet up to the protocol layers */ NetReceive((uchar *)le32_to_cpu(rx_ring[rx_next].addr), length); @@ -748,7 +747,7 @@ void eth_3com_halt(struct eth_device* dev) { - if (!(dev->iobase)) + if (!(dev->iobase)) { goto Done; } @@ -758,14 +757,14 @@ issue_and_wait(dev, RxDisable); issue_and_wait(dev, TxDisable); -// free(tx_ring); /* release memory allocated to the DPD and UPD rings */ -// free(rx_ring); +/* free(tx_ring); /###* release memory allocated to the DPD and UPD rings */ +/* free(rx_ring); */ Done: return; } -static void init_rx_ring(struct eth_device* dev) +static void init_rx_ring(struct eth_device* dev) { int i; @@ -782,7 +781,7 @@ rx_next = 0; } -static void purge_tx_ring(struct eth_device* dev) +static void purge_tx_ring(struct eth_device* dev) { int i; @@ -799,39 +798,39 @@ } } -static void read_hw_addr(struct eth_device* dev, bd_t *bis) +static void read_hw_addr(struct eth_device* dev, bd_t *bis) { u8 hw_addr[ETH_ALEN]; unsigned int eeprom[0x40]; unsigned int checksum = 0; int i, j, timer; - /* Read the station address from the EEPROM. */ + /* Read the station address from the EEPROM. */ - EL3WINDOW(dev, 0); + EL3WINDOW(dev, 0); for (i = 0; i < 0x40; i++) { - ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd); - /* Pause for at least 162 us. for the read to take place. */ - for (timer = 10; timer >= 0; timer--) + ETH_OUTW(dev, EEPROM_Read + i, Wn0EepromCmd); + /* Pause for at least 162 us. for the read to take place. */ + for (timer = 10; timer >= 0; timer--) { - udelay(162); - if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0) - break; - } - eeprom[i] = ETH_INW(dev, Wn0EepromData); - } + udelay(162); + if ((ETH_INW(dev, Wn0EepromCmd) & 0x8000) == 0) + break; + } + eeprom[i] = ETH_INW(dev, Wn0EepromData); + } /* Checksum calculation. I'm not sure about this part and there seems to be a bug on the 3com side of things */ - for (i = 0; i < 0x21; i++) - checksum ^= eeprom[i]; - checksum = (checksum ^ (checksum >> 8)) & 0xff; + for (i = 0; i < 0x21; i++) + checksum ^= eeprom[i]; + checksum = (checksum ^ (checksum >> 8)) & 0xff; - if (checksum != 0xbb) - printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum); + if (checksum != 0xbb) + printf(" *** INVALID EEPROM CHECKSUM %4.4x *** \n", checksum); - for (i = 0, j = 0; i < 3; i++) + for (i = 0, j = 0; i < 3; i++) { hw_addr[j++] = (u8)((eeprom[i+10] >> 8) & 0xff); hw_addr[j++] = (u8)(eeprom[i+10] & 0xff); @@ -839,9 +838,9 @@ /* MAC Address is in window 2, write value from EEPROM to window 2 */ - EL3WINDOW(dev, 2); - for (i = 0; i < 6; i++) - ETH_OUTB(dev, hw_addr[i], i); + EL3WINDOW(dev, 2); + for (i = 0; i < 6; i++) + ETH_OUTB(dev, hw_addr[i], i); for (j = 0; j < ETH_ALEN; j+=2) { @@ -849,9 +848,9 @@ hw_addr[j+1] = (u8)((ETH_INW(dev, j) >> 8) & 0xff); } - for (i=0;ibi_enetaddr[i]) + if (hw_addr[i] != bis->bi_enetaddr[i]) { /* printf("Warning: HW address don't match:\n"); */ /* printf("Address in 3Com Window 2 is " */ @@ -870,9 +869,9 @@ bis->bi_enetaddr[4] == 0 && bis->bi_enetaddr[5] == 0) { - sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X", - hw_addr[0], hw_addr[1], hw_addr[2], - hw_addr[3], hw_addr[4], hw_addr[5]); + sprintf(buffer, "%02X:%02X:%02X:%02X:%02X:%02X", + hw_addr[0], hw_addr[1], hw_addr[2], + hw_addr[3], hw_addr[4], hw_addr[5]); setenv("ethaddr", buffer); } } @@ -883,4 +882,3 @@ Done: return; } - diff --git a/board/MAI/AmigaOneG3SE/flash_new.c b/board/MAI/AmigaOneG3SE/flash_new.c index 3fb9f12..d46bf46 100644 --- a/board/MAI/AmigaOneG3SE/flash_new.c +++ b/board/MAI/AmigaOneG3SE/flash_new.c @@ -27,11 +27,10 @@ #include #include #include -#include "memio.h" +#include "memio.h" /*---------------------------------------------------------------------*/ #undef DEBUG_FLASH -//#define DEBUG_FLASH #ifdef DEBUG_FLASH #define DEBUGF(fmt,args...) printf(fmt ,##args) @@ -68,7 +67,7 @@ unsigned char x; flash_xd_nest --; - + if (flash_xd_nest == 0) { DEBUGF("Flash on memory bus\n"); @@ -327,7 +326,7 @@ /* set sector offsets for uniform sector type */ for (i = 0; i < info->sector_count; i++) { info->start[i] = base + i * info->size / - info->sector_count; + info->sector_count; } break; default: @@ -478,7 +477,7 @@ } if ((rc = write_word(info, wp, data)) != 0) { - flash_to_mem(); + flash_to_mem(); return (rc); } wp += 4; @@ -493,7 +492,7 @@ data = (data << 8) | *src++; } if ((rc = write_word(info, wp, data)) != 0) { - flash_to_mem(); + flash_to_mem(); return (rc); } wp += 4; @@ -582,7 +581,7 @@ */ static void flash_reset (ulong addr) { - flash_to_xd(); + flash_to_xd(); out8(addr, 0xF0); /* reset bank */ iobarrier_rw(); flash_to_mem(); @@ -633,10 +632,10 @@ info->size / 0x100000, info->sector_count); } else if (info->size % 0x400 == 0) { printf (" Size: %ld KB in %d Sectors\n", - info->size / 0x400, info->sector_count); + info->size / 0x400, info->sector_count); } else { printf (" Size: %ld B in %d Sectors\n", - info->size, info->sector_count); + info->size, info->sector_count); } printf (" Sector Start Addresses:"); diff --git a/board/MAI/AmigaOneG3SE/i8259.c b/board/MAI/AmigaOneG3SE/i8259.c index 6cdfc60..34f489f 100644 --- a/board/MAI/AmigaOneG3SE/i8259.c +++ b/board/MAI/AmigaOneG3SE/i8259.c @@ -75,16 +75,16 @@ char dummy; PRINTF("Initializing Interrupt controller\n"); /* init master interrupt controller */ - out8(0x20, 0x11); //0x19); // was: 0x11); /* Start init sequence */ + out8(0x20, 0x11); /* 0x19); /###* Start init sequence */ out8(0x21, 0x00); /* Vector base */ out8(0x21, 0x04); /* edge tiggered, Cascade (slave) on IRQ2 */ - out8(0x21, 0x11); // was: 0x01); /* Select 8086 mode */ + out8(0x21, 0x11); /* was: 0x01); /###* Select 8086 mode */ /* init slave interrupt controller */ - out8(0xA0, 0x11); //0x19); // was: 0x11); /* Start init sequence */ + out8(0xA0, 0x11); /* 0x19); /###* Start init sequence */ out8(0xA1, 0x08); /* Vector base */ out8(0xA1, 0x02); /* edge triggered, Cascade (slave) on IRQ2 */ - out8(0xA1, 0x11); // was: 0x01); /* Select 8086 mode */ + out8(0xA1, 0x11); /* was: 0x01); /###* Select 8086 mode */ /* always read ISR */ out8(0x20, 0x0B); diff --git a/board/MAI/AmigaOneG3SE/interrupts.c b/board/MAI/AmigaOneG3SE/interrupts.c index bb93ea0..5b314a8 100644 --- a/board/MAI/AmigaOneG3SE/interrupts.c +++ b/board/MAI/AmigaOneG3SE/interrupts.c @@ -73,7 +73,7 @@ static __inline__ void set_msr(unsigned long msr) { - asm volatile("mtmsr %0" : : "r" (msr)); + asm volatile("mtmsr %0" : : "r" (msr)); } static __inline__ unsigned long @@ -89,7 +89,7 @@ static __inline__ void set_dec(unsigned long val) { - asm volatile("mtdec %0" : : "r" (val)); + asm volatile("mtdec %0" : : "r" (val)); } @@ -167,8 +167,8 @@ int irq, unmask = 1; - irq = i8259_irq(); //i8259_get_irq(regs); -// printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000); + irq = i8259_irq(); /*i8259_get_irq(regs); */ +/* printf("irq = %d, handler at %p ack=%d\n", irq, irq_handlers[irq].handler, *(volatile unsigned char *)0xFEF00000); */ i8259_mask_and_ack(irq); if (irq_handlers[irq].handler != NULL) @@ -264,5 +264,3 @@ { puts("IRQ related functions are unimplemented currently.\n"); } - - diff --git a/board/MAI/AmigaOneG3SE/macros.h b/board/MAI/AmigaOneG3SE/macros.h index 0fbe39b..6020d7e 100644 --- a/board/MAI/AmigaOneG3SE/macros.h +++ b/board/MAI/AmigaOneG3SE/macros.h @@ -5,20 +5,20 @@ /* ** Load a long integer into a register */ - .macro liw reg, value - lis \reg, \value@h - ori \reg, \reg, \value@l - .endm + .macro liw reg, value + lis \reg, \value@h + ori \reg, \reg, \value@l + .endm - /* + /* ** Generate config_addr request ** This macro expects the values in registers: ** r3 - bus ** r4 - devfn ** r5 - offset */ - .macro config_addr + .macro config_addr rlwinm r9, r5, 24, 0, 6 rlwinm r8, r4, 16, 0, 31 rlwinm r7, r3, 8, 0, 31 @@ -31,7 +31,7 @@ sync .endm - + /* ** Generate config_data address */ @@ -45,40 +45,40 @@ /* ** Write a byte value to an output port */ - .macro outb port, value - lis r2, 0xfe00 - li r0, \value - stb r0, \port(r2) - .endm + .macro outb port, value + lis r2, 0xfe00 + li r0, \value + stb r0, \port(r2) + .endm /* ** Write a register byte value to an output port */ - .macro outbr port, value - lis r2, 0xfe00 - stb \value, \port(r2) - .endm + .macro outbr port, value + lis r2, 0xfe00 + stb \value, \port(r2) + .endm - /* + /* ** Read a byte value from a port into a specified register */ - .macro inb reg, port - lis r2, 0xfe00 - lbz \reg, \port(r2) - .endm + .macro inb reg, port + lis r2, 0xfe00 + lbz \reg, \port(r2) + .endm /* ** Write a byte to the SuperIO config area */ - .macro siowb offset, value - li r3, 0 - li r4, (7<<3) - li r5, \offset - li r6, \value - bl pci_write_cfg_byte - .endm + .macro siowb offset, value + li r3, 0 + li r4, (7<<3) + li r5, \offset + li r6, \value + bl pci_write_cfg_byte + .endm #endif diff --git a/board/MAI/AmigaOneG3SE/memio.S b/board/MAI/AmigaOneG3SE/memio.S index c4a09aa..980d343 100644 --- a/board/MAI/AmigaOneG3SE/memio.S +++ b/board/MAI/AmigaOneG3SE/memio.S @@ -1,9 +1,8 @@ #include "macros.h" - .globl pci_read_cfg_byte - + pci_read_cfg_byte: config_addr config_data 3 @@ -12,11 +11,10 @@ lbz r3, 0(r9) blr - .globl pci_write_cfg_byte - -pci_write_cfg_byte: + +pci_write_cfg_byte: config_addr config_data 3 stb r6, 0(r9) @@ -25,9 +23,8 @@ blr - .globl pci_read_cfg_word - + pci_read_cfg_word: config_addr config_data 2 @@ -37,9 +34,8 @@ blr - .globl pci_write_cfg_word - + pci_write_cfg_word: config_addr config_data 2 @@ -48,10 +44,9 @@ sync blr - .globl pci_read_cfg_long - + pci_read_cfg_long: config_addr config_data 0 @@ -61,9 +56,8 @@ blr - .globl pci_write_cfg_long - + pci_write_cfg_long: config_addr config_data 0 @@ -71,4 +65,3 @@ eieio sync blr - diff --git a/board/MAI/AmigaOneG3SE/memio.h b/board/MAI/AmigaOneG3SE/memio.h index df0839f..f5ce303 100644 --- a/board/MAI/AmigaOneG3SE/memio.h +++ b/board/MAI/AmigaOneG3SE/memio.h @@ -2,7 +2,7 @@ * Memory mapped IO * * (C) Copyright 2002 - * Hyperion Entertainment, ThomasF@hyperion-entertainment.com + * Hyperion Entertainment, ThomasF@hyperion-entertainment.com * * See file CREDITS for list of people who contributed to this * project. @@ -15,9 +15,9 @@ * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. * - */ + */ #ifndef _MEMIO_H #define _MEMIO_H @@ -97,8 +97,8 @@ #define CONFIG_ADDR(bus, devfn, offset) \ write_long_big((uint32 *)0xFEC00CF8, \ - ((offset & 0xFC)<<24) | (devfn << 16) \ - | (bus<<8) | 0x80); + ((offset & 0xFC)<<24) | (devfn << 16) \ + | (bus<<8) | 0x80); #define CONFIG_DATA(offset,mask) ((void *)(0xFEE00CFC+(offset & mask))) diff --git a/board/MAI/AmigaOneG3SE/nvram.c b/board/MAI/AmigaOneG3SE/nvram.c index 5dde15b..d37eec1 100644 --- a/board/MAI/AmigaOneG3SE/nvram.c +++ b/board/MAI/AmigaOneG3SE/nvram.c @@ -1,6 +1,6 @@ /* * (C) Copyright 2002 - * Thomas Frieden, Hyperion Entertainment + * Thomas Frieden, Hyperion Entertainment * ThomasF@hyperion-entertainment.com * * See file CREDITS for list of people who contributed to this @@ -34,4 +34,3 @@ { pci_write_cfg_byte(0, 0, 0x56, 0x0); } - diff --git a/board/MAI/AmigaOneG3SE/ps2kbd.c b/board/MAI/AmigaOneG3SE/ps2kbd.c index a6d67be..bfe5eb3 100644 --- a/board/MAI/AmigaOneG3SE/ps2kbd.c +++ b/board/MAI/AmigaOneG3SE/ps2kbd.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * John W. Linville, linville@tuxdriver.com - * + * * Modified from code for support of MIP405 and PIP405 boards. Previous * copyright follows. * @@ -48,7 +48,6 @@ #undef KBG_DEBUG -//#define KBG_DEBUG #ifdef KBG_DEBUG #define PRINTF(fmt,args...) printf (fmt ,##args) @@ -143,8 +142,6 @@ #define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */ - - static volatile char kbd_buffer[KBD_BUFFER_LEN]; static volatile int in_pointer = 0; static volatile int out_pointer = 0; @@ -172,7 +169,7 @@ '2', '3', '0', '.',0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff,0xff, /* 0x50 - 0x5F */ '\r',0xff,0xff }; - + static unsigned char kbd_shift_xlate[] = { 0xff,0x1b, '!', '@', '#', '$', '%', '^', '&', '*', '(', ')', '_', '+','\b','\t', /* 0x00 - 0x0f */ 'Q', 'W', 'E', 'R', 'T', 'Y', 'U', 'I', 'O', 'P', '{', '}','\r',0xff, 'A', 'S', /* 0x10 - 0x1f */ @@ -194,7 +191,7 @@ }; /****************************************************************** - * Init + * Init ******************************************************************/ int isa_kbd_init(void) @@ -252,7 +249,7 @@ error=console_assign(stdin,DEVNAME); if(error==0) return 1; - else + else return error; } return 1; @@ -261,7 +258,7 @@ } /****************************************************************** - * Queue handling + * Queue handling ******************************************************************/ /* puts character in the queue and sets up the in and out pointer */ void kbd_put_queue(char data) @@ -287,7 +284,7 @@ if(in_pointer==out_pointer) return(0); /* no data */ else - return(1); + return(1); } /* gets the character from the queue */ int kbd_getc(void) @@ -295,13 +292,13 @@ char c; while(in_pointer==out_pointer); - if((out_pointer+1)==KBD_BUFFER_LEN) + if((out_pointer+1)==KBD_BUFFER_LEN) out_pointer=0; else out_pointer++; c=kbd_buffer[out_pointer]; return (int)c; - + } @@ -324,7 +321,7 @@ kbd_send_data(KBD_CMD_SET_LEDS); kbd_send_data(leds); } - + void handle_keyboard_event(unsigned char scancode) { @@ -381,11 +378,11 @@ console_changed = 1; } return; - case 0x2A: + case 0x2A: case 0x36: /* shift pressed */ shift=1; return; /* do nothing else */ - case 0xAA: + case 0xAA: case 0xB6: /* shift released */ shift=0; return; /* do nothing else */ @@ -408,15 +405,15 @@ case 0x3A: /* capslock pressed */ caps_lock=~caps_lock; kbd_set_leds(); - return; + return; case 0x45: /* numlock pressed */ num_lock=~num_lock; kbd_set_leds(); - return; + return; case 0xC6: /* scroll lock released */ case 0xC5: /* num lock released */ case 0xBA: /* caps lock released */ - return; /* just swallow */ + return; /* just swallow */ } if((scancode&0x80)==0x80) /* key released */ return; @@ -456,7 +453,7 @@ PRINTF("unkown scancode %X\n",scancode); return; /* swallow unknown codes */ } - + kbd_put_queue(keycode); PRINTF("%x\n",keycode); } @@ -494,30 +491,29 @@ } - /****************************************************************************** * Lowlevel Part of keyboard section - */ + */ unsigned char kbd_read_status(void) { return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT)); -} - +} + unsigned char kbd_read_input(void) { return(in8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT)); -} +} void kbd_write_command(unsigned char cmd) { out8(CFG_ISA_IO_BASE_ADDRESS + KDB_COMMAND_PORT,cmd); -} - +} + void kbd_write_output(unsigned char data) { out8(CFG_ISA_IO_BASE_ADDRESS + KDB_DATA_PORT, data); -} - +} + int kbd_read_data(void) { int val; @@ -537,7 +533,7 @@ { unsigned long timeout; int val; - + timeout = KBD_TIMEOUT; val=kbd_read_data(); while(val < 0) @@ -602,7 +598,7 @@ * If the test is successful a x55 is placed in the input buffer. */ kbd_write_command_w(KBD_CCMD_SELF_TEST); - if (kbd_wait_for_input() != 0x55) + if (kbd_wait_for_input() != 0x55) return "Kbd: failed self test"; /* * Perform a keyboard interface test. This causes the controller @@ -610,7 +606,7 @@ * test are placed in the input buffer. */ kbd_write_command_w(KBD_CCMD_KBD_TEST); - if (kbd_wait_for_input() != 0x00) + if (kbd_wait_for_input() != 0x00) return "Kbd: interface failed self test"; /* * Enable the keyboard by allowing the keyboard clock to run. @@ -628,7 +624,7 @@ do { kbd_write_output_w(KBD_CMD_RESET); status = kbd_wait_for_input(); - if (status == KBD_REPLY_ACK) + if (status == KBD_REPLY_ACK) break; if (status != KBD_REPLY_RESEND) { @@ -692,8 +688,3 @@ { handle_kbd_event(); } - - - -/* eof */ - diff --git a/board/MAI/AmigaOneG3SE/ps2kbd.h b/board/MAI/AmigaOneG3SE/ps2kbd.h index 95fc14d..fc5c422 100644 --- a/board/MAI/AmigaOneG3SE/ps2kbd.h +++ b/board/MAI/AmigaOneG3SE/ps2kbd.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * John W. Linville, linville@tuxdriver.com - * + * * Modified from code for support of MIP405 and PIP405 boards. Previous * copyright follows. * @@ -30,7 +30,7 @@ #ifndef _KBD_H_ #define _KBD_H_ - + extern int kbd_testc(void); extern int kbd_getc(void); extern void kbd_interrupt(void); diff --git a/board/MAI/AmigaOneG3SE/short_types.h b/board/MAI/AmigaOneG3SE/short_types.h index 22df3c9..1840d28 100644 --- a/board/MAI/AmigaOneG3SE/short_types.h +++ b/board/MAI/AmigaOneG3SE/short_types.h @@ -2,7 +2,7 @@ * short type names * * (C) Copyright 2002 - * Hyperion Entertainment, ThomasF@hyperion-entertainment.com + * Hyperion Entertainment, ThomasF@hyperion-entertainment.com * * See file CREDITS for list of people who contributed to this * project. diff --git a/board/MAI/AmigaOneG3SE/smbus.c b/board/MAI/AmigaOneG3SE/smbus.c index 616005e..de13977 100644 --- a/board/MAI/AmigaOneG3SE/smbus.c +++ b/board/MAI/AmigaOneG3SE/smbus.c @@ -26,18 +26,18 @@ { int i; int level; - + out_byte(0xA539, 0x00); level = 0; for (i=0; i<8; i++) { - if ((writeme & 0x80) == (level<<7)) - { + if ((writeme & 0x80) == (level<<7)) + { /* Bit did not change, rewrite strobe */ out_byte(0xA539, level | 0x02); - out_byte(0xA539, level); + out_byte(0xA539, level); } else { @@ -68,7 +68,7 @@ } return retme; -} +} int sm_get_ack(void) { @@ -106,36 +106,36 @@ int sm_read_byte_from_device(uint8 addr, uint8 reg, uint8 *storage) { - // S Addr Wr + /* S Addr Wr */ sm_write_mode(); sm_send_start(); sm_write_byte((addr<<1)); - - // [A] + + /* [A] */ sm_read_mode(); if (sm_get_ack() == FALSE) return FALSE; - // Comm + /* Comm */ sm_write_mode(); sm_write_byte(reg); - - // [A] + + /* [A] */ sm_read_mode(); if (sm_get_ack() == FALSE) return FALSE; - // S Addr Rd + /* S Addr Rd */ sm_write_mode(); sm_send_start(); sm_write_byte((addr<<1)|1); - - // [A] + + /* [A] */ sm_read_mode(); if (sm_get_ack() == FALSE) return FALSE; - // [Data] + /* [Data] */ *storage = sm_read_byte(); - - // NA + + /* NA */ sm_write_mode(); sm_write_nack(); sm_send_stop(); @@ -144,10 +144,10 @@ } void sm_init(void) -{ +{ /* Switch to PMC mode */ pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER)); - + /* Set GPIO Base */ pci_write_cfg_long(0, 0, 0x40, 0xa500); @@ -155,12 +155,12 @@ pci_write_cfg_byte(0, 0, 0x44, 0x11); /* Set both GPIO 0 and 1 as output */ - out_byte(0xA53A, 0x03); + out_byte(0xA53A, 0x03); } void sm_term(void) -{ +{ /* Switch to normal mode */ pci_write_cfg_byte(0, 0, REG_GROUP, 0); } @@ -173,7 +173,7 @@ #if 0 /* Switch to PMC mode */ pci_write_cfg_byte(0, 0, REG_GROUP, (uint8)(REG_GROUP_SPECIAL|REG_GROUP_POWER)); - + /* Set GPIO Base */ pci_write_cfg_long(0, 0, 0x40, 0xa500); @@ -181,7 +181,7 @@ pci_write_cfg_byte(0, 0, 0x44, 0x11); /* Set both GPIO 0 and 1 as output */ - out_byte(0xA53A, 0x03); + out_byte(0xA53A, 0x03); #endif sm_init(); diff --git a/board/MAI/AmigaOneG3SE/start.txt b/board/MAI/AmigaOneG3SE/start.txt index 5c7b541..e421462 100644 --- a/board/MAI/AmigaOneG3SE/start.txt +++ b/board/MAI/AmigaOneG3SE/start.txt @@ -1,201 +1,198 @@ - - /*------------------------------------------------------*/ - /* TERON Articia / SDRAM Init */ - /*------------------------------------------------------*/ - -* XD_CTL = 0x81000000 (0x74) - -* HBUS_ACC_CTL_0 &= 0xFFFFFDFF (0x5c) - /* host bus access ctl reg 2(5e) */ - /* set - CPU read from memory data one clock after data is latched */ - -* GLOBL_INFO_0 |= 0x00004000 (0x50) - /* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */ - - PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0) - /* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */ - - MEM_RAS_CTL_0 |= 0x3f000000 (0xcc) - &= 0x3fffffff - /* RAS park control reg 0(cc), park access enable is set */ - - HOST_RDBUF_CTL |= 0x10000000 (0x70) - &= 0x10ffffff - /* host read buffer control reg, enable prefetch for CPU read from DRAM control */ - - HBUS_ACC_CTL_0 |= 0x0100001f (0x5c) - &= 0xf1ffffff - /* host bus access control register, enable CPU address bus pipe control */ - /* two outstanding requests, *** changed to 2 from 3 */ - /* enable line merge write control for CPU write to system memory, PCI 1 */ - /* and PCI 0 bus memory; enable page merge write control for write to */ - /* PCI bus 0 & bus 1 memory */ - - SRAM_CTL |= 0x00004000 (0xc8) - &= 0xffbff7ff - /* DRAM detail timing control register 1 (ca), bit 3 set to 0 */ - /* DRAM start access latency control - wait for one clock */ - /* ff9f changed to ffbf */ - - DIM0_TIM_CTL_0 = 0x737d737d (0xc9) - /* DRAM timing control for dimm0 & dimm1; set wait one clock */ - /* cycle for next data access */ - - DIM2_TIM_CTL_0 = 0x737d737d (0xca) - /* DRAM timing control for dimm2 & dimm3; set wait one clock */ - /* cycle for next data access */ - - DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90) - /* set dimm0 bank0 for 128 MB */ - - DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94) - /* set dimm0 for bank1 */ - - DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9) - /* dimm0 timing control register; RAS - CAS latency - 4 clock */ - /* CAS access latency - 3 wait; pre-charge latency - 3 wait */ - /* pre-charge command period control - 5 clock; wait one clock */ - /* cycle for next data access; read to write access latency control */ - /* - 2 clock cycles */ - - DRAM_GBL_CTL_0 |= 0x00000100 (0xc0) - &= 0xffff01ff - /* memory global control register - support buffer sdram on bank 0 */ - - DRAM_ECC_CTL_0 |= 0x00260000 (0xc4) - &= 0xff26ffff - /* enable ECC; enable read, modify, write control */ - - DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8) - /* set DRAM refresh parameters *** changed to 00940100 */ - - nop - nop - nop - nop - nop - - DRAM_ECC_CTL_0 |= 0x20243280 (0xc4) - /* turn off ecc */ - /* for SDRAM bank 0 */ - - DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ? - /* for SDRAM bank 1 */ - - -/* Additional Stuff...*/ - - GLOBL_CTRL |= 0x20000b00 (0x54) - - PCI_0_SB_CONFIG |= 0x04100007 (0xd0) - /* PCI 0 Side band config reg*/ - - 0x8000083c |= 0x00080000 - /* Disable VGA decode on PCI Bus 1 */ - - -/*End Additional Stuff..*/ - - /*--------------------------------------------------------------*/ - /* TERON serial port initialization code */ - /*--------------------------------------------------------------*/ - - 0x84380080 |= 0x00030000 - /* enable super IO configuration VIA chip Register 85 */ - /* Enable super I/O config mode */ - - 0xfe0003f0 = 0xe2 - bl delay1 - - 0xfe0003f1 = 0x0f - bl delay1 - /* enable com1 & com2, parallel port disabled */ - - 0xfe0003f0 = 0xe7 - bl delay1 - /* let's make com1 base as 0x3f8 */ - - 0xfe0003f1 = 0xfe - bl delay1 - - 0xfe0003f0 = 0xe8 - bl delay1 - /* let's make com2 base as 0x2f8 */ - - 0xfe0003f1 = 0xbe - - 0x84380080 &= 0xfffdffff - /* closing super IO configuration VIA chip Register 85 */ - - -/* -------------------------------*/ - - 0xfe0003fb = 0x83 - bl delay1 - /*latch enable word length -8 bit */ /* set mslab bit */ - 0xfe0003f8 = 0x0c - bl delay1 - /* set baud rate lsb for 9600 baud */ - 0xfe0003f9 = 0x0 - bl delay1 - /* set baud rate msb for 9600 baud */ - 0xfe0003fb = 0x03 - bl delay1 - /* reset mslab */ - - /*--------------------------------------------------------------*/ - /* END TERON Serial Port Initialization Code */ - /*--------------------------------------------------------------*/ - - - - /*--------------------------------------------------------------*/ - /* END TERON Articia / SDRAM Initialization code */ - /*--------------------------------------------------------------*/ - -Proposed from Documentation: - -write dmem 0xfec00cf8 0x50000080 -write dmem 0xfee00cfc 0xc0305411 - - Writes to index 0x50-0x53. - 0x50: Global Information Register 0 - 0xC0 = Little Endian CPU, Sequential order Burst - 0x51: Global Information Register 1 - Read only, 0x30 = Provides PowerPC and X86 support - 0x52: Global Information Register 2 - 0x05 = 64/128 bit CPU bus support - 0x53: Global Information Register 3 - 0x80 = PCI Bus 0 grant active time is 1 clock after REQ# deasserted - -write dmem 0xfec00cf8 0x5c000080 -write dmem 0xfee00cfc 0xb300011F - -write dmem 0xfec00cf8 0xc8000080 -write dmem 0xfee00cfc 0x0020f100 - -write dmem 0xfec00cf8 0x90000080 -write dmem 0xfee00cfc 0x007fe700 - -write dmem 0xfec00cf8 0x9400080 -write dmem 0xfee00cfc 0x007fe700 - -write dmem 0xfec00cf8 0xb0000080 -write dmem 0xfee00cfc 0x737d737d - -write dmem 0xfec00cf8 0xb4000080 -write dmem 0xfee00cfc 0x737d737d - -write dmem 0xfec00cf8 0xc0000080 -write dmem 0xfee00cfc 0x40005500 - -write dmem 0xfec00cf8 0xb8000080 -write dmem 0xfee00cfc 0x00940100 - -write dmem 0xfec00cf8 0xc4000080 -write dmem 0xfee00cfc 0x00003280 - -write dmem 0xfec00cf8 0xc4000080 -write dmem 0xfee00cfc 0x00003290 - - + + /*------------------------------------------------------*/ + /* TERON Articia / SDRAM Init */ + /*------------------------------------------------------*/ + +* XD_CTL = 0x81000000 (0x74) + +* HBUS_ACC_CTL_0 &= 0xFFFFFDFF (0x5c) + /* host bus access ctl reg 2(5e) */ + /* set - CPU read from memory data one clock after data is latched */ + +* GLOBL_INFO_0 |= 0x00004000 (0x50) + /* global info register 2 (52), AGP/PCI bus 1 arbiter is addressed in Articia S */ + + PCI_1_SB_CONFIG_0 |= 0x00000400 (0x80d0) + /* PCI1 side band config reg 2 (d2), enable read acces while write buffer not empty */ + + MEM_RAS_CTL_0 |= 0x3f000000 (0xcc) + &= 0x3fffffff + /* RAS park control reg 0(cc), park access enable is set */ + + HOST_RDBUF_CTL |= 0x10000000 (0x70) + &= 0x10ffffff + /* host read buffer control reg, enable prefetch for CPU read from DRAM control */ + + HBUS_ACC_CTL_0 |= 0x0100001f (0x5c) + &= 0xf1ffffff + /* host bus access control register, enable CPU address bus pipe control */ + /* two outstanding requests, *** changed to 2 from 3 */ + /* enable line merge write control for CPU write to system memory, PCI 1 */ + /* and PCI 0 bus memory; enable page merge write control for write to */ + /* PCI bus 0 & bus 1 memory */ + + SRAM_CTL |= 0x00004000 (0xc8) + &= 0xffbff7ff + /* DRAM detail timing control register 1 (ca), bit 3 set to 0 */ + /* DRAM start access latency control - wait for one clock */ + /* ff9f changed to ffbf */ + + DIM0_TIM_CTL_0 = 0x737d737d (0xc9) + /* DRAM timing control for dimm0 & dimm1; set wait one clock */ + /* cycle for next data access */ + + DIM2_TIM_CTL_0 = 0x737d737d (0xca) + /* DRAM timing control for dimm2 & dimm3; set wait one clock */ + /* cycle for next data access */ + + DIM0_BNK0_CTL_0 = BNK0_RAM_SIZ_128MB (0x90) + /* set dimm0 bank0 for 128 MB */ + + DIM0_BNK1_CTL_0 = BNK1_RAM_SIZ_128MB (0x94) + /* set dimm0 for bank1 */ + + DIM0_TIM_CTL_0 = 0xf3bf0000 (0xc9) + /* dimm0 timing control register; RAS - CAS latency - 4 clock */ + /* CAS access latency - 3 wait; pre-charge latency - 3 wait */ + /* pre-charge command period control - 5 clock; wait one clock */ + /* cycle for next data access; read to write access latency control */ + /* - 2 clock cycles */ + + DRAM_GBL_CTL_0 |= 0x00000100 (0xc0) + &= 0xffff01ff + /* memory global control register - support buffer sdram on bank 0 */ + + DRAM_ECC_CTL_0 |= 0x00260000 (0xc4) + &= 0xff26ffff + /* enable ECC; enable read, modify, write control */ + + DRAM_REF_CTL_0 = DRAM_REF_DATA (0xb8) + /* set DRAM refresh parameters *** changed to 00940100 */ + + nop + nop + nop + nop + nop + + DRAM_ECC_CTL_0 |= 0x20243280 (0xc4) + /* turn off ecc */ + /* for SDRAM bank 0 */ + + DRAM_ECC_CTL_0 |= 0x20243290 (0xc4) ? + /* for SDRAM bank 1 */ + + +/* Additional Stuff...*/ + + GLOBL_CTRL |= 0x20000b00 (0x54) + + PCI_0_SB_CONFIG |= 0x04100007 (0xd0) + /* PCI 0 Side band config reg*/ + + 0x8000083c |= 0x00080000 + /* Disable VGA decode on PCI Bus 1 */ + + +/*End Additional Stuff..*/ + + /*--------------------------------------------------------------*/ + /* TERON serial port initialization code */ + /*--------------------------------------------------------------*/ + + 0x84380080 |= 0x00030000 + /* enable super IO configuration VIA chip Register 85 */ + /* Enable super I/O config mode */ + + 0xfe0003f0 = 0xe2 + bl delay1 + + 0xfe0003f1 = 0x0f + bl delay1 + /* enable com1 & com2, parallel port disabled */ + + 0xfe0003f0 = 0xe7 + bl delay1 + /* let's make com1 base as 0x3f8 */ + + 0xfe0003f1 = 0xfe + bl delay1 + + 0xfe0003f0 = 0xe8 + bl delay1 + /* let's make com2 base as 0x2f8 */ + + 0xfe0003f1 = 0xbe + + 0x84380080 &= 0xfffdffff + /* closing super IO configuration VIA chip Register 85 */ + + +/* -------------------------------*/ + + 0xfe0003fb = 0x83 + bl delay1 + /*latch enable word length -8 bit */ /* set mslab bit */ + 0xfe0003f8 = 0x0c + bl delay1 + /* set baud rate lsb for 9600 baud */ + 0xfe0003f9 = 0x0 + bl delay1 + /* set baud rate msb for 9600 baud */ + 0xfe0003fb = 0x03 + bl delay1 + /* reset mslab */ + + /*--------------------------------------------------------------*/ + /* END TERON Serial Port Initialization Code */ + /*--------------------------------------------------------------*/ + + + /*--------------------------------------------------------------*/ + /* END TERON Articia / SDRAM Initialization code */ + /*--------------------------------------------------------------*/ + +Proposed from Documentation: + +write dmem 0xfec00cf8 0x50000080 +write dmem 0xfee00cfc 0xc0305411 + + Writes to index 0x50-0x53. + 0x50: Global Information Register 0 + 0xC0 = Little Endian CPU, Sequential order Burst + 0x51: Global Information Register 1 + Read only, 0x30 = Provides PowerPC and X86 support + 0x52: Global Information Register 2 + 0x05 = 64/128 bit CPU bus support + 0x53: Global Information Register 3 + 0x80 = PCI Bus 0 grant active time is 1 clock after REQ# deasserted + +write dmem 0xfec00cf8 0x5c000080 +write dmem 0xfee00cfc 0xb300011F + +write dmem 0xfec00cf8 0xc8000080 +write dmem 0xfee00cfc 0x0020f100 + +write dmem 0xfec00cf8 0x90000080 +write dmem 0xfee00cfc 0x007fe700 + +write dmem 0xfec00cf8 0x9400080 +write dmem 0xfee00cfc 0x007fe700 + +write dmem 0xfec00cf8 0xb0000080 +write dmem 0xfee00cfc 0x737d737d + +write dmem 0xfec00cf8 0xb4000080 +write dmem 0xfee00cfc 0x737d737d + +write dmem 0xfec00cf8 0xc0000080 +write dmem 0xfee00cfc 0x40005500 + +write dmem 0xfec00cf8 0xb8000080 +write dmem 0xfee00cfc 0x00940100 + +write dmem 0xfec00cf8 0xc4000080 +write dmem 0xfee00cfc 0x00003280 + +write dmem 0xfec00cf8 0xc4000080 +write dmem 0xfee00cfc 0x00003290 diff --git a/board/MAI/AmigaOneG3SE/u-boot.lds b/board/MAI/AmigaOneG3SE/u-boot.lds index 10c0c3d..2281d35 100644 --- a/board/MAI/AmigaOneG3SE/u-boot.lds +++ b/board/MAI/AmigaOneG3SE/u-boot.lds @@ -63,7 +63,7 @@ cpu/74xx_7xx/start.o (.text) /* store the environment in a seperate sector in the boot flash */ /* . = env_offset; */ - common/environment.o(.text) + common/environment.o(.text) *(.text) *(.fixup) @@ -87,7 +87,7 @@ PROVIDE (erotext = .); .reloc : { - *(.got) + *(.got) _GOT2_TABLE_ = .; *(.got2) _FIXUP_TABLE_ = .; @@ -108,6 +108,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/MAI/AmigaOneG3SE/usb_uhci.c b/board/MAI/AmigaOneG3SE/usb_uhci.c index fd8cb4e..14e8043 100644 --- a/board/MAI/AmigaOneG3SE/usb_uhci.c +++ b/board/MAI/AmigaOneG3SE/usb_uhci.c @@ -83,7 +83,7 @@ #define USB_MAX_TEMP_INT_TD 32 /* number of temporary TDs for Interrupt transfers */ -//#define USB_UHCI_DEBUG +/*#define USB_UHCI_DEBUG */ #ifdef USB_UHCI_DEBUG #define USB_UHCI_PRINTF(fmt,args...) printf (fmt ,##args) @@ -599,7 +599,7 @@ printf("Error USB UHCI (%04X,%04X) not found\n",USB_UHCI_VEND_ID,USB_UHCI_DEV_ID); return -1; } - + #if 1 s = getenv("usb_irq"); if (s) @@ -1115,7 +1115,6 @@ #endif - #ifdef USB_UHCI_DEBUG static int usb_display_td(uhci_td_t *td) diff --git a/board/MAI/AmigaOneG3SE/usb_uhci.h b/board/MAI/AmigaOneG3SE/usb_uhci.h index 7fda60b..3387157 100644 --- a/board/MAI/AmigaOneG3SE/usb_uhci.h +++ b/board/MAI/AmigaOneG3SE/usb_uhci.h @@ -190,5 +190,3 @@ #endif /* _USB_UHCI_H_ */ - - diff --git a/board/MAI/AmigaOneG3SE/via686.c b/board/MAI/AmigaOneG3SE/via686.c index 0483ca9..c797e47 100644 --- a/board/MAI/AmigaOneG3SE/via686.c +++ b/board/MAI/AmigaOneG3SE/via686.c @@ -211,18 +211,18 @@ __asm (" .globl via_calibrate_time_base \n" "via_calibrate_time_base: \n" - " lis 9, 0xfe00 \n" - " li 0, 0x00 \n" + " lis 9, 0xfe00 \n" + " li 0, 0x00 \n" " mttbu 0 \n" " mttbl 0 \n" "ctb_loop: \n" - " lbz 0, 0x61(9) \n" - " eieio \n" - " andi. 0, 0, 0x20 \n" - " beq ctb_loop \n" - "ctb_done: \n" - " mftb 3 \n" - " blr"); + " lbz 0, 0x61(9) \n" + " eieio \n" + " andi. 0, 0, 0x20 \n" + " beq ctb_loop \n" + "ctb_done: \n" + " mftb 3 \n" + " blr"); extern unsigned long via_calibrate_time_base(void); diff --git a/board/MAI/AmigaOneG3SE/video.c b/board/MAI/AmigaOneG3SE/video.c index e80288b..36e3c62 100644 --- a/board/MAI/AmigaOneG3SE/video.c +++ b/board/MAI/AmigaOneG3SE/video.c @@ -1,6 +1,6 @@ /* * (C) Copyright 2002 - * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com + * Hyperion Entertainment, Hans-JoergF@hyperion-entertainment.com * * See file CREDITS for list of people who contributed to this * project. @@ -100,7 +100,7 @@ video_inited = 1; video_init(); memset (&vgadev, 0, sizeof(vgadev)); - + strcpy(vgadev.name, VIDEO_NAME); vgadev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM; vgadev.putc = video_putc; @@ -108,7 +108,7 @@ vgadev.getc = NULL; vgadev.tstc = NULL; vgadev.start = video_start; - + error = device_register (&vgadev); if (error == 0) @@ -129,11 +129,11 @@ int video_init(void) { - cursor_position = VIDEO_BASE; // Color text display base + cursor_position = VIDEO_BASE; /* Color text display base */ cursor_row = 0; cursor_col = 0; - current_attr = video_get_attr(); // Currently selected value for attribute. -// video_test(); + current_attr = video_get_attr(); /* Currently selected value for attribute. */ +/* video_test(); */ video_set_color(current_attr); return 0; @@ -283,7 +283,7 @@ void video_draw_box(int style, int attr, char *title, int separate, int x, int y, int w, int h) { - unsigned char *fb, *fb2; + unsigned char *fb, *fb2; unsigned char *st = (style == SINGLE_BOX)?video_single_box : video_double_box; unsigned char *ti = (style == SINGLE_BOX)?video_single_title : video_double_title; int i; @@ -324,11 +324,11 @@ *fb = st[3]; *(fb+1) = attr; fb += 2*VIDEO_COLS; - *fb2 = st[4]; + *fb2 = st[4]; *(fb2+1) = attr; fb2 += 2*VIDEO_COLS; } - - // Draw title + + /* Draw title */ if (title) { if (separate == 0) @@ -370,7 +370,7 @@ fb += 2; } fb = video_addr(x+2, y+1); - + while (*title) { *fb = *title; @@ -414,7 +414,7 @@ } void video_restore_rect(int x, int y, int w, int h, void *save_area) -{ +{ unsigned char *save = (unsigned char *)save_area; unsigned char *fb = video_addr(x,y); int i,j; @@ -484,7 +484,7 @@ int i; char *s; int maxdev; - + if (video_inited == 0) return; #ifdef EASTEREGG diff --git a/board/MAI/bios_emulator/bios.c b/board/MAI/bios_emulator/bios.c index 4707bd9..d51eb64 100644 --- a/board/MAI/bios_emulator/bios.c +++ b/board/MAI/bios_emulator/bios.c @@ -130,14 +130,14 @@ switch(M.x86.R_AX) { - case 0xB101: // PCI Bios Present? + case 0xB101: /* PCI Bios Present? */ M.x86.R_AL = 0x00; M.x86.R_EDX = 0x20494350; M.x86.R_BX = 0x0210; M.x86.R_CL = 3; CLEAR_FLAG(F_CF); break; - case 0xB102: // Find device + case 0xB102: /* Find device */ device = mypci_find_device(M.x86.R_DX, M.x86.R_CX, M.x86.R_SI); if (device != -1) { @@ -151,52 +151,52 @@ } CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF); break; - case 0xB103: // Find PCI class code + case 0xB103: /* Find PCI class code */ M.x86.R_AH = PCIBIOS_DEVICE_NOT_FOUND; - //printf("Find by class not yet implmented"); + /*printf("Find by class not yet implmented"); */ CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF); break; - case 0xB108: // read config byte + case 0xB108: /* read config byte */ M.x86.R_CL = mypci_read_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI); M.x86.R_AH = PCIBIOS_SUCCESSFUL; CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF); - //printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, - // M.x86.R_CL); + /*printf("read_config_byte %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */ + /* M.x86.R_CL); */ break; - case 0xB109: // read config word + case 0xB109: /* read config word */ M.x86.R_CX = mypci_read_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI); M.x86.R_AH = PCIBIOS_SUCCESSFUL; CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF); - //printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, - // M.x86.R_CX); + /*printf("read_config_word %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */ + /* M.x86.R_CX); */ break; - case 0xB10A: // read config dword + case 0xB10A: /* read config dword */ M.x86.R_ECX = mypci_read_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI); M.x86.R_AH = PCIBIOS_SUCCESSFUL; CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF); - //printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, - // M.x86.R_ECX); + /*printf("read_config_long %x,%x,%x -> %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */ + /* M.x86.R_ECX); */ break; - case 0xB10B: // write config byte + case 0xB10B: /* write config byte */ mypci_write_cfg_byte(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CL); M.x86.R_AH = PCIBIOS_SUCCESSFUL; CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF); - //printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, - // M.x86.R_CL); + /*printf("write_config_byte %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */ + /* M.x86.R_CL); */ break; - case 0xB10C: // write config word + case 0xB10C: /* write config word */ mypci_write_cfg_word(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_CX); M.x86.R_AH = PCIBIOS_SUCCESSFUL; CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF); - //printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, - // M.x86.R_CX); + /*printf("write_config_word %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */ + /* M.x86.R_CX); */ break; - case 0xB10D: // write config dword + case 0xB10D: /* write config dword */ mypci_write_cfg_long(M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, M.x86.R_ECX); M.x86.R_AH = PCIBIOS_SUCCESSFUL; CONDITIONAL_SET_FLAG((M.x86.R_AH != PCIBIOS_SUCCESSFUL), F_CF); - //printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, - // M.x86.R_ECX); + /*printf("write_config_long %x,%x,%x <- %x\n", M.x86.R_BH, M.x86.R_BL, M.x86.R_DI, */ + /* M.x86.R_ECX); */ break; default: PRINTF("BIOS int %xh: Unknown function AX=%04xh\n", intno, M.x86.R_AX); @@ -208,7 +208,7 @@ { int i; X86EMU_intrFuncs bios_intr_tab[256]; - + for (i=0; i<256; i++) { write_long_little(M.mem_base+i*4, BIOS_SEG<<16); @@ -221,7 +221,7 @@ bios_intr_tab[0x15] = int15; bios_intr_tab[0x6D] = int42; - + X86EMU_setupIntrFuncs(bios_intr_tab); video_init(); } @@ -252,14 +252,14 @@ unsigned char * setup_modes[] = { - setup_40x25, // mode 0: 40x25 bw text - setup_40x25, // mode 1: 40x25 col text - setup_80x25, // mode 2: 80x25 bw text - setup_80x25, // mode 3: 80x25 col text - setup_graphics, // mode 4: 320x200 col graphics - setup_graphics, // mode 5: 320x200 bw graphics - setup_graphics, // mode 6: 640x200 bw graphics - setup_bw // mode 7: 80x25 mono text + setup_40x25, /* mode 0: 40x25 bw text */ + setup_40x25, /* mode 1: 40x25 col text */ + setup_80x25, /* mode 2: 80x25 bw text */ + setup_80x25, /* mode 3: 80x25 col text */ + setup_graphics, /* mode 4: 320x200 col graphics */ + setup_graphics, /* mode 5: 320x200 bw graphics */ + setup_graphics, /* mode 6: 640x200 bw graphics */ + setup_bw /* mode 7: 80x25 mono text */ }; unsigned int setup_cols[] = @@ -280,13 +280,13 @@ void bios_set_mode(int mode) { int i; - unsigned char mode_set = setup_modesets[mode]; // Control register value - unsigned char *setup_regs = setup_modes[mode]; // Register 3D4 Array + unsigned char mode_set = setup_modesets[mode]; /* Control register value */ + unsigned char *setup_regs = setup_modes[mode]; /* Register 3D4 Array */ - // Switch video off + /* Switch video off */ out_byte(0x3D8, mode_set & 0x37); - // Set up parameters at 3D4h + /* Set up parameters at 3D4h */ for (i=0; i<16; i++) { out_byte(0x3D4, (unsigned char)i); @@ -294,10 +294,10 @@ setup_regs++; } - // Enable video + /* Enable video */ out_byte(0x3D8, mode_set); - // Set overscan + /* Set overscan */ if (mode == 6) out_byte(0x3D9, 0x3F); else out_byte(0x3D9, 0x30); } diff --git a/board/MAI/bios_emulator/glue.c b/board/MAI/bios_emulator/glue.c index f59ffaa..b380f0d 100644 --- a/board/MAI/bios_emulator/glue.c +++ b/board/MAI/bios_emulator/glue.c @@ -401,7 +401,7 @@ { int i = 0; unsigned char *rom = (unsigned char *)rom_address; - /* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; // No bios rom this is, yes. */ + /* if (*rom != 0x55 || *(rom+1) != 0xAA) return 0; /* No bios rom this is, yes. */ */ for (;;) { @@ -479,7 +479,6 @@ } - void remove_init_data(void) { char *s; @@ -497,19 +496,19 @@ } else if (s) { - if (strcmp(s, "dcache")==0) - { - dcache_enable(); - } - else if (strcmp(s, "icache") == 0) - { - icache_enable(); - } - else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0) - { - dcache_enable(); - icache_enable(); - } + if (strcmp(s, "dcache")==0) + { + dcache_enable(); + } + else if (strcmp(s, "icache") == 0) + { + icache_enable(); + } + else if (strcmp(s, "on")== 0 || strcmp(s, "both") == 0) + { + dcache_enable(); + icache_enable(); + } } /* show_bat_mapping();*/ diff --git a/board/MAI/bios_emulator/scitech/include/biosemu.h b/board/MAI/bios_emulator/scitech/include/biosemu.h index e38ff31..82c33a7 100644 --- a/board/MAI/bios_emulator/scitech/include/biosemu.h +++ b/board/MAI/bios_emulator/scitech/include/biosemu.h @@ -152,4 +152,3 @@ #endif #endif /* __BIOSEMU_H */ - diff --git a/board/MAI/bios_emulator/scitech/include/event.h b/board/MAI/bios_emulator/scitech/include/event.h index 0de4517..beeac87 100644 --- a/board/MAI/bios_emulator/scitech/include/event.h +++ b/board/MAI/bios_emulator/scitech/include/event.h @@ -201,9 +201,9 @@ the country code pages in use. NOTE: Scan codes in the event library are not really hardware scan codes, - but rather virtual scan codes as generated by a low level keyboard - interface driver. All virtual codes begin with scan code 0x60 and - range up from there. + but rather virtual scan codes as generated by a low level keyboard + interface driver. All virtual codes begin with scan code 0x60 and + range up from there. HEADER: event.h @@ -496,38 +496,38 @@ MEMBERS: which - Window identifier for message for use by high level window manager - code (i.e. MegaVision GUI or Windows API). + code (i.e. MegaVision GUI or Windows API). what - Type of event that occurred. Will be one of the values defined by - the EVT_eventType enumeration. + the EVT_eventType enumeration. when - Time that the event occurred in milliseconds since startup where_x - X coordinate of the mouse cursor location at the time of the event - (in screen coordinates). For joystick events this represents - the position of the first joystick X axis. + (in screen coordinates). For joystick events this represents + the position of the first joystick X axis. where_y - Y coordinate of the mouse cursor location at the time of the event - (in screen coordinates). For joystick events this represents - the position of the first joystick Y axis. + (in screen coordinates). For joystick events this represents + the position of the first joystick Y axis. relative_x - Relative movement of the mouse cursor in the X direction (in - units of mickeys, or 1/200th of an inch). For joystick events - this represents the position of the second joystick X axis. + units of mickeys, or 1/200th of an inch). For joystick events + this represents the position of the second joystick X axis. relative_y - Relative movement of the mouse cursor in the Y direction (in - units of mickeys, or 1/200th of an inch). For joystick events - this represents the position of the second joystick Y axis. + units of mickeys, or 1/200th of an inch). For joystick events + this represents the position of the second joystick Y axis. message - Event specific message for the event. For use events this can be - any user specific information. For keyboard events this contains - the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and - the character repeat count in bits 16-30. You can use the - EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract - this information from the message field. For mouse events this - contains information about which button was pressed, and will be a - combination of the flags defined by the EVT_eventMouseMaskType - enumeration. For joystick events, this conatins information - about which buttons were pressed, and will be a combination of - the flags defined by the EVT_eventJoyMaskType enumeration. + any user specific information. For keyboard events this contains + the ASCII code in bits 0-7, the keyboard scan code in bits 8-15 and + the character repeat count in bits 16-30. You can use the + EVT_asciiCode, EVT_scanCode and EVT_repeatCount macros to extract + this information from the message field. For mouse events this + contains information about which button was pressed, and will be a + combination of the flags defined by the EVT_eventMouseMaskType + enumeration. For joystick events, this conatins information + about which buttons were pressed, and will be a combination of + the flags defined by the EVT_eventJoyMaskType enumeration. modifiers - Contains additional information about the state of the keyboard - shift modifiers (Ctrl, Alt and Shift keys) when the event - occurred. For mouse events it will also contain the state of - the mouse buttons. Will be a combination of the values defined - by the EVT_eventModMaskType enumeration. + shift modifiers (Ctrl, Alt and Shift keys) when the event + occurred. For mouse events it will also contain the state of + the mouse buttons. Will be a combination of the values defined + by the EVT_eventModMaskType enumeration. next - Internal use; do not use. prev - Internal use; do not use. ****************************************************************************/ @@ -555,8 +555,8 @@ other than the US English keyboard (the default). NOTE: Entries in code page tables *must* be in ascending order for the - scan codes as we do a binary search on the tables for the ASCII - code equivalents. + scan codes as we do a binary search on the tables for the ASCII + code equivalents. HEADER: event.h diff --git a/board/MAI/bios_emulator/scitech/include/pcilib.h b/board/MAI/bios_emulator/scitech/include/pcilib.h index e2d58b0..238f8ef 100644 --- a/board/MAI/bios_emulator/scitech/include/pcilib.h +++ b/board/MAI/bios_emulator/scitech/include/pcilib.h @@ -103,14 +103,14 @@ typedef union { struct { - uint Zero:2; - uint Register:6; - uint Function:3; - uint Device:5; - uint Bus:8; - uint Reserved:7; - uint Enable:1; - } p; + uint Zero:2; + uint Register:6; + uint Function:3; + uint Device:5; + uint Bus:8; + uint Reserved:7; + uint Enable:1; + } p; ulong i; } PCIslot; @@ -194,9 +194,9 @@ uchar SubordinateBus; uchar SecondaryLatency; struct { - ulong Base; - ulong Limit; - } Range[4]; + ulong Base; + ulong Limit; + } Range[4]; uchar InterruptLine; uchar InterruptPin; ushort BridgeControl; @@ -224,10 +224,10 @@ uchar HeaderType; uchar BIST; union { - PCIType0Info type0; - PCIType1Info type1; - PCIType2Info type2; - } u; + PCIType0Info type0; + PCIType1Info type1; + PCIType2Info type2; + } u; } PCIDeviceInfo; /* PCI Capability header structure. All PCI capabilities have the @@ -411,4 +411,3 @@ #endif #endif /* __PCILIB_H */ - diff --git a/board/MAI/bios_emulator/scitech/include/pm_help.h b/board/MAI/bios_emulator/scitech/include/pm_help.h index 60a7c25..536a2ba 100644 --- a/board/MAI/bios_emulator/scitech/include/pm_help.h +++ b/board/MAI/bios_emulator/scitech/include/pm_help.h @@ -164,4 +164,3 @@ #endif /* !__OS2__ */ #endif /* __PMHELP_H */ - diff --git a/board/MAI/bios_emulator/scitech/include/pm_wctl.h b/board/MAI/bios_emulator/scitech/include/pm_wctl.h index 088c19e..20aa15e 100644 --- a/board/MAI/bios_emulator/scitech/include/pm_wctl.h +++ b/board/MAI/bios_emulator/scitech/include/pm_wctl.h @@ -73,4 +73,3 @@ PMHELP_CTL_CODE(GAGETEXPORTS ,0x002E), PMHELP_CTL_CODE(GATHUNK ,0x002F), PMHELP_CTL_CODE(SETNUCLEUSPATH ,0x0030), - diff --git a/board/MAI/bios_emulator/scitech/include/pmapi.h b/board/MAI/bios_emulator/scitech/include/pmapi.h index 3affe67..7ddace7 100644 --- a/board/MAI/bios_emulator/scitech/include/pmapi.h +++ b/board/MAI/bios_emulator/scitech/include/pmapi.h @@ -1146,4 +1146,3 @@ #endif #endif /* __PMAPI_H */ - diff --git a/board/MAI/bios_emulator/scitech/include/pmimp.h b/board/MAI/bios_emulator/scitech/include/pmimp.h index d6c5cdb..817f5e6 100644 --- a/board/MAI/bios_emulator/scitech/include/pmimp.h +++ b/board/MAI/bios_emulator/scitech/include/pmimp.h @@ -191,4 +191,3 @@ NULL, #endif }; - diff --git a/board/MAI/bios_emulator/scitech/include/scitech.h b/board/MAI/bios_emulator/scitech/include/scitech.h index 1dbffac..8d5eee9 100644 --- a/board/MAI/bios_emulator/scitech/include/scitech.h +++ b/board/MAI/bios_emulator/scitech/include/scitech.h @@ -80,7 +80,7 @@ #ifdef __GNUC__ #ifdef __cplusplus -// G++ currently fucks this up! +/* G++ currently fucks this up! */ #define __cdecl #define __stdcall #else @@ -605,18 +605,18 @@ { \ static ibool firstTime = true; \ if (firstTime) { \ - firstTime = false; \ - DebugInt(); \ - } \ + firstTime = false; \ + DebugInt(); \ + } \ } #define DebugVxDOnce() \ { \ static ibool firstTime = true; \ if (firstTime) { \ - firstTime = false; \ - DebugVxD(); \ - } \ + firstTime = false; \ + DebugVxD(); \ + } \ } /* Macros for linux string compatibility functions */ @@ -636,10 +636,10 @@ /* Get rid of some helaciously annoying Visual C++ warnings! */ #if defined(_MSC_VER) && !defined(__MWERKS__) && !defined(__SC__) -#pragma warning(disable:4761) // integral size mismatch in argument; conversion supplied -#pragma warning(disable:4244) // conversion from 'unsigned short ' to 'unsigned char ', possible loss of data -#pragma warning(disable:4018) // '<' : signed/unsigned mismatch -#pragma warning(disable:4305) // 'initializing' : truncation from 'const double' to 'float' +#pragma warning(disable:4761) /* integral size mismatch in argument; conversion supplied */ +#pragma warning(disable:4244) /* conversion from 'unsigned short ' to 'unsigned char ', possible loss of data */ +#pragma warning(disable:4018) /* '<' : signed/unsigned mismatch */ +#pragma warning(disable:4305) /* 'initializing' : truncation from 'const double' to 'float' */ #endif /*--------------------------------------------------------------------------- @@ -674,29 +674,29 @@ # define CHK(x) x #if CHECKED > 1 # define CHECK(p) \ - ((p) ? (void)0 : DebugInt(), \ - _CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \ - #p, __FILE__, __LINE__)) + ((p) ? (void)0 : DebugInt(), \ + _CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \ + #p, __FILE__, __LINE__)) # define WARN(p) \ - ((p) ? (void)0 : DebugInt(), \ - _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \ - #p, __FILE__, __LINE__)) + ((p) ? (void)0 : DebugInt(), \ + _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \ + #p, __FILE__, __LINE__)) #else # define CHECK(p) \ - ((p) ? (void)0 : \ - _CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \ - #p, __FILE__, __LINE__)) + ((p) ? (void)0 : \ + _CHK_fail(1,"Check failed: '%s', file %s, line %d\n", \ + #p, __FILE__, __LINE__)) # define WARN(p) \ - ((p) ? (void)0 : \ - _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \ - #p, __FILE__, __LINE__)) + ((p) ? (void)0 : \ + _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \ + #p, __FILE__, __LINE__)) #endif # define LOGFATAL(msg) \ - _CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \ - msg, __FILE__, __LINE__) + _CHK_fail(1,"Fatal error: '%s', file %s, line %d\n", \ + msg, __FILE__, __LINE__) # define LOGWARN(msg) \ - _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \ - msg, __FILE__, __LINE__) + _CHK_fail(0,"Warning: '%s', file %s, line %d\n", \ + msg, __FILE__, __LINE__) #else # define CHK(x) # define CHECK(p) ((void)0) diff --git a/board/MAI/bios_emulator/scitech/include/x86emu/regs.h b/board/MAI/bios_emulator/scitech/include/x86emu/regs.h index c6ce884..a12017b 100644 --- a/board/MAI/bios_emulator/scitech/include/x86emu/regs.h +++ b/board/MAI/bios_emulator/scitech/include/x86emu/regs.h @@ -105,7 +105,7 @@ u32 FLAGS; }; -/* +/* * Segment registers here represent the 16 bit quantities * CS, DS, ES, SS. */ @@ -183,8 +183,8 @@ #define F_ALWAYS_ON (0x0002) /* flag bits always on */ /* - * Define a mask for only those flag bits we will ever pass back - * (via PUSHF) + * Define a mask for only those flag bits we will ever pass back + * (via PUSHF) */ #define F_MSK (FB_CF|FB_PF|FB_AF|FB_ZF|FB_SF|FB_TF|FB_IF|FB_DF|FB_OF) @@ -235,21 +235,21 @@ #define SYSMODE_HALTED 0x40000000 #define SYSMODE_SEGMASK (SYSMODE_SEG_DS_SS | \ - SYSMODE_SEGOVR_CS | \ - SYSMODE_SEGOVR_DS | \ - SYSMODE_SEGOVR_ES | \ - SYSMODE_SEGOVR_FS | \ - SYSMODE_SEGOVR_GS | \ - SYSMODE_SEGOVR_SS) + SYSMODE_SEGOVR_CS | \ + SYSMODE_SEGOVR_DS | \ + SYSMODE_SEGOVR_ES | \ + SYSMODE_SEGOVR_FS | \ + SYSMODE_SEGOVR_GS | \ + SYSMODE_SEGOVR_SS) #define SYSMODE_CLRMASK (SYSMODE_SEG_DS_SS | \ - SYSMODE_SEGOVR_CS | \ - SYSMODE_SEGOVR_DS | \ - SYSMODE_SEGOVR_ES | \ - SYSMODE_SEGOVR_FS | \ - SYSMODE_SEGOVR_GS | \ - SYSMODE_SEGOVR_SS | \ - SYSMODE_PREFIX_DATA | \ - SYSMODE_PREFIX_ADDR) + SYSMODE_SEGOVR_CS | \ + SYSMODE_SEGOVR_DS | \ + SYSMODE_SEGOVR_ES | \ + SYSMODE_SEGOVR_FS | \ + SYSMODE_SEGOVR_GS | \ + SYSMODE_SEGOVR_SS | \ + SYSMODE_PREFIX_DATA | \ + SYSMODE_PREFIX_ADDR) #define INTR_SYNCH 0x1 #define INTR_ASYNCH 0x2 @@ -266,8 +266,8 @@ * Delayed flag set 3 bits (zero, signed, parity) * reserved 6 bits * interrupt # 8 bits instruction raised interrupt - * BIOS video segregs 4 bits - * Interrupt Pending 1 bits + * BIOS video segregs 4 bits + * Interrupt Pending 1 bits * Extern interrupt 1 bits * Halted 1 bits */ @@ -317,12 +317,12 @@ extern X86EMU_sysEnv _X86EMU_env; #define M _X86EMU_env - + /*-------------------------- Function Prototypes --------------------------*/ /* Function to log information at runtime */ -//void printk(const char *fmt, ...); +/*void printk(const char *fmt, ...); */ #ifdef __cplusplus } /* End of "C" linkage for C++ */ diff --git a/board/MAI/bios_emulator/scitech/makedefs/common.mk b/board/MAI/bios_emulator/scitech/makedefs/common.mk index da2364f..d337152 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/common.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/common.mk @@ -178,4 +178,3 @@ # Include file dependencies .INCLUDE .IGNORE: "makefile.dep" - diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk index 361ed4a..72c4ced 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/gcc_linux.mk @@ -178,4 +178,3 @@ # Define which file contains our rules RULES_MAK := gcc_linux.mk - diff --git a/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk b/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk index 1709d88..21ccf97 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/gcc_win32.mk @@ -133,4 +133,3 @@ # Define which file contains our rules RULES_MAK := gcc_win32.mk - diff --git a/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk b/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk index 56dfa4d..f583af3 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/qnx4.mk @@ -162,4 +162,3 @@ # Define which file contains our rules RULES_MAK := qnx4.mk - diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk index 4b59328..681b698 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_beos.mk @@ -44,5 +44,4 @@ %$L: ; $(LIB) $(LIBFLAGS) $@ $& # Implicit rule for building an executable file -%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) - +%$E: ; $(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk index 56719ed..5f91fe5 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_linux.mk @@ -91,4 +91,3 @@ @$(ECHO) ld $@ @$(LD) $(LDFLAGS) -o $@ $& $(EXELIBS) $(PMLIB) -lm .ENDIF - diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk index 36b24b1..485d166 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/rules/gcc_win32.mk @@ -88,4 +88,3 @@ @$(ECHO) ld $@ @$(LD) $(LDFLAGS) -o $@ @$(mktmp $(&:s/\/\\) $(EXELIBS) $(PMLIB) -lm) .ENDIF - diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk index 588028f..1a20319 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/rules/va32.mk @@ -69,14 +69,14 @@ # Implicit rule for building an executable file using response file .IF $(USE_OS2GUI) %$E: ; - rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n) + rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n) .IF $(LXLITE) - lxlite $@ + lxlite $@ .ENDIF .ELSE %$E: ; - rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n) + rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n) .IF $(LXLITE) - lxlite $@ + lxlite $@ .ENDIF .ENDIF diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk index 0c149b7..2b41801 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/rules/va365.mk @@ -66,14 +66,14 @@ # Implicit rule for building an executable file using response file .IF $(USE_OS2GUI) %$E: ; - rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n) + rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n$*.def\n) .IF $(LXLITE) - lxlite $@ + lxlite $@ .ENDIF .ELSE %$E: ; - rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n) + rclink $(LD) $(RC) $@ $(mktmp $(LDFLAGS) $(&:t"+\n":s/\/\\)\n$@\n$*.map\n$(EXELIBS) $(PMLIB)\n\n) .IF $(LXLITE) - lxlite $@ + lxlite $@ .ENDIF .ENDIF diff --git a/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk b/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk index 68bfd83..39b8819 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/rules/wc32.mk @@ -109,7 +109,7 @@ @gcpp -DNASM_ASSEMBLER -D__WATCOMC__ -EP $(<:s,/,\) > $(*:s,/,\).asm nasm @$(mktmp -f obj -o $@) $(*:s,/,\).asm @$(RM) -S $(mktmp $(*:s,/,\).asm) -.ENDIF +.ENDIF # Special target to build dllstart.asm using Borland TASM dllstart.obj: dllstart.asm @@ -126,26 +126,26 @@ @trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2 dll\nN $@\nF $(&:t",\n":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk rclink $(LD) $(RC) $@ $*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .ELIF $(USE_WIN32) %$D: ; @trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt_dll\nN $@\nF $(&:t",\n":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk rclink $(LD) $(RC) $@ $*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .ELSE %$D: ; @trimlib $(mktmp $(LDFLAGS) OP quiet SYS win386\nN $*.rex\nF $(&:t",\n":s/\/\\)\nLIBR $(EXELIBS:t",")) $*.lnk rclink $(LD) $(RC) $@ $*.lnk wbind $* -d -q -n .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .ENDIF .ENDIF @@ -171,18 +171,18 @@ $(LD) $(LDFLAGS) @$*.lnk x32fix $@ .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .ELIF $(USE_OS232) .IF $(USE_OS2GUI) %$E: ; @trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2_pm\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk rclink $(LD) $(RC) $@ $*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .IF $(LXLITE) lxlite $@ .ENDIF @@ -191,9 +191,9 @@ @trimlib $(mktmp $(LDFLAGS) OP quiet SYS os2v2\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk rclink $(LD) $(RC) $@ $*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .IF $(LXLITE) lxlite $@ .ENDIF @@ -203,43 +203,43 @@ @trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(DEFLIBS)$(EXELIBS:t",")) $*.lnk rclink $(LD) $(RC) $@ $*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .ELIF $(USE_WIN32) .IF $(WIN32_GUI) %$E: ; @trimlib $(mktmp $(LDFLAGS) OP quiet SYS win95\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk rclink $(LD) $(RC) $@ $*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .ELSE %$E: ; @trimlib $(mktmp $(LDFLAGS) OP quiet SYS nt\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(DEFLIBS)$(EXELIBS:t",")) $*.lnk rclink $(LD) $(RC) $@ $*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .ENDIF .ELIF $(USE_WIN386) %$E: ; @trimlib $(mktmp $(LDFLAGS) OP quiet SYS win386\nN $*.rex\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk rclink $(LD) wbind $*.rex $*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .ELIF $(USE_TNT) %$E: ; @trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR dosx32.lib,tntapi.lib,$(PMLIB)$(EXELIBS:t",")) $*.lnk $(LD) @$*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .IF $(DOSSTYLE) @markphar $@ .ENDIF @@ -250,16 +250,15 @@ $(LD) @$*.lnk @attrib +s $*.exe .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF +.ENDIF .ELSE %$E: ; @trimlib $(mktmp $(LDFLAGS) OP quiet\nN $@\nF $(&:t",":s/\/\\)\nLIBR $(PMLIB)$(EXELIBS:t",")) $*.lnk $(LD) @$*.lnk .IF $(LEAVE_LINKFILE) -.ELSE +.ELSE @$(RM) -S $(mktmp *.lnk) -.ENDIF .ENDIF - +.ENDIF diff --git a/board/MAI/bios_emulator/scitech/makedefs/startup.mk b/board/MAI/bios_emulator/scitech/makedefs/startup.mk index 1d67a97..d8b2ba2 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/startup.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/startup.mk @@ -159,4 +159,3 @@ # We dont use TABS in our makefiles .NOTABS := yes - diff --git a/board/MAI/bios_emulator/scitech/makedefs/wc32.mk b/board/MAI/bios_emulator/scitech/makedefs/wc32.mk index ff03511..e5175ca 100644 --- a/board/MAI/bios_emulator/scitech/makedefs/wc32.mk +++ b/board/MAI/bios_emulator/scitech/makedefs/wc32.mk @@ -351,4 +351,3 @@ # Define which file contains our rules RULES_MAK := wc32.mk - diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/besys.c b/board/MAI/bios_emulator/scitech/src/biosemu/besys.c index 7f7ea99..1512ce9 100644 --- a/board/MAI/bios_emulator/scitech/src/biosemu/besys.c +++ b/board/MAI/bios_emulator/scitech/src/biosemu/besys.c @@ -77,20 +77,20 @@ u8 val = 0; if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) { - val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000); - } + val = *(u8*)(_BE_env.biosmem_base + addr - 0xC0000); + } else if (addr >= 0xA0000 && addr <= 0xFFFFF) { - val = readb(_BE_env.busmem_base, addr - 0xA0000); - } + val = readb(_BE_env.busmem_base, addr - 0xA0000); + } else if (addr > M.mem_size - 1) { DB( printk("mem_read: address %#lx out of range!\n", addr);) - HALT_SYS(); - } + HALT_SYS(); + } else { - val = *(u8*)(M.mem_base + addr); - } + val = *(u8*)(M.mem_base + addr); + } DB( if (DEBUG_MEM()) - printk("%#08x 1 -> %#x\n", addr, val);) + printk("%#08x 1 -> %#x\n", addr, val);) return val; } @@ -112,42 +112,42 @@ if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) { #ifdef __BIG_ENDIAN__ - if (addr & 0x1) { - addr -= 0xC0000; - val = ( *(u8*)(_BE_env.biosmem_base + addr) | - (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8)); - } - else + if (addr & 0x1) { + addr -= 0xC0000; + val = ( *(u8*)(_BE_env.biosmem_base + addr) | + (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8)); + } + else #endif - val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000); - } + val = *(u16*)(_BE_env.biosmem_base + addr - 0xC0000); + } else if (addr >= 0xA0000 && addr <= 0xFFFFF) { #ifdef __BIG_ENDIAN__ - if (addr & 0x1) { - addr -= 0xA0000; - val = ( readb(_BE_env.busmem_base, addr) | - (readb(_BE_env.busmem_base, addr + 1) << 8)); - } - else + if (addr & 0x1) { + addr -= 0xA0000; + val = ( readb(_BE_env.busmem_base, addr) | + (readb(_BE_env.busmem_base, addr + 1) << 8)); + } + else #endif - val = readw(_BE_env.busmem_base, addr - 0xA0000); - } + val = readw(_BE_env.busmem_base, addr - 0xA0000); + } else if (addr > M.mem_size - 2) { DB( printk("mem_read: address %#lx out of range!\n", addr);) - HALT_SYS(); - } + HALT_SYS(); + } else { #ifdef __BIG_ENDIAN__ - if (addr & 0x1) { - val = ( *(u8*)(M.mem_base + addr) | - (*(u8*)(M.mem_base + addr + 1) << 8)); - } - else + if (addr & 0x1) { + val = ( *(u8*)(M.mem_base + addr) | + (*(u8*)(M.mem_base + addr + 1) << 8)); + } + else #endif - val = *(u16*)(M.mem_base + addr); - } + val = *(u16*)(M.mem_base + addr); + } DB( if (DEBUG_MEM()) - printk("%#08x 2 -> %#x\n", addr, val);) + printk("%#08x 2 -> %#x\n", addr, val);) return val; } @@ -169,48 +169,48 @@ if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) { #ifdef __BIG_ENDIAN__ - if (addr & 0x3) { - addr -= 0xC0000; - val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) | - (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) | - (*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) | - (*(u8*)(_BE_env.biosmem_base + addr + 3) << 24)); - } - else + if (addr & 0x3) { + addr -= 0xC0000; + val = ( *(u8*)(_BE_env.biosmem_base + addr + 0) | + (*(u8*)(_BE_env.biosmem_base + addr + 1) << 8) | + (*(u8*)(_BE_env.biosmem_base + addr + 2) << 16) | + (*(u8*)(_BE_env.biosmem_base + addr + 3) << 24)); + } + else #endif - val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000); - } + val = *(u32*)(_BE_env.biosmem_base + addr - 0xC0000); + } else if (addr >= 0xA0000 && addr <= 0xFFFFF) { #ifdef __BIG_ENDIAN__ - if (addr & 0x3) { - addr -= 0xA0000; - val = ( readb(_BE_env.busmem_base, addr) | - (readb(_BE_env.busmem_base, addr + 1) << 8) | - (readb(_BE_env.busmem_base, addr + 2) << 16) | - (readb(_BE_env.busmem_base, addr + 3) << 24)); - } - else + if (addr & 0x3) { + addr -= 0xA0000; + val = ( readb(_BE_env.busmem_base, addr) | + (readb(_BE_env.busmem_base, addr + 1) << 8) | + (readb(_BE_env.busmem_base, addr + 2) << 16) | + (readb(_BE_env.busmem_base, addr + 3) << 24)); + } + else #endif - val = readl(_BE_env.busmem_base, addr - 0xA0000); - } + val = readl(_BE_env.busmem_base, addr - 0xA0000); + } else if (addr > M.mem_size - 4) { DB( printk("mem_read: address %#lx out of range!\n", addr);) - HALT_SYS(); - } + HALT_SYS(); + } else { #ifdef __BIG_ENDIAN__ - if (addr & 0x3) { - val = ( *(u8*)(M.mem_base + addr + 0) | - (*(u8*)(M.mem_base + addr + 1) << 8) | - (*(u8*)(M.mem_base + addr + 2) << 16) | - (*(u8*)(M.mem_base + addr + 3) << 24)); - } - else + if (addr & 0x3) { + val = ( *(u8*)(M.mem_base + addr + 0) | + (*(u8*)(M.mem_base + addr + 1) << 8) | + (*(u8*)(M.mem_base + addr + 2) << 16) | + (*(u8*)(M.mem_base + addr + 3) << 24)); + } + else #endif - val = *(u32*)(M.mem_base + addr); - } + val = *(u32*)(M.mem_base + addr); + } DB( if (DEBUG_MEM()) - printk("%#08x 4 -> %#x\n", addr, val);) + printk("%#08x 4 -> %#x\n", addr, val);) return val; } @@ -228,20 +228,20 @@ u8 val) { DB( if (DEBUG_MEM()) - printk("%#08x 1 <- %#x\n", addr, val);) + printk("%#08x 1 <- %#x\n", addr, val);) if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) { - *(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val; - } + *(u8*)(_BE_env.biosmem_base + addr - 0xC0000) = val; + } else if (addr >= 0xA0000 && addr <= 0xFFFFF) { - writeb(val, _BE_env.busmem_base, addr - 0xA0000); - } + writeb(val, _BE_env.busmem_base, addr - 0xA0000); + } else if (addr > M.mem_size-1) { DB( printk("mem_write: address %#lx out of range!\n", addr);) - HALT_SYS(); - } + HALT_SYS(); + } else { - *(u8*)(M.mem_base + addr) = val; - } + *(u8*)(M.mem_base + addr) = val; + } } /**************************************************************************** @@ -258,43 +258,43 @@ u16 val) { DB( if (DEBUG_MEM()) - printk("%#08x 2 <- %#x\n", addr, val);) + printk("%#08x 2 <- %#x\n", addr, val);) if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) { #ifdef __BIG_ENDIAN__ - if (addr & 0x1) { - addr -= 0xC0000; - *(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff; - *(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff; - } - else + if (addr & 0x1) { + addr -= 0xC0000; + *(u8*)(_BE_env.biosmem_base + addr + 0) = (val >> 0) & 0xff; + *(u8*)(_BE_env.biosmem_base + addr + 1) = (val >> 8) & 0xff; + } + else #endif - *(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val; - } + *(u16*)(_BE_env.biosmem_base + addr - 0xC0000) = val; + } else if (addr >= 0xA0000 && addr <= 0xFFFFF) { #ifdef __BIG_ENDIAN__ - if (addr & 0x1) { - addr -= 0xA0000; - writeb(val >> 0, _BE_env.busmem_base, addr); - writeb(val >> 8, _BE_env.busmem_base, addr + 1); - } - else + if (addr & 0x1) { + addr -= 0xA0000; + writeb(val >> 0, _BE_env.busmem_base, addr); + writeb(val >> 8, _BE_env.busmem_base, addr + 1); + } + else #endif - writew(val, _BE_env.busmem_base, addr - 0xA0000); - } + writew(val, _BE_env.busmem_base, addr - 0xA0000); + } else if (addr > M.mem_size-2) { DB( printk("mem_write: address %#lx out of range!\n", addr);) - HALT_SYS(); - } + HALT_SYS(); + } else { #ifdef __BIG_ENDIAN__ - if (addr & 0x1) { - *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff; - *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff; - } - else + if (addr & 0x1) { + *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff; + *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff; + } + else #endif - *(u16*)(M.mem_base + addr) = val; - } + *(u16*)(M.mem_base + addr) = val; + } } /**************************************************************************** @@ -311,49 +311,49 @@ u32 val) { DB( if (DEBUG_MEM()) - printk("%#08x 4 <- %#x\n", addr, val);) + printk("%#08x 4 <- %#x\n", addr, val);) if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) { #ifdef __BIG_ENDIAN__ - if (addr & 0x1) { - addr -= 0xC0000; - *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff; - *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff; - *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff; - *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff; - } - else + if (addr & 0x1) { + addr -= 0xC0000; + *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff; + *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff; + *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff; + *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff; + } + else #endif - *(u32*)(M.mem_base + addr - 0xC0000) = val; - } + *(u32*)(M.mem_base + addr - 0xC0000) = val; + } else if (addr >= 0xA0000 && addr <= 0xFFFFF) { #ifdef __BIG_ENDIAN__ - if (addr & 0x3) { - addr -= 0xA0000; - writeb(val >> 0, _BE_env.busmem_base, addr); - writeb(val >> 8, _BE_env.busmem_base, addr + 1); - writeb(val >> 16, _BE_env.busmem_base, addr + 1); - writeb(val >> 24, _BE_env.busmem_base, addr + 1); - } - else + if (addr & 0x3) { + addr -= 0xA0000; + writeb(val >> 0, _BE_env.busmem_base, addr); + writeb(val >> 8, _BE_env.busmem_base, addr + 1); + writeb(val >> 16, _BE_env.busmem_base, addr + 1); + writeb(val >> 24, _BE_env.busmem_base, addr + 1); + } + else #endif - writel(val, _BE_env.busmem_base, addr - 0xA0000); - } + writel(val, _BE_env.busmem_base, addr - 0xA0000); + } else if (addr > M.mem_size-4) { DB( printk("mem_write: address %#lx out of range!\n", addr);) - HALT_SYS(); - } + HALT_SYS(); + } else { #ifdef __BIG_ENDIAN__ - if (addr & 0x1) { - *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff; - *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff; - *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff; - *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff; - } - else + if (addr & 0x1) { + *(u8*)(M.mem_base + addr + 0) = (val >> 0) & 0xff; + *(u8*)(M.mem_base + addr + 1) = (val >> 8) & 0xff; + *(u8*)(M.mem_base + addr + 2) = (val >> 16) & 0xff; + *(u8*)(M.mem_base + addr + 3) = (val >> 24) & 0xff; + } + else #endif - *(u32*)(M.mem_base + addr) = val; - } + *(u32*)(M.mem_base + addr) = val; + } } /* Debug functions to do ISA/PCI bus port I/O */ @@ -365,7 +365,7 @@ { u8 val = PM_inpb(port); if (DEBUG_IO()) - printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); + printk("%04X:%04X: inb.%04X -> %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); return val; } @@ -373,7 +373,7 @@ { u16 val = PM_inpw(port); if (DEBUG_IO()) - printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); + printk("%04X:%04X: inw.%04X -> %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); return val; } @@ -381,28 +381,28 @@ { u32 val = PM_inpd(port); if (DEBUG_IO()) - printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); + printk("%04X:%04X: inl.%04X -> %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); return val; } void X86API BE_outb(int port, u8 val) { if (DEBUG_IO()) - printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); + printk("%04X:%04X: outb.%04X <- %02X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); PM_outpb(port,val); } void X86API BE_outw(int port, u16 val) { if (DEBUG_IO()) - printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); + printk("%04X:%04X: outw.%04X <- %04X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); PM_outpw(port,val); } void X86API BE_outl(int port, u32 val) { if (DEBUG_IO()) - printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); + printk("%04X:%04X: outl.%04X <- %08X\n",M.x86.saved_cs, M.x86.saved_ip, (ushort)port, val); PM_outpd(port,val); } #endif diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/bios.c b/board/MAI/bios_emulator/scitech/src/biosemu/bios.c index 3fb4c36..c0f4a4b 100644 --- a/board/MAI/bios_emulator/scitech/src/biosemu/bios.c +++ b/board/MAI/bios_emulator/scitech/src/biosemu/bios.c @@ -50,9 +50,9 @@ int intno) { if (BE_rdw(intno * 4 + 2) == BIOS_SEG) - printk("biosEmu: undefined interrupt %xh called!\n",intno); + printk("biosEmu: undefined interrupt %xh called!\n",intno); else - X86EMU_prepareForInt(intno); + X86EMU_prepareForInt(intno); } /**************************************************************************** @@ -68,26 +68,26 @@ int intno) { if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) { - if (M.x86.R_AL == 0) { - /* Enable CPU accesses to video memory */ - PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02); - return; - } - else if (M.x86.R_AL == 1) { - /* Disable CPU accesses to video memory */ - PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02); - return; - } + if (M.x86.R_AL == 0) { + /* Enable CPU accesses to video memory */ + PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8)0x02); + return; + } + else if (M.x86.R_AL == 1) { + /* Disable CPU accesses to video memory */ + PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8)~0x02); + return; + } #ifdef DEBUG - else { - printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL); - } + else { + printk("biosEmu/bios.int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",M.x86.R_AL); + } #endif - } + } #ifdef DEBUG else { - printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL); - } + printk("biosEmu/bios.int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",M.x86.R_AH, M.x86.R_AL, M.x86.R_BL); + } #endif } @@ -106,9 +106,9 @@ int intno) { if (BE_rdw(intno * 4 + 2) == BIOS_SEG) - int42(intno); + int42(intno); else - X86EMU_prepareForInt(intno); + X86EMU_prepareForInt(intno); } /* Result codes returned by the PCI BIOS */ @@ -142,87 +142,87 @@ /* Fail if no PCI device information has been registered */ if (!_BE_env.vgaInfo.pciInfo) - return; + return; pciSlot = (u16)(_BE_env.vgaInfo.pciInfo->slot.i >> 8); switch (M.x86.R_AX) { - case 0xB101: /* PCI bios present? */ - M.x86.R_AL = 0x00; /* no config space/special cycle generation support */ - M.x86.R_EDX = 0x20494350; /* " ICP" */ - M.x86.R_BX = 0x0210; /* Version 2.10 */ - M.x86.R_CL = 0; /* Max bus number in system */ - CLEAR_FLAG(F_CF); - break; - case 0xB102: /* Find PCI device */ - M.x86.R_AH = DEVICE_NOT_FOUND; - if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID && - M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID && - M.x86.R_SI == 0) { - M.x86.R_AH = SUCCESSFUL; - M.x86.R_BX = pciSlot; - } - CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); - break; - case 0xB103: /* Find PCI class code */ - M.x86.R_AH = DEVICE_NOT_FOUND; - if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface && - M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass && - (u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) { - M.x86.R_AH = SUCCESSFUL; - M.x86.R_BX = pciSlot; - } - CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); - break; - case 0xB108: /* Read configuration byte */ - M.x86.R_AH = BAD_REGISTER_NUMBER; - if (M.x86.R_BX == pciSlot) { - M.x86.R_AH = SUCCESSFUL; - M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo); - } - CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); - break; - case 0xB109: /* Read configuration word */ - M.x86.R_AH = BAD_REGISTER_NUMBER; - if (M.x86.R_BX == pciSlot) { - M.x86.R_AH = SUCCESSFUL; - M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo); - } - CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); - break; - case 0xB10A: /* Read configuration dword */ - M.x86.R_AH = BAD_REGISTER_NUMBER; - if (M.x86.R_BX == pciSlot) { - M.x86.R_AH = SUCCESSFUL; - M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo); - } - CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); - break; - case 0xB10B: /* Write configuration byte */ - M.x86.R_AH = BAD_REGISTER_NUMBER; - if (M.x86.R_BX == pciSlot) { - M.x86.R_AH = SUCCESSFUL; - PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo); - } - CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); - break; - case 0xB10C: /* Write configuration word */ - M.x86.R_AH = BAD_REGISTER_NUMBER; - if (M.x86.R_BX == pciSlot) { - M.x86.R_AH = SUCCESSFUL; - PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo); - } - CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); - break; - case 0xB10D: /* Write configuration dword */ - M.x86.R_AH = BAD_REGISTER_NUMBER; - if (M.x86.R_BX == pciSlot) { - M.x86.R_AH = SUCCESSFUL; - PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo); - } - CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); - break; - default: - printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX); - } + case 0xB101: /* PCI bios present? */ + M.x86.R_AL = 0x00; /* no config space/special cycle generation support */ + M.x86.R_EDX = 0x20494350; /* " ICP" */ + M.x86.R_BX = 0x0210; /* Version 2.10 */ + M.x86.R_CL = 0; /* Max bus number in system */ + CLEAR_FLAG(F_CF); + break; + case 0xB102: /* Find PCI device */ + M.x86.R_AH = DEVICE_NOT_FOUND; + if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID && + M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID && + M.x86.R_SI == 0) { + M.x86.R_AH = SUCCESSFUL; + M.x86.R_BX = pciSlot; + } + CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); + break; + case 0xB103: /* Find PCI class code */ + M.x86.R_AH = DEVICE_NOT_FOUND; + if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface && + M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass && + (u8)(M.x86.R_ECX >> 16) == _BE_env.vgaInfo.pciInfo->BaseClass) { + M.x86.R_AH = SUCCESSFUL; + M.x86.R_BX = pciSlot; + } + CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); + break; + case 0xB108: /* Read configuration byte */ + M.x86.R_AH = BAD_REGISTER_NUMBER; + if (M.x86.R_BX == pciSlot) { + M.x86.R_AH = SUCCESSFUL; + M.x86.R_CL = (u8)PCI_accessReg(M.x86.R_DI,0,PCI_READ_BYTE,_BE_env.vgaInfo.pciInfo); + } + CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); + break; + case 0xB109: /* Read configuration word */ + M.x86.R_AH = BAD_REGISTER_NUMBER; + if (M.x86.R_BX == pciSlot) { + M.x86.R_AH = SUCCESSFUL; + M.x86.R_CX = (u16)PCI_accessReg(M.x86.R_DI,0,PCI_READ_WORD,_BE_env.vgaInfo.pciInfo); + } + CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); + break; + case 0xB10A: /* Read configuration dword */ + M.x86.R_AH = BAD_REGISTER_NUMBER; + if (M.x86.R_BX == pciSlot) { + M.x86.R_AH = SUCCESSFUL; + M.x86.R_ECX = (u32)PCI_accessReg(M.x86.R_DI,0,PCI_READ_DWORD,_BE_env.vgaInfo.pciInfo); + } + CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); + break; + case 0xB10B: /* Write configuration byte */ + M.x86.R_AH = BAD_REGISTER_NUMBER; + if (M.x86.R_BX == pciSlot) { + M.x86.R_AH = SUCCESSFUL; + PCI_accessReg(M.x86.R_DI,M.x86.R_CL,PCI_WRITE_BYTE,_BE_env.vgaInfo.pciInfo); + } + CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); + break; + case 0xB10C: /* Write configuration word */ + M.x86.R_AH = BAD_REGISTER_NUMBER; + if (M.x86.R_BX == pciSlot) { + M.x86.R_AH = SUCCESSFUL; + PCI_accessReg(M.x86.R_DI,M.x86.R_CX,PCI_WRITE_WORD,_BE_env.vgaInfo.pciInfo); + } + CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); + break; + case 0xB10D: /* Write configuration dword */ + M.x86.R_AH = BAD_REGISTER_NUMBER; + if (M.x86.R_BX == pciSlot) { + M.x86.R_AH = SUCCESSFUL; + PCI_accessReg(M.x86.R_DI,M.x86.R_ECX,PCI_WRITE_DWORD,_BE_env.vgaInfo.pciInfo); + } + CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF); + break; + default: + printk("biosEmu/bios.int1a: unknown function AX=%#04x\n", M.x86.R_AX); + } } /**************************************************************************** @@ -240,9 +240,9 @@ X86EMU_intrFuncs bios_intr_tab[256]; for (i = 0; i < 256; ++i) { - intrTab[i] = BIOS_SEG << 16; - bios_intr_tab[i] = undefined_intr; - } + intrTab[i] = BIOS_SEG << 16; + bios_intr_tab[i] = undefined_intr; + } bios_intr_tab[0x10] = int10; bios_intr_tab[0x1A] = int1A; bios_intr_tab[0x42] = int42; diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c b/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c index ed2717c..0052709 100644 --- a/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c +++ b/board/MAI/bios_emulator/scitech/src/biosemu/biosemu.c @@ -100,9 +100,9 @@ #endif memset(&M,0,sizeof(M)); if (memSize < 20480) - PM_fatalError("Emulator requires at least 20Kb of memory!\n"); + PM_fatalError("Emulator requires at least 20Kb of memory!\n"); if ((M.mem_base = (unsigned long)malloc(memSize)) == NULL) - PM_fatalError("Out of memory!"); + PM_fatalError("Out of memory!"); M.mem_size = memSize; _BE_env.busmem_base = (ulong)PM_mapPhysicalAddr(0xA0000,0x5FFFF,true); M.x86.debug = debugFlags; @@ -144,15 +144,15 @@ _BE_env.vgaInfo.pciInfo = info->pciInfo; _BE_env.vgaInfo.BIOSImage = info->BIOSImage; if (info->BIOSImage) { - _BE_env.biosmem_base = (ulong)info->BIOSImage; - _BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1; - } + _BE_env.biosmem_base = (ulong)info->BIOSImage; + _BE_env.biosmem_limit = 0xC0000 + info->BIOSImageLen-1; + } else { - _BE_env.biosmem_base = _BE_env.busmem_base + 0x20000; - _BE_env.biosmem_limit = 0xC7FFF; - } + _BE_env.biosmem_base = _BE_env.busmem_base + 0x20000; + _BE_env.biosmem_limit = 0xC7FFF; + } if (*((u32*)info->LowMem) == 0) - _BE_bios_init((u32*)info->LowMem); + _BE_bios_init((u32*)info->LowMem); memcpy((u8*)M.mem_base,info->LowMem,sizeof(info->LowMem)); } @@ -182,8 +182,8 @@ mode pointer that can be used to directly access the memory. NOTE: The memory is *always* in little endian format, son on non-x86 - systems you will need to do endian translations to access this - memory. + systems you will need to do endian translations to access this + memory. ****************************************************************************/ void * PMAPI BE_mapRealPointer( uint r_seg, @@ -192,11 +192,11 @@ u32 addr = ((u32)r_seg << 4) + r_off; if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) { - return (void*)(_BE_env.biosmem_base + addr - 0xC0000); - } + return (void*)(_BE_env.biosmem_base + addr - 0xC0000); + } else if (addr >= 0xA0000 && addr <= 0xFFFFF) { - return (void*)(_BE_env.busmem_base + addr - 0xA0000); - } + return (void*)(_BE_env.busmem_base + addr - 0xA0000); + } return (void*)(M.mem_base + addr); } @@ -213,8 +213,8 @@ we put the real mode code we execute for issuing interrupts). NOTE: The memory is *always* in little endian format, son on non-x86 - systems you will need to do endian translations to access this - memory. + systems you will need to do endian translations to access this + memory. ****************************************************************************/ void * PMAPI BE_getVESABuf( uint *len, @@ -416,28 +416,28 @@ PM_imports *pmImp) { static BE_exports _BE_exports = { - sizeof(BE_exports), - BE_init, - BE_setVGA, - BE_getVGA, - BE_mapRealPointer, - BE_getVESABuf, - BE_callRealMode, - BE_int86, - BE_int86x, - NULL, - BE_exit, - }; + sizeof(BE_exports), + BE_init, + BE_setVGA, + BE_getVGA, + BE_mapRealPointer, + BE_getVESABuf, + BE_callRealMode, + BE_int86, + BE_int86x, + NULL, + BE_exit, + }; int i,max; ulong *p; - // Initialize all default imports to point to fatal error handler - // for upwards compatibility. + /* Initialize all default imports to point to fatal error handler */ + /* for upwards compatibility. */ max = sizeof(_PM_imports)/sizeof(BE_initLibrary_t); for (i = 0,p = (ulong*)&_PM_imports; i < max; i++) - *p++ = (ulong)_PM_fatalErrorHandler; + *p++ = (ulong)_PM_fatalErrorHandler; - // Now copy all our imported functions + /* Now copy all our imported functions */ memcpy(&_PM_imports,pmImp,MIN(sizeof(_PM_imports),pmImp->dwSize)); return &_BE_exports; } diff --git a/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c b/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c index 96fa5a0..98d5fb8 100644 --- a/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c +++ b/board/MAI/bios_emulator/scitech/src/biosemu/warmboot.c @@ -112,16 +112,16 @@ int bar; for (bar = 0x10; bar <= 0x14; bar++) { - base = PCI_readPCIRegL(bar,device) & ~0xFF; - if (!(base & 0x1)) { - PCI_writePCIRegL(bar,0xFFFFFFFF,device); - size = PCI_readPCIRegL(bar,device) & ~0xFF; - size = ~size+1; - PCI_writePCIRegL(bar,0,device); - if (size >= MAX_BIOSLEN) - return base; - } - } + base = PCI_readPCIRegL(bar,device) & ~0xFF; + if (!(base & 0x1)) { + PCI_writePCIRegL(bar,0xFFFFFFFF,device); + size = PCI_readPCIRegL(bar,device) & ~0xFF; + size = ~size+1; + PCI_writePCIRegL(bar,0,device); + if (size >= MAX_BIOSLEN) + return base; + } + } return 0; } @@ -138,13 +138,13 @@ int i; for (i = 0; i < NumDevices; i++) { - PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i); - PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i); - PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i); - PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i); - PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i); - PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i); - } + PCI_writePCIRegL(0x10,PCI[DeviceIndex[i]].BaseAddress10,i); + PCI_writePCIRegL(0x14,PCI[DeviceIndex[i]].BaseAddress14,i); + PCI_writePCIRegL(0x18,PCI[DeviceIndex[i]].BaseAddress18,i); + PCI_writePCIRegL(0x1C,PCI[DeviceIndex[i]].BaseAddress1C,i); + PCI_writePCIRegL(0x20,PCI[DeviceIndex[i]].BaseAddress20,i); + PCI_writePCIRegL(0x24,PCI[DeviceIndex[i]].BaseAddress24,i); + } } /**************************************************************************** @@ -165,29 +165,29 @@ RMREGS regs; RMSREGS sregs; - // Determine the value to store in AX for BIOS POST + /* Determine the value to store in AX for BIOS POST */ regs.x.ax = (u16)(PCI[DeviceIndex[device]].slot.i >> 8); if (useV86) { - // Post the BIOS using the PM functions (ie: v86 mode on Linux) - if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) { - // If the PM function fails, this probably means are we are on - // DOS and can't re-map the real mode 0xC0000 region. In thise - // case if the device is the primary, we can use the real - // BIOS at 0xC0000 directly. - if (device == 0) - PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen); - } - } + /* Post the BIOS using the PM functions (ie: v86 mode on Linux) */ + if (!PM_doBIOSPOST(regs.x.ax,BIOSPhysAddr,mappedBIOS,BIOSLen)) { + /* If the PM function fails, this probably means are we are on */ + /* DOS and can't re-map the real mode 0xC0000 region. In thise */ + /* case if the device is the primary, we can use the real */ + /* BIOS at 0xC0000 directly. */ + if (device == 0) + PM_doBIOSPOST(regs.x.ax,0xC0000,mappedBIOS,BIOSLen); + } + } else { - // Setup the X86 emulator for the VGA BIOS - BE_setVGA(&VGAInfo[device]); + /* Setup the X86 emulator for the VGA BIOS */ + BE_setVGA(&VGAInfo[device]); - // Execute the BIOS POST code - BE_callRealMode(0xC000,0x0003,®s,&sregs); + /* Execute the BIOS POST code */ + BE_callRealMode(0xC000,0x0003,®s,&sregs); - // Cleanup and exit - BE_getVGA(&VGAInfo[device]); - } + /* Cleanup and exit */ + BE_getVGA(&VGAInfo[device]); + } } /**************************************************************************** @@ -206,113 +206,113 @@ char filename[_MAX_PATH]; FILE *f; - // Disable the primary display controller and AGP VGA pass-through + /* Disable the primary display controller and AGP VGA pass-through */ DISABLE_DEVICE(0); if (AGPBridge) - DISABLE_AGP_VGA(); + DISABLE_AGP_VGA(); - // Now POST all the secondary controllers + /* Now POST all the secondary controllers */ for (device = 0; device < NumDevices; device++) { - // Skip the device if it is not enabled (probably an ISA device) - if (DeviceIndex[device] == -1) - continue; + /* Skip the device if it is not enabled (probably an ISA device) */ + if (DeviceIndex[device] == -1) + continue; - // Enable secondary display controller. If the secondary controller - // is on the AGP bus, then enable VGA resources for the AGP device. - ENABLE_DEVICE(device); - if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus) - ENABLE_AGP_VGA(); + /* Enable secondary display controller. If the secondary controller */ + /* is on the AGP bus, then enable VGA resources for the AGP device. */ + ENABLE_DEVICE(device); + if (AGPBridge && AGPBridge->SecondayBusNumber == PCI[DeviceIndex[device]].slot.p.Bus) + ENABLE_AGP_VGA(); - // Check if the controller has already been POST'ed - if (VGA_NOT_ACTIVE()) { - // Find a viable place to map the secondary PCI BIOS image and map it - printk("Device %d not enabled, so attempting warm boot it\n", device); + /* Check if the controller has already been POST'ed */ + if (VGA_NOT_ACTIVE()) { + /* Find a viable place to map the secondary PCI BIOS image and map it */ + printk("Device %d not enabled, so attempting warm boot it\n", device); - // For AGP devices (and PCI devices that do have the ROM base - // address zero'ed out) we have to map the BIOS to a location - // that is passed by the AGP bridge to the bus. Some AGP devices - // have the ROM base address already set up for us, and some - // do not (we map to one of the existing BAR locations in - // this case). - mappedBIOS = NULL; - if (PCI[DeviceIndex[device]].ROMBaseAddress != 0) - mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF; - else - mappedBIOSPhys = PCI_findBIOSAddr(device); - printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys); - mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false); - PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device); - BIOSImageLen = mappedBIOS[2] * 512; - if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL) - return false; - memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen); - PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1); + /* For AGP devices (and PCI devices that do have the ROM base */ + /* address zero'ed out) we have to map the BIOS to a location */ + /* that is passed by the AGP bridge to the bus. Some AGP devices */ + /* have the ROM base address already set up for us, and some */ + /* do not (we map to one of the existing BAR locations in */ + /* this case). */ + mappedBIOS = NULL; + if (PCI[DeviceIndex[device]].ROMBaseAddress != 0) + mappedBIOSPhys = PCI[DeviceIndex[device]].ROMBaseAddress & ~0xF; + else + mappedBIOSPhys = PCI_findBIOSAddr(device); + printk("Mapping BIOS image to 0x%08X\n", mappedBIOSPhys); + mappedBIOS = PM_mapPhysicalAddr(mappedBIOSPhys,MAX_BIOSLEN-1,false); + PCI_writePCIRegL(0x30,mappedBIOSPhys | 0x1,device); + BIOSImageLen = mappedBIOS[2] * 512; + if ((copyOfBIOS = malloc(BIOSImageLen)) == NULL) + return false; + memcpy(copyOfBIOS,mappedBIOS,BIOSImageLen); + PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1); - // Allocate memory to store copy of BIOS from secondary controllers - VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]]; - VGAInfo[device].BIOSImage = copyOfBIOS; - VGAInfo[device].BIOSImageLen = BIOSImageLen; + /* Allocate memory to store copy of BIOS from secondary controllers */ + VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]]; + VGAInfo[device].BIOSImage = copyOfBIOS; + VGAInfo[device].BIOSImageLen = BIOSImageLen; - // Restore device mappings - PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device); - PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device); - PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device); + /* Restore device mappings */ + PCI_writePCIRegL(0x30,PCI[DeviceIndex[device]].ROMBaseAddress,device); + PCI_writePCIRegL(0x10,PCI[DeviceIndex[device]].BaseAddress10,device); + PCI_writePCIRegL(0x14,PCI[DeviceIndex[device]].BaseAddress14,device); - // Now execute the BIOS POST for the device - if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) { - printk("Executing BIOS POST for controller.\n"); - PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen); - } + /* Now execute the BIOS POST for the device */ + if (copyOfBIOS[0] == 0x55 && copyOfBIOS[1] == 0xAA) { + printk("Executing BIOS POST for controller.\n"); + PCI_doBIOSPOST(device,mappedBIOSPhys,copyOfBIOS,BIOSImageLen); + } - // Reset the size of the BIOS image to the final size - VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN; + /* Reset the size of the BIOS image to the final size */ + VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN; - // Save the BIOS and interrupt vector information to disk - sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device); - if ((f = fopen(filename,"wb")) != NULL) { - fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f); - fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f); - fclose(f); - } - } - else { - // Allocate memory to store copy of BIOS from secondary controllers - if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL) - return false; - VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]]; - VGAInfo[device].BIOSImage = copyOfBIOS; - VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN; + /* Save the BIOS and interrupt vector information to disk */ + sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device); + if ((f = fopen(filename,"wb")) != NULL) { + fwrite(copyOfBIOS,1,FINAL_BIOSLEN,f); + fwrite(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f); + fclose(f); + } + } + else { + /* Allocate memory to store copy of BIOS from secondary controllers */ + if ((copyOfBIOS = malloc(FINAL_BIOSLEN)) == NULL) + return false; + VGAInfo[device].pciInfo = &PCI[DeviceIndex[device]]; + VGAInfo[device].BIOSImage = copyOfBIOS; + VGAInfo[device].BIOSImageLen = FINAL_BIOSLEN; - // Load the BIOS and interrupt vector information from disk - sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device); - if ((f = fopen(filename,"rb")) != NULL) { - fread(copyOfBIOS,1,FINAL_BIOSLEN,f); - fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f); - fclose(f); - } - } + /* Load the BIOS and interrupt vector information from disk */ + sprintf(filename,"%s/bios.%02d",PM_getNucleusConfigPath(),device); + if ((f = fopen(filename,"rb")) != NULL) { + fread(copyOfBIOS,1,FINAL_BIOSLEN,f); + fread(VGAInfo[device].LowMem,1,sizeof(VGAInfo[device].LowMem),f); + fclose(f); + } + } - // Fix up all the secondary PCI base address registers - // (restores them all from the values we read previously) - _PCI_fixupSecondaryBARs(); + /* Fix up all the secondary PCI base address registers */ + /* (restores them all from the values we read previously) */ + _PCI_fixupSecondaryBARs(); - // Disable the secondary controller and AGP VGA pass-through - DISABLE_DEVICE(device); - if (AGPBridge) - DISABLE_AGP_VGA(); - } + /* Disable the secondary controller and AGP VGA pass-through */ + DISABLE_DEVICE(device); + if (AGPBridge) + DISABLE_AGP_VGA(); + } - // Reenable primary display controller and reset AGP bridge control + /* Reenable primary display controller and reset AGP bridge control */ if (AGPBridge) - RESTORE_AGP_VGA(); + RESTORE_AGP_VGA(); ENABLE_DEVICE(0); - // Free physical BIOS image mapping + /* Free physical BIOS image mapping */ PM_freePhysicalAddr(mappedBIOS,MAX_BIOSLEN-1); - // Restore the X86 emulator BIOS info to primary controller + /* Restore the X86 emulator BIOS info to primary controller */ if (!useV86) - BE_setVGA(&VGAInfo[0]); + BE_setVGA(&VGAInfo[0]); return true; } @@ -327,123 +327,123 @@ PCIBridgeInfo *info; printk("Displaying enumeration of PCI bus (%d devices, %d display devices)\n", - NumPCI, NumDevices); + NumPCI, NumDevices); for (index = 0; index < NumDevices; index++) - printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]); + printk(" Display device %d is PCI device %d\n",index,DeviceIndex[index]); printk("\n"); printk("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n"); for (i = 0; i < NumPCI; i++) { - printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ", - PCI[i].slot.p.Bus, - PCI[i].slot.p.Device, - PCI[i].slot.p.Function, - PCI[i].VendorID, - PCI[i].DeviceID, - PCI[i].SubSystemVendorID, - PCI[i].SubSystemID, - PCI[i].RevID, - PCI[i].BaseClass, - PCI[i].SubClass, - PCI[i].InterruptLine, - PCI[i].InterruptPin, - PCI[i].Command); - for (index = 0; index < NumDevices; index++) { - if (DeviceIndex[index] == i) - break; - } - if (index < NumDevices) - printk("<- %d\n", index); - else - printk("\n"); - } + printk("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ", + PCI[i].slot.p.Bus, + PCI[i].slot.p.Device, + PCI[i].slot.p.Function, + PCI[i].VendorID, + PCI[i].DeviceID, + PCI[i].SubSystemVendorID, + PCI[i].SubSystemID, + PCI[i].RevID, + PCI[i].BaseClass, + PCI[i].SubClass, + PCI[i].InterruptLine, + PCI[i].InterruptPin, + PCI[i].Command); + for (index = 0; index < NumDevices; index++) { + if (DeviceIndex[index] == i) + break; + } + if (index < NumDevices) + printk("<- %d\n", index); + else + printk("\n"); + } printk("\n"); printk("DeviceID Stat Ifc Cch Lat Hdr BIST\n"); for (i = 0; i < NumPCI; i++) { - printk("%04X:%04X %04X %02X %02X %02X %02X %02X ", - PCI[i].VendorID, - PCI[i].DeviceID, - PCI[i].Status, - PCI[i].Interface, - PCI[i].CacheLineSize, - PCI[i].LatencyTimer, - PCI[i].HeaderType, - PCI[i].BIST); - for (index = 0; index < NumDevices; index++) { - if (DeviceIndex[index] == i) - break; - } - if (index < NumDevices) - printk("<- %d\n", index); - else - printk("\n"); - } + printk("%04X:%04X %04X %02X %02X %02X %02X %02X ", + PCI[i].VendorID, + PCI[i].DeviceID, + PCI[i].Status, + PCI[i].Interface, + PCI[i].CacheLineSize, + PCI[i].LatencyTimer, + PCI[i].HeaderType, + PCI[i].BIST); + for (index = 0; index < NumDevices; index++) { + if (DeviceIndex[index] == i) + break; + } + if (index < NumDevices) + printk("<- %d\n", index); + else + printk("\n"); + } printk("\n"); printk("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n"); for (i = 0; i < NumPCI; i++) { - printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ", - PCI[i].VendorID, - PCI[i].DeviceID, - PCI[i].BaseAddress10, - PCI[i].BaseAddress14, - PCI[i].BaseAddress18, - PCI[i].BaseAddress1C, - PCI[i].BaseAddress20, - PCI[i].BaseAddress24, - PCI[i].ROMBaseAddress); - for (index = 0; index < NumDevices; index++) { - if (DeviceIndex[index] == i) - break; - } - if (index < NumDevices) - printk("<- %d\n", index); - else - printk("\n"); - } + printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ", + PCI[i].VendorID, + PCI[i].DeviceID, + PCI[i].BaseAddress10, + PCI[i].BaseAddress14, + PCI[i].BaseAddress18, + PCI[i].BaseAddress1C, + PCI[i].BaseAddress20, + PCI[i].BaseAddress24, + PCI[i].ROMBaseAddress); + for (index = 0; index < NumDevices; index++) { + if (DeviceIndex[index] == i) + break; + } + if (index < NumDevices) + printk("<- %d\n", index); + else + printk("\n"); + } printk("\n"); printk("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n"); for (i = 0; i < NumPCI; i++) { - printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ", - PCI[i].VendorID, - PCI[i].DeviceID, - PCI[i].BaseAddress10Len, - PCI[i].BaseAddress14Len, - PCI[i].BaseAddress18Len, - PCI[i].BaseAddress1CLen, - PCI[i].BaseAddress20Len, - PCI[i].BaseAddress24Len, - PCI[i].ROMBaseAddressLen); - for (index = 0; index < NumDevices; index++) { - if (DeviceIndex[index] == i) - break; - } - if (index < NumDevices) - printk("<- %d\n", index); - else - printk("\n"); - } + printk("%04X:%04X %08X %08X %08X %08X %08X %08X %08X ", + PCI[i].VendorID, + PCI[i].DeviceID, + PCI[i].BaseAddress10Len, + PCI[i].BaseAddress14Len, + PCI[i].BaseAddress18Len, + PCI[i].BaseAddress1CLen, + PCI[i].BaseAddress20Len, + PCI[i].BaseAddress24Len, + PCI[i].ROMBaseAddressLen); + for (index = 0; index < NumDevices; index++) { + if (DeviceIndex[index] == i) + break; + } + if (index < NumDevices) + printk("<- %d\n", index); + else + printk("\n"); + } printk("\n"); printk("Displaying enumeration of %d bridge devices\n",NumBridges); printk("\n"); printk("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n"); for (i = 0; i < NumBridges; i++) { - info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]]; - printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n", - info->VendorID, - info->DeviceID, - info->PrimaryBusNumber, - info->SecondayBusNumber, - info->SubordinateBusNumber, - ((u16)info->IOBase << 8) & 0xF000, - info->IOLimit ? - ((u16)info->IOLimit << 8) | 0xFFF : 0, - ((u32)info->MemoryBase << 16) & 0xFFF00000, - info->MemoryLimit ? - ((u32)info->MemoryLimit << 16) | 0xFFFFF : 0, - ((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000, - info->PrefetchableMemoryLimit ? - ((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0, - info->BridgeControl); - } + info = (PCIBridgeInfo*)&PCI[BridgeIndex[i]]; + printk("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n", + info->VendorID, + info->DeviceID, + info->PrimaryBusNumber, + info->SecondayBusNumber, + info->SubordinateBusNumber, + ((u16)info->IOBase << 8) & 0xF000, + info->IOLimit ? + ((u16)info->IOLimit << 8) | 0xFFF : 0, + ((u32)info->MemoryBase << 16) & 0xFFF00000, + info->MemoryLimit ? + ((u32)info->MemoryLimit << 16) | 0xFFFFF : 0, + ((u32)info->PrefetchableMemoryBase << 16) & 0xFFF00000, + info->PrefetchableMemoryLimit ? + ((u32)info->PrefetchableMemoryLimit << 16) | 0xFFFFF : 0, + info->BridgeControl); + } printk("\n"); } @@ -460,51 +460,51 @@ int i,j; PCIBridgeInfo *info; - // If this is the first time we have been called, enumerate all - // devices on the PCI bus. + /* If this is the first time we have been called, enumerate all */ + /* devices on the PCI bus. */ if (NumPCI == -1) { - for (i = 0; i < MAX_PCI_DEVICES; i++) - PCI[i].dwSize = sizeof(PCI[i]); - if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0) - return -1; + for (i = 0; i < MAX_PCI_DEVICES; i++) + PCI[i].dwSize = sizeof(PCI[i]); + if ((NumPCI = PCI_enumerate(PCI,MAX_PCI_DEVICES)) == 0) + return -1; - // Build a list of all PCI bridge devices - for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) { - if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) { - if (NumBridges < MAX_PCI_DEVICES) - BridgeIndex[NumBridges++] = i; - } - } + /* Build a list of all PCI bridge devices */ + for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) { + if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) { + if (NumBridges < MAX_PCI_DEVICES) + BridgeIndex[NumBridges++] = i; + } + } - // Now build a list of all display class devices - for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) { - if (PCI_IS_DISPLAY_CLASS(&PCI[i])) { - if ((PCI[i].Command & 0x3) == 0x3) { - DeviceIndex[0] = i; - } - else { - if (NumDevices < MAX_PCI_DEVICES) - DeviceIndex[NumDevices++] = i; - } - if (PCI[i].slot.p.Bus != 0) { - // This device is on a different bus than the primary - // PCI bus, so it is probably an AGP device. Find the - // AGP bus device that controls that bus so we can - // control it. - for (j = 0; j < NumBridges; j++) { - info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]]; - if (info->SecondayBusNumber == PCI[i].slot.p.Bus) { - AGPBridge = info; - break; - } - } - } - } - } + /* Now build a list of all display class devices */ + for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) { + if (PCI_IS_DISPLAY_CLASS(&PCI[i])) { + if ((PCI[i].Command & 0x3) == 0x3) { + DeviceIndex[0] = i; + } + else { + if (NumDevices < MAX_PCI_DEVICES) + DeviceIndex[NumDevices++] = i; + } + if (PCI[i].slot.p.Bus != 0) { + /* This device is on a different bus than the primary */ + /* PCI bus, so it is probably an AGP device. Find the */ + /* AGP bus device that controls that bus so we can */ + /* control it. */ + for (j = 0; j < NumBridges; j++) { + info = (PCIBridgeInfo*)&PCI[BridgeIndex[j]]; + if (info->SecondayBusNumber == PCI[i].slot.p.Bus) { + AGPBridge = info; + break; + } + } + } + } + } - // Enumerate all PCI and bridge devices to log file - EnumeratePCI(); - } + /* Enumerate all PCI and bridge devices to log file */ + EnumeratePCI(); + } return NumDevices; } @@ -522,48 +522,48 @@ int main(int argc,char *argv[]) { while (argc > 1) { - if (stricmp(argv[1],"-usev86") == 0) { - useV86 = true; - } - else if (stricmp(argv[1],"-force") == 0) { - forcePost = true; - } + if (stricmp(argv[1],"-usev86") == 0) { + useV86 = true; + } + else if (stricmp(argv[1],"-force") == 0) { + forcePost = true; + } #ifdef DEBUG - else if (stricmp(argv[1],"-decode") == 0) { - debugFlags |= DEBUG_DECODE_F; - } - else if (stricmp(argv[1],"-iotrace") == 0) { - debugFlags |= DEBUG_IO_TRACE_F; - } + else if (stricmp(argv[1],"-decode") == 0) { + debugFlags |= DEBUG_DECODE_F; + } + else if (stricmp(argv[1],"-iotrace") == 0) { + debugFlags |= DEBUG_IO_TRACE_F; + } #endif - else { - printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n"); - exit(-1); - } - argc--; - argv++; - } + else { + printf("Usage: warmboot [-usev86] [-force] [-decode] [-iotrace]\n"); + exit(-1); + } + argc--; + argv++; + } if ((logfile = fopen("warmboot.log","w")) == NULL) - exit(1); + exit(1); PM_init(); if (!useV86) { - // Initialise the x86 BIOS emulator - BE_init(false,debugFlags,65536,&VGAInfo[0]); - } + /* Initialise the x86 BIOS emulator */ + BE_init(false,debugFlags,65536,&VGAInfo[0]); + } - // Enumerate all devices (which POST's them at the same time) + /* Enumerate all devices (which POST's them at the same time) */ if (PCI_enumerateDevices() < 1) { - printk("No PCI display devices found!\n"); - return -1; - } + printk("No PCI display devices found!\n"); + return -1; + } - // Post all the display controller BIOS'es + /* Post all the display controller BIOS'es */ PCI_postControllers(); - // Cleanup and exit the emulator + /* Cleanup and exit the emulator */ if (!useV86) - BE_exit(); + BE_exit(); fclose(logfile); return 0; } diff --git a/board/MAI/bios_emulator/scitech/src/common/aabeos.c b/board/MAI/bios_emulator/scitech/src/common/aabeos.c index ba86459..ad5698a 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aabeos.c +++ b/board/MAI/bios_emulator/scitech/src/common/aabeos.c @@ -70,7 +70,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - haveRDTSC = true; + haveRDTSC = true; return true; } @@ -82,11 +82,11 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else { - struct timeval t; - gettimeofday(&t, NULL); - value->low = t.tv_sec*1000000 + t.tv_usec; - value->high = 0; - } + struct timeval t; + gettimeofday(&t, NULL); + value->low = t.tv_sec*1000000 + t.tv_usec; + value->high = 0; + } } diff --git a/board/MAI/bios_emulator/scitech/src/common/aados.c b/board/MAI/bios_emulator/scitech/src/common/aados.c index e994f93..342d2f3 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aados.c +++ b/board/MAI/bios_emulator/scitech/src/common/aados.c @@ -49,7 +49,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - return true; + return true; return false; } diff --git a/board/MAI/bios_emulator/scitech/src/common/aalib.c b/board/MAI/bios_emulator/scitech/src/common/aalib.c index 84bf7b3..5003b22 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aalib.c +++ b/board/MAI/bios_emulator/scitech/src/common/aalib.c @@ -100,35 +100,35 @@ /* Check if we have already loaded the driver */ if (loaded) - return true; + return true; PM_init(); _AA_exports.dwSize = sizeof(_AA_exports); /* Open the BPD file */ if (!PM_findBPD(DLL_NAME,bpdpath)) - return false; + return false; strcpy(filename,bpdpath); strcat(filename,DLL_NAME); if ((hModBPD = PE_loadLibrary(filename,false)) == NULL) - return false; + return false; if ((AA_initLibrary = (AA_initLibrary_t)PE_getProcAddress(hModBPD,"_AA_initLibrary")) == NULL) - return false; + return false; bpdpath[strlen(bpdpath)-1] = 0; if (strcmp(bpdpath,PM_getNucleusPath()) == 0) - strcpy(bpdpath,PM_getNucleusConfigPath()); + strcpy(bpdpath,PM_getNucleusConfigPath()); else { - PM_backslash(bpdpath); - strcat(bpdpath,"config"); - } + PM_backslash(bpdpath); + strcat(bpdpath,"config"); + } if ((aaExp = AA_initLibrary(bpdpath,filename,&_PM_imports,&_N_imports,&_AA_imports)) == NULL) - PM_fatalError("AA_initLibrary failed!\n"); + PM_fatalError("AA_initLibrary failed!\n"); /* Initialize all default imports to point to fatal error handler * for upwards compatibility, and copy the exported functions. */ max = sizeof(_AA_exports)/sizeof(AA_initLibrary_t); for (i = 0,p = (ulong*)&_AA_exports; i < max; i++) - *p++ = (ulong)_AA_fatalErrorHandler; + *p++ = (ulong)_AA_fatalErrorHandler; memcpy(&_AA_exports,aaExp,MIN(sizeof(_AA_exports),aaExp->dwSize)); loaded = true; return true; @@ -143,7 +143,7 @@ int NAPI AA_status(void) { if (!loaded) - return nDriverNotFound; + return nDriverNotFound; return _AA_exports.AA_status(); } @@ -152,7 +152,7 @@ N_int32 status) { if (!loaded) - return "Unable to load Nucleus device driver!"; + return "Unable to load Nucleus device driver!"; return _AA_exports.AA_errorMsg(status); } @@ -160,7 +160,7 @@ int NAPI AA_getDaysLeft(void) { if (!LoadDriver()) - return -1; + return -1; return _AA_exports.AA_getDaysLeft(); } @@ -168,7 +168,7 @@ int NAPI AA_registerLicense(uchar *license) { if (!LoadDriver()) - return 0; + return 0; return _AA_exports.AA_registerLicense(license); } @@ -176,7 +176,7 @@ int NAPI AA_enumerateDevices(void) { if (!LoadDriver()) - return 0; + return 0; return _AA_exports.AA_enumerateDevices(); } @@ -184,7 +184,7 @@ AA_devCtx * NAPI AA_loadDriver(N_int32 deviceIndex) { if (!LoadDriver()) - return NULL; + return NULL; return _AA_exports.AA_loadDriver(deviceIndex); } #endif @@ -211,15 +211,15 @@ LZTimerObject tm; if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { - if (!inited) { - ZTimerInit(); - inited = true; - } - LZTimerOnExt(&tm); - while (LZTimerLapExt(&tm) < microSeconds) - ; - LZTimerOnExt(&tm); - } + if (!inited) { + ZTimerInit(); + inited = true; + } + LZTimerOnExt(&tm); + while (LZTimerLapExt(&tm) < microSeconds) + ; + LZTimerOnExt(&tm); + } else - _OS_delay8253(microSeconds); + _OS_delay8253(microSeconds); } diff --git a/board/MAI/bios_emulator/scitech/src/common/aalinux.c b/board/MAI/bios_emulator/scitech/src/common/aalinux.c index 4385b23..d3d468e 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aalinux.c +++ b/board/MAI/bios_emulator/scitech/src/common/aalinux.c @@ -72,7 +72,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - haveRDTSC = true; + haveRDTSC = true; return true; } @@ -84,11 +84,11 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else { - struct timeval t; - gettimeofday(&t, NULL); - value->low = t.tv_sec*1000000 + t.tv_usec; - value->high = 0; - } + struct timeval t; + gettimeofday(&t, NULL); + value->low = t.tv_sec*1000000 + t.tv_usec; + value->high = 0; + } } diff --git a/board/MAI/bios_emulator/scitech/src/common/aaos2.c b/board/MAI/bios_emulator/scitech/src/common/aaos2.c index 486b96a..0ec8c9f 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aaos2.c +++ b/board/MAI/bios_emulator/scitech/src/common/aaos2.c @@ -65,25 +65,25 @@ /* Open our helper device driver */ if (DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0, - FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE, - NULL)) - PM_fatalError("Unable to open SDDHELP$ helper device driver!"); + FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE, + NULL)) + PM_fatalError("Unable to open SDDHELP$ helper device driver!"); outLen = sizeof(result); DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,PMHELP_GETSHAREDINFO, - NULL, 0, NULL, - &result, outLen, &outLen); + NULL, 0, NULL, + &result, outLen, &outLen); DosClose(hSDDHelp); if (result) { - /* We have found the shared Nucleus packet. Because not all processes - * map to SDDPMI.DLL, we need to ensure that we connect to this - * DLL so that it gets mapped into our address space (that is - * where the shared Nucleus packet is located). Simply doing a - * DosLoadModule on it is enough for this. - */ - HMODULE hModSDDPMI; - char buf[80]; - DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI); - } + /* We have found the shared Nucleus packet. Because not all processes + * map to SDDPMI.DLL, we need to ensure that we connect to this + * DLL so that it gets mapped into our address space (that is + * where the shared Nucleus packet is located). Simply doing a + * DosLoadModule on it is enough for this. + */ + HMODULE hModSDDPMI; + char buf[80]; + DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI); + } return (GA_sharedInfo*)result; } @@ -106,7 +106,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - haveRDTSC = true; + haveRDTSC = true; return true; } @@ -118,7 +118,7 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else - DosTmrQueryTime((QWORD*)value); + DosTmrQueryTime((QWORD*)value); } diff --git a/board/MAI/bios_emulator/scitech/src/common/aaqnx.c b/board/MAI/bios_emulator/scitech/src/common/aaqnx.c index 2e26c9a..13531be 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aaqnx.c +++ b/board/MAI/bios_emulator/scitech/src/common/aaqnx.c @@ -72,7 +72,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - haveRDTSC = true; + haveRDTSC = true; return true; } @@ -84,12 +84,12 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else { - struct timespec ts; + struct timespec ts; - clock_gettime(CLOCK_REALTIME, &ts); - value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000); - value->high = 0; - } + clock_gettime(CLOCK_REALTIME, &ts); + value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000); + value->high = 0; + } } diff --git a/board/MAI/bios_emulator/scitech/src/common/aartt.c b/board/MAI/bios_emulator/scitech/src/common/aartt.c index 17a06b5..1a5a67a 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aartt.c +++ b/board/MAI/bios_emulator/scitech/src/common/aartt.c @@ -71,9 +71,9 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { - haveRDTSC = true; - return true; - } + haveRDTSC = true; + return true; + } return false; } @@ -85,5 +85,5 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); } diff --git a/board/MAI/bios_emulator/scitech/src/common/aasmx.c b/board/MAI/bios_emulator/scitech/src/common/aasmx.c index 56cbd5b..163060f 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aasmx.c +++ b/board/MAI/bios_emulator/scitech/src/common/aasmx.c @@ -68,7 +68,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - return true; + return true; return false; } diff --git a/board/MAI/bios_emulator/scitech/src/common/aavxd.c b/board/MAI/bios_emulator/scitech/src/common/aavxd.c index 295533d..221b02b 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aavxd.c +++ b/board/MAI/bios_emulator/scitech/src/common/aavxd.c @@ -71,8 +71,8 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { - haveRDTSC = true; - } + haveRDTSC = true; + } return true; } @@ -84,7 +84,7 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else - VTD_Get_Real_Time(&value->high,&value->low); + VTD_Get_Real_Time(&value->high,&value->low); } diff --git a/board/MAI/bios_emulator/scitech/src/common/aawin32.c b/board/MAI/bios_emulator/scitech/src/common/aawin32.c index f63f004..541df4a 100644 --- a/board/MAI/bios_emulator/scitech/src/common/aawin32.c +++ b/board/MAI/bios_emulator/scitech/src/common/aawin32.c @@ -75,9 +75,9 @@ PM_init(); inBuf[0] = device; if (DeviceIoControl(_PM_hDevice, PMHELP_GETSHAREDINFO32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) { - return (GA_sharedInfo*)outBuf[0]; - } + outBuf, sizeof(outBuf), &count, NULL)) { + return (GA_sharedInfo*)outBuf[0]; + } return NULL; } @@ -102,16 +102,16 @@ GA_devCtx *dc) { if (_PM_hDevice) { - DWORD inBuf[1]; /* Buffer to send data to VxD */ - DWORD outBuf[1]; /* Buffer to receive data from VxD */ - DWORD count; /* Count of bytes returned from VxD */ + DWORD inBuf[1]; /* Buffer to send data to VxD */ + DWORD outBuf[1]; /* Buffer to receive data from VxD */ + DWORD count; /* Count of bytes returned from VxD */ - inBuf[0] = (ulong)dc; - if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) { - return outBuf[0]; - } - } + inBuf[0] = (ulong)dc; + if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOINIT32, inBuf, sizeof(inBuf), + outBuf, sizeof(outBuf), &count, NULL)) { + return outBuf[0]; + } + } return false; } @@ -122,9 +122,9 @@ static void NAPI _GA_softStereoOn(void) { if (_PM_hDevice) { - DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0, - NULL, 0, NULL, NULL); - } + DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOON32, NULL, 0, + NULL, 0, NULL, NULL); + } } /**************************************************************************** @@ -137,14 +137,14 @@ N_uint32 rightAddr) { if (_PM_hDevice) { - DWORD inBuf[2]; /* Buffer to send data to VxD */ - DWORD count; /* Count of bytes returned from VxD */ + DWORD inBuf[2]; /* Buffer to send data to VxD */ + DWORD count; /* Count of bytes returned from VxD */ - inBuf[0] = (ulong)leftAddr; - inBuf[1] = (ulong)rightAddr; - DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf), - NULL, 0, &count, NULL); - } + inBuf[0] = (ulong)leftAddr; + inBuf[1] = (ulong)rightAddr; + DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIP32, inBuf, sizeof(inBuf), + NULL, 0, &count, NULL); + } } /**************************************************************************** @@ -154,14 +154,14 @@ static N_int32 NAPI _GA_softStereoGetFlipStatus(void) { if (_PM_hDevice) { - DWORD outBuf[1]; /* Buffer to receive data from VxD */ - DWORD count; /* Count of bytes returned from VxD */ + DWORD outBuf[1]; /* Buffer to receive data from VxD */ + DWORD count; /* Count of bytes returned from VxD */ - if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0, - outBuf, sizeof(outBuf), &count, NULL)) { - return outBuf[0]; - } - } + if (DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOFLIPSTATUS32, NULL, 0, + outBuf, sizeof(outBuf), &count, NULL)) { + return outBuf[0]; + } + } return 0; } @@ -172,7 +172,7 @@ static void NAPI _GA_softStereoWaitTillFlipped(void) { while (!_GA_softStereoGetFlipStatus()) - ; + ; } /**************************************************************************** @@ -182,9 +182,9 @@ static void NAPI _GA_softStereoOff(void) { if (_PM_hDevice) { - DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0, - NULL, 0, NULL, NULL); - } + DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOOFF32, NULL, 0, + NULL, 0, NULL, NULL); + } } /**************************************************************************** @@ -195,9 +195,9 @@ static void NAPI _GA_softStereoExit(void) { if (_PM_hDevice) { - DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0, - NULL, 0, NULL, NULL); - } + DeviceIoControl(_PM_hDevice, PMHELP_GASTEREOEXIT32, NULL, 0, + NULL, 0, NULL, NULL); + } } /**************************************************************************** @@ -217,14 +217,14 @@ N_int32 totalMemory = 0,oldIOPL; if (deviceIndex >= GA_MAX_DEVICES) - PM_fatalError("DeviceIndex too large in GA_loadDriver!"); + PM_fatalError("DeviceIndex too large in GA_loadDriver!"); PM_init(); inBuf[0] = deviceIndex; if (DeviceIoControl(_PM_hDevice, PMHELP_GETMEMSIZE32, - inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL)) - totalMemory = outBuf[0]; + inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), NULL, NULL)) + totalMemory = outBuf[0]; if (totalMemory == 0) - totalMemory = 8192; + totalMemory = 8192; _GA_exports.GA_forceMemSize(totalMemory,shared); oldIOPL = PM_setIOPL(3); dc = ORG_GA_loadDriver(deviceIndex,shared); @@ -240,13 +240,13 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { - haveRDTSC = true; - return true; - } + haveRDTSC = true; + return true; + } else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) { - haveRDTSC = false; - return true; - } + haveRDTSC = false; + return true; + } return false; } @@ -258,7 +258,7 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else - QueryPerformanceCounter((LARGE_INTEGER*)value); + QueryPerformanceCounter((LARGE_INTEGER*)value); } diff --git a/board/MAI/bios_emulator/scitech/src/common/agplib.c b/board/MAI/bios_emulator/scitech/src/common/agplib.c index df8f932..476eedc 100644 --- a/board/MAI/bios_emulator/scitech/src/common/agplib.c +++ b/board/MAI/bios_emulator/scitech/src/common/agplib.c @@ -88,31 +88,31 @@ /* Check if we have already loaded the driver */ if (loaded) - return true; + return true; PM_init(); /* Open the BPD file */ if (!PM_findBPD(DLL_NAME,bpdpath)) - return false; + return false; strcpy(filename,bpdpath); strcat(filename,DLL_NAME); if ((hModBPD = PE_loadLibrary(filename,false)) == NULL) - return false; + return false; if ((AGP_initLibrary = (AGP_initLibrary_t)PE_getProcAddress(hModBPD,"_AGP_initLibrary")) == NULL) - return false; + return false; bpdpath[strlen(bpdpath)-1] = 0; if (strcmp(bpdpath,PM_getNucleusPath()) == 0) - strcpy(bpdpath,PM_getNucleusConfigPath()); + strcpy(bpdpath,PM_getNucleusConfigPath()); else { - PM_backslash(bpdpath); - strcat(bpdpath,"config"); - } + PM_backslash(bpdpath); + strcat(bpdpath,"config"); + } if ((agpExp = AGP_initLibrary(bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_AGP_imports)) == NULL) - PM_fatalError("AGP_initLibrary failed!\n"); + PM_fatalError("AGP_initLibrary failed!\n"); _AGP_exports.dwSize = sizeof(_AGP_exports); max = sizeof(_AGP_exports)/sizeof(AGP_initLibrary_t); for (i = 0,p = (ulong*)&_AGP_exports; i < max; i++) - *p++ = (ulong)_AGP_fatalErrorHandler; + *p++ = (ulong)_AGP_fatalErrorHandler; memcpy(&_AGP_exports,agpExp,MIN(sizeof(_AGP_exports),agpExp->dwSize)); loaded = true; return true; @@ -127,7 +127,7 @@ int NAPI AGP_status(void) { if (!loaded) - return nDriverNotFound; + return nDriverNotFound; return _AGP_exports.AGP_status(); } @@ -136,7 +136,7 @@ N_int32 status) { if (!loaded) - return "Unable to load Nucleus device driver!"; + return "Unable to load Nucleus device driver!"; return _AGP_exports.AGP_errorMsg(status); } @@ -144,7 +144,7 @@ AGP_devCtx * NAPI AGP_loadDriver(N_int32 deviceIndex) { if (!LoadDriver()) - return NULL; + return NULL; return _AGP_exports.AGP_loadDriver(deviceIndex); } @@ -153,7 +153,7 @@ AGP_devCtx *dc) { if (loaded) - _AGP_exports.AGP_unloadDriver(dc); + _AGP_exports.AGP_unloadDriver(dc); } /* {secret} */ @@ -161,7 +161,7 @@ AGP_globalOptions *options) { if (LoadDriver()) - _AGP_exports.AGP_getGlobalOptions(options); + _AGP_exports.AGP_getGlobalOptions(options); } /* {secret} */ @@ -169,7 +169,7 @@ AGP_globalOptions *options) { if (LoadDriver()) - _AGP_exports.AGP_setGlobalOptions(options); + _AGP_exports.AGP_setGlobalOptions(options); } /* {secret} */ @@ -177,7 +177,7 @@ AGP_globalOptions *options) { if (loaded) - _AGP_exports.AGP_saveGlobalOptions(options); + _AGP_exports.AGP_saveGlobalOptions(options); } #endif @@ -197,24 +197,23 @@ if (!inited) { #ifndef __WIN32_VXD__ - // This has been causing problems in VxD's for some reason, so for now - // we avoid using it. - if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { - ZTimerInit(); - haveRDTSC = true; - } - else + /* This has been causing problems in VxD's for some reason, so for now */ + /* we avoid using it. */ + if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { + ZTimerInit(); + haveRDTSC = true; + } + else #endif - haveRDTSC = false; - inited = true; - } + haveRDTSC = false; + inited = true; + } if (haveRDTSC) { - LZTimerOnExt(&tm); - while (LZTimerLapExt(&tm) < microSeconds) - ; - LZTimerOnExt(&tm); - } + LZTimerOnExt(&tm); + while (LZTimerLapExt(&tm) < microSeconds) + ; + LZTimerOnExt(&tm); + } else - _OS_delay8253(microSeconds); + _OS_delay8253(microSeconds); } - diff --git a/board/MAI/bios_emulator/scitech/src/common/center.c b/board/MAI/bios_emulator/scitech/src/common/center.c index 7eb368f..68e17c2 100644 --- a/board/MAI/bios_emulator/scitech/src/common/center.c +++ b/board/MAI/bios_emulator/scitech/src/common/center.c @@ -60,19 +60,19 @@ CenterY = ((RectParent.bottom - RectParent.top) - Height) / 2; if ((CenterX < 0) || (CenterY < 0)) { - /* The Center Window is smaller than the parent window. */ - if (hWndParent != GetDesktopWindow()) { - /* If the parent window is not the desktop use the desktop size. */ - CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2; - CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2; - } - CenterX = (CenterX < 0) ? 0: CenterX; - CenterY = (CenterY < 0) ? 0: CenterY; - } + /* The Center Window is smaller than the parent window. */ + if (hWndParent != GetDesktopWindow()) { + /* If the parent window is not the desktop use the desktop size. */ + CenterX = (GetSystemMetrics(SM_CXSCREEN) - Width) / 2; + CenterY = (GetSystemMetrics(SM_CYSCREEN) - Height) / 2; + } + CenterX = (CenterX < 0) ? 0: CenterX; + CenterY = (CenterY < 0) ? 0: CenterY; + } else { - CenterX += RectParent.left; - CenterY += RectParent.top; - } + CenterX += RectParent.left; + CenterY += RectParent.top; + } /* Copy the values into RectCenter */ RectCenter.left = CenterX; @@ -82,8 +82,8 @@ /* Move the window to the new location */ MoveWindow(hWndCenter, RectCenter.left, RectCenter.top, - (RectCenter.right - RectCenter.left), - (RectCenter.bottom - RectCenter.top), repaint); + (RectCenter.right - RectCenter.left), + (RectCenter.bottom - RectCenter.top), repaint); } void _EXPORT CenterLogo(HWND hWndLogo, HWND hWndParent, int CenterY) @@ -117,7 +117,6 @@ /* Move the window to the new location */ MoveWindow(hWndLogo, RectCenter.left, RectCenter.top, - (RectCenter.right - RectCenter.left), - (RectCenter.bottom - RectCenter.top), false); + (RectCenter.right - RectCenter.left), + (RectCenter.bottom - RectCenter.top), false); } - diff --git a/board/MAI/bios_emulator/scitech/src/common/cmdline.c b/board/MAI/bios_emulator/scitech/src/common/cmdline.c index 872fae9..531e5e1 100644 --- a/board/MAI/bios_emulator/scitech/src/common/cmdline.c +++ b/board/MAI/bios_emulator/scitech/src/common/cmdline.c @@ -106,49 +106,49 @@ char *formatchar; if (argc > nextargv) { - if (nextchar == NULL) { - nextchar = argv[nextargv]; /* Index next argument */ - if (nextchar == NULL) { - nextargv++; - return ALLDONE; /* No more options */ - } - if (IS_NOT_SWITCH_CHAR(*nextchar)) { - nextchar = NULL; - return PARAMETER; /* We have a parameter */ - } - nextchar++; /* Move past switch operator */ - if (IS_SWITCH_CHAR(*nextchar)) { - nextchar = NULL; - return INVALID; /* Ignore rest of line */ - } - } - if ((ch = *(nextchar++)) == 0) { - nextchar = NULL; - return INVALID; /* No options on line */ - } + if (nextchar == NULL) { + nextchar = argv[nextargv]; /* Index next argument */ + if (nextchar == NULL) { + nextargv++; + return ALLDONE; /* No more options */ + } + if (IS_NOT_SWITCH_CHAR(*nextchar)) { + nextchar = NULL; + return PARAMETER; /* We have a parameter */ + } + nextchar++; /* Move past switch operator */ + if (IS_SWITCH_CHAR(*nextchar)) { + nextchar = NULL; + return INVALID; /* Ignore rest of line */ + } + } + if ((ch = *(nextchar++)) == 0) { + nextchar = NULL; + return INVALID; /* No options on line */ + } - if (ch == ':' || (formatchar = strchr(format, ch)) == NULL) - return INVALID; + if (ch == ':' || (formatchar = strchr(format, ch)) == NULL) + return INVALID; - if (*(++formatchar) == ':') { /* Expect an argument after option */ - nextargv++; - if (*nextchar == 0) { - if (argc <= nextargv) - return INVALID; - nextchar = argv[nextargv++]; - } - *argument = nextchar; - nextchar = NULL; - } - else { /* We have a switch style option */ - if (*nextchar == 0) { - nextargv++; - nextchar = NULL; - } - *argument = NULL; - } - return ch; /* return the option specifier */ - } + if (*(++formatchar) == ':') { /* Expect an argument after option */ + nextargv++; + if (*nextchar == 0) { + if (argc <= nextargv) + return INVALID; + nextchar = argv[nextargv++]; + } + *argument = nextchar; + nextchar = NULL; + } + else { /* We have a switch style option */ + if (*nextchar == 0) { + nextargv++; + nextchar = NULL; + } + *argument = NULL; + } + return ch; /* return the option specifier */ + } nextchar = NULL; nextargv++; return ALLDONE; /* no arguments on command line */ @@ -174,51 +174,51 @@ int num_read; switch ((int)(optarr->type)) { - case OPT_INTEGER: - num_read = sscanf(argument,"%d",(int*)optarr->arg); - break; - case OPT_HEX: - num_read = sscanf(argument,"%x",(int*)optarr->arg); - break; - case OPT_OCTAL: - num_read = sscanf(argument,"%o",(int*)optarr->arg); - break; - case OPT_UNSIGNED: - num_read = sscanf(argument,"%u",(uint*)optarr->arg); - break; - case OPT_LINTEGER: - num_read = sscanf(argument,"%ld",(long*)optarr->arg); - break; - case OPT_LHEX: - num_read = sscanf(argument,"%lx",(long*)optarr->arg); - break; - case OPT_LOCTAL: - num_read = sscanf(argument,"%lo",(long*)optarr->arg); - break; - case OPT_LUNSIGNED: - num_read = sscanf(argument,"%lu",(ulong*)optarr->arg); - break; - case OPT_FLOAT: - num_read = sscanf(argument,"%f",(float*)optarr->arg); - break; - case OPT_DOUBLE: - num_read = sscanf(argument,"%lf",(double*)optarr->arg); - break; - case OPT_LDOUBLE: - num_read = sscanf(argument,"%Lf",(long double*)optarr->arg); - break; - case OPT_STRING: - num_read = 1; /* This always works */ - *((char**)optarr->arg) = argument; - break; - default: - return INVALID; - } + case OPT_INTEGER: + num_read = sscanf(argument,"%d",(int*)optarr->arg); + break; + case OPT_HEX: + num_read = sscanf(argument,"%x",(int*)optarr->arg); + break; + case OPT_OCTAL: + num_read = sscanf(argument,"%o",(int*)optarr->arg); + break; + case OPT_UNSIGNED: + num_read = sscanf(argument,"%u",(uint*)optarr->arg); + break; + case OPT_LINTEGER: + num_read = sscanf(argument,"%ld",(long*)optarr->arg); + break; + case OPT_LHEX: + num_read = sscanf(argument,"%lx",(long*)optarr->arg); + break; + case OPT_LOCTAL: + num_read = sscanf(argument,"%lo",(long*)optarr->arg); + break; + case OPT_LUNSIGNED: + num_read = sscanf(argument,"%lu",(ulong*)optarr->arg); + break; + case OPT_FLOAT: + num_read = sscanf(argument,"%f",(float*)optarr->arg); + break; + case OPT_DOUBLE: + num_read = sscanf(argument,"%lf",(double*)optarr->arg); + break; + case OPT_LDOUBLE: + num_read = sscanf(argument,"%Lf",(long double*)optarr->arg); + break; + case OPT_STRING: + num_read = 1; /* This always works */ + *((char**)optarr->arg) = argument; + break; + default: + return INVALID; + } if (num_read == 0) - return INVALID; + return INVALID; else - return ALLDONE; + return ALLDONE; } /**************************************************************************** @@ -261,8 +261,8 @@ int num_opt, Option optarr[], int (*do_param)( - char *param, - int num)) + char *param, + int num)) { int i,opt; char *argument; @@ -273,51 +273,51 @@ strcpy(cmdstr,"hH?"); for (i = 0,opt = 3; i < num_opt; i++,opt++) { - cmdstr[opt] = optarr[i].opt; - if (optarr[i].type != OPT_SWITCH) { - cmdstr[++opt] = ':'; - } - } + cmdstr[opt] = optarr[i].opt; + if (optarr[i].type != OPT_SWITCH) { + cmdstr[++opt] = ':'; + } + } cmdstr[opt] = '\0'; for (;;) { - opt = getcmdopt(argc,argv,cmdstr,&argument); - switch (opt) { - case 'H': - case 'h': - case '?': - return HELP; - case ALLDONE: - return ALLDONE; - case INVALID: - return INVALID; - case PARAMETER: - if (do_param == NULL) - return INVALID; - if (do_param(argv[nextargv],param_num) == INVALID) - return INVALID; - nextargv++; - param_num++; - break; - default: + opt = getcmdopt(argc,argv,cmdstr,&argument); + switch (opt) { + case 'H': + case 'h': + case '?': + return HELP; + case ALLDONE: + return ALLDONE; + case INVALID: + return INVALID; + case PARAMETER: + if (do_param == NULL) + return INVALID; + if (do_param(argv[nextargv],param_num) == INVALID) + return INVALID; + nextargv++; + param_num++; + break; + default: - /* Search for the option in the option array. We are - * guaranteed to find it. - */ + /* Search for the option in the option array. We are + * guaranteed to find it. + */ - for (i = 0; i < num_opt; i++) { - if (optarr[i].opt == opt) - break; - } - if (optarr[i].type == OPT_SWITCH) - *((ibool*)optarr[i].arg) = true; - else { - if (parse_option(&optarr[i],argument) == INVALID) - return INVALID; - } - break; - } - } + for (i = 0; i < num_opt; i++) { + if (optarr[i].opt == opt) + break; + } + if (optarr[i].type == OPT_SWITCH) + *((ibool*)optarr[i].arg) = true; + else { + if (parse_option(&optarr[i],argument) == INVALID) + return INVALID; + } + break; + } + } } /**************************************************************************** @@ -340,11 +340,11 @@ int i; for (i = 0; i < num_opt; i++) { - if (optarr[i].type == OPT_SWITCH) - printf(" -%c %s\n",optarr[i].opt,optarr[i].desc); - else - printf(" -%c %s\n",optarr[i].opt,optarr[i].desc); - } + if (optarr[i].type == OPT_SWITCH) + printf(" -%c %s\n",optarr[i].opt,optarr[i].desc); + else + printf(" -%c %s\n",optarr[i].opt,optarr[i].desc); + } } /**************************************************************************** @@ -382,45 +382,45 @@ argv[argc++] = filename; cmdLine = strncpy(str, cmdLine, sizeof(str)-1); while (*cmdLine) { - switch (*cmdLine) { - case '"' : - if (prevWord != NULL) { - if (inQuote) { - if (!noStrip) - *cmdLine = '\0'; - argv [argc++] = prevWord; - prevWord = NULL; - } - else - noStrip = TRUE; - } - inQuote = !inQuote; - break; - case ' ' : - case '\t' : - if (!inQuote) { - if (prevWord != NULL) { - *cmdLine = '\0'; - argv [argc++] = prevWord; - prevWord = NULL; - noStrip = FALSE; - } - } - break; - default : - if (prevWord == NULL) - prevWord = cmdLine; - break; - } - if (argc >= maxArgv - 1) - break; - cmdLine++; - } + switch (*cmdLine) { + case '"' : + if (prevWord != NULL) { + if (inQuote) { + if (!noStrip) + *cmdLine = '\0'; + argv [argc++] = prevWord; + prevWord = NULL; + } + else + noStrip = TRUE; + } + inQuote = !inQuote; + break; + case ' ' : + case '\t' : + if (!inQuote) { + if (prevWord != NULL) { + *cmdLine = '\0'; + argv [argc++] = prevWord; + prevWord = NULL; + noStrip = FALSE; + } + } + break; + default : + if (prevWord == NULL) + prevWord = cmdLine; + break; + } + if (argc >= maxArgv - 1) + break; + cmdLine++; + } if ((prevWord != NULL || (inQuote && prevWord != NULL)) && argc < maxArgv - 1) { - *cmdLine = '\0'; - argv [argc++] = prevWord; - } + *cmdLine = '\0'; + argv [argc++] = prevWord; + } argv[argc] = NULL; /* Return updated parameters */ diff --git a/board/MAI/bios_emulator/scitech/src/common/gabeos.c b/board/MAI/bios_emulator/scitech/src/common/gabeos.c index 1d8a543..a934bd1 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gabeos.c +++ b/board/MAI/bios_emulator/scitech/src/common/gabeos.c @@ -70,10 +70,10 @@ ****************************************************************************/ PM_imports * NAPI GA_getSystemPMImports(void) { - // TODO: We may very well want to provide a system shared library - // that eports the PM functions required by the Nucleus library - // for BeOS here. That will eliminate fatal errors loading new - // drivers on BeOS! + /* TODO: We may very well want to provide a system shared library */ + /* that eports the PM functions required by the Nucleus library */ + /* for BeOS here. That will eliminate fatal errors loading new */ + /* drivers on BeOS! */ return &_PM_imports; } @@ -124,7 +124,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - haveRDTSC = true; + haveRDTSC = true; return true; } @@ -136,11 +136,11 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else { - struct timeval t; - gettimeofday(&t, NULL); - value->low = t.tv_sec*1000000 + t.tv_usec; - value->high = 0; - } + struct timeval t; + gettimeofday(&t, NULL); + value->low = t.tv_sec*1000000 + t.tv_usec; + value->high = 0; + } } diff --git a/board/MAI/bios_emulator/scitech/src/common/gados.c b/board/MAI/bios_emulator/scitech/src/common/gados.c index 4c90e80..d2be776 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gados.c +++ b/board/MAI/bios_emulator/scitech/src/common/gados.c @@ -120,7 +120,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - return true; + return true; return false; } @@ -133,4 +133,3 @@ { _GA_readTimeStamp(value); } - diff --git a/board/MAI/bios_emulator/scitech/src/common/galib.c b/board/MAI/bios_emulator/scitech/src/common/galib.c index 7c1fbe3..f2eacc3 100644 --- a/board/MAI/bios_emulator/scitech/src/common/galib.c +++ b/board/MAI/bios_emulator/scitech/src/common/galib.c @@ -107,7 +107,7 @@ /* Check if we have already loaded the driver */ if (loaded) - return true; + return true; PM_init(); /* First try to see if we can find the system wide shared exports @@ -116,33 +116,33 @@ */ __GA_exports.dwSize = sizeof(__GA_exports); if (GA_getSharedExports(&__GA_exports,shared)) - return loaded = true; + return loaded = true; /* Open the BPD file */ if (!PM_findBPD(DLL_NAME,bpdpath)) - return false; + return false; strcpy(filename,bpdpath); strcat(filename,DLL_NAME); if ((hModBPD = PE_loadLibrary(filename,shared)) == NULL) - return false; + return false; if ((GA_initLibrary = (GA_initLibrary_t)PE_getProcAddress(hModBPD,"_GA_initLibrary")) == NULL) - return false; + return false; bpdpath[strlen(bpdpath)-1] = 0; if (strcmp(bpdpath,PM_getNucleusPath()) == 0) - strcpy(bpdpath,PM_getNucleusConfigPath()); + strcpy(bpdpath,PM_getNucleusConfigPath()); else { - PM_backslash(bpdpath); - strcat(bpdpath,"config"); - } + PM_backslash(bpdpath); + strcat(bpdpath,"config"); + } if ((gaExp = GA_initLibrary(shared,bpdpath,filename,GA_getSystemPMImports(),&_N_imports,&_GA_imports)) == NULL) - PM_fatalError("GA_initLibrary failed!\n"); + PM_fatalError("GA_initLibrary failed!\n"); /* Initialize all default imports to point to fatal error handler * for upwards compatibility, and copy the exported functions. */ max = sizeof(__GA_exports)/sizeof(GA_initLibrary_t); for (i = 0,p = (ulong*)&__GA_exports; i < max; i++) - *p++ = (ulong)_GA_fatalErrorHandler; + *p++ = (ulong)_GA_fatalErrorHandler; memcpy(&__GA_exports,gaExp,MIN(sizeof(__GA_exports),gaExp->dwSize)); loaded = true; return true; @@ -157,7 +157,7 @@ int NAPI GA_status(void) { if (!loaded) - return nDriverNotFound; + return nDriverNotFound; return __GA_exports.GA_status(); } @@ -166,7 +166,7 @@ N_int32 status) { if (!loaded) - return "Unable to load Nucleus device driver!"; + return "Unable to load Nucleus device driver!"; return __GA_exports.GA_errorMsg(status); } @@ -174,7 +174,7 @@ int NAPI GA_getDaysLeft(N_int32 shared) { if (!LoadDriver(shared)) - return -1; + return -1; return __GA_exports.GA_getDaysLeft(shared); } @@ -182,7 +182,7 @@ int NAPI GA_registerLicense(uchar *license,N_int32 shared) { if (!LoadDriver(shared)) - return 0; + return 0; return __GA_exports.GA_registerLicense(license,shared); } @@ -190,7 +190,7 @@ ibool NAPI GA_loadInGUI(N_int32 shared) { if (!LoadDriver(shared)) - return false; + return false; return __GA_exports.GA_loadInGUI(shared); } @@ -198,7 +198,7 @@ int NAPI GA_enumerateDevices(N_int32 shared) { if (!LoadDriver(shared)) - return 0; + return 0; return __GA_exports.GA_enumerateDevices(shared); } @@ -206,7 +206,7 @@ GA_devCtx * NAPI GA_loadDriver(N_int32 deviceIndex,N_int32 shared) { if (!LoadDriver(shared)) - return NULL; + return NULL; return __GA_exports.GA_loadDriver(deviceIndex,shared); } @@ -216,7 +216,7 @@ ibool shared) { if (LoadDriver(shared)) - __GA_exports.GA_getGlobalOptions(options,shared); + __GA_exports.GA_getGlobalOptions(options,shared); } /* {secret} */ @@ -226,7 +226,7 @@ ibool shared) { if (!LoadDriver(shared)) - return NULL; + return NULL; return __GA_exports.GA_loadLibrary(szBPDName,size,shared); } @@ -236,7 +236,7 @@ { /* Bail for older drivers that didn't export this function! */ if (!__GA_exports.GA_getCurrentDriver) - return NULL; + return NULL; return __GA_exports.GA_getCurrentDriver(deviceIndex); } @@ -246,7 +246,7 @@ { /* Bail for older drivers that didn't export this function! */ if (!__GA_exports.GA_getCurrentRef2d) - return NULL; + return NULL; return __GA_exports.GA_getCurrentRef2d(deviceIndex); } @@ -254,7 +254,7 @@ int NAPI GA_isOEMVersion(ibool shared) { if (!LoadDriver(shared)) - return 0; + return 0; return __GA_exports.GA_isOEMVersion(shared); } @@ -262,8 +262,7 @@ N_uint32 * NAPI GA_getLicensedDevices(ibool shared) { if (!LoadDriver(shared)) - return 0; + return 0; return __GA_exports.GA_getLicensedDevices(shared); } #endif - diff --git a/board/MAI/bios_emulator/scitech/src/common/galinux.c b/board/MAI/bios_emulator/scitech/src/common/galinux.c index cbd9d7f..47e4e85 100644 --- a/board/MAI/bios_emulator/scitech/src/common/galinux.c +++ b/board/MAI/bios_emulator/scitech/src/common/galinux.c @@ -72,10 +72,10 @@ ****************************************************************************/ PM_imports * NAPI GA_getSystemPMImports(void) { - // TODO: We may very well want to provide a system shared library - // that eports the PM functions required by the Nucleus library - // for Linux here. That will eliminate fatal errors loading new - // drivers on Linux! + /* TODO: We may very well want to provide a system shared library */ + /* that eports the PM functions required by the Nucleus library */ + /* for Linux here. That will eliminate fatal errors loading new */ + /* drivers on Linux! */ return &_PM_imports; } @@ -126,7 +126,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - haveRDTSC = true; + haveRDTSC = true; return true; } @@ -138,11 +138,11 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else { - struct timeval t; - gettimeofday(&t, NULL); - value->low = t.tv_sec*1000000 + t.tv_usec; - value->high = 0; - } + struct timeval t; + gettimeofday(&t, NULL); + value->low = t.tv_sec*1000000 + t.tv_usec; + value->high = 0; + } } diff --git a/board/MAI/bios_emulator/scitech/src/common/gantdrv.c b/board/MAI/bios_emulator/scitech/src/common/gantdrv.c index d9944c5..050f737 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gantdrv.c +++ b/board/MAI/bios_emulator/scitech/src/common/gantdrv.c @@ -117,8 +117,8 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { - haveRDTSC = true; - } + haveRDTSC = true; + } return true; } @@ -130,8 +130,7 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else - KeQuerySystemTime((LARGE_INTEGER*)value); + KeQuerySystemTime((LARGE_INTEGER*)value); } - diff --git a/board/MAI/bios_emulator/scitech/src/common/gaos2.c b/board/MAI/bios_emulator/scitech/src/common/gaos2.c index 822e93c..26e6503 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gaos2.c +++ b/board/MAI/bios_emulator/scitech/src/common/gaos2.c @@ -83,11 +83,11 @@ * can't fail here. */ DosOpen(PMHELP_NAME,&hSDDHelp,&result[0],0,0, - FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE, - NULL); + FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE, + NULL); DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func, - &parms, inLen = sizeof(parms), &inLen, - &result, outLen = sizeof(result), &outLen); + &parms, inLen = sizeof(parms), &inLen, + &result, outLen = sizeof(result), &outLen); DosClose(hSDDHelp); return result[0]; } @@ -147,17 +147,17 @@ /* Initialise the PM library and connect to our runtime DLL's */ PM_init(); if (CallSDDHelp(PMHELP_GETSHAREDEXP) != 0) { - /* We have found the shared Nucleus exports. Because not all processes - * map to SDDPMI.DLL, we need to ensure that we connect to this - * DLL so that it gets mapped into our address space (that is - * where the shared Nucleus loader code is located). Simply doing a - * DosLoadModule on it is enough for this. - */ - DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI); - exp = (GA_exports*)result[0]; - memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize)); - return true; - } + /* We have found the shared Nucleus exports. Because not all processes + * map to SDDPMI.DLL, we need to ensure that we connect to this + * DLL so that it gets mapped into our address space (that is + * where the shared Nucleus loader code is located). Simply doing a + * DosLoadModule on it is enough for this. + */ + DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"SDDPMI.DLL",&hModSDDPMI); + exp = (GA_exports*)result[0]; + memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize)); + return true; + } #endif (void)shared; return false; @@ -197,7 +197,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - haveRDTSC = true; + haveRDTSC = true; return true; } @@ -209,9 +209,9 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else - DosTmrQueryTime((QWORD*)value); + DosTmrQueryTime((QWORD*)value); } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/common/gaqnx.c b/board/MAI/bios_emulator/scitech/src/common/gaqnx.c index 0846ccc..525d662 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gaqnx.c +++ b/board/MAI/bios_emulator/scitech/src/common/gaqnx.c @@ -72,10 +72,10 @@ ****************************************************************************/ PM_imports * NAPI GA_getSystemPMImports(void) { - // TODO: We may very well want to provide a system shared library - // that eports the PM functions required by the Nucleus library - // for QNX here. That will eliminate fatal errors loading new - // drivers on QNX! + /* TODO: We may very well want to provide a system shared library */ + /* that eports the PM functions required by the Nucleus library */ + /* for QNX here. That will eliminate fatal errors loading new */ + /* drivers on QNX! */ return &_PM_imports; } @@ -126,7 +126,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - haveRDTSC = true; + haveRDTSC = true; return true; } @@ -138,12 +138,12 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else { - struct timespec ts; + struct timespec ts; - clock_gettime(CLOCK_REALTIME, &ts); - value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000); - value->high = 0; - } + clock_gettime(CLOCK_REALTIME, &ts); + value->low = (ts.tv_nsec / 1000 + ts.tv_sec * 1000000); + value->high = 0; + } } diff --git a/board/MAI/bios_emulator/scitech/src/common/gartt.c b/board/MAI/bios_emulator/scitech/src/common/gartt.c index 003e1e7..3a41f59 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gartt.c +++ b/board/MAI/bios_emulator/scitech/src/common/gartt.c @@ -121,9 +121,9 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { - haveRDTSC = true; - return true; - } + haveRDTSC = true; + return true; + } return false; } @@ -135,5 +135,5 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); } diff --git a/board/MAI/bios_emulator/scitech/src/common/gasmx.c b/board/MAI/bios_emulator/scitech/src/common/gasmx.c index 62e68dc..ae31941 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gasmx.c +++ b/board/MAI/bios_emulator/scitech/src/common/gasmx.c @@ -118,7 +118,7 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) - return true; + return true; return false; } diff --git a/board/MAI/bios_emulator/scitech/src/common/gavxd.c b/board/MAI/bios_emulator/scitech/src/common/gavxd.c index 62173cc..fc8ba8d 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gavxd.c +++ b/board/MAI/bios_emulator/scitech/src/common/gavxd.c @@ -117,8 +117,8 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { - haveRDTSC = true; - } + haveRDTSC = true; + } return true; } @@ -130,8 +130,7 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else - VTD_Get_Real_Time(&value->high,&value->low); + VTD_Get_Real_Time(&value->high,&value->low); } - diff --git a/board/MAI/bios_emulator/scitech/src/common/gawin32.c b/board/MAI/bios_emulator/scitech/src/common/gawin32.c index a2a4150..6944334 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gawin32.c +++ b/board/MAI/bios_emulator/scitech/src/common/gawin32.c @@ -67,16 +67,16 @@ /* Check if we have already loaded the DLL */ if (hModDLL) - return true; + return true; PM_init(); /* Open the DLL file */ if (!PM_findBPD(DLL_NAME,bpdpath)) - return false; + return false; strcpy(filename,bpdpath); strcat(filename,DLL_NAME); if ((hModDLL = LoadLibrary(filename)) == NULL) - return false; + return false; return true; } @@ -103,10 +103,10 @@ PM_setLocalBPDPath(path); if (_PM_hDevice != INVALID_HANDLE_VALUE) { - inBuf[0] = (DWORD)path; - DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32, - inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL); - } + inBuf[0] = (DWORD)path; + DeviceIoControl(_PM_hDevice, PMHELP_GASETLOCALPATH32, + inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &outCnt, NULL); + } } /**************************************************************************** @@ -126,18 +126,18 @@ PM_imports * (NAPIP _GA_getSystemPMImports)(void); if (LoadSharedDLL()) { - /* Note that Visual C++ build DLL's with only a single underscore in front - * of the exported name while Watcom C provides two of them. We check for - * both to allow working with either compiled DLL. - */ - if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) { - if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) { - pmImp = _GA_getSystemPMImports(); - memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize)); - return pmImp; - } - } - } + /* Note that Visual C++ build DLL's with only a single underscore in front + * of the exported name while Watcom C provides two of them. We check for + * both to allow working with either compiled DLL. + */ + if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"_GA_getSystemPMImports")) != NULL) { + if ((_GA_getSystemPMImports = (void*)GetProcAddress(hModDLL,"__GA_getSystemPMImports")) != NULL) { + pmImp = _GA_getSystemPMImports(); + memcpy(&_PM_imports,pmImp,MIN(_PM_imports.dwSize,pmImp->dwSize)); + return pmImp; + } + } + } return &_PM_imports; } @@ -162,16 +162,16 @@ useRing0Driver = false; if (shared) { - if (!LoadSharedDLL()) - PM_fatalError("Unable to load " DLL_NAME "!"); - if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL) - if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL) - PM_fatalError("Unable to load " DLL_NAME "!"); - exp = _GA_getSystemGAExports(); - memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize)); - useRing0Driver = true; - return true; - } + if (!LoadSharedDLL()) + PM_fatalError("Unable to load " DLL_NAME "!"); + if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"_GA_getSystemGAExports")) == NULL) + if ((_GA_getSystemGAExports = (void*)GetProcAddress(hModDLL,"__GA_getSystemGAExports")) == NULL) + PM_fatalError("Unable to load " DLL_NAME "!"); + exp = _GA_getSystemGAExports(); + memcpy(gaExp,exp,MIN(gaExp->dwSize,exp->dwSize)); + useRing0Driver = true; + return true; + } return false; } @@ -188,14 +188,14 @@ static ibool (NAPIP _GA_queryFunctions)(GA_devCtx *dc,N_uint32 id,void _FAR_ *funcs) = NULL; if (useRing0Driver) { - // Call the version in nga_w32.dll if it is loaded - if (!_GA_queryFunctions) { - if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL) - if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL) - PM_fatalError("Unable to get exports from " DLL_NAME "!"); - } - return _GA_queryFunctions(dc,id,funcs); - } + /* Call the version in nga_w32.dll if it is loaded */ + if (!_GA_queryFunctions) { + if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"_GA_queryFunctions")) == NULL) + if ((_GA_queryFunctions = (void*)GetProcAddress(hModDLL,"__GA_queryFunctions")) == NULL) + PM_fatalError("Unable to get exports from " DLL_NAME "!"); + } + return _GA_queryFunctions(dc,id,funcs); + } return __GA_exports.GA_queryFunctions(dc,id,funcs); } @@ -211,14 +211,14 @@ static ibool (NAPIP _REF2D_queryFunctions)(REF2D_driver *ref2d,N_uint32 id,void _FAR_ *funcs) = NULL; if (useRing0Driver) { - // Call the version in nga_w32.dll if it is loaded - if (!_REF2D_queryFunctions) { - if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL) - if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL) - PM_fatalError("Unable to get exports from " DLL_NAME "!"); - } - return _REF2D_queryFunctions(ref2d,id,funcs); - } + /* Call the version in nga_w32.dll if it is loaded */ + if (!_REF2D_queryFunctions) { + if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"_REF2D_queryFunctions")) == NULL) + if ((_REF2D_queryFunctions = (void*)GetProcAddress(hModDLL,"__REF2D_queryFunctions")) == NULL) + PM_fatalError("Unable to get exports from " DLL_NAME "!"); + } + return _REF2D_queryFunctions(ref2d,id,funcs); + } return __GA_exports.REF2D_queryFunctions(ref2d,id,funcs); } #endif @@ -231,13 +231,13 @@ ibool NAPI GA_TimerInit(void) { if (_GA_haveCPUID() && (_GA_getCPUIDFeatures() & CPU_HaveRDTSC) != 0) { - haveRDTSC = true; - return true; - } + haveRDTSC = true; + return true; + } else if (QueryPerformanceFrequency((LARGE_INTEGER*)&countFreq)) { - haveRDTSC = false; - return true; - } + haveRDTSC = false; + return true; + } return false; } @@ -249,8 +249,7 @@ GA_largeInteger *value) { if (haveRDTSC) - _GA_readTimeStamp(value); + _GA_readTimeStamp(value); else - QueryPerformanceCounter((LARGE_INTEGER*)value); + QueryPerformanceCounter((LARGE_INTEGER*)value); } - diff --git a/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c b/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c index 5a03ac5..1d547e9 100644 --- a/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c +++ b/board/MAI/bios_emulator/scitech/src/common/gtfcalc.c @@ -107,9 +107,9 @@ c->hSync = GC.hSync; c->minVSyncBP = GC.minVSyncBP; if (GC.k == 0) - c->k = 0.001; + c->k = 0.001; else - c->k = GC.k; + c->k = GC.k; c->m = (c->k / 256) * GC.m; c->c = (GC.c - GC.j) * (c->k / 256) + GC.j; c->j = GC.j; @@ -165,89 +165,89 @@ vFieldRate = vFreq; interlace = 0; if (wantInterlace) - dotClock *= 2; + dotClock *= 2; /* Determine the lines for margins */ if (wantMargins) { - topMarginLines = round(c.margin / 100 * vLines); - botMarginLines = round(c.margin / 100 * vLines); - } + topMarginLines = round(c.margin / 100 * vLines); + botMarginLines = round(c.margin / 100 * vLines); + } else { - topMarginLines = 0; - botMarginLines = 0; - } + topMarginLines = 0; + botMarginLines = 0; + } if (type != GTF_lockPF) { - if (type == GTF_lockVF) { - /* Estimate the horizontal period */ - hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) / - (vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000; + if (type == GTF_lockVF) { + /* Estimate the horizontal period */ + hPeriodEst = ((1/vFieldRate) - (c.minVSyncBP/1000000)) / + (vLines + (2*topMarginLines) + c.minPorch + interlace) * 1000000; - /* Find the number of lines in vSync + back porch */ - vSyncBP = round(c.minVSyncBP / hPeriodEst); - } - else if (type == GTF_lockHF) { - /* Find the number of lines in vSync + back porch */ - vSyncBP = round((c.minVSyncBP * hFreq) / 1000); - } + /* Find the number of lines in vSync + back porch */ + vSyncBP = round(c.minVSyncBP / hPeriodEst); + } + else if (type == GTF_lockHF) { + /* Find the number of lines in vSync + back porch */ + vSyncBP = round((c.minVSyncBP * hFreq) / 1000); + } - /* Find the number of lines in the V back porch alone */ - vBackPorch = vSyncBP - c.vSyncRqd; + /* Find the number of lines in the V back porch alone */ + vBackPorch = vSyncBP - c.vSyncRqd; - /* Find the total number of lines in the vertical period */ - vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP - + interlace + c.minPorch; + /* Find the total number of lines in the vertical period */ + vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP + + interlace + c.minPorch; - if (type == GTF_lockVF) { - /* Estimate the vertical frequency */ - vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines); + if (type == GTF_lockVF) { + /* Estimate the vertical frequency */ + vFieldRateEst = 1000000 / (hPeriodEst * vTotalLines); - /* Find the actual horizontal period */ - hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate; + /* Find the actual horizontal period */ + hPeriod = (hPeriodEst * vFieldRateEst) / vFieldRate; - /* Find the actual vertical field frequency */ - vFieldRate = 1000000 / (hPeriod * vTotalLines); - } - else if (type == GTF_lockHF) { - /* Find the actual vertical field frequency */ - vFieldRate = (hFreq / vTotalLines) * 1000; - } - } + /* Find the actual vertical field frequency */ + vFieldRate = 1000000 / (hPeriod * vTotalLines); + } + else if (type == GTF_lockHF) { + /* Find the actual vertical field frequency */ + vFieldRate = (hFreq / vTotalLines) * 1000; + } + } /* Find the number of pixels in the left and right margins */ if (wantMargins) { - leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran); - rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran); - } + leftMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran); + rightMarginPixels = round(hPixels * c.margin) / (100 * c.cellGran); + } else { - leftMarginPixels = 0; - rightMarginPixels = 0; - } + leftMarginPixels = 0; + rightMarginPixels = 0; + } /* Find the total number of active pixels in image + margins */ hTotalActivePixels = hPixels + leftMarginPixels + rightMarginPixels; if (type == GTF_lockVF) { - /* Find the ideal blanking duty cycle */ - idealDutyCycle = c.c - ((c.m * hPeriod) / 1000); - } + /* Find the ideal blanking duty cycle */ + idealDutyCycle = c.c - ((c.m * hPeriod) / 1000); + } else if (type == GTF_lockHF) { - /* Find the ideal blanking duty cycle */ - idealDutyCycle = c.c - (c.m / hFreq); - } + /* Find the ideal blanking duty cycle */ + idealDutyCycle = c.c - (c.m / hFreq); + } else if (type == GTF_lockPF) { - /* Find ideal horizontal period from blanking duty cycle formula */ - idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) + - (0.4 * c.m * (hTotalActivePixels + rightMarginPixels + - leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000; + /* Find ideal horizontal period from blanking duty cycle formula */ + idealHPeriod = (((c.c - 100) + (sqrt((pow(100-c.c,2)) + + (0.4 * c.m * (hTotalActivePixels + rightMarginPixels + + leftMarginPixels) / dotClock)))) / (2 * c.m)) * 1000; - /* Find the ideal blanking duty cycle */ - idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000); - } + /* Find the ideal blanking duty cycle */ + idealDutyCycle = c.c - ((c.m * idealHPeriod) / 1000); + } /* Find the number of pixels in blanking time */ hBlankPixels = round((hTotalActivePixels * idealDutyCycle) / - ((100 - idealDutyCycle) * c.cellGran)) * c.cellGran; + ((100 - idealDutyCycle) * c.cellGran)) * c.cellGran; /* Find the total number of pixels */ hTotalPixels = hTotalActivePixels + hBlankPixels; @@ -262,35 +262,35 @@ hSyncBP = hBackPorch + hSyncWidth; if (type == GTF_lockPF) { - /* Find the horizontal frequency */ - hFreq = (dotClock / hTotalPixels) * 1000; + /* Find the horizontal frequency */ + hFreq = (dotClock / hTotalPixels) * 1000; - /* Find the number of lines in vSync + back porch */ - vSyncBP = round((c.minVSyncBP * hFreq) / 1000); + /* Find the number of lines in vSync + back porch */ + vSyncBP = round((c.minVSyncBP * hFreq) / 1000); - /* Find the number of lines in the V back porch alone */ - vBackPorch = vSyncBP - c.vSyncRqd; + /* Find the number of lines in the V back porch alone */ + vBackPorch = vSyncBP - c.vSyncRqd; - /* Find the total number of lines in the vertical period */ - vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP - + interlace + c.minPorch; + /* Find the total number of lines in the vertical period */ + vTotalLines = vLines + topMarginLines + botMarginLines + vSyncBP + + interlace + c.minPorch; - /* Find the actual vertical field frequency */ - vFieldRate = (hFreq / vTotalLines) * 1000; - } + /* Find the actual vertical field frequency */ + vFieldRate = (hFreq / vTotalLines) * 1000; + } else { - if (type == GTF_lockVF) { - /* Find the horizontal frequency */ - hFreq = 1000 / hPeriod; - } - else if (type == GTF_lockHF) { - /* Find the horizontal frequency */ - hPeriod = 1000 / hFreq; - } + if (type == GTF_lockVF) { + /* Find the horizontal frequency */ + hFreq = 1000 / hPeriod; + } + else if (type == GTF_lockHF) { + /* Find the horizontal frequency */ + hPeriod = 1000 / hFreq; + } - /* Find the pixel clock frequency */ - dotClock = hTotalPixels / hPeriod; - } + /* Find the pixel clock frequency */ + dotClock = hTotalPixels / hPeriod; + } /* Return the computed frequencies */ t->vFreq = vFieldRate; @@ -315,16 +315,16 @@ t->v.vSyncWidth = (int)c.vSyncRqd; t->v.vBackPorch = (int)vBackPorch; if (wantInterlace) { - /* Halve the timings for interlaced modes */ - t->v.vTotal /= 2; - t->v.vDisp /= 2; - t->v.vSyncStart /= 2; - t->v.vSyncEnd /= 2; - t->v.vFrontPorch /= 2; - t->v.vSyncWidth /= 2; - t->v.vBackPorch /= 2; - t->dotClock /= 2; - } + /* Halve the timings for interlaced modes */ + t->v.vTotal /= 2; + t->v.vDisp /= 2; + t->v.vSyncStart /= 2; + t->v.vSyncEnd /= 2; + t->v.vFrontPorch /= 2; + t->v.vSyncWidth /= 2; + t->v.vBackPorch /= 2; + t->dotClock /= 2; + } /* Mark as GTF timing using the sync polarities */ t->interlace = (wantInterlace) ? 'I' : 'N'; @@ -348,30 +348,30 @@ GTF_timings t; if (argc != 5 && argc != 6) { - printf("Usage: GTFCALC [[Hz] [KHz] [MHz]] [I]\n"); - printf("\n"); - printf("where is the horizontal resolution of the mode, is the\n"); - printf("vertical resolution of the mode. The value will be the frequency to\n"); - printf("drive the calculations, and will be either the vertical frequency (in Hz)\n"); - printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n"); - printf("timings for an interlaced mode, add 'I' to the end of the command line.\n"); - printf("\n"); - printf("For example to generate timings for 640x480 at 60Hz vertical:\n"); - printf("\n"); - printf(" GTFCALC 640 480 60 Hz\n"); - printf("\n"); - printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n"); - printf("\n"); - printf(" GTFCALC 640 480 31.5 KHz\n"); - printf("\n"); - printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n"); - printf("\n"); - printf(" GTFCALC 640 480 25.175 MHz\n"); - printf("\n"); - printf("GTFCALC will print a summary of the results found, and dump the CRTC\n"); - printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n"); - exit(1); - } + printf("Usage: GTFCALC [[Hz] [KHz] [MHz]] [I]\n"); + printf("\n"); + printf("where is the horizontal resolution of the mode, is the\n"); + printf("vertical resolution of the mode. The value will be the frequency to\n"); + printf("drive the calculations, and will be either the vertical frequency (in Hz)\n"); + printf("the horizontal frequency (in KHz) or the dot clock (in MHz). To generate\n"); + printf("timings for an interlaced mode, add 'I' to the end of the command line.\n"); + printf("\n"); + printf("For example to generate timings for 640x480 at 60Hz vertical:\n"); + printf("\n"); + printf(" GTFCALC 640 480 60 Hz\n"); + printf("\n"); + printf("For example to generate timings for 640x480 at 31.5KHz horizontal:\n"); + printf("\n"); + printf(" GTFCALC 640 480 31.5 KHz\n"); + printf("\n"); + printf("For example to generate timings for 640x480 with a 25.175Mhz dot clock:\n"); + printf("\n"); + printf(" GTFCALC 640 480 25.175 MHz\n"); + printf("\n"); + printf("GTFCALC will print a summary of the results found, and dump the CRTC\n"); + printf("values to the UVCONFIG.CRT file in the format used by SciTech Display Doctor.\n"); + exit(1); + } /* Get values from command line */ xPixels = atof(argv[1]); @@ -381,33 +381,33 @@ /* Compute the CRTC timings */ if (toupper(argv[4][0]) == 'H') - GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t); + GTF_calcTimings(xPixels,yPixels,freq,GTF_lockVF,false,interlace,&t); else if (toupper(argv[4][0]) == 'K') - GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t); + GTF_calcTimings(xPixels,yPixels,freq,GTF_lockHF,false,interlace,&t); else if (toupper(argv[4][0]) == 'M') - GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t); + GTF_calcTimings(xPixels,yPixels,freq,GTF_lockPF,false,interlace,&t); else { - printf("Unknown command line!\n"); - exit(1); - } + printf("Unknown command line!\n"); + exit(1); + } /* Dump summary info to standard output */ printf("CRTC values for %.0fx%.0f @ %.2f %s\n", xPixels, yPixels, freq, argv[4]); printf("\n"); printf(" hTotal = %-4d vTotal = %-4d\n", - t.h.hTotal, t.v.vTotal); + t.h.hTotal, t.v.vTotal); printf(" hDisp = %-4d vDisp = %-4d\n", - t.h.hDisp, t.v.vDisp); + t.h.hDisp, t.v.vDisp); printf(" hSyncStart = %-4d vSyncStart = %-4d\n", - t.h.hSyncStart, t.v.vSyncStart); + t.h.hSyncStart, t.v.vSyncStart); printf(" hSyncEnd = %-4d vSyncEnd = %-4d\n", - t.h.hSyncEnd, t.v.vSyncEnd); + t.h.hSyncEnd, t.v.vSyncEnd); printf(" hFrontPorch = %-4d vFrontPorch = %-4d\n", - t.h.hFrontPorch, t.v.vFrontPorch); + t.h.hFrontPorch, t.v.vFrontPorch); printf(" hSyncWidth = %-4d vSyncWidth = %-4d\n", - t.h.hSyncWidth, t.v.vSyncWidth); + t.h.hSyncWidth, t.v.vSyncWidth); printf(" hBackPorch = %-4d vBackPorch = %-4d\n", - t.h.hBackPorch, t.v.vBackPorch); + t.h.hBackPorch, t.v.vBackPorch); printf("\n"); printf(" Interlaced = %s\n", (t.interlace == 'I') ? "Yes" : "No"); printf(" H sync pol = %c\n", t.hSyncPol); @@ -419,18 +419,18 @@ /* Dump to file in format used by SciTech Display Doctor */ if ((f = fopen("UVCONFIG.CRT","w")) != NULL) { - fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels); - fprintf(f, "%d %d %d %d '%c' %s\n", - t.h.hTotal, t.h.hDisp, - t.h.hSyncStart, t.h.hSyncEnd, - t.hSyncPol, (t.interlace == 'I') ? "I" : "NI"); - fprintf(f, "%d %d %d %d '%c'\n", - t.v.vTotal, t.v.vDisp, - t.v.vSyncStart, t.v.vSyncEnd, - t.vSyncPol); - fprintf(f, "%.2f\n", t.dotClock); - fclose(f); - } + fprintf(f, "[%.0f %.0f]\n", xPixels, yPixels); + fprintf(f, "%d %d %d %d '%c' %s\n", + t.h.hTotal, t.h.hDisp, + t.h.hSyncStart, t.h.hSyncEnd, + t.hSyncPol, (t.interlace == 'I') ? "I" : "NI"); + fprintf(f, "%d %d %d %d '%c'\n", + t.v.vTotal, t.v.vDisp, + t.v.vSyncStart, t.v.vSyncEnd, + t.vSyncPol); + fprintf(f, "%.2f\n", t.dotClock); + fclose(f); + } } #endif /* TESTING */ diff --git a/board/MAI/bios_emulator/scitech/src/common/libcimp.c b/board/MAI/bios_emulator/scitech/src/common/libcimp.c index 0eacd12..ab73ad5 100644 --- a/board/MAI/bios_emulator/scitech/src/common/libcimp.c +++ b/board/MAI/bios_emulator/scitech/src/common/libcimp.c @@ -270,27 +270,27 @@ /* Find an empty file handle to use */ for (i = 3; i < MAX_FILES; i++) { - if (!openHandles[i]) - break; - } + if (!openHandles[i]) + break; + } if (openHandles[i]) - return -1; + return -1; /* Find the open flags to use */ if (_oflag & ___O_TRUNC) - strcpy(mode,"w"); + strcpy(mode,"w"); else if (_oflag & ___O_CREAT) - strcpy(mode,"a"); + strcpy(mode,"a"); else - strcpy(mode,"r"); + strcpy(mode,"r"); if (_oflag & ___O_BINARY) - strcat(mode,"b"); + strcat(mode,"b"); if (_oflag & ___O_TEXT) - strcat(mode,"t"); + strcat(mode,"t"); /* Open the file and store the file handle */ if ((openHandles[i] = fopen(_path,mode)) == NULL) - return -1; + return -1; return i; } @@ -300,25 +300,25 @@ int _CDECL stub_close(int _fildes) { if (_fildes >= 3 && openHandles[_fildes]) { - fclose(openHandles[_fildes]); - openHandles[_fildes] = NULL; - } + fclose(openHandles[_fildes]); + openHandles[_fildes] = NULL; + } return 0; } off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence) { if (_fildes >= 3) { - fseek(openHandles[_fildes],_offset,_whence); - return ftell(openHandles[_fildes]); - } + fseek(openHandles[_fildes],_offset,_whence); + return ftell(openHandles[_fildes]); + } return 0; } size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte) { if (_fildes >= 3) - return fread(_buf,1,_nbyte,openHandles[_fildes]); + return fread(_buf,1,_nbyte,openHandles[_fildes]); return 0; } @@ -327,18 +327,18 @@ WORD error; if (initComplete) { - if (R0_DeleteFile((char*)_path,0,&error)) - return 0; - return -1; - } + if (R0_DeleteFile((char*)_path,0,&error)) + return 0; + return -1; + } else - return i_remove(_path); + return i_remove(_path); } size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte) { if (_fildes >= 3) - return fwrite(_buf,1,_nbyte,openHandles[_fildes]); + return fwrite(_buf,1,_nbyte,openHandles[_fildes]); return _nbyte; } @@ -356,7 +356,7 @@ { WORD error; if (initComplete) - R0_SetFileAttributes((char*)filename,attrib,&error); + R0_SetFileAttributes((char*)filename,attrib,&error); } /* Return the current date in days since 1/1/1980 */ @@ -380,59 +380,59 @@ /* Find an empty file handle to use */ for (i = 3; i < MAX_FILES; i++) { - if (!openHandles[i]) - break; - } + if (!openHandles[i]) + break; + } if (openHandles[i]) - return -1; + return -1; /* Find the open flags to use */ if (_oflag & ___O_TRUNC) - strcpy(mode,"w"); + strcpy(mode,"w"); else if (_oflag & ___O_CREAT) - strcpy(mode,"a"); + strcpy(mode,"a"); else - strcpy(mode,"r"); + strcpy(mode,"r"); if (_oflag & ___O_BINARY) - strcat(mode,"b"); + strcat(mode,"b"); if (_oflag & ___O_TEXT) - strcat(mode,"t"); + strcat(mode,"t"); /* Open the file and store the file handle */ if ((openHandles[i] = fopen(_path,mode)) == NULL) - return -1; + return -1; return i; } int _CDECL stub_close(int _fildes) { if (_fildes >= 3 && openHandles[_fildes]) { - fclose(openHandles[_fildes]); - openHandles[_fildes] = NULL; - } + fclose(openHandles[_fildes]); + openHandles[_fildes] = NULL; + } return 0; } off_t _CDECL stub_lseek(int _fildes, off_t _offset, int _whence) { if (_fildes >= 3) { - fseek(openHandles[_fildes],_offset,_whence); - return ftell(openHandles[_fildes]); - } + fseek(openHandles[_fildes],_offset,_whence); + return ftell(openHandles[_fildes]); + } return 0; } size_t _CDECL stub_read(int _fildes, void *_buf, size_t _nbyte) { if (_fildes >= 3) - return fread(_buf,1,_nbyte,openHandles[_fildes]); + return fread(_buf,1,_nbyte,openHandles[_fildes]); return 0; } size_t _CDECL stub_write(int _fildes, const void *_buf, size_t _nbyte) { if (_fildes >= 3) - return fwrite(_buf,1,_nbyte,openHandles[_fildes]); + return fwrite(_buf,1,_nbyte,openHandles[_fildes]); return _nbyte; } @@ -444,7 +444,7 @@ int _CDECL stub_unlink(const char *_path) { - // TODO: Implement this! + /* TODO: Implement this! */ return -1; } @@ -454,7 +454,7 @@ int _CDECL stub_rename(const char *_old, const char *_new) { - // TODO: Implement this! + /* TODO: Implement this! */ return -1; } @@ -462,11 +462,11 @@ { uint _attr = 0; if (attrib & __A_RDONLY) - _attr |= FILE_ATTRIBUTE_READONLY; + _attr |= FILE_ATTRIBUTE_READONLY; if (attrib & __A_HIDDEN) - _attr |= FILE_ATTRIBUTE_HIDDEN; + _attr |= FILE_ATTRIBUTE_HIDDEN; if (attrib & __A_SYSTEM) - _attr |= FILE_ATTRIBUTE_SYSTEM; + _attr |= FILE_ATTRIBUTE_SYSTEM; PM_setFileAttr(filename,_attr); } @@ -506,7 +506,7 @@ { FILESTATUS3 s; if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s))) - return; + return; s.attrFile = attrib; DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L); } @@ -528,25 +528,25 @@ /* Determine open flags */ if (_oflag & ___O_CREAT) { - if (_oflag & ___O_EXCL) - openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; - else if (_oflag & ___O_TRUNC) - openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; - else - openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; - } + if (_oflag & ___O_EXCL) + openflag = OPEN_ACTION_FAIL_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; + else if (_oflag & ___O_TRUNC) + openflag = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; + else + openflag = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; + } else if (_oflag & ___O_TRUNC) - openflag = OPEN_ACTION_REPLACE_IF_EXISTS; + openflag = OPEN_ACTION_REPLACE_IF_EXISTS; else - openflag = OPEN_ACTION_OPEN_IF_EXISTS; + openflag = OPEN_ACTION_OPEN_IF_EXISTS; /* Determine open mode flags */ if (_oflag & ___O_RDONLY) - openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE; + openmode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE; else if (_oflag & ___O_WRONLY) - openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE; + openmode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE; else - openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE; + openmode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE; /* Copy the path to a variable on the stack. We need to do this * for OS/2 as when the drivers are loaded into shared kernel @@ -555,14 +555,14 @@ */ strcpy(path,_path); if (DosOpen(path, &handle, &actiontaken, 0, FILE_NORMAL, - openflag, openmode, NULL) != NO_ERROR) - return -1; + openflag, openmode, NULL) != NO_ERROR) + return -1; /* Handle append mode of operation */ if (_oflag & ___O_APPEND) { - if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR) - return -1; - } + if (DosSetFilePtr(handle, 0, FILE_END, &error) != NO_ERROR) + return -1; + } return handle; } @@ -578,16 +578,16 @@ */ strcpy(path,_path); if (DosQueryPathInfo(path, FIL_STANDARD, &fs, sizeof(fs)) != NO_ERROR) - return -1; + return -1; if ((_amode & W_OK) && (fs.attrFile & FILE_READONLY)) - return -1; + return -1; return 0; } int _CDECL stub_close(int _fildes) { if (DosClose(_fildes) != NO_ERROR) - return -1; + return -1; return 0; } @@ -596,17 +596,17 @@ ULONG cbActual, origin; switch (_whence) { - case SEEK_CUR: - origin = FILE_CURRENT; - break; - case SEEK_END: - origin = FILE_END; - break; - default: - origin = FILE_BEGIN; - } + case SEEK_CUR: + origin = FILE_CURRENT; + break; + case SEEK_END: + origin = FILE_END; + break; + default: + origin = FILE_BEGIN; + } if (DosSetFilePtr(_fildes, _offset, origin, &cbActual) != NO_ERROR) - return -1; + return -1; return cbActual; } @@ -621,19 +621,19 @@ * in kernel space and will cause DosRead to bail internally. */ while (_nbyte > BUF_SIZE) { - if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR) - return -1; - cbActual += cbRead; - memcpy(p,file_io_buf,BUF_SIZE); - p += BUF_SIZE; - _nbyte -= BUF_SIZE; - } + if (DosRead(_fildes, file_io_buf, BUF_SIZE, &cbRead) != NO_ERROR) + return -1; + cbActual += cbRead; + memcpy(p,file_io_buf,BUF_SIZE); + p += BUF_SIZE; + _nbyte -= BUF_SIZE; + } if (_nbyte) { - if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR) - return -1; - cbActual += cbRead; - memcpy(p,file_io_buf,_nbyte); - } + if (DosRead(_fildes, file_io_buf, _nbyte, &cbRead) != NO_ERROR) + return -1; + cbActual += cbRead; + memcpy(p,file_io_buf,_nbyte); + } return cbActual; } @@ -648,19 +648,19 @@ * in kernel space and will cause DosWrite to bail internally. */ while (_nbyte > BUF_SIZE) { - memcpy(file_io_buf,p,BUF_SIZE); - if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR) - return -1; - cbActual += cbWrite; - p += BUF_SIZE; - _nbyte -= BUF_SIZE; - } + memcpy(file_io_buf,p,BUF_SIZE); + if (DosWrite(_fildes, file_io_buf, BUF_SIZE, &cbWrite) != NO_ERROR) + return -1; + cbActual += cbWrite; + p += BUF_SIZE; + _nbyte -= BUF_SIZE; + } if (_nbyte) { - memcpy(file_io_buf,p,_nbyte); - if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR) - return -1; - cbActual += cbWrite; - } + memcpy(file_io_buf,p,_nbyte); + if (DosWrite(_fildes, file_io_buf, _nbyte, &cbWrite) != NO_ERROR) + return -1; + cbActual += cbWrite; + } return cbActual; } @@ -675,7 +675,7 @@ */ strcpy(path,_path); if (DosDelete(path) != NO_ERROR) - return -1; + return -1; return 0; } @@ -684,7 +684,7 @@ ULONG htype, flags; if (DosQueryHType(_fildes, &htype, &flags) != NO_ERROR) - return 0; + return 0; return ((htype & 0xFF) == HANDTYPE_DEVICE); } @@ -700,7 +700,7 @@ */ strcpy(path,_path); if (DosDelete(path) != NO_ERROR) - return -1; + return -1; return 0; } @@ -717,7 +717,7 @@ strcpy(old,_old); strcpy(new,_new); if (DosMove(old, new) != NO_ERROR) - return -1; + return -1; return 0; } @@ -734,23 +734,23 @@ int _CDECL stub_open(const char *_path, int _oflag, unsigned _mode) { int oflag_tab[] = { - ___O_RDONLY, O_RDONLY, - ___O_WRONLY, O_WRONLY, - ___O_RDWR, O_RDWR, - ___O_BINARY, O_BINARY, - ___O_TEXT, O_TEXT, - ___O_CREAT, O_CREAT, - ___O_EXCL, O_EXCL, - ___O_TRUNC, O_TRUNC, - ___O_APPEND, O_APPEND, - }; + ___O_RDONLY, O_RDONLY, + ___O_WRONLY, O_WRONLY, + ___O_RDWR, O_RDWR, + ___O_BINARY, O_BINARY, + ___O_TEXT, O_TEXT, + ___O_CREAT, O_CREAT, + ___O_EXCL, O_EXCL, + ___O_TRUNC, O_TRUNC, + ___O_APPEND, O_APPEND, + }; int i,oflag = 0; /* Translate the oflag's to the OS dependent versions */ for (i = 0; i < sizeof(oflag_tab) / sizeof(int); i += 2) { - if (_oflag & oflag_tab[i]) - oflag |= oflag_tab[i+1]; - } + if (_oflag & oflag_tab[i]) + oflag |= oflag_tab[i+1]; + } return open(_path,oflag,_mode); } @@ -825,4 +825,3 @@ return (void*)signal(sig,(__code_ptr)handler); #endif } - diff --git a/board/MAI/bios_emulator/scitech/src/common/peloader.c b/board/MAI/bios_emulator/scitech/src/common/peloader.c index b9bec4a..a134bb0 100644 --- a/board/MAI/bios_emulator/scitech/src/common/peloader.c +++ b/board/MAI/bios_emulator/scitech/src/common/peloader.c @@ -79,35 +79,35 @@ result = PE_invalidDLLImage; fseek(f, startOffset, SEEK_SET); if (fread(&exehdr, 1, sizeof(exehdr), f) != sizeof(exehdr)) - return false; + return false; if (exehdr.signature != 0x5A4D) - return false; + return false; /* Now seek to the start of the PE header defined at offset 0x3C * in the MS-DOS EXE header, and read the signature and check it. */ fseek(f, startOffset+0x3C, SEEK_SET); if (fread(&offset, 1, sizeof(offset), f) != sizeof(offset)) - return false; + return false; fseek(f, startOffset+offset, SEEK_SET); if (fread(&signature, 1, sizeof(signature), f) != sizeof(signature)) - return false; + return false; if (signature != 0x00004550) - return false; + return false; /* Now read the PE file header and check that it is correct */ if (fread(filehdr, 1, sizeof(*filehdr), f) != sizeof(*filehdr)) - return false; + return false; if (filehdr->Machine != IMAGE_FILE_MACHINE_I386) - return false; + return false; if (!(filehdr->Characteristics & IMAGE_FILE_32BIT_MACHINE)) - return false; + return false; if (!(filehdr->Characteristics & IMAGE_FILE_DLL)) - return false; + return false; if (fread(opthdr, 1, sizeof(*opthdr), f) != sizeof(*opthdr)) - return false; + return false; if (opthdr->Magic != 0x10B) - return false; + return false; /* Success, so return true! */ return true; @@ -138,15 +138,15 @@ /* Read the PE file headers from disk */ if (!PE_readHeader(f,startOffset,&filehdr,&opthdr)) - return 0xFFFFFFFF; + return 0xFFFFFFFF; /* Scan all the section headers summing up the total size */ size = opthdr.SizeOfHeaders; for (i = 0; i < filehdr.NumberOfSections; i++) { - if (fread(§hdr, 1, sizeof(secthdr), f) != sizeof(secthdr)) - return 0xFFFFFFFF; - size += secthdr.SizeOfRawData; - } + if (fread(§hdr, 1, sizeof(secthdr), f) != sizeof(secthdr)) + return 0xFFFFFFFF; + size += secthdr.SizeOfRawData; + } return size; } @@ -199,7 +199,7 @@ /* Read the PE file headers from disk */ if (!PE_readHeader(f,startOffset,&filehdr,&opthdr)) - return NULL; + return NULL; /* Scan all the section headers and find the necessary sections */ text_off = data_off = reloc_off = export_off = 0; @@ -208,56 +208,56 @@ export_addr = export_size = export_end = 0; reloc_size = 0; for (i = 0; i < filehdr.NumberOfSections; i++) { - if (fread(§hdr, 1, sizeof(secthdr), f) != sizeof(secthdr)) - goto Error; - if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) { - /* Exports section */ - export_off = secthdr.PointerToRawData; - export_addr = secthdr.VirtualAddress; - export_size = secthdr.SizeOfRawData; - export_end = export_addr + export_size; - } - else if (strcmp(secthdr.Name, ".idata") == 0) { - /* Imports section, ignore */ - } - else if (strcmp(secthdr.Name, ".reloc") == 0) { - /* Relocations section */ - reloc_off = secthdr.PointerToRawData; - reloc_size = secthdr.SizeOfRawData; - } - else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) { - /* Code section */ - text_off = secthdr.PointerToRawData; - text_addr = secthdr.VirtualAddress; - text_size = secthdr.SizeOfRawData; - } - else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) { - /* Data section */ - data_off = secthdr.PointerToRawData; - data_addr = secthdr.VirtualAddress; - data_size = secthdr.SizeOfRawData; - data_end = data_addr + data_size; - } - } + if (fread(§hdr, 1, sizeof(secthdr), f) != sizeof(secthdr)) + goto Error; + if (strcmp(secthdr.Name, ".edata") == 0 || strcmp(secthdr.Name, ".rdata") == 0) { + /* Exports section */ + export_off = secthdr.PointerToRawData; + export_addr = secthdr.VirtualAddress; + export_size = secthdr.SizeOfRawData; + export_end = export_addr + export_size; + } + else if (strcmp(secthdr.Name, ".idata") == 0) { + /* Imports section, ignore */ + } + else if (strcmp(secthdr.Name, ".reloc") == 0) { + /* Relocations section */ + reloc_off = secthdr.PointerToRawData; + reloc_size = secthdr.SizeOfRawData; + } + else if (!text_off && secthdr.Characteristics & IMAGE_SCN_CNT_CODE) { + /* Code section */ + text_off = secthdr.PointerToRawData; + text_addr = secthdr.VirtualAddress; + text_size = secthdr.SizeOfRawData; + } + else if (!data_off && secthdr.Characteristics & IMAGE_SCN_CNT_INITIALIZED_DATA) { + /* Data section */ + data_off = secthdr.PointerToRawData; + data_addr = secthdr.VirtualAddress; + data_size = secthdr.SizeOfRawData; + data_end = data_addr + data_size; + } + } /* Check to make sure that we have all the sections we need */ if (!text_off || !data_off || !export_off || !reloc_off) { - result = PE_invalidDLLImage; - goto Error; - } + result = PE_invalidDLLImage; + goto Error; + } /* Find the size of the image to load allocate memory for it */ image_size = MAX(export_end,data_end) - text_addr; *size = sizeof(PE_MODULE) + image_size + 4096; if (shared) - hMod = PM_mallocShared(*size); + hMod = PM_mallocShared(*size); else - hMod = PM_malloc(*size); + hMod = PM_malloc(*size); reloc = PM_malloc(reloc_size); if (!hMod || !reloc) { - result = PE_outOfMemory; - goto Error; - } + result = PE_outOfMemory; + goto Error; + } hMod->text = (uchar*)ROUND_4K((ulong)hMod + sizeof(PE_MODULE)); hMod->data = (uchar*)((ulong)hMod->text + (data_addr - text_addr)); @@ -272,48 +272,48 @@ result = PE_invalidDLLImage; fseek(f, startOffset+text_off, SEEK_SET); if (fread(hMod->text, 1, text_size, f) != text_size) - goto Error; + goto Error; fseek(f, startOffset+data_off, SEEK_SET); if (fread(hMod->data, 1, data_size, f) != data_size) - goto Error; + goto Error; fseek(f, startOffset+export_off, SEEK_SET); if (fread(hMod->export, 1, export_size, f) != export_size) - goto Error; + goto Error; fseek(f, startOffset+reloc_off, SEEK_SET); if (fread(reloc, 1, reloc_size, f) != reloc_size) - goto Error; + goto Error; /* Now perform relocations on all sections in the image */ delta = (ulong)hMod->text - opthdr.ImageBase - text_addr; baseReloc = (BASE_RELOCATION*)reloc; for (;;) { - /* Check for termination condition */ - if (!baseReloc->PageRVA || !baseReloc->BlockSize) - break; + /* Check for termination condition */ + if (!baseReloc->PageRVA || !baseReloc->BlockSize) + break; - /* Do fixups */ - pageOffset = baseReloc->PageRVA - hMod->textBase; - numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort); - fixup = (ushort*)(baseReloc + 1); - for (i = 0; i < numFixups; i++) { - relocType = *fixup >> 12; - if (relocType) { - offset = pageOffset + (*fixup & 0x0FFF); - *(ulong*)(hMod->text + offset) += delta; - } - fixup++; - } + /* Do fixups */ + pageOffset = baseReloc->PageRVA - hMod->textBase; + numFixups = (baseReloc->BlockSize - sizeof(BASE_RELOCATION)) / sizeof(ushort); + fixup = (ushort*)(baseReloc + 1); + for (i = 0; i < numFixups; i++) { + relocType = *fixup >> 12; + if (relocType) { + offset = pageOffset + (*fixup & 0x0FFF); + *(ulong*)(hMod->text + offset) += delta; + } + fixup++; + } - /* Move to next relocation block */ - baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize); - } + /* Move to next relocation block */ + baseReloc = (BASE_RELOCATION*)((ulong)baseReloc + baseReloc->BlockSize); + } /* Initialise the C runtime library for the loaded DLL */ result = PE_unableToInitLibC; if ((InitLibC = (InitLibC_t)PE_getProcAddress(hMod,"_InitLibC")) == NULL) - goto Error; + goto Error; if (!InitLibC(&___imports,PM_getOSType())) - goto Error; + goto Error; /* Clean up, close the file and return the loaded module handle */ PM_free(reloc); @@ -322,9 +322,9 @@ Error: if (shared) - PM_freeShared(hMod); + PM_freeShared(hMod); else - PM_free(hMod); + PM_free(hMod); PM_free(reloc); return NULL; } @@ -360,53 +360,53 @@ #if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED) if (!shared) { - PM_MODULE hInst; - InitLibC_t InitLibC; + PM_MODULE hInst; + InitLibC_t InitLibC; - /* For Win32 if are building checked libraries for debugging, we use - * the real Win32 DLL functions so that we can debug the resulting DLL - * files with the Win32 debuggers. Note that we can't do this if - * we need to load the files into a shared memory context. - */ - if ((hInst = PM_loadLibrary(szDLLName)) == NULL) { - result = PE_fileNotFound; - return NULL; - } + /* For Win32 if are building checked libraries for debugging, we use + * the real Win32 DLL functions so that we can debug the resulting DLL + * files with the Win32 debuggers. Note that we can't do this if + * we need to load the files into a shared memory context. + */ + if ((hInst = PM_loadLibrary(szDLLName)) == NULL) { + result = PE_fileNotFound; + return NULL; + } - /* Initialise the C runtime library for the loaded DLL */ - result = PE_unableToInitLibC; - if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL) - return NULL; - if (!InitLibC(&___imports,PM_getOSType())) - return NULL; + /* Initialise the C runtime library for the loaded DLL */ + result = PE_unableToInitLibC; + if ((InitLibC = (void*)PM_getProcAddress(hInst,"_InitLibC")) == NULL) + return NULL; + if (!InitLibC(&___imports,PM_getOSType())) + return NULL; - /* Allocate the PE_MODULE structure */ - if ((hMod = PM_malloc(sizeof(*hMod))) == NULL) - return NULL; - hMod->text = (void*)hInst; - hMod->shared = -1; + /* Allocate the PE_MODULE structure */ + if ((hMod = PM_malloc(sizeof(*hMod))) == NULL) + return NULL; + hMod->text = (void*)hInst; + hMod->shared = -1; - /* DLL loaded successfully so return module handle */ - result = PE_ok; - return hMod; - } + /* DLL loaded successfully so return module handle */ + result = PE_ok; + return hMod; + } else #endif - { - FILE *f; - ulong size; + { + FILE *f; + ulong size; - /* Attempt to open the file on disk */ - if (shared < 0) - shared = 0; - if ((f = fopen(szDLLName,"rb")) == NULL) { - result = PE_fileNotFound; - return NULL; - } - hMod = PE_loadLibraryExt(f,0,&size,shared); - fclose(f); - return hMod; - } + /* Attempt to open the file on disk */ + if (shared < 0) + shared = 0; + if ((f = fopen(szDLLName,"rb")) == NULL) { + result = PE_fileNotFound; + return NULL; + } + hMod = PE_loadLibraryExt(f,0,&size,shared); + fclose(f); + return hMod; + } } /**************************************************************************** @@ -445,14 +445,14 @@ */ #if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__) if (getenv("MGL_ROOT")) { - strcpy(path,getenv("MGL_ROOT")); - PM_backslash(path); - } + strcpy(path,getenv("MGL_ROOT")); + PM_backslash(path); + } strcat(path,"drivers"); PM_backslash(path); strcat(path,szDLLName); if ((hMod = PE_loadLibrary(path,shared)) != NULL) - return hMod; + return hMod; #endif strcpy(path,"drivers"); PM_backslash(path); @@ -488,39 +488,39 @@ { #if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED) if (hModule->shared == -1) - return (void*)PM_getProcAddress(hModule->text,szProcName); + return (void*)PM_getProcAddress(hModule->text,szProcName); else #endif - { - uint i; - EXPORT_DIRECTORY *exports; - ulong funcOffset; - ulong *AddressTable; - ulong *NameTable; - ushort *OrdinalTable; - char *name; + { + uint i; + EXPORT_DIRECTORY *exports; + ulong funcOffset; + ulong *AddressTable; + ulong *NameTable; + ushort *OrdinalTable; + char *name; - /* Find the address of the export tables from the export section */ - if (!hModule) - return NULL; - exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir); - AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase); - NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase); - OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase); + /* Find the address of the export tables from the export section */ + if (!hModule) + return NULL; + exports = (EXPORT_DIRECTORY*)(hModule->export + hModule->exportDir); + AddressTable = (ulong*)(hModule->export + exports->AddressTableRVA - hModule->exportBase); + NameTable = (ulong*)(hModule->export + exports->NameTableRVA - hModule->exportBase); + OrdinalTable = (ushort*)(hModule->export + exports->OrdinalTableRVA - hModule->exportBase); - /* Search the export name table to find the function name */ - for (i = 0; i < exports->NumberOfNamePointers; i++) { - name = (char*)(hModule->export + NameTable[i] - hModule->exportBase); - if (strcmp(name,szProcName) == 0) - break; - } - if (i == exports->NumberOfNamePointers) - return NULL; - funcOffset = AddressTable[OrdinalTable[i]]; - if (!funcOffset) - return NULL; - return (void*)(hModule->text + funcOffset - hModule->textBase); - } + /* Search the export name table to find the function name */ + for (i = 0; i < exports->NumberOfNamePointers; i++) { + name = (char*)(hModule->export + NameTable[i] - hModule->exportBase); + if (strcmp(name,szProcName) == 0) + break; + } + if (i == exports->NumberOfNamePointers) + return NULL; + funcOffset = AddressTable[OrdinalTable[i]]; + if (!funcOffset) + return NULL; + return (void*)(hModule->text + funcOffset - hModule->textBase); + } } /**************************************************************************** @@ -546,25 +546,25 @@ #if (defined(__WINDOWS32__) || defined(__DRIVER__)) && defined(CHECKED) if (hModule->shared == -1) { - /* Run the C runtime library exit code on module unload */ - if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL) - TerminateLibC(); - PM_freeLibrary(hModule->text); - PM_free(hModule); - } + /* Run the C runtime library exit code on module unload */ + if ((TerminateLibC = (TerminateLibC_t)PM_getProcAddress(hModule->text,"_TerminateLibC")) != NULL) + TerminateLibC(); + PM_freeLibrary(hModule->text); + PM_free(hModule); + } else #endif - { - if (hModule) { - /* Run the C runtime library exit code on module unload */ - if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL) - TerminateLibC(); - if (hModule->shared) - PM_freeShared(hModule); - else - PM_free(hModule); - } - } + { + if (hModule) { + /* Run the C runtime library exit code on module unload */ + if ((TerminateLibC = (TerminateLibC_t)PE_getProcAddress(hModule,"_TerminateLibC")) != NULL) + TerminateLibC(); + if (hModule->shared) + PM_freeShared(hModule); + else + PM_free(hModule); + } + } } /**************************************************************************** @@ -584,4 +584,3 @@ { return result; } - diff --git a/board/MAI/bios_emulator/scitech/src/common/vesavbe.c b/board/MAI/bios_emulator/scitech/src/common/vesavbe.c index 2be57e2..a669e5c 100644 --- a/board/MAI/bios_emulator/scitech/src/common/vesavbe.c +++ b/board/MAI/bios_emulator/scitech/src/common/vesavbe.c @@ -73,10 +73,10 @@ ****************************************************************************/ { if (!state->VESABuf_ptr) { - /* Allocate a global buffer for communicating with the VESA VBE */ - if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL) - PM_fatalError("VESAVBE.C: Real mode memory allocation failed!"); - } + /* Allocate a global buffer for communicating with the VESA VBE */ + if ((state->VESABuf_ptr = PM_getVESABuf(&VESABuf_len, &state->VESABuf_rseg, &state->VESABuf_roff)) == NULL) + PM_fatalError("VESAVBE.C: Real mode memory allocation failed!"); + } } void * VBEAPI VBE_getRMBuf(uint *len,uint *rseg,uint *roff) @@ -129,7 +129,7 @@ RMSREGS sregs; if (!state->VESABuf_ptr) - PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!"); + PM_fatalError("You *MUST* call VBE_init() before you can call the VESAVBE.C module!"); sregs.es = (ushort)state->VESABuf_rseg; regs->x.di = (ushort)state->VESABuf_roff; memcpy(state->VESABuf_ptr, buffer, size); @@ -157,7 +157,7 @@ v = PM_mapRealPointer((uint)((ulong)realPtr >> 16), (uint)((ulong)realPtr & 0xFFFF)); while (*v != 0 && p < max) - *p++ = *v++; + *p++ = *v++; *p++ = 0; return p; } @@ -178,7 +178,7 @@ v = PM_mapRealPointer((uint)((ulong)realPtr >> 16),(uint)((ulong)realPtr & 0xFFFF)); while (*v != 0xFFFF) - *p++ = *v++; + *p++ = *v++; *p = 0xFFFF; } #endif @@ -200,26 +200,26 @@ regs.x.ax = 0x4F00; /* Get SuperVGA information */ if (forceUniVBE) { - regs.x.bx = 0x1234; - regs.x.cx = 0x4321; - } + regs.x.bx = 0x1234; + regs.x.cx = 0x4321; + } else { - regs.x.bx = 0; - regs.x.cx = 0; - } + regs.x.bx = 0; + regs.x.cx = 0; + } strncpy(vgaInfo->VESASignature,"VBE2",4); VBE_callESDI(®s, vgaInfo, sizeof(*vgaInfo)); if (regs.x.ax != VBE_SUCCESS) - return 0; + return 0; if (strncmp(vgaInfo->VESASignature,"VESA",4) != 0) - return 0; + return 0; /* Check for bogus BIOSes that return a VBE version number that is * not correct, and fix it up. We also check the OemVendorNamePtr for a * valid value, and if it is invalid then we also reset to VBE 1.2. */ if (vgaInfo->VESAVersion >= 0x200 && vgaInfo->OemVendorNamePtr == 0) - vgaInfo->VESAVersion = 0x102; + vgaInfo->VESAVersion = 0x102; #ifndef REALMODE /* Relocate all the indirect information (mode tables, OEM strings * etc) from the low 1Mb memory region into a static buffer in @@ -227,23 +227,23 @@ * from mapping the strings from real mode to protected mode. */ { - char *p,*p2; + char *p,*p2; p2 = VBE_copyStrToLocal(localBuf,vgaInfo->OemStringPtr,MAX_LOCAL_BUF); vgaInfo->OemStringPtr = localBuf; if (vgaInfo->VESAVersion >= 0x200) { - p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF); - vgaInfo->OemVendorNamePtr = p2; - p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF); - vgaInfo->OemProductNamePtr = p; - p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF); - vgaInfo->OemProductRevPtr = p2; - VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr); - vgaInfo->VideoModePtr = (ushort*)p; - } + p = VBE_copyStrToLocal(p2,vgaInfo->OemVendorNamePtr,MAX_LOCAL_BUF); + vgaInfo->OemVendorNamePtr = p2; + p2 = VBE_copyStrToLocal(p,vgaInfo->OemProductNamePtr,MAX_LOCAL_BUF); + vgaInfo->OemProductNamePtr = p; + p = VBE_copyStrToLocal(p2,vgaInfo->OemProductRevPtr,MAX_LOCAL_BUF); + vgaInfo->OemProductRevPtr = p2; + VBE_copyShortToLocal((ushort*)p,vgaInfo->VideoModePtr); + vgaInfo->VideoModePtr = (ushort*)p; + } else { - VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr); - vgaInfo->VideoModePtr = (ushort*)p2; - } + VBE_copyShortToLocal((ushort*)p2,vgaInfo->VideoModePtr); + vgaInfo->VideoModePtr = (ushort*)p2; + } } #endif state->VBEMemory = vgaInfo->TotalMemory * 64; @@ -253,17 +253,17 @@ */ haveRiva128 = false; if (vgaInfo->VESAVersion >= 0x300 && - (strstr(vgaInfo->OemStringPtr,"NVidia") != NULL || - strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) { - haveRiva128 = true; - } + (strstr(vgaInfo->OemStringPtr,"NVidia") != NULL || + strstr(vgaInfo->OemStringPtr,"Riva") != NULL)) { + haveRiva128 = true; + } /* Check for Matrox G400 cards which claim to be VBE 3.0 * compliant yet they don't implement the refresh rate control * functions. */ if (vgaInfo->VESAVersion >= 0x300 && (strcmp(vgaInfo->OemProductNamePtr,"Matrox G400") == 0)) - vgaInfo->VESAVersion = 0x200; + vgaInfo->VESAVersion = 0x200; return (state->VBEVersion = vgaInfo->VESAVersion); } @@ -305,70 +305,70 @@ regs.x.cx = (ushort)mode; VBE_callESDI(®s, modeInfo, sizeof(*modeInfo)); if (regs.x.ax != VBE_SUCCESS) - return false; + return false; if ((modeInfo->ModeAttributes & vbeMdAvailable) == 0) - return false; + return false; /* Map out triple buffer and stereo flags for NVidia Riva128 * chips. */ if (haveRiva128) { - modeInfo->ModeAttributes &= ~vbeMdTripleBuf; - modeInfo->ModeAttributes &= ~vbeMdStereo; - } + modeInfo->ModeAttributes &= ~vbeMdTripleBuf; + modeInfo->ModeAttributes &= ~vbeMdStereo; + } /* Support old style RGB definitions for VBE 1.1 BIOSes */ bits = modeInfo->BitsPerPixel; if (modeInfo->MemoryModel == vbeMemPK && bits > 8) { - modeInfo->MemoryModel = vbeMemRGB; - switch (bits) { - case 15: - modeInfo->RedMaskSize = 5; - modeInfo->RedFieldPosition = 10; - modeInfo->GreenMaskSize = 5; - modeInfo->GreenFieldPosition = 5; - modeInfo->BlueMaskSize = 5; - modeInfo->BlueFieldPosition = 0; - modeInfo->RsvdMaskSize = 1; - modeInfo->RsvdFieldPosition = 15; - break; - case 16: - modeInfo->RedMaskSize = 5; - modeInfo->RedFieldPosition = 11; - modeInfo->GreenMaskSize = 5; - modeInfo->GreenFieldPosition = 5; - modeInfo->BlueMaskSize = 5; - modeInfo->BlueFieldPosition = 0; - modeInfo->RsvdMaskSize = 0; - modeInfo->RsvdFieldPosition = 0; - break; - case 24: - modeInfo->RedMaskSize = 8; - modeInfo->RedFieldPosition = 16; - modeInfo->GreenMaskSize = 8; - modeInfo->GreenFieldPosition = 8; - modeInfo->BlueMaskSize = 8; - modeInfo->BlueFieldPosition = 0; - modeInfo->RsvdMaskSize = 0; - modeInfo->RsvdFieldPosition = 0; - break; - } - } + modeInfo->MemoryModel = vbeMemRGB; + switch (bits) { + case 15: + modeInfo->RedMaskSize = 5; + modeInfo->RedFieldPosition = 10; + modeInfo->GreenMaskSize = 5; + modeInfo->GreenFieldPosition = 5; + modeInfo->BlueMaskSize = 5; + modeInfo->BlueFieldPosition = 0; + modeInfo->RsvdMaskSize = 1; + modeInfo->RsvdFieldPosition = 15; + break; + case 16: + modeInfo->RedMaskSize = 5; + modeInfo->RedFieldPosition = 11; + modeInfo->GreenMaskSize = 5; + modeInfo->GreenFieldPosition = 5; + modeInfo->BlueMaskSize = 5; + modeInfo->BlueFieldPosition = 0; + modeInfo->RsvdMaskSize = 0; + modeInfo->RsvdFieldPosition = 0; + break; + case 24: + modeInfo->RedMaskSize = 8; + modeInfo->RedFieldPosition = 16; + modeInfo->GreenMaskSize = 8; + modeInfo->GreenFieldPosition = 8; + modeInfo->BlueMaskSize = 8; + modeInfo->BlueFieldPosition = 0; + modeInfo->RsvdMaskSize = 0; + modeInfo->RsvdFieldPosition = 0; + break; + } + } /* Convert the 32k direct color modes of VBE 1.2+ BIOSes to * be recognised as 15 bits per pixel modes. */ if (bits == 16 && modeInfo->RsvdMaskSize == 1) - modeInfo->BitsPerPixel = 15; + modeInfo->BitsPerPixel = 15; /* Fix up bogus BIOS'es that report incorrect reserved pixel masks * for 32K color modes. Quite a number of BIOS'es have this problem, * and this affects our OS/2 drivers in VBE fallback mode. */ if (bits == 15 && (modeInfo->RsvdMaskSize != 1 || modeInfo->RsvdFieldPosition != 15)) { - modeInfo->RsvdMaskSize = 1; - modeInfo->RsvdFieldPosition = 15; - } + modeInfo->RsvdMaskSize = 1; + modeInfo->RsvdFieldPosition = 15; + } return true; } @@ -391,20 +391,20 @@ size = (long)mi->BytesPerScanLine * (long)mi->YResolution; if (mi->BitsPerPixel == 4) { - /* We have a 16 color video mode, so round up the page size to - * 8k, 16k, 32k or 64k boundaries depending on how large it is. - */ + /* We have a 16 color video mode, so round up the page size to + * 8k, 16k, 32k or 64k boundaries depending on how large it is. + */ - size = (size + 0x1FFFL) & 0xFFFFE000L; - if (size != 0x2000) { - size = (size + 0x3FFFL) & 0xFFFFC000L; - if (size != 0x4000) { - size = (size + 0x7FFFL) & 0xFFFF8000L; - if (size != 0x8000) - size = (size + 0xFFFFL) & 0xFFFF0000L; - } - } - } + size = (size + 0x1FFFL) & 0xFFFFE000L; + if (size != 0x2000) { + size = (size + 0x3FFFL) & 0xFFFFC000L; + if (size != 0x4000) { + size = (size + 0x7FFFL) & 0xFFFF8000L; + if (size != 0x8000) + size = (size + 0xFFFFL) & 0xFFFF0000L; + } + } + } else size = (size + 0xFFFFL) & 0xFFFF0000L; return size; } @@ -425,26 +425,26 @@ RMREGS regs; if (state->VBEVersion < 0x200 && mode < 0x100) { - /* Some VBE implementations barf terribly if you try to set non-VBE - * video modes with the VBE set mode call. VBE 2.0 implementations - * must be able to handle this. - */ - regs.h.al = (ushort)mode; - regs.h.ah = 0; - PM_int86(0x10,®s,®s); - } + /* Some VBE implementations barf terribly if you try to set non-VBE + * video modes with the VBE set mode call. VBE 2.0 implementations + * must be able to handle this. + */ + regs.h.al = (ushort)mode; + regs.h.ah = 0; + PM_int86(0x10,®s,®s); + } else { - if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl)) - return false; - regs.x.ax = 0x4F02; - regs.x.bx = (ushort)mode; - if ((mode & vbeRefreshCtrl) && crtc) - VBE_callESDI(®s, crtc, sizeof(*crtc)); - else - PM_int86(0x10,®s,®s); - if (regs.x.ax != VBE_SUCCESS) - return false; - } + if (state->VBEVersion < 0x300 && (mode & vbeRefreshCtrl)) + return false; + regs.x.ax = 0x4F02; + regs.x.bx = (ushort)mode; + if ((mode & vbeRefreshCtrl) && crtc) + VBE_callESDI(®s, crtc, sizeof(*crtc)); + else + PM_int86(0x10,®s,®s); + if (regs.x.ax != VBE_SUCCESS) + return false; + } return true; } @@ -475,7 +475,7 @@ regs.x.ax = 0x4F03; PM_int86(0x10,®s,®s); if (regs.x.ax != VBE_SUCCESS) - return -1; + return -1; return regs.x.bx; } @@ -515,7 +515,7 @@ regs.h.bl = window; PM_int86(0x10,®s,®s); if (regs.x.ax != VBE_SUCCESS) - return -1; + return -1; return regs.x.dx; } @@ -637,7 +637,7 @@ regs.x.ax = 0x4F07; if (waitVRT) - regs.x.bx = 0x80; + regs.x.bx = 0x80; else regs.x.bx = 0x00; regs.x.cx = x; regs.x.dx = y; @@ -685,12 +685,12 @@ RMREGS regs; if (state->VBEVersion >= 0x300) { - regs.x.ax = 0x4F07; - regs.x.bx = waitVRT ? 0x82 : 0x02; - regs.e.ecx = startAddr; - PM_int86(0x10,®s,®s); - return regs.x.ax == VBE_SUCCESS; - } + regs.x.ax = 0x4F07; + regs.x.bx = waitVRT ? 0x82 : 0x02; + regs.e.ecx = startAddr; + PM_int86(0x10,®s,®s); + return regs.x.ax == VBE_SUCCESS; + } return false; } @@ -712,12 +712,12 @@ RMREGS regs; if (state->VBEVersion >= 0x300) { - regs.x.ax = 0x4F07; - regs.x.bx = 0x0004; - PM_int86(0x10,®s,®s); - if (regs.x.ax == VBE_SUCCESS) - return (regs.x.cx != 0); - } + regs.x.ax = 0x4F07; + regs.x.bx = 0x0004; + PM_int86(0x10,®s,®s); + if (regs.x.ax == VBE_SUCCESS) + return (regs.x.cx != 0); + } return -1; } @@ -738,11 +738,11 @@ RMREGS regs; if (state->VBEVersion >= 0x300) { - regs.x.ax = 0x4F07; - regs.x.bx = 0x0005; - PM_int86(0x10,®s,®s); - return regs.x.ax == VBE_SUCCESS; - } + regs.x.ax = 0x4F07; + regs.x.bx = 0x0005; + PM_int86(0x10,®s,®s); + return regs.x.ax == VBE_SUCCESS; + } return false; } @@ -762,11 +762,11 @@ RMREGS regs; if (state->VBEVersion >= 0x300) { - regs.x.ax = 0x4F07; - regs.x.bx = 0x0006; - PM_int86(0x10,®s,®s); - return regs.x.ax == VBE_SUCCESS; - } + regs.x.ax = 0x4F07; + regs.x.bx = 0x0006; + PM_int86(0x10,®s,®s); + return regs.x.ax == VBE_SUCCESS; + } return false; } @@ -793,13 +793,13 @@ RMREGS regs; if (state->VBEVersion >= 0x300) { - regs.x.ax = 0x4F07; - regs.x.bx = waitVRT ? 0x83 : 0x03; - regs.e.ecx = leftAddr; - regs.e.edx = rightAddr; - PM_int86(0x10,®s,®s); - return regs.x.ax == VBE_SUCCESS; - } + regs.x.ax = 0x4F07; + regs.x.bx = waitVRT ? 0x83 : 0x03; + regs.e.ecx = leftAddr; + regs.e.edx = rightAddr; + PM_int86(0x10,®s,®s); + return regs.x.ax == VBE_SUCCESS; + } return false; } @@ -832,14 +832,14 @@ RMREGS regs; if (state->VBEVersion >= 0x300) { - regs.x.ax = 0x4F0B; - regs.h.bl = 0x00; - regs.e.ecx = pixelClock; - regs.x.dx = mode; - PM_int86(0x10,®s,®s); - if (regs.x.ax == VBE_SUCCESS) - return regs.e.ecx; - } + regs.x.ax = 0x4F0B; + regs.h.bl = 0x00; + regs.e.ecx = pixelClock; + regs.x.dx = mode; + PM_int86(0x10,®s,®s); + if (regs.x.ax == VBE_SUCCESS) + return regs.e.ecx; + } return -1; } @@ -875,7 +875,7 @@ regs.h.bl = 0x01; PM_int86(0x10,®s,®s); if (regs.x.ax != VBE_SUCCESS) - return -1; + return -1; return regs.h.bh; } @@ -927,11 +927,11 @@ */ ulong seg = (ushort)modeInfo->WinASegment; if (seg != 0) { - if (seg == 0xA000) - return (void*)PM_getA0000Pointer(); - else - return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true); - } + if (seg == 0xA000) + return (void*)PM_getA0000Pointer(); + else + return (void*)PM_mapPhysicalAddr(seg << 4,0xFFFF,true); + } return NULL; } @@ -956,14 +956,14 @@ /* Search for an already mapped pointer */ for (i = 0; i < numPtrs; i++) { - if (physPtr[i] == modeInfo->PhysBasePtr) - return linPtr[i]; - } + if (physPtr[i] == modeInfo->PhysBasePtr) + return linPtr[i]; + } if (numPtrs < MAX_LIN_PTRS) { - physPtr[numPtrs] = modeInfo->PhysBasePtr; - linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true); - return linPtr[numPtrs++]; - } + physPtr[numPtrs] = modeInfo->PhysBasePtr; + linPtr[numPtrs] = PM_mapPhysicalAddr(modeInfo->PhysBasePtr,(state->VBEMemory * 1024L)-1,true); + return linPtr[numPtrs++]; + } return NULL; } @@ -989,56 +989,56 @@ int pmLen; if (!state->pmInfo && state->VBEVersion >= 0x200) { - regs.x.ax = 0x4F0A; - regs.x.bx = 0; - PM_int86x(0x10,®s,®s,&sregs); - if (regs.x.ax != VBE_SUCCESS) - return; - if (VBE_shared) - state->pmInfo = PM_mallocShared(regs.x.cx); - else - state->pmInfo = PM_malloc(regs.x.cx); - if (state->pmInfo == NULL) - return; - state->pmInfo32 = state->pmInfo; - pmLen = regs.x.cx; + regs.x.ax = 0x4F0A; + regs.x.bx = 0; + PM_int86x(0x10,®s,®s,&sregs); + if (regs.x.ax != VBE_SUCCESS) + return; + if (VBE_shared) + state->pmInfo = PM_mallocShared(regs.x.cx); + else + state->pmInfo = PM_malloc(regs.x.cx); + if (state->pmInfo == NULL) + return; + state->pmInfo32 = state->pmInfo; + pmLen = regs.x.cx; - /* Relocate the block into our local data segment */ - code = PM_mapRealPointer(sregs.es,regs.x.di); - memcpy(state->pmInfo,code,pmLen); + /* Relocate the block into our local data segment */ + code = PM_mapRealPointer(sregs.es,regs.x.di); + memcpy(state->pmInfo,code,pmLen); - /* Now do a sanity check on the information we recieve to ensure - * that is is correct. Some BIOS return totally bogus information - * in here (Matrox is one)! Under DOS this works OK, but under OS/2 - * we are screwed. - */ - if (state->pmInfo->setWindow >= pmLen || - state->pmInfo->setDisplayStart >= pmLen || - state->pmInfo->setPalette >= pmLen || - state->pmInfo->IOPrivInfo >= pmLen) { - if (VBE_shared) - PM_freeShared(state->pmInfo); - else - PM_free(state->pmInfo); - state->pmInfo32 = state->pmInfo = NULL; - return; - } + /* Now do a sanity check on the information we recieve to ensure + * that is is correct. Some BIOS return totally bogus information + * in here (Matrox is one)! Under DOS this works OK, but under OS/2 + * we are screwed. + */ + if (state->pmInfo->setWindow >= pmLen || + state->pmInfo->setDisplayStart >= pmLen || + state->pmInfo->setPalette >= pmLen || + state->pmInfo->IOPrivInfo >= pmLen) { + if (VBE_shared) + PM_freeShared(state->pmInfo); + else + PM_free(state->pmInfo); + state->pmInfo32 = state->pmInfo = NULL; + return; + } - /* Read the IO priveledge info and determine if we need to - * pass a selector to MMIO registers to the bank switch code. - * Since we no longer support selector allocation, we no longer - * support this mechanism so we disable the protected mode - * interface in this case. - */ - if (state->pmInfo->IOPrivInfo && !state->MMIOSel) { - ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo); - while (*p != 0xFFFF) - p++; - p++; - if (*p != 0xFFFF) - VBE_freePMCode(); - } - } + /* Read the IO priveledge info and determine if we need to + * pass a selector to MMIO registers to the bank switch code. + * Since we no longer support selector allocation, we no longer + * support this mechanism so we disable the protected mode + * interface in this case. + */ + if (state->pmInfo->IOPrivInfo && !state->MMIOSel) { + ushort *p = (ushort*)((uchar*)state->pmInfo + state->pmInfo->IOPrivInfo); + while (*p != 0xFFFF) + p++; + p++; + if (*p != 0xFFFF) + VBE_freePMCode(); + } + } } void * VBEAPI VBE_getSetBank(void) @@ -1050,10 +1050,10 @@ ****************************************************************************/ { if (state->VBEVersion >= 0x200) { - InitPMCode(); - if (state->pmInfo) - return (uchar*)state->pmInfo + state->pmInfo->setWindow; - } + InitPMCode(); + if (state->pmInfo) + return (uchar*)state->pmInfo + state->pmInfo->setWindow; + } return NULL; } @@ -1066,10 +1066,10 @@ ****************************************************************************/ { if (state->VBEVersion >= 0x200) { - InitPMCode(); - if (state->pmInfo) - return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart; - } + InitPMCode(); + if (state->pmInfo) + return (uchar*)state->pmInfo + state->pmInfo->setDisplayStart; + } return NULL; } @@ -1082,10 +1082,10 @@ ****************************************************************************/ { if (state->VBEVersion >= 0x200) { - InitPMCode(); - if (state->pmInfo) - return (uchar*)state->pmInfo + state->pmInfo->setPalette; - } + InitPMCode(); + if (state->pmInfo) + return (uchar*)state->pmInfo + state->pmInfo->setPalette; + } return NULL; } @@ -1104,13 +1104,13 @@ ****************************************************************************/ { if (state->pmInfo) { - if (VBE_shared) - PM_freeShared(state->pmInfo); - else - PM_free(state->pmInfo); - state->pmInfo = NULL; - state->pmInfo32 = NULL; - } + if (VBE_shared) + PM_freeShared(state->pmInfo); + else + PM_free(state->pmInfo); + state->pmInfo = NULL; + state->pmInfo32 = NULL; + } } void VBEAPI VBE_sharePMCode(void) @@ -1183,31 +1183,31 @@ InitPMCode(); if (state->VBEVersion >= 0x200 && state->pmInfo32 && !state->MMIOSel) { - code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow; - if (state->pmInfo32->extensionSig == VBE20_EXT_SIG) - len = state->pmInfo32->setWindowLen-1; - else { - /* We are running on a system without the UniVBE 5.2 extension. - * We do as best we can by scanning through the code for the - * ret function to determine the length. This is not foolproof, - * but is the best we can do. - */ - p = code; - while (*p != 0xC3) - p++; - len = p - code; - } - if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32)) - PM_fatalError("32-bit bank switch function too long!"); - copy(p,bankFunc32,VBE20A_bankFunc32_Start); - memcpy(p,code,len); - p += len; - copy(p,p,VBE20_bankFunc32_End); - *codeLen = p - bankFunc32; - bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust; - *bankFunc = bankFunc32; - return true; - } + code = (uchar*)state->pmInfo32 + state->pmInfo32->setWindow; + if (state->pmInfo32->extensionSig == VBE20_EXT_SIG) + len = state->pmInfo32->setWindowLen-1; + else { + /* We are running on a system without the UniVBE 5.2 extension. + * We do as best we can by scanning through the code for the + * ret function to determine the length. This is not foolproof, + * but is the best we can do. + */ + p = code; + while (*p != 0xC3) + p++; + len = p - code; + } + if ((len + sizeof(VBE20A_bankFunc32_Start) + sizeof(VBE20_bankFunc32_End)) > sizeof(bankFunc32)) + PM_fatalError("32-bit bank switch function too long!"); + copy(p,bankFunc32,VBE20A_bankFunc32_Start); + memcpy(p,code,len); + p += len; + copy(p,p,VBE20_bankFunc32_End); + *codeLen = p - bankFunc32; + bankFunc32[VBE20_adjustOffset] = (uchar)bankAdjust; + *bankFunc = bankFunc32; + return true; + } return false; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c index c8f825e..cb3afe2 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c +++ b/board/MAI/bios_emulator/scitech/src/pm/beos/cpuinfo.c @@ -64,8 +64,8 @@ static void GetCounterFrequency( CPU_largeInteger *freq) { - // TODO: Return the frequency of the counter in here. You should try to - // normalise this value to be around 100,000 ticks per second. + /* TODO: Return the frequency of the counter in here. You should try to */ + /* normalise this value to be around 100,000 ticks per second. */ freq->low = 1000000; freq->high = 0; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/event.c b/board/MAI/bios_emulator/scitech/src/pm/beos/event.c index 4c32ce7..93c6c0a 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/beos/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/beos/event.c @@ -59,7 +59,7 @@ ****************************************************************************/ ulong _EVT_getTicks(void) { - // TODO: Implement this for your OS! + /* TODO: Implement this for your OS! */ } /**************************************************************************** @@ -68,36 +68,36 @@ ****************************************************************************/ static void _EVT_pumpMessages(void) { - // TODO: The purpose of this function is to read all keyboard and mouse - // events from the OS specific event queue, translate them and post - // them into the SciTech event queue. - // - // NOTE: There are a couple of important things that this function must - // take care of: - // - // 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. - // - // 2. Support for reading hardware scan code as well as ASCII - // translated values is required. Games use the scan codes rather - // than ASCII values. Scan codes go into the high order byte of the - // keyboard message field. - // - // 3. Support for at least reading mouse motion data (mickeys) from the - // mouse is required. Using the mickey values, we can then translate - // to mouse cursor coordinates scaled to the range of the current - // graphics display mode. Mouse values are scaled based on the - // global 'rangeX' and 'rangeY'. - // - // 4. Support for a timestamp for the events is required, which is - // defined as the number of milliseconds since some event (usually - // system startup). This is the timestamp when the event occurred - // (ie: at interrupt time) not when it was stuff into the SciTech - // event queue. - // - // 5. Support for mouse double click events. If the OS has a native - // mechanism to determine this, it should be used. Otherwise the - // time stamp information will be used by the generic event code - // to generate double click events. + /* TODO: The purpose of this function is to read all keyboard and mouse */ + /* events from the OS specific event queue, translate them and post */ + /* them into the SciTech event queue. */ + /* */ + /* NOTE: There are a couple of important things that this function must */ + /* take care of: */ + /* */ + /* 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. */ + /* */ + /* 2. Support for reading hardware scan code as well as ASCII */ + /* translated values is required. Games use the scan codes rather */ + /* than ASCII values. Scan codes go into the high order byte of the */ + /* keyboard message field. */ + /* */ + /* 3. Support for at least reading mouse motion data (mickeys) from the */ + /* mouse is required. Using the mickey values, we can then translate */ + /* to mouse cursor coordinates scaled to the range of the current */ + /* graphics display mode. Mouse values are scaled based on the */ + /* global 'rangeX' and 'rangeY'. */ + /* */ + /* 4. Support for a timestamp for the events is required, which is */ + /* defined as the number of milliseconds since some event (usually */ + /* system startup). This is the timestamp when the event occurred */ + /* (ie: at interrupt time) not when it was stuff into the SciTech */ + /* event queue. */ + /* */ + /* 5. Support for mouse double click events. If the OS has a native */ + /* mechanism to determine this, it should be used. Otherwise the */ + /* time stamp information will be used by the generic event code */ + /* to generate double click events. */ } /**************************************************************************** @@ -141,7 +141,7 @@ initEventQueue(); memset(keyUpMsg,0,sizeof(keyUpMsg)); - // TODO: Do any OS specific initialisation here + /* TODO: Do any OS specific initialisation here */ /* Catch program termination signals so we can clean up properly */ signal(SIGABRT, _EVT_abort); @@ -171,7 +171,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for non DOS systems + /* Do nothing for non DOS systems */ } /**************************************************************************** @@ -181,7 +181,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for non DOS systems + /* Do nothing for non DOS systems */ } /**************************************************************************** @@ -195,5 +195,5 @@ signal(SIGFPE, SIG_DFL); signal(SIGINT, SIG_DFL); - // TODO: Do any OS specific cleanup in here + /* TODO: Do any OS specific cleanup in here */ } diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h index ab423d4..043d73e 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h +++ b/board/MAI/bios_emulator/scitech/src/pm/beos/oshdr.h @@ -28,5 +28,5 @@ * ****************************************************************************/ -// This is where you include OS specific headers for the event handling -// library. +/* This is where you include OS specific headers for the event handling */ +/* library. */ diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c b/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c index c57d82a..2dcb1b8 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/beos/pm.c @@ -38,7 +38,7 @@ #include #include -// TODO: Include any BeOS specific headers here! +/* TODO: Include any BeOS specific headers here! */ /*--------------------------- Global variables ----------------------------*/ @@ -48,12 +48,12 @@ void PMAPI PM_init(void) { - // TODO: Do any initialisation in here. This includes getting IOPL - // access for the process calling PM_init. This will get called - // more than once. + /* TODO: Do any initialisation in here. This includes getting IOPL */ + /* access for the process calling PM_init. This will get called */ + /* more than once. */ - // TODO: If you support the supplied MTRR register stuff (you need to - // be at ring 0 for this!), you should initialise it in here. + /* TODO: If you support the supplied MTRR register stuff (you need to */ + /* be at ring 0 for this!), you should initialise it in here. */ /* MTRR_init(); */ } @@ -68,9 +68,9 @@ { uint pos = strlen(s); if (s[pos-1] != '/') { - s[pos] = '/'; - s[pos+1] = '\0'; - } + s[pos] = '/'; + s[pos+1] = '\0'; + } } void PMAPI PM_setFatalErrorCleanup( @@ -81,112 +81,112 @@ void PMAPI PM_fatalError(const char *msg) { - // TODO: If you are running in a GUI environment without a console, - // this needs to be changed to bring up a fatal error message - // box and terminate the program. + /* TODO: If you are running in a GUI environment without a console, */ + /* this needs to be changed to bring up a fatal error message */ + /* box and terminate the program. */ if (fatalErrorCleanup) - fatalErrorCleanup(); + fatalErrorCleanup(); fprintf(stderr,"%s\n", msg); exit(1); } void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff) { - // No BIOS access for the BeOS + /* No BIOS access for the BeOS */ return NULL; } int PMAPI PM_kbhit(void) { - // TODO: This function checks if a key is available to be read. This - // should be implemented, but is mostly used by the test programs - // these days. + /* TODO: This function checks if a key is available to be read. This */ + /* should be implemented, but is mostly used by the test programs */ + /* these days. */ return true; } int PMAPI PM_getch(void) { - // TODO: This returns the ASCII code of the key pressed. This - // should be implemented, but is mostly used by the test programs - // these days. + /* TODO: This returns the ASCII code of the key pressed. This */ + /* should be implemented, but is mostly used by the test programs */ + /* these days. */ return 0xD; } int PMAPI PM_openConsole(void) { - // TODO: Opens up a fullscreen console for graphics output. If your - // console does not have graphics/text modes, this can be left - // empty. The main purpose of this is to disable console switching - // when in graphics modes if you can switch away from fullscreen - // consoles (if you want to allow switching, this can be done - // elsewhere with a full save/restore state of the graphics mode). + /* TODO: Opens up a fullscreen console for graphics output. If your */ + /* console does not have graphics/text modes, this can be left */ + /* empty. The main purpose of this is to disable console switching */ + /* when in graphics modes if you can switch away from fullscreen */ + /* consoles (if you want to allow switching, this can be done */ + /* elsewhere with a full save/restore state of the graphics mode). */ return 0; } int PMAPI PM_getConsoleStateSize(void) { - // TODO: Returns the size of the console state buffer used to save the - // state of the console before going into graphics mode. This is - // used to restore the console back to normal when we are done. + /* TODO: Returns the size of the console state buffer used to save the */ + /* state of the console before going into graphics mode. This is */ + /* used to restore the console back to normal when we are done. */ return 1; } void PMAPI PM_saveConsoleState(void *stateBuf,int console_id) { - // TODO: Saves the state of the console into the state buffer. This is - // used to restore the console back to normal when we are done. - // We will always restore 80x25 text mode after being in graphics - // mode, so if restoring text mode is all you need to do this can - // be left empty. + /* TODO: Saves the state of the console into the state buffer. This is */ + /* used to restore the console back to normal when we are done. */ + /* We will always restore 80x25 text mode after being in graphics */ + /* mode, so if restoring text mode is all you need to do this can */ + /* be left empty. */ } void PMAPI PM_restoreConsoleState(const void *stateBuf,int console_id) { - // TODO: Restore the state of the console from the state buffer. This is - // used to restore the console back to normal when we are done. - // We will always restore 80x25 text mode after being in graphics - // mode, so if restoring text mode is all you need to do this can - // be left empty. + /* TODO: Restore the state of the console from the state buffer. This is */ + /* used to restore the console back to normal when we are done. */ + /* We will always restore 80x25 text mode after being in graphics */ + /* mode, so if restoring text mode is all you need to do this can */ + /* be left empty. */ } void PMAPI PM_closeConsole(int console_id) { - // TODO: Close the console when we are done, going back to text mode. + /* TODO: Close the console when we are done, going back to text mode. */ } void PM_setOSCursorLocation(int x,int y) { - // TODO: Set the OS console cursor location to the new value. This is - // generally used for new OS ports (used mostly for DOS). + /* TODO: Set the OS console cursor location to the new value. This is */ + /* generally used for new OS ports (used mostly for DOS). */ } void PM_setOSScreenWidth(int width,int height) { - // TODO: Set the OS console screen width. This is generally unused for - // new OS ports. + /* TODO: Set the OS console screen width. This is generally unused for */ + /* new OS ports. */ } ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency) { - // TODO: Install a real time clock interrupt handler. Normally this - // will not be supported from most OS'es in user land, so an - // alternative mechanism is needed to enable software stereo. - // Hence leave this unimplemented unless you have a high priority - // mechanism to call the 32-bit callback when the real time clock - // interrupt fires. + /* TODO: Install a real time clock interrupt handler. Normally this */ + /* will not be supported from most OS'es in user land, so an */ + /* alternative mechanism is needed to enable software stereo. */ + /* Hence leave this unimplemented unless you have a high priority */ + /* mechanism to call the 32-bit callback when the real time clock */ + /* interrupt fires. */ return false; } void PMAPI PM_setRealTimeClockFrequency(int frequency) { - // TODO: Set the real time clock interrupt frequency. Used for stereo - // LC shutter glasses when doing software stereo. Usually sets - // the frequency to around 2048 Hz. + /* TODO: Set the real time clock interrupt frequency. Used for stereo */ + /* LC shutter glasses when doing software stereo. Usually sets */ + /* the frequency to around 2048 Hz. */ } void PMAPI PM_restoreRealTimeClockHandler(void) { - // TODO: Restores the real time clock handler. + /* TODO: Restores the real time clock handler. */ } char * PMAPI PM_getCurrentPath( @@ -219,8 +219,8 @@ const char * PMAPI PM_getUniqueID(void) { - // TODO: Return a unique ID for the machine. If a unique ID is not - // available, return the machine name. + /* TODO: Return a unique ID for the machine. If a unique ID is not */ + /* available, return the machine name. */ static char buf[128]; gethostname(buf, 128); return buf; @@ -228,7 +228,7 @@ const char * PMAPI PM_getMachineName(void) { - // TODO: Return the network machine name for the machine. + /* TODO: Return the network machine name for the machine. */ static char buf[128]; gethostname(buf, 128); return buf; @@ -236,7 +236,7 @@ void * PMAPI PM_getBIOSPointer(void) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ return NULL; } @@ -244,212 +244,212 @@ { static void *bankPtr; if (!bankPtr) - bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); + bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); return bankPtr; } void * PMAPI PM_mapPhysicalAddr(ulong base,ulong limit,ibool isCached) { - // TODO: This function maps a physical memory address to a linear - // address in the address space of the calling process. + /* TODO: This function maps a physical memory address to a linear */ + /* address in the address space of the calling process. */ - // NOTE: This function *must* be able to handle any phsyical base - // address, and hence you will have to handle rounding of - // the physical base address to a page boundary (ie: 4Kb on - // x86 CPU's) to be able to properly map in the memory - // region. + /* NOTE: This function *must* be able to handle any phsyical base */ + /* address, and hence you will have to handle rounding of */ + /* the physical base address to a page boundary (ie: 4Kb on */ + /* x86 CPU's) to be able to properly map in the memory */ + /* region. */ - // NOTE: If possible the isCached bit should be used to ensure that - // the PCD (Page Cache Disable) and PWT (Page Write Through) - // bits are set to disable caching for a memory mapping used - // for MMIO register access. We also disable caching using - // the MTRR registers for Pentium Pro and later chipsets so if - // MTRR support is enabled for your OS then you can safely ignore - // the isCached flag and always enable caching in the page - // tables. + /* NOTE: If possible the isCached bit should be used to ensure that */ + /* the PCD (Page Cache Disable) and PWT (Page Write Through) */ + /* bits are set to disable caching for a memory mapping used */ + /* for MMIO register access. We also disable caching using */ + /* the MTRR registers for Pentium Pro and later chipsets so if */ + /* MTRR support is enabled for your OS then you can safely ignore */ + /* the isCached flag and always enable caching in the page */ + /* tables. */ return NULL; } void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit) { - // TODO: This function will free a physical memory mapping previously - // allocated with PM_mapPhysicalAddr() if at all possible. If - // you can't free physical memory mappings, simply do nothing. + /* TODO: This function will free a physical memory mapping previously */ + /* allocated with PM_mapPhysicalAddr() if at all possible. If */ + /* you can't free physical memory mappings, simply do nothing. */ } ulong PMAPI PM_getPhysicalAddr(void *p) { - // TODO: This function should find the physical address of a linear - // address. + /* TODO: This function should find the physical address of a linear */ + /* address. */ return 0xFFFFFFFFUL; } void PMAPI PM_sleep(ulong milliseconds) { - // TODO: Put the process to sleep for milliseconds + /* TODO: Put the process to sleep for milliseconds */ } int PMAPI PM_getCOMPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + } return 0; } int PMAPI PM_getLPTPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } void * PMAPI PM_mallocShared(long size) { - // TODO: This is used to allocate memory that is shared between process - // that all access the common Nucleus drivers via a common display - // driver DLL. If your OS does not support shared memory (or if - // the display driver does not need to allocate shared memory - // for each process address space), this should just call PM_malloc. + /* TODO: This is used to allocate memory that is shared between process */ + /* that all access the common Nucleus drivers via a common display */ + /* driver DLL. If your OS does not support shared memory (or if */ + /* the display driver does not need to allocate shared memory */ + /* for each process address space), this should just call PM_malloc. */ return PM_malloc(size); } void PMAPI PM_freeShared(void *ptr) { - // TODO: Free the shared memory block. This will be called in the context - // of the original calling process that allocated the shared - // memory with PM_mallocShared. Simply call free if you do not - // need this. + /* TODO: Free the shared memory block. This will be called in the context */ + /* of the original calling process that allocated the shared */ + /* memory with PM_mallocShared. Simply call free if you do not */ + /* need this. */ PM_free(ptr); } void * PMAPI PM_mapToProcess(void *base,ulong limit) { - // TODO: This function is used to map a physical memory mapping - // previously allocated with PM_mapPhysicalAddr into the - // address space of the calling process. If the memory mapping - // allocated by PM_mapPhysicalAddr is global to all processes, - // simply return the pointer. + /* TODO: This function is used to map a physical memory mapping */ + /* previously allocated with PM_mapPhysicalAddr into the */ + /* address space of the calling process. If the memory mapping */ + /* allocated by PM_mapPhysicalAddr is global to all processes, */ + /* simply return the pointer. */ return base; } void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ return NULL; } void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ return NULL; } void PMAPI PM_freeRealSeg(void *mem) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ } void PMAPI DPMI_int86(int intno, DPMI_regs *regs) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ } int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ return 0; } int PMAPI PM_int86x(int intno, RMREGS *in, RMREGS *out, RMSREGS *sregs) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ return 0; } void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in, RMSREGS *sregs) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ } void PMAPI PM_availableMemory(ulong *physical,ulong *total) { - // TODO: Report the amount of available memory, both the amount of - // physical memory left and the amount of virtual memory left. - // If the OS does not provide these services, report 0's. + /* TODO: Report the amount of available memory, both the amount of */ + /* physical memory left and the amount of virtual memory left. */ + /* If the OS does not provide these services, report 0's. */ *physical = *total = 0; } void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16Meg) { - // TODO: Allocate a block of locked, physical memory of the specified - // size. This is used for bus master operations. If this is not - // supported by the OS, return NULL and bus mastering will not - // be used. + /* TODO: Allocate a block of locked, physical memory of the specified */ + /* size. This is used for bus master operations. If this is not */ + /* supported by the OS, return NULL and bus mastering will not */ + /* be used. */ return NULL; } void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous) { - // TODO: Free a memory block allocated with PM_allocLockedMem. + /* TODO: Free a memory block allocated with PM_allocLockedMem. */ } void PMAPI PM_setBankA(int bank) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ } void PMAPI PM_setBankAB(int bank) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ } void PMAPI PM_setCRTStart(int x,int y,int waitVRT) { - // No BIOS access on the BeOS + /* No BIOS access on the BeOS */ } ibool PMAPI PM_enableWriteCombine(ulong base,ulong length,uint type) { - // TODO: This function should enable Pentium Pro and Pentium II MTRR - // write combining for the passed in physical memory base address - // and length. Normally this is done via calls to an OS specific - // device driver as this can only be done at ring 0. - // - // NOTE: This is a *very* important function to implement! If you do - // not implement, graphics performance on the latest Intel chips - // will be severly impaired. For sample code that can be used - // directly in a ring 0 device driver, see the MSDOS implementation - // which includes assembler code to do this directly (if the - // program is running at ring 0). + /* TODO: This function should enable Pentium Pro and Pentium II MTRR */ + /* write combining for the passed in physical memory base address */ + /* and length. Normally this is done via calls to an OS specific */ + /* device driver as this can only be done at ring 0. */ + /* */ + /* NOTE: This is a *very* important function to implement! If you do */ + /* not implement, graphics performance on the latest Intel chips */ + /* will be severly impaired. For sample code that can be used */ + /* directly in a ring 0 device driver, see the MSDOS implementation */ + /* which includes assembler code to do this directly (if the */ + /* program is running at ring 0). */ return false; } ibool PMAPI PM_doBIOSPOST(ushort axVal,ulong BIOSPhysAddr,void *mappedBIOS) { - // TODO: This function is used to run the BIOS POST code on a secondary - // controller to initialise it for use. This is not necessary - // for multi-controller operation, but it will make it a lot - // more convenicent for end users (otherwise they have to boot - // the system once with the secondary controller as primary, and - // then boot with both controllers installed). - // - // Even if you don't support full BIOS access, it would be - // adviseable to be able to POST the secondary controllers in the - // system using this function as a minimum requirement. Some - // graphics hardware has registers that contain values that only - // the BIOS knows about, which makes bring up a card from cold - // reset difficult if the BIOS has not POST'ed it. + /* TODO: This function is used to run the BIOS POST code on a secondary */ + /* controller to initialise it for use. This is not necessary */ + /* for multi-controller operation, but it will make it a lot */ + /* more convenicent for end users (otherwise they have to boot */ + /* the system once with the secondary controller as primary, and */ + /* then boot with both controllers installed). */ + /* */ + /* Even if you don't support full BIOS access, it would be */ + /* adviseable to be able to POST the secondary controllers in the */ + /* system using this function as a minimum requirement. Some */ + /* graphics hardware has registers that contain values that only */ + /* the BIOS knows about, which makes bring up a card from cold */ + /* reset difficult if the BIOS has not POST'ed it. */ return false; } @@ -506,7 +506,7 @@ char drive) { if (drive == 3) - return true; + return true; return false; } @@ -533,7 +533,7 @@ const char *filename, uint attrib) { - // TODO: Set the file attributes for a file + /* TODO: Set the file attributes for a file */ (void)filename; (void)attrib; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c index a5637a5..a528b73 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c +++ b/board/MAI/bios_emulator/scitech/src/pm/beos/ztimer.c @@ -36,7 +36,7 @@ ****************************************************************************/ void _ZTimerInit(void) { - // TODO: Do any specific internal initialisation in here + /* TODO: Do any specific internal initialisation in here */ } /**************************************************************************** @@ -46,8 +46,8 @@ static void _LZTimerOn( LZTimerObject *tm) { - // TODO: Start the Zen Timer counting. This should be a macro if - // possible. + /* TODO: Start the Zen Timer counting. This should be a macro if */ + /* possible. */ } /**************************************************************************** @@ -57,8 +57,8 @@ static ulong _LZTimerLap( LZTimerObject *tm) { - // TODO: Compute the lap time between the current time and when the - // timer was started. + /* TODO: Compute the lap time between the current time and when the */ + /* timer was started. */ return 0; } @@ -69,7 +69,7 @@ static void _LZTimerOff( LZTimerObject *tm) { - // TODO: Stop the timer counting. Should be a macro if possible. + /* TODO: Stop the timer counting. Should be a macro if possible. */ } /**************************************************************************** @@ -79,7 +79,7 @@ static ulong _LZTimerCount( LZTimerObject *tm) { - // TODO: Compute the elapsed time and return it. Always microseconds. + /* TODO: Compute the elapsed time and return it. Always microseconds. */ return 0; } @@ -95,9 +95,9 @@ ****************************************************************************/ static ulong _ULZReadTime(void) { - // TODO: Read the long period timer from the OS. The resolution of this - // timer should be around 1/20 of a second for timing long - // periods if possible. + /* TODO: Read the long period timer from the OS. The resolution of this */ + /* timer should be around 1/20 of a second for timing long */ + /* periods if possible. */ } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/common.c b/board/MAI/bios_emulator/scitech/src/pm/common.c index b100b8a..d5a8e8f 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/common.c +++ b/board/MAI/bios_emulator/scitech/src/pm/common.c @@ -98,9 +98,9 @@ strcpy(filename,bpdpath); strcat(filename,dllname); if ((f = fopen(filename,"rb")) == NULL) - return false; + return false; if (cachedpath) - strcpy(cachedpath,bpdpath); + strcpy(cachedpath,bpdpath); fclose(f); return true; } @@ -121,20 +121,20 @@ static ibool local_override = -1; if (local_override == -1) { - local_override = false; - strcpy(filename,PM_getNucleusPath()); - PM_backslash(filename); - strcat(filename,"graphics.ini"); - if ((f = fopen(filename,"r")) != NULL) { - while (!feof(f) && fgets(filename,sizeof(filename),f)) { - if (strnicmp(filename,"uselocal",8) == 0) { - local_override = ((*(filename+9) - '0') == 1); - break; - } - } - fclose(f); - } - } + local_override = false; + strcpy(filename,PM_getNucleusPath()); + PM_backslash(filename); + strcat(filename,"graphics.ini"); + if ((f = fopen(filename,"r")) != NULL) { + while (!feof(f) && fgets(filename,sizeof(filename),f)) { + if (strnicmp(filename,"uselocal",8) == 0) { + local_override = ((*(filename+9) - '0') == 1); + break; + } + } + fclose(f); + } + } return local_override; } @@ -164,44 +164,44 @@ /* On the first call determine the path to the Nucleus drivers */ if (cachedpath[0] == 0) { - /* First try in the global system Nucleus driver path if - * the local override setting is not enabled. - */ - PM_init(); - if (!GetLocalOverride()) { - if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname)) - return true; - } + /* First try in the global system Nucleus driver path if + * the local override setting is not enabled. + */ + PM_init(); + if (!GetLocalOverride()) { + if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname)) + return true; + } - /* Next try in the local application directory if available */ - if (localBPDPath[0] != 0) { - if (TryPath(bpdpath,cachedpath,localBPDPath,"",dllname)) - return true; - } - else { + /* Next try in the local application directory if available */ + if (localBPDPath[0] != 0) { + if (TryPath(bpdpath,cachedpath,localBPDPath,"",dllname)) + return true; + } + else { #if !defined(__WIN32_VXD__) && !defined(__NT_DRIVER__) - char *mgl_root; - if ((mgl_root = getenv("MGL_ROOT")) != NULL) { - if (TryPath(bpdpath,cachedpath,mgl_root,"drivers",dllname)) - return true; - } + char *mgl_root; + if ((mgl_root = getenv("MGL_ROOT")) != NULL) { + if (TryPath(bpdpath,cachedpath,mgl_root,"drivers",dllname)) + return true; + } #endif - PM_getCurrentPath(bpdpath,PM_MAX_PATH); - if (TryPath(bpdpath,cachedpath,bpdpath,"drivers",dllname)) - return true; - } + PM_getCurrentPath(bpdpath,PM_MAX_PATH); + if (TryPath(bpdpath,cachedpath,bpdpath,"drivers",dllname)) + return true; + } - /* Finally try in the global system path again so that we - * will still find the drivers in the global system path if - * the local override option is on, but the application does - * not have any local override drivers. - */ - if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname)) - return true; + /* Finally try in the global system path again so that we + * will still find the drivers in the global system path if + * the local override option is on, but the application does + * not have any local override drivers. + */ + if (TryPath(bpdpath,cachedpath,PM_getNucleusPath(),"",dllname)) + return true; - /* Whoops, we can't find the BPD file! */ - return false; - } + /* Whoops, we can't find the BPD file! */ + return false; + } /* Always try in the previously discovered path */ return TryPath(bpdpath,NULL,cachedpath,"",dllname); @@ -216,9 +216,9 @@ const char *_src) { if (!_dest || !_src) - return 0; + return 0; while ((*_dest++ = *_src++) != 0) - ; + ; return --_dest; } @@ -233,13 +233,13 @@ unsigned maxlen) { if (dst) { - if(strlen(src) >= maxlen) { - strncpy(dst, src, maxlen); - dst[maxlen] = 0; - } - else - strcpy(dst, src); - } + if(strlen(src) >= maxlen) { + strncpy(dst, src, maxlen); + dst[maxlen] = 0; + } + else + strcpy(dst, src); + } } /**************************************************************************** @@ -250,16 +250,16 @@ char *p) { if (*(p-1) == '.') - p--; + p--; switch (*--p) { - case ':': - if (*(p-2) != '\0') - break; - case '/': - case '\\': - case '\0': - return true; - } + case ':': + if (*(p-2) != '\0') + break; + case '/': + case '\\': + case '\0': + return true; + } return false; } @@ -299,25 +299,25 @@ const char *ext) { if (drive && *drive) { - *path++ = *drive; - *path++ = ':'; - } + *path++ = *drive; + *path++ = ':'; + } if (dir && *dir) { - path = _stpcpy(path,dir); - if (*(path-1) != '\\' && *(path-1) != '/') + path = _stpcpy(path,dir); + if (*(path-1) != '\\' && *(path-1) != '/') #ifdef __UNIX__ - *path++ = '/'; + *path++ = '/'; #else - *path++ = '\\'; + *path++ = '\\'; #endif - } + } if (name) - path = _stpcpy(path,name); + path = _stpcpy(path,name); if (ext && *ext) { - if (*ext != '.') - *path++ = '.'; - path = _stpcpy(path,ext); - } + if (*ext != '.') + *path++ = '.'; + path = _stpcpy(path,ext); + } *path = 0; } @@ -377,7 +377,7 @@ /* Copy filename into template up to PM_MAX_PATH characters */ p = buf; if ((temp = strlen(path)) > PM_MAX_PATH) - temp = PM_MAX_PATH; + temp = PM_MAX_PATH; *p++ = 0; strncpy(p, path, temp); *(p += temp) = 0; @@ -385,53 +385,53 @@ /* Split the filename and fill corresponding nonzero pointers */ temp = 0; for (;;) { - switch (*--p) { - case '.': - if (!temp && (*(p+1) == '\0')) - temp = findDot(p); - if ((!temp) && ((ret & PM_HAS_EXTENSION) == 0)) { - ret |= PM_HAS_EXTENSION; - safe_strncpy(ext, p, PM_MAX_PATH - 1); - *p = 0; - } - continue; - case ':': - if (p != &buf[2]) - continue; - case '\0': - if (temp) { - if (*++p) - ret |= PM_HAS_DIRECTORY; - safe_strncpy(dir, p, PM_MAX_PATH - 1); - *p-- = 0; - break; - } - case '/': - case '\\': - if (!temp) { - temp++; - if (*++p) - ret |= PM_HAS_FILENAME; - safe_strncpy(name, p, PM_MAX_PATH - 1); - *p-- = 0; - if (*p == 0 || (*p == ':' && p == &buf[2])) - break; - } - continue; - case '*': - case '?': - if (!temp) - ret |= PM_HAS_WILDCARDS; - default: - continue; - } - break; - } + switch (*--p) { + case '.': + if (!temp && (*(p+1) == '\0')) + temp = findDot(p); + if ((!temp) && ((ret & PM_HAS_EXTENSION) == 0)) { + ret |= PM_HAS_EXTENSION; + safe_strncpy(ext, p, PM_MAX_PATH - 1); + *p = 0; + } + continue; + case ':': + if (p != &buf[2]) + continue; + case '\0': + if (temp) { + if (*++p) + ret |= PM_HAS_DIRECTORY; + safe_strncpy(dir, p, PM_MAX_PATH - 1); + *p-- = 0; + break; + } + case '/': + case '\\': + if (!temp) { + temp++; + if (*++p) + ret |= PM_HAS_FILENAME; + safe_strncpy(name, p, PM_MAX_PATH - 1); + *p-- = 0; + if (*p == 0 || (*p == ':' && p == &buf[2])) + break; + } + continue; + case '*': + case '?': + if (!temp) + ret |= PM_HAS_WILDCARDS; + default: + continue; + } + break; + } if (*p == ':') { - if (buf[1]) - ret |= PM_HAS_DRIVE; - safe_strncpy(drive, &buf[1], PM_MAX_DRIVE - 1); - } + if (buf[1]) + ret |= PM_HAS_DRIVE; + safe_strncpy(drive, &buf[1], PM_MAX_DRIVE - 1); + } return ret; } @@ -466,15 +466,15 @@ static ibool firstTime = true; if (firstTime) { - firstTime = false; - LZTimerOnExt(&tm); - } + firstTime = false; + LZTimerOnExt(&tm); + } else { - if ((msDelay = (microseconds - LZTimerLapExt(&tm)) / 1000L) > 0) - PM_sleep(msDelay); - while (LZTimerLapExt(&tm) < microseconds) - ; - LZTimerOffExt(&tm); - LZTimerOnExt(&tm); - } + if ((msDelay = (microseconds - LZTimerLapExt(&tm)) / 1000L) > 0) + PM_sleep(msDelay); + while (LZTimerLapExt(&tm) < microseconds) + ; + LZTimerOffExt(&tm); + LZTimerOnExt(&tm); + } } diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/agp.c b/board/MAI/bios_emulator/scitech/src/pm/common/agp.c index 23f7e1e..d53bc88 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/common/agp.c +++ b/board/MAI/bios_emulator/scitech/src/pm/common/agp.c @@ -54,22 +54,22 @@ ulong PMAPI PM_agpInit(void) { if ((agp = AGP_loadDriver(0)) == NULL) - return 0; + return 0; driver.dwSize = sizeof(driver); if (!agp->QueryFunctions(AGP_GET_DRIVERFUNCS,&driver)) - return 0; + return 0; switch (driver.GetApertureSize()) { - case agpSize4MB: return 4; - case agpSize8MB: return 8; - case agpSize16MB: return 16; - case agpSize32MB: return 32; - case agpSize64MB: return 64; - case agpSize128MB: return 128; - case agpSize256MB: return 256; - case agpSize512MB: return 512; - case agpSize1GB: return 1024; - case agpSize2GB: return 2048; - } + case agpSize4MB: return 4; + case agpSize8MB: return 8; + case agpSize16MB: return 16; + case agpSize32MB: return 32; + case agpSize64MB: return 64; + case agpSize128MB: return 128; + case agpSize256MB: return 256; + case agpSize512MB: return 512; + case agpSize1GB: return 1024; + case agpSize2GB: return 2048; + } return 0; } @@ -106,18 +106,18 @@ PM_physAddr *physAddr) { switch (type) { - case PM_agpUncached: - type = agpUncached; - break; - case PM_agpWriteCombine: - type = agpWriteCombine; - break; - case PM_agpIntelDCACHE: - type = agpIntelDCACHE; - break; - default: - return false; - } + case PM_agpUncached: + type = agpUncached; + break; + case PM_agpWriteCombine: + type = agpWriteCombine; + break; + case PM_agpIntelDCACHE: + type = agpIntelDCACHE; + break; + default: + return false; + } return driver.ReservePhysical(numPages,type,physContext,physAddr) == nOK; } @@ -187,4 +187,3 @@ } #endif /* !REALMODE */ - diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c b/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c index 79b4040..36867bd 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c +++ b/board/MAI/bios_emulator/scitech/src/pm/common/keyboard.c @@ -52,18 +52,18 @@ int n,pivot,val; for (n = count; n > 0; ) { - pivot = n >> 1; - test = table + pivot; - val = scanCode - test->scanCode; - if (val < 0) - n = pivot; - else if (val == 0) - return test->asciiCode; - else { - table = test + 1; - n -= pivot + 1; - } - } + pivot = n >> 1; + test = table + pivot; + val = scanCode - test->scanCode; + if (val < 0) + n = pivot; + else if (val == 0) + return test->asciiCode; + else { + table = test + 1; + n -= pivot + 1; + } + } return 0; } @@ -84,35 +84,35 @@ evt->message &= ~0xFF; if (evt->modifiers & EVT_NUMLOCK) { - if ((ascii = translateScan(scan,EVT.codePage->numPad,EVT.codePage->numPadLen)) != 0) { - evt->message |= ascii; - return; - } - } + if ((ascii = translateScan(scan,EVT.codePage->numPad,EVT.codePage->numPadLen)) != 0) { + evt->message |= ascii; + return; + } + } if (evt->modifiers & EVT_CTRLSTATE) { - evt->message |= translateScan(scan,EVT.codePage->ctrl,EVT.codePage->ctrlLen); - return; - } + evt->message |= translateScan(scan,EVT.codePage->ctrl,EVT.codePage->ctrlLen); + return; + } if (evt->modifiers & EVT_CAPSLOCK) { - if (evt->modifiers & EVT_SHIFTKEY) { - if ((ascii = translateScan(scan,EVT.codePage->shiftCaps,EVT.codePage->shiftCapsLen)) != 0) { - evt->message |= ascii; - return; - } - } - else { - if ((ascii = translateScan(scan,EVT.codePage->caps,EVT.codePage->capsLen)) != 0) { - evt->message |= ascii; - return; - } - } - } + if (evt->modifiers & EVT_SHIFTKEY) { + if ((ascii = translateScan(scan,EVT.codePage->shiftCaps,EVT.codePage->shiftCapsLen)) != 0) { + evt->message |= ascii; + return; + } + } + else { + if ((ascii = translateScan(scan,EVT.codePage->caps,EVT.codePage->capsLen)) != 0) { + evt->message |= ascii; + return; + } + } + } if (evt->modifiers & EVT_SHIFTKEY) { - if ((ascii = translateScan(scan,EVT.codePage->shift,EVT.codePage->shiftLen)) != 0) { - evt->message |= ascii; - return; - } - } + if ((ascii = translateScan(scan,EVT.codePage->shift,EVT.codePage->shiftLen)) != 0) { + evt->message |= ascii; + return; + } + } evt->message |= translateScan(scan,EVT.codePage->normal,EVT.codePage->normalLen); } @@ -124,9 +124,9 @@ uchar scanCode) { if (scanCode > 0x7F) - return false; + return false; else - return EVT.keyTable[scanCode] != 0; + return EVT.keyTable[scanCode] != 0; } /**************************************************************************** @@ -139,7 +139,7 @@ within the keyboard interrupt subroutine! NOTE: Interrupts are OFF when this routine is called by the keyboard ISR, - and we leave them OFF the entire time. + and we leave them OFF the entire time. ****************************************************************************/ static void addKeyEvent( uint what, @@ -148,31 +148,31 @@ event_t evt; if (EVT.count < EVENTQSIZE) { - /* Save information in event record */ - evt.when = _EVT_getTicks(); - evt.what = what; - evt.message = message | 0x10000UL; - evt.where_x = 0; - evt.where_y = 0; - evt.relative_x = 0; - evt.relative_y = 0; - evt.modifiers = EVT.keyModifiers; - if (evt.what == EVT_KEYREPEAT) { - if (EVT.oldKey != -1) - EVT.evtq[EVT.oldKey].message += 0x10000UL; - else { - EVT.oldKey = EVT.freeHead; - addEvent(&evt); /* Add to tail of event queue */ - } - } - else { + /* Save information in event record */ + evt.when = _EVT_getTicks(); + evt.what = what; + evt.message = message | 0x10000UL; + evt.where_x = 0; + evt.where_y = 0; + evt.relative_x = 0; + evt.relative_y = 0; + evt.modifiers = EVT.keyModifiers; + if (evt.what == EVT_KEYREPEAT) { + if (EVT.oldKey != -1) + EVT.evtq[EVT.oldKey].message += 0x10000UL; + else { + EVT.oldKey = EVT.freeHead; + addEvent(&evt); /* Add to tail of event queue */ + } + } + else { #ifdef __QNX__ - _EVT_maskKeyCode(&evt); + _EVT_maskKeyCode(&evt); #endif - addEvent(&evt); /* Add to tail of event queue */ - } - EVT.oldMove = -1; - } + addEvent(&evt); /* Add to tail of event queue */ + } + EVT.oldMove = -1; + } } /**************************************************************************** @@ -184,7 +184,7 @@ { int timeout = 8192; while ((timeout > 0) && (PM_inpb(0x64) & 0x02)) - timeout--; + timeout--; return (timeout > 0); } @@ -197,7 +197,7 @@ { int timeout = 8192; while ((timeout > 0) && (!(PM_inpb(0x64) & 0x01))) - timeout--; + timeout--; return (timeout > 0); } @@ -215,20 +215,20 @@ int timeout, temp; do { - if (!kbWaitForWriteReady()) - return 0; - PM_outpb(0x60,data); - timeout = 8192; - while (--timeout > 0) { - if (!kbWaitForReadReady()) - return 0; - temp = PM_inpb(0x60); - if (temp == 0xFA) - return 1; - if (temp == 0xFE) - break; - } - } while ((resends-- > 0) && (timeout > 0)); + if (!kbWaitForWriteReady()) + return 0; + PM_outpb(0x60,data); + timeout = 8192; + while (--timeout > 0) { + if (!kbWaitForReadReady()) + return 0; + temp = PM_inpb(0x60); + if (temp == 0xFA) + return 1; + if (temp == 0xFE) + break; + } + } while ((resends-- > 0) && (timeout > 0)); return 0; } @@ -245,10 +245,10 @@ uint modifiers) { if (EVT.allowLEDS) { - if (!kbSendData(0xED) || !kbSendData((modifiers>>9) & 7)) { - kbSendData(0xF4); - } - } + if (!kbSendData(0xED) || !kbSendData((modifiers>>9) & 7)) { + kbSendData(0xF4); + } + } } /**************************************************************************** @@ -256,7 +256,7 @@ Function to process raw scan codes read from the keyboard controller. NOTE: Interrupts are OFF when this routine is called by the keyboard ISR, - and we leave them OFF the entire time. + and we leave them OFF the entire time. {secret} ****************************************************************************/ void processRawScanCode( @@ -267,156 +267,156 @@ int what; if (pauseLoop) { - /* Skip scan codes until the pause key sequence has been read */ - pauseLoop--; - } + /* Skip scan codes until the pause key sequence has been read */ + pauseLoop--; + } else if (scan == 0xE0) { - /* This signals the start of an extended scan code sequence */ - extended = 1; - } + /* This signals the start of an extended scan code sequence */ + extended = 1; + } else if (scan == 0xE1) { - /* The Pause key sends a strange scan code sequence, which is: - * - * E1 1D 52 E1 9D D2 - * - * However there is never any release code nor any auto-repeat for - * this key. For this reason we simply ignore the key and skip the - * next 5 scan codes read from the keyboard. - */ - pauseLoop = 5; - } + /* The Pause key sends a strange scan code sequence, which is: + * + * E1 1D 52 E1 9D D2 + * + * However there is never any release code nor any auto-repeat for + * this key. For this reason we simply ignore the key and skip the + * next 5 scan codes read from the keyboard. + */ + pauseLoop = 5; + } else { - /* Process the scan code normally (it may be an extended code - * however!). Bit 7 means key was released, and bits 0-6 are the - * scan code. - */ - what = (scan & 0x80) ? EVT_KEYUP : EVT_KEYDOWN; - scan &= 0x7F; - if (extended) { - extended = 0; - if (scan == 0x2A || scan == 0x36) { - /* Ignore these extended scan code sequences. These are - * used by the keyboard controller to wrap around certain - * key sequences for the keypad (and when NUMLOCK is down - * internally). - */ - return; - } + /* Process the scan code normally (it may be an extended code + * however!). Bit 7 means key was released, and bits 0-6 are the + * scan code. + */ + what = (scan & 0x80) ? EVT_KEYUP : EVT_KEYDOWN; + scan &= 0x7F; + if (extended) { + extended = 0; + if (scan == 0x2A || scan == 0x36) { + /* Ignore these extended scan code sequences. These are + * used by the keyboard controller to wrap around certain + * key sequences for the keypad (and when NUMLOCK is down + * internally). + */ + return; + } - /* Convert extended codes for key sequences that we map to - * virtual scan codes so the user can detect them in their - * code. - */ - switch (scan) { - case KB_leftCtrl: scan = KB_rightCtrl; break; - case KB_leftAlt: scan = KB_rightAlt; break; - case KB_divide: scan = KB_padDivide; break; - case KB_enter: scan = KB_padEnter; break; - case KB_padTimes: scan = KB_sysReq; break; - } - } - else { - /* Convert regular scan codes for key sequences that we map to - * virtual scan codes so the user can detect them in their - * code. - */ - switch (scan) { - case KB_left: scan = KB_padLeft; break; - case KB_right: scan = KB_padRight; break; - case KB_up: scan = KB_padUp; break; - case KB_down: scan = KB_padDown; break; - case KB_insert: scan = KB_padInsert; break; - case KB_delete: scan = KB_padDelete; break; - case KB_home: scan = KB_padHome; break; - case KB_end: scan = KB_padEnd; break; - case KB_pageUp: scan = KB_padPageUp; break; - case KB_pageDown: scan = KB_padPageDown; break; - } - } + /* Convert extended codes for key sequences that we map to + * virtual scan codes so the user can detect them in their + * code. + */ + switch (scan) { + case KB_leftCtrl: scan = KB_rightCtrl; break; + case KB_leftAlt: scan = KB_rightAlt; break; + case KB_divide: scan = KB_padDivide; break; + case KB_enter: scan = KB_padEnter; break; + case KB_padTimes: scan = KB_sysReq; break; + } + } + else { + /* Convert regular scan codes for key sequences that we map to + * virtual scan codes so the user can detect them in their + * code. + */ + switch (scan) { + case KB_left: scan = KB_padLeft; break; + case KB_right: scan = KB_padRight; break; + case KB_up: scan = KB_padUp; break; + case KB_down: scan = KB_padDown; break; + case KB_insert: scan = KB_padInsert; break; + case KB_delete: scan = KB_padDelete; break; + case KB_home: scan = KB_padHome; break; + case KB_end: scan = KB_padEnd; break; + case KB_pageUp: scan = KB_padPageUp; break; + case KB_pageDown: scan = KB_padPageDown; break; + } + } - /* Determine if the key is an UP, DOWN or REPEAT and maintain the - * up/down status of all keys in our global key array. - */ - if (what == EVT_KEYDOWN) { - if (EVT.keyTable[scan]) - what = EVT_KEYREPEAT; - else - EVT.keyTable[scan] = scan; - } - else { - EVT.keyTable[scan] = 0; - } + /* Determine if the key is an UP, DOWN or REPEAT and maintain the + * up/down status of all keys in our global key array. + */ + if (what == EVT_KEYDOWN) { + if (EVT.keyTable[scan]) + what = EVT_KEYREPEAT; + else + EVT.keyTable[scan] = scan; + } + else { + EVT.keyTable[scan] = 0; + } - /* Handle shift key modifiers */ - if (what != EVT_KEYREPEAT) { - switch (scan) { - case KB_capsLock: - if (what == EVT_KEYDOWN) - EVT.keyModifiers ^= EVT_CAPSLOCK; - setLEDS(EVT.keyModifiers); - break; - case KB_numLock: - if (what == EVT_KEYDOWN) - EVT.keyModifiers ^= EVT_NUMLOCK; - setLEDS(EVT.keyModifiers); - break; - case KB_scrollLock: - if (what == EVT_KEYDOWN) - EVT.keyModifiers ^= EVT_SCROLLLOCK; - setLEDS(EVT.keyModifiers); - break; - case KB_leftShift: - if (what == EVT_KEYUP) - EVT.keyModifiers &= ~EVT_LEFTSHIFT; - else - EVT.keyModifiers |= EVT_LEFTSHIFT; - break; - case KB_rightShift: - if (what == EVT_KEYUP) - EVT.keyModifiers &= ~EVT_RIGHTSHIFT; - else - EVT.keyModifiers |= EVT_RIGHTSHIFT; - break; - case KB_leftCtrl: - if (what == EVT_KEYUP) - EVT.keyModifiers &= ~EVT_LEFTCTRL; - else - EVT.keyModifiers |= EVT_LEFTCTRL; - break; - case KB_rightCtrl: - if (what == EVT_KEYUP) - EVT.keyModifiers &= ~EVT_RIGHTCTRL; - else - EVT.keyModifiers |= EVT_RIGHTCTRL; - break; - case KB_leftAlt: - if (what == EVT_KEYUP) - EVT.keyModifiers &= ~EVT_LEFTALT; - else - EVT.keyModifiers |= EVT_LEFTALT; - break; - case KB_rightAlt: - if (what == EVT_KEYUP) - EVT.keyModifiers &= ~EVT_RIGHTALT; - else - EVT.keyModifiers |= EVT_RIGHTALT; - break; + /* Handle shift key modifiers */ + if (what != EVT_KEYREPEAT) { + switch (scan) { + case KB_capsLock: + if (what == EVT_KEYDOWN) + EVT.keyModifiers ^= EVT_CAPSLOCK; + setLEDS(EVT.keyModifiers); + break; + case KB_numLock: + if (what == EVT_KEYDOWN) + EVT.keyModifiers ^= EVT_NUMLOCK; + setLEDS(EVT.keyModifiers); + break; + case KB_scrollLock: + if (what == EVT_KEYDOWN) + EVT.keyModifiers ^= EVT_SCROLLLOCK; + setLEDS(EVT.keyModifiers); + break; + case KB_leftShift: + if (what == EVT_KEYUP) + EVT.keyModifiers &= ~EVT_LEFTSHIFT; + else + EVT.keyModifiers |= EVT_LEFTSHIFT; + break; + case KB_rightShift: + if (what == EVT_KEYUP) + EVT.keyModifiers &= ~EVT_RIGHTSHIFT; + else + EVT.keyModifiers |= EVT_RIGHTSHIFT; + break; + case KB_leftCtrl: + if (what == EVT_KEYUP) + EVT.keyModifiers &= ~EVT_LEFTCTRL; + else + EVT.keyModifiers |= EVT_LEFTCTRL; + break; + case KB_rightCtrl: + if (what == EVT_KEYUP) + EVT.keyModifiers &= ~EVT_RIGHTCTRL; + else + EVT.keyModifiers |= EVT_RIGHTCTRL; + break; + case KB_leftAlt: + if (what == EVT_KEYUP) + EVT.keyModifiers &= ~EVT_LEFTALT; + else + EVT.keyModifiers |= EVT_LEFTALT; + break; + case KB_rightAlt: + if (what == EVT_KEYUP) + EVT.keyModifiers &= ~EVT_RIGHTALT; + else + EVT.keyModifiers |= EVT_RIGHTALT; + break; #ifdef SUPPORT_CTRL_ALT_DEL - case KB_delete: - if ((EVT.keyModifiers & EVT_CTRLSTATE) && (EVT.keyModifiers & EVT_ALTSTATE)) - Reboot(); - break; + case KB_delete: + if ((EVT.keyModifiers & EVT_CTRLSTATE) && (EVT.keyModifiers & EVT_ALTSTATE)) + Reboot(); + break; #endif - } - } + } + } - /* Add the untranslated key code to the event queue. All - * translation to ASCII from the key codes occurs when the key - * is extracted from the queue, saving time in the low level - * interrupt handler. - */ - addKeyEvent(what,scan << 8); - } + /* Add the untranslated key code to the event queue. All + * translation to ASCII from the key codes occurs when the key + * is extracted from the queue, saving time in the low level + * interrupt handler. + */ + addKeyEvent(what,scan << 8); + } } /**************************************************************************** @@ -442,9 +442,8 @@ { EVT.allowLEDS = true; if (enable) - setLEDS(EVT.keyModifiers); + setLEDS(EVT.keyModifiers); else - setLEDS(0); + setLEDS(0); EVT.allowLEDS = enable; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c b/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c index d6ced6e..eed5f45 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c +++ b/board/MAI/bios_emulator/scitech/src/pm/common/mtrr.c @@ -106,26 +106,26 @@ ulong config,dummy; switch (cpuFamily) { - case CPU_AMD: - if (cpuType < CPU_AMDAthlon) { - /* AMD K6-2 stepping 8 and later support the MTRR registers. - * The earlier K6-2 steppings (300Mhz models) do not - * support MTRR's. - */ - if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8)) - return 0; - return 1; - } - /* Fall through for AMD Athlon which uses P6 style MTRR's */ - case CPU_Intel: - _MTRR_readMSR(INTEL_cap_MSR,&config,&dummy); - return (config & (1 << 10)); - case CPU_Cyrix: - /* Cyrix 6x86 and later support the MTRR registers */ - if (cpuType < CPU_Cyrix6x86) - return 0; - return 1; - } + case CPU_AMD: + if (cpuType < CPU_AMDAthlon) { + /* AMD K6-2 stepping 8 and later support the MTRR registers. + * The earlier K6-2 steppings (300Mhz models) do not + * support MTRR's. + */ + if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8)) + return 0; + return 1; + } + /* Fall through for AMD Athlon which uses P6 style MTRR's */ + case CPU_Intel: + _MTRR_readMSR(INTEL_cap_MSR,&config,&dummy); + return (config & (1 << 10)); + case CPU_Cyrix: + /* Cyrix 6x86 and later support the MTRR registers */ + if (cpuType < CPU_Cyrix6x86) + return 0; + return 1; + } return 0; } @@ -149,10 +149,10 @@ ulong lbase,lsize; for (i = 0; i < numMTRR; i++) { - getMTRR(i,&lbase,&lsize,<ype); - if (lsize < 1) - return i; - } + getMTRR(i,&lbase,&lsize,<ype); + if (lsize < 1) + return i; + } (void)base; (void)size; return -1; @@ -178,10 +178,10 @@ ulong lbase,lsize; for (i = 0; i < numMTRR; i++) { - getMTRR(i,&lbase,&lsize,<ype); - if (lsize < 1) - return i; - } + getMTRR(i,&lbase,&lsize,<ype); + if (lsize < 1) + return i; + } (void)base; (void)size; return -1; @@ -207,23 +207,23 @@ ulong lbase, lsize; if (size > 0x2000000UL) { - /* If we are to set up a region >32M then look at ARR7 immediately */ - getMTRR(7,&lbase,&lsize,<ype); - if (lsize < 1) - return 7; - } + /* If we are to set up a region >32M then look at ARR7 immediately */ + getMTRR(7,&lbase,&lsize,<ype); + if (lsize < 1) + return 7; + } else { - /* Check ARR0-6 registers */ - for (i = 0; i < 7; i++) { - getMTRR(i,&lbase,&lsize,<ype); - if (lsize < 1) - return i; - } - /* Try ARR7 but its size must be at least 256K */ - getMTRR(7,&lbase,&lsize,<ype); - if ((lsize < 1) && (size >= 0x40000)) - return i; - } + /* Check ARR0-6 registers */ + for (i = 0; i < 7; i++) { + getMTRR(i,&lbase,&lsize,<ype); + if (lsize < 1) + return i; + } + /* Try ARR7 but its size must be at least 256K */ + getMTRR(7,&lbase,&lsize,<ype); + if ((lsize < 1) && (size >= 0x40000)) + return i; + } (void)base; return -1; } @@ -240,20 +240,20 @@ { c->flags = _MTRR_disableInt(); if (cpuFamily != CPU_AMD || (cpuFamily == CPU_AMD && cpuType >= CPU_AMDAthlon)) { - switch (cpuFamily) { - case CPU_Intel: - case CPU_AMD: - /* Disable MTRRs, and set the default type to uncached */ - c->cr4Val = _MTRR_saveCR4(); - _MTRR_readMSR(INTEL_defType_MSR,&c->defTypeLo,&c->defTypeHi); - _MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo & 0xF300UL,c->defTypeHi); - break; - case CPU_Cyrix: - c->ccr3 = _MTRR_getCx86(CX86_CCR3); - _MTRR_setCx86(CX86_CCR3, (uchar)((c->ccr3 & 0x0F) | 0x10)); - break; - } - } + switch (cpuFamily) { + case CPU_Intel: + case CPU_AMD: + /* Disable MTRRs, and set the default type to uncached */ + c->cr4Val = _MTRR_saveCR4(); + _MTRR_readMSR(INTEL_defType_MSR,&c->defTypeLo,&c->defTypeHi); + _MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo & 0xF300UL,c->defTypeHi); + break; + case CPU_Cyrix: + c->ccr3 = _MTRR_getCx86(CX86_CCR3); + _MTRR_setCx86(CX86_CCR3, (uchar)((c->ccr3 & 0x0F) | 0x10)); + break; + } + } } /**************************************************************************** @@ -267,18 +267,18 @@ MTRRContext *c) { if (cpuFamily != CPU_AMD || (cpuFamily == CPU_AMD && cpuType >= CPU_AMDAthlon)) { - PM_flushTLB(); - switch (cpuFamily) { - case CPU_Intel: - case CPU_AMD: - _MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo,c->defTypeHi); - _MTRR_restoreCR4(c->cr4Val); - break; - case CPU_Cyrix: - _MTRR_setCx86(CX86_CCR3,(uchar)c->ccr3); - break; - } - } + PM_flushTLB(); + switch (cpuFamily) { + case CPU_Intel: + case CPU_AMD: + _MTRR_writeMSR(INTEL_defType_MSR,c->defTypeLo,c->defTypeHi); + _MTRR_restoreCR4(c->cr4Val); + break; + case CPU_Cyrix: + _MTRR_setCx86(CX86_CCR3,(uchar)c->ccr3); + break; + } + } /* Re-enable interrupts (if enabled previously) */ _MTRR_restoreInt(c->flags); @@ -304,12 +304,12 @@ _MTRR_readMSR(INTEL_physMask_MSR(reg),&maskLo,&hi); if ((maskLo & 0x800) == 0) { - /* MTRR is disabled, so it is free */ - *base = 0; - *size = 0; - *type = 0; - return; - } + /* MTRR is disabled, so it is free */ + *base = 0; + *size = 0; + *type = 0; + return; + } _MTRR_readMSR(INTEL_physBase_MSR(reg),&baseLo,&hi); maskLo = (maskLo & 0xFFFFF000UL); *size = ~(maskLo - 1); @@ -338,15 +338,15 @@ MTRR_beginUpdate(&c); if (size == 0) { - /* The invalid bit is kept in the mask, so we simply clear the - * relevant mask register to disable a range. - */ - _MTRR_writeMSR(INTEL_physMask_MSR(reg),0,0); - } + /* The invalid bit is kept in the mask, so we simply clear the + * relevant mask register to disable a range. + */ + _MTRR_writeMSR(INTEL_physMask_MSR(reg),0,0); + } else { - _MTRR_writeMSR(INTEL_physBase_MSR(reg),base | type,0); - _MTRR_writeMSR(INTEL_physMask_MSR(reg),~(size - 1) | 0x800,0); - } + _MTRR_writeMSR(INTEL_physBase_MSR(reg),base | type,0); + _MTRR_writeMSR(INTEL_physMask_MSR(reg),~(size - 1) | 0x800,0); + } MTRR_endUpdate(&c); } @@ -386,19 +386,19 @@ /* Upper dword is region 1, lower is region 0 */ _MTRR_readMSR(0xC0000085, &low, &high); if (reg == 1) - low = high; + low = high; /* Find the base and type for the region */ *base = low & 0xFFFE0000; *type = 0; if (low & 1) - *type = PM_MTRR_UNCACHABLE; + *type = PM_MTRR_UNCACHABLE; if (low & 2) - *type = PM_MTRR_WRCOMB; + *type = PM_MTRR_WRCOMB; if ((low & 3) == 0) { - *size = 0; - return; - } + *size = 0; + return; + } /* This needs a little explaining. The size is stored as an * inverted mask of bits of 128K granularity 15 bits long offset @@ -441,26 +441,26 @@ MTRR_beginUpdate(&c); _MTRR_readMSR(0xC0000085, &low, &high); if (size == 0) { - /* Clear register to disable */ - if (reg) - high = 0; - else - low = 0; - } + /* Clear register to disable */ + if (reg) + high = 0; + else + low = 0; + } else { - /* Set the register to the base (already shifted for us), the - * type (off by one) and an inverted bitmask of the size - * The size is the only odd bit. We are fed say 512K - * We invert this and we get 111 1111 1111 1011 but - * if you subtract one and invert you get the desired - * 111 1111 1111 1100 mask - */ - newVal = (((~(size-1)) >> 15) & 0x0001FFFC) | base | (type+1); - if (reg) - high = newVal; - else - low = newVal; - } + /* Set the register to the base (already shifted for us), the + * type (off by one) and an inverted bitmask of the size + * The size is the only odd bit. We are fed say 512K + * We invert this and we get 111 1111 1111 1011 but + * if you subtract one and invert you get the desired + * 111 1111 1111 1100 mask + */ + newVal = (((~(size-1)) >> 15) & 0x0001FFFC) | base | (type+1); + if (reg) + high = newVal; + else + low = newVal; + } /* The writeback rule is quite specific. See the manual. Its * disable local interrupts, write back the cache, set the MTRR @@ -507,29 +507,29 @@ * Note: shift==0xF means 4G, this is unsupported. */ if (shift) - *size = (reg < 7 ? 0x800UL : 0x20000UL) << shift; + *size = (reg < 7 ? 0x800UL : 0x20000UL) << shift; else - *size = 0; + *size = 0; /* Bit 0 is Cache Enable on ARR7, Cache Disable on ARR0-ARR6 */ if (reg < 7) { - switch (rcr) { - case 1: *type = PM_MTRR_UNCACHABLE; break; - case 8: *type = PM_MTRR_WRBACK; break; - case 9: *type = PM_MTRR_WRCOMB; break; - case 24: - default: *type = PM_MTRR_WRTHROUGH; break; - } - } + switch (rcr) { + case 1: *type = PM_MTRR_UNCACHABLE; break; + case 8: *type = PM_MTRR_WRBACK; break; + case 9: *type = PM_MTRR_WRCOMB; break; + case 24: + default: *type = PM_MTRR_WRTHROUGH; break; + } + } else { - switch (rcr) { - case 0: *type = PM_MTRR_UNCACHABLE; break; - case 8: *type = PM_MTRR_WRCOMB; break; - case 9: *type = PM_MTRR_WRBACK; break; - case 25: - default: *type = PM_MTRR_WRTHROUGH; break; - } - } + switch (rcr) { + case 0: *type = PM_MTRR_UNCACHABLE; break; + case 8: *type = PM_MTRR_WRCOMB; break; + case 9: *type = PM_MTRR_WRBACK; break; + case 25: + default: *type = PM_MTRR_WRTHROUGH; break; + } + } } /**************************************************************************** @@ -557,23 +557,23 @@ size >>= (reg < 7 ? 12 : 18); size &= 0x7FFF; /* Make sure arr_size <= 14 */ for (arr_size = 0; size; arr_size++, size >>= 1) - ; + ; if (reg < 7) { - switch (type) { - case PM_MTRR_UNCACHABLE: arr_type = 1; break; - case PM_MTRR_WRCOMB: arr_type = 9; break; - case PM_MTRR_WRTHROUGH: arr_type = 24; break; - default: arr_type = 8; break; - } - } + switch (type) { + case PM_MTRR_UNCACHABLE: arr_type = 1; break; + case PM_MTRR_WRCOMB: arr_type = 9; break; + case PM_MTRR_WRTHROUGH: arr_type = 24; break; + default: arr_type = 8; break; + } + } else { - switch (type) { - case PM_MTRR_UNCACHABLE: arr_type = 0; break; - case PM_MTRR_WRCOMB: arr_type = 8; break; - case PM_MTRR_WRTHROUGH: arr_type = 25; break; - default: arr_type = 9; break; - } - } + switch (type) { + case PM_MTRR_UNCACHABLE: arr_type = 0; break; + case PM_MTRR_WRCOMB: arr_type = 8; break; + case PM_MTRR_WRTHROUGH: arr_type = 25; break; + default: arr_type = 9; break; + } + } MTRR_beginUpdate(&c); _MTRR_setCx86((uchar)arr, ((uchar*)&base)[3]); _MTRR_setCx86((uchar)(arr+1), ((uchar*)&base)[2]); @@ -615,28 +615,28 @@ ccr[5] = _MTRR_getCx86(CX86_CCR5); ccr[6] = _MTRR_getCx86(CX86_CCR6); if (ccr[3] & 1) - ccrc[3] = 1; + ccrc[3] = 1; else { - /* Disable SMM mode (bit 1), access to SMM memory (bit 2) and - * access to SMM memory through ARR3 (bit 7). - */ - if (ccr[6] & 0x02) { - ccr[6] &= 0xFD; - ccrc[6] = 1; /* Disable write protection of ARR3. */ - _MTRR_setCx86(CX86_CCR6,ccr[6]); - } - } + /* Disable SMM mode (bit 1), access to SMM memory (bit 2) and + * access to SMM memory through ARR3 (bit 7). + */ + if (ccr[6] & 0x02) { + ccr[6] &= 0xFD; + ccrc[6] = 1; /* Disable write protection of ARR3. */ + _MTRR_setCx86(CX86_CCR6,ccr[6]); + } + } /* If we changed CCR1 in memory, change it in the processor, too. */ if (ccrc[1]) - _MTRR_setCx86(CX86_CCR1,ccr[1]); + _MTRR_setCx86(CX86_CCR1,ccr[1]); /* Enable ARR usage by the processor */ if (!(ccr[5] & 0x20)) { - ccr[5] |= 0x20; - ccrc[5] = 1; - _MTRR_setCx86(CX86_CCR5,ccr[5]); - } + ccr[5] |= 0x20; + ccrc[5] = 1; + _MTRR_setCx86(CX86_CCR5,ccr[5]); + } /* We are finished updating */ MTRR_endUpdate(&c); @@ -654,72 +654,72 @@ /* Check that we have a compatible CPU */ if (numMTRR == -1) { - numMTRR = 0; - if (!_MTRR_isRing0()) - return; - cpu = CPU_getProcessorType(); - cpuFamily = cpu & CPU_familyMask; - cpuType = cpu & CPU_mask; - cpuStepping = (cpu & CPU_steppingMask) >> CPU_steppingShift; - switch (cpuFamily) { - case CPU_Intel: - /* Intel Pentium Pro and later support the MTRR registers */ - if (cpuType < CPU_PentiumPro) - return; - _MTRR_readMSR(INTEL_cap_MSR,&eax,&edx); - numMTRR = eax & 0xFF; - getMTRR = INTEL_getMTRR; - setMTRR = INTEL_setMTRR; - getFreeRegion = GENERIC_getFreeRegion; - INTEL_disableBankedWriteCombine(); - break; - case CPU_AMD: - /* AMD K6-2 and later support the MTRR registers */ - if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8)) - return; - if (cpuType < CPU_AMDAthlon) { - numMTRR = 2; /* AMD CPU's have 2 MTRR's */ - getMTRR = AMD_getMTRR; - setMTRR = AMD_setMTRR; - getFreeRegion = AMDK6_getFreeRegion; + numMTRR = 0; + if (!_MTRR_isRing0()) + return; + cpu = CPU_getProcessorType(); + cpuFamily = cpu & CPU_familyMask; + cpuType = cpu & CPU_mask; + cpuStepping = (cpu & CPU_steppingMask) >> CPU_steppingShift; + switch (cpuFamily) { + case CPU_Intel: + /* Intel Pentium Pro and later support the MTRR registers */ + if (cpuType < CPU_PentiumPro) + return; + _MTRR_readMSR(INTEL_cap_MSR,&eax,&edx); + numMTRR = eax & 0xFF; + getMTRR = INTEL_getMTRR; + setMTRR = INTEL_setMTRR; + getFreeRegion = GENERIC_getFreeRegion; + INTEL_disableBankedWriteCombine(); + break; + case CPU_AMD: + /* AMD K6-2 and later support the MTRR registers */ + if ((cpuType < CPU_AMDK6_2) || (cpuType == CPU_AMDK6_2 && cpuStepping < 8)) + return; + if (cpuType < CPU_AMDAthlon) { + numMTRR = 2; /* AMD CPU's have 2 MTRR's */ + getMTRR = AMD_getMTRR; + setMTRR = AMD_setMTRR; + getFreeRegion = AMDK6_getFreeRegion; - /* For some reason some IBM systems with K6-2 processors - * have write combined enabled for the system BIOS - * region from 0xE0000 to 0xFFFFFF. We need *both* MTRR's - * for our own graphics drivers, so if we detect any - * regions below the 1Meg boundary, we remove them - * so we can use this MTRR register ourselves. - */ - for (i = 0; i < numMTRR; i++) { - getMTRR(i,&lbase,&lsize,<ype); - if (lbase < 0x100000) - setMTRR(i,0,0,0); - } - } - else { - /* AMD Athlon uses P6 style MTRR's */ - _MTRR_readMSR(INTEL_cap_MSR,&eax,&edx); - numMTRR = eax & 0xFF; - getMTRR = INTEL_getMTRR; - setMTRR = INTEL_setMTRR; - getFreeRegion = GENERIC_getFreeRegion; - INTEL_disableBankedWriteCombine(); - } - break; - case CPU_Cyrix: - /* Cyrix 6x86 and later support the MTRR registers */ - if (cpuType < CPU_Cyrix6x86 || cpuType >= CPU_CyrixMediaGX) - return; - numMTRR = 8; /* Cyrix CPU's have 8 ARR's */ - getMTRR = CYRIX_getMTRR; - setMTRR = CYRIX_setMTRR; - getFreeRegion = CYRIX_getFreeRegion; - CYRIX_initARR(); - break; - default: - return; - } - } + /* For some reason some IBM systems with K6-2 processors + * have write combined enabled for the system BIOS + * region from 0xE0000 to 0xFFFFFF. We need *both* MTRR's + * for our own graphics drivers, so if we detect any + * regions below the 1Meg boundary, we remove them + * so we can use this MTRR register ourselves. + */ + for (i = 0; i < numMTRR; i++) { + getMTRR(i,&lbase,&lsize,<ype); + if (lbase < 0x100000) + setMTRR(i,0,0,0); + } + } + else { + /* AMD Athlon uses P6 style MTRR's */ + _MTRR_readMSR(INTEL_cap_MSR,&eax,&edx); + numMTRR = eax & 0xFF; + getMTRR = INTEL_getMTRR; + setMTRR = INTEL_setMTRR; + getFreeRegion = GENERIC_getFreeRegion; + INTEL_disableBankedWriteCombine(); + } + break; + case CPU_Cyrix: + /* Cyrix 6x86 and later support the MTRR registers */ + if (cpuType < CPU_Cyrix6x86 || cpuType >= CPU_CyrixMediaGX) + return; + numMTRR = 8; /* Cyrix CPU's have 8 ARR's */ + getMTRR = CYRIX_getMTRR; + setMTRR = CYRIX_setMTRR; + getFreeRegion = CYRIX_getFreeRegion; + CYRIX_initARR(); + break; + default: + return; + } + } } /**************************************************************************** @@ -745,93 +745,93 @@ /* Check that we have a CPU that supports MTRR's and type is valid */ if (numMTRR <= 0) { - if (!_MTRR_isRing0()) - return PM_MTRR_ERR_NO_OS_SUPPORT; - return PM_MTRR_NOT_SUPPORTED; - } + if (!_MTRR_isRing0()) + return PM_MTRR_ERR_NO_OS_SUPPORT; + return PM_MTRR_NOT_SUPPORTED; + } if (type >= PM_MTRR_MAX) - return PM_MTRR_ERR_PARAMS; + return PM_MTRR_ERR_PARAMS; /* If the type is WC, check that this processor supports it */ if (!MTRR_haveWriteCombine()) - return PM_MTRR_ERR_NOWRCOMB; + return PM_MTRR_ERR_NOWRCOMB; /* Adjust the boundaries depending on the CPU type */ switch (cpuFamily) { - case CPU_AMD: - if (cpuType < CPU_AMDAthlon) { - /* Apply the K6 block alignment and size rules. In order: - * o Uncached or gathering only - * o 128K or bigger block - * o Power of 2 block - * o base suitably aligned to the power - */ - if (type > PM_MTRR_WRCOMB && (size < (1 << 17) || (size & ~(size-1))-size || (base & (size-1)))) - return PM_MTRR_ERR_NOT_ALIGNED; - break; - } - /* Fall through for AMD Athlon which uses P6 style MTRR's */ - case CPU_Intel: - case CPU_Cyrix: - if ((base & 0xFFF) || (size & 0xFFF)) { - /* Base and size must be multiples of 4Kb */ - return PM_MTRR_ERR_NOT_4KB_ALIGNED; - } - if (base < 0x100000) { - /* Base must be >= 1Mb */ - return PM_MTRR_ERR_BELOW_1MB; - } + case CPU_AMD: + if (cpuType < CPU_AMDAthlon) { + /* Apply the K6 block alignment and size rules. In order: + * o Uncached or gathering only + * o 128K or bigger block + * o Power of 2 block + * o base suitably aligned to the power + */ + if (type > PM_MTRR_WRCOMB && (size < (1 << 17) || (size & ~(size-1))-size || (base & (size-1)))) + return PM_MTRR_ERR_NOT_ALIGNED; + break; + } + /* Fall through for AMD Athlon which uses P6 style MTRR's */ + case CPU_Intel: + case CPU_Cyrix: + if ((base & 0xFFF) || (size & 0xFFF)) { + /* Base and size must be multiples of 4Kb */ + return PM_MTRR_ERR_NOT_4KB_ALIGNED; + } + if (base < 0x100000) { + /* Base must be >= 1Mb */ + return PM_MTRR_ERR_BELOW_1MB; + } - /* Check upper bits of base and last are equal and lower bits - * are 0 for base and 1 for last - */ - last = base + size - 1; - for (lbase = base; !(lbase & 1) && (last & 1); lbase = lbase >> 1, last = last >> 1) - ; - if (lbase != last) { - /* Base is not aligned on the correct boundary */ - return PM_MTRR_ERR_NOT_ALIGNED; - } - break; - default: - return PM_MTRR_NOT_SUPPORTED; - } + /* Check upper bits of base and last are equal and lower bits + * are 0 for base and 1 for last + */ + last = base + size - 1; + for (lbase = base; !(lbase & 1) && (last & 1); lbase = lbase >> 1, last = last >> 1) + ; + if (lbase != last) { + /* Base is not aligned on the correct boundary */ + return PM_MTRR_ERR_NOT_ALIGNED; + } + break; + default: + return PM_MTRR_NOT_SUPPORTED; + } /* Search for existing MTRR */ for (i = 0; i < numMTRR; ++i) { - getMTRR(i,&lbase,&lsize,<ype); - if (lbase == 0 && lsize == 0) - continue; - if (base > lbase + (lsize-1)) - continue; - if ((base < lbase) && (base+size-1 < lbase)) - continue; + getMTRR(i,&lbase,&lsize,<ype); + if (lbase == 0 && lsize == 0) + continue; + if (base > lbase + (lsize-1)) + continue; + if ((base < lbase) && (base+size-1 < lbase)) + continue; - /* Check that we don't overlap an existing region */ - if (type != PM_MTRR_UNCACHABLE) { - if ((base < lbase) || (base+size-1 > lbase+lsize-1)) - return PM_MTRR_ERR_OVERLAP; - } - else if (base == lbase && size == lsize) { - /* The region already exists so leave it alone */ - return PM_MTRR_ERR_OK; - } + /* Check that we don't overlap an existing region */ + if (type != PM_MTRR_UNCACHABLE) { + if ((base < lbase) || (base+size-1 > lbase+lsize-1)) + return PM_MTRR_ERR_OVERLAP; + } + else if (base == lbase && size == lsize) { + /* The region already exists so leave it alone */ + return PM_MTRR_ERR_OK; + } - /* New region is enclosed by an existing region, so only allow - * a new type to be created if we are setting a region to be - * uncacheable (such as MMIO registers within a framebuffer). - */ - if (ltype != (int)type) { - if (type == PM_MTRR_UNCACHABLE) - continue; - return PM_MTRR_ERR_TYPE_MISMATCH; - } - return PM_MTRR_ERR_OK; - } + /* New region is enclosed by an existing region, so only allow + * a new type to be created if we are setting a region to be + * uncacheable (such as MMIO registers within a framebuffer). + */ + if (ltype != (int)type) { + if (type == PM_MTRR_UNCACHABLE) + continue; + return PM_MTRR_ERR_TYPE_MISMATCH; + } + return PM_MTRR_ERR_OK; + } /* Search for an empty MTRR */ if ((i = getFreeRegion(base,size)) < 0) - return PM_MTRR_ERR_NONE_FREE; + return PM_MTRR_ERR_NONE_FREE; setMTRR(i,base,size,type); return PM_MTRR_ERR_OK; } @@ -852,16 +852,16 @@ /* Check that we have a CPU that supports MTRR's and type is valid */ if (numMTRR <= 0) { - if (!_MTRR_isRing0()) - return PM_MTRR_ERR_NO_OS_SUPPORT; - return PM_MTRR_NOT_SUPPORTED; - } + if (!_MTRR_isRing0()) + return PM_MTRR_ERR_NO_OS_SUPPORT; + return PM_MTRR_NOT_SUPPORTED; + } /* Enumerate all existing MTRR's */ for (i = 0; i < numMTRR; ++i) { - getMTRR(i,&lbase,&lsize,<ype); - callback(lbase,lsize,ltype); - } + getMTRR(i,&lbase,&lsize,<ype); + callback(lbase,lsize,ltype); + } return PM_MTRR_ERR_OK; } #endif diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c b/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c index 8dd6dd1..1d542fc 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c +++ b/board/MAI/bios_emulator/scitech/src/pm/common/pcilib.c @@ -67,13 +67,13 @@ typedef union { struct { - ulong signature; /* _32_ */ - ulong entry; /* 32 bit physical address */ - uchar revision; /* Revision level, 0 */ - uchar length; /* Length in paragraphs should be 01 */ - uchar checksum; /* All bytes must add up to zero */ - uchar reserved[5]; /* Must be zero */ - } fields; + ulong signature; /* _32_ */ + ulong entry; /* 32 bit physical address */ + uchar revision; /* Revision level, 0 */ + uchar length; /* Length in paragraphs should be 01 */ + uchar checksum; /* All bytes must add up to zero */ + uchar reserved[5]; /* Must be zero */ + } fields; char chars[16]; } PCI_bios32; @@ -143,54 +143,54 @@ /* Bail if we have already detected no BIOS is present */ if (PCIBIOSVersion == 0) - return 0; + return 0; /* First scan the memory from 0xE0000 to 0xFFFFF looking for the * BIOS32 service directory, so we can determine if we can call it * from 32-bit protected mode. */ if (PCIBIOSVersion == -1) { - PCIBIOSVersion = 0; - BIOSImage = PM_mapPhysicalAddr(0xE0000,BIOS_LIMIT,false); - if (!BIOSImage) - return 0; - BIOSEnd = BIOSImage + 0x20000; - for (BIOSDir = (PCI_bios32*)BIOSImage; BIOSDir < (PCI_bios32*)BIOSEnd; BIOSDir++) { - uchar sum; - int i,length; + PCIBIOSVersion = 0; + BIOSImage = PM_mapPhysicalAddr(0xE0000,BIOS_LIMIT,false); + if (!BIOSImage) + return 0; + BIOSEnd = BIOSImage + 0x20000; + for (BIOSDir = (PCI_bios32*)BIOSImage; BIOSDir < (PCI_bios32*)BIOSEnd; BIOSDir++) { + uchar sum; + int i,length; - if (BIOSDir->fields.signature != BIOS32_SIGNATURE) - continue; - length = BIOSDir->fields.length * 16; - if (!length) - continue; - for (sum = i = 0; i < length ; i++) - sum += BIOSDir->chars[i]; - if (sum != 0) - continue; - BIOSEntry.address = (ulong)BIOSImage + (BIOSDir->fields.entry - 0xE0000); - BIOSEntry.segment = _PCI_getCS(); - break; - } + if (BIOSDir->fields.signature != BIOS32_SIGNATURE) + continue; + length = BIOSDir->fields.length * 16; + if (!length) + continue; + for (sum = i = 0; i < length ; i++) + sum += BIOSDir->chars[i]; + if (sum != 0) + continue; + BIOSEntry.address = (ulong)BIOSImage + (BIOSDir->fields.entry - 0xE0000); + BIOSEntry.segment = _PCI_getCS(); + break; + } - /* If we found the BIOS32 directory, call it to get the address of the - * PCI services. - */ - if (BIOSEntry.address == 0) - return 0; - if (_BIOS32_service(PCI_SERVICE,0,&physBase,&length,&offset,BIOSEntry) != 0) - return 0; - PCIPhysEntry = physBase + offset; - PCIEntry.address = (ulong)BIOSImage + (PCIPhysEntry - 0xE0000); - PCIEntry.segment = _PCI_getCS(); - } + /* If we found the BIOS32 directory, call it to get the address of the + * PCI services. + */ + if (BIOSEntry.address == 0) + return 0; + if (_BIOS32_service(PCI_SERVICE,0,&physBase,&length,&offset,BIOSEntry) != 0) + return 0; + PCIPhysEntry = physBase + offset; + PCIEntry.address = (ulong)BIOSImage + (PCIPhysEntry - 0xE0000); + PCIEntry.segment = _PCI_getCS(); + } #endif /* We found the BIOS entry, so now do the version check */ version = _PCIBIOS_isPresent(PCI_BIOS_PRESENT,&signature,&stat,lastBus,PCIEntry); if (version > 0 && ((stat >> 8) == 0) && signature == PCI_SIGNATURE) { - *hwType = stat & 0xFF; - return PCIBIOSVersion = version; - } + *hwType = stat & 0xFF; + return PCIBIOSVersion = version; + } return 0; } @@ -215,16 +215,16 @@ { /* Ignore devices with a vendor ID of 0 */ if (info->VendorID == 0) - return true; + return true; /* NOTE: We only check against the current device on * the bus to ensure that we do not exclude * multiple controllers of the same device ID. */ if (info->slot.p.Bus == prev->slot.p.Bus && - info->slot.p.Device == prev->slot.p.Device && - info->DeviceID == prev->DeviceID) - return true; + info->slot.p.Device == prev->slot.p.Device && + info->DeviceID == prev->DeviceID) + return true; return false; } @@ -253,41 +253,41 @@ tmp = PM_inpd(0xCF8); PM_outpd(0xCF8,slot.i); if ((PM_inpd(0xCF8) == slot.i) && (PM_inpd(0xCFC) != 0xFFFFFFFFUL)) { - /* PCI access mechanism 1 - the preferred mechanism */ - for (bus = 0; bus < 8; bus++) { - slot.p.Bus = bus; - for (device = 0; device < 32; device++) { - slot.p.Device = device; - for (function = 0; function < 8; function++) { - slot.p.Function = function; - slot.p.Register = 0; - PM_outpd(0xCF8,slot.i); - if (PM_inpd(0xCFC) != 0xFFFFFFFFUL) { - memset(&pci,0,sizeof(pci)); - pci.dwSize = sizeof(pci); - pci.mech1 = 1; - pci.slot = slot; - lp = (ulong*)&(pci.VendorID); - for (i = 0; i < NUM_PCI_REG; i++, lp++) { - slot.p.Register = i; - PM_outpd(0xCF8,slot.i); - *lp = PM_inpd(0xCFC); - } - if (!CheckDuplicate(&pci,&prev)) { - if (info) - COPY_STRUCTURE(&info[numFound],&pci); - ++numFound; - } - prev = pci; - } - } - } - } + /* PCI access mechanism 1 - the preferred mechanism */ + for (bus = 0; bus < 8; bus++) { + slot.p.Bus = bus; + for (device = 0; device < 32; device++) { + slot.p.Device = device; + for (function = 0; function < 8; function++) { + slot.p.Function = function; + slot.p.Register = 0; + PM_outpd(0xCF8,slot.i); + if (PM_inpd(0xCFC) != 0xFFFFFFFFUL) { + memset(&pci,0,sizeof(pci)); + pci.dwSize = sizeof(pci); + pci.mech1 = 1; + pci.slot = slot; + lp = (ulong*)&(pci.VendorID); + for (i = 0; i < NUM_PCI_REG; i++, lp++) { + slot.p.Register = i; + PM_outpd(0xCF8,slot.i); + *lp = PM_inpd(0xCFC); + } + if (!CheckDuplicate(&pci,&prev)) { + if (info) + COPY_STRUCTURE(&info[numFound],&pci); + ++numFound; + } + prev = pci; + } + } + } + } - /* Disable PCI config cycle on exit */ - PM_outpd(0xCF8,0); - return numFound; - } + /* Disable PCI config cycle on exit */ + PM_outpd(0xCF8,0); + return numFound; + } PM_outpd(0xCF8,tmp); /* No hardware access mechanism 1 found */ @@ -320,42 +320,42 @@ PM_outpb(0xCF8,0x00); PM_outpb(0xCFA,0x00); if (PM_inpb(0xCF8) == 0x00 && PM_inpb(0xCFB) == 0x00) { - /* PCI access mechanism 2 - the older mechanism for legacy busses */ - for (bus = 0; bus < 2; bus++) { - slot.p.Bus = bus; - PM_outpb(0xCFA,(uchar)bus); - for (device = 0; device < 16; device++) { - slot.p.Device = device; - deviceIO = 0xC000 + (device << 8); - for (function = 0; function < 8; function++) { - slot.p.Function = function; - slot.p.Register = 0; - PM_outpb(0xCF8,(uchar)((function << 1) | 0x10)); - if (PM_inpd(deviceIO) != 0xFFFFFFFFUL) { - memset(&pci,0,sizeof(pci)); - pci.dwSize = sizeof(pci); - pci.mech1 = 0; - pci.slot = slot; - lp = (ulong*)&(pci.VendorID); - for (i = 0; i < NUM_PCI_REG; i++, lp++) { - slot.p.Register = i; - *lp = PM_inpd(deviceIO + (i << 2)); - } - if (!CheckDuplicate(&pci,&prev)) { - if (info) - COPY_STRUCTURE(&info[numFound],&pci); - ++numFound; - } - prev = pci; - } - } - } - } + /* PCI access mechanism 2 - the older mechanism for legacy busses */ + for (bus = 0; bus < 2; bus++) { + slot.p.Bus = bus; + PM_outpb(0xCFA,(uchar)bus); + for (device = 0; device < 16; device++) { + slot.p.Device = device; + deviceIO = 0xC000 + (device << 8); + for (function = 0; function < 8; function++) { + slot.p.Function = function; + slot.p.Register = 0; + PM_outpb(0xCF8,(uchar)((function << 1) | 0x10)); + if (PM_inpd(deviceIO) != 0xFFFFFFFFUL) { + memset(&pci,0,sizeof(pci)); + pci.dwSize = sizeof(pci); + pci.mech1 = 0; + pci.slot = slot; + lp = (ulong*)&(pci.VendorID); + for (i = 0; i < NUM_PCI_REG; i++, lp++) { + slot.p.Register = i; + *lp = PM_inpd(deviceIO + (i << 2)); + } + if (!CheckDuplicate(&pci,&prev)) { + if (info) + COPY_STRUCTURE(&info[numFound],&pci); + ++numFound; + } + prev = pci; + } + } + } + } - /* Disable PCI config cycle on exit */ - PM_outpb(0xCF8,0); - return numFound; - } + /* Disable PCI config cycle on exit */ + PM_outpb(0xCF8,0); + return numFound; + } /* No hardware access mechanism 2 found */ return 0; @@ -394,32 +394,32 @@ PCIDeviceInfo pci,prev = {0}; if (PCIBIOS_detect(&hwType,&lastBus)) { - /* PCI BIOS access - the ultimate fallback */ - for (bus = 0; bus <= lastBus; bus++) { - slot.p.Bus = bus; - for (device = 0; device < 32; device++) { - slot.p.Device = device; - for (function = 0; function < 8; function++) { - slot.p.Function = function; - if (PCIBIOS_readDWORD(0,slot.i) != 0xFFFFFFFFUL) { - memset(&pci,0,sizeof(pci)); - pci.dwSize = sizeof(pci); - pci.mech1 = 2; - pci.slot = slot; - lp = (ulong*)&(pci.VendorID); - for (i = 0; i < NUM_PCI_REG; i++, lp++) - *lp = PCIBIOS_readDWORD(i << 2,slot.i); - if (!CheckDuplicate(&pci,&prev)) { - if (info) - COPY_STRUCTURE(&info[numFound],&pci); - ++numFound; - } - prev = pci; - } - } - } - } - } + /* PCI BIOS access - the ultimate fallback */ + for (bus = 0; bus <= lastBus; bus++) { + slot.p.Bus = bus; + for (device = 0; device < 32; device++) { + slot.p.Device = device; + for (function = 0; function < 8; function++) { + slot.p.Function = function; + if (PCIBIOS_readDWORD(0,slot.i) != 0xFFFFFFFFUL) { + memset(&pci,0,sizeof(pci)); + pci.dwSize = sizeof(pci); + pci.mech1 = 2; + pci.slot = slot; + lp = (ulong*)&(pci.VendorID); + for (i = 0; i < NUM_PCI_REG; i++, lp++) + *lp = PCIBIOS_readDWORD(i << 2,slot.i); + if (!CheckDuplicate(&pci,&prev)) { + if (info) + COPY_STRUCTURE(&info[numFound],&pci); + ++numFound; + } + prev = pci; + } + } + } + } + } /* Return number of devices found */ return numFound; @@ -447,11 +447,11 @@ * stuff we can't do directly. */ if ((numFound = PCI_enumerateMech1(info)) == 0) { - if ((numFound = PCI_enumerateMech2(info)) == 0) { - if ((numFound = PCI_enumerateBIOS(info)) == 0) - return 0; - } - } + if ((numFound = PCI_enumerateMech2(info)) == 0) { + if ((numFound = PCI_enumerateBIOS(info)) == 0) + return 0; + } + } return numFound; } @@ -493,22 +493,22 @@ base = PCI_accessReg(bar,0,PCI_READ_DWORD,pci); if (base && !(base & 0x1)) { - /* For some strange reason some devices don't properly decode - * their base address registers (Intel PCI/PCI bridges!), and - * we read completely bogus values. We check for that here - * and clear out those BAR's. - * - * We check for that here because at least the low 12 bits - * of the address range must be zeros, since the page size - * on IA32 processors is always 4Kb. - */ - if ((base & 0xFFF) == 0) { - PCI_accessReg(bar,0xFFFFFFFF,PCI_WRITE_DWORD,pci); - size = PCI_accessReg(bar,0,PCI_READ_DWORD,pci) & ~0xFF; - size = ~size+1; - PCI_accessReg(bar,base,PCI_WRITE_DWORD,pci); - } - } + /* For some strange reason some devices don't properly decode + * their base address registers (Intel PCI/PCI bridges!), and + * we read completely bogus values. We check for that here + * and clear out those BAR's. + * + * We check for that here because at least the low 12 bits + * of the address range must be zeros, since the page size + * on IA32 processors is always 4Kb. + */ + if ((base & 0xFFF) == 0) { + PCI_accessReg(bar,0xFFFFFFFF,PCI_WRITE_DWORD,pci); + size = PCI_accessReg(bar,0,PCI_READ_DWORD,pci) & ~0xFF; + size = ~size+1; + PCI_accessReg(bar,base,PCI_WRITE_DWORD,pci); + } + } pci->slot.p.Register = 0; return size; } @@ -542,49 +542,49 @@ int iobase; if (info->mech1 == 2) { - /* Use PCI BIOS access since we dont have direct hardware access */ - switch (func) { - case PCI_READ_BYTE: - return (uchar)_PCIBIOS_service(READ_CONFIG_BYTE,info->slot.i >> 8,index,0,PCIEntry); - case PCI_READ_WORD: - return (ushort)_PCIBIOS_service(READ_CONFIG_WORD,info->slot.i >> 8,index,0,PCIEntry); - case PCI_READ_DWORD: - return (ulong)_PCIBIOS_service(READ_CONFIG_DWORD,info->slot.i >> 8,index,0,PCIEntry); - case PCI_WRITE_BYTE: - _PCIBIOS_service(WRITE_CONFIG_BYTE,info->slot.i >> 8,index,value,PCIEntry); - break; - case PCI_WRITE_WORD: - _PCIBIOS_service(WRITE_CONFIG_WORD,info->slot.i >> 8,index,value,PCIEntry); - break; - case PCI_WRITE_DWORD: - _PCIBIOS_service(WRITE_CONFIG_DWORD,info->slot.i >> 8,index,value,PCIEntry); - break; - } - } + /* Use PCI BIOS access since we dont have direct hardware access */ + switch (func) { + case PCI_READ_BYTE: + return (uchar)_PCIBIOS_service(READ_CONFIG_BYTE,info->slot.i >> 8,index,0,PCIEntry); + case PCI_READ_WORD: + return (ushort)_PCIBIOS_service(READ_CONFIG_WORD,info->slot.i >> 8,index,0,PCIEntry); + case PCI_READ_DWORD: + return (ulong)_PCIBIOS_service(READ_CONFIG_DWORD,info->slot.i >> 8,index,0,PCIEntry); + case PCI_WRITE_BYTE: + _PCIBIOS_service(WRITE_CONFIG_BYTE,info->slot.i >> 8,index,value,PCIEntry); + break; + case PCI_WRITE_WORD: + _PCIBIOS_service(WRITE_CONFIG_WORD,info->slot.i >> 8,index,value,PCIEntry); + break; + case PCI_WRITE_DWORD: + _PCIBIOS_service(WRITE_CONFIG_DWORD,info->slot.i >> 8,index,value,PCIEntry); + break; + } + } else { - /* Use direct hardware access mechanisms */ - if (info->mech1) { - /* PCI access mechanism 1 */ - iobase = 0xCFC + (index & 3); - info->slot.p.Register = index >> 2; - PM_outpd(0xCF8,info->slot.i); - } - else { - /* PCI access mechanism 2 */ - PM_outpb(0xCF8,(uchar)((info->slot.p.Function << 1) | 0x10)); - PM_outpb(0xCFA,(uchar)info->slot.p.Bus); - iobase = 0xC000 + (info->slot.p.Device << 8) + index; - } - switch (func) { - case PCI_READ_BYTE: - case PCI_READ_WORD: - case PCI_READ_DWORD: value = PM_inpd(iobase); break; - case PCI_WRITE_BYTE: PM_outpb(iobase,(uchar)value); break; - case PCI_WRITE_WORD: PM_outpw(iobase,(ushort)value); break; - case PCI_WRITE_DWORD: PM_outpd(iobase,(ulong)value); break; - } - PM_outpd(0xCF8,0); - } + /* Use direct hardware access mechanisms */ + if (info->mech1) { + /* PCI access mechanism 1 */ + iobase = 0xCFC + (index & 3); + info->slot.p.Register = index >> 2; + PM_outpd(0xCF8,info->slot.i); + } + else { + /* PCI access mechanism 2 */ + PM_outpb(0xCF8,(uchar)((info->slot.p.Function << 1) | 0x10)); + PM_outpb(0xCFA,(uchar)info->slot.p.Bus); + iobase = 0xC000 + (info->slot.p.Device << 8) + index; + } + switch (func) { + case PCI_READ_BYTE: + case PCI_READ_WORD: + case PCI_READ_DWORD: value = PM_inpd(iobase); break; + case PCI_WRITE_BYTE: PM_outpb(iobase,(uchar)value); break; + case PCI_WRITE_WORD: PM_outpw(iobase,(ushort)value); break; + case PCI_WRITE_DWORD: PM_outpd(iobase,(ulong)value); break; + } + PM_outpd(0xCF8,0); + } return value; } @@ -608,14 +608,14 @@ int ret; if (PCIPhysEntry) { - buf.BufferSize = numDevices * sizeof(PCIRouteInfo); - buf.DataBuffer = buffer; - if ((ret = _PCIBIOS_getRouting(&buf,PCIEntry)) == 0x89) - return buf.BufferSize / sizeof(PCIRouteInfo); - if (ret != 0) - return -1; - return 0; - } + buf.BufferSize = numDevices * sizeof(PCIRouteInfo); + buf.DataBuffer = buffer; + if ((ret = _PCIBIOS_getRouting(&buf,PCIEntry)) == 0x89) + return buf.BufferSize / sizeof(PCIRouteInfo); + if (ret != 0) + return -1; + return 0; + } /* We currently only support this via the PCI BIOS functions */ return -1; @@ -642,13 +642,13 @@ uint IRQ) { if (PCIPhysEntry) { - if (_PCIBIOS_setIRQ(info->slot.i >> 8,intPin,IRQ,PCIEntry)) { - info->u.type0.InterruptPin = intPin; - info->u.type0.InterruptLine = IRQ; - return true; - } - return false; - } + if (_PCIBIOS_setIRQ(info->slot.i >> 8,intPin,IRQ,PCIEntry)) { + info->u.type0.InterruptPin = intPin; + info->u.type0.InterruptLine = IRQ; + return true; + } + return false; + } /* We currently only support this via the PCI BIOS functions */ return false; @@ -668,7 +668,7 @@ ulong specialCycleData) { if (PCIPhysEntry) - _PCIBIOS_specialCycle(bus,specialCycleData,PCIEntry); + _PCIBIOS_specialCycle(bus,specialCycleData,PCIEntry); /* We currently only support this via the PCI BIOS functions */ } @@ -699,14 +699,14 @@ int endCount = count - middleCount * 4 - startCount; for (i = 0,pb = dst; i < startCount; i++, index++) { - *pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info); - } + *pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info); + } for (i = 0,pd = (ulong*)pb; i < middleCount; i++, index += 4) { - *pd++ = (ulong)PCI_accessReg(index,0,PCI_READ_DWORD,info); - } + *pd++ = (ulong)PCI_accessReg(index,0,PCI_READ_DWORD,info); + } for (i = 0,pb = (uchar*)pd; i < endCount; i++, index++) { - *pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info); - } + *pb++ = (uchar)PCI_accessReg(index,0,PCI_READ_BYTE,info); + } } /**************************************************************************** @@ -736,12 +736,12 @@ int endCount = count - middleCount * 4 - startCount; for (i = 0,pb = src; i < startCount; i++, index++) { - PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info); - } + PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info); + } for (i = 0,pd = (ulong*)pb; i < middleCount; i++, index += 4) { - PCI_accessReg(index,*pd++,PCI_WRITE_DWORD,info); - } + PCI_accessReg(index,*pd++,PCI_WRITE_DWORD,info); + } for (i = 0,pb = (uchar*)pd; i < endCount; i++, index++) { - PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info); - } + PCI_accessReg(index,*pb++,PCI_WRITE_BYTE,info); + } } diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c b/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c index 04aa470..c3a66a7 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c +++ b/board/MAI/bios_emulator/scitech/src/pm/common/unixio.c @@ -65,9 +65,9 @@ strcat(filename,blk->d_name); stat(filename,&st); if (!(st.st_mode & S_IWRITE)) - findData->attrib |= PM_FILE_READONLY; + findData->attrib |= PM_FILE_READONLY; if (st.st_mode & S_IFDIR) - findData->attrib |= PM_FILE_DIRECTORY; + findData->attrib |= PM_FILE_DIRECTORY; findData->sizeLo = st.st_size; findData->sizeHi = 0; strncpy(findData->name,blk->d_name,PM_MAX_PATH); @@ -91,24 +91,24 @@ PM_backslash(fullpath); strcat(fullpath, dire->d_name); if (stat(fullpath, &st) != 0) - return false; + return false; for (; i < (int)strlen(dire->d_name) && j < (int)strlen(pattern); i++, j++) { - if (pattern[j] == '*' && lastchar != '\\') { - if (pattern[j+1] == '\0') - return true; - while (dire->d_name[i++] != pattern[j+1]) { - if (dire->d_name[i] == '\0') - return false; - } - i -= 2; - } - else if (dire->d_name[i] != pattern[j] && - !(pattern[j] == '?' && lastchar != '\\')) - return false; - lastchar = pattern[i]; - } + if (pattern[j] == '*' && lastchar != '\\') { + if (pattern[j+1] == '\0') + return true; + while (dire->d_name[i++] != pattern[j+1]) { + if (dire->d_name[i] == '\0') + return false; + } + i -= 2; + } + else if (dire->d_name[i] != pattern[j] && + !(pattern[j] == '?' && lastchar != '\\')) + return false; + lastchar = pattern[i]; + } if (j == (int)strlen(pattern) && i == (int)strlen(dire->d_name)) - return true; + return true; return false; } @@ -126,23 +126,23 @@ char ext[PM_MAX_PATH]; if ((d = PM_malloc(sizeof(*d))) == NULL) - return PM_FILE_INVALID; + return PM_FILE_INVALID; PM_splitpath(filename,NULL,d->path,name,ext); strcpy(d->mask,name); strcat(d->mask,ext); if (strlen(d->path) == 0) - strcpy(d->path, "."); + strcpy(d->path, "."); if (d->path[strlen(d->path)-1] == '/') - d->path[strlen(d->path)-1] = 0; + d->path[strlen(d->path)-1] = 0; if ((d->d = opendir(d->path)) != NULL) { - while ((dire = readdir(d->d)) != NULL) { - if (filematch(d->mask,d->path,dire)) { - convertFindData(findData,dire,d->path); - return d; - } - } - closedir(d->d); - } + while ((dire = readdir(d->d)) != NULL) { + if (filematch(d->mask,d->path,dire)) { + convertFindData(findData,dire,d->path); + return d; + } + } + closedir(d->d); + } PM_free(d); return PM_FILE_INVALID; } @@ -159,11 +159,11 @@ struct dirent *dire; while ((dire = readdir(d->d)) != NULL) { - if (filematch(d->mask,d->path,dire)) { - convertFindData(findData,dire,d->path); - return true; - } - } + if (filematch(d->mask,d->path,dire)) { + convertFindData(findData,dire,d->path); + return true; + } + } return false; } @@ -197,7 +197,7 @@ char drive) { if (drive == 3) - return true; + return true; return false; } @@ -230,9 +230,9 @@ stat(filename,&st); mode = st.st_mode; if (attrib & PM_FILE_READONLY) - mode &= ~S_IWRITE; + mode &= ~S_IWRITE; else - mode |= S_IWRITE; + mode |= S_IWRITE; chmod(filename,mode); } @@ -247,7 +247,7 @@ stat(filename,&st); if (st.st_mode & S_IWRITE) - return 0; + return 0; return PM_FILE_READONLY; } @@ -280,7 +280,7 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)filename; (void)gmTime; (void)time; @@ -297,7 +297,7 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)filename; (void)gmTime; (void)time; diff --git a/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c b/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c index 3be14e8..8056e9a 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c +++ b/board/MAI/bios_emulator/scitech/src/pm/common/vgastate.c @@ -104,7 +104,7 @@ * what we need. */ for (i = 0; i <= 10; i++) - PM_outpb(0x80, 0); + PM_outpb(0x80, 0); } /**************************************************************************** @@ -152,9 +152,9 @@ _port_out(0, PEL_IR); for (i = 0; i < 768; i++) { - vga_delay(); - *pal++ = _port_in(PEL_D); - } + vga_delay(); + *pal++ = _port_in(PEL_D); + } } /**************************************************************************** @@ -169,9 +169,9 @@ /* restore saved palette */ _port_out(0, PEL_IW); for (i = 0; i < 768; i++) { - vga_delay(); - _port_out(*pal++, PEL_D); - } + vga_delay(); + _port_out(*pal++, PEL_D); + } } /**************************************************************************** @@ -247,25 +247,25 @@ /* Save state of VGA registers */ for (i = 0; i < CRT_C; i++) { - _port_out(i, CRT_I); - regs[CRT + i] = _port_in(CRT_D); - } + _port_out(i, CRT_I); + regs[CRT + i] = _port_in(CRT_D); + } for (i = 0; i < ATT_C; i++) { - _port_in(IS1_R); - vga_delay(); - _port_out(i, ATT_IW); - vga_delay(); - regs[ATT + i] = _port_in(ATT_R); - vga_delay(); - } + _port_in(IS1_R); + vga_delay(); + _port_out(i, ATT_IW); + vga_delay(); + regs[ATT + i] = _port_in(ATT_R); + vga_delay(); + } for (i = 0; i < GRA_C; i++) { - _port_out(i, GRA_I); - regs[GRA + i] = _port_in(GRA_D); - } + _port_out(i, GRA_I); + regs[GRA + i] = _port_in(GRA_D); + } for (i = 0; i < SEQ_C; i++) { - _port_out(i, SEQ_I); - regs[SEQ + i] = _port_in(SEQ_D); - } + _port_out(i, SEQ_I); + regs[SEQ + i] = _port_in(SEQ_D); + } regs[MIS] = _port_in(MIS_R); /* Save the VGA palette values */ @@ -302,7 +302,7 @@ /* Delay to allow clock change to settle */ for (i = 0; i < 10; i++) - vga_delay(); + vga_delay(); /* Synchronous reset on */ _port_out(0x00,SEQ_I); @@ -312,9 +312,9 @@ _port_out(1, SEQ_I); _port_out(regs[SEQ + 1] | 0x20, SEQ_D); for (i = 2; i < SEQ_C; i++) { - _port_out(i, SEQ_I); - _port_out(regs[SEQ + i], SEQ_D); - } + _port_out(i, SEQ_I); + _port_out(regs[SEQ + i], SEQ_D); + } /* Synchronous reset off */ _port_out(0x00,SEQ_I); @@ -324,21 +324,21 @@ _port_out(0x11, CRT_I); _port_out(_port_in(CRT_D) & 0x7F, CRT_D); for (i = 0; i < CRT_C; i++) { - _port_out(i, CRT_I); - _port_out(regs[CRT + i], CRT_D); - } + _port_out(i, CRT_I); + _port_out(regs[CRT + i], CRT_D); + } for (i = 0; i < GRA_C; i++) { - _port_out(i, GRA_I); - _port_out(regs[GRA + i], GRA_D); - } + _port_out(i, GRA_I); + _port_out(regs[GRA + i], GRA_D); + } for (i = 0; i < ATT_C; i++) { - _port_in(IS1_R); /* reset flip-flop */ - vga_delay(); - _port_out(i, ATT_IW); - vga_delay(); - _port_out(regs[ATT + i], ATT_IW); - vga_delay(); - } + _port_in(IS1_R); /* reset flip-flop */ + vga_delay(); + _port_out(i, ATT_IW); + vga_delay(); + _port_out(regs[ATT + i], ATT_IW); + vga_delay(); + } /* Ensure the VGA screen is turned on */ PM_vgaUnblankDisplay(); diff --git a/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c index e2446a4..ac62e81 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c +++ b/board/MAI/bios_emulator/scitech/src/pm/cpuinfo.c @@ -168,144 +168,144 @@ static ibool firstTime = true; if (_CPU_haveCPUID()) { - cpu = _CPU_checkCPUID(); - vendor = cpu & ~CPU_mask; - if (vendor == CPU_Intel) { - /* Check for Intel processors */ - switch (cpu & CPU_mask) { - case 4: cpu = CPU_i486; break; - case 5: cpu = CPU_Pentium; break; - case 6: - if ((model = _CPU_getCPUIDModel()) == 1) - cpu = CPU_PentiumPro; - else if (model <= 6) { - cacheSize = _CPU_getCacheSize(); - if ((model == 5 && cacheSize == 0) || - (model == 5 && cacheSize == 256) || - (model == 6 && cacheSize == 128)) - cpu = CPU_Celeron; - else - cpu = CPU_PentiumII; - } - else if (model >= 7) { - /* Model 7 == Pentium III */ - /* Model 8 == Celeron/Pentium III Coppermine */ - cacheSize = _CPU_getCacheSize(); - if ((model == 8 && cacheSize == 128)) - cpu = CPU_Celeron; - else - cpu = CPU_PentiumIII; - } - break; - default: - cpu = CPU_UnkIntel; - } - } - else if (vendor == CPU_Cyrix) { - /* Check for Cyrix processors */ - switch (cpu & CPU_mask) { - case 4: - if ((model = _CPU_getCPUIDModel()) == 4) - cpu = CPU_CyrixMediaGX; - else - cpu = CPU_UnkCyrix; - break; - case 5: - if ((model = _CPU_getCPUIDModel()) == 2) - cpu = CPU_Cyrix6x86; - else if (model == 4) - cpu = CPU_CyrixMediaGXm; - else - cpu = CPU_UnkCyrix; - break; - case 6: - if ((model = _CPU_getCPUIDModel()) <= 1) - cpu = CPU_Cyrix6x86MX; - else - cpu = CPU_UnkCyrix; - break; - default: - cpu = CPU_UnkCyrix; - } - } - else if (vendor == CPU_AMD) { - /* Check for AMD processors */ - switch (cpu & CPU_mask) { - case 4: - if ((model = _CPU_getCPUIDModel()) == 0) - cpu = CPU_AMDAm5x86; - else - cpu = CPU_AMDAm486; - break; - case 5: - if ((model = _CPU_getCPUIDModel()) <= 3) - cpu = CPU_AMDK5; - else if (model <= 7) - cpu = CPU_AMDK6; - else if (model == 8) - cpu = CPU_AMDK6_2; - else if (model == 9) - cpu = CPU_AMDK6_III; - else if (model == 13) { - if (_CPU_getCPUIDStepping() <= 3) - cpu = CPU_AMDK6_IIIplus; - else - cpu = CPU_AMDK6_2plus; - } - else - cpu = CPU_UnkAMD; - break; - case 6: - if ((model = _CPU_getCPUIDModel()) == 3) - cpu = CPU_AMDDuron; - else - cpu = CPU_AMDAthlon; - break; - default: - cpu = CPU_UnkAMD; - } - } - else if (vendor == CPU_IDT) { - /* Check for IDT WinChip processors */ - switch (cpu & CPU_mask) { - case 5: - if ((model = _CPU_getCPUIDModel()) <= 4) - cpu = CPU_WinChipC6; - else if (model == 8) - cpu = CPU_WinChip2; - else - cpu = CPU_UnkIDT; - break; - default: - cpu = CPU_UnkIDT; - } - } - else { - /* Assume a Pentium compatible Intel clone */ - cpu = CPU_Pentium; - } - return cpu | vendor | (_CPU_getCPUIDStepping() << CPU_steppingShift); - } + cpu = _CPU_checkCPUID(); + vendor = cpu & ~CPU_mask; + if (vendor == CPU_Intel) { + /* Check for Intel processors */ + switch (cpu & CPU_mask) { + case 4: cpu = CPU_i486; break; + case 5: cpu = CPU_Pentium; break; + case 6: + if ((model = _CPU_getCPUIDModel()) == 1) + cpu = CPU_PentiumPro; + else if (model <= 6) { + cacheSize = _CPU_getCacheSize(); + if ((model == 5 && cacheSize == 0) || + (model == 5 && cacheSize == 256) || + (model == 6 && cacheSize == 128)) + cpu = CPU_Celeron; + else + cpu = CPU_PentiumII; + } + else if (model >= 7) { + /* Model 7 == Pentium III */ + /* Model 8 == Celeron/Pentium III Coppermine */ + cacheSize = _CPU_getCacheSize(); + if ((model == 8 && cacheSize == 128)) + cpu = CPU_Celeron; + else + cpu = CPU_PentiumIII; + } + break; + default: + cpu = CPU_UnkIntel; + } + } + else if (vendor == CPU_Cyrix) { + /* Check for Cyrix processors */ + switch (cpu & CPU_mask) { + case 4: + if ((model = _CPU_getCPUIDModel()) == 4) + cpu = CPU_CyrixMediaGX; + else + cpu = CPU_UnkCyrix; + break; + case 5: + if ((model = _CPU_getCPUIDModel()) == 2) + cpu = CPU_Cyrix6x86; + else if (model == 4) + cpu = CPU_CyrixMediaGXm; + else + cpu = CPU_UnkCyrix; + break; + case 6: + if ((model = _CPU_getCPUIDModel()) <= 1) + cpu = CPU_Cyrix6x86MX; + else + cpu = CPU_UnkCyrix; + break; + default: + cpu = CPU_UnkCyrix; + } + } + else if (vendor == CPU_AMD) { + /* Check for AMD processors */ + switch (cpu & CPU_mask) { + case 4: + if ((model = _CPU_getCPUIDModel()) == 0) + cpu = CPU_AMDAm5x86; + else + cpu = CPU_AMDAm486; + break; + case 5: + if ((model = _CPU_getCPUIDModel()) <= 3) + cpu = CPU_AMDK5; + else if (model <= 7) + cpu = CPU_AMDK6; + else if (model == 8) + cpu = CPU_AMDK6_2; + else if (model == 9) + cpu = CPU_AMDK6_III; + else if (model == 13) { + if (_CPU_getCPUIDStepping() <= 3) + cpu = CPU_AMDK6_IIIplus; + else + cpu = CPU_AMDK6_2plus; + } + else + cpu = CPU_UnkAMD; + break; + case 6: + if ((model = _CPU_getCPUIDModel()) == 3) + cpu = CPU_AMDDuron; + else + cpu = CPU_AMDAthlon; + break; + default: + cpu = CPU_UnkAMD; + } + } + else if (vendor == CPU_IDT) { + /* Check for IDT WinChip processors */ + switch (cpu & CPU_mask) { + case 5: + if ((model = _CPU_getCPUIDModel()) <= 4) + cpu = CPU_WinChipC6; + else if (model == 8) + cpu = CPU_WinChip2; + else + cpu = CPU_UnkIDT; + break; + default: + cpu = CPU_UnkIDT; + } + } + else { + /* Assume a Pentium compatible Intel clone */ + cpu = CPU_Pentium; + } + return cpu | vendor | (_CPU_getCPUIDStepping() << CPU_steppingShift); + } else { - if (_CPU_check80386()) - cpu = CPU_i386; - else if (_CPU_check80486()) { - /* If we get here we may have a Cyrix processor so we can try - * enabling the CPUID instruction and trying again. - */ - if (firstTime) { - firstTime = false; - _CPU_enableCyrixCPUID(); - return CPU_getProcessorType(); - } - cpu = CPU_i486; - } - else - cpu = CPU_Pentium; - if (!_CPU_checkClone()) - return cpu | CPU_Intel; - return cpu; - } + if (_CPU_check80386()) + cpu = CPU_i386; + else if (_CPU_check80486()) { + /* If we get here we may have a Cyrix processor so we can try + * enabling the CPUID instruction and trying again. + */ + if (firstTime) { + firstTime = false; + _CPU_enableCyrixCPUID(); + return CPU_getProcessorType(); + } + cpu = CPU_i486; + } + else + cpu = CPU_Pentium; + if (!_CPU_checkClone()) + return cpu | CPU_Intel; + return cpu; + } #elif defined(__ALPHA__) return CPU_Alpha; #elif defined(__MIPS__) @@ -337,7 +337,7 @@ { #ifdef __INTEL__ if (_CPU_haveCPUID()) - return (_CPU_getCPUIDFeatures() & CPU_HaveMMX) != 0; + return (_CPU_getCPUIDFeatures() & CPU_HaveMMX) != 0; return false; #else return false; @@ -366,7 +366,7 @@ { #ifdef __INTEL__ if (_CPU_haveCPUID()) - return _CPU_have3DNow(); + return _CPU_have3DNow(); return false; #else return false; @@ -395,7 +395,7 @@ { #ifdef __INTEL__ if (_CPU_haveCPUID()) - return (_CPU_getCPUIDFeatures() & CPU_HaveSSE) != 0; + return (_CPU_getCPUIDFeatures() & CPU_HaveSSE) != 0; return false; #else return false; @@ -432,7 +432,7 @@ { #ifdef __INTEL__ if (_CPU_haveCPUID()) - return (_CPU_getCPUIDFeatures() & CPU_HaveRDTSC) != 0; + return (_CPU_getCPUIDFeatures() & CPU_HaveRDTSC) != 0; return false; #else return false; @@ -464,22 +464,22 @@ iPriority = SetMaxThreadPriority(); GetCounterFrequency(&count_freq); for (i = 0; i < SAMPLINGS; i++) { - GetCounter(&t0); - for (j = 0; j < INNER_LOOPS; j++) - _CPU_runBSFLoop(ITERATIONS); - GetCounter(&t1); - current = t1.low - t0.low; - if (current < lowest) - lowest = current; - } + GetCounter(&t0); + for (j = 0; j < INNER_LOOPS; j++) + _CPU_runBSFLoop(ITERATIONS); + GetCounter(&t1); + current = t1.low - t0.low; + if (current < lowest) + lowest = current; + } RestoreThreadPriority(iPriority); /* Compute frequency */ ticks = _CPU_mulDiv(lowest,1000000,count_freq.low); if ((ticks % count_freq.low) > (count_freq.low/2)) - ticks++; /* Round up if necessary */ + ticks++; /* Round up if necessary */ if (ticks == 0) - return 0; + return 0; return ((cycles*INNER_LOOPS)/ticks); } @@ -513,44 +513,44 @@ GetCounterFrequency(&count_freq); PM_set64(freq,count_freq.high,count_freq.low); for (tries = 0; tries < 3; tries++) { - /* Loop until 100 ticks have passed since last read of hi-res - * counter. This accounts for overhead later. - */ - GetCounter(&t0); - t1.low = t0.low; - t1.high = t0.high; - while ((t1.low - t0.low) < 100) { - GetCounter(&t1); - _CPU_readTimeStamp(&s0); - } + /* Loop until 100 ticks have passed since last read of hi-res + * counter. This accounts for overhead later. + */ + GetCounter(&t0); + t1.low = t0.low; + t1.high = t0.high; + while ((t1.low - t0.low) < 100) { + GetCounter(&t1); + _CPU_readTimeStamp(&s0); + } - /* Loop until 30000 ticks have passed since last read of hi-res counter. - * This allows for elapsed time for sampling. For a hi-res frequency - * of 1MHz, this is about 0.03 of a second. The frequency reported - * by the OS dependent code should be tuned to provide a good - * sample period depending on the accuracy of the OS timers (ie: - * if the accuracy is lower, lower the frequency to spend more time - * in the inner loop to get better accuracy). - */ - t0.low = t1.low; - t0.high = t1.high; - while ((t1.low - t0.low) < maxCount) { - GetCounter(&t1); - _CPU_readTimeStamp(&s1); - } + /* Loop until 30000 ticks have passed since last read of hi-res counter. + * This allows for elapsed time for sampling. For a hi-res frequency + * of 1MHz, this is about 0.03 of a second. The frequency reported + * by the OS dependent code should be tuned to provide a good + * sample period depending on the accuracy of the OS timers (ie: + * if the accuracy is lower, lower the frequency to spend more time + * in the inner loop to get better accuracy). + */ + t0.low = t1.low; + t0.high = t1.high; + while ((t1.low - t0.low) < maxCount) { + GetCounter(&t1); + _CPU_readTimeStamp(&s1); + } - /* Find the difference during the timing loop */ - PM_set64(stamp0,s0.high,s0.low); - PM_set64(stamp1,s1.high,s1.low); - PM_set64(ticks0,t0.high,t0.low); - PM_set64(ticks1,t1.high,t1.low); - PM_sub64(cycles,stamp1,stamp0); - PM_sub64(ticks,ticks1,ticks0); + /* Find the difference during the timing loop */ + PM_set64(stamp0,s0.high,s0.low); + PM_set64(stamp1,s1.high,s1.low); + PM_set64(ticks0,t0.high,t0.low); + PM_set64(ticks1,t1.high,t1.low); + PM_sub64(cycles,stamp1,stamp0); + PM_sub64(ticks,ticks1,ticks0); - /* Sum up the results */ - PM_add64(total_ticks,total_ticks,ticks); - PM_add64(total_cycles,total_cycles,cycles); - } + /* Sum up the results */ + PM_add64(total_ticks,total_ticks,ticks); + PM_add64(total_cycles,total_cycles,cycles); + } RestoreThreadPriority(iPriority); /* Compute frequency in Hz */ @@ -598,46 +598,46 @@ ulong cpuSpeed; uint i; static ulong intel_cycles[] = { - 115,47,43, - }; + 115,47,43, + }; static ulong cyrix_cycles[] = { - 38,38,52,52, - }; + 38,38,52,52, + }; static ulong amd_cycles[] = { - 49, - }; + 49, + }; static ulong known_speeds[] = { - 1000,950,900,850,800,750,700,650,600,550,500,450,433,400,350, - 333,300,266,233,200,166,150,133,120,100,90,75,66,60,50,33,20,0, - }; + 1000,950,900,850,800,750,700,650,600,550,500,450,433,400,350, + 333,300,266,233,200,166,150,133,120,100,90,75,66,60,50,33,20,0, + }; if (CPU_haveRDTSC()) { - cpuSpeed = (GetRDTSCCpuSpeed(accurate) + 500000) / 1000000; - } + cpuSpeed = (GetRDTSCCpuSpeed(accurate) + 500000) / 1000000; + } else { - int type = CPU_getProcessorType(); - int processor = type & CPU_mask; - int vendor = type & CPU_familyMask; - if (vendor == CPU_Intel) - cpuSpeed = GetBSFCpuSpeed(ITERATIONS * intel_cycles[processor - CPU_i386]); - else if (vendor == CPU_Cyrix) - cpuSpeed = GetBSFCpuSpeed(ITERATIONS * cyrix_cycles[processor - CPU_Cyrix6x86]); - else if (vendor == CPU_AMD) - cpuSpeed = GetBSFCpuSpeed(ITERATIONS * amd_cycles[0]); - else - return 0; - } + int type = CPU_getProcessorType(); + int processor = type & CPU_mask; + int vendor = type & CPU_familyMask; + if (vendor == CPU_Intel) + cpuSpeed = GetBSFCpuSpeed(ITERATIONS * intel_cycles[processor - CPU_i386]); + else if (vendor == CPU_Cyrix) + cpuSpeed = GetBSFCpuSpeed(ITERATIONS * cyrix_cycles[processor - CPU_Cyrix6x86]); + else if (vendor == CPU_AMD) + cpuSpeed = GetBSFCpuSpeed(ITERATIONS * amd_cycles[0]); + else + return 0; + } /* Now normalise the results given known processors speeds, if the * speed we measure is within 2MHz of the expected values */ if (!accurate) { - for (i = 0; known_speeds[i] != 0; i++) { - if (cpuSpeed >= (known_speeds[i]-3) && cpuSpeed <= (known_speeds[i]+3)) { - return known_speeds[i]; - } - } - } + for (i = 0; known_speeds[i] != 0; i++) { + if (cpuSpeed >= (known_speeds[i]-3) && cpuSpeed <= (known_speeds[i]+3)) { + return known_speeds[i]; + } + } + } return cpuSpeed; #else return 0; @@ -674,8 +674,8 @@ { #if defined(__INTEL__) if (CPU_haveRDTSC()) { - return GetRDTSCCpuSpeed(accurate); - } + return GetRDTSCCpuSpeed(accurate); + } return CPU_getProcessorSpeed(false) * 1000000; #else return 0; @@ -706,101 +706,101 @@ static char name[80]; if (speed == -1) { - cpu = CPU_getProcessorType(); - speed = CPU_getProcessorSpeed(false); - } + cpu = CPU_getProcessorType(); + speed = CPU_getProcessorSpeed(false); + } sprintf(name,"%d MHz ", speed); switch (cpu & CPU_mask) { - case CPU_i386: - strcat(name,"Intel i386 processor"); - break; - case CPU_i486: - strcat(name,"Intel i486 processor"); - break; - case CPU_Pentium: - strcat(name,"Intel Pentium processor"); - break; - case CPU_PentiumPro: - strcat(name,"Intel Pentium Pro processor"); - break; - case CPU_PentiumII: - strcat(name,"Intel Pentium II processor"); - break; - case CPU_Celeron: - strcat(name,"Intel Celeron processor"); - break; - case CPU_PentiumIII: - strcat(name,"Intel Pentium III processor"); - break; - case CPU_UnkIntel: - strcat(name,"Unknown Intel processor"); - break; - case CPU_Cyrix6x86: - strcat(name,"Cyrix 6x86 processor"); - break; - case CPU_Cyrix6x86MX: - strcat(name,"Cyrix 6x86MX processor"); - break; - case CPU_CyrixMediaGX: - strcat(name,"Cyrix MediaGX processor"); - break; - case CPU_CyrixMediaGXm: - strcat(name,"Cyrix MediaGXm processor"); - break; - case CPU_UnkCyrix: - strcat(name,"Unknown Cyrix processor"); - break; - case CPU_AMDAm486: - strcat(name,"AMD Am486 processor"); - break; - case CPU_AMDAm5x86: - strcat(name,"AMD Am5x86 processor"); - break; - case CPU_AMDK5: - strcat(name,"AMD K5 processor"); - break; - case CPU_AMDK6: - strcat(name,"AMD K6 processor"); - break; - case CPU_AMDK6_2: - strcat(name,"AMD K6-2 processor"); - break; - case CPU_AMDK6_III: - strcat(name,"AMD K6-III processor"); - break; - case CPU_AMDK6_2plus: - strcat(name,"AMD K6-2+ processor"); - break; - case CPU_AMDK6_IIIplus: - strcat(name,"AMD K6-III+ processor"); - break; - case CPU_UnkAMD: - strcat(name,"Unknown AMD processor"); - break; - case CPU_AMDAthlon: - strcat(name,"AMD Athlon processor"); - break; - case CPU_AMDDuron: - strcat(name,"AMD Duron processor"); - break; - case CPU_WinChipC6: - strcat(name,"IDT WinChip C6 processor"); - break; - case CPU_WinChip2: - strcat(name,"IDT WinChip 2 processor"); - break; - case CPU_UnkIDT: - strcat(name,"Unknown IDT processor"); - break; - default: - strcat(name,"Unknown processor"); - } + case CPU_i386: + strcat(name,"Intel i386 processor"); + break; + case CPU_i486: + strcat(name,"Intel i486 processor"); + break; + case CPU_Pentium: + strcat(name,"Intel Pentium processor"); + break; + case CPU_PentiumPro: + strcat(name,"Intel Pentium Pro processor"); + break; + case CPU_PentiumII: + strcat(name,"Intel Pentium II processor"); + break; + case CPU_Celeron: + strcat(name,"Intel Celeron processor"); + break; + case CPU_PentiumIII: + strcat(name,"Intel Pentium III processor"); + break; + case CPU_UnkIntel: + strcat(name,"Unknown Intel processor"); + break; + case CPU_Cyrix6x86: + strcat(name,"Cyrix 6x86 processor"); + break; + case CPU_Cyrix6x86MX: + strcat(name,"Cyrix 6x86MX processor"); + break; + case CPU_CyrixMediaGX: + strcat(name,"Cyrix MediaGX processor"); + break; + case CPU_CyrixMediaGXm: + strcat(name,"Cyrix MediaGXm processor"); + break; + case CPU_UnkCyrix: + strcat(name,"Unknown Cyrix processor"); + break; + case CPU_AMDAm486: + strcat(name,"AMD Am486 processor"); + break; + case CPU_AMDAm5x86: + strcat(name,"AMD Am5x86 processor"); + break; + case CPU_AMDK5: + strcat(name,"AMD K5 processor"); + break; + case CPU_AMDK6: + strcat(name,"AMD K6 processor"); + break; + case CPU_AMDK6_2: + strcat(name,"AMD K6-2 processor"); + break; + case CPU_AMDK6_III: + strcat(name,"AMD K6-III processor"); + break; + case CPU_AMDK6_2plus: + strcat(name,"AMD K6-2+ processor"); + break; + case CPU_AMDK6_IIIplus: + strcat(name,"AMD K6-III+ processor"); + break; + case CPU_UnkAMD: + strcat(name,"Unknown AMD processor"); + break; + case CPU_AMDAthlon: + strcat(name,"AMD Athlon processor"); + break; + case CPU_AMDDuron: + strcat(name,"AMD Duron processor"); + break; + case CPU_WinChipC6: + strcat(name,"IDT WinChip C6 processor"); + break; + case CPU_WinChip2: + strcat(name,"IDT WinChip 2 processor"); + break; + case CPU_UnkIDT: + strcat(name,"Unknown IDT processor"); + break; + default: + strcat(name,"Unknown processor"); + } if (CPU_haveMMX()) - strcat(name," with MMX(R)"); + strcat(name," with MMX(R)"); if (CPU_have3DNow()) - strcat(name,", 3DNow!(R)"); + strcat(name,", 3DNow!(R)"); if (CPU_haveSSE()) - strcat(name,", SSE(R)"); + strcat(name,", SSE(R)"); return name; #else return "Unknown"; diff --git a/board/MAI/bios_emulator/scitech/src/pm/debug.c b/board/MAI/bios_emulator/scitech/src/pm/debug.c index d86e3e6..751bf09 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/debug.c +++ b/board/MAI/bios_emulator/scitech/src/pm/debug.c @@ -61,23 +61,23 @@ char buf[256]; if (logFile[0] == 0) { - strcpy(logFile,PM_getNucleusPath()); - PM_backslash(logFile); - strcat(logFile,"scitech.log"); - } + strcpy(logFile,PM_getNucleusPath()); + PM_backslash(logFile); + strcat(logFile,"scitech.log"); + } if ((f = fopen(logFile,"a+")) != NULL) { #if defined(__WIN32_VXD__) || defined(__OS2_VDD__) || defined(__NT_DRIVER__) - sprintf(buf,msg,cond,file,line); - fwrite(buf,1,strlen(buf),f); + sprintf(buf,msg,cond,file,line); + fwrite(buf,1,strlen(buf),f); #else - fprintf(f,msg,cond,file,line); + fprintf(f,msg,cond,file,line); #endif - fclose(f); - } + fclose(f); + } if (fatal) { - sprintf(buf,"Check failed: check '%s' for details", logFile); - PM_fatalError(buf); - } + sprintf(buf,"Check failed: check '%s' for details", logFile); + PM_fatalError(buf); + } } #endif diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/event.c b/board/MAI/bios_emulator/scitech/src/pm/dos/event.c index 12ecb29..a969d11 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/dos/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/dos/event.c @@ -75,7 +75,7 @@ _EVT_restoreInt(ps); } - regs.x.ax = 0x0B; // Reset Move Mouse + regs.x.ax = 0x0B; /* Reset Move Mouse */ PM_int86(0x33,®s,®s); } #endif @@ -178,8 +178,8 @@ the mouse interrupt subroutine, so it must be efficient. NOTE: Interrupts MUST be OFF while this routine is called to ensure we have - mutually exclusive access to our internal data structures for - interrupt driven systems (like under DOS). + mutually exclusive access to our internal data structures for + interrupt driven systems (like under DOS). ****************************************************************************/ static void addMouseEvent( uint what, @@ -193,18 +193,18 @@ event_t evt; if (EVT.count < EVENTQSIZE) { - /* Save information in event record. */ - evt.when = _EVT_getTicks(); - evt.what = what; - evt.message = message; - evt.modifiers = but_stat; - evt.where_x = x; /* Save mouse event position */ - evt.where_y = y; - evt.relative_x = mickeyX; - evt.relative_y = mickeyY; - evt.modifiers |= EVT.keyModifiers; - addEvent(&evt); /* Add to tail of event queue */ - } + /* Save information in event record. */ + evt.when = _EVT_getTicks(); + evt.what = what; + evt.message = message; + evt.modifiers = but_stat; + evt.where_x = x; /* Save mouse event position */ + evt.where_y = y; + evt.relative_x = mickeyX; + evt.relative_y = mickeyY; + evt.modifiers |= EVT.keyModifiers; + addEvent(&evt); /* Add to tail of event queue */ + } } /**************************************************************************** @@ -233,47 +233,47 @@ uint buttonMask; if (mask & 1) { - /* Save the current mouse coordinates */ - EVT.mx = x; EVT.my = y; + /* Save the current mouse coordinates */ + EVT.mx = x; EVT.my = y; - /* If the last event was a movement event, then modify the last - * event rather than post a new one, so that the queue will not - * become saturated. Before we modify the data structures, we - * MUST ensure that interrupts are off. - */ - ps = _EVT_disableInt(); - if (EVT.oldMove != -1) { - EVT.evtq[EVT.oldMove].where_x = x; /* Modify existing one */ - EVT.evtq[EVT.oldMove].where_y = y; - EVT.evtq[EVT.oldMove].relative_x += mickeyX; - EVT.evtq[EVT.oldMove].relative_y += mickeyY; - } - else { - EVT.oldMove = EVT.freeHead; /* Save id of this move event */ - addMouseEvent(EVT_MOUSEMOVE,0,x,y,mickeyX,mickeyY,butstate); - } - _EVT_restoreInt(ps); - } + /* If the last event was a movement event, then modify the last + * event rather than post a new one, so that the queue will not + * become saturated. Before we modify the data structures, we + * MUST ensure that interrupts are off. + */ + ps = _EVT_disableInt(); + if (EVT.oldMove != -1) { + EVT.evtq[EVT.oldMove].where_x = x; /* Modify existing one */ + EVT.evtq[EVT.oldMove].where_y = y; + EVT.evtq[EVT.oldMove].relative_x += mickeyX; + EVT.evtq[EVT.oldMove].relative_y += mickeyY; + } + else { + EVT.oldMove = EVT.freeHead; /* Save id of this move event */ + addMouseEvent(EVT_MOUSEMOVE,0,x,y,mickeyX,mickeyY,butstate); + } + _EVT_restoreInt(ps); + } if (mask & 0x2A) { - ps = _EVT_disableInt(); - buttonMask = 0; - if (mask & 2) buttonMask |= EVT_LEFTBMASK; - if (mask & 8) buttonMask |= EVT_RIGHTBMASK; - if (mask & 32) buttonMask |= EVT_MIDDLEBMASK; - addMouseEvent(EVT_MOUSEDOWN,buttonMask,x,y,0,0,butstate); - EVT.oldMove = -1; - _EVT_restoreInt(ps); - } + ps = _EVT_disableInt(); + buttonMask = 0; + if (mask & 2) buttonMask |= EVT_LEFTBMASK; + if (mask & 8) buttonMask |= EVT_RIGHTBMASK; + if (mask & 32) buttonMask |= EVT_MIDDLEBMASK; + addMouseEvent(EVT_MOUSEDOWN,buttonMask,x,y,0,0,butstate); + EVT.oldMove = -1; + _EVT_restoreInt(ps); + } if (mask & 0x54) { - ps = _EVT_disableInt(); - buttonMask = 0; - if (mask & 2) buttonMask |= EVT_LEFTBMASK; - if (mask & 8) buttonMask |= EVT_RIGHTBMASK; - if (mask & 32) buttonMask |= EVT_MIDDLEBMASK; - addMouseEvent(EVT_MOUSEUP,buttonMask,x,y,0,0,butstate); - EVT.oldMove = -1; - _EVT_restoreInt(ps); - } + ps = _EVT_disableInt(); + buttonMask = 0; + if (mask & 2) buttonMask |= EVT_LEFTBMASK; + if (mask & 8) buttonMask |= EVT_RIGHTBMASK; + if (mask & 32) buttonMask |= EVT_MIDDLEBMASK; + addMouseEvent(EVT_MOUSEUP,buttonMask,x,y,0,0,butstate); + EVT.oldMove = -1; + _EVT_restoreInt(ps); + } EVT.oldKey = -1; } @@ -282,7 +282,7 @@ Keyboard interrupt handler function. NOTE: Interrupts are OFF when this routine is called by the keyboard ISR, - and we leave them OFF the entire time. + and we leave them OFF the entire time. ****************************************************************************/ static void EVTAPI keyboardISR(void) { @@ -327,7 +327,7 @@ * while the program is initialising. */ while ((i = _EVT_getKeyCode()) != 0) - addKeyEvent(EVT_KEYDOWN,i); + addKeyEvent(EVT_KEYDOWN,i); } /**************************************************************************** @@ -344,62 +344,62 @@ PM_lockHandle lh; /* Unused in DOS */ if (_EVT_useEvents) { - /* Initialise the event queue and enable our interrupt handlers */ - initEventQueue(); + /* Initialise the event queue and enable our interrupt handlers */ + initEventQueue(); #ifndef NO_KEYBOARD_INTERRUPT - PM_setKeyHandler(keyboardISR); + PM_setKeyHandler(keyboardISR); #endif #ifndef NO_MOUSE_INTERRUPT - if ((haveMouse = detectMouse()) != 0) { - int oldmode = _EVT_foolMouse(); - PM_setMouseHandler(0xFFFF,mouseISR); - _EVT_unfoolMouse(oldmode); - } + if ((haveMouse = detectMouse()) != 0) { + int oldmode = _EVT_foolMouse(); + PM_setMouseHandler(0xFFFF,mouseISR); + _EVT_unfoolMouse(oldmode); + } #endif - /* Read the keyboard modifier flags from the BIOS to get the - * correct initialisation state. The only state we care about is - * the correct toggle state flags such as SCROLLLOCK, NUMLOCK and - * CAPSLOCK. - */ - EVT.keyModifiers = 0; - mods = PM_getByte(_EVT_biosPtr+0x17); - if (mods & 0x10) - EVT.keyModifiers |= EVT_SCROLLLOCK; - if (mods & 0x20) - EVT.keyModifiers |= EVT_NUMLOCK; - if (mods & 0x40) - EVT.keyModifiers |= EVT_CAPSLOCK; + /* Read the keyboard modifier flags from the BIOS to get the + * correct initialisation state. The only state we care about is + * the correct toggle state flags such as SCROLLLOCK, NUMLOCK and + * CAPSLOCK. + */ + EVT.keyModifiers = 0; + mods = PM_getByte(_EVT_biosPtr+0x17); + if (mods & 0x10) + EVT.keyModifiers |= EVT_SCROLLLOCK; + if (mods & 0x20) + EVT.keyModifiers |= EVT_NUMLOCK; + if (mods & 0x40) + EVT.keyModifiers |= EVT_CAPSLOCK; - /* Lock all of the code and data used by our protected mode interrupt - * handling routines, so that it will continue to work correctly - * under real mode. - */ - if (!locked) { - /* It is difficult to ensure that we lock our global data, so we - * do this by taking the address of a variable locking all data - * 2Kb on either side. This should properly cover the global data - * used by the module (the other alternative is to declare the - * variables in assembler, in which case we know it will be - * correct). - */ - stat = !PM_lockDataPages(&EVT,sizeof(EVT),&lh); - stat |= !PM_lockDataPages(&_EVT_biosPtr,sizeof(_EVT_biosPtr),&lh); - stat |= !PM_lockCodePages((__codePtr)_EVT_cCodeStart,(int)_EVT_cCodeEnd-(int)_EVT_cCodeStart,&lh); - stat |= !PM_lockCodePages((__codePtr)_EVT_codeStart,(int)_EVT_codeEnd-(int)_EVT_codeStart,&lh); - if (stat) { - PM_fatalError("Page locking services failed - interrupt handling not safe!"); - exit(1); - } - locked = 1; - } + /* Lock all of the code and data used by our protected mode interrupt + * handling routines, so that it will continue to work correctly + * under real mode. + */ + if (!locked) { + /* It is difficult to ensure that we lock our global data, so we + * do this by taking the address of a variable locking all data + * 2Kb on either side. This should properly cover the global data + * used by the module (the other alternative is to declare the + * variables in assembler, in which case we know it will be + * correct). + */ + stat = !PM_lockDataPages(&EVT,sizeof(EVT),&lh); + stat |= !PM_lockDataPages(&_EVT_biosPtr,sizeof(_EVT_biosPtr),&lh); + stat |= !PM_lockCodePages((__codePtr)_EVT_cCodeStart,(int)_EVT_cCodeEnd-(int)_EVT_cCodeStart,&lh); + stat |= !PM_lockCodePages((__codePtr)_EVT_codeStart,(int)_EVT_codeEnd-(int)_EVT_codeStart,&lh); + if (stat) { + PM_fatalError("Page locking services failed - interrupt handling not safe!"); + exit(1); + } + locked = 1; + } - /* Catch program termination signals so we can clean up properly */ - signal(SIGABRT, _EVT_abort); - signal(SIGFPE, _EVT_abort); - signal(SIGINT, _EVT_abort); - _EVT_installed = true; - } + /* Catch program termination signals so we can clean up properly */ + signal(SIGABRT, _EVT_abort); + signal(SIGFPE, _EVT_abort); + signal(SIGINT, _EVT_abort); + _EVT_installed = true; + } } /**************************************************************************** @@ -415,18 +415,18 @@ RMREGS regs; if (haveMouse) { - int oldmode = _EVT_foolMouse(); - PM_resetMouseDriver(1); - regs.x.ax = 7; /* Mouse function 7 - Set horizontal min and max */ - regs.x.cx = 0; - regs.x.dx = xRes; - PM_int86(0x33,®s,®s); - regs.x.ax = 8; /* Mouse function 8 - Set vertical min and max */ - regs.x.cx = 0; - regs.x.dx = yRes; - PM_int86(0x33,®s,®s); - _EVT_unfoolMouse(oldmode); - } + int oldmode = _EVT_foolMouse(); + PM_resetMouseDriver(1); + regs.x.ax = 7; /* Mouse function 7 - Set horizontal min and max */ + regs.x.cx = 0; + regs.x.dx = xRes; + PM_int86(0x33,®s,®s); + regs.x.ax = 8; /* Mouse function 8 - Set vertical min and max */ + regs.x.cx = 0; + regs.x.dx = yRes; + PM_int86(0x33,®s,®s); + _EVT_unfoolMouse(oldmode); + } } /**************************************************************************** @@ -441,13 +441,13 @@ RMREGS regs; if (haveMouse) { - int oldmode = _EVT_foolMouse(); - regs.x.ax = 4; /* Mouse function 4 - Set mouse position */ - regs.x.cx = *x; /* New horizontal coordinate */ - regs.x.dx = *y; /* New vertical coordinate */ - PM_int86(0x33,®s,®s); - _EVT_unfoolMouse(oldmode); - } + int oldmode = _EVT_foolMouse(); + regs.x.ax = 4; /* Mouse function 4 - Set mouse position */ + regs.x.cx = *x; /* New horizontal coordinate */ + regs.x.dx = *y; /* New vertical coordinate */ + PM_int86(0x33,®s,®s); + _EVT_unfoolMouse(oldmode); + } } /**************************************************************************** @@ -460,28 +460,28 @@ uchar mods; if (_EVT_installed) { - /* Restore the interrupt handlers */ - PM_restoreKeyHandler(); - if (haveMouse) - PM_restoreMouseHandler(); - signal(SIGABRT, SIG_DFL); - signal(SIGFPE, SIG_DFL); - signal(SIGINT, SIG_DFL); + /* Restore the interrupt handlers */ + PM_restoreKeyHandler(); + if (haveMouse) + PM_restoreMouseHandler(); + signal(SIGABRT, SIG_DFL); + signal(SIGFPE, SIG_DFL); + signal(SIGINT, SIG_DFL); - /* Set the keyboard modifier flags in the BIOS to our values */ - EVT_allowLEDS(true); - mods = PM_getByte(_EVT_biosPtr+0x17) & ~0x70; - if (EVT.keyModifiers & EVT_SCROLLLOCK) - mods |= 0x10; - if (EVT.keyModifiers & EVT_NUMLOCK) - mods |= 0x20; - if (EVT.keyModifiers & EVT_CAPSLOCK) - mods |= 0x40; - PM_setByte(_EVT_biosPtr+0x17,mods); + /* Set the keyboard modifier flags in the BIOS to our values */ + EVT_allowLEDS(true); + mods = PM_getByte(_EVT_biosPtr+0x17) & ~0x70; + if (EVT.keyModifiers & EVT_SCROLLLOCK) + mods |= 0x10; + if (EVT.keyModifiers & EVT_NUMLOCK) + mods |= 0x20; + if (EVT.keyModifiers & EVT_CAPSLOCK) + mods |= 0x40; + PM_setByte(_EVT_biosPtr+0x17,mods); - /* Flag that we are no longer installed */ - _EVT_installed = false; - } + /* Flag that we are no longer installed */ + _EVT_installed = false; + } } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c b/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c index 71acd68..2ad9e34 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/dos/pm.c @@ -156,7 +156,7 @@ VXD_regs *regs) { if (_PM_VXD_sel != 0 || _PM_VXD_off != 0) - _PM_VxDCall(regs,_PM_VXD_off,_PM_VXD_sel); + _PM_VxDCall(regs,_PM_VXD_off,_PM_VXD_sel); } /**************************************************************************** @@ -172,11 +172,11 @@ /* Call the helper VxD to determine the version number */ if (_PM_VXD_sel != 0 || _PM_VXD_off != 0) { - memset(&r,0,sizeof(r)); - r.eax = API_NUM(PMHELP_GETVER); - _PM_VxDCall(&r,_PM_VXD_off,_PM_VXD_sel); - return VXD_version = (uint)r.eax; - } + memset(&r,0,sizeof(r)); + r.eax = API_NUM(PMHELP_GETVER); + _PM_VxDCall(&r,_PM_VXD_off,_PM_VXD_sel); + return VXD_version = (uint)r.eax; + } return VXD_version = 0; } @@ -199,7 +199,7 @@ /* Bail early if we have alread connected */ if (VXD_version != -1) - return VXD_version != 0; + return VXD_version != 0; /* Get the static SDDHELP.VXD entry point if available */ PM_segread(&sregs); @@ -211,9 +211,9 @@ _PM_VXD_sel = sregs.es; _PM_VXD_off = regs.x.di; if (_PM_VXD_sel != 0 || _PM_VXD_off != 0) { - if (PMHELP_getVersion() >= PMHELP_VERSION) - return true; - } + if (PMHELP_getVersion() >= PMHELP_VERSION) + return true; + } /* If we get here, then either SDDHELP.VXD is not loaded, or it is an * earlier version. In this case try to dynamically load the PMHELP.VXD @@ -228,7 +228,7 @@ VXD_loadSel = sregs.es; VXD_loadOff = regs.x.di; if (VXD_loadSel == 0 && VXD_loadOff == 0) - return VXD_version = 0; + return VXD_version = 0; r.eax = 1; r.ebx = 0; r.edx = (uint)VXD_name; @@ -237,7 +237,7 @@ r.es = sregs.es; _PM_VxDCall(&r,VXD_loadOff,VXD_loadSel); if (r.eax != 0) - return VXD_version = 0; + return VXD_version = 0; /* Get the dynamic VxD entry point so we can call it */ atexit(UnloadVxD); @@ -249,9 +249,9 @@ _PM_VXD_sel = sregs.es; _PM_VXD_off = regs.x.di; if (_PM_VXD_sel == 0 && _PM_VXD_off == 0) - return VXD_version = 0; + return VXD_version = 0; if (PMHELP_getVersion() >= PMHELP_VERSION) - return true; + return true; return VXD_version = 0; } #endif @@ -269,24 +269,24 @@ /* Check if we are running under CauseWay under real DOS */ if (_PM_haveCauseWay == -1) { - /* Check if we are running under DPMI in which case we will not be - * able to use our special ring 0 CauseWay functions. - */ - _PM_haveCauseWay = false; - regs.x.ax = 0xFF00; - PM_int386(0x31,®s,®s); - if (regs.x.cflag || !(regs.e.edi & 8)) { - /* We are not under DPMI, so now check if CauseWay is active */ - regs.x.ax = 0xFFF9; - PM_int386(0x31,®s,®s); - if (!regs.x.cflag && regs.e.ecx == 0x43415553 && regs.e.edx == 0x45574159) - _PM_haveCauseWay = true; - } + /* Check if we are running under DPMI in which case we will not be + * able to use our special ring 0 CauseWay functions. + */ + _PM_haveCauseWay = false; + regs.x.ax = 0xFF00; + PM_int386(0x31,®s,®s); + if (regs.x.cflag || !(regs.e.edi & 8)) { + /* We are not under DPMI, so now check if CauseWay is active */ + regs.x.ax = 0xFFF9; + PM_int386(0x31,®s,®s); + if (!regs.x.cflag && regs.e.ecx == 0x43415553 && regs.e.edx == 0x45574159) + _PM_haveCauseWay = true; + } - /* Now connect to PMHELP.VXD and initialise MTRR module */ - if (!PMHELP_connect()) - MTRR_init(); - } + /* Now connect to PMHELP.VXD and initialise MTRR module */ + if (!PMHELP_connect()) + MTRR_init(); + } #endif } @@ -311,14 +311,14 @@ VXD_regs regs; if (PMHELP_connect()) { - memset(®s,0,sizeof(regs)); - regs.eax = API_NUM(PMHELP_ENABLELFBCOMB); - regs.ebx = base; - regs.ecx = size; - regs.edx = type; - _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); - return regs.eax; - } + memset(®s,0,sizeof(regs)); + regs.eax = API_NUM(PMHELP_ENABLELFBCOMB); + regs.ebx = base; + regs.ecx = size; + regs.edx = type; + _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); + return regs.eax; + } return MTRR_enableWriteCombine(base,size,type); #else return PM_MTRR_NOT_SUPPORTED; @@ -346,9 +346,9 @@ { uint pos = strlen(s); if (s[pos-1] != '\\') { - s[pos] = '\\'; - s[pos+1] = '\0'; - } + s[pos] = '\\'; + s[pos+1] = '\0'; + } } void PMAPI PM_setFatalErrorCleanup( @@ -360,7 +360,7 @@ void PMAPI PM_fatalError(const char *msg) { if (fatalErrorCleanup) - fatalErrorCleanup(); + fatalErrorCleanup(); fprintf(stderr,"%s\n", msg); exit(1); } @@ -368,18 +368,18 @@ static void ExitVBEBuf(void) { if (VESABuf_ptr) - PM_freeRealSeg(VESABuf_ptr); + PM_freeRealSeg(VESABuf_ptr); VESABuf_ptr = 0; } void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff) { if (!VESABuf_ptr) { - /* Allocate a global buffer for communicating with the VESA VBE */ - if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) - return NULL; - atexit(ExitVBEBuf); - } + /* Allocate a global buffer for communicating with the VESA VBE */ + if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) + return NULL; + atexit(ExitVBEBuf); + } *len = VESABuf_len; *rseg = VESABuf_rseg; *roff = VESABuf_roff; @@ -429,12 +429,12 @@ int i; for (i = 0; i < MAX_RM_BLOCKS; i++) { - if (rmBlocks[i].p == NULL) { - rmBlocks[i].p = mem; - rmBlocks[i].tag = tag; - return; - } - } + if (rmBlocks[i].p == NULL) { + rmBlocks[i].p = mem; + rmBlocks[i].tag = tag; + return; + } + } PM_fatalError("To many real mode memory block allocations!"); } @@ -443,9 +443,9 @@ int i; for (i = 0; i < MAX_RM_BLOCKS; i++) { - if (rmBlocks[i].p == mem) - return rmBlocks[i].tag; - } + if (rmBlocks[i].p == mem) + return rmBlocks[i].tag; + } PM_fatalError("Could not find prior real mode memory block allocation!"); return 0; } @@ -469,19 +469,19 @@ char *env; if ((env = getenv("NUCLEUS_PATH")) != NULL) - return env; + return env; if ((env = getenv("WINBOOTDIR")) != NULL) { - /* Running in a Windows 9x DOS box or DOS mode */ - strcpy(path,env); - strcat(path,"\\system\\nucleus"); - return path; - } + /* Running in a Windows 9x DOS box or DOS mode */ + strcpy(path,env); + strcat(path,"\\system\\nucleus"); + return path; + } if ((env = getenv("SystemRoot")) != NULL) { - /* Running in an NT/2K DOS box */ - strcpy(path,env); - strcat(path,"\\system32\\nucleus"); - return path; - } + /* Running in an NT/2K DOS box */ + strcpy(path,env); + strcat(path,"\\system32\\nucleus"); + return path; + } return "c:\\nucleus"; } @@ -538,12 +538,12 @@ sb->oldMode = regs.h.al & 0x7F; sb->old50Lines = false; if (sb->oldMode == 0x3) { - regs.x.ax = 0x1130; - regs.x.bx = 0; - regs.x.dx = 0; - PM_int86(0x10,®s,®s); - sb->old50Lines = (regs.h.dl == 42 || regs.h.dl == 49); - } + regs.x.ax = 0x1130; + regs.x.bx = 0; + regs.x.dx = 0; + PM_int86(0x10,®s,®s); + sb->old50Lines = (regs.h.dl == 42 || regs.h.dl == 49); + } (void)hwndConsole; } @@ -560,10 +560,10 @@ /* Retore 50 line mode if set */ if (sb->old50Lines) { - regs.x.ax = 0x1112; - regs.x.bx = 0; - PM_int86(0x10,®s,®s); - } + regs.x.ax = 0x1112; + regs.x.bx = 0; + PM_int86(0x10,®s,®s); + } (void)hwndConsole; } @@ -587,13 +587,13 @@ PM_setWord(_biosPtr+0x4C,width*2); PM_setByte(_biosPtr+0x84,height-1); if (height > 25) { - PM_setWord(_biosPtr+0x60,0x0607); - PM_setByte(_biosPtr+0x85,0x08); - } + PM_setWord(_biosPtr+0x60,0x0607); + PM_setByte(_biosPtr+0x85,0x08); + } else { - PM_setWord(_biosPtr+0x60,0x0D0E); - PM_setByte(_biosPtr+0x85,0x016); - } + PM_setWord(_biosPtr+0x60,0x0D0E); + PM_setByte(_biosPtr+0x85,0x016); + } } void * PMAPI PM_mallocShared(long size) @@ -623,22 +623,22 @@ /* Create a zero memory mapping for us to use */ if (firstTime) { - rmZeroPtr = PM_mapPhysicalAddr(0,0x7FFF,true); - firstTime = false; - } + rmZeroPtr = PM_mapPhysicalAddr(0,0x7FFF,true); + firstTime = false; + } /* Remap the secondary BIOS to 0xC0000 physical */ if (BIOSPhysAddr != 0xC0000L || BIOSLen > 32768) { - /* DOS cannot virtually remap the BIOS, so we can only work if all - * the secondary controllers are identical, and we then use the - * BIOS on the first controller for all the remaining controllers. - * - * For OS'es that do virtual memory, and remapping of 0xC0000 - * physical (perhaps a copy on write mapping) should be all that - * is needed. - */ - return false; - } + /* DOS cannot virtually remap the BIOS, so we can only work if all + * the secondary controllers are identical, and we then use the + * BIOS on the first controller for all the remaining controllers. + * + * For OS'es that do virtual memory, and remapping of 0xC0000 + * physical (perhaps a copy on write mapping) should be all that + * is needed. + */ + return false; + } /* Save current handlers of int 10h and 6Dh */ GetRMVect(0x10,&Current10); @@ -656,9 +656,9 @@ /* Second the primary BIOS mappin 1:1 for 0xC0000 physical */ if (BIOSPhysAddr != 0xC0000L) { - /* DOS does not support this */ - (void)mappedBIOS; - } + /* DOS does not support this */ + (void)mappedBIOS; + } return true; } @@ -669,26 +669,26 @@ LZTimerOnExt(&tm); while (LZTimerLapExt(&tm) < microseconds) - ; + ; LZTimerOffExt(&tm); } int PMAPI PM_getCOMPort(int port) { switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + } return 0; } int PMAPI PM_getLPTPort(int port) { switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -733,15 +733,15 @@ memset(findData,0,findData->dwSize); findData->dwSize = dwSize; if (blk->attrib & _A_RDONLY) - findData->attrib |= PM_FILE_READONLY; + findData->attrib |= PM_FILE_READONLY; if (blk->attrib & _A_SUBDIR) - findData->attrib |= PM_FILE_DIRECTORY; + findData->attrib |= PM_FILE_DIRECTORY; if (blk->attrib & _A_ARCH) - findData->attrib |= PM_FILE_ARCHIVE; + findData->attrib |= PM_FILE_ARCHIVE; if (blk->attrib & _A_HIDDEN) - findData->attrib |= PM_FILE_HIDDEN; + findData->attrib |= PM_FILE_HIDDEN; if (blk->attrib & _A_SYSTEM) - findData->attrib |= PM_FILE_SYSTEM; + findData->attrib |= PM_FILE_SYSTEM; findData->sizeLo = blk->size; strncpy(findData->name,blk->name,PM_MAX_PATH); findData->name[PM_MAX_PATH-1] = 0; @@ -760,11 +760,11 @@ struct find_t *blk; if ((blk = PM_malloc(sizeof(*blk))) == NULL) - return PM_FILE_INVALID; + return PM_FILE_INVALID; if (_dos_findfirst((char*)filename,FIND_MASK,blk) == 0) { - convertFindData(findData,blk); - return blk; - } + convertFindData(findData,blk); + return blk; + } return PM_FILE_INVALID; } @@ -779,9 +779,9 @@ struct find_t *blk = handle; if (_dos_findnext(blk) == 0) { - convertFindData(findData,blk); - return true; - } + convertFindData(findData,blk); + return true; + } return false; } @@ -813,9 +813,9 @@ { RMREGS regs; regs.h.dl = (uchar)(drive - 'A' + 1); - regs.h.ah = 0x36; // Get disk information service + regs.h.ah = 0x36; /* Get disk information service */ PM_int86(0x21,®s,®s); - return regs.x.ax != 0xFFFF; // AX = 0xFFFF if disk is invalid + return regs.x.ax != 0xFFFF; /* AX = 0xFFFF if disk is invalid */ } /**************************************************************************** @@ -848,25 +848,25 @@ DWORD attr = 0; if (attrib & PM_FILE_READONLY) - attr |= FILE_ATTRIBUTE_READONLY; + attr |= FILE_ATTRIBUTE_READONLY; if (attrib & PM_FILE_ARCHIVE) - attr |= FILE_ATTRIBUTE_ARCHIVE; + attr |= FILE_ATTRIBUTE_ARCHIVE; if (attrib & PM_FILE_HIDDEN) - attr |= FILE_ATTRIBUTE_HIDDEN; + attr |= FILE_ATTRIBUTE_HIDDEN; if (attrib & PM_FILE_SYSTEM) - attr |= FILE_ATTRIBUTE_SYSTEM; + attr |= FILE_ATTRIBUTE_SYSTEM; SetFileAttributes((LPSTR)filename, attr); #else uint attr = 0; if (attrib & PM_FILE_READONLY) - attr |= _A_RDONLY; + attr |= _A_RDONLY; if (attrib & PM_FILE_ARCHIVE) - attr |= _A_ARCH; + attr |= _A_ARCH; if (attrib & PM_FILE_HIDDEN) - attr |= _A_HIDDEN; + attr |= _A_HIDDEN; if (attrib & PM_FILE_SYSTEM) - attr |= _A_SYSTEM; + attr |= _A_SYSTEM; _dos_setfileattr(filename,attr); #endif } @@ -910,7 +910,7 @@ * mapped 1:1 for this memory anyway so we just return the base address. */ if (physAddr < 0x100000L) - return physAddr; + return physAddr; /* Search table of existing mappings to see if we have already mapped * a region of memory that will serve this purpose. We do this because @@ -919,20 +919,20 @@ * more mappings than necessary. */ for (i = 0; i < numMaps; i++) { - if (maps[i].physical == physAddr && maps[i].limit == limit) - return maps[i].linear; - } + if (maps[i].physical == physAddr && maps[i].limit == limit) + return maps[i].linear; + } /* Find a free slot in our physical memory mapping table */ for (i = 0; i < numMaps; i++) { - if (maps[i].limit == 0) - break; - } + if (maps[i].limit == 0) + break; + } if (i == numMaps) { - i = numMaps++; - if (i == MAX_MEMORY_MAPPINGS) - return NULL; - } + i = numMaps++; + if (i == MAX_MEMORY_MAPPINGS) + return NULL; + } /* Round the physical address to a 4Kb boundary and the limit to a * 4Kb-1 boundary before passing the values to DPMI as some extenders @@ -950,7 +950,7 @@ r.x.di = roundedLimit & 0xFFFF; PM_int386(0x31, &r, &r); if (r.x.cflag) - return 0xFFFFFFFFUL; + return 0xFFFFFFFFUL; maps[i].physical = physAddr; maps[i].limit = limit; maps[i].linear = ((ulong)r.x.bx << 16) + r.x.cx + baseOfs; @@ -967,7 +967,7 @@ r.x.dx = linAddr & 0xFFFF; PM_int386(0x31, &r, &r); if (r.x.cflag) - return 0; + return 0; return 1; } @@ -991,7 +991,7 @@ r.x.dx = limit & 0xFFFF; PM_int386(0x31, &r, &r); if (r.x.cflag) - return 0; + return 0; return 1; } @@ -1011,19 +1011,19 @@ * segment). */ if (limit >= 0x10000L) { - r.x.ax = 9; - r.x.bx = sel; - r.x.cx = 0x40F3; - PM_int386(0x31, &r, &r); - } + r.x.ax = 9; + r.x.bx = sel; + r.x.cx = 0x40F3; + PM_int386(0x31, &r, &r); + } /* Map physical memory and create selector */ if ((base = DPMI_mapPhysicalToLinear(base,limit)) == 0xFFFFFFFFUL) - return 0; + return 0; if (!DPMI_setSelectorBase(sel,base)) - return 0; + return 0; if (!DPMI_setSelectorLimit(sel,limit)) - return 0; + return 0; return sel; } @@ -1083,39 +1083,39 @@ andMask = ~0x18; orMask = (isCached) ? 0x00 : 0x18; if (_PM_pagingEnabled() == 1 && (PDB = _PM_getPDB()) != 0) { - if (_PM_haveCauseWay) { - /* CauseWay is a little different in the page table handling. - * The code that we use for DOS4G/W does not appear to work - * with CauseWay correctly as it does not appear to allow us - * to map the page tables directly. Instead we can directly - * access the page table entries in extended memory where - * CauseWay always locates them (starting at 1024*4096*1023) - */ - startPage = (linear >> 12); - endPage = ((linear+limit) >> 12); - pPageTable = (ulong*)CW_PAGE_TABLE_START; - for (iPage = startPage; iPage <= endPage; iPage++) - pPageTable[iPage] = (pPageTable[iPage] & andMask) | orMask; - } - else { - pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF); - if (pPDB) { - startPDB = (linear >> 22) & 0x3FF; - startPage = (linear >> 12) & 0x3FF; - endPDB = ((linear+limit) >> 22) & 0x3FF; - endPage = ((linear+limit) >> 12) & 0x3FF; - for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { - pageTable = pPDB[iPDB] & ~0xFFF; - pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF); - start = (iPDB == startPDB) ? startPage : 0; - end = (iPDB == endPDB) ? endPage : 0x3FF; - for (iPage = start; iPage <= end; iPage++) - pPageTable[iPage] = (pPageTable[iPage] & andMask) | orMask; - } - } - } - PM_flushTLB(); - } + if (_PM_haveCauseWay) { + /* CauseWay is a little different in the page table handling. + * The code that we use for DOS4G/W does not appear to work + * with CauseWay correctly as it does not appear to allow us + * to map the page tables directly. Instead we can directly + * access the page table entries in extended memory where + * CauseWay always locates them (starting at 1024*4096*1023) + */ + startPage = (linear >> 12); + endPage = ((linear+limit) >> 12); + pPageTable = (ulong*)CW_PAGE_TABLE_START; + for (iPage = startPage; iPage <= endPage; iPage++) + pPageTable[iPage] = (pPageTable[iPage] & andMask) | orMask; + } + else { + pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF); + if (pPDB) { + startPDB = (linear >> 22) & 0x3FF; + startPage = (linear >> 12) & 0x3FF; + endPDB = ((linear+limit) >> 22) & 0x3FF; + endPage = ((linear+limit) >> 12) & 0x3FF; + for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { + pageTable = pPDB[iPDB] & ~0xFFF; + pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF); + start = (iPDB == startPDB) ? startPage : 0; + end = (iPDB == endPDB) ? endPage : 0x3FF; + for (iPage = start; iPage <= end; iPage++) + pPageTable[iPage] = (pPageTable[iPage] & andMask) | orMask; + } + } + } + PM_flushTLB(); + } #endif } @@ -1129,28 +1129,28 @@ PM_segread(&sregs); DSBaseAddr = DPMI_getSelectorBase(sregs.ds); if ((base < 0x100000) && (DSBaseAddr == 0)) { - /* DS is zero based, so we can directly access the first 1Mb of - * system memory (like under DOS4GW). - */ - return (void*)base; - } + /* DS is zero based, so we can directly access the first 1Mb of + * system memory (like under DOS4GW). + */ + return (void*)base; + } /* Map the memory to a linear address using DPMI function 0x800 */ if ((linAddr = DPMI_mapPhysicalToLinear(base,limit)) == 0xFFFFFFFF) { - if (base >= 0x100000) - return NULL; - /* If the linear address mapping fails but we are trying to - * map an area in the first 1Mb of system memory, then we must - * be running under a Windows or OS/2 DOS box. Under these - * environments we can use the segment wrap around as a fallback - * measure, as this does work properly. - */ - linAddr = base; - } + if (base >= 0x100000) + return NULL; + /* If the linear address mapping fails but we are trying to + * map an area in the first 1Mb of system memory, then we must + * be running under a Windows or OS/2 DOS box. Under these + * environments we can use the segment wrap around as a fallback + * measure, as this does work properly. + */ + linAddr = base; + } /* Now expand the default DS selector to 4Gb so we can access it */ if (!DPMI_setSelectorLimit(sregs.ds,0xFFFFFFFFUL)) - return NULL; + return NULL; /* Finally enable caching for the page tables that we just mapped in, * since DOS4GW and PMODE/W create the page table entries without @@ -1162,7 +1162,7 @@ * caching) so that MMIO register regions do not screw up. */ if (DSBaseAddr == 0) - PM_adjustPageTables(linAddr,limit,isCached); + PM_adjustPageTables(linAddr,limit,isCached); /* Now return the base address of the memory into the default DS */ return (void*)(linAddr - DSBaseAddr); @@ -1192,10 +1192,10 @@ uint oldSeg,oldOff; if (!crPtr) { - /* Allocate and copy the memory block only once */ - crPtr = PM_allocRealSeg(sizeof(int6AHandler), &crRSeg, &crROff); - memcpy(crPtr,int6AHandler,sizeof(int6AHandler)); - } + /* Allocate and copy the memory block only once */ + crPtr = PM_allocRealSeg(sizeof(int6AHandler), &crRSeg, &crROff); + memcpy(crPtr,int6AHandler,sizeof(int6AHandler)); + } PM_setWord(crPtr,off); /* Plug in address to call */ PM_setWord(crPtr+2,seg); p = PM_mapRealPointer(0,0x6A * 4); @@ -1234,14 +1234,14 @@ * helper VxD services to allocate the memory that we need. */ if (VXD_version) { - memset(®s,0,sizeof(regs)); - regs.eax = API_NUM(PMHELP_ALLOCLOCKED); - regs.ebx = size; - regs.ecx = (ulong)physAddr; - regs.edx = contiguous | (below16Meg << 8); - _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); - return (void*)regs.eax; - } + memset(®s,0,sizeof(regs)); + regs.eax = API_NUM(PMHELP_ALLOCLOCKED); + regs.ebx = size; + regs.ecx = (ulong)physAddr; + regs.edx = contiguous | (below16Meg << 8); + _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); + return (void*)regs.eax; + } /* If the memory is not contiguous, we simply need to allocate it * using regular memory allocation services, and lock it down @@ -1257,19 +1257,19 @@ * size rounded up to the next 4K boundary. */ if (!contiguous) - p = PM_malloc(roundedSize); + p = PM_malloc(roundedSize); else #endif - p = PM_allocRealSeg(roundedSize,&r_seg,&r_off); + p = PM_allocRealSeg(roundedSize,&r_seg,&r_off); if (p == NULL) - return NULL; + return NULL; roundedP = (void*)(((ulong)p + 0xFFF) & ~0xFFF); *((ulong*)(roundedP + size)) = (ulong)p; PM_lockDataPages(roundedP,size,&lh); if ((*physAddr = PM_getPhysicalAddr(roundedP)) == 0xFFFFFFFF) { - PM_freeLockedMem(roundedP,size,contiguous); - return NULL; - } + PM_freeLockedMem(roundedP,size,contiguous); + return NULL; + } /* Disable caching for the memory since it is probably a DMA buffer */ #ifndef REALMODE @@ -1289,22 +1289,22 @@ PM_lockHandle lh; /* Unused in DOS */ if (!p) - return; + return; if (VXD_version) { - memset(®s,0,sizeof(regs)); - regs.eax = API_NUM(PMHELP_FREELOCKED); - regs.ebx = (ulong)p; - regs.ecx = size; - regs.edx = contiguous; - _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); - return; - } + memset(®s,0,sizeof(regs)); + regs.eax = API_NUM(PMHELP_FREELOCKED); + regs.ebx = (ulong)p; + regs.ecx = size; + regs.edx = contiguous; + _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); + return; + } PM_unlockDataPages(p,size,&lh); if (!contiguous) - free(*((void**)((uchar*)p + size))); + free(*((void**)((uchar*)p + size))); else #endif - PM_freeRealSeg(*((void**)((char*)p + size))); + PM_freeRealSeg(*((void**)((char*)p + size))); } #ifndef REALMODE @@ -1321,11 +1321,11 @@ /* Allocate memory for the new page block, and add to head of list */ size = PAGES_PER_BLOCK * PM_PAGE_SIZE + (PM_PAGE_SIZE-1) + sizeof(pageblock); if ((newBlock = PM_malloc(size)) == NULL) - return NULL; + return NULL; newBlock->prev = NULL; newBlock->next = pageBlocks; if (pageBlocks) - pageBlocks->prev = newBlock; + pageBlocks->prev = newBlock; pageBlocks = newBlock; /* Initialise the page aligned free list for the page block */ @@ -1334,7 +1334,7 @@ newBlock->freeListStart = newBlock->freeList; newBlock->freeListEnd = p + (PAGES_PER_BLOCK-1) * PM_PAGE_SIZE; for (i = 0; i < PAGES_PER_BLOCK; i++,p = next) - FREELIST_NEXT(p) = next = p + PM_PAGE_SIZE; + FREELIST_NEXT(p) = next = p + PM_PAGE_SIZE; FREELIST_NEXT(p - PM_PAGE_SIZE) = NULL; return newBlock; } @@ -1355,27 +1355,27 @@ /* Call the helper VxD for this service if we are running in a DOS box */ if (VXD_version) { - memset(®s,0,sizeof(regs)); - regs.eax = API_NUM(PMHELP_ALLOCPAGE); - regs.ebx = locked; - _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); - return (void*)regs.eax; - } + memset(®s,0,sizeof(regs)); + regs.eax = API_NUM(PMHELP_ALLOCPAGE); + regs.ebx = locked; + _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); + return (void*)regs.eax; + } /* Scan the block list looking for any free blocks. Allocate a new * page block if no free blocks are found. */ for (block = pageBlocks; block != NULL; block = block->next) { - if (block->freeCount) - break; - } + if (block->freeCount) + break; + } if (block == NULL && (block = PM_addNewPageBlock()) == NULL) - return NULL; + return NULL; block->freeCount--; p = block->freeList; block->freeList = FREELIST_NEXT(p); if (locked) - PM_lockDataPages(p,PM_PAGE_SIZE,&lh); + PM_lockDataPages(p,PM_PAGE_SIZE,&lh); return p; #else return NULL; @@ -1395,42 +1395,42 @@ /* Call the helper VxD for this service if we are running in a DOS box */ if (VXD_version) { - memset(®s,0,sizeof(regs)); - regs.eax = API_NUM(PMHELP_FREEPAGE); - regs.ebx = (ulong)p; - _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); - return; - } + memset(®s,0,sizeof(regs)); + regs.eax = API_NUM(PMHELP_FREEPAGE); + regs.ebx = (ulong)p; + _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); + return; + } /* First find the page block that this page belongs to */ for (block = pageBlocks; block != NULL; block = block->next) { - if (p >= block->freeListStart && p <= block->freeListEnd) - break; - } + if (p >= block->freeListStart && p <= block->freeListEnd) + break; + } CHECK(block != NULL); /* Now free the block by adding it to the free list */ FREELIST_NEXT(p) = block->freeList; block->freeList = p; if (++block->freeCount == PAGES_PER_BLOCK) { - /* If all pages in the page block are now free, free the entire - * page block itself. - */ - if (block == pageBlocks) { - /* Delete from head */ - pageBlocks = block->next; - if (block->next) - block->next->prev = NULL; - } - else { - /* Delete from middle of list */ - CHECK(block->prev != NULL); - block->prev->next = block->next; - if (block->next) - block->next->prev = block->prev; - } - PM_free(block); - } + /* If all pages in the page block are now free, free the entire + * page block itself. + */ + if (block == pageBlocks) { + /* Delete from head */ + pageBlocks = block->next; + if (block->next) + block->next->prev = NULL; + } + else { + /* Delete from middle of list */ + CHECK(block->prev != NULL); + block->prev->next = block->next; + if (block->next) + block->next->prev = block->prev; + } + PM_free(block); + } #else (void)p; #endif @@ -1444,7 +1444,7 @@ #ifndef MK_FP #define MK_FP(s,o) ( (void far *)( ((ulong)(s) << 16) + \ - (ulong)(o) )) + (ulong)(o) )) #endif void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off) @@ -1534,7 +1534,7 @@ void * PMAPI PM_getBIOSPointer(void) { if (!zeroPtr) - zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); + zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); return (void*)(zeroPtr + 0x400); } @@ -1542,7 +1542,7 @@ { static void *bankPtr; if (!bankPtr) - bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); + bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); return bankPtr; } @@ -1561,16 +1561,16 @@ * running at ring 0 (ie: under real DOS). */ if (VXD_version == -1) - PM_init(); + PM_init(); if (VXD_version) { - memset(®s,0,sizeof(regs)); - regs.eax = API_NUM(PMHELP_MAPPHYS); - regs.ebx = base; - regs.ecx = limit; - regs.edx = isCached; - _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); - return (void*)regs.eax; - } + memset(®s,0,sizeof(regs)); + regs.eax = API_NUM(PMHELP_MAPPHYS); + regs.ebx = base; + regs.ecx = limit; + regs.edx = isCached; + _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); + return (void*)regs.eax; + } /* Round the physical address to a 4Kb boundary and the limit to a * 4Kb-1 boundary before passing the values to TNT. If we round the @@ -1583,15 +1583,15 @@ _dx_config_inf(&config, (UCHAR*)&config); err = _dx_map_phys(config.c_ds_sel,baseAddr,(newLimit + 4095) / 4096,&offset); if (err == 130) { - /* If the TNT function failed, we are running in a DPMI environment - * and this function does not work. However we know how to handle - * DPMI properly, so we use our generic DPMI functions to do - * what the TNT runtime libraries can't. - */ - return DPMI_mapPhysicalAddr(base,limit,isCached); - } + /* If the TNT function failed, we are running in a DPMI environment + * and this function does not work. However we know how to handle + * DPMI properly, so we use our generic DPMI functions to do + * what the TNT runtime libraries can't. + */ + return DPMI_mapPhysicalAddr(base,limit,isCached); + } if (err == 0) - return (void*)(offset + baseOfs); + return (void*)(offset + baseOfs); return NULL; } @@ -1611,7 +1611,7 @@ void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off) { if (!zeroPtr) - zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF); + zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF); return (void*)(zeroPtr + MK_PHYS(r_seg,r_off)); } @@ -1621,7 +1621,7 @@ void *p; if (_dx_real_alloc((size + 0xF) >> 4,&addr,&t) != 0) - return 0; + return 0; *r_seg = addr; /* Real mode segment address */ *r_off = 0; /* Real mode segment offset */ p = PM_mapRealPointer(*r_seg,*r_off); @@ -1732,7 +1732,7 @@ r.x.bx = (size + 0xF) >> 4; /* Number of paragraphs to allocate */ PM_int386(0x21, &r, &r); /* Call DOS extender */ if (r.x.cflag) - return 0; /* Could not allocate the memory */ + return 0; /* Could not allocate the memory */ *r_seg = r.e.eax; *r_off = 0; return PM_mapRealPointer(*r_seg,*r_off); @@ -1828,19 +1828,19 @@ * running at ring 0 (ie: under real DOS). */ if (VXD_version == -1) - PM_init(); + PM_init(); if (VXD_version) { - memset(®s,0,sizeof(regs)); - regs.eax = API_NUM(PMHELP_MAPPHYS); - regs.ebx = base; - regs.ecx = limit; - regs.edx = isCached; - _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); - return (void*)regs.eax; - } + memset(®s,0,sizeof(regs)); + regs.eax = API_NUM(PMHELP_MAPPHYS); + regs.ebx = base; + regs.ecx = limit; + regs.edx = isCached; + _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); + return (void*)regs.eax; + } if (base > 0x100000) - return _x386_map_physical_address((void*)base,limit); + return _x386_map_physical_address((void*)base,limit); return (void*)((ulong)_x386_zero_base_ptr + base); } @@ -1872,7 +1872,7 @@ /* Get physical memory available */ *physical = _X32_getPhysMem(); if (*physical > *total) - *physical = *total; + *physical = *total; } #endif @@ -1908,16 +1908,16 @@ * running at ring 0 (ie: under real DOS). */ if (VXD_version == -1) - PM_init(); + PM_init(); if (VXD_version) { - memset(®s,0,sizeof(regs)); - regs.eax = API_NUM(PMHELP_MAPPHYS); - regs.ebx = base; - regs.ecx = limit; - regs.edx = isCached; - _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); - return (void*)regs.eax; - } + memset(®s,0,sizeof(regs)); + regs.eax = API_NUM(PMHELP_MAPPHYS); + regs.ebx = base; + regs.ecx = limit; + regs.edx = isCached; + _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); + return (void*)regs.eax; + } return DPMI_mapPhysicalAddr(base,limit,isCached); } @@ -1932,7 +1932,7 @@ { ulong physAddr; if (!PM_getPhysicalAddrRange(p,1,&physAddr)) - return 0xFFFFFFFF; + return 0xFFFFFFFF; return physAddr | ((ulong)p & 0xFFF); } @@ -1950,14 +1950,14 @@ * helper VxD services to find the physical address of an address. */ if (VXD_version) { - memset(®s,0,sizeof(regs)); - regs.eax = API_NUM(PMHELP_GETPHYSICALADDRRANGE); - regs.ebx = (ulong)p; - regs.ecx = (ulong)length; - regs.edx = (ulong)physAddress; - _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); - return regs.eax; - } + memset(®s,0,sizeof(regs)); + regs.eax = API_NUM(PMHELP_GETPHYSICALADDRRANGE); + regs.ebx = (ulong)p; + regs.ecx = (ulong)length; + regs.edx = (ulong)physAddress; + _PM_VxDCall(®s,_PM_VXD_off,_PM_VXD_sel); + return regs.eax; + } /* Find base address for default DS selector */ PM_segread(&sregs); @@ -1970,38 +1970,38 @@ pte = *((ulong*)p); #ifdef DOS4GW if (_PM_pagingEnabled() == 0) { - int count; - ulong linAddr = (ulong)p; + int count; + ulong linAddr = (ulong)p; - /* When paging is disabled physical=linear */ - for (count = (length+0xFFF) >> 12; count > 0; count--) { - *physAddress++ = linAddr; - linAddr += 4096; - } - return true; - } + /* When paging is disabled physical=linear */ + for (count = (length+0xFFF) >> 12; count > 0; count--) { + *physAddress++ = linAddr; + linAddr += 4096; + } + return true; + } else if ((PDB = _PM_getPDB()) != 0 && DSBaseAddr == 0) { - int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage; - ulong pageTable,*pPageTable,linAddr = (ulong)p; - ulong limit = length-1; + int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage; + ulong pageTable,*pPageTable,linAddr = (ulong)p; + ulong limit = length-1; - pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF); - if (pPDB) { - startPDB = (linAddr >> 22) & 0x3FFL; - startPage = (linAddr >> 12) & 0x3FFL; - endPDB = ((linAddr+limit) >> 22) & 0x3FFL; - endPage = ((linAddr+limit) >> 12) & 0x3FFL; - for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { - pageTable = pPDB[iPDB] & ~0xFFFL; - pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF); - start = (iPDB == startPDB) ? startPage : 0; - end = (iPDB == endPDB) ? endPage : 0x3FFL; - for (iPage = start; iPage <= end; iPage++) - *physAddress++ = (pPageTable[iPage] & ~0xFFF); - } - return true; - } - } + pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF); + if (pPDB) { + startPDB = (linAddr >> 22) & 0x3FFL; + startPage = (linAddr >> 12) & 0x3FFL; + endPDB = ((linAddr+limit) >> 22) & 0x3FFL; + endPage = ((linAddr+limit) >> 12) & 0x3FFL; + for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { + pageTable = pPDB[iPDB] & ~0xFFFL; + pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF); + start = (iPDB == startPDB) ? startPage : 0; + end = (iPDB == endPDB) ? endPage : 0x3FFL; + for (iPage = start; iPage <= end; iPage++) + *physAddress++ = (pPageTable[iPage] & ~0xFFF); + } + return true; + } + } #endif return false; } @@ -2017,7 +2017,7 @@ static uchar *zeroPtr = NULL; if (!zeroPtr) - zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); + zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); return (void*)(zeroPtr + MK_PHYS(r_seg,r_off)); } @@ -2030,7 +2030,7 @@ r.x.bx = (size + 0xF) >> 4; /* number of paragraphs */ PM_int386(0x31, &r, &r); if (r.x.cflag) - return NULL; /* DPMI call failed */ + return NULL; /* DPMI call failed */ *r_seg = r.x.ax; /* Real mode segment */ *r_off = 0; p = PM_mapRealPointer(*r_seg,*r_off); @@ -2043,10 +2043,10 @@ PMREGS r; if (mem) { - r.x.ax = 0x101; /* DPMI free DOS memory */ - r.x.dx = _PM_findRealModeBlock(mem);/* DX := selector from 0x100 */ - PM_int386(0x31, &r, &r); - } + r.x.ax = 0x101; /* DPMI free DOS memory */ + r.x.dx = _PM_findRealModeBlock(mem);/* DX := selector from 0x100 */ + PM_int386(0x31, &r, &r); + } } static DPMI_handler_t DPMI_int10 = NULL; @@ -2062,9 +2062,9 @@ PMSREGS sr; if (intno == 0x10 && DPMI_int10) { - if (DPMI_int10(regs)) - return; - } + if (DPMI_int10(regs)) + return; + } PM_segread(&sr); r.x.ax = 0x300; /* DPMI issue real interrupt */ r.h.bl = intno; @@ -2116,17 +2116,17 @@ #pragma pack(1) typedef struct { - uint LargestBlockAvail; - uint MaxUnlockedPage; - uint LargestLockablePage; - uint LinAddrSpace; - uint NumFreePagesAvail; - uint NumPhysicalPagesFree; - uint TotalPhysicalPages; - uint FreeLinAddrSpace; - uint SizeOfPageFile; - uint res[3]; - } MemInfo; + uint LargestBlockAvail; + uint MaxUnlockedPage; + uint LargestLockablePage; + uint LinAddrSpace; + uint NumFreePagesAvail; + uint NumPhysicalPagesFree; + uint TotalPhysicalPages; + uint FreeLinAddrSpace; + uint SizeOfPageFile; + uint res[3]; + } MemInfo; #pragma pack() @@ -2144,7 +2144,7 @@ *physical = memInfo.NumPhysicalPagesFree * 4096; *total = memInfo.LargestBlockAvail; if (*total < *physical) - *physical = *total; + *physical = *total; } #endif @@ -2212,7 +2212,7 @@ uint PMAPI PM_getFileAttr( const char *filename) { - // TODO: Implement this! + /* TODO: Implement this! */ return 0; } @@ -2225,7 +2225,7 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this! + /* TODO: Implement this! */ return false; } @@ -2238,6 +2238,6 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this! + /* TODO: Implement this! */ return false; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c b/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c index 74f8427..eecc2da 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c +++ b/board/MAI/bios_emulator/scitech/src/pm/dos/pmdos.c @@ -160,47 +160,47 @@ regs.x.ax = hardReset ? 0 : 33; PM_int86(0x33, ®s, ®s); if (oldHandler) - PM_setMouseHandler(_PM_mouseMask, oldHandler); + PM_setMouseHandler(_PM_mouseMask, oldHandler); } void PMAPI PM_setRealTimeClockFrequency(int frequency) { static short convert[] = { - 8192, - 4096, - 2048, - 1024, - 512, - 256, - 128, - 64, - 32, - 16, - 8, - 4, - 2, - -1, - }; + 8192, + 4096, + 2048, + 1024, + 512, + 256, + 128, + 64, + 32, + 16, + 8, + 4, + 2, + -1, + }; int i; /* First clear any pending RTC timeout if not cleared */ _PM_readCMOS(0x0C); if (frequency == 0) { - /* Disable RTC timout */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F); - } + /* Disable RTC timout */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F); + } else { - /* Convert frequency value to RTC clock indexes */ - for (i = 0; convert[i] != -1; i++) { - if (convert[i] == frequency) - break; - } + /* Convert frequency value to RTC clock indexes */ + for (i = 0; convert[i] != -1; i++) { + if (convert[i] == frequency) + break; + } - /* Set RTC timout value and enable timeout */ - _PM_writeCMOS(0x0A,0x20 | (i+3)); - _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40); - } + /* Set RTC timout value and enable timeout */ + _PM_writeCMOS(0x0A,0x20 | (i+3)); + _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40); + } } #ifndef REALMODE @@ -216,18 +216,18 @@ * under real mode. */ if (!locked) { - PM_saveDS(); - stat = !PM_lockDataPages(&globalDataStart-2048,4096,&lh); - stat |= !PM_lockDataPages(&_PM_pmdosDataStart,(int)&_PM_pmdosDataEnd - (int)&_PM_pmdosDataStart,&lh); - stat |= !PM_lockCodePages((__codePtr)_PM_pmdosCodeStart,(int)_PM_pmdosCodeEnd-(int)_PM_pmdosCodeStart,&lh); - stat |= !PM_lockDataPages(&_PM_DMADataStart,(int)&_PM_DMADataEnd - (int)&_PM_DMADataStart,&lh); - stat |= !PM_lockCodePages((__codePtr)_PM_DMACodeStart,(int)_PM_DMACodeEnd-(int)_PM_DMACodeStart,&lh); - if (stat) { - printf("Page locking services failed - interrupt handling not safe!\n"); - exit(1); - } - locked = 1; - } + PM_saveDS(); + stat = !PM_lockDataPages(&globalDataStart-2048,4096,&lh); + stat |= !PM_lockDataPages(&_PM_pmdosDataStart,(int)&_PM_pmdosDataEnd - (int)&_PM_pmdosDataStart,&lh); + stat |= !PM_lockCodePages((__codePtr)_PM_pmdosCodeStart,(int)_PM_pmdosCodeEnd-(int)_PM_pmdosCodeStart,&lh); + stat |= !PM_lockDataPages(&_PM_DMADataStart,(int)&_PM_DMADataEnd - (int)&_PM_DMADataStart,&lh); + stat |= !PM_lockCodePages((__codePtr)_PM_DMACodeStart,(int)_PM_DMACodeEnd-(int)_PM_DMACodeStart,&lh); + if (stat) { + printf("Page locking services failed - interrupt handling not safe!\n"); + exit(1); + } + locked = 1; + } } #endif @@ -240,7 +240,7 @@ #ifndef MK_FP #define MK_FP(s,o) ( (void far *)( ((ulong)(s) << 16) + \ - (ulong)(o) )) + (ulong)(o) )) #endif int PMAPI PM_setMouseHandler(int mask, PM_mouseHandler mh) @@ -256,10 +256,10 @@ union REGS regs; if (_PM_mouseHandler) { - regs.x.ax = 33; - int86(0x33, ®s, ®s); - _PM_mouseHandler = NULL; - } + regs.x.ax = 33; + int86(0x33, ®s, ®s); + _PM_mouseHandler = NULL; + } } void PMAPI PM_setTimerHandler(PM_intHandler th) @@ -272,9 +272,9 @@ void PMAPI PM_restoreTimerHandler(void) { if (_PM_timerHandler) { - _PM_setRMvect(0x8, (long)_PM_prevTimer); - _PM_timerHandler = NULL; - } + _PM_setRMvect(0x8, (long)_PM_prevTimer); + _PM_timerHandler = NULL; + } } ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency) @@ -300,15 +300,15 @@ void PMAPI PM_restoreRealTimeClockHandler(void) { if (_PM_rtcHandler) { - /* Restore CMOS registers and mask RTC clock */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); - PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); + /* Restore CMOS registers and mask RTC clock */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); + PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); - /* Restore the interrupt vector */ - _PM_setRMvect(0x70, (long)_PM_prevRTC); - _PM_rtcHandler = NULL; - } + /* Restore the interrupt vector */ + _PM_setRMvect(0x70, (long)_PM_prevRTC); + _PM_rtcHandler = NULL; + } } void PMAPI PM_setKeyHandler(PM_intHandler kh) @@ -321,9 +321,9 @@ void PMAPI PM_restoreKeyHandler(void) { if (_PM_keyHandler) { - _PM_setRMvect(0x9, (long)_PM_prevKey); - _PM_keyHandler = NULL; - } + _PM_setRMvect(0x9, (long)_PM_prevKey); + _PM_keyHandler = NULL; + } } void PMAPI PM_setKey15Handler(PM_key15Handler kh) @@ -336,9 +336,9 @@ void PMAPI PM_restoreKey15Handler(void) { if (_PM_key15Handler) { - _PM_setRMvect(0x15, (long)_PM_prevKey15); - _PM_key15Handler = NULL; - } + _PM_setRMvect(0x15, (long)_PM_prevKey15); + _PM_key15Handler = NULL; + } } void PMAPI PM_installAltBreakHandler(PM_breakHandler bh) @@ -362,11 +362,11 @@ void PMAPI PM_restoreBreakHandler(void) { if (_PM_prevBreak) { - _PM_setRMvect(0x1B, (long)_PM_prevBreak); - _PM_setRMvect(0x23, (long)_PM_prevCtrlC); - _PM_prevBreak = NULL; - _PM_breakHandler = NULL; - } + _PM_setRMvect(0x1B, (long)_PM_prevBreak); + _PM_setRMvect(0x23, (long)_PM_prevCtrlC); + _PM_prevBreak = NULL; + _PM_breakHandler = NULL; + } } void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch) @@ -387,10 +387,10 @@ void PMAPI PM_restoreCriticalHandler(void) { if (_PM_prevCritical) { - _PM_setRMvect(0x24, (long)_PM_prevCritical); - _PM_prevCritical = NULL; - _PM_critHandler = NULL; - } + _PM_setRMvect(0x24, (long)_PM_prevCritical); + _PM_prevCritical = NULL; + _PM_critHandler = NULL; + } } int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh) @@ -499,7 +499,7 @@ /* Copy the real mode handler to real mode memory */ if ((p = PM_allocRealSeg(sizeof(realHandler),rseg,roff)) == NULL) - return NULL; + return NULL; memcpy(p,realHandler,sizeof(realHandler)); /* Skip past global variabls in real mode code segment */ @@ -516,7 +516,7 @@ lockPMHandlers(); /* Ensure our handlers are locked */ if ((mousePtr = installCallback(_PM_mouseISR, &rseg, &roff)) == NULL) - return 0; + return 0; _PM_mouseHandler = mh; /* Install the real mode mouse handler */ @@ -533,11 +533,11 @@ RMREGS regs; if (_PM_mouseHandler) { - regs.x.ax = 33; - PM_int86(0x33, ®s, ®s); - PM_freeRealSeg(mousePtr); - _PM_mouseHandler = NULL; - } + regs.x.ax = 33; + PM_int86(0x33, ®s, ®s); + PM_freeRealSeg(mousePtr); + _PM_mouseHandler = NULL; + } } void PMAPI PM_getPMvect(int intno, PMFARPTR *isr) @@ -602,9 +602,9 @@ void PMAPI PM_restoreTimerHandler(void) { if (_PM_timerHandler) { - restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer); - _PM_timerHandler = NULL; - } + restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer); + _PM_timerHandler = NULL; + } } ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency) @@ -630,15 +630,15 @@ void PMAPI PM_restoreRealTimeClockHandler(void) { if (_PM_rtcHandler) { - /* Restore CMOS registers and mask RTC clock */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); - PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); + /* Restore CMOS registers and mask RTC clock */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); + PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); - /* Restore the interrupt vector */ - restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC); - _PM_rtcHandler = NULL; - } + /* Restore the interrupt vector */ + restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC); + _PM_rtcHandler = NULL; + } } void PMAPI PM_setKeyHandler(PM_intHandler kh) @@ -651,9 +651,9 @@ void PMAPI PM_restoreKeyHandler(void) { if (_PM_keyHandler) { - restoreISR(0x9, _PM_prevKey, _PM_prevRealKey); - _PM_keyHandler = NULL; - } + restoreISR(0x9, _PM_prevKey, _PM_prevRealKey); + _PM_keyHandler = NULL; + } } void PMAPI PM_setKey15Handler(PM_key15Handler kh) @@ -666,9 +666,9 @@ void PMAPI PM_restoreKey15Handler(void) { if (_PM_key15Handler) { - restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15); - _PM_key15Handler = NULL; - } + restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15); + _PM_key15Handler = NULL; + } } void PMAPI PM_installAltBreakHandler(PM_breakHandler bh) @@ -692,11 +692,11 @@ void PMAPI PM_restoreBreakHandler(void) { if (_PM_prevBreak.sel) { - restoreISR(0x1B, _PM_prevBreak, prevRealBreak); - restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC); - _PM_prevBreak.sel = 0; - _PM_breakHandler = NULL; - } + restoreISR(0x1B, _PM_prevBreak, prevRealBreak); + restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC); + _PM_prevBreak.sel = 0; + _PM_breakHandler = NULL; + } } void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch) @@ -717,10 +717,10 @@ void PMAPI PM_restoreCriticalHandler(void) { if (_PM_prevCritical.sel) { - restoreISR(0x24, _PM_prevCritical, prevRealCritical); - _PM_prevCritical.sel = 0; - _PM_critHandler = NULL; - } + restoreISR(0x24, _PM_prevCritical, prevRealCritical); + _PM_prevCritical.sel = 0; + _PM_critHandler = NULL; + } } int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh) @@ -816,9 +816,9 @@ * buffer once since we cant dealloate it with X32). */ if (*psel == 0) { - if (!PM_allocRealSeg(sizeof(realHandler),psel,poff,rseg,roff)) - return 0; - } + if (!PM_allocRealSeg(sizeof(realHandler),psel,poff,rseg,roff)) + return 0; + } PM_memcpyfn(*psel,*poff,realHandler,sizeof(realHandler)); /* Skip past global variables in real mode code segment */ @@ -835,7 +835,7 @@ lockPMHandlers(); /* Ensure our handlers are locked */ if (!installCallback(_PM_mouseISR, &mouseSel, &mouseOff, &rseg, &roff)) - return 0; + return 0; _PM_mouseHandler = mh; /* Install the real mode mouse handler */ @@ -852,10 +852,10 @@ RMREGS regs; if (_PM_mouseHandler) { - regs.x.ax = 33; - PM_int86(0x33, ®s, ®s); - _PM_mouseHandler = NULL; - } + regs.x.ax = 33; + PM_int86(0x33, ®s, ®s); + _PM_mouseHandler = NULL; + } } void PMAPI PM_getPMvect(int intno, PMFARPTR *isr) @@ -941,9 +941,9 @@ void PMAPI PM_restoreTimerHandler(void) { if (_PM_timerHandler) { - restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer); - _PM_timerHandler = NULL; - } + restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer); + _PM_timerHandler = NULL; + } } ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency) @@ -969,15 +969,15 @@ void PMAPI PM_restoreRealTimeClockHandler(void) { if (_PM_rtcHandler) { - /* Restore CMOS registers and mask RTC clock */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); - PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); + /* Restore CMOS registers and mask RTC clock */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); + PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); - /* Restore the interrupt vector */ - restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC); - _PM_rtcHandler = NULL; - } + /* Restore the interrupt vector */ + restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC); + _PM_rtcHandler = NULL; + } } void PMAPI PM_setKeyHandler(PM_intHandler kh) @@ -990,9 +990,9 @@ void PMAPI PM_restoreKeyHandler(void) { if (_PM_keyHandler) { - restoreISR(0x9, _PM_prevKey, _PM_prevRealKey); - _PM_keyHandler = NULL; - } + restoreISR(0x9, _PM_prevKey, _PM_prevRealKey); + _PM_keyHandler = NULL; + } } void PMAPI PM_setKey15Handler(PM_key15Handler kh) @@ -1005,9 +1005,9 @@ void PMAPI PM_restoreKey15Handler(void) { if (_PM_key15Handler) { - restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15); - _PM_key15Handler = NULL; - } + restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15); + _PM_key15Handler = NULL; + } } void PMAPI PM_installAltBreakHandler(PM_breakHandler bh) @@ -1031,11 +1031,11 @@ void PMAPI PM_restoreBreakHandler(void) { if (_PM_prevBreak.sel) { - restoreISR(0x1B, _PM_prevBreak, prevRealBreak); - restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC); - _PM_prevBreak.sel = 0; - _PM_breakHandler = NULL; - } + restoreISR(0x1B, _PM_prevBreak, prevRealBreak); + restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC); + _PM_prevBreak.sel = 0; + _PM_breakHandler = NULL; + } } void PMAPI PM_installAltCriticalHandler(PM_criticalHandler ch) @@ -1056,10 +1056,10 @@ void PMAPI PM_restoreCriticalHandler(void) { if (_PM_prevCritical.sel) { - restoreISR(0x24, _PM_prevCritical, prevRealCritical); - _PM_prevCritical.sel = 0; - _PM_critHandler = NULL; - } + restoreISR(0x24, _PM_prevCritical, prevRealCritical); + _PM_prevCritical.sel = 0; + _PM_critHandler = NULL; + } } int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh) @@ -1199,10 +1199,10 @@ PMREGS regs; if (_PM_mouseHandler) { - regs.x.ax = 33; - PM_int386(0x33, ®s, ®s); - _PM_mouseHandler = NULL; - } + regs.x.ax = 33; + PM_int386(0x33, ®s, ®s); + _PM_mouseHandler = NULL; + } } #endif @@ -1288,10 +1288,10 @@ /* Copy the real mode handler to real mode memory */ if ((mousePtr = PM_allocRealSeg(sizeof(mouseHandler),&rseg,&roff)) == NULL) - return 0; + return 0; memcpy(mousePtr,mouseHandler,sizeof(mouseHandler)); if (!_DPMI_allocateCallback(_PM_mousePMCB, mouseRegs, &mouseRMCB)) - PM_fatalError("Unable to allocate real mode callback!\n"); + PM_fatalError("Unable to allocate real mode callback!\n"); PM_setLong(mousePtr,mouseRMCB); /* Install the real mode mouse handler */ @@ -1309,12 +1309,12 @@ RMREGS regs; if (_PM_mouseHandler) { - regs.x.ax = 33; - PM_int86(0x33, ®s, ®s); - PM_freeRealSeg(mousePtr); - _DPMI_freeCallback(mouseRMCB); - _PM_mouseHandler = NULL; - } + regs.x.ax = 33; + PM_int86(0x33, ®s, ®s); + PM_freeRealSeg(mousePtr); + _DPMI_freeCallback(mouseRMCB); + _PM_mouseHandler = NULL; + } } #endif @@ -1347,9 +1347,9 @@ void PMAPI PM_restoreTimerHandler(void) { if (_PM_timerHandler) { - restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer); - _PM_timerHandler = NULL; - } + restoreISR(0x8, _PM_prevTimer, _PM_prevRealTimer); + _PM_timerHandler = NULL; + } } ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency) @@ -1375,15 +1375,15 @@ void PMAPI PM_restoreRealTimeClockHandler(void) { if (_PM_rtcHandler) { - /* Restore CMOS registers and mask RTC clock */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); - PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); + /* Restore CMOS registers and mask RTC clock */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); + PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); - /* Restore the interrupt vector */ - restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC); - _PM_rtcHandler = NULL; - } + /* Restore the interrupt vector */ + restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC); + _PM_rtcHandler = NULL; + } } PM_IRQHandle PMAPI PM_setIRQHandler( @@ -1396,20 +1396,20 @@ thunkSize = (ulong)_PM_irqISRTemplateEnd - (ulong)_PM_irqISRTemplate; if ((handle = PM_malloc(sizeof(_PM_IRQHandle) + thunkSize)) == NULL) - return NULL; + return NULL; handle->IRQ = IRQ; handle->prevPIC = PM_inpb(0x21); handle->prevPIC2 = PM_inpb(0xA1); if (IRQ < 8) { - handle->IRQVect = (IRQ + 8); - PICmask = (1 << IRQ); - chainPrevious = ((handle->prevPIC & PICmask) == 0); - } + handle->IRQVect = (IRQ + 8); + PICmask = (1 << IRQ); + chainPrevious = ((handle->prevPIC & PICmask) == 0); + } else { - handle->IRQVect = (0x60 + IRQ + 8); - PICmask = ((1 << IRQ) | 0x4); - chainPrevious = ((handle->prevPIC2 & (PICmask >> 8)) == 0); - } + handle->IRQVect = (0x60 + IRQ + 8); + PICmask = ((1 << IRQ) | 0x4); + chainPrevious = ((handle->prevPIC2 & (PICmask >> 8)) == 0); + } /* Copy and setup the assembler thunk */ offsetAdjust = (ulong)handle->thunk - (ulong)_PM_irqISRTemplate; @@ -1417,13 +1417,13 @@ *((ulong*)&handle->thunk[2]) = offsetAdjust; *((ulong*)&handle->thunk[11+0]) = (ulong)ih; if (chainPrevious) { - *((ulong*)&handle->thunk[11+4]) = handle->prevHandler.off; - *((ulong*)&handle->thunk[11+8]) = handle->prevHandler.sel; - } + *((ulong*)&handle->thunk[11+4]) = handle->prevHandler.off; + *((ulong*)&handle->thunk[11+8]) = handle->prevHandler.sel; + } else { - *((ulong*)&handle->thunk[11+4]) = 0; - *((ulong*)&handle->thunk[11+8]) = 0; - } + *((ulong*)&handle->thunk[11+4]) = 0; + *((ulong*)&handle->thunk[11+8]) = 0; + } *((ulong*)&handle->thunk[11+12]) = IRQ; /* Set the real time clock interrupt handler */ @@ -1444,9 +1444,9 @@ /* Restore PIC mask for the interrupt */ if (handle->IRQ < 8) - PICmask = (1 << handle->IRQ); + PICmask = (1 << handle->IRQ); else - PICmask = ((1 << handle->IRQ) | 0x4); + PICmask = ((1 << handle->IRQ) | 0x4); PM_outpb(0xA1,(PM_inpb(0xA1) & ~(PICmask >> 8)) | (handle->prevPIC2 & (PICmask >> 8))); PM_outpb(0x21,(PM_inpb(0x21) & ~PICmask) | (handle->prevPIC & PICmask)); @@ -1467,9 +1467,9 @@ void PMAPI PM_restoreKeyHandler(void) { if (_PM_keyHandler) { - restoreISR(0x9, _PM_prevKey, _PM_prevRealKey); - _PM_keyHandler = NULL; - } + restoreISR(0x9, _PM_prevKey, _PM_prevRealKey); + _PM_keyHandler = NULL; + } } void PMAPI PM_setKey15Handler(PM_key15Handler kh) @@ -1482,9 +1482,9 @@ void PMAPI PM_restoreKey15Handler(void) { if (_PM_key15Handler) { - restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15); - _PM_key15Handler = NULL; - } + restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15); + _PM_key15Handler = NULL; + } } /* Real mode Ctrl-C and Ctrl-Break handler. This handler simply sets a @@ -1540,14 +1540,14 @@ void PMAPI PM_restoreBreakHandler(void) { if (_PM_prevBreak.sel) { - restoreISR(0x1B, _PM_prevBreak, prevRealBreak); - restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC); - _PM_prevBreak.sel = 0; - _PM_breakHandler = NULL; + restoreISR(0x1B, _PM_prevBreak, prevRealBreak); + restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC); + _PM_prevBreak.sel = 0; + _PM_breakHandler = NULL; #ifndef DOS4GW - PM_freeRealSeg(_PM_ctrlBPtr); + PM_freeRealSeg(_PM_ctrlBPtr); #endif - } + } } /* Real mode Critical Error handler. This handler simply saves the AX and @@ -1599,11 +1599,11 @@ void PMAPI PM_restoreCriticalHandler(void) { if (_PM_prevCritical.sel) { - restoreISR(0x24, _PM_prevCritical, prevRealCritical); - PM_freeRealSeg(_PM_critPtr); - _PM_prevCritical.sel = 0; - _PM_critHandler = NULL; - } + restoreISR(0x24, _PM_prevCritical, prevRealCritical); + PM_freeRealSeg(_PM_critPtr); + _PM_prevCritical.sel = 0; + _PM_critHandler = NULL; + } } int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh) diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c index 2e78e25..c3e9b6c 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c +++ b/board/MAI/bios_emulator/scitech/src/pm/dos/vflat.c @@ -79,7 +79,7 @@ PMREGS regs; if (haveDPMI) - return true; + return true; /* Check if we are running under DPMI in which case we will not be * able to install our page fault handlers. We can however use the @@ -88,7 +88,7 @@ regs.x.ax = 0xFF00; PM_int386(0x31,®s,®s); if (!regs.x.cflag && (regs.e.edi & 8)) - return (haveDPMI = true); + return (haveDPMI = true); return false; } @@ -101,13 +101,13 @@ ****************************************************************************/ { if (!VF_zeroPtr) - VF_zeroPtr = PM_mapPhysicalAddr(0,0xFFFFFFFF,true); + VF_zeroPtr = PM_mapPhysicalAddr(0,0xFFFFFFFF,true); if (CheckDPMI()) - return false; + return false; /* Standard DOS4GW, PMODE/W and Causeway */ if (InitPaging() == -1) - return false; + return false; ClosePaging(); return true; } @@ -153,21 +153,21 @@ int i; if (InitPaging() == -1) - return NULL; /* Cannot do hardware paging! */ + return NULL; /* Cannot do hardware paging! */ /* Map 4MB of video memory into linear address space (read/write) */ if (bankSize == 64) { - for (i = 0; i < 64; i++) { - MapPhysical2Linear(baseAddr,VFLAT_START_ADDR+(i<<16),16, - PAGE_WRITE | PAGE_NOTPRESENT); - } - } + for (i = 0; i < 64; i++) { + MapPhysical2Linear(baseAddr,VFLAT_START_ADDR+(i<<16),16, + PAGE_WRITE | PAGE_NOTPRESENT); + } + } else { - for (i = 0; i < 1024; i++) { - MapPhysical2Linear(baseAddr,VFLAT_START_ADDR+(i<<12),1, - PAGE_WRITE | PAGE_NOTPRESENT); - } - } + for (i = 0; i < 1024; i++) { + MapPhysical2Linear(baseAddr,VFLAT_START_ADDR+(i<<12),1, + PAGE_WRITE | PAGE_NOTPRESENT); + } + } /* Install our page fault handler and banks switch function */ InstallFaultHandler(baseAddr,bankSize); @@ -191,13 +191,13 @@ ****************************************************************************/ { if (installed) - return (void*)VFLAT_START_ADDR; + return (void*)VFLAT_START_ADDR; if (codeLen > 100) - return NULL; /* Bank function is too large! */ + return NULL; /* Bank function is too large! */ if (!VF_zeroPtr) - VF_zeroPtr = PM_mapPhysicalAddr(0,0xFFFFFFFF,true); + VF_zeroPtr = PM_mapPhysicalAddr(0,0xFFFFFFFF,true); if (CheckDPMI()) - return InitDPMI(baseAddr,bankSize,codeLen,bankFunc); + return InitDPMI(baseAddr,bankSize,codeLen,bankFunc); return InitDOS4GW(baseAddr,bankSize,codeLen,bankFunc); } @@ -212,16 +212,16 @@ ****************************************************************************/ { if (installed) { - if (haveDPMI) { - /* DPMI support */ - } - else { - /* Standard DOS4GW and PMODE/W support */ - RemoveFaultHandler(); - ClosePaging(); - } - installed = false; - } + if (haveDPMI) { + /* DPMI support */ + } + else { + /* Standard DOS4GW and PMODE/W support */ + RemoveFaultHandler(); + ClosePaging(); + } + installed = false; + } } /*-------------------------------------------------------------------------*/ diff --git a/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c index 960ed06..53ab16c 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c +++ b/board/MAI/bios_emulator/scitech/src/pm/dos/ztimer.c @@ -106,6 +106,6 @@ ulong __ULZElapsedTime(ulong start,ulong finish) { if (finish < start) - finish += 1573040L; /* Number of ticks in 24 hours */ + finish += 1573040L; /* Number of ticks in 24 hours */ return finish - start; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/event.c b/board/MAI/bios_emulator/scitech/src/pm/event.c index b284c68..b6f4586 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/event.c @@ -106,8 +106,8 @@ freeList for the event to be inserted. NOTE: Interrupts MUST be OFF while this routine is called to ensure we have - mutually exclusive access to our internal data structures for - interrupt driven systems (like under DOS). + mutually exclusive access to our internal data structures for + interrupt driven systems (like under DOS). ****************************************************************************/ static void addEvent( event_t *evt) @@ -116,35 +116,35 @@ /* Check for mouse double click events */ if (evt->what & EVT_MOUSEEVT) { - EVT.autoMouse_x = evt->where_x; - EVT.autoMouse_y = evt->where_y; - if ((evt->what & EVT_MOUSEDOWN) && !(evt->message & EVT_DBLCLICK)) { - /* Determine if the last mouse event was a double click event */ - uint diff_x = ABS(evt->where_x - EVT.downMouse.where_x); - uint diff_y = ABS(evt->where_y - EVT.downMouse.where_y); - if ((evt->message == EVT.downMouse.message) - && ((evt->when - EVT.downMouse.when) <= EVT.doubleClick) - && (diff_x <= EVT.doubleClickThresh) - && (diff_y <= EVT.doubleClickThresh)) { - evt->message |= EVT_DBLCLICK; - EVT.downMouse = *evt; - EVT.downMouse.when = 0; - } - else - EVT.downMouse = *evt; - EVT.autoTicks = _EVT_getTicks(); - } - else if (evt->what & EVT_MOUSEUP) { - EVT.downMouse.what = EVT_NULLEVT; - EVT.firstAuto = true; - } - } + EVT.autoMouse_x = evt->where_x; + EVT.autoMouse_y = evt->where_y; + if ((evt->what & EVT_MOUSEDOWN) && !(evt->message & EVT_DBLCLICK)) { + /* Determine if the last mouse event was a double click event */ + uint diff_x = ABS(evt->where_x - EVT.downMouse.where_x); + uint diff_y = ABS(evt->where_y - EVT.downMouse.where_y); + if ((evt->message == EVT.downMouse.message) + && ((evt->when - EVT.downMouse.when) <= EVT.doubleClick) + && (diff_x <= EVT.doubleClickThresh) + && (diff_y <= EVT.doubleClickThresh)) { + evt->message |= EVT_DBLCLICK; + EVT.downMouse = *evt; + EVT.downMouse.when = 0; + } + else + EVT.downMouse = *evt; + EVT.autoTicks = _EVT_getTicks(); + } + else if (evt->what & EVT_MOUSEUP) { + EVT.downMouse.what = EVT_NULLEVT; + EVT.firstAuto = true; + } + } /* Call user supplied callback to modify the event if desired */ if (EVT.userEventCallback) { - if (!EVT.userEventCallback(evt)) - return; - } + if (!EVT.userEventCallback(evt)) + return; + } /* Get spot to place the event from the free list */ evtID = EVT.freeHead; @@ -154,9 +154,9 @@ evt->next = -1; evt->prev = EVT.tail; if (EVT.tail != -1) - EVT.evtq[EVT.tail].next = evtID; + EVT.evtq[EVT.tail].next = evtID; else - EVT.head = evtID; + EVT.head = evtID; EVT.tail = evtID; EVT.evtq[evtID] = *evt; EVT.count++; @@ -172,7 +172,7 @@ /* Build free list, and initialize global data structures */ for (i = 0; i < EVENTQSIZE; i++) - EVT.evtq[i].next = i+1; + EVT.evtq[i].next = i+1; EVT.evtq[EVENTQSIZE-1].next = -1; /* Terminate list */ EVT.count = EVT.freeHead = 0; EVT.head = EVT.tail = -1; @@ -217,21 +217,21 @@ /* Make sure the joystick is calibrated properly */ if (EVT.joyCenter[axis] - EVT.joyMin[axis] < 5) - return raw; + return raw; if (EVT.joyMax[axis] - EVT.joyCenter[axis] < 5) - return raw; + return raw; /* Now scale the coordinates to -128 to 127 */ raw -= EVT.joyCenter[axis]; if (raw < 0) - range = EVT.joyCenter[axis]-EVT.joyMin[axis]; + range = EVT.joyCenter[axis]-EVT.joyMin[axis]; else - range = EVT.joyMax[axis]-EVT.joyCenter[axis]; + range = EVT.joyMax[axis]-EVT.joyCenter[axis]; scaled = (raw * 128) / range; if (scaled < -128) - scaled = -128; + scaled = -128; if (scaled > 127) - scaled = 127; + scaled = 127; return scaled; } #endif @@ -308,9 +308,9 @@ #endif mask = _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter); if (mask) { - for (i = 0; i < JOY_NUM_AXES; i++) - EVT.joyMax[i] = EVT.joyCenter[i]*2; - } + for (i = 0; i < JOY_NUM_AXES; i++) + EVT.joyMax[i] = EVT.joyCenter[i]*2; + } return mask; } @@ -329,9 +329,9 @@ queue for later retrieval. Note: Most analogue joysticks will provide readings that change even - though the joystick has not moved. Hence if you call this routine - you will likely get an EVT_JOYMOVE event every time through your - event loop. + though the joystick has not moved. Hence if you call this routine + you will likely get an EVT_JOYMOVE event every time through your + event loop. SEE ALSO: EVT_getNext, EVT_peekNext, EVT_joySetUpperLeft, EVT_joySetLowerRight, @@ -343,68 +343,68 @@ int i,axis[JOY_NUM_AXES],newButState,mask,moved,ps; if (EVT.joyMask) { - /* Read joystick axes and post movement events if they have - * changed since the last time we polled. Until the events are - * actually flushed, we keep modifying the same joystick movement - * event, so you won't get multiple movement event - */ - mask = _EVT_readJoyAxis(EVT.joyMask,axis); - newButState = _EVT_readJoyButtons(); - moved = false; - for (i = 0; i < JOY_NUM_AXES; i++) { - if (mask & (EVT_JOY_AXIS_X1 << i)) - axis[i] = scaleJoyAxis(axis[i],i); - else - axis[i] = EVT.joyPrev[i]; - if (axis[i] != EVT.joyPrev[i]) - moved = true; - } - if (moved) { - memcpy(EVT.joyPrev,axis,sizeof(EVT.joyPrev)); - ps = _EVT_disableInt(); - if (EVT.oldJoyMove != -1) { - /* Modify the existing joystick movement event */ - EVT.evtq[EVT.oldJoyMove].message = newButState; - EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0]; - EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1]; - EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2]; - EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3]; - } - else if (EVT.count < EVENTQSIZE) { - /* Add a new joystick movement event */ - EVT.oldJoyMove = EVT.freeHead; - memset(&evt,0,sizeof(evt)); - evt.what = EVT_JOYMOVE; - evt.message = EVT.joyButState; - evt.where_x = EVT.joyPrev[0]; - evt.where_y = EVT.joyPrev[1]; - evt.relative_x = EVT.joyPrev[2]; - evt.relative_y = EVT.joyPrev[3]; - addEvent(&evt); - } - _EVT_restoreInt(ps); - } + /* Read joystick axes and post movement events if they have + * changed since the last time we polled. Until the events are + * actually flushed, we keep modifying the same joystick movement + * event, so you won't get multiple movement event + */ + mask = _EVT_readJoyAxis(EVT.joyMask,axis); + newButState = _EVT_readJoyButtons(); + moved = false; + for (i = 0; i < JOY_NUM_AXES; i++) { + if (mask & (EVT_JOY_AXIS_X1 << i)) + axis[i] = scaleJoyAxis(axis[i],i); + else + axis[i] = EVT.joyPrev[i]; + if (axis[i] != EVT.joyPrev[i]) + moved = true; + } + if (moved) { + memcpy(EVT.joyPrev,axis,sizeof(EVT.joyPrev)); + ps = _EVT_disableInt(); + if (EVT.oldJoyMove != -1) { + /* Modify the existing joystick movement event */ + EVT.evtq[EVT.oldJoyMove].message = newButState; + EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0]; + EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1]; + EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2]; + EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3]; + } + else if (EVT.count < EVENTQSIZE) { + /* Add a new joystick movement event */ + EVT.oldJoyMove = EVT.freeHead; + memset(&evt,0,sizeof(evt)); + evt.what = EVT_JOYMOVE; + evt.message = EVT.joyButState; + evt.where_x = EVT.joyPrev[0]; + evt.where_y = EVT.joyPrev[1]; + evt.relative_x = EVT.joyPrev[2]; + evt.relative_y = EVT.joyPrev[3]; + addEvent(&evt); + } + _EVT_restoreInt(ps); + } - /* Read the joystick buttons, and post events to reflect the change - * in state for the joystick buttons. - */ - if (newButState != EVT.joyButState) { - if (EVT.count < EVENTQSIZE) { - /* Add a new joystick click event */ - ps = _EVT_disableInt(); - memset(&evt,0,sizeof(evt)); - evt.what = EVT_JOYCLICK; - evt.message = newButState; - EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0]; - EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1]; - EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2]; - EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3]; - addEvent(&evt); - _EVT_restoreInt(ps); - } - EVT.joyButState = newButState; - } - } + /* Read the joystick buttons, and post events to reflect the change + * in state for the joystick buttons. + */ + if (newButState != EVT.joyButState) { + if (EVT.count < EVENTQSIZE) { + /* Add a new joystick click event */ + ps = _EVT_disableInt(); + memset(&evt,0,sizeof(evt)); + evt.what = EVT_JOYCLICK; + evt.message = newButState; + EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0]; + EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1]; + EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2]; + EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3]; + addEvent(&evt); + _EVT_restoreInt(ps); + } + EVT.joyButState = newButState; + } + } } /**************************************************************************** @@ -526,19 +526,19 @@ uint ps; if (EVT.count < EVENTQSIZE) { - /* Save information in event record */ - ps = _EVT_disableInt(); - evt.which = which; - evt.when = _EVT_getTicks(); - evt.what = what; - evt.message = message; - evt.modifiers = modifiers; - addEvent(&evt); /* Add to EVT.tail of event queue */ - _EVT_restoreInt(ps); - return true; - } + /* Save information in event record */ + ps = _EVT_disableInt(); + evt.which = which; + evt.when = _EVT_getTicks(); + evt.what = what; + evt.message = message; + evt.modifiers = modifiers; + addEvent(&evt); /* Add to EVT.tail of event queue */ + _EVT_restoreInt(ps); + return true; + } else - return false; + return false; } /**************************************************************************** @@ -565,8 +565,8 @@ event_t evt; do { /* Flush all events */ - EVT_getNext(&evt,mask); - } while (evt.what != EVT_NULLEVT); + EVT_getNext(&evt,mask); + } while (evt.what != EVT_NULLEVT); } /**************************************************************************** @@ -596,10 +596,10 @@ ulong mask) { do { /* Wait for an event */ - if (mask & (EVT_JOYEVT)) - EVT_pollJoystick(); - EVT_getNext(evt,EVT_EVERYEVT); - } while (!(evt->what & mask)); + if (mask & (EVT_JOYEVT)) + EVT_pollJoystick(); + EVT_getNext(evt,EVT_EVERYEVT); + } while (!(evt->what & mask)); } /**************************************************************************** @@ -636,31 +636,31 @@ uint ps; if (EVT.heartBeat) - EVT.heartBeat(EVT.heartBeatParams); + EVT.heartBeat(EVT.heartBeatParams); _EVT_pumpMessages(); /* Pump all messages into queue */ EVT.mouseMove(EVT.mx,EVT.my); /* Move the mouse cursor */ evt->what = EVT_NULLEVT; /* Default to null event */ if (EVT.count) { - /* It is possible that an event be posted while we are trying - * to access the event queue. This would create problems since - * we may end up with invalid data for our event queue pointers. To - * alleviate this, all interrupts are suspended while we manipulate - * our pointers. - */ - ps = _EVT_disableInt(); /* disable interrupts */ - for (evtID = EVT.head; evtID != -1; evtID = EVT.evtq[evtID].next) { - if (EVT.evtq[evtID].what & mask) - break; /* Found an event */ - } - if (evtID == -1) { - _EVT_restoreInt(ps); - return false; /* Event was not found */ - } - *evt = EVT.evtq[evtID]; /* Return the event */ - _EVT_restoreInt(ps); - if (evt->what & EVT_KEYEVT) - _EVT_maskKeyCode(evt); - } + /* It is possible that an event be posted while we are trying + * to access the event queue. This would create problems since + * we may end up with invalid data for our event queue pointers. To + * alleviate this, all interrupts are suspended while we manipulate + * our pointers. + */ + ps = _EVT_disableInt(); /* disable interrupts */ + for (evtID = EVT.head; evtID != -1; evtID = EVT.evtq[evtID].next) { + if (EVT.evtq[evtID].what & mask) + break; /* Found an event */ + } + if (evtID == -1) { + _EVT_restoreInt(ps); + return false; /* Event was not found */ + } + *evt = EVT.evtq[evtID]; /* Return the event */ + _EVT_restoreInt(ps); + if (evt->what & EVT_KEYEVT) + _EVT_maskKeyCode(evt); + } return evt->what != EVT_NULLEVT; } @@ -696,10 +696,10 @@ of the event will be set to NULLEVT, and the return value will return false. Note: You should /always/ use the EVT_EVERYEVT mask for extracting events - from your main event loop handler. Using a mask for only a specific - type of event for long periods of time will cause the event queue to - fill up with events of the type you are ignoring, eventually causing - the application to hang when the event queue becomes full. + from your main event loop handler. Using a mask for only a specific + type of event for long periods of time will cause the event queue to + fill up with events of the type you are ignoring, eventually causing + the application to hang when the event queue becomes full. SEE ALSO: EVT_flush, EVT_halt, EVT_peekNext @@ -712,68 +712,68 @@ uint ps; if (EVT.heartBeat) - EVT.heartBeat(EVT.heartBeatParams); + EVT.heartBeat(EVT.heartBeatParams); _EVT_pumpMessages(); /* Pump all messages into queue */ EVT.mouseMove(EVT.mx,EVT.my); /* Move the mouse cursor */ evt->what = EVT_NULLEVT; /* Default to null event */ if (EVT.count) { - /* It is possible that an event be posted while we are trying - * to access the event queue. This would create problems since - * we may end up with invalid data for our event queue pointers. To - * alleviate this, all interrupts are suspended while we manipulate - * our pointers. - */ - ps = _EVT_disableInt(); /* disable interrupts */ - for (evtID = EVT.head; evtID != -1; evtID = EVT.evtq[evtID].next) { - if (EVT.evtq[evtID].what & mask) - break; /* Found an event */ - } - if (evtID == -1) { - _EVT_restoreInt(ps); - return false; /* Event was not found */ - } - next = EVT.evtq[evtID].next; - prev = EVT.evtq[evtID].prev; - if (prev != -1) - EVT.evtq[prev].next = next; - else - EVT.head = next; - if (next != -1) - EVT.evtq[next].prev = prev; - else - EVT.tail = prev; - *evt = EVT.evtq[evtID]; /* Return the event */ - EVT.evtq[evtID].next = EVT.freeHead; /* and return to free list */ - EVT.freeHead = evtID; - EVT.count--; - if (evt->what == EVT_MOUSEMOVE) - EVT.oldMove = -1; - if (evt->what == EVT_KEYREPEAT) - EVT.oldKey = -1; - if (evt->what == EVT_JOYMOVE) - EVT.oldJoyMove = -1; - _EVT_restoreInt(ps); /* enable interrupts */ - if (evt->what & EVT_KEYEVT) - _EVT_maskKeyCode(evt); - } + /* It is possible that an event be posted while we are trying + * to access the event queue. This would create problems since + * we may end up with invalid data for our event queue pointers. To + * alleviate this, all interrupts are suspended while we manipulate + * our pointers. + */ + ps = _EVT_disableInt(); /* disable interrupts */ + for (evtID = EVT.head; evtID != -1; evtID = EVT.evtq[evtID].next) { + if (EVT.evtq[evtID].what & mask) + break; /* Found an event */ + } + if (evtID == -1) { + _EVT_restoreInt(ps); + return false; /* Event was not found */ + } + next = EVT.evtq[evtID].next; + prev = EVT.evtq[evtID].prev; + if (prev != -1) + EVT.evtq[prev].next = next; + else + EVT.head = next; + if (next != -1) + EVT.evtq[next].prev = prev; + else + EVT.tail = prev; + *evt = EVT.evtq[evtID]; /* Return the event */ + EVT.evtq[evtID].next = EVT.freeHead; /* and return to free list */ + EVT.freeHead = evtID; + EVT.count--; + if (evt->what == EVT_MOUSEMOVE) + EVT.oldMove = -1; + if (evt->what == EVT_KEYREPEAT) + EVT.oldKey = -1; + if (evt->what == EVT_JOYMOVE) + EVT.oldJoyMove = -1; + _EVT_restoreInt(ps); /* enable interrupts */ + if (evt->what & EVT_KEYEVT) + _EVT_maskKeyCode(evt); + } /* If there is no event pending, check if we should generate an auto * mouse down event if the mouse is still currently down. */ if (evt->what == EVT_NULLEVT && EVT.autoRepeat && (mask & EVT_MOUSEAUTO) && (EVT.downMouse.what & EVT_MOUSEDOWN)) { - ulong ticks = _EVT_getTicks(); - if ((ticks - EVT.autoTicks) >= (EVT.autoRepeat + (EVT.firstAuto ? EVT.autoDelay : 0))) { - evt->what = EVT_MOUSEAUTO; - evt->message = EVT.downMouse.message; - evt->modifiers = EVT.downMouse.modifiers; - evt->where_x = EVT.autoMouse_x; - evt->where_y = EVT.autoMouse_y; - evt->relative_x = 0; - evt->relative_y = 0; - EVT.autoTicks = evt->when = ticks; - EVT.firstAuto = false; - } - } + ulong ticks = _EVT_getTicks(); + if ((ticks - EVT.autoTicks) >= (EVT.autoRepeat + (EVT.firstAuto ? EVT.autoDelay : 0))) { + evt->what = EVT_MOUSEAUTO; + evt->message = EVT.downMouse.message; + evt->modifiers = EVT.downMouse.modifiers; + evt->where_x = EVT.autoMouse_x; + evt->where_y = EVT.autoMouse_y; + evt->relative_x = 0; + evt->relative_y = 0; + EVT.autoTicks = evt->when = ticks; + EVT.firstAuto = false; + } + } return evt->what != EVT_NULLEVT; } @@ -802,18 +802,18 @@ recieved. Note: Your event callback may be called in response to a hardware - interrupt and will be executing in the context of the hardware - interrupt handler under MSDOS (ie: keyboard interrupt or mouse - interrupt). For this reason the code pages for the callback that - you register must be locked in memory with the PM_lockCodePages - function. You must also lock down any data pages that your function - needs to reference as well. + interrupt and will be executing in the context of the hardware + interrupt handler under MSDOS (ie: keyboard interrupt or mouse + interrupt). For this reason the code pages for the callback that + you register must be locked in memory with the PM_lockCodePages + function. You must also lock down any data pages that your function + needs to reference as well. Note: You can also use this filter callback to process events at the - time they are activated by the user (ie: when the user hits the - key or moves the mouse), but make sure your code runs as fast as - possible as it will be executing inside the context of an interrupt - handler on some systems. + time they are activated by the user (ie: when the user hits the + key or moves the mouse), but make sure your code runs as fast as + possible as it will be executing inside the context of an interrupt + handler on some systems. SEE ALSO: EVT_getNext, EVT_peekNext @@ -1068,10 +1068,10 @@ code = EVT_scanCode(EVT.myEvent.message); NOTE: Scan codes in the event library are not really hardware scan codes, - but rather virtual scan codes as generated by a low level keyboard - interface driver. All virtual scan code values are defined by the - EVT_scanCodesType enumeration, and will be identical across all - supports OS'es and platforms. + but rather virtual scan codes as generated by a low level keyboard + interface driver. All virtual scan code values are defined by the + EVT_scanCodesType enumeration, and will be identical across all + supports OS'es and platforms. SEE ALSO: EVT_asciiCode, EVT_repeatCount diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/event.c b/board/MAI/bios_emulator/scitech/src/pm/linux/event.c index c2668ce..ce38732 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/linux/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/linux/event.c @@ -89,7 +89,7 @@ {"BusMouse", STD_FLG, NULL, {0xf8, 0x80, 0x00, 0x00}, 3, 3}, {"MouseMan", CS7 | STD_FLG, _EVT_mouse_init, {0x40, 0x40, 0x40, 0x00}, 3, 1}, {"IntelliMouse", CS7 | STD_FLG, _EVT_pnpmouse_init, {0xc0, 0x40, 0xc0, 0x00}, 4, 1}, - {"IMPS2", CS7 | STD_FLG, NULL, {0xc0, 0x40, 0xc0, 0x00}, 4, 1}, // ? + {"IMPS2", CS7 | STD_FLG, NULL, {0xc0, 0x40, 0xc0, 0x00}, 4, 1}, /* ? */ }; #define NB_MICE (sizeof(mouse_infos)/sizeof(mouse_info)) @@ -109,7 +109,7 @@ int map; } keymap; -// TODO: Fix this and set it up so we can do a binary search! +/* TODO: Fix this and set it up so we can do a binary search! */ keymap keymaps[] = { {96, KB_padEnter}, @@ -249,131 +249,131 @@ /* Read the first byte to check for the protocol */ drv = &mouse_infos[mouse_driver]; if (read(_EVT_mouse_fd, data, drv->read) != drv->read) { - perror("read"); - return false; - } + perror("read"); + return false; + } if ((data[0] & drv->proto[0]) != drv->proto[1]) - return false; + return false; /* Load a whole protocol packet */ cnt += drv->read; while (cnt < drv->packet_len) { - ret = read(_EVT_mouse_fd, data+cnt, drv->read); - if (ret == drv->read) - cnt += ret; - else { - perror("read"); - return false; - } - } + ret = read(_EVT_mouse_fd, data+cnt, drv->read); + if (ret == drv->read) + cnt += ret; + else { + perror("read"); + return false; + } + } if ((data[1] & drv->proto[2]) != drv->proto[3]) - return false; + return false; /* Now decode the protocol packet */ switch (mouse_driver) { - case EVT_microsoft: - if (data[0] == 0x40 && !(prev|data[1]|data[2])) - *buttons = 2; /* Third button on MS compatible mouse */ - else - *buttons= ((data[0] & 0x20) >> 3) | ((data[0] & 0x10) >> 4); - prev = *buttons; - *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F)); - *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F)); - break; - case EVT_ps2: - *buttons = !!(data[0]&1) * 4 + !!(data[0]&2) * 1 + !!(data[0]&4) * 2; - if (data[1] != 0) - *dx = (data[0] & 0x10) ? data[1]-256 : data[1]; - else - *dx = 0; - if (data[2] != 0) - *dy = -((data[0] & 0x20) ? data[2]-256 : data[2]); - else - *dy = 0; - break; - case EVT_mousesystems: case EVT_gpm: - *buttons = (~data[0]) & 0x07; - *dx = (char)(data[1]) + (char)(data[3]); - *dy = -((char)(data[2]) + (char)(data[4])); - break; - case EVT_logitech: - *buttons= data[0] & 0x07; - *dx = (data[0] & 0x10) ? data[1] : - data[1]; - *dy = (data[0] & 0x08) ? - data[2] : data[2]; - break; - case EVT_busmouse: - *buttons= (~data[0]) & 0x07; - *dx = (char)data[1]; - *dy = -(char)data[2]; - break; - case EVT_MMseries: - *buttons = data[0] & 0x07; - *dx = (data[0] & 0x10) ? data[1] : - data[1]; - *dy = (data[0] & 0x08) ? - data[2] : data[2]; - break; - case EVT_intellimouse: - *buttons = ((data[0] & 0x20) >> 3) /* left */ - | ((data[3] & 0x10) >> 3) /* middle */ - | ((data[0] & 0x10) >> 4); /* right */ - *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F)); - *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F)); - break; - case EVT_intellimouse_ps2: - *buttons = (data[0] & 0x04) >> 1 /* Middle */ - | (data[0] & 0x02) >> 1 /* Right */ - | (data[0] & 0x01) << 2; /* Left */ - *dx = (data[0] & 0x10) ? data[1]-256 : data[1]; - *dy = (data[0] & 0x20) ? -(data[2]-256) : -data[2]; - break; - case EVT_mouseman: { - static int getextra; - static uchar prev=0; - uchar b; + case EVT_microsoft: + if (data[0] == 0x40 && !(prev|data[1]|data[2])) + *buttons = 2; /* Third button on MS compatible mouse */ + else + *buttons= ((data[0] & 0x20) >> 3) | ((data[0] & 0x10) >> 4); + prev = *buttons; + *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F)); + *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F)); + break; + case EVT_ps2: + *buttons = !!(data[0]&1) * 4 + !!(data[0]&2) * 1 + !!(data[0]&4) * 2; + if (data[1] != 0) + *dx = (data[0] & 0x10) ? data[1]-256 : data[1]; + else + *dx = 0; + if (data[2] != 0) + *dy = -((data[0] & 0x20) ? data[2]-256 : data[2]); + else + *dy = 0; + break; + case EVT_mousesystems: case EVT_gpm: + *buttons = (~data[0]) & 0x07; + *dx = (char)(data[1]) + (char)(data[3]); + *dy = -((char)(data[2]) + (char)(data[4])); + break; + case EVT_logitech: + *buttons= data[0] & 0x07; + *dx = (data[0] & 0x10) ? data[1] : - data[1]; + *dy = (data[0] & 0x08) ? - data[2] : data[2]; + break; + case EVT_busmouse: + *buttons= (~data[0]) & 0x07; + *dx = (char)data[1]; + *dy = -(char)data[2]; + break; + case EVT_MMseries: + *buttons = data[0] & 0x07; + *dx = (data[0] & 0x10) ? data[1] : - data[1]; + *dy = (data[0] & 0x08) ? - data[2] : data[2]; + break; + case EVT_intellimouse: + *buttons = ((data[0] & 0x20) >> 3) /* left */ + | ((data[3] & 0x10) >> 3) /* middle */ + | ((data[0] & 0x10) >> 4); /* right */ + *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F)); + *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F)); + break; + case EVT_intellimouse_ps2: + *buttons = (data[0] & 0x04) >> 1 /* Middle */ + | (data[0] & 0x02) >> 1 /* Right */ + | (data[0] & 0x01) << 2; /* Left */ + *dx = (data[0] & 0x10) ? data[1]-256 : data[1]; + *dy = (data[0] & 0x20) ? -(data[2]-256) : -data[2]; + break; + case EVT_mouseman: { + static int getextra; + static uchar prev=0; + uchar b; - /* The damned MouseMan has 3/4 bytes packets. The extra byte - * is only there if the middle button is active. - * I get the extra byte as a packet with magic numbers in it. - * and then switch to 4-byte mode. - */ - if (data[1] == 0xAA && data[2] == 0x55) { - /* Got unexpected fourth byte */ - if ((b = (*data>>4)) > 0x3) - return false; /* just a sanity check */ - *dx = *dy = 0; - drv->packet_len=4; - getextra=0; - } - else { - /* Got 3/4, as expected */ - /* Motion is independent of packetlen... */ - *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F)); - *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F)); - prev = ((data[0] & 0x20) >> 3) | ((data[0] & 0x10) >> 4); - if (drv->packet_len==4) - b = data[3]>>4; - } - if (drv->packet_len == 4) { - if (b == 0) { - drv->packet_len = 3; - getextra = 1; - } - else { - if (b & 0x2) - prev |= 2; - } - } - *buttons = prev; + /* The damned MouseMan has 3/4 bytes packets. The extra byte + * is only there if the middle button is active. + * I get the extra byte as a packet with magic numbers in it. + * and then switch to 4-byte mode. + */ + if (data[1] == 0xAA && data[2] == 0x55) { + /* Got unexpected fourth byte */ + if ((b = (*data>>4)) > 0x3) + return false; /* just a sanity check */ + *dx = *dy = 0; + drv->packet_len=4; + getextra=0; + } + else { + /* Got 3/4, as expected */ + /* Motion is independent of packetlen... */ + *dx = (char)(((data[0] & 0x03) << 6) | (data[1] & 0x3F)); + *dy = (char)(((data[0] & 0x0C) << 4) | (data[2] & 0x3F)); + prev = ((data[0] & 0x20) >> 3) | ((data[0] & 0x10) >> 4); + if (drv->packet_len==4) + b = data[3]>>4; + } + if (drv->packet_len == 4) { + if (b == 0) { + drv->packet_len = 3; + getextra = 1; + } + else { + if (b & 0x2) + prev |= 2; + } + } + *buttons = prev; - /* This "chord-middle" behaviour was reported by David A. van Leeuwen */ - if (((prev ^ *buttons) & 5) == 5) - *buttons = *buttons ? 2 : 0; - prev = *buttons; - break; - } - case EVT_noMouse: - return false; - break; - } + /* This "chord-middle" behaviour was reported by David A. van Leeuwen */ + if (((prev ^ *buttons) & 5) == 5) + *buttons = *buttons ? 2 : 0; + prev = *buttons; + break; + } + case EVT_noMouse: + return false; + break; + } return true; } @@ -389,9 +389,9 @@ int i; for(i = 0; i < nb; i++) { - if (tab[i].scan == key) - return tab[i].map; - } + if (tab[i].scan == key) + return tab[i].map; + } return key; } @@ -411,21 +411,21 @@ { evt->message = 0; if (buts0 && axis0) { - if (buts0[0]) evt->message |= EVT_JOY1_BUTTONA; - if (buts0[1]) evt->message |= EVT_JOY1_BUTTONB; - evt->where_x = axis0[0]; - evt->where_y = axis0[1]; - } + if (buts0[0]) evt->message |= EVT_JOY1_BUTTONA; + if (buts0[1]) evt->message |= EVT_JOY1_BUTTONB; + evt->where_x = axis0[0]; + evt->where_y = axis0[1]; + } else - evt->where_x = evt->where_y = 0; + evt->where_x = evt->where_y = 0; if (buts1 && axis1) { - if (buts1[0]) evt->message |= EVT_JOY2_BUTTONA; - if (buts1[1]) evt->message |= EVT_JOY2_BUTTONB; - evt->where_x = axis1[0]; - evt->where_y = axis1[1]; - } + if (buts1[0]) evt->message |= EVT_JOY2_BUTTONA; + if (buts1[1]) evt->message |= EVT_JOY2_BUTTONB; + evt->where_x = axis1[0]; + evt->where_y = axis1[1]; + } else - evt->where_x = evt->where_y = 0; + evt->where_x = evt->where_y = 0; } /**************************************************************************** @@ -439,39 +439,39 @@ int mask = 0; if ((js_version & ~0xffff) == 0) { - /* Old 0.x driver */ - struct JS_DATA_TYPE js; - if (joystick0_fd && read(joystick0_fd, &js, JS_RETURN) == JS_RETURN) { - if (jmask & EVT_JOY_AXIS_X1) - axis[0] = js.x; - if (jmask & EVT_JOY_AXIS_Y1) - axis[1] = js.y; - mask |= EVT_JOY_AXIS_X1|EVT_JOY_AXIS_Y1; - } - if (joystick1_fd && read(joystick1_fd, &js, JS_RETURN) == JS_RETURN) { - if (jmask & EVT_JOY_AXIS_X2) - axis[2] = js.x; - if (jmask & EVT_JOY_AXIS_Y2) - axis[3] = js.y; - mask |= EVT_JOY_AXIS_X2|EVT_JOY_AXIS_Y2; - } - } + /* Old 0.x driver */ + struct JS_DATA_TYPE js; + if (joystick0_fd && read(joystick0_fd, &js, JS_RETURN) == JS_RETURN) { + if (jmask & EVT_JOY_AXIS_X1) + axis[0] = js.x; + if (jmask & EVT_JOY_AXIS_Y1) + axis[1] = js.y; + mask |= EVT_JOY_AXIS_X1|EVT_JOY_AXIS_Y1; + } + if (joystick1_fd && read(joystick1_fd, &js, JS_RETURN) == JS_RETURN) { + if (jmask & EVT_JOY_AXIS_X2) + axis[2] = js.x; + if (jmask & EVT_JOY_AXIS_Y2) + axis[3] = js.y; + mask |= EVT_JOY_AXIS_X2|EVT_JOY_AXIS_Y2; + } + } else { - if (axis0) { - if (jmask & EVT_JOY_AXIS_X1) - axis[0] = axis0[0]; - if (jmask & EVT_JOY_AXIS_Y1) - axis[1] = axis0[1]; - mask |= EVT_JOY_AXIS_X1 | EVT_JOY_AXIS_Y1; - } - if (axis1) { - if (jmask & EVT_JOY_AXIS_X2) - axis[2] = axis1[0]; - if (jmask & EVT_JOY_AXIS_Y2) - axis[3] = axis1[1]; - mask |= EVT_JOY_AXIS_X2 | EVT_JOY_AXIS_Y2; - } - } + if (axis0) { + if (jmask & EVT_JOY_AXIS_X1) + axis[0] = axis0[0]; + if (jmask & EVT_JOY_AXIS_Y1) + axis[1] = axis0[1]; + mask |= EVT_JOY_AXIS_X1 | EVT_JOY_AXIS_Y1; + } + if (axis1) { + if (jmask & EVT_JOY_AXIS_X2) + axis[2] = axis1[0]; + if (jmask & EVT_JOY_AXIS_Y2) + axis[3] = axis1[1]; + mask |= EVT_JOY_AXIS_X2 | EVT_JOY_AXIS_Y2; + } + } return mask; } @@ -484,19 +484,19 @@ int buts = 0; if ((js_version & ~0xffff) == 0) { - /* Old 0.x driver */ - struct JS_DATA_TYPE js; - if (joystick0_fd && read(joystick0_fd, &js, JS_RETURN) == JS_RETURN) - buts = js.buttons; - if (joystick1_fd && read(joystick1_fd, &js, JS_RETURN) == JS_RETURN) - buts |= js.buttons << 2; - } + /* Old 0.x driver */ + struct JS_DATA_TYPE js; + if (joystick0_fd && read(joystick0_fd, &js, JS_RETURN) == JS_RETURN) + buts = js.buttons; + if (joystick1_fd && read(joystick1_fd, &js, JS_RETURN) == JS_RETURN) + buts |= js.buttons << 2; + } else { - if (buts0) - buts |= EVT_JOY1_BUTTONA*buts0[0] + EVT_JOY1_BUTTONB*buts0[1]; - if (buts1) - buts |= EVT_JOY2_BUTTONA*buts1[0] + EVT_JOY2_BUTTONB*buts1[1]; - } + if (buts0) + buts |= EVT_JOY1_BUTTONA*buts0[0] + EVT_JOY1_BUTTONB*buts0[1]; + if (buts1) + buts |= EVT_JOY2_BUTTONA*buts1[0] + EVT_JOY2_BUTTONB*buts1[1]; + } return buts; } @@ -525,97 +525,97 @@ static ibool inited = false; if (inited) - return mask; + return mask; memset(EVT.joyMin,0,sizeof(EVT.joyMin)); memset(EVT.joyCenter,0,sizeof(EVT.joyCenter)); memset(EVT.joyMax,0,sizeof(EVT.joyMax)); memset(EVT.joyPrev,0,sizeof(EVT.joyPrev)); EVT.joyButState = 0; if ((tmp = getenv(ENV_JOYDEV0)) != NULL) - strcpy(joystick0_dev,tmp); + strcpy(joystick0_dev,tmp); if ((tmp = getenv(ENV_JOYDEV1)) != NULL) - strcpy(joystick1_dev,tmp); + strcpy(joystick1_dev,tmp); if ((joystick0_fd = open(joystick0_dev, O_RDONLY)) < 0) - joystick0_fd = 0; + joystick0_fd = 0; if ((joystick1_fd = open(joystick1_dev, O_RDONLY)) < 0) - joystick1_fd = 0; - if (!joystick0_fd && !joystick1_fd) // No joysticks detected - return 0; + joystick1_fd = 0; + if (!joystick0_fd && !joystick1_fd) /* No joysticks detected */ + return 0; inited = true; if (ioctl(joystick0_fd ? joystick0_fd : joystick1_fd, JSIOCGVERSION, &js_version) < 0) - return 0; + return 0; /* Initialise joystick 0 */ if (joystick0_fd) { - ioctl(joystick0_fd, JSIOCGNAME(sizeof(name0)), name0); - if (js_version & ~0xffff) { - struct js_event js; + ioctl(joystick0_fd, JSIOCGNAME(sizeof(name0)), name0); + if (js_version & ~0xffff) { + struct js_event js; - ioctl(joystick0_fd, JSIOCGAXES, &js0_axes); - ioctl(joystick0_fd, JSIOCGBUTTONS, &js0_buttons); - axis0 = PM_calloc((int)js0_axes, sizeof(short)); - buts0 = PM_malloc((int)js0_buttons); - /* Read the initial events */ - while(dataReady(joystick0_fd) - && read(joystick0_fd, &js, sizeof(struct js_event)) == sizeof(struct js_event) - && (js.type & JS_EVENT_INIT) - ) { - if (js.type & JS_EVENT_BUTTON) - buts0[js.number] = js.value; - else if (js.type & JS_EVENT_AXIS) - axis0[js.number] = scaleJoyAxis(js.value,js.number); - } - } - else { - js0_axes = 2; - js0_buttons = 2; - axis0 = PM_calloc((int)js0_axes, sizeof(short)); - buts0 = PM_malloc((int)js0_buttons); - } - } + ioctl(joystick0_fd, JSIOCGAXES, &js0_axes); + ioctl(joystick0_fd, JSIOCGBUTTONS, &js0_buttons); + axis0 = PM_calloc((int)js0_axes, sizeof(short)); + buts0 = PM_malloc((int)js0_buttons); + /* Read the initial events */ + while(dataReady(joystick0_fd) + && read(joystick0_fd, &js, sizeof(struct js_event)) == sizeof(struct js_event) + && (js.type & JS_EVENT_INIT) + ) { + if (js.type & JS_EVENT_BUTTON) + buts0[js.number] = js.value; + else if (js.type & JS_EVENT_AXIS) + axis0[js.number] = scaleJoyAxis(js.value,js.number); + } + } + else { + js0_axes = 2; + js0_buttons = 2; + axis0 = PM_calloc((int)js0_axes, sizeof(short)); + buts0 = PM_malloc((int)js0_buttons); + } + } /* Initialise joystick 1 */ if (joystick1_fd) { - ioctl(joystick1_fd, JSIOCGNAME(sizeof(name1)), name1); - if (js_version & ~0xffff) { - struct js_event js; + ioctl(joystick1_fd, JSIOCGNAME(sizeof(name1)), name1); + if (js_version & ~0xffff) { + struct js_event js; - ioctl(joystick1_fd, JSIOCGAXES, &js1_axes); - ioctl(joystick1_fd, JSIOCGBUTTONS, &js1_buttons); - axis1 = PM_calloc((int)js1_axes, sizeof(short)); - buts1 = PM_malloc((int)js1_buttons); - /* Read the initial events */ - while(dataReady(joystick1_fd) - && read(joystick1_fd, &js, sizeof(struct js_event))==sizeof(struct js_event) - && (js.type & JS_EVENT_INIT) - ) { - if (js.type & JS_EVENT_BUTTON) - buts1[js.number] = js.value; - else if (js.type & JS_EVENT_AXIS) - axis1[js.number] = scaleJoyAxis(js.value,js.number<<2); - } - } - else { - js1_axes = 2; - js1_buttons = 2; - axis1 = PM_calloc((int)js1_axes, sizeof(short)); - buts1 = PM_malloc((int)js1_buttons); - } - } + ioctl(joystick1_fd, JSIOCGAXES, &js1_axes); + ioctl(joystick1_fd, JSIOCGBUTTONS, &js1_buttons); + axis1 = PM_calloc((int)js1_axes, sizeof(short)); + buts1 = PM_malloc((int)js1_buttons); + /* Read the initial events */ + while(dataReady(joystick1_fd) + && read(joystick1_fd, &js, sizeof(struct js_event))==sizeof(struct js_event) + && (js.type & JS_EVENT_INIT) + ) { + if (js.type & JS_EVENT_BUTTON) + buts1[js.number] = js.value; + else if (js.type & JS_EVENT_AXIS) + axis1[js.number] = scaleJoyAxis(js.value,js.number<<2); + } + } + else { + js1_axes = 2; + js1_buttons = 2; + axis1 = PM_calloc((int)js1_axes, sizeof(short)); + buts1 = PM_malloc((int)js1_buttons); + } + } #ifdef CHECKED - fprintf(stderr,"Using joystick driver version %d.%d.%d\n", - js_version >> 16, (js_version >> 8) & 0xff, js_version & 0xff); + fprintf(stderr,"Using joystick driver version %d.%d.%d\n", + js_version >> 16, (js_version >> 8) & 0xff, js_version & 0xff); if (joystick0_fd) - fprintf(stderr,"Joystick 1 (%s): %s\n", joystick0_dev, name0); + fprintf(stderr,"Joystick 1 (%s): %s\n", joystick0_dev, name0); if (joystick1_fd) - fprintf(stderr,"Joystick 2 (%s): %s\n", joystick1_dev, name1); + fprintf(stderr,"Joystick 2 (%s): %s\n", joystick1_dev, name1); #endif mask = _EVT_readJoyAxis(EVT_JOY_AXIS_ALL,EVT.joyCenter); if (mask) { - for (i = 0; i < JOY_NUM_AXES; i++) - EVT.joyMax[i] = EVT.joyCenter[i]*2; - } + for (i = 0; i < JOY_NUM_AXES; i++) + EVT.joyMax[i] = EVT.joyCenter[i]*2; + } return mask; } @@ -634,9 +634,9 @@ queue for later retrieval. Note: Most analogue joysticks will provide readings that change even - though the joystick has not moved. Hence if you call this routine - you will likely get an EVT_JOYMOVE event every time through your - event loop. + though the joystick has not moved. Hence if you call this routine + you will likely get an EVT_JOYMOVE event every time through your + event loop. SEE ALSO: EVT_getNext, EVT_peekNext, EVT_joySetUpperLeft, EVT_joySetLowerRight, @@ -648,68 +648,68 @@ int i,axis[JOY_NUM_AXES],newButState,mask,moved,ps; if ((js_version & ~0xFFFF) == 0 && EVT.joyMask) { - /* Read joystick axes and post movement events if they have - * changed since the last time we polled. Until the events are - * actually flushed, we keep modifying the same joystick movement - * event, so you won't get multiple movement event - */ - mask = _EVT_readJoyAxis(EVT.joyMask,axis); - newButState = _EVT_readJoyButtons(); - moved = false; - for (i = 0; i < JOY_NUM_AXES; i++) { - if (mask & (EVT_JOY_AXIS_X1 << i)) - axis[i] = scaleJoyAxis(axis[i],i); - else - axis[i] = EVT.joyPrev[i]; - if (axis[i] != EVT.joyPrev[i]) - moved = true; - } - if (moved) { - memcpy(EVT.joyPrev,axis,sizeof(EVT.joyPrev)); - ps = _EVT_disableInt(); - if (EVT.oldJoyMove != -1) { - /* Modify the existing joystick movement event */ - EVT.evtq[EVT.oldJoyMove].message = newButState; - EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0]; - EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1]; - EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2]; - EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3]; - } - else if (EVT.count < EVENTQSIZE) { - /* Add a new joystick movement event */ - EVT.oldJoyMove = EVT.freeHead; - memset(&evt,0,sizeof(evt)); - evt.what = EVT_JOYMOVE; - evt.message = EVT.joyButState; - evt.where_x = EVT.joyPrev[0]; - evt.where_y = EVT.joyPrev[1]; - evt.relative_x = EVT.joyPrev[2]; - evt.relative_y = EVT.joyPrev[3]; - addEvent(&evt); - } - _EVT_restoreInt(ps); - } + /* Read joystick axes and post movement events if they have + * changed since the last time we polled. Until the events are + * actually flushed, we keep modifying the same joystick movement + * event, so you won't get multiple movement event + */ + mask = _EVT_readJoyAxis(EVT.joyMask,axis); + newButState = _EVT_readJoyButtons(); + moved = false; + for (i = 0; i < JOY_NUM_AXES; i++) { + if (mask & (EVT_JOY_AXIS_X1 << i)) + axis[i] = scaleJoyAxis(axis[i],i); + else + axis[i] = EVT.joyPrev[i]; + if (axis[i] != EVT.joyPrev[i]) + moved = true; + } + if (moved) { + memcpy(EVT.joyPrev,axis,sizeof(EVT.joyPrev)); + ps = _EVT_disableInt(); + if (EVT.oldJoyMove != -1) { + /* Modify the existing joystick movement event */ + EVT.evtq[EVT.oldJoyMove].message = newButState; + EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0]; + EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1]; + EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2]; + EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3]; + } + else if (EVT.count < EVENTQSIZE) { + /* Add a new joystick movement event */ + EVT.oldJoyMove = EVT.freeHead; + memset(&evt,0,sizeof(evt)); + evt.what = EVT_JOYMOVE; + evt.message = EVT.joyButState; + evt.where_x = EVT.joyPrev[0]; + evt.where_y = EVT.joyPrev[1]; + evt.relative_x = EVT.joyPrev[2]; + evt.relative_y = EVT.joyPrev[3]; + addEvent(&evt); + } + _EVT_restoreInt(ps); + } - /* Read the joystick buttons, and post events to reflect the change - * in state for the joystick buttons. - */ - if (newButState != EVT.joyButState) { - if (EVT.count < EVENTQSIZE) { - /* Add a new joystick movement event */ - ps = _EVT_disableInt(); - memset(&evt,0,sizeof(evt)); - evt.what = EVT_JOYCLICK; - evt.message = newButState; - EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0]; - EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1]; - EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2]; - EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3]; - addEvent(&evt); - _EVT_restoreInt(ps); - } - EVT.joyButState = newButState; - } - } + /* Read the joystick buttons, and post events to reflect the change + * in state for the joystick buttons. + */ + if (newButState != EVT.joyButState) { + if (EVT.count < EVENTQSIZE) { + /* Add a new joystick movement event */ + ps = _EVT_disableInt(); + memset(&evt,0,sizeof(evt)); + evt.what = EVT_JOYCLICK; + evt.message = newButState; + EVT.evtq[EVT.oldJoyMove].where_x = EVT.joyPrev[0]; + EVT.evtq[EVT.oldJoyMove].where_y = EVT.joyPrev[1]; + EVT.evtq[EVT.oldJoyMove].relative_x = EVT.joyPrev[2]; + EVT.evtq[EVT.oldJoyMove].relative_y = EVT.joyPrev[3]; + addEvent(&evt); + _EVT_restoreInt(ps); + } + EVT.joyButState = newButState; + } + } } /**************************************************************************** @@ -815,287 +815,287 @@ /* Poll keyboard events */ while (dataReady(_PM_console_fd) && (numkeys = read(_PM_console_fd, buf, KBDREADBUFFERSIZE)) > 0) { - for (i = 0; i < numkeys; i++) { - c = buf[i]; - release = c & 0x80; - c &= 0x7F; + for (i = 0; i < numkeys; i++) { + c = buf[i]; + release = c & 0x80; + c &= 0x7F; - // TODO: This is wrong! We need this to be the time stamp at - // ** interrupt ** time!! One solution would be to - // put the keyboard and mouse polling loops into - // a separate thread that can block on I/O to the - // necessay file descriptor. - evt.when = _EVT_getTicks(); + /* TODO: This is wrong! We need this to be the time stamp at */ + /* ** interrupt ** time!! One solution would be to */ + /* put the keyboard and mouse polling loops into */ + /* a separate thread that can block on I/O to the */ + /* necessay file descriptor. */ + evt.when = _EVT_getTicks(); - if (release) { - /* Key released */ - evt.what = EVT_KEYUP; - switch (c) { - case KB_leftShift: - _PM_modifiers &= ~EVT_LEFTSHIFT; - break; - case KB_rightShift: - _PM_modifiers &= ~EVT_RIGHTSHIFT; - break; - case 29: - _PM_modifiers &= ~(EVT_LEFTCTRL|EVT_CTRLSTATE); - break; - case 97: /* Control */ - _PM_modifiers &= ~EVT_CTRLSTATE; - break; - case 56: - _PM_modifiers &= ~(EVT_LEFTALT|EVT_ALTSTATE); - break; - case 100: - _PM_modifiers &= ~EVT_ALTSTATE; - break; - default: - } - evt.modifiers = _PM_modifiers; - evt.message = keyUpMsg[c]; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - keyUpMsg[c] = 0; - repeatKey[c] = 0; - } - else { - /* Key pressed */ - evt.what = EVT_KEYDOWN; - switch (c) { - case KB_leftShift: - _PM_modifiers |= EVT_LEFTSHIFT; - break; - case KB_rightShift: - _PM_modifiers |= EVT_RIGHTSHIFT; - break; - case 29: - _PM_modifiers |= EVT_LEFTCTRL|EVT_CTRLSTATE; - break; - case 97: /* Control */ - _PM_modifiers |= EVT_CTRLSTATE; - break; - case 56: - _PM_modifiers |= EVT_LEFTALT|EVT_ALTSTATE; - break; - case 100: - _PM_modifiers |= EVT_ALTSTATE; - break; - case KB_capsLock: /* Caps Lock */ - _PM_leds ^= LED_CAP; - ioctl(_PM_console_fd, KDSETLED, _PM_leds); - break; - case KB_numLock: /* Num Lock */ - _PM_leds ^= LED_NUM; - ioctl(_PM_console_fd, KDSETLED, _PM_leds); - break; - case KB_scrollLock: /* Scroll Lock */ - _PM_leds ^= LED_SCR; - ioctl(_PM_console_fd, KDSETLED, _PM_leds); - break; - default: - } - evt.modifiers = _PM_modifiers; - if (keyUpMsg[c]) { - evt.what = EVT_KEYREPEAT; - evt.message = keyUpMsg[c] | (repeatKey[c]++ << 16); - } - else { - int asc; + if (release) { + /* Key released */ + evt.what = EVT_KEYUP; + switch (c) { + case KB_leftShift: + _PM_modifiers &= ~EVT_LEFTSHIFT; + break; + case KB_rightShift: + _PM_modifiers &= ~EVT_RIGHTSHIFT; + break; + case 29: + _PM_modifiers &= ~(EVT_LEFTCTRL|EVT_CTRLSTATE); + break; + case 97: /* Control */ + _PM_modifiers &= ~EVT_CTRLSTATE; + break; + case 56: + _PM_modifiers &= ~(EVT_LEFTALT|EVT_ALTSTATE); + break; + case 100: + _PM_modifiers &= ~EVT_ALTSTATE; + break; + default: + } + evt.modifiers = _PM_modifiers; + evt.message = keyUpMsg[c]; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + keyUpMsg[c] = 0; + repeatKey[c] = 0; + } + else { + /* Key pressed */ + evt.what = EVT_KEYDOWN; + switch (c) { + case KB_leftShift: + _PM_modifiers |= EVT_LEFTSHIFT; + break; + case KB_rightShift: + _PM_modifiers |= EVT_RIGHTSHIFT; + break; + case 29: + _PM_modifiers |= EVT_LEFTCTRL|EVT_CTRLSTATE; + break; + case 97: /* Control */ + _PM_modifiers |= EVT_CTRLSTATE; + break; + case 56: + _PM_modifiers |= EVT_LEFTALT|EVT_ALTSTATE; + break; + case 100: + _PM_modifiers |= EVT_ALTSTATE; + break; + case KB_capsLock: /* Caps Lock */ + _PM_leds ^= LED_CAP; + ioctl(_PM_console_fd, KDSETLED, _PM_leds); + break; + case KB_numLock: /* Num Lock */ + _PM_leds ^= LED_NUM; + ioctl(_PM_console_fd, KDSETLED, _PM_leds); + break; + case KB_scrollLock: /* Scroll Lock */ + _PM_leds ^= LED_SCR; + ioctl(_PM_console_fd, KDSETLED, _PM_leds); + break; + default: + } + evt.modifiers = _PM_modifiers; + if (keyUpMsg[c]) { + evt.what = EVT_KEYREPEAT; + evt.message = keyUpMsg[c] | (repeatKey[c]++ << 16); + } + else { + int asc; - evt.message = getKeyMapping(keymaps, NB_KEYMAPS, c) << 8; - ke.kb_index = c; - ke.kb_table = 0; - if ((_PM_modifiers & EVT_SHIFTKEY) || (_PM_leds & LED_CAP)) - ke.kb_table |= K_SHIFTTAB; - if (_PM_modifiers & (EVT_LEFTALT | EVT_ALTSTATE)) - ke.kb_table |= K_ALTTAB; - if (ioctl(_PM_console_fd, KDGKBENT, (unsigned long)&ke)<0) - perror("ioctl(KDGKBENT)"); - if ((_PM_leds & LED_NUM) && (getKeyMapping(keypad, NB_KEYPAD, c)!=c)) { - asc = getKeyMapping(keypad, NB_KEYPAD, c); - } - else { - switch (c) { - case 14: - asc = ASCII_backspace; - break; - case 15: - asc = ASCII_tab; - break; - case 28: - case 96: - asc = ASCII_enter; - break; - case 1: - asc = ASCII_esc; - default: - asc = ke.kb_value & 0xFF; - if (asc < 0x1B) - asc = 0; - break; - } - } - if ((_PM_modifiers & (EVT_CTRLSTATE|EVT_LEFTCTRL)) && isalpha(asc)) - evt.message |= toupper(asc) - 'A' + 1; - else - evt.message |= asc; - keyUpMsg[c] = evt.message; - repeatKey[c]++; - } - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } - } - } + evt.message = getKeyMapping(keymaps, NB_KEYMAPS, c) << 8; + ke.kb_index = c; + ke.kb_table = 0; + if ((_PM_modifiers & EVT_SHIFTKEY) || (_PM_leds & LED_CAP)) + ke.kb_table |= K_SHIFTTAB; + if (_PM_modifiers & (EVT_LEFTALT | EVT_ALTSTATE)) + ke.kb_table |= K_ALTTAB; + if (ioctl(_PM_console_fd, KDGKBENT, (unsigned long)&ke)<0) + perror("ioctl(KDGKBENT)"); + if ((_PM_leds & LED_NUM) && (getKeyMapping(keypad, NB_KEYPAD, c)!=c)) { + asc = getKeyMapping(keypad, NB_KEYPAD, c); + } + else { + switch (c) { + case 14: + asc = ASCII_backspace; + break; + case 15: + asc = ASCII_tab; + break; + case 28: + case 96: + asc = ASCII_enter; + break; + case 1: + asc = ASCII_esc; + default: + asc = ke.kb_value & 0xFF; + if (asc < 0x1B) + asc = 0; + break; + } + } + if ((_PM_modifiers & (EVT_CTRLSTATE|EVT_LEFTCTRL)) && isalpha(asc)) + evt.message |= toupper(asc) - 'A' + 1; + else + evt.message |= asc; + keyUpMsg[c] = evt.message; + repeatKey[c]++; + } + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } + } + } /* Poll mouse events */ if (_EVT_mouse_fd) { - int dx, dy, buts; - static int oldbuts; + int dx, dy, buts; + static int oldbuts; - while (dataReady(_EVT_mouse_fd)) { - if (readMouseData(&buts, &dx, &dy)) { - EVT.mx += dx; - EVT.my += dy; - if (EVT.mx < 0) EVT.mx = 0; - if (EVT.my < 0) EVT.my = 0; - if (EVT.mx > range_x) EVT.mx = range_x; - if (EVT.my > range_y) EVT.my = range_y; - evt.where_x = EVT.mx; - evt.where_y = EVT.my; - evt.relative_x = dx; - evt.relative_y = dy; + while (dataReady(_EVT_mouse_fd)) { + if (readMouseData(&buts, &dx, &dy)) { + EVT.mx += dx; + EVT.my += dy; + if (EVT.mx < 0) EVT.mx = 0; + if (EVT.my < 0) EVT.my = 0; + if (EVT.mx > range_x) EVT.mx = range_x; + if (EVT.my > range_y) EVT.my = range_y; + evt.where_x = EVT.mx; + evt.where_y = EVT.my; + evt.relative_x = dx; + evt.relative_y = dy; - // TODO: This is wrong! We need this to be the time stamp at - // ** interrupt ** time!! One solution would be to - // put the keyboard and mouse polling loops into - // a separate thread that can block on I/O to the - // necessay file descriptor. - evt.when = _EVT_getTicks(); - evt.modifiers = _PM_modifiers; - if (buts & 4) - evt.modifiers |= EVT_LEFTBUT; - if (buts & 1) - evt.modifiers |= EVT_RIGHTBUT; - if (buts & 2) - evt.modifiers |= EVT_MIDDLEBUT; + /* TODO: This is wrong! We need this to be the time stamp at */ + /* ** interrupt ** time!! One solution would be to */ + /* put the keyboard and mouse polling loops into */ + /* a separate thread that can block on I/O to the */ + /* necessay file descriptor. */ + evt.when = _EVT_getTicks(); + evt.modifiers = _PM_modifiers; + if (buts & 4) + evt.modifiers |= EVT_LEFTBUT; + if (buts & 1) + evt.modifiers |= EVT_RIGHTBUT; + if (buts & 2) + evt.modifiers |= EVT_MIDDLEBUT; - /* Left click events */ - if ((buts&4) != (oldbuts&4)) { - if (buts&4) - evt.what = EVT_MOUSEDOWN; - else - evt.what = EVT_MOUSEUP; - evt.message = EVT_LEFTBMASK; - EVT.oldMove = -1; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } + /* Left click events */ + if ((buts&4) != (oldbuts&4)) { + if (buts&4) + evt.what = EVT_MOUSEDOWN; + else + evt.what = EVT_MOUSEUP; + evt.message = EVT_LEFTBMASK; + EVT.oldMove = -1; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } - /* Right click events */ - if ((buts&1) != (oldbuts&1)) { - if (buts&1) - evt.what = EVT_MOUSEDOWN; - else - evt.what = EVT_MOUSEUP; - evt.message = EVT_RIGHTBMASK; - EVT.oldMove = -1; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } + /* Right click events */ + if ((buts&1) != (oldbuts&1)) { + if (buts&1) + evt.what = EVT_MOUSEDOWN; + else + evt.what = EVT_MOUSEUP; + evt.message = EVT_RIGHTBMASK; + EVT.oldMove = -1; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } - /* Middle click events */ - if ((buts&2) != (oldbuts&2)) { - if (buts&2) - evt.what = EVT_MOUSEDOWN; - else - evt.what = EVT_MOUSEUP; - evt.message = EVT_MIDDLEBMASK; - EVT.oldMove = -1; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } + /* Middle click events */ + if ((buts&2) != (oldbuts&2)) { + if (buts&2) + evt.what = EVT_MOUSEDOWN; + else + evt.what = EVT_MOUSEUP; + evt.message = EVT_MIDDLEBMASK; + EVT.oldMove = -1; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } - /* Mouse movement event */ - if (dx || dy) { - evt.what = EVT_MOUSEMOVE; - evt.message = 0; - if (EVT.oldMove != -1) { - /* Modify existing movement event */ - EVT.evtq[EVT.oldMove].where_x = evt.where_x; - EVT.evtq[EVT.oldMove].where_y = evt.where_y; - } - else { - /* Save id of this movement event */ - EVT.oldMove = EVT.freeHead; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } - } - oldbuts = buts; - } - } - } + /* Mouse movement event */ + if (dx || dy) { + evt.what = EVT_MOUSEMOVE; + evt.message = 0; + if (EVT.oldMove != -1) { + /* Modify existing movement event */ + EVT.evtq[EVT.oldMove].where_x = evt.where_x; + EVT.evtq[EVT.oldMove].where_y = evt.where_y; + } + else { + /* Save id of this movement event */ + EVT.oldMove = EVT.freeHead; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } + } + oldbuts = buts; + } + } + } #ifdef USE_OS_JOYSTICK - // Poll joystick events using the 1.x joystick driver API in the 2.2 kernels + /* Poll joystick events using the 1.x joystick driver API in the 2.2 kernels */ if (js_version & ~0xffff) { - static struct js_event js; + static struct js_event js; - /* Read joystick axis 0 */ - evt.when = 0; - evt.modifiers = _PM_modifiers; - if (joystick0_fd && dataReady(joystick0_fd) && - read(joystick0_fd, &js, sizeof(js)) == sizeof(js)) { - if (js.type & JS_EVENT_BUTTON) { - if (js.number < 2) { /* Only 2 buttons for now :( */ - buts0[js.number] = js.value; - evt.what = EVT_JOYCLICK; - makeJoyEvent(&evt); - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } - } - else if (js.type & JS_EVENT_AXIS) { - axis0[js.number] = scaleJoyAxis(js.value,js.number); - evt.what = EVT_JOYMOVE; - if (EVT.oldJoyMove != -1) { - makeJoyEvent(&EVT.evtq[EVT.oldJoyMove]); - } - else if (EVT.count < EVENTQSIZE) { - EVT.oldJoyMove = EVT.freeHead; - makeJoyEvent(&evt); - addEvent(&evt); - } - } - } + /* Read joystick axis 0 */ + evt.when = 0; + evt.modifiers = _PM_modifiers; + if (joystick0_fd && dataReady(joystick0_fd) && + read(joystick0_fd, &js, sizeof(js)) == sizeof(js)) { + if (js.type & JS_EVENT_BUTTON) { + if (js.number < 2) { /* Only 2 buttons for now :( */ + buts0[js.number] = js.value; + evt.what = EVT_JOYCLICK; + makeJoyEvent(&evt); + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } + } + else if (js.type & JS_EVENT_AXIS) { + axis0[js.number] = scaleJoyAxis(js.value,js.number); + evt.what = EVT_JOYMOVE; + if (EVT.oldJoyMove != -1) { + makeJoyEvent(&EVT.evtq[EVT.oldJoyMove]); + } + else if (EVT.count < EVENTQSIZE) { + EVT.oldJoyMove = EVT.freeHead; + makeJoyEvent(&evt); + addEvent(&evt); + } + } + } - /* Read joystick axis 1 */ - if (joystick1_fd && dataReady(joystick1_fd) && - read(joystick1_fd, &js, sizeof(js))==sizeof(js)) { - if (js.type & JS_EVENT_BUTTON) { - if (js.number < 2) { /* Only 2 buttons for now :( */ - buts1[js.number] = js.value; - evt.what = EVT_JOYCLICK; - makeJoyEvent(&evt); - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } - } - else if (js.type & JS_EVENT_AXIS) { - axis1[js.number] = scaleJoyAxis(js.value,js.number<<2); - evt.what = EVT_JOYMOVE; - if (EVT.oldJoyMove != -1) { - makeJoyEvent(&EVT.evtq[EVT.oldJoyMove]); - } - else if (EVT.count < EVENTQSIZE) { - EVT.oldJoyMove = EVT.freeHead; - makeJoyEvent(&evt); - addEvent(&evt); - } - } - } - } + /* Read joystick axis 1 */ + if (joystick1_fd && dataReady(joystick1_fd) && + read(joystick1_fd, &js, sizeof(js))==sizeof(js)) { + if (js.type & JS_EVENT_BUTTON) { + if (js.number < 2) { /* Only 2 buttons for now :( */ + buts1[js.number] = js.value; + evt.what = EVT_JOYCLICK; + makeJoyEvent(&evt); + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } + } + else if (js.type & JS_EVENT_AXIS) { + axis1[js.number] = scaleJoyAxis(js.value,js.number<<2); + evt.what = EVT_JOYMOVE; + if (EVT.oldJoyMove != -1) { + makeJoyEvent(&EVT.evtq[EVT.oldJoyMove]); + } + else if (EVT.count < EVENTQSIZE) { + EVT.oldJoyMove = EVT.freeHead; + makeJoyEvent(&evt); + addEvent(&evt); + } + } + } + } #endif } @@ -1122,7 +1122,7 @@ { struct termios tty; char *c; - + tcgetattr(fd, &tty); tty.c_iflag = IGNBRK | IGNPAR; tty.c_oflag = 0; @@ -1131,20 +1131,20 @@ tty.c_cc[VTIME] = 0; tty.c_cc[VMIN] = 1; switch (old) { - case 9600: tty.c_cflag = flags | B9600; break; - case 4800: tty.c_cflag = flags | B4800; break; - case 2400: tty.c_cflag = flags | B2400; break; - case 1200: - default: tty.c_cflag = flags | B1200; break; - } + case 9600: tty.c_cflag = flags | B9600; break; + case 4800: tty.c_cflag = flags | B4800; break; + case 2400: tty.c_cflag = flags | B2400; break; + case 1200: + default: tty.c_cflag = flags | B1200; break; + } tcsetattr(fd, TCSAFLUSH, &tty); switch (new) { - case 9600: c = "*q"; tty.c_cflag = flags | B9600; break; - case 4800: c = "*p"; tty.c_cflag = flags | B4800; break; - case 2400: c = "*o"; tty.c_cflag = flags | B2400; break; - case 1200: - default: c = "*n"; tty.c_cflag = flags | B1200; break; - } + case 9600: c = "*q"; tty.c_cflag = flags | B9600; break; + case 4800: c = "*p"; tty.c_cflag = flags | B4800; break; + case 2400: c = "*o"; tty.c_cflag = flags | B2400; break; + case 1200: + default: c = "*n"; tty.c_cflag = flags | B1200; break; + } write(fd, c, 2); usleep(100000); tcsetattr(fd, TCSAFLUSH, &tty); @@ -1161,7 +1161,7 @@ /* Change from any available speed to the chosen one */ for (i = 9600; i >= 1200; i /= 2) - setspeed(_EVT_mouse_fd, i, opt_baud, mouse_infos[mouse_driver].flags); + setspeed(_EVT_mouse_fd, i, opt_baud, mouse_infos[mouse_driver].flags); } /**************************************************************************** @@ -1173,29 +1173,29 @@ int i; struct stat buf; int busmouse; - + /* is this a serial- or a bus- mouse? */ if (fstat(_EVT_mouse_fd,&buf) == -1) - perror("fstat"); + perror("fstat"); i = MAJOR(buf.st_rdev); if (stat("/dev/ttyS0",&buf) == -1) - perror("stat"); + perror("stat"); busmouse=(i != MAJOR(buf.st_rdev)); - + /* Fix the howmany field, so that serial mice have 1, while busmice have 3 */ mouse_infos[mouse_driver].read = busmouse ? 3 : 1; - + /* Change from any available speed to the chosen one */ for (i = 9600; i >= 1200; i /= 2) - setspeed(_EVT_mouse_fd, i, opt_baud, mouse_infos[mouse_driver].flags); - + setspeed(_EVT_mouse_fd, i, opt_baud, mouse_infos[mouse_driver].flags); + /* This stuff is peculiar of logitech mice, also for the serial ones */ write(_EVT_mouse_fd, "S", 1); setspeed(_EVT_mouse_fd, opt_baud, opt_baud,CS8 |PARENB |PARODD |CREAD |CLOCAL |HUPCL); - + /* Configure the sample rate */ for (i = 0; opt_sample <= sampletab[i].sample; i++) - ; + ; write(_EVT_mouse_fd,sampletab[i].code,1); } @@ -1206,7 +1206,7 @@ static void _EVT_pnpmouse_init(void) { struct termios tty; - + tcgetattr(_EVT_mouse_fd, &tty); tty.c_iflag = IGNBRK | IGNPAR; tty.c_oflag = 0; @@ -1240,53 +1240,53 @@ EVT.mouseMove = mouseMove; initEventQueue(); for (i = 0; i < 256; i++) - keyUpMsg[i] = 0; + keyUpMsg[i] = 0; /* Keyboard initialization */ if (_PM_console_fd == -1) - PM_fatalError("You must first call PM_openConsole to use the EVT functions!"); + PM_fatalError("You must first call PM_openConsole to use the EVT functions!"); _PM_keyboard_rawmode(); fcntl(_PM_console_fd,F_SETFL,fcntl(_PM_console_fd,F_GETFL) | O_NONBLOCK); /* Mouse initialization */ if ((tmp = getenv(ENV_MOUSEDRV)) != NULL) { - for (i = 0; i < NB_MICE; i++) { - if (!strcasecmp(tmp, mouse_infos[i].name)) { - mouse_driver = i; - break; - } - } - if (i == NB_MICE) { - fprintf(stderr,"Unknown mouse driver: %s\n", tmp); - mouse_driver = EVT_noMouse; - _EVT_mouse_fd = 0; - } - } + for (i = 0; i < NB_MICE; i++) { + if (!strcasecmp(tmp, mouse_infos[i].name)) { + mouse_driver = i; + break; + } + } + if (i == NB_MICE) { + fprintf(stderr,"Unknown mouse driver: %s\n", tmp); + mouse_driver = EVT_noMouse; + _EVT_mouse_fd = 0; + } + } if (mouse_driver != EVT_noMouse) { - if (mouse_driver == EVT_gpm) - strcpy(mouse_dev,"/dev/gpmdata"); - if ((tmp = getenv(ENV_MOUSEDEV)) != NULL) - strcpy(mouse_dev,tmp); + if (mouse_driver == EVT_gpm) + strcpy(mouse_dev,"/dev/gpmdata"); + if ((tmp = getenv(ENV_MOUSEDEV)) != NULL) + strcpy(mouse_dev,tmp); #ifdef CHECKED - fprintf(stderr,"Using the %s MGL mouse driver on %s.\n", mouse_infos[mouse_driver].name, mouse_dev); + fprintf(stderr,"Using the %s MGL mouse driver on %s.\n", mouse_infos[mouse_driver].name, mouse_dev); #endif - if ((_EVT_mouse_fd = open(mouse_dev, O_RDWR)) < 0) { - perror("open"); - fprintf(stderr, "Unable to open mouse device %s, dropping mouse support.\n", mouse_dev); - sleep(1); - mouse_driver = EVT_noMouse; - _EVT_mouse_fd = 0; - } - else { - char c; + if ((_EVT_mouse_fd = open(mouse_dev, O_RDWR)) < 0) { + perror("open"); + fprintf(stderr, "Unable to open mouse device %s, dropping mouse support.\n", mouse_dev); + sleep(1); + mouse_driver = EVT_noMouse; + _EVT_mouse_fd = 0; + } + else { + char c; - /* Init and flush the mouse pending input queue */ - if (mouse_infos[mouse_driver].init) - mouse_infos[mouse_driver].init(); - while(dataReady(_EVT_mouse_fd) && read(_EVT_mouse_fd, &c, 1) == 1) - ; - } - } + /* Init and flush the mouse pending input queue */ + if (mouse_infos[mouse_driver].init) + mouse_infos[mouse_driver].init(); + while(dataReady(_EVT_mouse_fd) && read(_EVT_mouse_fd, &c, 1) == 1) + ; + } + } } /**************************************************************************** @@ -1318,7 +1318,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for Linux + /* Do nothing for Linux */ } /**************************************************************************** @@ -1328,7 +1328,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for Linux + /* Do nothing for Linux */ } /**************************************************************************** @@ -1340,22 +1340,21 @@ /* Restore signal handlers */ _PM_restore_kb_mode(); if (_EVT_mouse_fd) { - close(_EVT_mouse_fd); - _EVT_mouse_fd = 0; - } + close(_EVT_mouse_fd); + _EVT_mouse_fd = 0; + } #ifdef USE_OS_JOYSTICK if (joystick0_fd) { - close(joystick0_fd); - free(axis0); - free(buts0); - joystick0_fd = 0; - } + close(joystick0_fd); + free(axis0); + free(buts0); + joystick0_fd = 0; + } if (joystick1_fd) { - close(joystick1_fd); - free(axis1); - free(buts1); - joystick1_fd = 0; - } + close(joystick1_fd); + free(axis1); + free(buts1); + joystick1_fd = 0; + } #endif } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h index 6023dff..eadedfb 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h +++ b/board/MAI/bios_emulator/scitech/src/pm/linux/oshdr.h @@ -58,4 +58,3 @@ /* Linux needs the generic joystick scaling code */ #define NEED_SCALE_JOY_AXIS - diff --git a/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c b/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c index 1d52984..c12a835 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/linux/pm.c @@ -148,7 +148,7 @@ printk("%04X:%04X: outb.%04X <- %02X\n", traceAddr >> 16, traceAddr & 0xFFFF, (ushort)port, (uchar)value); #endif asm volatile ("outb %0,%1" - ::"a" ((unsigned char) value), "d"((unsigned short) port)); + ::"a" ((unsigned char) value), "d"((unsigned short) port)); } static inline void port_outw(int value, int port) @@ -157,7 +157,7 @@ printk("%04X:%04X: outw.%04X <- %04X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ushort)value); #endif asm volatile ("outw %0,%1" - ::"a" ((unsigned short) value), "d"((unsigned short) port)); + ::"a" ((unsigned short) value), "d"((unsigned short) port)); } static inline void port_outl(int value, int port) @@ -166,15 +166,15 @@ printk("%04X:%04X: outl.%04X <- %08X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ulong)value); #endif asm volatile ("outl %0,%1" - ::"a" ((unsigned long) value), "d"((unsigned short) port)); + ::"a" ((unsigned long) value), "d"((unsigned short) port)); } static inline unsigned int port_in(int port) { unsigned char value; asm volatile ("inb %1,%0" - :"=a" ((unsigned char)value) - :"d"((unsigned short) port)); + :"=a" ((unsigned char)value) + :"d"((unsigned short) port)); #ifdef TRACE_IO printk("%04X:%04X: inb.%04X -> %02X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (uchar)value); #endif @@ -185,8 +185,8 @@ { unsigned short value; asm volatile ("inw %1,%0" - :"=a" ((unsigned short)value) - :"d"((unsigned short) port)); + :"=a" ((unsigned short)value) + :"d"((unsigned short) port)); #ifdef TRACE_IO printk("%04X:%04X: inw.%04X -> %04X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ushort)value); #endif @@ -197,8 +197,8 @@ { unsigned long value; asm volatile ("inl %1,%0" - :"=a" ((unsigned long)value) - :"d"((unsigned short) port)); + :"=a" ((unsigned long)value) + :"d"((unsigned short) port)); #ifdef TRACE_IO printk("%04X:%04X: inl.%04X -> %08X\n", traceAddr >> 16,traceAddr & 0xFFFF, (ushort)port, (ulong)value); #endif @@ -211,16 +211,16 @@ int fd_zero; if (mem_info.ready) - return 1; + return 1; if ((fd_zero = open("/dev/zero", O_RDONLY)) == -1) - PM_fatalError("You must have root privledges to run this program!"); + PM_fatalError("You must have root privledges to run this program!"); if ((m = mmap((void *)REAL_MEM_BASE, REAL_MEM_SIZE, - PROT_READ | PROT_WRITE | PROT_EXEC, - MAP_FIXED | MAP_PRIVATE, fd_zero, 0)) == (void *)-1) { - close(fd_zero); - PM_fatalError("You must have root privledges to run this program!"); - } + PROT_READ | PROT_WRITE | PROT_EXEC, + MAP_FIXED | MAP_PRIVATE, fd_zero, 0)) == (void *)-1) { + close(fd_zero); + PM_fatalError("You must have root privledges to run this program!"); + } mem_info.ready = 1; mem_info.count = 1; mem_info.blocks[0].size = REAL_MEM_SIZE; @@ -231,9 +231,9 @@ static void insert_block(int i) { memmove( - mem_info.blocks + i + 1, - mem_info.blocks + i, - (mem_info.count - i) * sizeof(struct mem_block)); + mem_info.blocks + i + 1, + mem_info.blocks + i, + (mem_info.count - i) * sizeof(struct mem_block)); mem_info.count++; } @@ -242,9 +242,9 @@ mem_info.count--; memmove( - mem_info.blocks + i, - mem_info.blocks + i + 1, - (mem_info.count - i) * sizeof(struct mem_block)); + mem_info.blocks + i, + mem_info.blocks + i + 1, + (mem_info.count - i) * sizeof(struct mem_block)); } static inline void set_bit(unsigned int bit, void *array) @@ -279,35 +279,35 @@ uint r_seg,r_off; if (inited) - return; + return; /* Map the Interrupt Vectors (0x0 - 0x400) + BIOS data (0x400 - 0x502) * and the physical framebuffer and ROM images from (0xa0000 - 0x100000) */ real_mem_init(); if (!fd_mem && (fd_mem = open("/dev/mem", O_RDWR)) == -1) { - PM_fatalError("You must have root privileges to run this program!"); - } + PM_fatalError("You must have root privileges to run this program!"); + } if ((m = mmap((void *)0, 0x502, - PROT_READ | PROT_WRITE | PROT_EXEC, - MAP_FIXED | MAP_PRIVATE, fd_mem, 0)) == (void *)-1) { - PM_fatalError("You must have root privileges to run this program!"); - } + PROT_READ | PROT_WRITE | PROT_EXEC, + MAP_FIXED | MAP_PRIVATE, fd_mem, 0)) == (void *)-1) { + PM_fatalError("You must have root privileges to run this program!"); + } if ((m = mmap((void *)0xA0000, 0xC0000 - 0xA0000, - PROT_READ | PROT_WRITE, - MAP_FIXED | MAP_SHARED, fd_mem, 0xA0000)) == (void *)-1) { - PM_fatalError("You must have root privileges to run this program!"); - } + PROT_READ | PROT_WRITE, + MAP_FIXED | MAP_SHARED, fd_mem, 0xA0000)) == (void *)-1) { + PM_fatalError("You must have root privileges to run this program!"); + } if ((m = mmap((void *)0xC0000, 0xD0000 - 0xC0000, - PROT_READ | PROT_WRITE | PROT_EXEC, - MAP_FIXED | MAP_PRIVATE, fd_mem, 0xC0000)) == (void *)-1) { - PM_fatalError("You must have root privileges to run this program!"); - } + PROT_READ | PROT_WRITE | PROT_EXEC, + MAP_FIXED | MAP_PRIVATE, fd_mem, 0xC0000)) == (void *)-1) { + PM_fatalError("You must have root privileges to run this program!"); + } if ((m = mmap((void *)0xD0000, 0x100000 - 0xD0000, - PROT_READ | PROT_WRITE, - MAP_FIXED | MAP_SHARED, fd_mem, 0xD0000)) == (void *)-1) { - PM_fatalError("You must have root privileges to run this program!"); - } + PROT_READ | PROT_WRITE, + MAP_FIXED | MAP_SHARED, fd_mem, 0xD0000)) == (void *)-1) { + PM_fatalError("You must have root privileges to run this program!"); + } inited = 1; /* Allocate a stack */ @@ -356,9 +356,9 @@ { uint pos = strlen(s); if (s[pos-1] != '/') { - s[pos] = '/'; - s[pos+1] = '\0'; - } + s[pos] = '/'; + s[pos+1] = '\0'; + } } void PMAPI PM_setFatalErrorCleanup( @@ -370,7 +370,7 @@ void PMAPI PM_fatalError(const char *msg) { if (fatalErrorCleanup) - fatalErrorCleanup(); + fatalErrorCleanup(); fprintf(stderr,"%s\n", msg); fflush(stderr); exit(1); @@ -379,18 +379,18 @@ static void ExitVBEBuf(void) { if (VESABuf_ptr) - PM_freeRealSeg(VESABuf_ptr); + PM_freeRealSeg(VESABuf_ptr); VESABuf_ptr = 0; } void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff) { if (!VESABuf_ptr) { - /* Allocate a global buffer for communicating with the VESA VBE */ - if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) - return NULL; - atexit(ExitVBEBuf); - } + /* Allocate a global buffer for communicating with the VESA VBE */ + if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) + return NULL; + atexit(ExitVBEBuf); + } *len = VESABuf_len; *rseg = VESABuf_rseg; *roff = VESABuf_roff; @@ -431,7 +431,7 @@ char *path) { if (!PM_findBPD("graphics.bpd",path)) - return NULL; + return NULL; PM_backslash(path); strcat(path,KBMODE_DAT); return fopen(path,mode); @@ -448,18 +448,18 @@ char path[PM_MAX_PATH]; if (_PM_console_fd != -1 && (kbmode = open_kb_mode("rb",path)) != NULL) { - if (fread(&mode,1,sizeof(mode),kbmode) == sizeof(mode)) { - if (mode.startup_vc > 0) - ioctl(_PM_console_fd, VT_ACTIVATE, mode.startup_vc); - ioctl(_PM_console_fd, KDSKBMODE, mode.kb_mode); - ioctl(_PM_console_fd, KDSETLED, mode.leds); - tcsetattr(_PM_console_fd, TCSAFLUSH, &mode.termios); - fcntl(_PM_console_fd,F_SETFL,mode.flags); - } - fclose(kbmode); - unlink(path); - in_raw_mode = false; - } + if (fread(&mode,1,sizeof(mode),kbmode) == sizeof(mode)) { + if (mode.startup_vc > 0) + ioctl(_PM_console_fd, VT_ACTIVATE, mode.startup_vc); + ioctl(_PM_console_fd, KDSKBMODE, mode.kb_mode); + ioctl(_PM_console_fd, KDSETLED, mode.leds); + tcsetattr(_PM_console_fd, TCSAFLUSH, &mode.termios); + fcntl(_PM_console_fd,F_SETFL,mode.flags); + } + fclose(kbmode); + unlink(path); + in_raw_mode = false; + } } /**************************************************************************** @@ -488,49 +488,49 @@ char path[PM_MAX_PATH]; int i; static int sig_list[] = { - SIGHUP, - SIGINT, - SIGQUIT, - SIGILL, - SIGTRAP, - SIGABRT, - SIGIOT, - SIGBUS, - SIGFPE, - SIGKILL, - SIGSEGV, - SIGTERM, - }; + SIGHUP, + SIGINT, + SIGQUIT, + SIGILL, + SIGTRAP, + SIGABRT, + SIGIOT, + SIGBUS, + SIGFPE, + SIGKILL, + SIGSEGV, + SIGTERM, + }; if ((kbmode = open_kb_mode("rb",path)) == NULL) { - if ((kbmode = open_kb_mode("wb",path)) == NULL) - PM_fatalError("Unable to open kbmode.dat file for writing!"); - if (ioctl(_PM_console_fd, KDGKBMODE, &mode.kb_mode)) - perror("KDGKBMODE"); - ioctl(_PM_console_fd, KDGETLED, &mode.leds); - _PM_leds = mode.leds & 0xF; - _PM_modifiers = 0; - tcgetattr(_PM_console_fd, &mode.termios); - conf = mode.termios; - conf.c_lflag &= ~(ICANON | ECHO | ISIG); - conf.c_iflag &= ~(ISTRIP | IGNCR | ICRNL | INLCR | BRKINT | PARMRK | INPCK | IUCLC | IXON | IXOFF); - conf.c_iflag |= (IGNBRK | IGNPAR); - conf.c_cc[VMIN] = 1; - conf.c_cc[VTIME] = 0; - conf.c_cc[VSUSP] = 0; - tcsetattr(_PM_console_fd, TCSAFLUSH, &conf); - mode.flags = fcntl(_PM_console_fd,F_GETFL); - if (ioctl(_PM_console_fd, KDSKBMODE, K_MEDIUMRAW)) - perror("KDSKBMODE"); - atexit(_PM_restore_kb_mode); - for (i = 0; i < sizeof(sig_list)/sizeof(sig_list[0]); i++) - signal(sig_list[i], _PM_abort); - mode.startup_vc = startup_vc; - if (fwrite(&mode,1,sizeof(mode),kbmode) != sizeof(mode)) - PM_fatalError("Error writing kbmode.dat!"); - fclose(kbmode); - in_raw_mode = true; - } + if ((kbmode = open_kb_mode("wb",path)) == NULL) + PM_fatalError("Unable to open kbmode.dat file for writing!"); + if (ioctl(_PM_console_fd, KDGKBMODE, &mode.kb_mode)) + perror("KDGKBMODE"); + ioctl(_PM_console_fd, KDGETLED, &mode.leds); + _PM_leds = mode.leds & 0xF; + _PM_modifiers = 0; + tcgetattr(_PM_console_fd, &mode.termios); + conf = mode.termios; + conf.c_lflag &= ~(ICANON | ECHO | ISIG); + conf.c_iflag &= ~(ISTRIP | IGNCR | ICRNL | INLCR | BRKINT | PARMRK | INPCK | IUCLC | IXON | IXOFF); + conf.c_iflag |= (IGNBRK | IGNPAR); + conf.c_cc[VMIN] = 1; + conf.c_cc[VTIME] = 0; + conf.c_cc[VSUSP] = 0; + tcsetattr(_PM_console_fd, TCSAFLUSH, &conf); + mode.flags = fcntl(_PM_console_fd,F_GETFL); + if (ioctl(_PM_console_fd, KDSKBMODE, K_MEDIUMRAW)) + perror("KDSKBMODE"); + atexit(_PM_restore_kb_mode); + for (i = 0; i < sizeof(sig_list)/sizeof(sig_list[0]); i++) + signal(sig_list[i], _PM_abort); + mode.startup_vc = startup_vc; + if (fwrite(&mode,1,sizeof(mode),kbmode) != sizeof(mode)) + PM_fatalError("Error writing kbmode.dat!"); + fclose(kbmode); + in_raw_mode = true; + } } int PMAPI PM_kbhit(void) @@ -539,9 +539,9 @@ struct timeval tv = { 0, 0 }; if (console_count == 0) - PM_fatalError("You *must* open a console before using PM_kbhit!"); + PM_fatalError("You *must* open a console before using PM_kbhit!"); if (!in_raw_mode) - _PM_keyboard_rawmode(); + _PM_keyboard_rawmode(); FD_ZERO(&s); FD_SET(_PM_console_fd, &s); return select(_PM_console_fd+1, &s, NULL, NULL, &tv) > 0; @@ -554,62 +554,62 @@ static struct kbentry ke; if (console_count == 0) - PM_fatalError("You *must* open a console before using PM_getch!"); + PM_fatalError("You *must* open a console before using PM_getch!"); if (!in_raw_mode) - _PM_keyboard_rawmode(); + _PM_keyboard_rawmode(); while (read(_PM_console_fd, &c, 1) > 0) { - release = c & 0x80; - c &= 0x7F; - if (release) { - switch(c){ - case 42: case 54: // Shift - _PM_modifiers &= ~KB_SHIFT; - break; - case 29: case 97: // Control - _PM_modifiers &= ~KB_CONTROL; - break; - case 56: case 100: // Alt / AltGr - _PM_modifiers &= ~KB_ALT; - break; - } - continue; - } - switch (c) { - case 42: case 54: // Shift - _PM_modifiers |= KB_SHIFT; - break; - case 29: case 97: // Control - _PM_modifiers |= KB_CONTROL; - break; - case 56: case 100: // Alt / AltGr - _PM_modifiers |= KB_ALT; - break; - case 58: // Caps Lock - _PM_modifiers ^= KB_CAPS; - ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7); - break; - case 69: // Num Lock - _PM_modifiers ^= KB_NUMLOCK; - ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7); - break; - case 70: // Scroll Lock - _PM_modifiers ^= KB_SCROLL; - ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7); - break; - case 28: - return 0x1C; - default: - ke.kb_index = c; - ke.kb_table = 0; - if ((_PM_modifiers & KB_SHIFT) || (_PM_modifiers & KB_CAPS)) - ke.kb_table |= K_SHIFTTAB; - if (_PM_modifiers & KB_ALT) - ke.kb_table |= K_ALTTAB; - ioctl(_PM_console_fd, KDGKBENT, (ulong)&ke); - c = ke.kb_value & 0xFF; - return c; - } - } + release = c & 0x80; + c &= 0x7F; + if (release) { + switch(c){ + case 42: case 54: /* Shift */ + _PM_modifiers &= ~KB_SHIFT; + break; + case 29: case 97: /* Control */ + _PM_modifiers &= ~KB_CONTROL; + break; + case 56: case 100: /* Alt / AltGr */ + _PM_modifiers &= ~KB_ALT; + break; + } + continue; + } + switch (c) { + case 42: case 54: /* Shift */ + _PM_modifiers |= KB_SHIFT; + break; + case 29: case 97: /* Control */ + _PM_modifiers |= KB_CONTROL; + break; + case 56: case 100: /* Alt / AltGr */ + _PM_modifiers |= KB_ALT; + break; + case 58: /* Caps Lock */ + _PM_modifiers ^= KB_CAPS; + ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7); + break; + case 69: /* Num Lock */ + _PM_modifiers ^= KB_NUMLOCK; + ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7); + break; + case 70: /* Scroll Lock */ + _PM_modifiers ^= KB_SCROLL; + ioctl(_PM_console_fd, KDSETLED, _PM_modifiers & 7); + break; + case 28: + return 0x1C; + default: + ke.kb_index = c; + ke.kb_table = 0; + if ((_PM_modifiers & KB_SHIFT) || (_PM_modifiers & KB_CAPS)) + ke.kb_table |= K_SHIFTTAB; + if (_PM_modifiers & KB_ALT) + ke.kb_table |= K_ALTTAB; + ioctl(_PM_console_fd, KDGKBENT, (ulong)&ke); + c = ke.kb_value & 0xFF; + return c; + } + } return 0; } @@ -621,12 +621,12 @@ int _PM_console_fd) { while (ioctl(_PM_console_fd, VT_WAITACTIVE, tty_vc) < 0) { - if ((errno != EAGAIN) && (errno != EINTR)) { - perror("ioctl(VT_WAITACTIVE)"); - exit(1); - } - usleep(150000); - } + if ((errno != EAGAIN) && (errno != EINTR)) { + perror("ioctl(VT_WAITACTIVE)"); + exit(1); + } + usleep(150000); + } } /**************************************************************************** @@ -641,7 +641,7 @@ sprintf(fname, "/dev/tty%d", vc); if ((stat(fname, &sbuf) >= 0) && (getuid() == sbuf.st_uid)) - return 1; + return 1; printf("You must be the owner of the current console to use this program.\n"); return 0; } @@ -658,7 +658,7 @@ int console_id) { if (ioctl(console_id, KDSETMODE, KD_TEXT) < 0) - LOGWARN("ioctl(KDSETMODE) failed"); + LOGWARN("ioctl(KDSETMODE) failed"); _PM_restore_kb_mode(); } @@ -682,7 +682,7 @@ /* Check if we have already opened the console */ if (console_count++) - return _PM_console_fd; + return _PM_console_fd; /* Now, it would be great if we could use /dev/tty and see what it is * connected to. Alas, we cannot find out reliably what VC /dev/tty is @@ -690,26 +690,26 @@ */ startup_vc = 0; for (_PM_console_fd = 0; _PM_console_fd < 3; _PM_console_fd++) { - if (fstat(_PM_console_fd, &sbuf) < 0) - continue; - if (ioctl(_PM_console_fd, VT_GETMODE, &vtm) < 0) - continue; - if ((sbuf.st_rdev & 0xFF00) != 0x400) - continue; - if (!(sbuf.st_rdev & 0xFF)) - continue; - tty_vc = sbuf.st_rdev & 0xFF; - restore_text_console(_PM_console_fd); - return _PM_console_fd; - } + if (fstat(_PM_console_fd, &sbuf) < 0) + continue; + if (ioctl(_PM_console_fd, VT_GETMODE, &vtm) < 0) + continue; + if ((sbuf.st_rdev & 0xFF00) != 0x400) + continue; + if (!(sbuf.st_rdev & 0xFF)) + continue; + tty_vc = sbuf.st_rdev & 0xFF; + restore_text_console(_PM_console_fd); + return _PM_console_fd; + } if ((_PM_console_fd = open("/dev/console", O_RDWR)) < 0) { - printf("open_dev_console: can't open /dev/console \n"); - exit(1); - } + printf("open_dev_console: can't open /dev/console \n"); + exit(1); + } if (ioctl(_PM_console_fd, VT_OPENQRY, &tty_vc) < 0) - goto Error; + goto Error; if (tty_vc <= 0) - goto Error; + goto Error; sprintf(fname, "/dev/tty%d", tty_vc); close(_PM_console_fd); @@ -718,40 +718,40 @@ /* We must use RDWR to allow for output... */ if (((_PM_console_fd = open(fname, O_RDWR)) >= 0) && - (ioctl(_PM_console_fd, VT_GETSTATE, &vts) >= 0)) { - if (!check_owner(vts.v_active)) - goto Error; - restore_text_console(_PM_console_fd); + (ioctl(_PM_console_fd, VT_GETSTATE, &vts) >= 0)) { + if (!check_owner(vts.v_active)) + goto Error; + restore_text_console(_PM_console_fd); - /* Success, redirect all stdios */ - fflush(stdin); - fflush(stdout); - fflush(stderr); - close(0); - close(1); - close(2); - dup(_PM_console_fd); - dup(_PM_console_fd); - dup(_PM_console_fd); + /* Success, redirect all stdios */ + fflush(stdin); + fflush(stdout); + fflush(stderr); + close(0); + close(1); + close(2); + dup(_PM_console_fd); + dup(_PM_console_fd); + dup(_PM_console_fd); - /* clear screen and switch to it */ - fwrite("\e[H\e[J", 6, 1, stderr); - fflush(stderr); - if (tty_vc != vts.v_active) { - startup_vc = vts.v_active; - ioctl(_PM_console_fd, VT_ACTIVATE, tty_vc); - wait_vt_active(_PM_console_fd); - } - } + /* clear screen and switch to it */ + fwrite("\e[H\e[J", 6, 1, stderr); + fflush(stderr); + if (tty_vc != vts.v_active) { + startup_vc = vts.v_active; + ioctl(_PM_console_fd, VT_ACTIVATE, tty_vc); + wait_vt_active(_PM_console_fd); + } + } return _PM_console_fd; Error: if (_PM_console_fd > 2) - close(_PM_console_fd); + close(_PM_console_fd); console_count = 0; PM_fatalError( - "Not running in a graphics capable console,\n" - "and unable to find one.\n"); + "Not running in a graphics capable console,\n" + "and unable to find one.\n"); return -1; } @@ -764,7 +764,7 @@ int PMAPI PM_getConsoleStateSize(void) { if (!inited) - PM_init(); + PM_init(); return PM_getVGAStateSize() + FONT_C*2; } @@ -778,11 +778,11 @@ /* Save the current console font */ if (ioctl(console_id,GIO_FONT,®s[PM_getVGAStateSize()]) < 0) - perror("ioctl(GIO_FONT)"); + perror("ioctl(GIO_FONT)"); /* Inform the Linux console that we are going into graphics mode */ if (ioctl(console_id, KDSETMODE, KD_GRAPHICS) < 0) - perror("ioctl(KDSETMODE)"); + perror("ioctl(KDSETMODE)"); /* Save state of VGA registers */ PM_saveVGAState(stateBuf); @@ -806,11 +806,11 @@ /* Inform the Linux console that we are back from graphics modes */ if (ioctl(console_id, KDSETMODE, KD_TEXT) < 0) - LOGWARN("ioctl(KDSETMODE) failed"); + LOGWARN("ioctl(KDSETMODE) failed"); /* Restore the old console font */ if (ioctl(console_id,PIO_FONT,®s[PM_getVGAStateSize()]) < 0) - LOGWARN("ioctl(KDSETMODE) failed"); + LOGWARN("ioctl(KDSETMODE) failed"); /* Coming back from graphics mode on Linux also restored the previous * text mode console contents, so we need to clear the screen to get @@ -830,15 +830,15 @@ { /* Restore console to normal operation */ if (--console_count == 0) { - /* Re-activate the original virtual console */ - if (startup_vc > 0) - ioctl(_PM_console_fd, VT_ACTIVATE, startup_vc); + /* Re-activate the original virtual console */ + if (startup_vc > 0) + ioctl(_PM_console_fd, VT_ACTIVATE, startup_vc); - /* Close the console file descriptor */ - if (_PM_console_fd > 2) - close(_PM_console_fd); - _PM_console_fd = -1; - } + /* Close the console file descriptor */ + if (_PM_console_fd > 2) + close(_PM_console_fd); + _PM_console_fd = -1; + } } void PM_setOSCursorLocation(int x,int y) @@ -855,12 +855,12 @@ struct winsize ws; struct vt_sizes vs; - // Resize the software terminal + /* Resize the software terminal */ ws.ws_col = width; ws.ws_row = height; ioctl(_PM_console_fd, TIOCSWINSZ, &ws); - // And the hardware + /* And the hardware */ vs.v_rows = height; vs.v_cols = width; vs.v_scrollsize = 0; @@ -869,18 +869,18 @@ ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency) { - // TODO: Implement this for Linux + /* TODO: Implement this for Linux */ return false; } void PMAPI PM_setRealTimeClockFrequency(int frequency) { - // TODO: Implement this for Linux + /* TODO: Implement this for Linux */ } void PMAPI PM_restoreRealTimeClockHandler(void) { - // TODO: Implement this for Linux + /* TODO: Implement this for Linux */ } char * PMAPI PM_getCurrentPath( @@ -929,7 +929,7 @@ { static uchar *zeroPtr = NULL; if (!zeroPtr) - zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); + zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); return (void*)(zeroPtr + 0x400); } @@ -939,7 +939,7 @@ * address mapping, so we can return the address here. */ if (!inited) - PM_init(); + PM_init(); return (void*)(0xA0000); } @@ -949,11 +949,11 @@ ulong baseAddr,baseOfs; if (!inited) - PM_init(); + PM_init(); if (base >= 0xA0000 && base < 0x100000) - return (void*)base; + return (void*)base; if (!fd_mem && (fd_mem = open("/dev/mem", O_RDWR)) == -1) - return NULL; + return NULL; /* Round the physical address to a 4Kb boundary and the limit to a * 4Kb-1 boundary before passing the values to mmap. If we round the @@ -964,57 +964,57 @@ baseAddr = base & ~4095; limit = ((limit+baseOfs+1+4095) & ~4095)-1; if ((p = mmap(0, limit+1, - PROT_READ | PROT_WRITE, MAP_SHARED, - fd_mem, baseAddr)) == (void *)-1) - return NULL; + PROT_READ | PROT_WRITE, MAP_SHARED, + fd_mem, baseAddr)) == (void *)-1) + return NULL; return (void*)(p+baseOfs); } void PMAPI PM_freePhysicalAddr(void *ptr,ulong limit) { if ((ulong)ptr >= 0x100000) - munmap(ptr,limit+1); + munmap(ptr,limit+1); } ulong PMAPI PM_getPhysicalAddr(void *p) { - // TODO: This function should find the physical address of a linear - // address. + /* TODO: This function should find the physical address of a linear */ + /* address. */ return 0xFFFFFFFFUL; } ibool PMAPI PM_getPhysicalAddrRange(void *p,ulong length,ulong *physAddress) { - // TODO: This function should find a range of physical addresses - // for a linear address. + /* TODO: This function should find a range of physical addresses */ + /* for a linear address. */ return false; } void PMAPI PM_sleep(ulong milliseconds) { - // TODO: Put the process to sleep for milliseconds + /* TODO: Put the process to sleep for milliseconds */ } int PMAPI PM_getCOMPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + } return 0; } int PMAPI PM_getLPTPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -1038,7 +1038,7 @@ * mapping so we can simply return the physical address in here. */ if (!inited) - PM_init(); + PM_init(); return (void*)MK_PHYS(r_seg,r_off); } @@ -1048,24 +1048,24 @@ char *r = (char *)REAL_MEM_BASE; if (!inited) - PM_init(); + PM_init(); if (!mem_info.ready) - return NULL; + return NULL; if (mem_info.count == REAL_MEM_BLOCKS) - return NULL; + return NULL; size = (size + 15) & ~15; for (i = 0; i < mem_info.count; i++) { - if (mem_info.blocks[i].free && size < mem_info.blocks[i].size) { - insert_block(i); - mem_info.blocks[i].size = size; - mem_info.blocks[i].free = 0; - mem_info.blocks[i + 1].size -= size; - *r_seg = (uint)(r) >> 4; - *r_off = (uint)(r) & 0xF; - return (void *)r; - } - r += mem_info.blocks[i].size; - } + if (mem_info.blocks[i].free && size < mem_info.blocks[i].size) { + insert_block(i); + mem_info.blocks[i].size = size; + mem_info.blocks[i].free = 0; + mem_info.blocks[i + 1].size -= size; + *r_seg = (uint)(r) >> 4; + *r_off = (uint)(r) & 0xF; + return (void *)r; + } + r += mem_info.blocks[i].size; + } return NULL; } @@ -1075,23 +1075,23 @@ char *r = (char *)REAL_MEM_BASE; if (!mem_info.ready) - return; + return; i = 0; while (mem != (void *)r) { - r += mem_info.blocks[i].size; - i++; - if (i == mem_info.count) - return; - } + r += mem_info.blocks[i].size; + i++; + if (i == mem_info.count) + return; + } mem_info.blocks[i].free = 1; if (i + 1 < mem_info.count && mem_info.blocks[i + 1].free) { - mem_info.blocks[i].size += mem_info.blocks[i + 1].size; - delete_block(i + 1); - } + mem_info.blocks[i].size += mem_info.blocks[i + 1].size; + delete_block(i + 1); + } if (i - 1 >= 0 && mem_info.blocks[i - 1].free) { - mem_info.blocks[i - 1].size += mem_info.blocks[i].size; - delete_block(i); - } + mem_info.blocks[i - 1].size += mem_info.blocks[i].size; + delete_block(i); + } } #define DIRECTION_FLAG (1 << 10) @@ -1104,27 +1104,27 @@ edi = context.vm.regs.edi & 0xffff; edi += (unsigned int)context.vm.regs.ds << 4; if (context.vm.regs.eflags & DIRECTION_FLAG) { - if (size == 4) - asm volatile ("std; insl; cld" - : "=D" (edi) : "d" (edx), "0" (edi)); - else if (size == 2) - asm volatile ("std; insw; cld" - : "=D" (edi) : "d" (edx), "0" (edi)); - else - asm volatile ("std; insb; cld" - : "=D" (edi) : "d" (edx), "0" (edi)); - } + if (size == 4) + asm volatile ("std; insl; cld" + : "=D" (edi) : "d" (edx), "0" (edi)); + else if (size == 2) + asm volatile ("std; insw; cld" + : "=D" (edi) : "d" (edx), "0" (edi)); + else + asm volatile ("std; insb; cld" + : "=D" (edi) : "d" (edx), "0" (edi)); + } else { - if (size == 4) - asm volatile ("cld; insl" - : "=D" (edi) : "d" (edx), "0" (edi)); - else if (size == 2) - asm volatile ("cld; insw" - : "=D" (edi) : "d" (edx), "0" (edi)); - else - asm volatile ("cld; insb" - : "=D" (edi) : "d" (edx), "0" (edi)); - } + if (size == 4) + asm volatile ("cld; insl" + : "=D" (edi) : "d" (edx), "0" (edi)); + else if (size == 2) + asm volatile ("cld; insw" + : "=D" (edi) : "d" (edx), "0" (edi)); + else + asm volatile ("cld; insb" + : "=D" (edi) : "d" (edx), "0" (edi)); + } edi -= (unsigned int)context.vm.regs.ds << 4; context.vm.regs.edi &= 0xffff0000; context.vm.regs.edi |= edi & 0xffff; @@ -1139,33 +1139,33 @@ edi = context.vm.regs.edi & 0xffff; edi += (unsigned int)context.vm.regs.ds << 4; if (context.vm.regs.eflags & DIRECTION_FLAG) { - if (size == 4) - asm volatile ("std; rep; insl; cld" - : "=D" (edi), "=c" (ecx) - : "d" (edx), "0" (edi), "1" (ecx)); - else if (size == 2) - asm volatile ("std; rep; insw; cld" - : "=D" (edi), "=c" (ecx) - : "d" (edx), "0" (edi), "1" (ecx)); - else - asm volatile ("std; rep; insb; cld" - : "=D" (edi), "=c" (ecx) - : "d" (edx), "0" (edi), "1" (ecx)); - } + if (size == 4) + asm volatile ("std; rep; insl; cld" + : "=D" (edi), "=c" (ecx) + : "d" (edx), "0" (edi), "1" (ecx)); + else if (size == 2) + asm volatile ("std; rep; insw; cld" + : "=D" (edi), "=c" (ecx) + : "d" (edx), "0" (edi), "1" (ecx)); + else + asm volatile ("std; rep; insb; cld" + : "=D" (edi), "=c" (ecx) + : "d" (edx), "0" (edi), "1" (ecx)); + } else { - if (size == 4) - asm volatile ("cld; rep; insl" - : "=D" (edi), "=c" (ecx) - : "d" (edx), "0" (edi), "1" (ecx)); - else if (size == 2) - asm volatile ("cld; rep; insw" - : "=D" (edi), "=c" (ecx) - : "d" (edx), "0" (edi), "1" (ecx)); - else - asm volatile ("cld; rep; insb" - : "=D" (edi), "=c" (ecx) - : "d" (edx), "0" (edi), "1" (ecx)); - } + if (size == 4) + asm volatile ("cld; rep; insl" + : "=D" (edi), "=c" (ecx) + : "d" (edx), "0" (edi), "1" (ecx)); + else if (size == 2) + asm volatile ("cld; rep; insw" + : "=D" (edi), "=c" (ecx) + : "d" (edx), "0" (edi), "1" (ecx)); + else + asm volatile ("cld; rep; insb" + : "=D" (edi), "=c" (ecx) + : "d" (edx), "0" (edi), "1" (ecx)); + } edi -= (unsigned int)context.vm.regs.ds << 4; context.vm.regs.edi &= 0xffff0000; @@ -1182,27 +1182,27 @@ esi = context.vm.regs.esi & 0xffff; esi += (unsigned int)context.vm.regs.ds << 4; if (context.vm.regs.eflags & DIRECTION_FLAG) { - if (size == 4) - asm volatile ("std; outsl; cld" - : "=S" (esi) : "d" (edx), "0" (esi)); - else if (size == 2) - asm volatile ("std; outsw; cld" - : "=S" (esi) : "d" (edx), "0" (esi)); - else - asm volatile ("std; outsb; cld" - : "=S" (esi) : "d" (edx), "0" (esi)); - } + if (size == 4) + asm volatile ("std; outsl; cld" + : "=S" (esi) : "d" (edx), "0" (esi)); + else if (size == 2) + asm volatile ("std; outsw; cld" + : "=S" (esi) : "d" (edx), "0" (esi)); + else + asm volatile ("std; outsb; cld" + : "=S" (esi) : "d" (edx), "0" (esi)); + } else { - if (size == 4) - asm volatile ("cld; outsl" - : "=S" (esi) : "d" (edx), "0" (esi)); - else if (size == 2) - asm volatile ("cld; outsw" - : "=S" (esi) : "d" (edx), "0" (esi)); - else - asm volatile ("cld; outsb" - : "=S" (esi) : "d" (edx), "0" (esi)); - } + if (size == 4) + asm volatile ("cld; outsl" + : "=S" (esi) : "d" (edx), "0" (esi)); + else if (size == 2) + asm volatile ("cld; outsw" + : "=S" (esi) : "d" (edx), "0" (esi)); + else + asm volatile ("cld; outsb" + : "=S" (esi) : "d" (edx), "0" (esi)); + } esi -= (unsigned int)context.vm.regs.ds << 4; context.vm.regs.esi &= 0xffff0000; @@ -1218,33 +1218,33 @@ esi = context.vm.regs.esi & 0xffff; esi += (unsigned int)context.vm.regs.ds << 4; if (context.vm.regs.eflags & DIRECTION_FLAG) { - if (size == 4) - asm volatile ("std; rep; outsl; cld" - : "=S" (esi), "=c" (ecx) - : "d" (edx), "0" (esi), "1" (ecx)); - else if (size == 2) - asm volatile ("std; rep; outsw; cld" - : "=S" (esi), "=c" (ecx) - : "d" (edx), "0" (esi), "1" (ecx)); - else - asm volatile ("std; rep; outsb; cld" - : "=S" (esi), "=c" (ecx) - : "d" (edx), "0" (esi), "1" (ecx)); - } + if (size == 4) + asm volatile ("std; rep; outsl; cld" + : "=S" (esi), "=c" (ecx) + : "d" (edx), "0" (esi), "1" (ecx)); + else if (size == 2) + asm volatile ("std; rep; outsw; cld" + : "=S" (esi), "=c" (ecx) + : "d" (edx), "0" (esi), "1" (ecx)); + else + asm volatile ("std; rep; outsb; cld" + : "=S" (esi), "=c" (ecx) + : "d" (edx), "0" (esi), "1" (ecx)); + } else { - if (size == 4) - asm volatile ("cld; rep; outsl" - : "=S" (esi), "=c" (ecx) - : "d" (edx), "0" (esi), "1" (ecx)); - else if (size == 2) - asm volatile ("cld; rep; outsw" - : "=S" (esi), "=c" (ecx) - : "d" (edx), "0" (esi), "1" (ecx)); - else - asm volatile ("cld; rep; outsb" - : "=S" (esi), "=c" (ecx) - : "d" (edx), "0" (esi), "1" (ecx)); - } + if (size == 4) + asm volatile ("cld; rep; outsl" + : "=S" (esi), "=c" (ecx) + : "d" (edx), "0" (esi), "1" (ecx)); + else if (size == 2) + asm volatile ("cld; rep; outsw" + : "=S" (esi), "=c" (ecx) + : "d" (edx), "0" (esi), "1" (ecx)); + else + asm volatile ("cld; rep; outsb" + : "=S" (esi), "=c" (ecx) + : "d" (edx), "0" (esi), "1" (ecx)); + } esi -= (unsigned int)context.vm.regs.ds << 4; context.vm.regs.esi &= 0xffff0000; @@ -1257,9 +1257,9 @@ { unsigned char *insn; struct { - unsigned int size : 1; - unsigned int rep : 1; - } prefix = { 0, 0 }; + unsigned int size : 1; + unsigned int rep : 1; + } prefix = { 0, 0 }; int i = 0; insn = (unsigned char *)((unsigned int)context.vm.regs.cs << 4); @@ -1267,101 +1267,101 @@ while (1) { #ifdef TRACE_IO - traceAddr = ((ulong)context.vm.regs.cs << 16) + context.vm.regs.eip + i; + traceAddr = ((ulong)context.vm.regs.cs << 16) + context.vm.regs.eip + i; #endif - if (insn[i] == 0x66) { - prefix.size = 1 - prefix.size; - i++; - } - else if (insn[i] == 0xf3) { - prefix.rep = 1; - i++; - } - else if (insn[i] == 0xf0 || insn[i] == 0xf2 - || insn[i] == 0x26 || insn[i] == 0x2e - || insn[i] == 0x36 || insn[i] == 0x3e - || insn[i] == 0x64 || insn[i] == 0x65 - || insn[i] == 0x67) { - /* these prefixes are just ignored */ - i++; - } - else if (insn[i] == 0x6c) { - if (prefix.rep) - em_rep_ins(1); - else - em_ins(1); - i++; - break; - } - else if (insn[i] == 0x6d) { - if (prefix.rep) { - if (prefix.size) - em_rep_ins(4); - else - em_rep_ins(2); - } - else { - if (prefix.size) - em_ins(4); - else - em_ins(2); - } - i++; - break; - } - else if (insn[i] == 0x6e) { - if (prefix.rep) - em_rep_outs(1); - else - em_outs(1); - i++; - break; - } - else if (insn[i] == 0x6f) { - if (prefix.rep) { - if (prefix.size) - em_rep_outs(4); - else - em_rep_outs(2); - } - else { - if (prefix.size) - em_outs(4); - else - em_outs(2); - } - i++; - break; - } - else if (insn[i] == 0xec) { - *((uchar*)&context.vm.regs.eax) = port_in(context.vm.regs.edx); - i++; - break; - } - else if (insn[i] == 0xed) { - if (prefix.size) - *((ulong*)&context.vm.regs.eax) = port_inl(context.vm.regs.edx); - else - *((ushort*)&context.vm.regs.eax) = port_inw(context.vm.regs.edx); - i++; - break; - } - else if (insn[i] == 0xee) { - port_out(context.vm.regs.eax,context.vm.regs.edx); - i++; - break; - } - else if (insn[i] == 0xef) { - if (prefix.size) - port_outl(context.vm.regs.eax,context.vm.regs.edx); - else - port_outw(context.vm.regs.eax,context.vm.regs.edx); - i++; - break; - } - else - return 0; - } + if (insn[i] == 0x66) { + prefix.size = 1 - prefix.size; + i++; + } + else if (insn[i] == 0xf3) { + prefix.rep = 1; + i++; + } + else if (insn[i] == 0xf0 || insn[i] == 0xf2 + || insn[i] == 0x26 || insn[i] == 0x2e + || insn[i] == 0x36 || insn[i] == 0x3e + || insn[i] == 0x64 || insn[i] == 0x65 + || insn[i] == 0x67) { + /* these prefixes are just ignored */ + i++; + } + else if (insn[i] == 0x6c) { + if (prefix.rep) + em_rep_ins(1); + else + em_ins(1); + i++; + break; + } + else if (insn[i] == 0x6d) { + if (prefix.rep) { + if (prefix.size) + em_rep_ins(4); + else + em_rep_ins(2); + } + else { + if (prefix.size) + em_ins(4); + else + em_ins(2); + } + i++; + break; + } + else if (insn[i] == 0x6e) { + if (prefix.rep) + em_rep_outs(1); + else + em_outs(1); + i++; + break; + } + else if (insn[i] == 0x6f) { + if (prefix.rep) { + if (prefix.size) + em_rep_outs(4); + else + em_rep_outs(2); + } + else { + if (prefix.size) + em_outs(4); + else + em_outs(2); + } + i++; + break; + } + else if (insn[i] == 0xec) { + *((uchar*)&context.vm.regs.eax) = port_in(context.vm.regs.edx); + i++; + break; + } + else if (insn[i] == 0xed) { + if (prefix.size) + *((ulong*)&context.vm.regs.eax) = port_inl(context.vm.regs.edx); + else + *((ushort*)&context.vm.regs.eax) = port_inw(context.vm.regs.edx); + i++; + break; + } + else if (insn[i] == 0xee) { + port_out(context.vm.regs.eax,context.vm.regs.edx); + i++; + break; + } + else if (insn[i] == 0xef) { + if (prefix.size) + port_outl(context.vm.regs.eax,context.vm.regs.edx); + else + port_outw(context.vm.regs.eax,context.vm.regs.edx); + i++; + break; + } + else + return 0; + } context.vm.regs.eip += i; return 1; @@ -1393,7 +1393,7 @@ fputs("cs:ip = [ ", stderr); p = (unsigned char *)((context.vm.regs.cs << 4) + (context.vm.regs.eip & 0xffff)); for (i = 0; i < 16; ++i) - fprintf(stderr, "%02x ", (unsigned int)p[i]); + fprintf(stderr, "%02x ", (unsigned int)p[i]); fputs("]\n", stderr); fflush(stderr); } @@ -1403,24 +1403,24 @@ unsigned int vret; for (;;) { - vret = vm86(&context.vm); - if (VM86_TYPE(vret) == VM86_INTx) { - unsigned int v = VM86_ARG(vret); - if (v == RETURN_TO_32_INT) - return 1; - pushw(context.vm.regs.eflags); - pushw(context.vm.regs.cs); - pushw(context.vm.regs.eip); - context.vm.regs.cs = get_int_seg(v); - context.vm.regs.eip = get_int_off(v); - context.vm.regs.eflags &= ~(VIF_MASK | TF_MASK); - continue; - } - if (VM86_TYPE(vret) != VM86_UNKNOWN) - break; - if (!emulate()) - break; - } + vret = vm86(&context.vm); + if (VM86_TYPE(vret) == VM86_INTx) { + unsigned int v = VM86_ARG(vret); + if (v == RETURN_TO_32_INT) + return 1; + pushw(context.vm.regs.eflags); + pushw(context.vm.regs.cs); + pushw(context.vm.regs.eip); + context.vm.regs.cs = get_int_seg(v); + context.vm.regs.eip = get_int_off(v); + context.vm.regs.eflags &= ~(VIF_MASK | TF_MASK); + continue; + } + if (VM86_TYPE(vret) != VM86_UNKNOWN) + break; + if (!emulate()) + break; + } debug_info(vret); return 0; } @@ -1431,7 +1431,7 @@ void PMAPI DPMI_int86(int intno, DPMI_regs *regs) { if (!inited) - PM_init(); + PM_init(); memset(&context.vm.regs, 0, sizeof(context.vm.regs)); IND(eax); IND(ebx); IND(ecx); IND(edx); IND(esi); IND(edi); context.vm.regs.eflags = DEFAULT_VM86_FLAGS; @@ -1453,7 +1453,7 @@ int PMAPI PM_int86(int intno, RMREGS *in, RMREGS *out) { if (!inited) - PM_init(); + PM_init(); memset(&context.vm.regs, 0, sizeof(context.vm.regs)); IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi); context.vm.regs.eflags = DEFAULT_VM86_FLAGS; @@ -1474,41 +1474,41 @@ RMSREGS *sregs) { if (!inited) - PM_init(); + PM_init(); if (intno == 0x21) { - time_t today = time(NULL); - struct tm *t; - t = localtime(&today); - out->x.cx = t->tm_year + 1900; - out->h.dh = t->tm_mon + 1; - out->h.dl = t->tm_mday; - } + time_t today = time(NULL); + struct tm *t; + t = localtime(&today); + out->x.cx = t->tm_year + 1900; + out->h.dh = t->tm_mon + 1; + out->h.dl = t->tm_mday; + } else { - unsigned int seg, off; - seg = get_int_seg(intno); - off = get_int_off(intno); - memset(&context.vm.regs, 0, sizeof(context.vm.regs)); - IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi); - context.vm.regs.eflags = DEFAULT_VM86_FLAGS; - context.vm.regs.cs = seg; - context.vm.regs.eip = off; - context.vm.regs.es = sregs->es; - context.vm.regs.ds = sregs->ds; - context.vm.regs.fs = sregs->fs; - context.vm.regs.gs = sregs->gs; - context.vm.regs.ss = context.stack_seg; - context.vm.regs.esp = context.stack_off; - pushw(DEFAULT_VM86_FLAGS); - pushw(context.ret_seg); - pushw(context.ret_off); - run_vm86(); - OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi); - sregs->es = context.vm.regs.es; - sregs->ds = context.vm.regs.ds; - sregs->fs = context.vm.regs.fs; - sregs->gs = context.vm.regs.gs; - out->x.cflag = context.vm.regs.eflags & 1; - } + unsigned int seg, off; + seg = get_int_seg(intno); + off = get_int_off(intno); + memset(&context.vm.regs, 0, sizeof(context.vm.regs)); + IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi); + context.vm.regs.eflags = DEFAULT_VM86_FLAGS; + context.vm.regs.cs = seg; + context.vm.regs.eip = off; + context.vm.regs.es = sregs->es; + context.vm.regs.ds = sregs->ds; + context.vm.regs.fs = sregs->fs; + context.vm.regs.gs = sregs->gs; + context.vm.regs.ss = context.stack_seg; + context.vm.regs.esp = context.stack_off; + pushw(DEFAULT_VM86_FLAGS); + pushw(context.ret_seg); + pushw(context.ret_off); + run_vm86(); + OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi); + sregs->es = context.vm.regs.es; + sregs->ds = context.vm.regs.ds; + sregs->fs = context.vm.regs.fs; + sregs->gs = context.vm.regs.gs; + out->x.cflag = context.vm.regs.eflags & 1; + } return out->e.eax; } @@ -1518,7 +1518,7 @@ RMSREGS *sregs) { if (!inited) - PM_init(); + PM_init(); memset(&context.vm.regs, 0, sizeof(context.vm.regs)); IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi); context.vm.regs.eflags = DEFAULT_VM86_FLAGS; @@ -1558,32 +1558,32 @@ void * PMAPI PM_allocLockedMem(uint size,ulong *physAddr,ibool contiguous,ibool below16M) { - // TODO: Implement this for Linux + /* TODO: Implement this for Linux */ return NULL; } void PMAPI PM_freeLockedMem(void *p,uint size,ibool contiguous) { - // TODO: Implement this for Linux + /* TODO: Implement this for Linux */ } void * PMAPI PM_allocPage( ibool locked) { - // TODO: Implement this for Linux + /* TODO: Implement this for Linux */ return NULL; } void PMAPI PM_freePage( void *p) { - // TODO: Implement this for Linux + /* TODO: Implement this for Linux */ } void PMAPI PM_setBankA(int bank) { if (!inited) - PM_init(); + PM_init(); memset(&context.vm.regs, 0, sizeof(context.vm.regs)); context.vm.regs.eax = 0x4F05; context.vm.regs.ebx = 0x0000; @@ -1602,7 +1602,7 @@ void PMAPI PM_setBankAB(int bank) { if (!inited) - PM_init(); + PM_init(); memset(&context.vm.regs, 0, sizeof(context.vm.regs)); context.vm.regs.eax = 0x4F05; context.vm.regs.ebx = 0x0000; @@ -1633,7 +1633,7 @@ void PMAPI PM_setCRTStart(int x,int y,int waitVRT) { if (!inited) - PM_init(); + PM_init(); memset(&context.vm.regs, 0, sizeof(context.vm.regs)); context.vm.regs.eax = 0x4F07; context.vm.regs.ebx = waitVRT; @@ -1656,14 +1656,14 @@ struct mtrr_sentry sentry; if (mtrr_fd < 0) - return PM_MTRR_ERR_NO_OS_SUPPORT; + return PM_MTRR_ERR_NO_OS_SUPPORT; sentry.base = base; sentry.size = length; sentry.type = type; if (ioctl(mtrr_fd, MTRRIOC_ADD_ENTRY, &sentry) == -1) { - // TODO: Need to decode MTRR error codes!! - return PM_MTRR_NOT_SUPPORTED; - } + /* TODO: Need to decode MTRR error codes!! */ + return PM_MTRR_NOT_SUPPORTED; + } return PM_MTRR_ERR_OK; #else return PM_MTRR_ERR_NO_OS_SUPPORT; @@ -1685,15 +1685,15 @@ struct mtrr_gentry gentry; if (mtrr_fd < 0) - return PM_MTRR_ERR_NO_OS_SUPPORT; + return PM_MTRR_ERR_NO_OS_SUPPORT; for (gentry.regnum = 0; ioctl (mtrr_fd, MTRRIOC_GET_ENTRY, &gentry) == 0; - ++gentry.regnum) { - if (gentry.size > 0) { - // WARNING: This code assumes that the types in pmapi.h match the ones - // in the Linux kernel (mtrr.h) - callback(gentry.base, gentry.size, gentry.type); - } + ++gentry.regnum) { + if (gentry.size > 0) { + /* WARNING: This code assumes that the types in pmapi.h match the ones */ + /* in the Linux kernel (mtrr.h) */ + callback(gentry.base, gentry.size, gentry.type); + } } return PM_MTRR_ERR_OK; @@ -1719,13 +1719,13 @@ * the secondary BIOS image over the top of the old one. */ if (!inited) - PM_init(); + PM_init(); if ((old_bios = PM_malloc(BIOSLen)) == NULL) - return false; + return false; if (BIOSPhysAddr != 0xC0000) { - memcpy(old_bios,bios_ptr,BIOSLen); - memcpy(bios_ptr,copyOfBIOS,BIOSLen); - } + memcpy(old_bios,bios_ptr,BIOSLen); + memcpy(bios_ptr,copyOfBIOS,BIOSLen); + } /* The interrupt vectors should already be mmap()'ed from 0-0x400 in PM_init */ Current10 = rvec[0x10]; @@ -1742,7 +1742,7 @@ /* Restore original BIOS image */ if (BIOSPhysAddr != 0xC0000) - memcpy(bios_ptr,old_bios,BIOSLen); + memcpy(bios_ptr,old_bios,BIOSLen); PM_free(old_bios); return true; } @@ -1774,7 +1774,7 @@ PM_MODULE PMAPI PM_loadLibrary( const char *szDLLName) { - // TODO: Implement this to load shared libraries! + /* TODO: Implement this to load shared libraries! */ (void)szDLLName; return NULL; } @@ -1783,7 +1783,7 @@ PM_MODULE hModule, const char *szProcName) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)hModule; (void)szProcName; return NULL; @@ -1792,19 +1792,18 @@ void PMAPI PM_freeLibrary( PM_MODULE hModule) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)hModule; } int PMAPI PM_setIOPL( int level) { - // TODO: Move the IOPL switching into this function!! + /* TODO: Move the IOPL switching into this function!! */ return level; } void PMAPI PM_flushTLB(void) { - // Do nothing on Linux. + /* Do nothing on Linux. */ } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c index e72a856..d15b07c 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c +++ b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/cpuinfo.c @@ -62,4 +62,3 @@ (t)->low = lt.LowPart; \ (t)->high = lt.HighPart; \ } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c index f93d9c2..c82648b 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c +++ b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/int86.c @@ -1,7 +1,7 @@ /**************************************************************************** * * SciTech OS Portability Manager Library -* +* * ======================================================================== * * The contents of this file are subject to the SciTech MGL Public @@ -43,7 +43,7 @@ ****************************************************************************/ ibool PMAPI PM_haveBIOSAccess(void) { - // Return false unless we have full buffer passing! + /* Return false unless we have full buffer passing! */ return false; } @@ -63,8 +63,8 @@ uint *rseg, uint *roff) { - // No buffers supported under Windows NT (Windows XP has them however if - // we ever decide to support this!) + /* No buffers supported under Windows NT (Windows XP has them however if */ + /* we ever decide to support this!) */ return NULL; } @@ -90,7 +90,7 @@ uint r_seg, uint r_off) { - // Not used for Windows NT drivers! + /* Not used for Windows NT drivers! */ return NULL; } @@ -103,7 +103,7 @@ uint *r_seg, uint *r_off) { - // Not supported in NT drivers + /* Not supported in NT drivers */ (void)size; (void)r_seg; (void)r_off; @@ -117,7 +117,7 @@ void PMAPI PM_freeRealSeg( void *mem) { - // Not supported in NT drivers + /* Not supported in NT drivers */ (void)mem; } @@ -129,7 +129,7 @@ int intno, DPMI_regs *regs) { - // Not used in NT drivers + /* Not used in NT drivers */ } /**************************************************************************** @@ -143,7 +143,7 @@ RMREGS *regs, RMSREGS *sregs) { - // TODO!! + /* TODO!! */ #if 0 CLIENT_STRUCT saveRegs; @@ -151,7 +151,7 @@ * loaded, and not statically loaded. */ if (!_PM_haveBIOS) - return; + return; TRACE("SDDHELP: Entering PM_callRealMode()\n"); Begin_Nest_V86_Exec(); @@ -174,7 +174,7 @@ RMREGS *in, RMREGS *out) { - // TODO!! + /* TODO!! */ #if 0 RMSREGS sregs = {0}; CLIENT_STRUCT saveRegs; @@ -183,9 +183,9 @@ /* Disable pass-up to our VxD handler so we directly call BIOS */ TRACE("SDDHELP: Entering PM_int86()\n"); if (disableTSRFlag) { - oldDisable = *disableTSRFlag; - *disableTSRFlag = 0; - } + oldDisable = *disableTSRFlag; + *disableTSRFlag = 0; + } Begin_Nest_V86_Exec(); LoadV86Registers(&saveRegs,in,&sregs); Exec_Int(intno); @@ -194,7 +194,7 @@ /* Re-enable pass-up to our VxD handler if previously enabled */ if (disableTSRFlag) - *disableTSRFlag = oldDisable; + *disableTSRFlag = oldDisable; TRACE("SDDHELP: Exiting PM_int86()\n"); #else @@ -214,7 +214,7 @@ RMREGS *out, RMSREGS *sregs) { - // TODO!! + /* TODO!! */ #if 0 CLIENT_STRUCT saveRegs; ushort oldDisable; @@ -223,16 +223,16 @@ * loaded, and not statically loaded. */ if (!_PM_haveBIOS) { - *out = *in; - return out->x.ax; - } + *out = *in; + return out->x.ax; + } /* Disable pass-up to our VxD handler so we directly call BIOS */ TRACE("SDDHELP: Entering PM_int86x()\n"); if (disableTSRFlag) { - oldDisable = *disableTSRFlag; - *disableTSRFlag = 0; - } + oldDisable = *disableTSRFlag; + *disableTSRFlag = 0; + } Begin_Nest_V86_Exec(); LoadV86Registers(&saveRegs,in,sregs); Exec_Int(intno); @@ -241,7 +241,7 @@ /* Re-enable pass-up to our VxD handler if previously enabled */ if (disableTSRFlag) - *disableTSRFlag = oldDisable; + *disableTSRFlag = oldDisable; TRACE("SDDHELP: Exiting PM_int86x()\n"); #else @@ -249,4 +249,3 @@ #endif return out->x.ax; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c index bc6b427..9cd5204 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c +++ b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/irq.c @@ -1,7 +1,7 @@ /**************************************************************************** * * SciTech OS Portability Manager Library -* +* * ======================================================================== * * The contents of this file are subject to the SciTech MGL Public @@ -67,41 +67,41 @@ int frequency) { static short convert[] = { - 8192, - 4096, - 2048, - 1024, - 512, - 256, - 128, - 64, - 32, - 16, - 8, - 4, - 2, - -1, - }; + 8192, + 4096, + 2048, + 1024, + 512, + 256, + 128, + 64, + 32, + 16, + 8, + 4, + 2, + -1, + }; int i; /* First clear any pending RTC timeout if not cleared */ _PM_readCMOS(0x0C); if (frequency == 0) { - /* Disable RTC timout */ - _PM_writeCMOS(0x0A,(uchar)_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,(uchar)(_PM_oldCMOSRegB & 0x0F)); - } + /* Disable RTC timout */ + _PM_writeCMOS(0x0A,(uchar)_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,(uchar)(_PM_oldCMOSRegB & 0x0F)); + } else { - /* Convert frequency value to RTC clock indexes */ - for (i = 0; convert[i] != -1; i++) { - if (convert[i] == frequency) - break; - } + /* Convert frequency value to RTC clock indexes */ + for (i = 0; convert[i] != -1; i++) { + if (convert[i] == frequency) + break; + } - /* Set RTC timout value and enable timeout */ - _PM_writeCMOS(0x0A,(uchar)(0x20 | (i+3))); - _PM_writeCMOS(0x0B,(uchar)((_PM_oldCMOSRegB & 0x0F) | 0x40)); - } + /* Set RTC timout value and enable timeout */ + _PM_writeCMOS(0x0A,(uchar)(0x20 | (i+3))); + _PM_writeCMOS(0x0B,(uchar)((_PM_oldCMOSRegB & 0x0F) | 0x40)); + } } ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency) @@ -130,14 +130,13 @@ void PMAPI PM_restoreRealTimeClockHandler(void) { if (_PM_rtcHandler) { - /* Restore CMOS registers and mask RTC clock */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); - PM_outpb(0xA1,(uchar)((PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE))); + /* Restore CMOS registers and mask RTC clock */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); + PM_outpb(0xA1,(uchar)((PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE))); - /* Restore the interrupt vector */ - _PM_restoreISR(RTC_idtEntry, &_PM_prevRTC); - _PM_rtcHandler = NULL; - } + /* Restore the interrupt vector */ + _PM_restoreISR(RTC_idtEntry, &_PM_prevRTC); + _PM_rtcHandler = NULL; + } } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c index b30d2be..3128c6a 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c +++ b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/mem.c @@ -1,7 +1,7 @@ /**************************************************************************** * * SciTech OS Portability Manager Library -* +* * ======================================================================== * * The contents of this file are subject to the SciTech MGL Public @@ -70,7 +70,7 @@ ulong PMAPI _PM_getPDB(void); -// Page table entry flags +/* Page table entry flags */ #define PAGE_FLAGS_PRESENT 0x00000001 #define PAGE_FLAGS_WRITEABLE 0x00000002 @@ -100,14 +100,14 @@ ulong length = limit+1; PHYSICAL_ADDRESS paIoBase = {0}; - // NT loves large Ints + /* NT loves large Ints */ paIoBase = RtlConvertUlongToLargeInteger( base ); - // Map IO space into Kernel + /* Map IO space into Kernel */ if (isCached) - return (ULONG)MmMapIoSpace(paIoBase, length, MmCached ); + return (ULONG)MmMapIoSpace(paIoBase, length, MmCached ); else - return (ULONG)MmMapIoSpace(paIoBase, length, MmNonCached ); + return (ULONG)MmMapIoSpace(paIoBase, length, MmNonCached ); } /**************************************************************************** @@ -135,7 +135,7 @@ mask &= ~PAGE_FLAGS_USER; bits |= PAGE_FLAGS_USER; } - + /* Disable PCD bit if page table entry should be uncached */ if (!isCached) { mask &= ~(PAGE_FLAGS_CACHE_DISABLE | PAGE_FLAGS_WRITE_THROUGH); @@ -144,30 +144,30 @@ pPDB = (ulong*)_PM_mapPhysicalToLinear(_PM_getPDB(),0xFFF,true); if (pPDB) { - startPDB = (linear >> 22) & 0x3FF; - startPage = (linear >> 12) & 0x3FF; - endPDB = ((linear+limit) >> 22) & 0x3FF; - endPage = ((linear+limit) >> 12) & 0x3FF; - for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { - // Set the bits in the page directory entry - required as per - // Pentium 4 manual. This also takes care of the 4MB page entries - pPDB[iPDB] = (pPDB[iPDB] & mask) | bits; - if (!(pPDB[iPDB] & PAGE_FLAGS_4MB)) { - // If we are dealing with 4KB pages then we need to iterate - // through each of the page table entries - pageTable = pPDB[iPDB] & ~0xFFF; - pPageTable = (ulong*)_PM_mapPhysicalToLinear(pageTable,0xFFF,true); - start = (iPDB == startPDB) ? startPage : 0; - end = (iPDB == endPDB) ? endPage : 0x3FF; - for (iPage = start; iPage <= end; iPage++) { - pPageTable[iPage] = (pPageTable[iPage] & mask) | bits; - } - MmUnmapIoSpace(pPageTable,0xFFF); - } - } - MmUnmapIoSpace(pPDB,0xFFF); - PM_flushTLB(); - } + startPDB = (linear >> 22) & 0x3FF; + startPage = (linear >> 12) & 0x3FF; + endPDB = ((linear+limit) >> 22) & 0x3FF; + endPage = ((linear+limit) >> 12) & 0x3FF; + for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { + /* Set the bits in the page directory entry - required as per */ + /* Pentium 4 manual. This also takes care of the 4MB page entries */ + pPDB[iPDB] = (pPDB[iPDB] & mask) | bits; + if (!(pPDB[iPDB] & PAGE_FLAGS_4MB)) { + /* If we are dealing with 4KB pages then we need to iterate */ + /* through each of the page table entries */ + pageTable = pPDB[iPDB] & ~0xFFF; + pPageTable = (ulong*)_PM_mapPhysicalToLinear(pageTable,0xFFF,true); + start = (iPDB == startPDB) ? startPage : 0; + end = (iPDB == endPDB) ? endPage : 0x3FF; + for (iPage = start; iPage <= end; iPage++) { + pPageTable[iPage] = (pPageTable[iPage] & mask) | bits; + } + MmUnmapIoSpace(pPageTable,0xFFF); + } + } + MmUnmapIoSpace(pPDB,0xFFF); + PM_flushTLB(); + } } /**************************************************************************** @@ -183,24 +183,24 @@ { int i; - // First find a free slot in our shared memory table + /* First find a free slot in our shared memory table */ for (i = 0; i < MAX_MEMORY_SHARED; i++) { - if (shared[i].linear == 0) - break; - } + if (shared[i].linear == 0) + break; + } if (i == MAX_MEMORY_SHARED) - return NULL; + return NULL; - // Allocate the paged pool + /* Allocate the paged pool */ shared[i].linear = ExAllocatePool(PagedPool, size); - // Create a list to manage this allocation + /* Create a list to manage this allocation */ shared[i].pMdl = IoAllocateMdl(shared[i].linear,size,FALSE,FALSE,(PIRP) NULL); - // Lock this allocation in memory + /* Lock this allocation in memory */ MmProbeAndLockPages(shared[i].pMdl,KernelMode,IoModifyAccess); - // Modify bits to grant user access + /* Modify bits to grant user access */ _PM_adjustPageTables((ulong)shared[i].linear, size, true, true); return (void*)shared[i].linear; } @@ -214,23 +214,23 @@ { int i; - // Find a shared memory block in our table and free it + /* Find a shared memory block in our table and free it */ for (i = 0; i < MAX_MEMORY_SHARED; i++) { - if (shared[i].linear == p) { - // Unlock what we locked - MmUnlockPages(shared[i].pMdl); + if (shared[i].linear == p) { + /* Unlock what we locked */ + MmUnlockPages(shared[i].pMdl); - // Free our MDL - IoFreeMdl(shared[i].pMdl); + /* Free our MDL */ + IoFreeMdl(shared[i].pMdl); - // Free our mem - ExFreePool(shared[i].linear); + /* Free our mem */ + ExFreePool(shared[i].linear); - // Flag that is entry is available - shared[i].linear = 0; - break; - } - } + /* Flag that is entry is available */ + shared[i].linear = 0; + break; + } + } } /**************************************************************************** @@ -245,27 +245,27 @@ ulong linear,length = limit+1; int i; - // Search table of existing mappings to see if we have already mapped - // a region of memory that will serve this purpose. + /* Search table of existing mappings to see if we have already mapped */ + /* a region of memory that will serve this purpose. */ for (i = 0; i < numMappings; i++) { - if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached) { - _PM_adjustPageTables((ulong)maps[i].linear, maps[i].length, true, isCached); - return (void*)maps[i].linear; - } - } + if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached) { + _PM_adjustPageTables((ulong)maps[i].linear, maps[i].length, true, isCached); + return (void*)maps[i].linear; + } + } if (numMappings == MAX_MEMORY_MAPPINGS) - return NULL; + return NULL; - // We did not find any previously mapped memory region, so maps it in. + /* We did not find any previously mapped memory region, so maps it in. */ if ((linear = _PM_mapPhysicalToLinear(base,limit,isCached)) == 0xFFFFFFFF) - return NULL; + return NULL; maps[numMappings].physical = base; maps[numMappings].length = length; maps[numMappings].linear = linear; maps[numMappings].isCached = isCached; numMappings++; - // Grant user access to this I/O space + /* Grant user access to this I/O space */ _PM_adjustPageTables((ulong)linear, length, true, isCached); return (void*)linear; } @@ -278,8 +278,8 @@ void *ptr, ulong limit) { - // We don't free the memory mappings in here because we cache all - // the memory mappings we create in the system for later use. + /* We don't free the memory mappings in here because we cache all */ + /* the memory mappings we create in the system for later use. */ } /**************************************************************************** @@ -291,7 +291,7 @@ int i; for (i = 0; i < numMappings; i++) - MmUnmapIoSpace((void *)maps[i].linear,maps[i].length); + MmUnmapIoSpace((void *)maps[i].linear,maps[i].length); } /**************************************************************************** @@ -320,10 +320,10 @@ ulong linear = (ulong)p & ~0xFFF; for (i = (length + 0xFFF) >> 12; i > 0; i--) { - if ((*physAddress++ = PM_getPhysicalAddr((void*)linear)) == 0xFFFFFFFF) - return false; - linear += 4096; - } + if ((*physAddress++ = PM_getPhysicalAddr((void*)linear)) == 0xFFFFFFFF) + return false; + linear += 4096; + } return true; } @@ -340,58 +340,58 @@ int i; PHYSICAL_ADDRESS paOurAddress; - // First find a free slot in our shared memory table + /* First find a free slot in our shared memory table */ for (i = 0; i < MAX_MEMORY_LOCKED; i++) { - if (locked[i].linear == 0) - break; - } + if (locked[i].linear == 0) + break; + } if (i == MAX_MEMORY_LOCKED) - return NULL; + return NULL; - // HighestAcceptableAddress - Specifies the highest valid physical address - // the driver can use. For example, if a device can only reference physical - // memory in the lower 16MB, this value would be set to 0x00000000FFFFFF. + /* HighestAcceptableAddress - Specifies the highest valid physical address */ + /* the driver can use. For example, if a device can only reference physical */ + /* memory in the lower 16MB, this value would be set to 0x00000000FFFFFF. */ paOurAddress.HighPart = 0; if (below16M) - paOurAddress.LowPart = 0x00FFFFFF; + paOurAddress.LowPart = 0x00FFFFFF; else - paOurAddress.LowPart = 0xFFFFFFFF; + paOurAddress.LowPart = 0xFFFFFFFF; if (contiguous) { - // Allocate from the non-paged pool (unfortunately 4MB pages) - locked[i].linear = MmAllocateContiguousMemory(size, paOurAddress); - if (!locked[i].linear) - return NULL; + /* Allocate from the non-paged pool (unfortunately 4MB pages) */ + locked[i].linear = MmAllocateContiguousMemory(size, paOurAddress); + if (!locked[i].linear) + return NULL; - // Flag no MDL - locked[i].pMdl = NULL; + /* Flag no MDL */ + locked[i].pMdl = NULL; - // Map the physical address for the memory so we can manage - // the page tables in 4KB chunks mapped into user space. + /* Map the physical address for the memory so we can manage */ + /* the page tables in 4KB chunks mapped into user space. */ - // TODO: Map this with the physical address to the linear addresss - locked[i].mmIoMapped = locked[i].linear; + /* TODO: Map this with the physical address to the linear addresss */ + locked[i].mmIoMapped = locked[i].linear; - // Modify bits to grant user access, flag not cached - _PM_adjustPageTables((ulong)locked[i].mmIoMapped, size, true, false); - return (void*)locked[i].mmIoMapped; - } + /* Modify bits to grant user access, flag not cached */ + _PM_adjustPageTables((ulong)locked[i].mmIoMapped, size, true, false); + return (void*)locked[i].mmIoMapped; + } else { - // Allocate from the paged pool - locked[i].linear = ExAllocatePool(PagedPool, size); - if (!locked[i].linear) - return NULL; + /* Allocate from the paged pool */ + locked[i].linear = ExAllocatePool(PagedPool, size); + if (!locked[i].linear) + return NULL; - // Create a list to manage this allocation - locked[i].pMdl = IoAllocateMdl(locked[i].linear,size,FALSE,FALSE,(PIRP) NULL); + /* Create a list to manage this allocation */ + locked[i].pMdl = IoAllocateMdl(locked[i].linear,size,FALSE,FALSE,(PIRP) NULL); - // Lock this allocation in memory - MmProbeAndLockPages(locked[i].pMdl,KernelMode,IoModifyAccess); + /* Lock this allocation in memory */ + MmProbeAndLockPages(locked[i].pMdl,KernelMode,IoModifyAccess); - // Modify bits to grant user access, flag not cached - _PM_adjustPageTables((ulong)locked[i].linear, size, true, false); - return (void*)locked[i].linear; - } + /* Modify bits to grant user access, flag not cached */ + _PM_adjustPageTables((ulong)locked[i].linear, size, true, false); + return (void*)locked[i].linear; + } } /**************************************************************************** @@ -407,27 +407,27 @@ /* Find a locked memory block in our table and free it */ for (i = 0; i < MAX_MEMORY_LOCKED; i++) { - if (locked[i].linear == p) { - // An Mdl indicates that we used the paged pool, and locked it, - // so now we have to unlock, free the MDL, and free paged - if (locked[i].pMdl) { - // Unlock what we locked and free the Mdl - MmUnlockPages(locked[i].pMdl); - IoFreeMdl(locked[i].pMdl); - ExFreePool(locked[i].linear); - } - else { - // TODO: Free the mmIoMap mapping for the memory! + if (locked[i].linear == p) { + /* An Mdl indicates that we used the paged pool, and locked it, */ + /* so now we have to unlock, free the MDL, and free paged */ + if (locked[i].pMdl) { + /* Unlock what we locked and free the Mdl */ + MmUnlockPages(locked[i].pMdl); + IoFreeMdl(locked[i].pMdl); + ExFreePool(locked[i].linear); + } + else { + /* TODO: Free the mmIoMap mapping for the memory! */ - // Free non-paged pool - MmFreeContiguousMemory(locked[i].linear); - } + /* Free non-paged pool */ + MmFreeContiguousMemory(locked[i].linear); + } - // Flag that is entry is available - locked[i].linear = 0; - break; - } - } + /* Flag that is entry is available */ + locked[i].linear = 0; + break; + } + } } /**************************************************************************** @@ -437,11 +437,11 @@ void * PMAPI PM_allocPage( ibool locked) { - // Allocate the memory from the non-paged pool if we want the memory - // to be locked. + /* Allocate the memory from the non-paged pool if we want the memory */ + /* to be locked. */ return ExAllocatePool( - locked ? NonPagedPoolCacheAligned : PagedPoolCacheAligned, - PAGE_SIZE); + locked ? NonPagedPoolCacheAligned : PagedPoolCacheAligned, + PAGE_SIZE); } /**************************************************************************** @@ -465,11 +465,11 @@ { MDL *pMdl; - // Create a list to manage this allocation + /* Create a list to manage this allocation */ if ((pMdl = IoAllocateMdl(p,len,FALSE,FALSE,(PIRP)NULL)) == NULL) - return false; + return false; - // Lock this allocation in memory + /* Lock this allocation in memory */ MmProbeAndLockPages(pMdl,KernelMode,IoModifyAccess); *((PMDL*)(&lh->h)) = pMdl; return true; @@ -485,11 +485,11 @@ PM_lockHandle *lh) { if (p && lh) { - // Unlock what we locked - MDL *pMdl = *((PMDL*)(&lh->h)); - MmUnlockPages(pMdl); - IoFreeMdl(pMdl); - } + /* Unlock what we locked */ + MDL *pMdl = *((PMDL*)(&lh->h)); + MmUnlockPages(pMdl); + IoFreeMdl(pMdl); + } return true; } @@ -516,4 +516,3 @@ { return PM_unlockDataPages((void*)p,len,lh); } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h index 3f747bb..65b7bae 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h +++ b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/oshdr.h @@ -42,5 +42,4 @@ UNICODE_STRING * _PM_CStringToUnicodeString(const char *cstr); void _PM_FreeUnicodeString(UNICODE_STRING *uniStr); -#endif // __NTDRV_OSHDR_H - +#endif /* __NTDRV_OSHDR_H */ diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c index d4bbe22..c660631 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/pm.c @@ -1,7 +1,7 @@ /**************************************************************************** * * SciTech OS Portability Manager Library -* +* * ======================================================================== * * The contents of this file are subject to the SciTech MGL Public @@ -88,9 +88,9 @@ { uint pos = strlen(s); if (s[pos-1] != '\\') { - s[pos] = '\\'; - s[pos+1] = '\0'; - } + s[pos] = '\\'; + s[pos+1] = '\0'; + } } /**************************************************************************** @@ -116,25 +116,25 @@ ULONG len; if (fatalErrorCleanup) - fatalErrorCleanup(); + fatalErrorCleanup(); -#ifdef DBG // Send output to debugger, just return so as not to force a reboot -#pragma message("INFO: building for debug, PM_fatalError() re-routed") - DBGMSG2("SDDHELP> PM_fatalError(): ERROR: %s\n", msg); +#ifdef DBG /* Send output to debugger, just return so as not to force a reboot */ +#pragma message("INFO: building for debug, PM_fatalError() re-routed") + DBGMSG2("SDDHELP> PM_fatalError(): ERROR: %s\n", msg); return ; #endif - // KeBugCheckEx brings down the system in a controlled - // manner when the caller discovers an unrecoverable - // inconsistency that would corrupt the system if - // the caller continued to run. - // - // hack - dump the first 20 chars in hex using the variables - // provided - Each ULONG is equal to four characters... + /* KeBugCheckEx brings down the system in a controlled */ + /* manner when the caller discovers an unrecoverable */ + /* inconsistency that would corrupt the system if */ + /* the caller continued to run. */ + /* */ + /* hack - dump the first 20 chars in hex using the variables */ + /* provided - Each ULONG is equal to four characters... */ for(len = 0; len < 20; len++) - if (msg[len] == (char)0) - break; + if (msg[len] == (char)0) + break; - // This looks bad but it's quick and reliable... + /* This looks bad but it's quick and reliable... */ p = (char *)&BugCheckCode; if(len > 0) p[3] = msg[0]; if(len > 1) p[2] = msg[1]; @@ -165,7 +165,7 @@ if(len > 18) p[1] = msg[18]; if(len > 19) p[0] = msg[19]; - // Halt the system! + /* Halt the system! */ KeBugCheckEx(BugCheckCode, MoreBugCheckData[0], MoreBugCheckData[1], MoreBugCheckData[2], MoreBugCheckData[3]); } @@ -209,50 +209,50 @@ STRING stringdata; UNICODE_STRING unidata; - // Convert strings to UniCode + /* Convert strings to UniCode */ status = false; if ((uniKey = _PM_CStringToUnicodeString(szKey)) == NULL) - goto Exit; + goto Exit; if ((uniValue = _PM_CStringToUnicodeString(szValue)) == NULL) - goto Exit; + goto Exit; - // Open the key + /* Open the key */ InitializeObjectAttributes( &keyAttributes, - uniKey, - OBJ_CASE_INSENSITIVE, - NULL, - NULL ); + uniKey, + OBJ_CASE_INSENSITIVE, + NULL, + NULL ); rval = ZwOpenKey( &Handle, - KEY_ALL_ACCESS, - &keyAttributes ); + KEY_ALL_ACCESS, + &keyAttributes ); if (!NT_SUCCESS(rval)) - goto Exit; + goto Exit; - // Query the value + /* Query the value */ length = sizeof (KEY_VALUE_FULL_INFORMATION) - + size * sizeof(WCHAR); + + size * sizeof(WCHAR); if ((fullInfo = ExAllocatePool (PagedPool, length)) == NULL) - goto Exit; + goto Exit; RtlZeroMemory(fullInfo, length); rval = ZwQueryValueKey (Handle, - uniValue, - KeyValueFullInformation, - fullInfo, - length, - &length); + uniValue, + KeyValueFullInformation, + fullInfo, + length, + &length); if (NT_SUCCESS (rval)) { - // Create the UniCode string so we can convert it - unidata.Buffer = (PWCHAR)(((PCHAR)fullInfo) + fullInfo->DataOffset); - unidata.Length = (USHORT)fullInfo->DataLength; - unidata.MaximumLength = (USHORT)fullInfo->DataLength + sizeof(WCHAR); + /* Create the UniCode string so we can convert it */ + unidata.Buffer = (PWCHAR)(((PCHAR)fullInfo) + fullInfo->DataOffset); + unidata.Length = (USHORT)fullInfo->DataLength; + unidata.MaximumLength = (USHORT)fullInfo->DataLength + sizeof(WCHAR); - // Convert unicode univalue to ansi string. - rval = RtlUnicodeStringToAnsiString(&stringdata, &unidata, TRUE); - if (NT_SUCCESS(rval)) { - strcpy(value,stringdata.Buffer); - status = true; - } - } + /* Convert unicode univalue to ansi string. */ + rval = RtlUnicodeStringToAnsiString(&stringdata, &unidata, TRUE); + if (NT_SUCCESS(rval)) { + strcpy(value,stringdata.Buffer); + status = true; + } + } Exit: if (fullInfo) ExFreePool(fullInfo); @@ -269,7 +269,7 @@ { char path[256]; if (REG_queryString(szNTWindowsKey,szNTSystemRoot,path,sizeof(path))) - return 'c'; + return 'c'; return path[0]; } @@ -291,12 +291,12 @@ static char path[256]; if (strlen(_PM_nucleusPath) > 0) { - strcpy(path,_PM_nucleusPath); - PM_backslash(path); - return path; - } + strcpy(path,_PM_nucleusPath); + PM_backslash(path); + return path; + } if (!REG_queryString(szNTWindowsKey,szNTSystemRoot,path,sizeof(path))) - strcpy(path,"c:\\winnt"); + strcpy(path,"c:\\winnt"); PM_backslash(path); strcat(path,"system32\\nucleus"); return path; @@ -333,9 +333,9 @@ static char name[256]; if (REG_queryString(szMachineNameKey,szMachineName,name,sizeof(name))) - return name; + return name; if (REG_queryString(szMachineNameKeyNT,szMachineName,name,sizeof(name))) - return name; + return name; return "Unknown"; } @@ -345,7 +345,7 @@ ****************************************************************************/ int PMAPI PM_kbhit(void) { - // Not used in NT drivers + /* Not used in NT drivers */ return true; } @@ -355,7 +355,7 @@ ****************************************************************************/ int PMAPI PM_getch(void) { - // Not used in NT drivers + /* Not used in NT drivers */ return 0xD; } @@ -372,7 +372,7 @@ int bpp, ibool fullScreen) { - // Not used in NT drivers + /* Not used in NT drivers */ (void)hwndUser; (void)device; (void)xRes; @@ -388,7 +388,7 @@ ****************************************************************************/ int PMAPI PM_getConsoleStateSize(void) { - // Not used in NT drivers + /* Not used in NT drivers */ return 1; } @@ -400,7 +400,7 @@ void *stateBuf, PM_HWND hwndConsole) { - // Not used in NT drivers + /* Not used in NT drivers */ (void)stateBuf; (void)hwndConsole; } @@ -412,7 +412,7 @@ void PMAPI PM_setSuspendAppCallback( PM_saveState_cb saveState) { - // Not used in NT drivers + /* Not used in NT drivers */ (void)saveState; } @@ -424,7 +424,7 @@ const void *stateBuf, PM_HWND hwndConsole) { - // Not used in NT drivers + /* Not used in NT drivers */ (void)stateBuf; (void)hwndConsole; } @@ -436,7 +436,7 @@ void PMAPI PM_closeConsole( PM_HWND hwndConsole) { - // Not used in NT drivers + /* Not used in NT drivers */ (void)hwndConsole; } @@ -475,7 +475,7 @@ void *base, ulong limit) { - // Not used anymore + /* Not used anymore */ (void)base; (void)limit; return NULL; @@ -491,7 +491,7 @@ void *mappedBIOS, ulong BIOSLen) { - // This may not be possible in NT and should be done by the OS anyway + /* This may not be possible in NT and should be done by the OS anyway */ (void)axVal; (void)BIOSPhysAddr; (void)mappedBIOS; @@ -505,7 +505,7 @@ ****************************************************************************/ void * PMAPI PM_getBIOSPointer(void) { - // Note that on NT this probably does not do what we expect! + /* Note that on NT this probably does not do what we expect! */ return PM_mapPhysicalAddr(0x400, 0x1000, true); } @@ -525,7 +525,7 @@ void PMAPI PM_sleep( ulong milliseconds) { - // We never use this in NT drivers + /* We never use this in NT drivers */ (void)milliseconds; } @@ -535,14 +535,14 @@ ****************************************************************************/ int PMAPI PM_getCOMPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - case 2: return 0x3E8; - case 3: return 0x2E8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + case 2: return 0x3E8; + case 3: return 0x2E8; + } return 0; } @@ -552,13 +552,13 @@ ****************************************************************************/ int PMAPI PM_getLPTPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -580,7 +580,7 @@ PM_MODULE PMAPI PM_loadLibrary( const char *szDLLName) { - // Not used in NT drivers + /* Not used in NT drivers */ (void)szDLLName; return NULL; } @@ -593,7 +593,7 @@ PM_MODULE hModule, const char *szProcName) { - // Not used in NT drivers + /* Not used in NT drivers */ (void)hModule; (void)szProcName; return NULL; @@ -606,7 +606,7 @@ void PMAPI PM_freeLibrary( PM_MODULE hModule) { - // Not used in NT drivers + /* Not used in NT drivers */ (void)hModule; } @@ -618,9 +618,9 @@ const char *filename, PM_findData *findData) { - // TODO: This function should start a directory enumeration search - // given the filename (with wildcards). The data should be - // converted and returned in the findData standard form. + /* TODO: This function should start a directory enumeration search */ + /* given the filename (with wildcards). The data should be */ + /* converted and returned in the findData standard form. */ (void)filename; (void)findData; return PM_FILE_INVALID; @@ -634,10 +634,10 @@ void *handle, PM_findData *findData) { - // TODO: This function should find the next file in directory enumeration - // search given the search criteria defined in the call to - // PM_findFirstFile. The data should be converted and returned - // in the findData standard form. + /* TODO: This function should find the next file in directory enumeration */ + /* search given the search criteria defined in the call to */ + /* PM_findFirstFile. The data should be converted and returned */ + /* in the findData standard form. */ (void)handle; (void)findData; return false; @@ -650,8 +650,8 @@ void PMAPI PM_findClose( void *handle) { - // TODO: This function should close the find process. This may do - // nothing for some OS'es. + /* TODO: This function should close the find process. This may do */ + /* nothing for some OS'es. */ (void)handle; } @@ -671,7 +671,7 @@ ibool PMAPI PM_driveValid( char drive) { - // Not supported in NT drivers + /* Not supported in NT drivers */ (void)drive; return false; } @@ -687,7 +687,7 @@ char *dir, int len) { - // Not supported in NT drivers + /* Not supported in NT drivers */ (void)drive; (void)dir; (void)len; @@ -733,67 +733,67 @@ char kernelFilename[PM_MAX_PATH+5]; ULONG FileAttributes = 0; - // Convert file attribute flags + /* Convert file attribute flags */ if (attrib & PM_FILE_READONLY) - FileAttributes |= FILE_ATTRIBUTE_READONLY; + FileAttributes |= FILE_ATTRIBUTE_READONLY; if (attrib & PM_FILE_ARCHIVE) - FileAttributes |= FILE_ATTRIBUTE_ARCHIVE; + FileAttributes |= FILE_ATTRIBUTE_ARCHIVE; if (attrib & PM_FILE_HIDDEN) - FileAttributes |= FILE_ATTRIBUTE_HIDDEN; + FileAttributes |= FILE_ATTRIBUTE_HIDDEN; if (attrib & PM_FILE_SYSTEM) - FileAttributes |= FILE_ATTRIBUTE_SYSTEM; + FileAttributes |= FILE_ATTRIBUTE_SYSTEM; - // Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" + /* Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" */ strcpy(kernelFilename, "\\??\\"); strcat(kernelFilename, filename); - // Convert filename string to ansi string + /* Convert filename string to ansi string */ if ((uniFile = _PM_CStringToUnicodeString(kernelFilename)) == NULL) - goto Exit; + goto Exit; - // Must open a file to query it's attributes + /* Must open a file to query it's attributes */ InitializeObjectAttributes (&ObjectAttributes, - uniFile, - OBJ_CASE_INSENSITIVE, - NULL, - NULL ); + uniFile, + OBJ_CASE_INSENSITIVE, + NULL, + NULL ); status = ZwCreateFile( &FileHandle, - DesiredAccess | SYNCHRONIZE, - &ObjectAttributes, - &IoStatusBlock, - NULL, //AllocationSize OPTIONAL, - FILE_ATTRIBUTE_NORMAL, - ShareAccess, - CreateDisposition, - FILE_RANDOM_ACCESS, //CreateOptions, - NULL, //EaBuffer OPTIONAL, - 0 //EaLength (required if EaBuffer) - ); + DesiredAccess | SYNCHRONIZE, + &ObjectAttributes, + &IoStatusBlock, + NULL, /*AllocationSize OPTIONAL, */ + FILE_ATTRIBUTE_NORMAL, + ShareAccess, + CreateDisposition, + FILE_RANDOM_ACCESS, /*CreateOptions, */ + NULL, /*EaBuffer OPTIONAL, */ + 0 /*EaLength (required if EaBuffer) */ + ); if (!NT_SUCCESS (status)) - goto Exit; + goto Exit; - // Query timestamps + /* Query timestamps */ status = ZwQueryInformationFile(FileHandle, - &IoStatusBlock, - &FileBasic, - sizeof(FILE_BASIC_INFORMATION), - FileBasicInformation - ); + &IoStatusBlock, + &FileBasic, + sizeof(FILE_BASIC_INFORMATION), + FileBasicInformation + ); if (!NT_SUCCESS (status)) - goto Exit; + goto Exit; - // Change the four bits we change + /* Change the four bits we change */ FileBasic.FileAttributes &= ~(FILE_ATTRIBUTE_READONLY | FILE_ATTRIBUTE_ARCHIVE - | FILE_ATTRIBUTE_HIDDEN | FILE_ATTRIBUTE_SYSTEM); + | FILE_ATTRIBUTE_HIDDEN | FILE_ATTRIBUTE_SYSTEM); FileBasic.FileAttributes |= FileAttributes; - // Set timestamps + /* Set timestamps */ ZwSetInformationFile( FileHandle, - &IoStatusBlock, - &FileBasic, - sizeof(FILE_BASIC_INFORMATION), - FileBasicInformation - ); + &IoStatusBlock, + &FileBasic, + sizeof(FILE_BASIC_INFORMATION), + FileBasicInformation + ); Exit: if (FileHandle) ZwClose(FileHandle); @@ -821,54 +821,54 @@ ULONG FileAttributes = 0; uint retval = 0; - // Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" + /* Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" */ strcpy(kernelFilename, "\\??\\"); strcat(kernelFilename, filename); - // Convert filename string to ansi string + /* Convert filename string to ansi string */ if ((uniFile = _PM_CStringToUnicodeString(kernelFilename)) == NULL) - goto Exit; + goto Exit; - // Must open a file to query it's attributes + /* Must open a file to query it's attributes */ InitializeObjectAttributes (&ObjectAttributes, - uniFile, - OBJ_CASE_INSENSITIVE, - NULL, - NULL ); + uniFile, + OBJ_CASE_INSENSITIVE, + NULL, + NULL ); status = ZwCreateFile( &FileHandle, - DesiredAccess | SYNCHRONIZE, - &ObjectAttributes, - &IoStatusBlock, - NULL, //AllocationSize OPTIONAL, - FILE_ATTRIBUTE_NORMAL, - ShareAccess, - CreateDisposition, - FILE_RANDOM_ACCESS, //CreateOptions, - NULL, //EaBuffer OPTIONAL, - 0 //EaLength (required if EaBuffer) - ); + DesiredAccess | SYNCHRONIZE, + &ObjectAttributes, + &IoStatusBlock, + NULL, /*AllocationSize OPTIONAL, */ + FILE_ATTRIBUTE_NORMAL, + ShareAccess, + CreateDisposition, + FILE_RANDOM_ACCESS, /*CreateOptions, */ + NULL, /*EaBuffer OPTIONAL, */ + 0 /*EaLength (required if EaBuffer) */ + ); if (!NT_SUCCESS (status)) - goto Exit; + goto Exit; - // Query timestamps + /* Query timestamps */ status = ZwQueryInformationFile(FileHandle, - &IoStatusBlock, - &FileBasic, - sizeof(FILE_BASIC_INFORMATION), - FileBasicInformation - ); + &IoStatusBlock, + &FileBasic, + sizeof(FILE_BASIC_INFORMATION), + FileBasicInformation + ); if (!NT_SUCCESS (status)) - goto Exit; + goto Exit; - // Translate the file attributes + /* Translate the file attributes */ if (FileBasic.FileAttributes & FILE_ATTRIBUTE_READONLY) - retval |= PM_FILE_READONLY; + retval |= PM_FILE_READONLY; if (FileBasic.FileAttributes & FILE_ATTRIBUTE_ARCHIVE) - retval |= PM_FILE_ARCHIVE; + retval |= PM_FILE_ARCHIVE; if (FileBasic.FileAttributes & FILE_ATTRIBUTE_HIDDEN) - retval |= PM_FILE_HIDDEN; + retval |= PM_FILE_HIDDEN; if (FileBasic.FileAttributes & FILE_ATTRIBUTE_SYSTEM) - retval |= PM_FILE_SYSTEM; + retval |= PM_FILE_SYSTEM; Exit: if (FileHandle) ZwClose(FileHandle); @@ -883,7 +883,7 @@ ibool PMAPI PM_mkdir( const char *filename) { - // Not supported in NT drivers + /* Not supported in NT drivers */ (void)filename; return false; } @@ -895,7 +895,7 @@ ibool PMAPI PM_rmdir( const char *filename) { - // Not supported in NT drivers + /* Not supported in NT drivers */ (void)filename; return false; } @@ -909,7 +909,7 @@ ibool gmTime, PM_time *time) { - // Not supported in NT drivers + /* Not supported in NT drivers */ (void)filename; (void)gmTime; (void)time; @@ -925,10 +925,9 @@ ibool gmTime, PM_time *time) { - // Not supported in NT drivers + /* Not supported in NT drivers */ (void)filename; (void)gmTime; (void)time; return false; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c index 8562152..658f1c8 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c +++ b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdio.c @@ -42,7 +42,7 @@ const char *filename, const char *mode) { - ACCESS_MASK DesiredAccess; // for ZwCreateFile... + ACCESS_MASK DesiredAccess; /* for ZwCreateFile... */ OBJECT_ATTRIBUTES ObjectAttributes; ULONG ShareAccess; ULONG CreateDisposition; @@ -56,86 +56,86 @@ char kernelFilename[PM_MAX_PATH+5]; FILE *f; - // Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" + /* Add prefix for addressing the file system. "\??\" is short for "\DosDevices\" */ strcpy(kernelFilename, "\\??\\"); strcat(kernelFilename, filename); if ((f = PM_malloc(sizeof(FILE))) == NULL) - goto Error; + goto Error; f->offset = 0; f->text = (mode[1] == 't' || mode[2] == 't'); f->writemode = (mode[0] == 'w') || (mode[0] == 'a'); if (mode[0] == 'r') { - // omode = OPEN_ACCESS_READONLY | OPEN_SHARE_COMPATIBLE; - // action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_FAIL; - DesiredAccess = GENERIC_READ; - ShareAccess = FILE_SHARE_READ | FILE_SHARE_WRITE; - CreateDisposition = FILE_OPEN; - } + /* omode = OPEN_ACCESS_READONLY | OPEN_SHARE_COMPATIBLE; */ + /* action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_FAIL; */ + DesiredAccess = GENERIC_READ; + ShareAccess = FILE_SHARE_READ | FILE_SHARE_WRITE; + CreateDisposition = FILE_OPEN; + } else if (mode[0] == 'w') { - // omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_COMPATIBLE; - // action = ACTION_IFEXISTS_TRUNCATE | ACTION_IFNOTEXISTS_CREATE; - DesiredAccess = GENERIC_WRITE; - ShareAccess = FILE_SHARE_READ | FILE_SHARE_WRITE; - CreateDisposition = FILE_SUPERSEDE; - } + /* omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_COMPATIBLE; */ + /* action = ACTION_IFEXISTS_TRUNCATE | ACTION_IFNOTEXISTS_CREATE; */ + DesiredAccess = GENERIC_WRITE; + ShareAccess = FILE_SHARE_READ | FILE_SHARE_WRITE; + CreateDisposition = FILE_SUPERSEDE; + } else { - // omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_COMPATIBLE; - // action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_CREATE; - DesiredAccess = GENERIC_READ | GENERIC_WRITE; - ShareAccess = FILE_SHARE_READ; - CreateDisposition = FILE_OPEN_IF; - } + /* omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_COMPATIBLE; */ + /* action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_CREATE; */ + DesiredAccess = GENERIC_READ | GENERIC_WRITE; + ShareAccess = FILE_SHARE_READ; + CreateDisposition = FILE_OPEN_IF; + } - // Convert filename string to ansi string and then to UniCode string + /* Convert filename string to ansi string and then to UniCode string */ if ((uniFile = _PM_CStringToUnicodeString(kernelFilename)) == NULL) - return NULL; + return NULL; - // Create the file + /* Create the file */ InitializeObjectAttributes (&ObjectAttributes, - uniFile, - OBJ_CASE_INSENSITIVE, - NULL, - NULL); + uniFile, + OBJ_CASE_INSENSITIVE, + NULL, + NULL); status = ZwCreateFile( &FileHandle, - DesiredAccess | SYNCHRONIZE, - &ObjectAttributes, - &IoStatusBlock, - NULL, // AllocationSize OPTIONAL, - FILE_ATTRIBUTE_NORMAL, - ShareAccess, - CreateDisposition, - FILE_RANDOM_ACCESS, // CreateOptions, - NULL, // EaBuffer OPTIONAL, - 0 // EaLength (required if EaBuffer) - ); + DesiredAccess | SYNCHRONIZE, + &ObjectAttributes, + &IoStatusBlock, + NULL, /* AllocationSize OPTIONAL, */ + FILE_ATTRIBUTE_NORMAL, + ShareAccess, + CreateDisposition, + FILE_RANDOM_ACCESS, /* CreateOptions, */ + NULL, /* EaBuffer OPTIONAL, */ + 0 /* EaLength (required if EaBuffer) */ + ); if (!NT_SUCCESS (status)) - goto Error; + goto Error; f->handle = (int)FileHandle; - // Determine size of the file + /* Determine size of the file */ status = ZwQueryInformationFile( FileHandle, - &IoStatusBlock, - &FileInformation, - sizeof(FILE_STANDARD_INFORMATION), - FileStandardInformation - ); + &IoStatusBlock, + &FileInformation, + sizeof(FILE_STANDARD_INFORMATION), + FileStandardInformation + ); if (!NT_SUCCESS (status)) - goto Error; + goto Error; f->filesize = FileInformation.EndOfFile.LowPart; - // Move to the end of the file if we are appending + /* Move to the end of the file if we are appending */ if (mode[0] == 'a') { - FilePosition.CurrentByteOffset.HighPart = 0; - FilePosition.CurrentByteOffset.LowPart = f->filesize; - status = ZwSetInformationFile( FileHandle, - &IoStatusBlock, - &FilePosition, - sizeof(FILE_POSITION_INFORMATION), - FilePositionInformation - ); - if (!NT_SUCCESS (status)) - goto Error; - } + FilePosition.CurrentByteOffset.HighPart = 0; + FilePosition.CurrentByteOffset.LowPart = f->filesize; + status = ZwSetInformationFile( FileHandle, + &IoStatusBlock, + &FilePosition, + sizeof(FILE_POSITION_INFORMATION), + FilePositionInformation + ); + if (!NT_SUCCESS (status)) + goto Error; + } return f; Error: @@ -158,21 +158,21 @@ IO_STATUS_BLOCK IoStatusBlock; LARGE_INTEGER ByteOffset; - // Read any extra bytes from the file + /* Read any extra bytes from the file */ ByteOffset.HighPart = 0; ByteOffset.LowPart = f->offset; status = ZwReadFile( (HANDLE)f->handle, - NULL, //IN HANDLE Event OPTIONAL, - NULL, // IN PIO_APC_ROUTINE ApcRoutine OPTIONAL, - NULL, // IN PVOID ApcContext OPTIONAL, - &IoStatusBlock, - ptr, // OUT PVOID Buffer, - size * n, //IN ULONG Length, - &ByteOffset, //OPTIONAL, - NULL //IN PULONG Key OPTIONAL - ); + NULL, /*IN HANDLE Event OPTIONAL, */ + NULL, /* IN PIO_APC_ROUTINE ApcRoutine OPTIONAL, */ + NULL, /* IN PVOID ApcContext OPTIONAL, */ + &IoStatusBlock, + ptr, /* OUT PVOID Buffer, */ + size * n, /*IN ULONG Length, */ + &ByteOffset, /*OPTIONAL, */ + NULL /*IN PULONG Key OPTIONAL */ + ); if (!NT_SUCCESS (status)) - return 0; + return 0; f->offset += IoStatusBlock.Information; return IoStatusBlock.Information / size; } @@ -192,24 +192,24 @@ LARGE_INTEGER ByteOffset; if (!f->writemode) - return 0; + return 0; ByteOffset.HighPart = 0; ByteOffset.LowPart = f->offset; status = ZwWriteFile( (HANDLE)f->handle, - NULL, //IN HANDLE Event OPTIONAL, - NULL, // IN PIO_APC_ROUTINE ApcRoutine OPTIONAL, - NULL, // IN PVOID ApcContext OPTIONAL, - &IoStatusBlock, - (void*)ptr, // OUT PVOID Buffer, - size * n, //IN ULONG Length, - &ByteOffset, //OPTIONAL, - NULL //IN PULONG Key OPTIONAL - ); + NULL, /*IN HANDLE Event OPTIONAL, */ + NULL, /* IN PIO_APC_ROUTINE ApcRoutine OPTIONAL, */ + NULL, /* IN PVOID ApcContext OPTIONAL, */ + &IoStatusBlock, + (void*)ptr, /* OUT PVOID Buffer, */ + size * n, /*IN ULONG Length, */ + &ByteOffset, /*OPTIONAL, */ + NULL /*IN PULONG Key OPTIONAL */ + ); if (!NT_SUCCESS (status)) - return 0; + return 0; f->offset += IoStatusBlock.Information; if (f->offset > f->filesize) - f->filesize = f->offset; + f->filesize = f->offset; return IoStatusBlock.Information / size; } @@ -220,7 +220,7 @@ int fflush( FILE *f) { - // Nothing to do here as we are not doing buffered I/O + /* Nothing to do here as we are not doing buffered I/O */ (void)f; return 0; } @@ -239,21 +239,21 @@ IO_STATUS_BLOCK IoStatusBlock; if (whence == 0) - f->offset = offset; + f->offset = offset; else if (whence == 1) - f->offset += offset; + f->offset += offset; else if (whence == 2) - f->offset = f->filesize + offset; + f->offset = f->filesize + offset; FilePosition.CurrentByteOffset.HighPart = 0; FilePosition.CurrentByteOffset.LowPart = f->offset; status = ZwSetInformationFile( (HANDLE)f->handle, - &IoStatusBlock, - &FilePosition, - sizeof(FILE_POSITION_INFORMATION), - FilePositionInformation - ); + &IoStatusBlock, + &FilePosition, + sizeof(FILE_POSITION_INFORMATION), + FilePositionInformation + ); if (!NT_SUCCESS (status)) - return -1; + return -1; return 0; } @@ -289,19 +289,19 @@ int len; char *cs; - // Read the entire buffer into memory (our functions are unbuffered!) + /* Read the entire buffer into memory (our functions are unbuffered!) */ if ((len = fread(s,1,n,f)) == 0) - return NULL; + return NULL; - // Search for '\n' or end of string + /* Search for '\n' or end of string */ if (n > len) - n = len; + n = len; cs = s; while (--n > 0) { - if (*cs == '\n') - break; - cs++; - } + if (*cs == '\n') + break; + cs++; + } *cs = '\0'; return s; } @@ -328,4 +328,3 @@ PM_free(f); return 0; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c index d770513..bbf0cbf 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c +++ b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/stdlib.c @@ -54,7 +54,7 @@ { void *p = PM_mallocShared(nelem * size); if (p) - memset(p,0,nelem * size); + memset(p,0,nelem * size); return p; } @@ -68,9 +68,9 @@ { void *p = PM_mallocShared(size); if (p) { - memcpy(p,ptr,size); - PM_freeShared(ptr); - } + memcpy(p,ptr,size); + PM_freeShared(ptr); + } return p; } @@ -102,21 +102,21 @@ ANSI_STRING ansiStr; UNICODE_STRING *uniStr; - // Allocate memory for the string structure + /* Allocate memory for the string structure */ if ((uniStr = ExAllocatePool(NonPagedPool, sizeof(UNICODE_STRING))) == NULL) - return NULL; + return NULL; - // Allocate memory for the wide string itself + /* Allocate memory for the wide string itself */ length = (strlen(cstr) * sizeof(WCHAR)) + sizeof(WCHAR); if ((uniStr->Buffer = ExAllocatePool(NonPagedPool, length)) == NULL) { - ExFreePool(uniStr); - return NULL; - } + ExFreePool(uniStr); + return NULL; + } RtlZeroMemory(uniStr->Buffer, length); uniStr->Length = 0; uniStr->MaximumLength = (USHORT)length; - // Convert filename string to ansi string and then to UniCode string + /* Convert filename string to ansi string and then to UniCode string */ RtlInitAnsiString(&ansiStr, cstr); RtlAnsiStringToUnicodeString(uniStr, &ansiStr, FALSE); return uniStr; @@ -133,8 +133,7 @@ UNICODE_STRING *uniStr) { if (uniStr) { - ExFreePool(uniStr->Buffer); - ExFreePool(uniStr); - } + ExFreePool(uniStr->Buffer); + ExFreePool(uniStr); + } } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c index ef27294..f4c4bd4 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c +++ b/board/MAI/bios_emulator/scitech/src/pm/ntdrv/ztimer.c @@ -121,4 +121,3 @@ ****************************************************************************/ ulong __ULZElapsedTime(ulong start,ulong finish) { return finish - start; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/event.c b/board/MAI/bios_emulator/scitech/src/pm/os2/event.c index 706e84d..91cc19b 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/os2/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/os2/event.c @@ -87,8 +87,8 @@ static int MickeyToPixel( int mickey) { - // TODO: We can add some code in here to handle 'acceleration' for - // the mouse cursor. For now just use the mickeys. + /* TODO: We can add some code in here to handle 'acceleration' for */ + /* the mouse cursor. For now just use the mickeys. */ return mickey; } @@ -116,196 +116,196 @@ /* Pump all keyboard messages from our circular buffer */ for (;;) { - /* Check that the monitor thread is still running */ - if (!bMonRunning) - PM_fatalError("Keyboard monitor thread died!"); + /* Check that the monitor thread is still running */ + if (!bMonRunning) + PM_fatalError("Keyboard monitor thread died!"); - /* Protect keypacket buffer with mutex */ - DosRequestMutexSem(hmtxKeyBuf, SEM_INDEFINITE_WAIT); - if (kpHead == kpTail) { - DosReleaseMutexSem(hmtxKeyBuf); - break; - } + /* Protect keypacket buffer with mutex */ + DosRequestMutexSem(hmtxKeyBuf, SEM_INDEFINITE_WAIT); + if (kpHead == kpTail) { + DosReleaseMutexSem(hmtxKeyBuf); + break; + } - noInput = FALSE; + noInput = FALSE; - /* Read packet from circular buffer and remove it */ - memcpy(&kp, &keyMonPkts[kpTail], sizeof(KEYPACKET)); - if (++kpTail == KEYBUFSIZE) - kpTail = 0; - DosReleaseMutexSem(hmtxKeyBuf); + /* Read packet from circular buffer and remove it */ + memcpy(&kp, &keyMonPkts[kpTail], sizeof(KEYPACKET)); + if (++kpTail == KEYBUFSIZE) + kpTail = 0; + DosReleaseMutexSem(hmtxKeyBuf); - /* Compensate for the 0xE0 character */ - if (kp.XlatedScan && kp.XlatedChar == 0xE0) - kp.XlatedChar = 0; + /* Compensate for the 0xE0 character */ + if (kp.XlatedScan && kp.XlatedChar == 0xE0) + kp.XlatedChar = 0; - /* Determine type of keyboard event */ - memset(&evt,0,sizeof(evt)); - if (kp.KbdDDFlagWord & KEY_RELEASE) - evt.what = EVT_KEYUP; - else - evt.what = EVT_KEYDOWN; + /* Determine type of keyboard event */ + memset(&evt,0,sizeof(evt)); + if (kp.KbdDDFlagWord & KEY_RELEASE) + evt.what = EVT_KEYUP; + else + evt.what = EVT_KEYDOWN; - /* Convert keyboard codes */ - scan = kp.MonFlagWord >> 8; - if (evt.what == EVT_KEYUP) { - /* Get message for keyup code from table of cached down values */ - evt.message = keyUpMsg[scan]; - keyUpMsg[scan] = 0; - oldKeyMessage = -1; - } - else { - evt.message = ((ulong)scan << 8) | kp.XlatedChar; - if (evt.message == keyUpMsg[scan]) { - evt.what = EVT_KEYREPEAT; - evt.message |= 0x10000; - } - oldKeyMessage = evt.message & 0x0FFFF; - keyUpMsg[scan] = (ushort)evt.message; - } + /* Convert keyboard codes */ + scan = kp.MonFlagWord >> 8; + if (evt.what == EVT_KEYUP) { + /* Get message for keyup code from table of cached down values */ + evt.message = keyUpMsg[scan]; + keyUpMsg[scan] = 0; + oldKeyMessage = -1; + } + else { + evt.message = ((ulong)scan << 8) | kp.XlatedChar; + if (evt.message == keyUpMsg[scan]) { + evt.what = EVT_KEYREPEAT; + evt.message |= 0x10000; + } + oldKeyMessage = evt.message & 0x0FFFF; + keyUpMsg[scan] = (ushort)evt.message; + } - /* Convert shift state modifiers */ - if (kp.u.ShiftState & 0x0001) - evt.modifiers |= EVT_RIGHTSHIFT; - if (kp.u.ShiftState & 0x0002) - evt.modifiers |= EVT_LEFTSHIFT; - if (kp.u.ShiftState & 0x0100) - evt.modifiers |= EVT_LEFTCTRL; - if (kp.u.ShiftState & 0x0200) - evt.modifiers |= EVT_LEFTALT; - if (kp.u.ShiftState & 0x0400) - evt.modifiers |= EVT_RIGHTCTRL; - if (kp.u.ShiftState & 0x0800) - evt.modifiers |= EVT_RIGHTALT; - EVT.oldMove = -1; + /* Convert shift state modifiers */ + if (kp.u.ShiftState & 0x0001) + evt.modifiers |= EVT_RIGHTSHIFT; + if (kp.u.ShiftState & 0x0002) + evt.modifiers |= EVT_LEFTSHIFT; + if (kp.u.ShiftState & 0x0100) + evt.modifiers |= EVT_LEFTCTRL; + if (kp.u.ShiftState & 0x0200) + evt.modifiers |= EVT_LEFTALT; + if (kp.u.ShiftState & 0x0400) + evt.modifiers |= EVT_RIGHTCTRL; + if (kp.u.ShiftState & 0x0800) + evt.modifiers |= EVT_RIGHTALT; + EVT.oldMove = -1; - /* Add time stamp and add the event to the queue */ - evt.when = key.time; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } + /* Add time stamp and add the event to the queue */ + evt.when = key.time; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } /* Don't just flush because that terminally confuses the monitor */ do { - KbdCharIn(&key, IO_NOWAIT, 0); - } while (key.fbStatus & KBDTRF_FINAL_CHAR_IN); + KbdCharIn(&key, IO_NOWAIT, 0); + } while (key.fbStatus & KBDTRF_FINAL_CHAR_IN); /* Pump all mouse messages */ KbdGetStatus(&keyInfo,0); /* Check return code - mouse may not be operational!! */ if (MouGetNumQueEl(&mqueue,_EVT_hMouse) == NO_ERROR) { - while (mqueue.cEvents) { - while (mqueue.cEvents--) { - memset(&evt,0,sizeof(evt)); - mWait = MOU_NOWAIT; - MouReadEventQue(&mouse,&mWait,_EVT_hMouse); + while (mqueue.cEvents) { + while (mqueue.cEvents--) { + memset(&evt,0,sizeof(evt)); + mWait = MOU_NOWAIT; + MouReadEventQue(&mouse,&mWait,_EVT_hMouse); - /* Update the mouse position. We get the mouse coordinates - * in mickeys so we have to translate these into pixels and - * move our mouse position. If we don't do this, OS/2 gives - * us the coordinates in character positions since it still - * thinks we are in text mode! - */ - EVT.mx += MickeyToPixel(mouse.col); - EVT.my += MickeyToPixel(mouse.row); - if (EVT.mx < 0) EVT.mx = 0; - if (EVT.my < 0) EVT.my = 0; - if (EVT.mx > rangeX) EVT.mx = rangeX; - if (EVT.my > rangeY) EVT.my = rangeY; - evt.where_x = EVT.mx; - evt.where_y = EVT.my; - evt.relative_x = mouse.col; - evt.relative_y = mouse.row; - evt.when = key.time; - if (mouse.fs & (MOUSE_BN1_DOWN | MOUSE_MOTION_WITH_BN1_DOWN)) - evt.modifiers |= EVT_LEFTBUT; - if (mouse.fs & (MOUSE_BN2_DOWN | MOUSE_MOTION_WITH_BN2_DOWN)) - evt.modifiers |= EVT_RIGHTBUT; - if (mouse.fs & (MOUSE_BN3_DOWN | MOUSE_MOTION_WITH_BN3_DOWN)) - evt.modifiers |= EVT_MIDDLEBUT; - if (keyInfo.fsState & 0x0001) - evt.modifiers |= EVT_RIGHTSHIFT; - if (keyInfo.fsState & 0x0002) - evt.modifiers |= EVT_LEFTSHIFT; - if (keyInfo.fsState & 0x0100) - evt.modifiers |= EVT_LEFTCTRL; - if (keyInfo.fsState & 0x0200) - evt.modifiers |= EVT_LEFTALT; - if (keyInfo.fsState & 0x0400) - evt.modifiers |= EVT_RIGHTCTRL; - if (keyInfo.fsState & 0x0800) - evt.modifiers |= EVT_RIGHTALT; + /* Update the mouse position. We get the mouse coordinates + * in mickeys so we have to translate these into pixels and + * move our mouse position. If we don't do this, OS/2 gives + * us the coordinates in character positions since it still + * thinks we are in text mode! + */ + EVT.mx += MickeyToPixel(mouse.col); + EVT.my += MickeyToPixel(mouse.row); + if (EVT.mx < 0) EVT.mx = 0; + if (EVT.my < 0) EVT.my = 0; + if (EVT.mx > rangeX) EVT.mx = rangeX; + if (EVT.my > rangeY) EVT.my = rangeY; + evt.where_x = EVT.mx; + evt.where_y = EVT.my; + evt.relative_x = mouse.col; + evt.relative_y = mouse.row; + evt.when = key.time; + if (mouse.fs & (MOUSE_BN1_DOWN | MOUSE_MOTION_WITH_BN1_DOWN)) + evt.modifiers |= EVT_LEFTBUT; + if (mouse.fs & (MOUSE_BN2_DOWN | MOUSE_MOTION_WITH_BN2_DOWN)) + evt.modifiers |= EVT_RIGHTBUT; + if (mouse.fs & (MOUSE_BN3_DOWN | MOUSE_MOTION_WITH_BN3_DOWN)) + evt.modifiers |= EVT_MIDDLEBUT; + if (keyInfo.fsState & 0x0001) + evt.modifiers |= EVT_RIGHTSHIFT; + if (keyInfo.fsState & 0x0002) + evt.modifiers |= EVT_LEFTSHIFT; + if (keyInfo.fsState & 0x0100) + evt.modifiers |= EVT_LEFTCTRL; + if (keyInfo.fsState & 0x0200) + evt.modifiers |= EVT_LEFTALT; + if (keyInfo.fsState & 0x0400) + evt.modifiers |= EVT_RIGHTCTRL; + if (keyInfo.fsState & 0x0800) + evt.modifiers |= EVT_RIGHTALT; - /* Check for left mouse click events */ - /* 0x06 == (MOUSE_BN1_DOWN | MOUSE_MOTION_WITH_BN1_DOWN) */ - if (((mouse.fs & 0x0006) && !(oldMouseState & 0x0006)) - || (!(mouse.fs & 0x0006) && (oldMouseState & 0x0006))) { - if (mouse.fs & 0x0006) - evt.what = EVT_MOUSEDOWN; - else - evt.what = EVT_MOUSEUP; - evt.message = EVT_LEFTBMASK; - EVT.oldMove = -1; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } + /* Check for left mouse click events */ + /* 0x06 == (MOUSE_BN1_DOWN | MOUSE_MOTION_WITH_BN1_DOWN) */ + if (((mouse.fs & 0x0006) && !(oldMouseState & 0x0006)) + || (!(mouse.fs & 0x0006) && (oldMouseState & 0x0006))) { + if (mouse.fs & 0x0006) + evt.what = EVT_MOUSEDOWN; + else + evt.what = EVT_MOUSEUP; + evt.message = EVT_LEFTBMASK; + EVT.oldMove = -1; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } - /* Check for right mouse click events */ - /* 0x0018 == (MOUSE_BN2_DOWN | MOUSE_MOTION_WITH_BN2_DOWN) */ - if (((mouse.fs & 0x0018) && !(oldMouseState & 0x0018)) - || (!(mouse.fs & 0x0018) && (oldMouseState & 0x0018))) { - if (mouse.fs & 0x0018) - evt.what = EVT_MOUSEDOWN; - else - evt.what = EVT_MOUSEUP; - evt.message = EVT_RIGHTBMASK; - EVT.oldMove = -1; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } + /* Check for right mouse click events */ + /* 0x0018 == (MOUSE_BN2_DOWN | MOUSE_MOTION_WITH_BN2_DOWN) */ + if (((mouse.fs & 0x0018) && !(oldMouseState & 0x0018)) + || (!(mouse.fs & 0x0018) && (oldMouseState & 0x0018))) { + if (mouse.fs & 0x0018) + evt.what = EVT_MOUSEDOWN; + else + evt.what = EVT_MOUSEUP; + evt.message = EVT_RIGHTBMASK; + EVT.oldMove = -1; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } - /* Check for middle mouse click events */ - /* 0x0060 == (MOUSE_BN3_DOWN | MOUSE_MOTION_WITH_BN3_DOWN) */ - if (((mouse.fs & 0x0060) && !(oldMouseState & 0x0060)) - || (!(mouse.fs & 0x0060) && (oldMouseState & 0x0060))) { - if (mouse.fs & 0x0060) - evt.what = EVT_MOUSEDOWN; - else - evt.what = EVT_MOUSEUP; - evt.message = EVT_MIDDLEBMASK; - EVT.oldMove = -1; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } + /* Check for middle mouse click events */ + /* 0x0060 == (MOUSE_BN3_DOWN | MOUSE_MOTION_WITH_BN3_DOWN) */ + if (((mouse.fs & 0x0060) && !(oldMouseState & 0x0060)) + || (!(mouse.fs & 0x0060) && (oldMouseState & 0x0060))) { + if (mouse.fs & 0x0060) + evt.what = EVT_MOUSEDOWN; + else + evt.what = EVT_MOUSEUP; + evt.message = EVT_MIDDLEBMASK; + EVT.oldMove = -1; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } - /* Check for mouse movement event */ - if (mouse.fs & 0x002B) { - evt.what = EVT_MOUSEMOVE; - if (EVT.oldMove != -1) { - EVT.evtq[EVT.oldMove].where_x = evt.where_x;/* Modify existing one */ - EVT.evtq[EVT.oldMove].where_y = evt.where_y; - } - else { - EVT.oldMove = EVT.freeHead; /* Save id of this move event */ - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } - } + /* Check for mouse movement event */ + if (mouse.fs & 0x002B) { + evt.what = EVT_MOUSEMOVE; + if (EVT.oldMove != -1) { + EVT.evtq[EVT.oldMove].where_x = evt.where_x;/* Modify existing one */ + EVT.evtq[EVT.oldMove].where_y = evt.where_y; + } + else { + EVT.oldMove = EVT.freeHead; /* Save id of this move event */ + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } + } - /* Save current mouse state */ - oldMouseState = mouse.fs; - } - MouGetNumQueEl(&mqueue,_EVT_hMouse); - } - noInput = FALSE; - } + /* Save current mouse state */ + oldMouseState = mouse.fs; + } + MouGetNumQueEl(&mqueue,_EVT_hMouse); + } + noInput = FALSE; + } /* If there was no input available, give up the current timeslice * Note: DosSleep(0) will effectively do nothing if no other thread is ready. Hence * DosSleep(0) will still use 100% CPU _but_ should not interfere with other programs. */ if (noInput) - DosSleep(0); + DosSleep(0); } /**************************************************************************** @@ -341,78 +341,78 @@ /* Register the buffers to be used for monitoring for current session */ if (DosMonReg(_EVT_hKbdMon, &monInbuf, (ULONG*)&monOutbuf,MONITOR_END, -1)) { - DosPostEventSem(hevStart); /* unblock the main thread */ - return; - } + DosPostEventSem(hevStart); /* unblock the main thread */ + return; + } /* Unblock the main thread and tell it we're OK*/ bMonRunning = TRUE; DosPostEventSem(hevStart); while (bMonRunning) { /* Start an endless loop */ - /* Read data from keyboard driver */ - rc = DosMonRead((PBYTE)&monInbuf, IO_WAIT, (PBYTE)&kp, (PUSHORT)&count); - if (rc) { + /* Read data from keyboard driver */ + rc = DosMonRead((PBYTE)&monInbuf, IO_WAIT, (PBYTE)&kp, (PUSHORT)&count); + if (rc) { #ifdef CHECKED - if (bMonRunning) - printf("Error in DosMonRead, rc = %ld\n", rc); + if (bMonRunning) + printf("Error in DosMonRead, rc = %ld\n", rc); #endif - bMonRunning = FALSE; - return; - } + bMonRunning = FALSE; + return; + } - /* Pass FLUSH packets immediately */ - if (kp.MonFlagWord & 4) { + /* Pass FLUSH packets immediately */ + if (kp.MonFlagWord & 4) { #ifdef CHECKED - printf("Flush packet!\n"); + printf("Flush packet!\n"); #endif - DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count); - continue; - } + DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count); + continue; + } - //TODO: to be removed - /* Skip extended scancodes & some others */ - if (((kp.MonFlagWord >> 8) == 0xE0) || ((kp.KbdDDFlagWord & 0x0F) == 0x0F)) { - DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count); - continue; - } + /*TODO: to be removed */ + /* Skip extended scancodes & some others */ + if (((kp.MonFlagWord >> 8) == 0xE0) || ((kp.KbdDDFlagWord & 0x0F) == 0x0F)) { + DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count); + continue; + } -// printf("RawScan = %X, XlatedScan = %X, fbStatus = %X, KbdDDFlags = %X\n", -// kp.MonFlagWord >> 8, kp.XlatedScan, kp.u.ShiftState, kp.KbdDDFlagWord); +/* printf("RawScan = %X, XlatedScan = %X, fbStatus = %X, KbdDDFlags = %X\n", */ +/* kp.MonFlagWord >> 8, kp.XlatedScan, kp.u.ShiftState, kp.KbdDDFlagWord); */ - /* Protect access to buffer with mutex semaphore */ - rc = DosRequestMutexSem(hmtxKeyBuf, 1000); - if (rc) { + /* Protect access to buffer with mutex semaphore */ + rc = DosRequestMutexSem(hmtxKeyBuf, 1000); + if (rc) { #ifdef CHECKED - printf("Can't get access to mutex, rc = %ld\n", rc); + printf("Can't get access to mutex, rc = %ld\n", rc); #endif - bMonRunning = FALSE; - return; - } + bMonRunning = FALSE; + return; + } - /* Store packet in circular buffer, drop it if it's full */ - kpNew = kpHead + 1; - if (kpNew == KEYBUFSIZE) - kpNew = 0; - if (kpNew != kpTail) { - memcpy(&keyMonPkts[kpHead], &kp, sizeof(KEYPACKET)); - // TODO: fix this! - /* Convert break to make code */ - keyMonPkts[kpHead].MonFlagWord &= 0x7FFF; - kpHead = kpNew; - } - DosReleaseMutexSem(hmtxKeyBuf); + /* Store packet in circular buffer, drop it if it's full */ + kpNew = kpHead + 1; + if (kpNew == KEYBUFSIZE) + kpNew = 0; + if (kpNew != kpTail) { + memcpy(&keyMonPkts[kpHead], &kp, sizeof(KEYPACKET)); + /* TODO: fix this! */ + /* Convert break to make code */ + keyMonPkts[kpHead].MonFlagWord &= 0x7FFF; + kpHead = kpNew; + } + DosReleaseMutexSem(hmtxKeyBuf); - /* Finally write the packet */ - rc = DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count); - if (rc) { + /* Finally write the packet */ + rc = DosMonWrite((PBYTE)&monOutbuf, (PBYTE)&kp, count); + if (rc) { #ifdef CHECKED - if (bMonRunning) - printf("Error in DosMonWrite, rc = %ld\n", rc); + if (bMonRunning) + printf("Error in DosMonWrite, rc = %ld\n", rc); #endif - bMonRunning = FALSE; - return; - } - } + bMonRunning = FALSE; + return; + } + } (void)params; } @@ -461,15 +461,15 @@ /* Open the keyboard monitor */ if (DosMonOpen((PSZ)"KBD$", &_EVT_hKbdMon)) - PM_fatalError("Unable to open keyboard monitor!"); + PM_fatalError("Unable to open keyboard monitor!"); /* Create event semaphore, the monitor will post it when it's initalized */ if (DosCreateEventSem(NULL, &hevStart, 0, FALSE)) - PM_fatalError("Unable to create event semaphore!"); + PM_fatalError("Unable to create event semaphore!"); /* Create mutex semaphore protecting the keypacket buffer */ if (DosCreateMutexSem(NULL, &hmtxKeyBuf, 0, FALSE)) - PM_fatalError("Unable to create mutex semaphore!"); + PM_fatalError("Unable to create mutex semaphore!"); /* Start keyboard monitor thread, use 32K stack */ kbdMonTID = _beginthread(_kbdMonThread, NULL, 0x8000, NULL); @@ -478,9 +478,9 @@ /* Give the thread one second */ DosWaitEventSem(hevStart, 1000); if (!bMonRunning) { /* Check the thread is OK */ - DosMonClose(_EVT_hKbdMon); - PM_fatalError("Keyboard monitor thread didn't initialize!"); - } + DosMonClose(_EVT_hKbdMon); + PM_fatalError("Keyboard monitor thread didn't initialize!"); + } /* Catch program termination signals so we can clean up properly */ signal(SIGABRT, _EVT_abort); @@ -517,7 +517,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for OS/2 + /* Do nothing for OS/2 */ } /**************************************************************************** @@ -527,7 +527,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for OS/2 + /* Do nothing for OS/2 */ } /**************************************************************************** @@ -551,16 +551,15 @@ rc = DosKillThread(kbdMonTID); #ifdef CHECKED if (rc) - printf("DosKillThread failed, rc = %ld\n", rc); + printf("DosKillThread failed, rc = %ld\n", rc); #endif rc = DosMonClose(_EVT_hKbdMon); #ifdef CHECKED if (rc) { - printf("DosMonClose failed, rc = %ld\n", rc); - } + printf("DosMonClose failed, rc = %ld\n", rc); + } #endif DosCloseEventSem(hevStart); DosCloseMutexSem(hmtxKeyBuf); KbdFlushBuffer(0); } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h b/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h index 52f12f0..28d39fb 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h +++ b/board/MAI/bios_emulator/scitech/src/pm/os2/mon.h @@ -63,55 +63,55 @@ USHORT KbdDDFlagWord; } MLNPACKET; -// DBCSStatus +/* DBCSStatus */ -#define SF_SHIFTS 1 // If set to 1, shift status returned without a character -#define SF_NOTCHAR 2 // 0 - Scan code is a character - // 1 - Scan code is not a character; - // instead it is an extended key code from the keyboard. -#define SF_IMMEDIATE 32 // If set to 1, immediate conversion requested -#define SF_TYPEMASK 192 // Has the following values: - // 00 - Undefined - // 01 - Final character; interim character flag is turned off - // 10 - Interim character - // 11 - Final character; interim character flag is turned on. -// MonFlagWord +#define SF_SHIFTS 1 /* If set to 1, shift status returned without a character */ +#define SF_NOTCHAR 2 /* 0 - Scan code is a character */ + /* 1 - Scan code is not a character; */ + /* instead it is an extended key code from the keyboard. */ +#define SF_IMMEDIATE 32 /* If set to 1, immediate conversion requested */ +#define SF_TYPEMASK 192 /* Has the following values: */ + /* 00 - Undefined */ + /* 01 - Final character; interim character flag is turned off */ + /* 10 - Interim character */ + /* 11 - Final character; interim character flag is turned on. */ +/* MonFlagWord */ -#define MF_OPEN 1 // open -#define MF_CLOSE 2 // close -#define MF_FLUSH 4 // is flush packet +#define MF_OPEN 1 /* open */ +#define MF_CLOSE 2 /* close */ +#define MF_FLUSH 4 /* is flush packet */ -// KbdDDFlagWord +/* KbdDDFlagWord */ -#define KF_NOTSQPACKET 1024 // Don't put this packet in SQ buffer -#define KF_ACCENTEDKEY 512 // Key was translated using previous accent. -#define KF_MULTIMAKE 256 // Key was repeated make of a toggle key. -#define KF_SECONDARYKEY 128 // Previous scan code was the E0 prefix code. -#define KF_KEYBREAK 64 // This is the break of the key. -#define KF_KEYTYPEMASK 63 // Isolates the Key Type field of DDFlags. -#define KF_UNDEFKEY 63 // Key packet is undefined -#define KF_SYSREQKEY 23 // This key packet is the SysReq key (4990) -#define KF_PRINTFLUSHKEY 22 // This packet is Ct-Alt-PrtScr -#define KF_PSPRINTECHOKEY 21 // This packet is Ctl-P -#define KF_PRINTECHOKEY 20 // This packet is Ctl-PrtScr -#define KF_PRTSCRKEY 19 // This packet is PrtScr -#define KF_PSBREAKKEY 18 // This packet is Ctl-C -#define KF_BREAKKEY 17 // This packet is Ctl-Break -#define KF_ACCENTKEY 16 // This packet is an accent key -#define KF_XRORPNOT 13 // This packet is a Read or Peek Notification Pct. -#define KF_MLNOTIFICATION 14 // packet is a Multi-Layer NLS packet -#define KF_HOTKEYPACKET 12 // This packet is the hot key. -#define KF_BADKEYCOMBO 11 // Accent/char combo undefined, beep only. -#define KF_WAKEUPKEY 10 // This packet is one following PAUSEKEY -#define KF_PSPAUSEKEY 9 // This packet is Ctl-S -#define KF_PAUSEKEY 8 // This packet is Ctl-Numlock or PAUSE -#define KF_SHIFTMASK 7 // Key is a shift Key -#define KF_DUMPKEY 6 // This packet is Ctl-Numlock-NumLock -#define KF_REBOOTKEY 5 // This packet is Ctl-Alt-Del -#define KF_RESENDCODE 4 // This packet is resend code from controller -#define KF_OVERRUNCODE 3 // This packet is overrun code from controller -#define KF_SECPREFIXCODE 2 // This packet is E0/E1 scan code -#define KF_ACKCODE 1 // This packet is ack code from keyboard +#define KF_NOTSQPACKET 1024 /* Don't put this packet in SQ buffer */ +#define KF_ACCENTEDKEY 512 /* Key was translated using previous accent. */ +#define KF_MULTIMAKE 256 /* Key was repeated make of a toggle key. */ +#define KF_SECONDARYKEY 128 /* Previous scan code was the E0 prefix code. */ +#define KF_KEYBREAK 64 /* This is the break of the key. */ +#define KF_KEYTYPEMASK 63 /* Isolates the Key Type field of DDFlags. */ +#define KF_UNDEFKEY 63 /* Key packet is undefined */ +#define KF_SYSREQKEY 23 /* This key packet is the SysReq key (4990) */ +#define KF_PRINTFLUSHKEY 22 /* This packet is Ct-Alt-PrtScr */ +#define KF_PSPRINTECHOKEY 21 /* This packet is Ctl-P */ +#define KF_PRINTECHOKEY 20 /* This packet is Ctl-PrtScr */ +#define KF_PRTSCRKEY 19 /* This packet is PrtScr */ +#define KF_PSBREAKKEY 18 /* This packet is Ctl-C */ +#define KF_BREAKKEY 17 /* This packet is Ctl-Break */ +#define KF_ACCENTKEY 16 /* This packet is an accent key */ +#define KF_XRORPNOT 13 /* This packet is a Read or Peek Notification Pct. */ +#define KF_MLNOTIFICATION 14 /* packet is a Multi-Layer NLS packet */ +#define KF_HOTKEYPACKET 12 /* This packet is the hot key. */ +#define KF_BADKEYCOMBO 11 /* Accent/char combo undefined, beep only. */ +#define KF_WAKEUPKEY 10 /* This packet is one following PAUSEKEY */ +#define KF_PSPAUSEKEY 9 /* This packet is Ctl-S */ +#define KF_PAUSEKEY 8 /* This packet is Ctl-Numlock or PAUSE */ +#define KF_SHIFTMASK 7 /* Key is a shift Key */ +#define KF_DUMPKEY 6 /* This packet is Ctl-Numlock-NumLock */ +#define KF_REBOOTKEY 5 /* This packet is Ctl-Alt-Del */ +#define KF_RESENDCODE 4 /* This packet is resend code from controller */ +#define KF_OVERRUNCODE 3 /* This packet is overrun code from controller */ +#define KF_SECPREFIXCODE 2 /* This packet is E0/E1 scan code */ +#define KF_ACKCODE 1 /* This packet is ack code from keyboard */ typedef struct _MONBUF { @@ -120,29 +120,29 @@ BYTE Reserved[20]; } MONBUF; -#define RS_SYSREG 32768 // Bit 15 SysReq key down -#define RS_CAPSLOCK 16384 // Bit 14 Caps Lock key down -#define RS_NUMLOCK 8192 // Bit 13 NumLock key down -#define RS_SCROLLLOCK 4096 // Bit 12 Scroll Lock key down -#define RS_RALT 2048 // Bit 11 Right Alt key down -#define RS_RCONTROL 1024 // Bit 10 Right Ctrl key down -#define RS_LALT 512 // Bit 9 Left Alt key down -#define RS_LCONTROL 256 // Bit 8 Left Ctrl key down -#define RS_INSERT 128 // Bit 7 Insert on -#define RS_CAPS 64 // Bit 6 Caps Lock on -#define RS_NUM 32 // Bit 5 NumLock on -#define RS_SCROLL 16 // Bit 4 Scroll Lock on -#define RS_ALT 8 // Bit 3 Either Alt key down -#define RS_CONTROL 4 // Bit 2 Either Ctrl key down -#define RS_LSHIFT 2 // Bit 1 Left Shift key down -#define RS_RSHIFT 1 // Bit 0 Right Shift key down +#define RS_SYSREG 32768 /* Bit 15 SysReq key down */ +#define RS_CAPSLOCK 16384 /* Bit 14 Caps Lock key down */ +#define RS_NUMLOCK 8192 /* Bit 13 NumLock key down */ +#define RS_SCROLLLOCK 4096 /* Bit 12 Scroll Lock key down */ +#define RS_RALT 2048 /* Bit 11 Right Alt key down */ +#define RS_RCONTROL 1024 /* Bit 10 Right Ctrl key down */ +#define RS_LALT 512 /* Bit 9 Left Alt key down */ +#define RS_LCONTROL 256 /* Bit 8 Left Ctrl key down */ +#define RS_INSERT 128 /* Bit 7 Insert on */ +#define RS_CAPS 64 /* Bit 6 Caps Lock on */ +#define RS_NUM 32 /* Bit 5 NumLock on */ +#define RS_SCROLL 16 /* Bit 4 Scroll Lock on */ +#define RS_ALT 8 /* Bit 3 Either Alt key down */ +#define RS_CONTROL 4 /* Bit 2 Either Ctrl key down */ +#define RS_LSHIFT 2 /* Bit 1 Left Shift key down */ +#define RS_RSHIFT 1 /* Bit 0 Right Shift key down */ -#define CS_RCONTROL 91 // Right Control -#define CS_LSHIFT 42 // Left Shift -#define CS_RSHIFT 54 // Right Shift -#define CS_LALT 56 // Left Alt -#define CS_RALT 94 // Right Alt +#define CS_RCONTROL 91 /* Right Control */ +#define CS_LSHIFT 42 /* Left Shift */ +#define CS_RSHIFT 54 /* Right Shift */ +#define CS_LALT 56 /* Left Alt */ +#define CS_RALT 94 /* Right Alt */ /* DosMon* prototypes */ diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h index ae1f97a..e7aa1c6 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h +++ b/board/MAI/bios_emulator/scitech/src/pm/os2/oshdr.h @@ -39,4 +39,3 @@ #include "os2/mon.h" void __PM_checkConsoleSwitch(void); - diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c b/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c index 5025102..756eead 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/os2/pm.c @@ -116,16 +116,16 @@ /* PMIREQUEST_SOFTWAREINT structures from OS/2 DDK */ typedef struct { - ULONG ulFlags; // VDM initialization type -#define VDM_POSTLOAD 0x1 // adapter just loaded, used internally for initialization -#define VDM_INITIALIZE 0x2 // force initialization of a permanently open VDM, even if previously initialized -#define VDM_TERMINATE_POSTINITIALIZE 0x6 //start VDM with initialization, but close it afterwards (includes VDM_INITIALIZE) -#define VDM_QUERY_CAPABILITY 0x10 // query the current int 10 capability -#define VDM_FULL_VDM_CREATED 0x20 // a full VDM is created -#define VDM_MINI_VDM_CREATED 0x40 // a mini VDM is created -#define VDM_MINI_VDM_SUPPORTED 0x80 // mini VDM support is available - PCHAR szName; // VDM initialization program - PCHAR szArgs; // VDM initialization arguments + ULONG ulFlags; /* VDM initialization type */ +#define VDM_POSTLOAD 0x1 /* adapter just loaded, used internally for initialization */ +#define VDM_INITIALIZE 0x2 /* force initialization of a permanently open VDM, even if previously initialized */ +#define VDM_TERMINATE_POSTINITIALIZE 0x6 /*start VDM with initialization, but close it afterwards (includes VDM_INITIALIZE) */ +#define VDM_QUERY_CAPABILITY 0x10 /* query the current int 10 capability */ +#define VDM_FULL_VDM_CREATED 0x20 /* a full VDM is created */ +#define VDM_MINI_VDM_CREATED 0x40 /* a mini VDM is created */ +#define VDM_MINI_VDM_SUPPORTED 0x80 /* mini VDM support is available */ + PCHAR szName; /* VDM initialization program */ + PCHAR szArgs; /* VDM initialization arguments */ }INITVDM; typedef struct { @@ -218,7 +218,7 @@ HEV Event; /* Posted after callback is called */ } SESWITCHREC; -// Page sized block cache +/* Page sized block cache */ #define PAGES_PER_BLOCK 32 #define PAGE_BLOCK_SIZE (PAGES_PER_BLOCK * PM_PAGE_SIZE + (PM_PAGE_SIZE-1) + sizeof(pageblock)) @@ -269,29 +269,29 @@ ulong result; if ((rc = DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0, - FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE, - NULL)) != 0) { - if (rc == 4) { /* Did we run out of file handles? */ - ULONG ulNewFHs; - LONG lAddFHs = 5; + FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE, + NULL)) != 0) { + if (rc == 4) { /* Did we run out of file handles? */ + ULONG ulNewFHs; + LONG lAddFHs = 5; - if (DosSetRelMaxFH(&lAddFHs, &ulNewFHs) != 0) - PM_fatalError("Failed to raise the file handles limit!"); - else { - if ((rc = DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0, - FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE, - NULL)) != 0) { - PM_fatalError("Unable to open SDDHELP$ helper device driver! (#2)"); - } - } - } - else - PM_fatalError("Unable to open SDDHELP$ helper device driver!"); - } + if (DosSetRelMaxFH(&lAddFHs, &ulNewFHs) != 0) + PM_fatalError("Failed to raise the file handles limit!"); + else { + if ((rc = DosOpen(PMHELP_NAME,&hSDDHelp,&result,0,0, + FILE_OPEN, OPEN_SHARE_DENYNONE | OPEN_ACCESS_READWRITE, + NULL)) != 0) { + PM_fatalError("Unable to open SDDHELP$ helper device driver! (#2)"); + } + } + } + else + PM_fatalError("Unable to open SDDHELP$ helper device driver!"); + } if (DosDevIOCtl(hSDDHelp,PMHELP_IOCTL,func, - &parmsIn, inLen = sizeof(parmsIn), &inLen, - &parmsOut, outLen = sizeof(parmsOut), &outLen) != 0) - PM_fatalError("Failure calling SDDHELP$ helper device driver!"); + &parmsIn, inLen = sizeof(parmsIn), &inLen, + &parmsOut, outLen = sizeof(parmsOut), &outLen) != 0) + PM_fatalError("Failure calling SDDHELP$ helper device driver!"); DosClose(hSDDHelp); return parmsOut[0]; } @@ -310,9 +310,9 @@ /* Get the DBCS vector - if it's not empty, we're on DBCS */ DosQueryDBCSEnv(sizeof(achDBCSInfo), &ccStruct, achDBCSInfo); if (achDBCSInfo[0] != 0) - return true; + return true; else - return false; + return false; } /**************************************************************************** @@ -324,9 +324,9 @@ PVOID ptr; if (DosGetNamedSharedMem(&ptr, (PSZ)"\\SHAREMEM\\PMGLOBAL.MEM", PAG_READ) == NO_ERROR) { - DosFreeMem(ptr); - return true; - } + DosFreeMem(ptr); + return true; + } return false; } @@ -339,19 +339,19 @@ void PMAPI PM_init(void) { if (!lowMem) { - /* Obtain the 32->16 callgate from the device driver to enable IOPL */ - if ((_PM_gdt = CallSDDHelp(PMHELP_GETGDT32)) == 0) - PM_fatalError("Unable to obtain call gate selector!"); + /* Obtain the 32->16 callgate from the device driver to enable IOPL */ + if ((_PM_gdt = CallSDDHelp(PMHELP_GETGDT32)) == 0) + PM_fatalError("Unable to obtain call gate selector!"); - PM_setIOPL(3); + PM_setIOPL(3); - /* Map the first Mb of physical memory into lowMem */ - if ((lowMem = PM_mapPhysicalAddr(0,0xFFFFF,true)) == NULL) - PM_fatalError("Unable to map first Mb physical memory!"); + /* Map the first Mb of physical memory into lowMem */ + if ((lowMem = PM_mapPhysicalAddr(0,0xFFFFF,true)) == NULL) + PM_fatalError("Unable to map first Mb physical memory!"); - /* Initialise the MTRR interface functions */ - MTRR_init(); - } + /* Initialise the MTRR interface functions */ + MTRR_init(); + } } /**************************************************************************** @@ -367,79 +367,79 @@ RESULTCODES resCodes; if (haveInt10 == -1) { - /* Connect to VIDEOPMI and get entry point. Note that we only - * do this if GENPMI or SDDPMI are already loaded, since we need - * a GRADD based driver for this to work. - */ - PM_init(); - haveInt10 = false; - if (DosQueryModuleHandle((PSZ)"GENPMI.DLL",&hModGENPMI) != 0) - hModGENPMI = NULLHANDLE; - if (DosQueryModuleHandle((PSZ)"SDDPMI.DLL",&hModSDDPMI) != 0) - hModSDDPMI = NULLHANDLE; - if (hModGENPMI || hModSDDPMI) { - if (DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"VIDEOPMI.DLL",&hModVideoPMI) == 0) { - if (DosQueryProcAddr(hModVideoPMI,0,(PSZ)"VIDEOPMI32Request",(void*)&PM_VIDEOPMI32Request) != 0) - PM_fatalError("Unable to get VIDEOPMI32Request entry point!"); - strcpy(path,"X:\\OS2\\SVGADATA.PMI"); - path[0] = PM_getBootDrive(); - if (PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_LOADPMIFILE,path,NULL) != 0) { - DosFreeModule(hModVideoPMI); - PM_VIDEOPMI32Request = NULL; - haveInt10 = false; - } - else { - /* Attempt to initialise the full VDM in the system. This will only - * work if VPRPMI.SYS is loaded, but it provides support for passing - * values in ES/DS/ESI/EDI between the BIOS which does not work with - * kernel VDM's in fixpacks earlier than FP15. FP15 and later and - * the new Warp 4.51 and Warp Server convenience packs should work - * fine with the kernel mini-VDM. - * - * Also the full VDM is the only solution for really old kernels - * (but GRADD won't run on them so this is superfluous ;-). - */ - INITVDM InitVDM = {VDM_INITIALIZE,NULL,NULL}; - PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&InitVDM,NULL); - haveInt10 = true; - } - } - } - else { - /* A GRADD driver isn't loaded, hence we can't use VIDEOPMI. But we will try - * to access the mini-VDM directly, first verifying that the support is - * available in the kernel (it should be for kernels that support GRADD). - * This may be needed in a command line boot or if non-GRADD driver is - * used (Matrox or classic VGA). - * Note: because of problems with mini-VDM support in the kernel, we have to - * spawn a daemon process that will do the actual mini-VDM access for us. - */ - /* Try to open shared semaphore to see if our daemon is already up */ - if (DosOpenEventSem(SHAREDSEM, &hevDaemon) == NO_ERROR) { - if (DosWaitEventSem(hevDaemon, 1) == NO_ERROR) { - /* If semaphore is posted, all is well */ - useVPMI = false; - haveInt10 = true; - } - } - else { - /* Create shared event semaphore */ - if (DosCreateEventSem(SHAREDSEM, &hevDaemon, DC_SEM_SHARED, FALSE) == NO_ERROR) { - PM_findBPD(DAEMON_NAME, path); - strcat(path, DAEMON_NAME); - if (DosExecPgm(buf, sizeof(buf), EXEC_BACKGROUND, (PSZ)DAEMON_NAME, - NULL, &resCodes, (PSZ)path) == NO_ERROR) { - /* The daemon was successfully spawned, now give it a sec to come up */ - if (DosWaitEventSem(hevDaemon, 2000) == NO_ERROR) { - /* It's up! */ - useVPMI = false; - haveInt10 = true; - } - } - } - } - } - } + /* Connect to VIDEOPMI and get entry point. Note that we only + * do this if GENPMI or SDDPMI are already loaded, since we need + * a GRADD based driver for this to work. + */ + PM_init(); + haveInt10 = false; + if (DosQueryModuleHandle((PSZ)"GENPMI.DLL",&hModGENPMI) != 0) + hModGENPMI = NULLHANDLE; + if (DosQueryModuleHandle((PSZ)"SDDPMI.DLL",&hModSDDPMI) != 0) + hModSDDPMI = NULLHANDLE; + if (hModGENPMI || hModSDDPMI) { + if (DosLoadModule((PSZ)buf,sizeof(buf),(PSZ)"VIDEOPMI.DLL",&hModVideoPMI) == 0) { + if (DosQueryProcAddr(hModVideoPMI,0,(PSZ)"VIDEOPMI32Request",(void*)&PM_VIDEOPMI32Request) != 0) + PM_fatalError("Unable to get VIDEOPMI32Request entry point!"); + strcpy(path,"X:\\OS2\\SVGADATA.PMI"); + path[0] = PM_getBootDrive(); + if (PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_LOADPMIFILE,path,NULL) != 0) { + DosFreeModule(hModVideoPMI); + PM_VIDEOPMI32Request = NULL; + haveInt10 = false; + } + else { + /* Attempt to initialise the full VDM in the system. This will only + * work if VPRPMI.SYS is loaded, but it provides support for passing + * values in ES/DS/ESI/EDI between the BIOS which does not work with + * kernel VDM's in fixpacks earlier than FP15. FP15 and later and + * the new Warp 4.51 and Warp Server convenience packs should work + * fine with the kernel mini-VDM. + * + * Also the full VDM is the only solution for really old kernels + * (but GRADD won't run on them so this is superfluous ;-). + */ + INITVDM InitVDM = {VDM_INITIALIZE,NULL,NULL}; + PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,&InitVDM,NULL); + haveInt10 = true; + } + } + } + else { + /* A GRADD driver isn't loaded, hence we can't use VIDEOPMI. But we will try + * to access the mini-VDM directly, first verifying that the support is + * available in the kernel (it should be for kernels that support GRADD). + * This may be needed in a command line boot or if non-GRADD driver is + * used (Matrox or classic VGA). + * Note: because of problems with mini-VDM support in the kernel, we have to + * spawn a daemon process that will do the actual mini-VDM access for us. + */ + /* Try to open shared semaphore to see if our daemon is already up */ + if (DosOpenEventSem(SHAREDSEM, &hevDaemon) == NO_ERROR) { + if (DosWaitEventSem(hevDaemon, 1) == NO_ERROR) { + /* If semaphore is posted, all is well */ + useVPMI = false; + haveInt10 = true; + } + } + else { + /* Create shared event semaphore */ + if (DosCreateEventSem(SHAREDSEM, &hevDaemon, DC_SEM_SHARED, FALSE) == NO_ERROR) { + PM_findBPD(DAEMON_NAME, path); + strcat(path, DAEMON_NAME); + if (DosExecPgm(buf, sizeof(buf), EXEC_BACKGROUND, (PSZ)DAEMON_NAME, + NULL, &resCodes, (PSZ)path) == NO_ERROR) { + /* The daemon was successfully spawned, now give it a sec to come up */ + if (DosWaitEventSem(hevDaemon, 2000) == NO_ERROR) { + /* It's up! */ + useVPMI = false; + haveInt10 = true; + } + } + } + } + } + } return haveInt10; } @@ -480,9 +480,9 @@ { uint pos = strlen(s); if (s[pos-1] != '\\') { - s[pos] = '\\'; - s[pos+1] = '\0'; - } + s[pos] = '\\'; + s[pos+1] = '\0'; + } } /**************************************************************************** @@ -505,9 +505,9 @@ /* Be prepare to be called recursively (failed to fail situation :-) */ static int fatalErrorCount = 0; if (fatalErrorCount++ == 0) { - if (fatalErrorCleanup) - fatalErrorCleanup(); - } + if (fatalErrorCleanup) + fatalErrorCleanup(); + } fprintf(stderr,"%s\n", msg); exit(1); } @@ -522,10 +522,10 @@ uint *roff) { if (!VESABuf_ptr) { - /* Allocate a global buffer for communicating with the VESA VBE */ - if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) - return NULL; - } + /* Allocate a global buffer for communicating with the VESA VBE */ + if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) + return NULL; + } *len = VESABuf_len; *rseg = VESABuf_rseg; *roff = VESABuf_roff; @@ -632,11 +632,11 @@ /* Quick optimized path for most common case */ if (SesSwitchRec.Flags == -1) - return; + return; again: if (DosRequestMutexSem(SesSwitchRec.Mutex, 100)) - return; + return; Flags = SesSwitchRec.Flags; Callback = SesSwitchRec.Callback; SesSwitchRec.Flags = -1; @@ -647,15 +647,15 @@ isSessionSwitching = false; DosPostEventSem(SesSwitchRec.Event); if (Flags == PM_DEACTIVATE && Mode == PM_SUSPEND_APP) - /* Suspend application until we switch back to our application */ - for (;;) { - DosSleep (500); - /* SesSwitchRec.Flags is volatile so optimizer - * won't load it into a register - */ - if (SesSwitchRec.Flags != -1) - goto again; - } + /* Suspend application until we switch back to our application */ + for (;;) { + DosSleep (500); + /* SesSwitchRec.Flags is volatile so optimizer + * won't load it into a register + */ + if (SesSwitchRec.Flags != -1) + goto again; + } } /**************************************************************************** @@ -669,7 +669,7 @@ ULONG Count; if (DosRequestMutexSem(SesSwitchRec.Mutex, 10000)) - return; + return; /* We're going to wait on that semaphore */ DosResetEventSem(SesSwitchRec.Event, &Count); @@ -692,10 +692,10 @@ USHORT NotifyType; for (;;) { - if (VioModeWait(VMWR_POPUP, &NotifyType, 0) != 0) - break; - _PM_SessionSwitchEvent(saveState, PM_REACTIVATE); - } + if (VioModeWait(VMWR_POPUP, &NotifyType, 0) != 0) + break; + _PM_SessionSwitchEvent(saveState, PM_REACTIVATE); + } VioModeUndo(UNDOI_RELEASEOWNER, UNDOK_ERRORCODE, (HVIO)0); } @@ -709,13 +709,13 @@ { USHORT NotifyType; for (;;) { - if (VioSavRedrawWait(VSRWI_SAVEANDREDRAW, &NotifyType, 0) != 0) - break; - if (NotifyType == VSRWN_SAVE) - _PM_SessionSwitchEvent(saveState, PM_DEACTIVATE); - else if (NotifyType == VSRWN_REDRAW) - _PM_SessionSwitchEvent(saveState, PM_REACTIVATE); - } + if (VioSavRedrawWait(VSRWI_SAVEANDREDRAW, &NotifyType, 0) != 0) + break; + if (NotifyType == VSRWN_SAVE) + _PM_SessionSwitchEvent(saveState, PM_DEACTIVATE); + else if (NotifyType == VSRWN_REDRAW) + _PM_SessionSwitchEvent(saveState, PM_REACTIVATE); + } VioSavRedrawUndo(UNDOI_RELEASEOWNER, UNDOK_ERRORCODE, (HVIO)0); } @@ -726,24 +726,24 @@ void PMAPI PM_setSuspendAppCallback( PM_saveState_cb saveState) { - // If PM isn't loaded, this stuff will cause crashes! + /* If PM isn't loaded, this stuff will cause crashes! */ if (__isShellLoaded()) { - if (saveState) { - /* Create the threads responsible for tracking console switches */ - SesSwitchRec.Flags = -1; - DosCreateMutexSem(NULL, &SesSwitchRec.Mutex, 0, FALSE); - DosCreateEventSem(NULL, &SesSwitchRec.Event, 0, FALSE); - _beginthread ((void(*)(void*))_PM_ConsoleSwitch,NULL,SESSION_SWITCH_STACK_SIZE, (void*)saveState); - _beginthread ((void(*)(void*))_PM_ConsolePopup,NULL,SESSION_SWITCH_STACK_SIZE, (void*)saveState); - } - else { - /* Kill the threads responsible for tracking console switches */ - VioModeUndo(UNDOI_RELEASEOWNER, UNDOK_TERMINATE, (HVIO)0); - VioSavRedrawUndo(UNDOI_RELEASEOWNER, UNDOK_TERMINATE, (HVIO)0); - DosCloseEventSem(SesSwitchRec.Event); - DosCloseMutexSem(SesSwitchRec.Mutex); - } - } + if (saveState) { + /* Create the threads responsible for tracking console switches */ + SesSwitchRec.Flags = -1; + DosCreateMutexSem(NULL, &SesSwitchRec.Mutex, 0, FALSE); + DosCreateEventSem(NULL, &SesSwitchRec.Event, 0, FALSE); + _beginthread ((void(*)(void*))_PM_ConsoleSwitch,NULL,SESSION_SWITCH_STACK_SIZE, (void*)saveState); + _beginthread ((void(*)(void*))_PM_ConsolePopup,NULL,SESSION_SWITCH_STACK_SIZE, (void*)saveState); + } + else { + /* Kill the threads responsible for tracking console switches */ + VioModeUndo(UNDOI_RELEASEOWNER, UNDOK_TERMINATE, (HVIO)0); + VioSavRedrawUndo(UNDOI_RELEASEOWNER, UNDOK_TERMINATE, (HVIO)0); + DosCloseEventSem(SesSwitchRec.Event); + DosCloseMutexSem(SesSwitchRec.Mutex); + } + } } /**************************************************************************** @@ -758,7 +758,7 @@ VIOMODEINFO vmi; if (!cs) - return; + return; memcpy(&vmi, &cs->vmi, sizeof (VIOMODEINFO)); VioSetMode(&vmi, (HVIO)0); @@ -789,7 +789,7 @@ /* If session switch is in progress, calling into VIO causes deadlocks! */ /* Also this call to VIO screws up our console library on DBCS boxes... */ if (!isSessionSwitching && !__IsDBCSSystem()) - VioSetCurPos(y,x,0); + VioSetCurPos(y,x,0); } /**************************************************************************** @@ -813,7 +813,7 @@ PM_intHandler ih, int frequency) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)ih; (void)frequency; return false; @@ -826,7 +826,7 @@ void PMAPI PM_setRealTimeClockFrequency( int frequency) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)frequency; } @@ -836,7 +836,7 @@ ****************************************************************************/ void PMAPI PM_restoreRealTimeClockHandler(void) { - // TODO: Implement this! + /* TODO: Implement this! */ } /**************************************************************************** @@ -881,7 +881,7 @@ { static char path[CCHMAXPATH]; if (getenv("NUCLEUS_PATH") != NULL) - return getenv("NUCLEUS_PATH"); + return getenv("NUCLEUS_PATH"); strcpy(path,"x:\\os2\\drivers"); path[0] = PM_getBootDrive(); PM_backslash(path); @@ -920,10 +920,10 @@ static char name[40],*env; if ((env = getenv("HOSTNAME")) != NULL) { - strncpy(name,env,sizeof(name)); - name[sizeof(name)-1] = 0; - return name; - } + strncpy(name,env,sizeof(name)); + name[sizeof(name)-1] = 0; + return name; + } return "OS2"; } @@ -970,7 +970,7 @@ parmsIn[1] = limit; parmsIn[2] = isCached; if ((linear = CallSDDHelp(PMHELP_MAPPHYS)) == 0) - return NULL; + return NULL; return (void*)(linear + baseOfs); } @@ -1031,9 +1031,9 @@ int port) { switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + } return 0; } @@ -1045,10 +1045,10 @@ int port) { switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -1112,7 +1112,7 @@ uint r_off) { if (r_seg == 0xFFFF) - return &RMBuf[r_off]; + return &RMBuf[r_off]; return lowMem + MK_PHYS(r_seg,r_off); } @@ -1126,7 +1126,7 @@ uint *r_off) { if (size > sizeof(RMBuf)) - return NULL; + return NULL; *r_seg = 0xFFFF; *r_off = 0x0000; return &RMBuf; @@ -1160,79 +1160,79 @@ ulong eax = 0; if (!InitInt10()) - return; + return; memset(&rmregs, 0, sizeof(rmregs)); rmregs.ulBIOSIntNo = intno; INDPMI(eax); INDPMI(ebx); INDPMI(ecx); INDPMI(edx); INDPMI(esi); INDPMI(edi); rmregs.aCRF.reg_ds = regs->ds; rmregs.aCRF.reg_es = regs->es; if (intno == 0x10) { - eax = rmregs.aCRF.reg_eax; - switch (eax & 0xFFFF) { - case 0x4F00: - /* We have to hack the way this function works, due to - * some bugs in the IBM mini-VDM BIOS support. Specifically - * we need to make the input buffer and output buffer the - * 'same' buffer, and that ES:SI points to the output - * buffer (ignored by the BIOS). The data will end up - * being returned in the input buffer, except for the - * first four bytes ('VESA') that will not be returned. - */ - rmregs.pB[0].bBufferType = INPUT_BUFFER; - rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es); - rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi); - rmregs.pB[0].pAddress = RMBuf; - rmregs.pB[0].ulSize = 4; - rmregs.pB[1].bBufferType = OUTPUT_BUFFER; - rmregs.pB[1].bSelCRF = REG_OFFSET(reg_es); - rmregs.pB[1].bOffCRF = REG_OFFSET(reg_esi); - rmregs.pB[1].pAddress = ((PBYTE)RMBuf)+4; - rmregs.pB[1].ulSize = 512-4; - break; - case 0x4F01: - rmregs.pB[0].bBufferType = OUTPUT_BUFFER; - rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es); - rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi); - rmregs.pB[0].pAddress = RMBuf; - rmregs.pB[0].ulSize = 256; - break; - case 0x4F02: - rmregs.pB[0].bBufferType = INPUT_BUFFER; - rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es); - rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi); - rmregs.pB[0].pAddress = RMBuf; - rmregs.pB[0].ulSize = 256; - break; - case 0x4F09: - rmregs.pB[0].bBufferType = INPUT_BUFFER; - rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es); - rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi); - rmregs.pB[0].pAddress = RMBuf; - rmregs.pB[0].ulSize = 1024; - break; - case 0x4F0A: - /* Due to bugs in the mini-VDM in OS/2, the 0x4F0A protected - * mode interface functions will not work (we never get any - * selectors returned), so we fail this function here. The - * rest of the VBE/Core driver will work properly if this - * function is failed, because the VBE 2.0 and 3.0 specs - * allow for this. - */ - regs->eax = 0x014F; - return; - } - } + eax = rmregs.aCRF.reg_eax; + switch (eax & 0xFFFF) { + case 0x4F00: + /* We have to hack the way this function works, due to + * some bugs in the IBM mini-VDM BIOS support. Specifically + * we need to make the input buffer and output buffer the + * 'same' buffer, and that ES:SI points to the output + * buffer (ignored by the BIOS). The data will end up + * being returned in the input buffer, except for the + * first four bytes ('VESA') that will not be returned. + */ + rmregs.pB[0].bBufferType = INPUT_BUFFER; + rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es); + rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi); + rmregs.pB[0].pAddress = RMBuf; + rmregs.pB[0].ulSize = 4; + rmregs.pB[1].bBufferType = OUTPUT_BUFFER; + rmregs.pB[1].bSelCRF = REG_OFFSET(reg_es); + rmregs.pB[1].bOffCRF = REG_OFFSET(reg_esi); + rmregs.pB[1].pAddress = ((PBYTE)RMBuf)+4; + rmregs.pB[1].ulSize = 512-4; + break; + case 0x4F01: + rmregs.pB[0].bBufferType = OUTPUT_BUFFER; + rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es); + rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi); + rmregs.pB[0].pAddress = RMBuf; + rmregs.pB[0].ulSize = 256; + break; + case 0x4F02: + rmregs.pB[0].bBufferType = INPUT_BUFFER; + rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es); + rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi); + rmregs.pB[0].pAddress = RMBuf; + rmregs.pB[0].ulSize = 256; + break; + case 0x4F09: + rmregs.pB[0].bBufferType = INPUT_BUFFER; + rmregs.pB[0].bSelCRF = REG_OFFSET(reg_es); + rmregs.pB[0].bOffCRF = REG_OFFSET(reg_edi); + rmregs.pB[0].pAddress = RMBuf; + rmregs.pB[0].ulSize = 1024; + break; + case 0x4F0A: + /* Due to bugs in the mini-VDM in OS/2, the 0x4F0A protected + * mode interface functions will not work (we never get any + * selectors returned), so we fail this function here. The + * rest of the VBE/Core driver will work properly if this + * function is failed, because the VBE 2.0 and 3.0 specs + * allow for this. + */ + regs->eax = 0x014F; + return; + } + } if (useVPMI) - PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,NULL,&rmregs); + PM_VIDEOPMI32Request(&Adapter,PMIREQUEST_SOFTWAREINT,NULL,&rmregs); else { - DosSysCtl(6, &rmregs); - } + DosSysCtl(6, &rmregs); + } OUTDPMI(eax); OUTDPMI(ebx); OUTDPMI(ecx); OUTDPMI(edx); OUTDPMI(esi); OUTDPMI(edi); if (((regs->eax & 0xFFFF) == 0x004F) && ((eax & 0xFFFF) == 0x4F00)) { - /* Hack to fix up the missing 'VESA' string for mini-VDM */ - memcpy(RMBuf,"VESA",4); - } + /* Hack to fix up the missing 'VESA' string for mini-VDM */ + memcpy(RMBuf,"VESA",4); + } regs->ds = rmregs.aCRF.reg_ds; regs->es = rmregs.aCRF.reg_es; regs->flags = rmregs.aCRF.reg_eflag; @@ -1354,13 +1354,13 @@ /* Allocate memory for the new page block, and add to head of list */ if (DosAllocSharedMem((void**)&newBlock,NULL,PAGE_BLOCK_SIZE,OBJ_GETTABLE | PAG_READ | PAG_WRITE | PAG_COMMIT)) - return NULL; + return NULL; if (!PM_lockDataPages(newBlock,PAGE_BLOCK_SIZE,&newBlock->lockHandle)) - return NULL; + return NULL; newBlock->prev = NULL; newBlock->next = pageBlocks; if (pageBlocks) - pageBlocks->prev = newBlock; + pageBlocks->prev = newBlock; pageBlocks = newBlock; /* Initialise the page aligned free list for the page block */ @@ -1369,7 +1369,7 @@ newBlock->freeListStart = newBlock->freeList; newBlock->freeListEnd = p + (PAGES_PER_BLOCK-1) * PM_PAGE_SIZE; for (i = 0; i < PAGES_PER_BLOCK; i++,p = next) - FREELIST_NEXT(p) = next = p + PM_PAGE_SIZE; + FREELIST_NEXT(p) = next = p + PM_PAGE_SIZE; FREELIST_NEXT(p - PM_PAGE_SIZE) = NULL; return newBlock; } @@ -1388,11 +1388,11 @@ * page block if no free blocks are found. */ for (block = pageBlocks; block != NULL; block = block->next) { - if (block->freeCount) - break; - } + if (block->freeCount) + break; + } if (block == NULL && (block = PM_addNewPageBlock()) == NULL) - return NULL; + return NULL; block->freeCount--; p = block->freeList; block->freeList = FREELIST_NEXT(p); @@ -1411,36 +1411,36 @@ /* First find the page block that this page belongs to */ for (block = pageBlocks; block != NULL; block = block->next) { - if (p >= block->freeListStart && p <= block->freeListEnd) - break; - } + if (p >= block->freeListStart && p <= block->freeListEnd) + break; + } CHECK(block != NULL); /* Now free the block by adding it to the free list */ FREELIST_NEXT(p) = block->freeList; block->freeList = p; if (++block->freeCount == PAGES_PER_BLOCK) { - /* If all pages in the page block are now free, free the entire - * page block itself. - */ - if (block == pageBlocks) { - /* Delete from head */ - pageBlocks = block->next; - if (block->next) - block->next->prev = NULL; - } - else { - /* Delete from middle of list */ - CHECK(block->prev != NULL); - block->prev->next = block->next; - if (block->next) - block->next->prev = block->prev; - } + /* If all pages in the page block are now free, free the entire + * page block itself. + */ + if (block == pageBlocks) { + /* Delete from head */ + pageBlocks = block->next; + if (block->next) + block->next->prev = NULL; + } + else { + /* Delete from middle of list */ + CHECK(block->prev != NULL); + block->prev->next = block->next; + if (block->next) + block->next->prev = block->prev; + } - /* Unlock the memory and free it */ - PM_unlockDataPages(block,PAGE_BLOCK_SIZE,&block->lockHandle); - DosFreeMem(block); - } + /* Unlock the memory and free it */ + PM_unlockDataPages(block,PAGE_BLOCK_SIZE,&block->lockHandle); + DosFreeMem(block); + } } /**************************************************************************** @@ -1453,8 +1453,8 @@ /* Map all the page blocks above into the shared memory for process */ for (block = pageBlocks; block != NULL; block = block->next) { - DosGetSharedMem(block, PAG_READ | PAG_WRITE); - } + DosGetSharedMem(block, PAG_READ | PAG_WRITE); + } } /**************************************************************************** @@ -1533,7 +1533,7 @@ INTCRF rmregs; if (!InitInt10()) - return; + return; memset(&rmregs, 0, sizeof(rmregs)); rmregs.ulBIOSIntNo = 0x10; rmregs.aCRF.reg_eax = 0x4F05; @@ -1552,7 +1552,7 @@ INTCRF rmregs; if (!InitInt10()) - return; + return; memset(&rmregs, 0, sizeof(rmregs)); rmregs.ulBIOSIntNo = 0x10; rmregs.aCRF.reg_eax = 0x4F05; @@ -1578,7 +1578,7 @@ INTCRF rmregs; if (!InitInt10()) - return; + return; memset(&rmregs, 0, sizeof(rmregs)); rmregs.ulBIOSIntNo = 0x10; rmregs.aCRF.reg_eax = 0x4F07; @@ -1625,8 +1625,8 @@ return MTRR_enableWriteCombine(base,size,type); } -// TODO: Move the MTRR helper stuff into the call gate, or better yet -// entirely into the ring 0 helper driver!! +/* TODO: Move the MTRR helper stuff into the call gate, or better yet */ +/* entirely into the ring 0 helper driver!! */ /* MTRR helper functions. To make it easier to implement the MTRR support * under OS/2, we simply put our ring 0 helper functions into the @@ -1705,7 +1705,7 @@ PM_MODULE PMAPI PM_loadLibrary( const char *szDLLName) { - // TODO: Implement this to load shared libraries! + /* TODO: Implement this to load shared libraries! */ (void)szDLLName; return NULL; } @@ -1714,7 +1714,7 @@ PM_MODULE hModule, const char *szProcName) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)hModule; (void)szProcName; return NULL; @@ -1723,7 +1723,7 @@ void PMAPI PM_freeLibrary( PM_MODULE hModule) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)hModule; } @@ -1740,15 +1740,15 @@ memset(findData,0,findData->dwSize); findData->dwSize = dwSize; if (blk->attrFile & FILE_READONLY) - findData->attrib |= PM_FILE_READONLY; + findData->attrib |= PM_FILE_READONLY; if (blk->attrFile & FILE_DIRECTORY) - findData->attrib |= PM_FILE_DIRECTORY; + findData->attrib |= PM_FILE_DIRECTORY; if (blk->attrFile & FILE_ARCHIVED) - findData->attrib |= PM_FILE_ARCHIVE; + findData->attrib |= PM_FILE_ARCHIVE; if (blk->attrFile & FILE_HIDDEN) - findData->attrib |= PM_FILE_HIDDEN; + findData->attrib |= PM_FILE_HIDDEN; if (blk->attrFile & FILE_SYSTEM) - findData->attrib |= PM_FILE_SYSTEM; + findData->attrib |= PM_FILE_SYSTEM; findData->sizeLo = blk->cbFile; findData->sizeHi = 0; strncpy(findData->name,blk->achName,PM_MAX_PATH); @@ -1770,9 +1770,9 @@ ulong count = 1; if (DosFindFirst((PSZ)filename,&hdir,FIND_MASK,&blk,sizeof(blk),&count,FIL_STANDARD) == NO_ERROR) { - convertFindData(findData,&blk); - return (void*)hdir; - } + convertFindData(findData,&blk); + return (void*)hdir; + } return PM_FILE_INVALID; } @@ -1788,9 +1788,9 @@ ulong count = 1; if (DosFindNext((HDIR)handle,&blk,sizeof(blk),&count) == NO_ERROR) { - convertFindData(findData,&blk); - return true; - } + convertFindData(findData,&blk); + return true; + } return false; } @@ -1857,16 +1857,16 @@ FILESTATUS3 s; if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s))) - return; + return; s.attrFile = 0; if (attrib & PM_FILE_READONLY) - s.attrFile |= FILE_READONLY; + s.attrFile |= FILE_READONLY; if (attrib & PM_FILE_ARCHIVE) - s.attrFile |= FILE_ARCHIVED; + s.attrFile |= FILE_ARCHIVED; if (attrib & PM_FILE_HIDDEN) - s.attrFile |= FILE_HIDDEN; + s.attrFile |= FILE_HIDDEN; if (attrib & PM_FILE_SYSTEM) - s.attrFile |= FILE_SYSTEM; + s.attrFile |= FILE_SYSTEM; DosSetPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&s,sizeof(s),0L); } @@ -1881,15 +1881,15 @@ uint retval = 0; if (DosQueryPathInfo((PSZ)filename, FIL_STANDARD, &fs3, sizeof(FILESTATUS3))) - return 0; + return 0; if (fs3.attrFile & FILE_READONLY) - retval |= PM_FILE_READONLY; + retval |= PM_FILE_READONLY; if (fs3.attrFile & FILE_ARCHIVED) - retval |= PM_FILE_ARCHIVE; + retval |= PM_FILE_ARCHIVE; if (fs3.attrFile & FILE_HIDDEN) - retval |= PM_FILE_HIDDEN; + retval |= PM_FILE_HIDDEN; if (fs3.attrFile & FILE_SYSTEM) - retval |= PM_FILE_SYSTEM; + retval |= PM_FILE_SYSTEM; return retval; } @@ -1928,33 +1928,33 @@ time_t tt; if (DosQueryPathInfo((PSZ)filename, FIL_STANDARD, &fs3, sizeof(FILESTATUS3))) - return false; + return false; if (gmTime) { - tc.tm_year = fs3.fdateLastWrite.year + 80; - tc.tm_mon = fs3.fdateLastWrite.month - 1; - tc.tm_mday = fs3.fdateLastWrite.day; - tc.tm_hour = fs3.ftimeLastWrite.hours; - tc.tm_min = fs3.ftimeLastWrite.minutes; - tc.tm_sec = fs3.ftimeLastWrite.twosecs * 2; - if((tt = mktime(&tc)) == -1) - return false; - if(!(ret = gmtime(&tt))) - return false; - time->sec = ret->tm_sec; - time->day = ret->tm_mday; - time->mon = ret->tm_mon + 1; - time->year = ret->tm_year - 80; - time->min = ret->tm_min; - time->hour = ret->tm_hour; - } + tc.tm_year = fs3.fdateLastWrite.year + 80; + tc.tm_mon = fs3.fdateLastWrite.month - 1; + tc.tm_mday = fs3.fdateLastWrite.day; + tc.tm_hour = fs3.ftimeLastWrite.hours; + tc.tm_min = fs3.ftimeLastWrite.minutes; + tc.tm_sec = fs3.ftimeLastWrite.twosecs * 2; + if((tt = mktime(&tc)) == -1) + return false; + if(!(ret = gmtime(&tt))) + return false; + time->sec = ret->tm_sec; + time->day = ret->tm_mday; + time->mon = ret->tm_mon + 1; + time->year = ret->tm_year - 80; + time->min = ret->tm_min; + time->hour = ret->tm_hour; + } else { - time->sec = fs3.ftimeLastWrite.twosecs * 2; - time->day = fs3.fdateLastWrite.day; - time->mon = fs3.fdateLastWrite.month; - time->year = fs3.fdateLastWrite.year; - time->min = fs3.ftimeLastWrite.minutes; - time->hour = fs3.ftimeLastWrite.hours; - } + time->sec = fs3.ftimeLastWrite.twosecs * 2; + time->day = fs3.fdateLastWrite.day; + time->mon = fs3.fdateLastWrite.month; + time->year = fs3.fdateLastWrite.year; + time->min = fs3.ftimeLastWrite.minutes; + time->hour = fs3.ftimeLastWrite.hours; + } return true; } @@ -1973,32 +1973,32 @@ time_t tt; if (DosQueryPathInfo((PSZ)filename,FIL_STANDARD,(PVOID)&fs3,sizeof(fs3))) - return false; + return false; if (gmTime) { - tc.tm_year = time->year + 80; - tc.tm_mon = time->mon - 1; - tc.tm_mday = time->day; - tc.tm_hour = time->hour; - tc.tm_min = time->min; - tc.tm_sec = time->sec; - if((tt = mktime(&tc)) == -1) - return false; - ret = localtime(&tt); - fs3.ftimeLastWrite.twosecs = ret->tm_sec / 2; - fs3.fdateLastWrite.day = ret->tm_mday; - fs3.fdateLastWrite.month = ret->tm_mon + 1; - fs3.fdateLastWrite.year = ret->tm_year - 80; - fs3.ftimeLastWrite.minutes = ret->tm_min; - fs3.ftimeLastWrite.hours = ret->tm_hour; - } + tc.tm_year = time->year + 80; + tc.tm_mon = time->mon - 1; + tc.tm_mday = time->day; + tc.tm_hour = time->hour; + tc.tm_min = time->min; + tc.tm_sec = time->sec; + if((tt = mktime(&tc)) == -1) + return false; + ret = localtime(&tt); + fs3.ftimeLastWrite.twosecs = ret->tm_sec / 2; + fs3.fdateLastWrite.day = ret->tm_mday; + fs3.fdateLastWrite.month = ret->tm_mon + 1; + fs3.fdateLastWrite.year = ret->tm_year - 80; + fs3.ftimeLastWrite.minutes = ret->tm_min; + fs3.ftimeLastWrite.hours = ret->tm_hour; + } else { - fs3.ftimeLastWrite.twosecs = time->sec / 2; - fs3.fdateLastWrite.day = time->day; - fs3.fdateLastWrite.month = time->mon; - fs3.fdateLastWrite.year = time->year; - fs3.ftimeLastWrite.minutes = time->min; - fs3.ftimeLastWrite.hours = time->hour; - } + fs3.ftimeLastWrite.twosecs = time->sec / 2; + fs3.fdateLastWrite.day = time->day; + fs3.fdateLastWrite.month = time->mon; + fs3.fdateLastWrite.year = time->year; + fs3.ftimeLastWrite.minutes = time->min; + fs3.ftimeLastWrite.hours = time->hour; + } memcpy(&fs3.fdateLastAccess, &fs3.fdateLastWrite, sizeof(FDATE)); memcpy(&fs3.fdateCreation, &fs3.fdateLastWrite, sizeof(FDATE)); memcpy(&fs3.ftimeLastAccess, &fs3.ftimeLastWrite, sizeof(FTIME)); diff --git a/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c b/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c index 97c2caa..7af20a9 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/os2pm/event.c @@ -59,7 +59,7 @@ ****************************************************************************/ static void _EVT_pumpMessages(void) { - // TODO: Implement this for OS/2 Presentation Manager apps! + /* TODO: Implement this for OS/2 Presentation Manager apps! */ } /**************************************************************************** @@ -105,7 +105,7 @@ oldKeyMessage = 0; memset(keyUpMsg,0,sizeof(keyUpMsg)); - // TODO: OS/2 PM specific initialisation code! + /* TODO: OS/2 PM specific initialisation code! */ /* Catch program termination signals so we can clean up properly */ signal(SIGABRT, _EVT_abort); @@ -135,7 +135,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for OS/2 + /* Do nothing for OS/2 */ } /**************************************************************************** @@ -145,7 +145,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for OS/2 + /* Do nothing for OS/2 */ } /**************************************************************************** @@ -159,7 +159,7 @@ signal(SIGFPE, SIG_DFL); signal(SIGINT, SIG_DFL); - // TODO: OS/2 PM specific exit code + /* TODO: OS/2 PM specific exit code */ } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/photon/event.c b/board/MAI/bios_emulator/scitech/src/pm/photon/event.c index 738dfea..581da16 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/photon/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/photon/event.c @@ -51,7 +51,7 @@ uchar scancode) { return (KeyState[(scancode & 0xf8) >> 3] & (1 << (scancode & 0x7)) ? - true : false); + true : false); } /**************************************************************************** @@ -71,100 +71,100 @@ event_t _evt; while (count < EVENTQSIZE) { - uint mods = 0, keyp = 0; + uint mods = 0, keyp = 0; - pid = Creceive(0, &msg, sizeof (msg)); + pid = Creceive(0, &msg, sizeof (msg)); - if (pid == -1) - return; + if (pid == -1) + return; - if (PhEventRead(pid, event, sizeof (evt)) == Ph_EVENT_MSG) { - memset(&evt, 0, sizeof (evt)); - if (event->type == Ph_EV_KEY) { - key = PhGetData(event); + if (PhEventRead(pid, event, sizeof (evt)) == Ph_EVENT_MSG) { + memset(&evt, 0, sizeof (evt)); + if (event->type == Ph_EV_KEY) { + key = PhGetData(event); - if (key->key_flags & KEY_SCAN_VALID) { - keyp = key->key_scan; - if (key->key_flags & KEY_DOWN) - KeyState[(keyp & 0xf800) >> 11] - |= 1 << ((keyp & 0x700) >> 8); - else - KeyState[(keyp & 0xf800) >> 11] - &= ~(1 << ((keyp & 0x700) >> 8)); - } - if ((key->key_flags & KEY_SYM_VALID) || extended) - keyp |= key->key_sym; + if (key->key_flags & KEY_SCAN_VALID) { + keyp = key->key_scan; + if (key->key_flags & KEY_DOWN) + KeyState[(keyp & 0xf800) >> 11] + |= 1 << ((keyp & 0x700) >> 8); + else + KeyState[(keyp & 0xf800) >> 11] + &= ~(1 << ((keyp & 0x700) >> 8)); + } + if ((key->key_flags & KEY_SYM_VALID) || extended) + keyp |= key->key_sym; - /* No way to tell left from right... */ - if (key->key_mods & KEYMOD_SHIFT) - mods = (EVT_LEFTSHIFT | EVT_RIGHTSHIFT); - if (key->key_mods & KEYMOD_CTRL) - mods |= (EVT_CTRLSTATE | EVT_LEFTCTRL); - if (key->key_mods & KEYMOD_ALT) - mods |= (EVT_ALTSTATE | EVT_LEFTALT); + /* No way to tell left from right... */ + if (key->key_mods & KEYMOD_SHIFT) + mods = (EVT_LEFTSHIFT | EVT_RIGHTSHIFT); + if (key->key_mods & KEYMOD_CTRL) + mods |= (EVT_CTRLSTATE | EVT_LEFTCTRL); + if (key->key_mods & KEYMOD_ALT) + mods |= (EVT_ALTSTATE | EVT_LEFTALT); - _evt.when = evt->timestamp; - if (key->key_flags & KEY_REPEAT) { - _evt.what = EVT_KEYREPEAT; - _evt.message = 0x10000; - } - else if (key->key_flags & KEY_DOWN) - _evt.what = EVT_KEYDOWN; - else - _evt.what = EVT_KEYUP; - _evt.modifiers = mods; - _evt.message |= keyp; + _evt.when = evt->timestamp; + if (key->key_flags & KEY_REPEAT) { + _evt.what = EVT_KEYREPEAT; + _evt.message = 0x10000; + } + else if (key->key_flags & KEY_DOWN) + _evt.what = EVT_KEYDOWN; + else + _evt.what = EVT_KEYUP; + _evt.modifiers = mods; + _evt.message |= keyp; - addEvent(&_evt); + addEvent(&_evt); - switch(key->key_scan & 0xff00) { - case 0xe000: - extended = 1; - break; - case 0xe001: - extended = 2; - break; - default: - if (extended) - extended--; - } - } - else if (event->type & Ph_EV_PTR_ALL) { - but_stat = message = 0; - mouse = PhGetData(event); + switch(key->key_scan & 0xff00) { + case 0xe000: + extended = 1; + break; + case 0xe001: + extended = 2; + break; + default: + if (extended) + extended--; + } + } + else if (event->type & Ph_EV_PTR_ALL) { + but_stat = message = 0; + mouse = PhGetData(event); - if (mouse->button_state & Ph_BUTTON_3) - but_stat = EVT_LEFTBUT; - if (mouse->buttons & Ph_BUTTON_3) - message = EVT_LEFTBMASK; + if (mouse->button_state & Ph_BUTTON_3) + but_stat = EVT_LEFTBUT; + if (mouse->buttons & Ph_BUTTON_3) + message = EVT_LEFTBMASK; - if (mouse->button_state & Ph_BUTTON_1) - but_stat |= EVT_RIGHTBUT; - if (mouse->buttons & Ph_BUTTON_1) - message |= EVT_RIGHTBMASK; + if (mouse->button_state & Ph_BUTTON_1) + but_stat |= EVT_RIGHTBUT; + if (mouse->buttons & Ph_BUTTON_1) + message |= EVT_RIGHTBMASK; - _evt.when = evt->timestamp; - if (event->type & Ph_EV_PTR_MOTION) { - _evt.what = EVT_MOUSEMOVE; - _evt.where_x = mouse->pos.x; - _evt.where_y = mouse->pos.y; - _evt.modifiers = but_stat; - addEvent(&_evt); - } - if (event->type & Ph_EV_BUT_PRESS) - _evt.what = EVT_MOUSEDOWN; - else - _evt.what = EVT_MOUSEUP; - _evt.where_x = mouse->pos.x; - _evt.where_y = mouse->pos.y; - _evt.modifiers = but_stat; - _evt.message = message; - addEvent(&_evt); - } - } - else - return; - } + _evt.when = evt->timestamp; + if (event->type & Ph_EV_PTR_MOTION) { + _evt.what = EVT_MOUSEMOVE; + _evt.where_x = mouse->pos.x; + _evt.where_y = mouse->pos.y; + _evt.modifiers = but_stat; + addEvent(&_evt); + } + if (event->type & Ph_EV_BUT_PRESS) + _evt.what = EVT_MOUSEDOWN; + else + _evt.what = EVT_MOUSEUP; + _evt.where_x = mouse->pos.x; + _evt.where_y = mouse->pos.y; + _evt.modifiers = but_stat; + _evt.message = message; + addEvent(&_evt); + } + } + else + return; + } } /**************************************************************************** @@ -230,8 +230,8 @@ int xRes, int yRes) { - // TODO: Need to call Input to change the coordinates that it returns - // for mouse events!! + /* TODO: Need to call Input to change the coordinates that it returns */ + /* for mouse events!! */ } /**************************************************************************** @@ -242,7 +242,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for Photon + /* Do nothing for Photon */ } /**************************************************************************** @@ -252,7 +252,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for Photon + /* Do nothing for Photon */ } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c index e16f8a5..45cd514 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/qnx/event.c @@ -37,7 +37,7 @@ #ifndef __QNXNTO__ static struct _mouse_ctrl *_PM_mouse_ctl; static int _PM_keyboard_fd = -1; -//static int _PM_modifiers, _PM_leds; +/*static int _PM_modifiers, _PM_leds; */ #else static int kbd_fd = -1, mouse_fd = -1; #endif @@ -58,7 +58,7 @@ int map; } keymap; -// TODO: Fix this and set it up so we can do a binary search! +/* TODO: Fix this and set it up so we can do a binary search! */ keymap keymaps[] = { {96, KB_padEnter}, @@ -146,8 +146,8 @@ static int MickeyToPixel( int mickey) { - // TODO: We can add some code in here to handle 'acceleration' for - // the mouse cursor. For now just use the mickeys. + /* TODO: We can add some code in here to handle 'acceleration' for */ + /* the mouse cursor. For now just use the mickeys. */ return mickey; } @@ -167,110 +167,110 @@ event_t evt; while (EVT.count < EVENTQSIZE) { - rc1 = read(kbd_fd, (void *)&key, sizeof(key)); - if (rc1 == -1) { - if (errno == EAGAIN) - rc1 = 0; - else { - perror("getEvents"); - PM_fatalError("Keyboard error"); - } - } - if (rc1 > 0) { - memset(&evt, 0, sizeof(evt)); - if (key.data.modifiers & KEYMOD_SHIFT) - mods |= EVT_LEFTSHIFT; - if (key.data.modifiers & KEYMOD_CTRL) - mods |= EVT_CTRLSTATE; - if (key.data.modifiers & KEYMOD_ALT) - mods |= EVT_ALTSTATE; + rc1 = read(kbd_fd, (void *)&key, sizeof(key)); + if (rc1 == -1) { + if (errno == EAGAIN) + rc1 = 0; + else { + perror("getEvents"); + PM_fatalError("Keyboard error"); + } + } + if (rc1 > 0) { + memset(&evt, 0, sizeof(evt)); + if (key.data.modifiers & KEYMOD_SHIFT) + mods |= EVT_LEFTSHIFT; + if (key.data.modifiers & KEYMOD_CTRL) + mods |= EVT_CTRLSTATE; + if (key.data.modifiers & KEYMOD_ALT) + mods |= EVT_ALTSTATE; - /* Now store the keyboard event data */ - evt.when = TIME_TO_MSEC(key.time); - if (key.data.flags & KEY_SCAN_VALID) - evt.message |= (key.data.key_scan & 0x7F) << 8; - if ((key.data.flags & KEY_SYM_VALID) && - (((key.data.key_sym & 0xff00) == 0xf000 && - (key.data.key_sym & 0xff) < 0x20) || - key.data.key_sym < 0x80)) - evt.message |= (key.data.key_sym & 0xFF); - evt.modifiers = mods; - if (key.data.flags & KEY_DOWN) { - evt.what = EVT_KEYDOWN; - keyUpMsg[evt.message >> 8] = (ushort)evt.message; - } - else if (key.data.flags & KEY_REPEAT) { - evt.message |= 0x10000; - evt.what = EVT_KEYREPEAT; - } - else { - evt.what = EVT_KEYUP; - evt.message = keyUpMsg[evt.message >> 8]; - if (evt.message == 0) - continue; - keyUpMsg[evt.message >> 8] = 0; - } + /* Now store the keyboard event data */ + evt.when = TIME_TO_MSEC(key.time); + if (key.data.flags & KEY_SCAN_VALID) + evt.message |= (key.data.key_scan & 0x7F) << 8; + if ((key.data.flags & KEY_SYM_VALID) && + (((key.data.key_sym & 0xff00) == 0xf000 && + (key.data.key_sym & 0xff) < 0x20) || + key.data.key_sym < 0x80)) + evt.message |= (key.data.key_sym & 0xFF); + evt.modifiers = mods; + if (key.data.flags & KEY_DOWN) { + evt.what = EVT_KEYDOWN; + keyUpMsg[evt.message >> 8] = (ushort)evt.message; + } + else if (key.data.flags & KEY_REPEAT) { + evt.message |= 0x10000; + evt.what = EVT_KEYREPEAT; + } + else { + evt.what = EVT_KEYUP; + evt.message = keyUpMsg[evt.message >> 8]; + if (evt.message == 0) + continue; + keyUpMsg[evt.message >> 8] = 0; + } - /* Now add the new event to the event queue */ - addEvent(&evt); - } - rc2 = read(mouse_fd, (void *)&ms, sizeof (ms)); - if (rc2 == -1) { - if (errno == EAGAIN) - rc2 = 0; - else { - perror("getEvents"); - PM_fatalError("Mouse error"); - } - } - if (rc2 > 0) { - memset(&evt, 0, sizeof(evt)); - ms.hdr.buttons &= - (_POINTER_BUTTON_LEFT | _POINTER_BUTTON_RIGHT); - if (ms.hdr.buttons & _POINTER_BUTTON_LEFT) - but_stat = EVT_LEFTBUT; - if ((ms.hdr.buttons & _POINTER_BUTTON_LEFT) != - (old_buttons & _POINTER_BUTTON_LEFT)) - message = EVT_LEFTBMASK; - if (ms.hdr.buttons & _POINTER_BUTTON_RIGHT) - but_stat |= EVT_RIGHTBUT; - if ((ms.hdr.buttons & _POINTER_BUTTON_RIGHT) != - (old_buttons & _POINTER_BUTTON_RIGHT)) - message |= EVT_RIGHTBMASK; - if (ms.dx || ms.dy) { - ms.dy = -ms.dy; - EVT.mx += MickeyToPixel(ms.dx); - EVT.my += MickeyToPixel(ms.dy); - if (EVT.mx < 0) EVT.mx = 0; - if (EVT.my < 0) EVT.my = 0; - if (EVT.mx > rangeX) EVT.mx = rangeX; - if (EVT.my > rangeY) EVT.my = rangeY; - evt.what = EVT_MOUSEMOVE; - evt.when = TIME_TO_MSEC(ms.hdr.time); - evt.where_x = EVT.mx; - evt.where_y = EVT.my; - evt.relative_x = ms.dx; - evt.relative_y = ms.dy; - evt.modifiers = but_stat; - addEvent(&evt); - } - evt.what = ms.hdr.buttons < old_buttons ? - EVT_MOUSEUP : EVT_MOUSEDOWN; - evt.when = TIME_TO_MSEC(ms.hdr.time); - evt.where_x = EVT.mx; - evt.where_y = EVT.my; - evt.relative_x = ms.dx; - evt.relative_y = ms.dy; - evt.modifiers = but_stat; - evt.message = message; - if (ms.hdr.buttons != old_buttons) { - addEvent(&evt); - old_buttons = ms.hdr.buttons; - } - } - if (rc1 + rc2 == 0) - break; - } + /* Now add the new event to the event queue */ + addEvent(&evt); + } + rc2 = read(mouse_fd, (void *)&ms, sizeof (ms)); + if (rc2 == -1) { + if (errno == EAGAIN) + rc2 = 0; + else { + perror("getEvents"); + PM_fatalError("Mouse error"); + } + } + if (rc2 > 0) { + memset(&evt, 0, sizeof(evt)); + ms.hdr.buttons &= + (_POINTER_BUTTON_LEFT | _POINTER_BUTTON_RIGHT); + if (ms.hdr.buttons & _POINTER_BUTTON_LEFT) + but_stat = EVT_LEFTBUT; + if ((ms.hdr.buttons & _POINTER_BUTTON_LEFT) != + (old_buttons & _POINTER_BUTTON_LEFT)) + message = EVT_LEFTBMASK; + if (ms.hdr.buttons & _POINTER_BUTTON_RIGHT) + but_stat |= EVT_RIGHTBUT; + if ((ms.hdr.buttons & _POINTER_BUTTON_RIGHT) != + (old_buttons & _POINTER_BUTTON_RIGHT)) + message |= EVT_RIGHTBMASK; + if (ms.dx || ms.dy) { + ms.dy = -ms.dy; + EVT.mx += MickeyToPixel(ms.dx); + EVT.my += MickeyToPixel(ms.dy); + if (EVT.mx < 0) EVT.mx = 0; + if (EVT.my < 0) EVT.my = 0; + if (EVT.mx > rangeX) EVT.mx = rangeX; + if (EVT.my > rangeY) EVT.my = rangeY; + evt.what = EVT_MOUSEMOVE; + evt.when = TIME_TO_MSEC(ms.hdr.time); + evt.where_x = EVT.mx; + evt.where_y = EVT.my; + evt.relative_x = ms.dx; + evt.relative_y = ms.dy; + evt.modifiers = but_stat; + addEvent(&evt); + } + evt.what = ms.hdr.buttons < old_buttons ? + EVT_MOUSEUP : EVT_MOUSEDOWN; + evt.when = TIME_TO_MSEC(ms.hdr.time); + evt.where_x = EVT.mx; + evt.where_y = EVT.my; + evt.relative_x = ms.dx; + evt.relative_y = ms.dy; + evt.modifiers = but_stat; + evt.message = message; + if (ms.hdr.buttons != old_buttons) { + addEvent(&evt); + old_buttons = ms.hdr.buttons; + } + } + if (rc1 + rc2 == 0) + break; + } } #else /**************************************************************************** @@ -290,66 +290,66 @@ /* Poll keyboard events */ while ((numkeys = read(_PM_keyboard_fd, buf, sizeof buf)) > 0) { - for (i = 0; i < numkeys; i++) { - processRawScanCode(buf[i]); - } - } + for (i = 0; i < numkeys; i++) { + processRawScanCode(buf[i]); + } + } if (_PM_mouse_ctl == NULL) - return; + return; /* Gobble pending mouse events */ while (EVT.count < EVENTQSIZE) { - rc = mouse_read(_PM_mouse_ctl, &ev, 1, 0, NULL); - if (rc == -1) { - perror("getEvents"); - PM_fatalError("Mouse error (Input terminated?)"); - } - if (rc == 0) - break; + rc = mouse_read(_PM_mouse_ctl, &ev, 1, 0, NULL); + if (rc == -1) { + perror("getEvents"); + PM_fatalError("Mouse error (Input terminated?)"); + } + if (rc == 0) + break; - message = 0, but_stat = 0; - memset(&evt, 0, sizeof(evt)); + message = 0, but_stat = 0; + memset(&evt, 0, sizeof(evt)); - ev.buttons &= (_MOUSE_LEFT | _MOUSE_RIGHT); - if (ev.buttons & _MOUSE_LEFT) - but_stat = EVT_LEFTBUT; - if ((ev.buttons & _MOUSE_LEFT) != (old_buttons & _MOUSE_LEFT)) - message = EVT_LEFTBMASK; - if (ev.buttons & _MOUSE_RIGHT) - but_stat |= EVT_RIGHTBUT; - if ((ev.buttons & _MOUSE_RIGHT) != (old_buttons & _MOUSE_RIGHT)) - message |= EVT_RIGHTBMASK; - if (ev.dx || ev.dy) { - ev.dy = -ev.dy; - EVT.mx += MickeyToPixel(ev.dx); - EVT.my += MickeyToPixel(ev.dy); - if (EVT.mx < 0) EVT.mx = 0; - if (EVT.my < 0) EVT.my = 0; - if (EVT.mx > rangeX) EVT.mx = rangeX; - if (EVT.my > rangeY) EVT.my = rangeY; - evt.what = EVT_MOUSEMOVE; - evt.when = ev.timestamp*100; - evt.where_x = EVT.mx; - evt.where_y = EVT.my; - evt.relative_x = ev.dx; - evt.relative_y = ev.dy; - evt.modifiers = but_stat; - addEvent(&evt); - } - evt.what = ev.buttons < old_buttons ? EVT_MOUSEUP : EVT_MOUSEDOWN; - evt.when = ev.timestamp*100; - evt.where_x = EVT.mx; - evt.where_y = EVT.my; - evt.relative_x = ev.dx; - evt.relative_y = ev.dy; - evt.modifiers = but_stat; - evt.message = message; - if (ev.buttons != old_buttons) { - addEvent(&evt); - old_buttons = ev.buttons; - } - } + ev.buttons &= (_MOUSE_LEFT | _MOUSE_RIGHT); + if (ev.buttons & _MOUSE_LEFT) + but_stat = EVT_LEFTBUT; + if ((ev.buttons & _MOUSE_LEFT) != (old_buttons & _MOUSE_LEFT)) + message = EVT_LEFTBMASK; + if (ev.buttons & _MOUSE_RIGHT) + but_stat |= EVT_RIGHTBUT; + if ((ev.buttons & _MOUSE_RIGHT) != (old_buttons & _MOUSE_RIGHT)) + message |= EVT_RIGHTBMASK; + if (ev.dx || ev.dy) { + ev.dy = -ev.dy; + EVT.mx += MickeyToPixel(ev.dx); + EVT.my += MickeyToPixel(ev.dy); + if (EVT.mx < 0) EVT.mx = 0; + if (EVT.my < 0) EVT.my = 0; + if (EVT.mx > rangeX) EVT.mx = rangeX; + if (EVT.my > rangeY) EVT.my = rangeY; + evt.what = EVT_MOUSEMOVE; + evt.when = ev.timestamp*100; + evt.where_x = EVT.mx; + evt.where_y = EVT.my; + evt.relative_x = ev.dx; + evt.relative_y = ev.dy; + evt.modifiers = but_stat; + addEvent(&evt); + } + evt.what = ev.buttons < old_buttons ? EVT_MOUSEUP : EVT_MOUSEDOWN; + evt.when = ev.timestamp*100; + evt.where_x = EVT.mx; + evt.where_y = EVT.my; + evt.relative_x = ev.dx; + evt.relative_y = ev.dy; + evt.modifiers = but_stat; + evt.message = message; + if (ev.buttons != old_buttons) { + addEvent(&evt); + old_buttons = ev.buttons; + } + } } #endif /* __QNXNTO__ */ @@ -400,7 +400,7 @@ char buf[128]; FILE *p; int argno,len; -#endif +#endif #ifdef __QNXNTO__ ThreadCtl(_NTO_TCTL_IO, 0); /* So joystick code won't blow up */ @@ -410,7 +410,7 @@ EVT.mouseMove = mouseMove; initEventQueue(); memset(keyUpMsg,0,sizeof(keyUpMsg)); - + #ifdef __QNXNTO__ /* * User may already have input running with the right parameters. @@ -419,82 +419,82 @@ * manager. */ if ((mouse_fd = open("/dev/mouse0", O_RDONLY | O_NONBLOCK)) < 0) { - /* Run inputtrap to get the args for input */ - if ((p = popen("inputtrap", "r")) == NULL) - PM_fatalError("Error running 'inputtrap'"); - fgets(buf, sizeof(buf), p); - pclose(p); + /* Run inputtrap to get the args for input */ + if ((p = popen("inputtrap", "r")) == NULL) + PM_fatalError("Error running 'inputtrap'"); + fgets(buf, sizeof(buf), p); + pclose(p); - /* Build the argument list */ - len = strlen(buf); - iarg[0] = buf; - for (i = 0, argno = 0; i < len && argno < 15;) { - if (argno == 1) { - /* - * Add flags to input's arg list. - * '-r' means run as resource - * manager, providing the /dev/mouse - * and /dev/keyboard interfaces. - * '-P' supresses the /dev/photon - * mechanism. - */ - iarg[argno++] = "-Pr"; - continue; - } - while (buf[i] == ' ') - i++; - if (buf[i] == '\0' || buf[i] == '\n') - break; - iarg[argno++] = &buf[i]; - while (buf[i] != ' ' - && buf[i] != '\0' && buf[i] != '\n') - i++; - buf[i++] = '\0'; - } - iarg[argno] = NULL; - - if ((kill_pid = spawnvp(P_NOWAITO, iarg[0], iarg)) == -1) { - perror("spawning input resmgr"); - PM_fatalError("Could not start input resmgr"); - } - for (i = 0; i < 10; i++) { - if (stat("/dev/mouse0", &st) == 0) - break; - sleep(1); - } - if ((mouse_fd = open("/dev/mouse0", O_RDONLY|O_NONBLOCK)) < 0) { - perror("/dev/mouse0"); - PM_fatalError("Could not open /dev/mouse0"); - } - } + /* Build the argument list */ + len = strlen(buf); + iarg[0] = buf; + for (i = 0, argno = 0; i < len && argno < 15;) { + if (argno == 1) { + /* + * Add flags to input's arg list. + * '-r' means run as resource + * manager, providing the /dev/mouse + * and /dev/keyboard interfaces. + * '-P' supresses the /dev/photon + * mechanism. + */ + iarg[argno++] = "-Pr"; + continue; + } + while (buf[i] == ' ') + i++; + if (buf[i] == '\0' || buf[i] == '\n') + break; + iarg[argno++] = &buf[i]; + while (buf[i] != ' ' + && buf[i] != '\0' && buf[i] != '\n') + i++; + buf[i++] = '\0'; + } + iarg[argno] = NULL; + + if ((kill_pid = spawnvp(P_NOWAITO, iarg[0], iarg)) == -1) { + perror("spawning input resmgr"); + PM_fatalError("Could not start input resmgr"); + } + for (i = 0; i < 10; i++) { + if (stat("/dev/mouse0", &st) == 0) + break; + sleep(1); + } + if ((mouse_fd = open("/dev/mouse0", O_RDONLY|O_NONBLOCK)) < 0) { + perror("/dev/mouse0"); + PM_fatalError("Could not open /dev/mouse0"); + } + } if ((kbd_fd = open("/dev/keyboard0", O_RDONLY|O_NONBLOCK)) < 0) { - perror("/dev/keyboard0"); - PM_fatalError("Could not open /dev/keyboard0"); - } + perror("/dev/keyboard0"); + PM_fatalError("Could not open /dev/keyboard0"); + } #else /* Connect to Input/Mouse for event handling */ if (_PM_mouse_ctl == NULL) { - _PM_mouse_ctl = mouse_open(0, "/dev/mouse", 0); + _PM_mouse_ctl = mouse_open(0, "/dev/mouse", 0); - /* "Mouse" is not running; attempt to start it */ - if (_PM_mouse_ctl == NULL) { - iarg[0] = "mousetrap"; - iarg[1] = "start"; - iarg[2] = NULL; - if ((kill_pid = spawnvp(P_NOWAITO, iarg[0], (void*)iarg)) == -1) - perror("spawn (mousetrap)"); - else { - for (i = 0; i < 10; i++) { - if (stat("/dev/mouse", &st) == 0) - break; - sleep(1); - } - _PM_mouse_ctl = mouse_open(0, "/dev/mouse", 0); - } - } - } + /* "Mouse" is not running; attempt to start it */ + if (_PM_mouse_ctl == NULL) { + iarg[0] = "mousetrap"; + iarg[1] = "start"; + iarg[2] = NULL; + if ((kill_pid = spawnvp(P_NOWAITO, iarg[0], (void*)iarg)) == -1) + perror("spawn (mousetrap)"); + else { + for (i = 0; i < 10; i++) { + if (stat("/dev/mouse", &st) == 0) + break; + sleep(1); + } + _PM_mouse_ctl = mouse_open(0, "/dev/mouse", 0); + } + } + } if (_PM_keyboard_fd == -1) - _PM_keyboard_fd = open("/dev/kbd", O_RDONLY|O_NONBLOCK); + _PM_keyboard_fd = open("/dev/kbd", O_RDONLY|O_NONBLOCK); #endif /* Catch program termination signals so we can clean up properly */ @@ -532,7 +532,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for QNX + /* Do nothing for QNX */ } /**************************************************************************** @@ -542,7 +542,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for QNX + /* Do nothing for QNX */ } /**************************************************************************** @@ -556,13 +556,13 @@ int flags; if (kbd_fd != -1) { - close(kbd_fd); - kbd_fd = -1; - } + close(kbd_fd); + kbd_fd = -1; + } if (mouse_fd != -1) { - close(mouse_fd); - mouse_fd = -1; - } + close(mouse_fd); + mouse_fd = -1; + } #endif /* Restore signal handlers */ @@ -573,30 +573,29 @@ #ifndef __QNXNTO__ /* Kill the Input/Mouse driver if we have spawned it */ if (_PM_mouse_ctl != NULL) { - struct _fd_entry fde; - uint pid = 0; + struct _fd_entry fde; + uint pid = 0; - /* Find out the pid of the mouse driver */ - if (kill_pid > 0) { - if (qnx_fd_query(0, - 0, _PM_mouse_ctl->fd, &fde) != -1) - pid = fde.pid; - } - mouse_close(_PM_mouse_ctl); - _PM_mouse_ctl = NULL; + /* Find out the pid of the mouse driver */ + if (kill_pid > 0) { + if (qnx_fd_query(0, + 0, _PM_mouse_ctl->fd, &fde) != -1) + pid = fde.pid; + } + mouse_close(_PM_mouse_ctl); + _PM_mouse_ctl = NULL; - if (pid > 0) { - /* For some reasons the PID's are different under QNX4, - * so we use the old mechanism to kill the mouse server. - */ - kill(pid, SIGTERM); - kill_pid = 0; - } - } + if (pid > 0) { + /* For some reasons the PID's are different under QNX4, + * so we use the old mechanism to kill the mouse server. + */ + kill(pid, SIGTERM); + kill_pid = 0; + } + } #endif if (kill_pid > 0) { - kill(kill_pid, SIGTERM); - kill_pid = 0; - } + kill(kill_pid, SIGTERM); + kill_pid = 0; + } } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c index de749e3..f960c75 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c +++ b/board/MAI/bios_emulator/scitech/src/pm/qnx/mtrrqnx.c @@ -75,7 +75,7 @@ ibool _ASMAPI _MTRR_isRing0(void) { #ifdef __QNXNTO__ - return false; // Not implemented yet! + return false; /* Not implemented yet! */ #else return true; #endif @@ -101,15 +101,15 @@ #endif #ifdef __QNXNTO__ if ((intrid = InterruptAttach(_NTO_INTR_CLASS_EXTERNAL | clock_intno, - _PM_ring0_isr, (void*)&_PM_R0, sizeof(_PM_R0), _NTO_INTR_FLAGS_END)) == -1) { + _PM_ring0_isr, (void*)&_PM_R0, sizeof(_PM_R0), _NTO_INTR_FLAGS_END)) == -1) { #else if ((intrid = qnx_hint_attach(clock_intno, _PM_ring0_isr, FP_SEG(&_PM_R0))) == -1) { #endif - perror("Attach"); - exit(-1); - } + perror("Attach"); + exit(-1); + } while (_PM_R0.service != -1) - ; + ; #ifdef __QNXNTO__ InterruptDetachId(intrid); #else diff --git a/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c b/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c index c2b41eb..c993ee0 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/qnx/pm.c @@ -77,11 +77,11 @@ if (VRegs == NULL) { #ifdef __QNXNTO__ - ThreadCtl(_NTO_TCTL_IO, 0); /* Get IO privilidge */ + ThreadCtl(_NTO_TCTL_IO, 0); /* Get IO privilidge */ #endif - force = getenv("VBIOS_METHOD"); - VRegs = VBIOSinit(force ? atoi(force) : 0); - } + force = getenv("VBIOS_METHOD"); + VRegs = VBIOSinit(force ? atoi(force) : 0); + } #ifndef __QNXNTO__ MTRR_init(); #endif @@ -100,9 +100,9 @@ { uint pos = strlen(s); if (s[pos-1] != '/') { - s[pos] = '/'; - s[pos+1] = '\0'; - } + s[pos] = '/'; + s[pos+1] = '\0'; + } } void PMAPI PM_setFatalErrorCleanup( @@ -114,7 +114,7 @@ void PMAPI PM_fatalError(const char *msg) { if (fatalErrorCleanup) - fatalErrorCleanup(); + fatalErrorCleanup(); fprintf(stderr,"%s\n", msg); exit(1); } @@ -122,18 +122,18 @@ static void ExitVBEBuf(void) { if (VESABuf_ptr) - PM_freeRealSeg(VESABuf_ptr); + PM_freeRealSeg(VESABuf_ptr); VESABuf_ptr = 0; } void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff) { if (!VESABuf_ptr) { - /* Allocate a global buffer for communicating with the VESA VBE */ - if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) - return NULL; - atexit(ExitVBEBuf); - } + /* Allocate a global buffer for communicating with the VESA VBE */ + if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) + return NULL; + atexit(ExitVBEBuf); + } *len = VESABuf_len; *rseg = VESABuf_rseg; *roff = VESABuf_roff; @@ -145,11 +145,11 @@ struct termios termios_p; if (raw_count++ > 0) - return 0; + return 0; /* Go into "raw" input mode */ if (tcgetattr(STDIN_FILENO, &termios_p)) - return -1; + return -1; termios_p.c_cc[VMIN] = 1; termios_p.c_cc[VTIME] = 0; @@ -163,7 +163,7 @@ struct termios termios_p; if (raw_count-- != 1) - return; + return; tcgetattr(STDIN_FILENO, &termios_p); termios_p.c_lflag |= (ECHO|ICANON|ISIG|ECHOE|ECHOK|ECHONL); @@ -176,7 +176,7 @@ int blocking, c; if (term_raw() == -1) - return 0; + return 0; /* Go into non blocking mode */ blocking = fcntl(STDIN_FILENO, F_GETFL) | O_NONBLOCK; @@ -187,9 +187,9 @@ fcntl(STDIN_FILENO, F_SETFL, blocking & ~O_NONBLOCK); term_restore(); if (c != EOF) { - ungetc(c, stdin); - return c; - } + ungetc(c, stdin); + return c; + } clearerr(stdin); return 0; } @@ -199,13 +199,13 @@ int c; if (term_raw() == -1) - return (0); + return (0); c = getc(stdin); #if defined(__QNX__) && !defined(__QNXNTO__) if (c == 0xA) - c = 0x0D; + c = 0x0D; else if (c == 0x7F) - c = 0x08; + c = 0x08; #endif term_restore(); return c; @@ -223,13 +223,13 @@ int fd; if (console_count++) - return 0; + return 0; if ((fd = open("/dev/con1", O_RDWR)) == -1) - return -1; + return -1; cc = console_open(fd, O_RDWR); close(fd); if (cc == NULL) - return -1; + return -1; #endif return 1; } @@ -246,7 +246,7 @@ int flags; if ((fd = open("/dev/con1", O_RDWR)) == -1) - return; + return; flags = _CONCTL_INVISIBLE_CHG | _CONCTL_INVISIBLE; devctl(fd, DCMD_CHR_SERCTL, &flags, sizeof flags, 0); close(fd); @@ -255,10 +255,10 @@ /* Save QNX 4 console state */ console_read(cc, -1, 0, NULL, 0, - (int *)buf+1, (int *)buf+2, NULL); + (int *)buf+1, (int *)buf+2, NULL); *(int *)buf = console_ctrl(cc, -1, - CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE, - CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE); + CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE, + CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE); /* Save state of VGA registers */ PM_saveVGAState(stateBuf); @@ -277,7 +277,7 @@ int flags; if ((fd = open("/dev/con1", O_RDWR)) == -1) - return; + return; flags = _CONCTL_INVISIBLE_CHG; devctl(fd, DCMD_CHR_SERCTL, &flags, sizeof flags, 0); close(fd); @@ -289,9 +289,9 @@ /* Restore QNX 4 console state */ console_ctrl(cc, -1, *(int *)buf, - CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE); + CONSOLE_NORESIZE | CONSOLE_NOSWITCH | CONSOLE_INVISIBLE); console_write(cc, -1, 0, NULL, 0, - (int *)buf+1, (int *)buf+2, NULL); + (int *)buf+1, (int *)buf+2, NULL); #endif } @@ -299,16 +299,16 @@ { #ifndef __QNXNTO__ if (--console_count == 0) { - console_close(cc); - cc = NULL; - } + console_close(cc); + cc = NULL; + } #endif } void PM_setOSCursorLocation(int x,int y) { if (!cc) - return; + return; #ifndef __QNXNTO__ console_write(cc, -1, 0, NULL, 0, &y, &x, NULL); #endif @@ -320,18 +320,18 @@ ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler ih, int frequency) { - // TODO: Implement this for QNX + /* TODO: Implement this for QNX */ return false; } void PMAPI PM_setRealTimeClockFrequency(int frequency) { - // TODO: Implement this for QNX + /* TODO: Implement this for QNX */ } void PMAPI PM_restoreRealTimeClockHandler(void) { - // TODO: Implement this for QNX + /* TODO: Implement this for QNX */ } char * PMAPI PM_getCurrentPath( @@ -388,10 +388,10 @@ sprintf(path,"/etc/config/scitech/%d/config", getnid()); #endif if ((env = getenv("NUCLEUS_PATH")) != NULL) { - strcpy(path,env); - PM_backslash(path); - strcat(path,"config"); - } + strcpy(path,env); + PM_backslash(path); + strcat(path,"config"); + } return path; } @@ -429,26 +429,26 @@ unsigned offset, i, maplen; if (ptr != NULL) - return ptr; + return ptr; /* Some trickery is required to get the linear address 64K aligned */ for (i = 0; i < 5; i++) { - ptr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); - offset = 0x10000 - ((unsigned)ptr % 0x10000); - if (!offset) - break; - munmap(ptr, 0x10000); - maplen = 0x10000 + offset; - freeptr = PM_mapPhysicalAddr(0xA0000-offset, maplen-1,true); - ptr = (void *)(offset + (unsigned)freeptr); - if (0x10000 - ((unsigned)ptr % 0x10000)) - break; - munmap(freeptr, maplen); - } + ptr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); + offset = 0x10000 - ((unsigned)ptr % 0x10000); + if (!offset) + break; + munmap(ptr, 0x10000); + maplen = 0x10000 + offset; + freeptr = PM_mapPhysicalAddr(0xA0000-offset, maplen-1,true); + ptr = (void *)(offset + (unsigned)freeptr); + if (0x10000 - ((unsigned)ptr % 0x10000)) + break; + munmap(freeptr, maplen); + } if (i == 5) { - printf("Could not get a 64K aligned linear address for A0000 region\n"); - exit(1); - } + printf("Could not get a 64K aligned linear address for A0000 region\n"); + exit(1); + } return ptr; } @@ -468,31 +468,31 @@ #endif if (rounddown) { - if (base < rounddown) - return NULL; - base -= rounddown; - limit += rounddown; - } + if (base < rounddown) + return NULL; + base -= rounddown; + limit += rounddown; + } #ifndef __QNXNTO__ if (__VidFD < 0) { - if ((__VidFD = shm_open( "Physical", O_RDWR, 0777 )) == -1) { - perror( "Cannot open Physical memory" ); - exit(1); - } - } + if ((__VidFD = shm_open( "Physical", O_RDWR, 0777 )) == -1) { + perror( "Cannot open Physical memory" ); + exit(1); + } + } o = base & 0xFFF; limit = (limit + o + 0xFFF) & ~0xFFF; if ((int)(p = mmap( 0, limit, prot, MAP_SHARED, - __VidFD, base )) == -1 ) { - return NULL; - } + __VidFD, base )) == -1 ) { + return NULL; + } p += o; #else if ((p = mmap(0, limit, prot, MAP_PHYS | MAP_SHARED, - NOFD, base)) == MAP_FAILED) { - return (void *)-1; - } + NOFD, base)) == MAP_FAILED) { + return (void *)-1; + } #endif return (p + rounddown); } @@ -504,8 +504,8 @@ ulong PMAPI PM_getPhysicalAddr(void *p) { - // TODO: This function should find the physical address of a linear - // address. + /* TODO: This function should find the physical address of a linear */ + /* address. */ return 0xFFFFFFFFUL; } @@ -514,35 +514,35 @@ ulong length, ulong *physAddress) { - // TODO: Implement this! + /* TODO: Implement this! */ return false; } void PMAPI PM_sleep(ulong milliseconds) { - // TODO: Put the process to sleep for milliseconds + /* TODO: Put the process to sleep for milliseconds */ } int PMAPI PM_getCOMPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + } return 0; } int PMAPI PM_getLPTPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -566,20 +566,20 @@ PM_init(); if ((p = VBIOSgetmemptr(r_seg, r_off, VRegs)) == (void *)-1) - return NULL; + return NULL; return p; } void * PMAPI PM_allocRealSeg(uint size,uint *r_seg,uint *r_off) { if (size > 1024) { - printf("PM_allocRealSeg: can't handle %d bytes\n", size); - return 0; - } + printf("PM_allocRealSeg: can't handle %d bytes\n", size); + return 0; + } if (rmbuf_inuse != 0) { - printf("PM_allocRealSeg: transfer area already in use\n"); - return 0; - } + printf("PM_allocRealSeg: transfer area already in use\n"); + return 0; + } PM_init(); rmbuf_inuse = 1; *r_seg = VBIOS_TransBufVSeg(VRegs); @@ -590,9 +590,9 @@ void PMAPI PM_freeRealSeg(void *mem) { if (rmbuf_inuse == 0) { - printf("PM_freeRealSeg: nothing was allocated\n"); - return; - } + printf("PM_freeRealSeg: nothing was allocated\n"); + return; + } rmbuf_inuse = 0; } @@ -600,7 +600,7 @@ { PM_init(); if (VRegs == NULL) - return; + return; VRegs->l.eax = regs->eax; VRegs->l.ebx = regs->ebx; @@ -624,7 +624,7 @@ { PM_init(); if (VRegs == NULL) - return 0; + return 0; VRegs->l.eax = in->e.eax; VRegs->l.ebx = in->e.ebx; @@ -651,41 +651,41 @@ { PM_init(); if (VRegs == NULL) - return 0; + return 0; if (intno == 0x21) { - time_t today = time(NULL); - struct tm *t; - t = localtime(&today); - out->x.cx = t->tm_year + 1900; - out->h.dh = t->tm_mon + 1; - out->h.dl = t->tm_mday; - return 0; - } + time_t today = time(NULL); + struct tm *t; + t = localtime(&today); + out->x.cx = t->tm_year + 1900; + out->h.dh = t->tm_mon + 1; + out->h.dl = t->tm_mday; + return 0; + } else { - VRegs->l.eax = in->e.eax; - VRegs->l.ebx = in->e.ebx; - VRegs->l.ecx = in->e.ecx; - VRegs->l.edx = in->e.edx; - VRegs->l.esi = in->e.esi; - VRegs->l.edi = in->e.edi; - VRegs->w.es = sregs->es; - VRegs->w.ds = sregs->ds; + VRegs->l.eax = in->e.eax; + VRegs->l.ebx = in->e.ebx; + VRegs->l.ecx = in->e.ecx; + VRegs->l.edx = in->e.edx; + VRegs->l.esi = in->e.esi; + VRegs->l.edi = in->e.edi; + VRegs->w.es = sregs->es; + VRegs->w.ds = sregs->ds; - VBIOSint(intno, VRegs, 1024); + VBIOSint(intno, VRegs, 1024); - out->e.eax = VRegs->l.eax; - out->e.ebx = VRegs->l.ebx; - out->e.ecx = VRegs->l.ecx; - out->e.edx = VRegs->l.edx; - out->e.esi = VRegs->l.esi; - out->e.edi = VRegs->l.edi; - out->x.cflag = VRegs->w.flags & 0x1; - sregs->es = VRegs->w.es; - sregs->ds = VRegs->w.ds; + out->e.eax = VRegs->l.eax; + out->e.ebx = VRegs->l.ebx; + out->e.ecx = VRegs->l.ecx; + out->e.edx = VRegs->l.edx; + out->e.esi = VRegs->l.esi; + out->e.edi = VRegs->l.edi; + out->x.cflag = VRegs->w.flags & 0x1; + sregs->es = VRegs->w.es; + sregs->ds = VRegs->w.ds; - return out->x.ax; - } + return out->x.ax; + } } void PMAPI PM_callRealMode(uint seg,uint off, RMREGS *in, @@ -693,7 +693,7 @@ { PM_init(); if (VRegs == NULL) - return; + return; VRegs->l.eax = in->e.eax; VRegs->l.ebx = in->e.ebx; @@ -730,7 +730,7 @@ ibool contiguous, ibool below16M) { - // TODO: Implement this on QNX + /* TODO: Implement this on QNX */ return NULL; } @@ -739,27 +739,27 @@ uint size, ibool contiguous) { - // TODO: Implement this on QNX + /* TODO: Implement this on QNX */ } void * PMAPI PM_allocPage( ibool locked) { - // TODO: Implement this on QNX + /* TODO: Implement this on QNX */ return NULL; } void PMAPI PM_freePage( void *p) { - // TODO: Implement this on QNX + /* TODO: Implement this on QNX */ } void PMAPI PM_setBankA(int bank) { PM_init(); if (VRegs == NULL) - return; + return; VRegs->l.eax = 0x4F05; VRegs->l.ebx = 0x0000; @@ -771,7 +771,7 @@ { PM_init(); if (VRegs == NULL) - return; + return; VRegs->l.eax = 0x4F05; VRegs->l.ebx = 0x0000; @@ -788,7 +788,7 @@ { PM_init(); if (VRegs == NULL) - return; + return; VRegs->l.eax = 0x4F07; VRegs->l.ebx = waitVRT; @@ -837,7 +837,7 @@ PM_MODULE PMAPI PM_loadLibrary( const char *szDLLName) { - // TODO: Implement this to load shared libraries! + /* TODO: Implement this to load shared libraries! */ (void)szDLLName; return NULL; } @@ -846,7 +846,7 @@ PM_MODULE hModule, const char *szProcName) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)hModule; (void)szProcName; return NULL; @@ -855,14 +855,14 @@ void PMAPI PM_freeLibrary( PM_MODULE hModule) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)hModule; } int PMAPI PM_setIOPL( int level) { - // QNX handles IOPL selection at the program link level. + /* QNX handles IOPL selection at the program link level. */ return level; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c index 3d6dd44..4f32c3e 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c +++ b/board/MAI/bios_emulator/scitech/src/pm/rttarget/cpuinfo.c @@ -46,7 +46,7 @@ oldPriority = GetThreadPriority(hThread); if (oldPriority != THREAD_PRIORITY_ERROR_RETURN) - SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL); + SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL); return oldPriority; } @@ -60,7 +60,7 @@ HANDLE hThread = GetCurrentThread(); if (oldPriority != THREAD_PRIORITY_ERROR_RETURN) - SetThreadPriority(hThread, oldPriority); + SetThreadPriority(hThread, oldPriority); } /**************************************************************************** @@ -71,12 +71,12 @@ CPU_largeInteger *freq) { if (!QueryPerformanceFrequency((LARGE_INTEGER*)freq)) { - havePerformanceCounter = false; - freq->low = 100000; - freq->high = 0; - } + havePerformanceCounter = false; + freq->low = 100000; + freq->high = 0; + } else - havePerformanceCounter = true; + havePerformanceCounter = true; } /**************************************************************************** @@ -86,9 +86,9 @@ #define GetCounter(t) \ { \ if (havePerformanceCounter) \ - QueryPerformanceCounter((LARGE_INTEGER*)t); \ + QueryPerformanceCounter((LARGE_INTEGER*)t); \ else { \ - (t)->low = timeGetTime() * 100; \ - (t)->high = 0; \ - } \ + (t)->low = timeGetTime() * 100; \ + (t)->high = 0; \ + } \ } diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c index e9aba21..962a14a 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/rttarget/event.c @@ -71,113 +71,113 @@ event_t evt; while (PeekMessage(&msg,NULL,0,0,PM_REMOVE)) { - memset(&evt,0,sizeof(evt)); - switch (msg.message) { - case WM_MOUSEMOVE: - evt.what = EVT_MOUSEMOVE; - break; - case WM_LBUTTONDBLCLK: - evt.what = EVT_MOUSEDOWN; - evt.message = EVT_LEFTBMASK | EVT_DBLCLICK; - break; - case WM_LBUTTONDOWN: - evt.what = EVT_MOUSEDOWN; - evt.message = EVT_LEFTBMASK; - break; - case WM_LBUTTONUP: - evt.what = EVT_MOUSEUP; - evt.message = EVT_LEFTBMASK; - break; - case WM_RBUTTONDBLCLK: - evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK; - evt.message = EVT_RIGHTBMASK; - break; - case WM_RBUTTONDOWN: - evt.what = EVT_MOUSEDOWN; - evt.message = EVT_RIGHTBMASK; - break; - case WM_RBUTTONUP: - evt.what = EVT_MOUSEUP; - evt.message = EVT_RIGHTBMASK; - break; - case WM_KEYDOWN: - case WM_SYSKEYDOWN: - if (HIWORD(msg.lParam) & KF_REPEAT) { - evt.what = EVT_KEYREPEAT; - } - else { - evt.what = EVT_KEYDOWN; - } - break; - case WM_KEYUP: - case WM_SYSKEYUP: - evt.what = EVT_KEYUP; - break; - } + memset(&evt,0,sizeof(evt)); + switch (msg.message) { + case WM_MOUSEMOVE: + evt.what = EVT_MOUSEMOVE; + break; + case WM_LBUTTONDBLCLK: + evt.what = EVT_MOUSEDOWN; + evt.message = EVT_LEFTBMASK | EVT_DBLCLICK; + break; + case WM_LBUTTONDOWN: + evt.what = EVT_MOUSEDOWN; + evt.message = EVT_LEFTBMASK; + break; + case WM_LBUTTONUP: + evt.what = EVT_MOUSEUP; + evt.message = EVT_LEFTBMASK; + break; + case WM_RBUTTONDBLCLK: + evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK; + evt.message = EVT_RIGHTBMASK; + break; + case WM_RBUTTONDOWN: + evt.what = EVT_MOUSEDOWN; + evt.message = EVT_RIGHTBMASK; + break; + case WM_RBUTTONUP: + evt.what = EVT_MOUSEUP; + evt.message = EVT_RIGHTBMASK; + break; + case WM_KEYDOWN: + case WM_SYSKEYDOWN: + if (HIWORD(msg.lParam) & KF_REPEAT) { + evt.what = EVT_KEYREPEAT; + } + else { + evt.what = EVT_KEYDOWN; + } + break; + case WM_KEYUP: + case WM_SYSKEYUP: + evt.what = EVT_KEYUP; + break; + } - /* Convert mouse event modifier flags */ - if (evt.what & EVT_MOUSEEVT) { - evt.where_x = msg.pt.x; - evt.where_y = msg.pt.y; - if (evt.what == EVT_MOUSEMOVE) { - if (oldMove != -1) { - evtq[oldMove].where_x = evt.where_x;/* Modify existing one */ - evtq[oldMove].where_y = evt.where_y; - evt.what = 0; - } - else { - oldMove = freeHead; /* Save id of this move event */ - } - } - else - oldMove = -1; - if (msg.wParam & MK_LBUTTON) - evt.modifiers |= EVT_LEFTBUT; - if (msg.wParam & MK_RBUTTON) - evt.modifiers |= EVT_RIGHTBUT; - if (msg.wParam & MK_SHIFT) - evt.modifiers |= EVT_SHIFTKEY; - if (msg.wParam & MK_CONTROL) - evt.modifiers |= EVT_CTRLSTATE; - } + /* Convert mouse event modifier flags */ + if (evt.what & EVT_MOUSEEVT) { + evt.where_x = msg.pt.x; + evt.where_y = msg.pt.y; + if (evt.what == EVT_MOUSEMOVE) { + if (oldMove != -1) { + evtq[oldMove].where_x = evt.where_x;/* Modify existing one */ + evtq[oldMove].where_y = evt.where_y; + evt.what = 0; + } + else { + oldMove = freeHead; /* Save id of this move event */ + } + } + else + oldMove = -1; + if (msg.wParam & MK_LBUTTON) + evt.modifiers |= EVT_LEFTBUT; + if (msg.wParam & MK_RBUTTON) + evt.modifiers |= EVT_RIGHTBUT; + if (msg.wParam & MK_SHIFT) + evt.modifiers |= EVT_SHIFTKEY; + if (msg.wParam & MK_CONTROL) + evt.modifiers |= EVT_CTRLSTATE; + } - /* Convert keyboard codes */ - TranslateMessage(&msg); - if (evt.what & EVT_KEYEVT) { - int scanCode = (msg.lParam >> 16) & 0xFF; - if (evt.what == EVT_KEYUP) { - /* Get message for keyup code from table of cached down values */ - evt.message = keyUpMsg[scanCode]; - keyUpMsg[scanCode] = 0; - } - else { - if (PeekMessage(&charMsg,NULL,WM_CHAR,WM_CHAR,PM_REMOVE)) - evt.message = charMsg.wParam; - if (PeekMessage(&charMsg,NULL,WM_SYSCHAR,WM_SYSCHAR,PM_REMOVE)) - evt.message = charMsg.wParam; - evt.message |= ((msg.lParam >> 8) & 0xFF00); - keyUpMsg[scanCode] = (ushort)evt.message; - } - if (evt.what == EVT_KEYREPEAT) - evt.message |= (msg.lParam << 16); - if (HIWORD(msg.lParam) & KF_ALTDOWN) - evt.modifiers |= EVT_ALTSTATE; - if (GetKeyState(VK_SHIFT) & 0x8000U) - evt.modifiers |= EVT_SHIFTKEY; - if (GetKeyState(VK_CONTROL) & 0x8000U) - evt.modifiers |= EVT_CTRLSTATE; - oldMove = -1; - } + /* Convert keyboard codes */ + TranslateMessage(&msg); + if (evt.what & EVT_KEYEVT) { + int scanCode = (msg.lParam >> 16) & 0xFF; + if (evt.what == EVT_KEYUP) { + /* Get message for keyup code from table of cached down values */ + evt.message = keyUpMsg[scanCode]; + keyUpMsg[scanCode] = 0; + } + else { + if (PeekMessage(&charMsg,NULL,WM_CHAR,WM_CHAR,PM_REMOVE)) + evt.message = charMsg.wParam; + if (PeekMessage(&charMsg,NULL,WM_SYSCHAR,WM_SYSCHAR,PM_REMOVE)) + evt.message = charMsg.wParam; + evt.message |= ((msg.lParam >> 8) & 0xFF00); + keyUpMsg[scanCode] = (ushort)evt.message; + } + if (evt.what == EVT_KEYREPEAT) + evt.message |= (msg.lParam << 16); + if (HIWORD(msg.lParam) & KF_ALTDOWN) + evt.modifiers |= EVT_ALTSTATE; + if (GetKeyState(VK_SHIFT) & 0x8000U) + evt.modifiers |= EVT_SHIFTKEY; + if (GetKeyState(VK_CONTROL) & 0x8000U) + evt.modifiers |= EVT_CTRLSTATE; + oldMove = -1; + } - if (evt.what != 0) { - /* Add time stamp and add the event to the queue */ - evt.when = msg.time; - if (count < EVENTQSIZE) { - addEvent(&evt); - } - } - DispatchMessage(&msg); - } + if (evt.what != 0) { + /* Add time stamp and add the event to the queue */ + evt.when = msg.time; + if (count < EVENTQSIZE) { + addEvent(&evt); + } + } + DispatchMessage(&msg); + } } /**************************************************************************** @@ -261,7 +261,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for Win32 + /* Do nothing for Win32 */ } /**************************************************************************** @@ -271,7 +271,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for Win32 + /* Do nothing for Win32 */ } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c index e6c1fbd..47d7ed6 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/rttarget/pm.c @@ -59,7 +59,7 @@ ****************************************************************************/ void PMAPI PM_init(void) { - // TODO: dO any special init code in here. + /* TODO: dO any special init code in here. */ MTRR_init(); } @@ -90,9 +90,9 @@ { uint pos = strlen(s); if (s[pos-1] != '\\') { - s[pos] = '\\'; - s[pos+1] = '\0'; - } + s[pos] = '\\'; + s[pos+1] = '\0'; + } } /**************************************************************************** @@ -113,9 +113,9 @@ const char *msg) { if (fatalErrorCleanup) - fatalErrorCleanup(); - // TODO: Display a fatal error message and exit! -// MessageBox(NULL,msg,"Fatal Error!", MB_ICONEXCLAMATION); + fatalErrorCleanup(); + /* TODO: Display a fatal error message and exit! */ +/* MessageBox(NULL,msg,"Fatal Error!", MB_ICONEXCLAMATION); */ exit(1); } @@ -138,7 +138,7 @@ ****************************************************************************/ int PMAPI PM_kbhit(void) { - // TODO: Need to check if a key is waiting on the keyboard queue + /* TODO: Need to check if a key is waiting on the keyboard queue */ return true; } @@ -148,7 +148,7 @@ ****************************************************************************/ int PMAPI PM_getch(void) { - // TODO: Need to obtain the next keypress, and block until one is hit + /* TODO: Need to obtain the next keypress, and block until one is hit */ return 0xD; } @@ -240,7 +240,7 @@ ****************************************************************************/ const char * PMAPI PM_getNucleusPath(void) { - // TODO: Point this at the path when the Nucleus drivers will be found + /* TODO: Point this at the path when the Nucleus drivers will be found */ return "c:\\nucleus"; } @@ -294,7 +294,7 @@ { static void *bankPtr; if (!bankPtr) - bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); + bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); return bankPtr; } @@ -307,7 +307,7 @@ ulong limit, ibool isCached) { - // TODO: Map a physical memory address to a linear address + /* TODO: Map a physical memory address to a linear address */ return NULL; } @@ -319,13 +319,13 @@ void *ptr, ulong limit) { - // TODO: Free the physical address mapping + /* TODO: Free the physical address mapping */ } ulong PMAPI PM_getPhysicalAddr(void *p) { - // TODO: This function should find the physical address of a linear - // address. + /* TODO: This function should find the physical address of a linear */ + /* address. */ return 0xFFFFFFFFUL; } @@ -336,24 +336,24 @@ int PMAPI PM_getCOMPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + } return 0; } int PMAPI PM_getLPTPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -484,8 +484,8 @@ ulong *physical, ulong *total) { - // TODO: Figure out how to determine the available memory. Not entirely - // critical so returning 0 is OK. + /* TODO: Figure out how to determine the available memory. Not entirely */ + /* critical so returning 0 is OK. */ *physical = *total = 0; } @@ -499,7 +499,7 @@ ibool contiguous, ibool below16M) { - // TODO: Allocate a block of locked, phsyically contigous memory for DMA + /* TODO: Allocate a block of locked, phsyically contigous memory for DMA */ return 0; } @@ -510,10 +510,10 @@ void PMAPI PM_freeLockedMem( void *p, uint size, - + ibool contiguous) { - // TODO: Free a locked memory buffer + /* TODO: Free a locked memory buffer */ } /**************************************************************************** @@ -564,7 +564,7 @@ PM_MODULE PMAPI PM_loadLibrary( const char *szDLLName) { - // TODO: Implement this to load shared libraries! + /* TODO: Implement this to load shared libraries! */ (void)szDLLName; return NULL; } @@ -573,7 +573,7 @@ PM_MODULE hModule, const char *szProcName) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)hModule; (void)szProcName; return NULL; @@ -582,7 +582,7 @@ void PMAPI PM_freeLibrary( PM_MODULE hModule) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)hModule; } @@ -594,9 +594,9 @@ const char *filename, PM_findData *findData) { - // TODO: This function should start a directory enumeration search - // given the filename (with wildcards). The data should be - // converted and returned in the findData standard form. + /* TODO: This function should start a directory enumeration search */ + /* given the filename (with wildcards). The data should be */ + /* converted and returned in the findData standard form. */ (void)filename; (void)findData; return PM_FILE_INVALID; @@ -610,10 +610,10 @@ ulong handle, PM_findData *findData) { - // TODO: This function should find the next file in directory enumeration - // search given the search criteria defined in the call to - // PM_findFirstFile. The data should be converted and returned - // in the findData standard form. + /* TODO: This function should find the next file in directory enumeration */ + /* search given the search criteria defined in the call to */ + /* PM_findFirstFile. The data should be converted and returned */ + /* in the findData standard form. */ (void)handle; (void)findData; return false; @@ -626,8 +626,8 @@ void PMAPI PM_findClose( ulong handle) { - // TODO: This function should close the find process. This may do - // nothing for some OS'es. + /* TODO: This function should close the find process. This may do */ + /* nothing for some OS'es. */ (void)handle; } @@ -648,7 +648,7 @@ char drive) { if (drive == 3) - return true; + return true; return false; } @@ -675,7 +675,7 @@ const char *filename, uint attrib) { - // TODO: Set the file attributes for a file + /* TODO: Set the file attributes for a file */ (void)filename; (void)attrib; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c index 52472c3..80c184d 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c +++ b/board/MAI/bios_emulator/scitech/src/pm/rttarget/ztimer.c @@ -57,9 +57,9 @@ LZTimerObject *tm) { if (havePerformanceCounter) - QueryPerformanceCounter((LARGE_INTEGER*)&tm->start); + QueryPerformanceCounter((LARGE_INTEGER*)&tm->start); else - tm->start.low = timeGetTime(); + tm->start.low = timeGetTime(); } /**************************************************************************** @@ -72,14 +72,14 @@ CPU_largeInteger tmLap,tmCount; if (havePerformanceCounter) { - QueryPerformanceCounter((LARGE_INTEGER*)&tmLap); - _CPU_diffTime64(&tm->start,&tmLap,&tmCount); - return _CPU_calcMicroSec(&tmCount,countFreq.low); - } + QueryPerformanceCounter((LARGE_INTEGER*)&tmLap); + _CPU_diffTime64(&tm->start,&tmLap,&tmCount); + return _CPU_calcMicroSec(&tmCount,countFreq.low); + } else { - tmLap.low = timeGetTime(); - return (tmLap.low - tm->start.low) * 1000L; - } + tmLap.low = timeGetTime(); + return (tmLap.low - tm->start.low) * 1000L; + } } /**************************************************************************** @@ -90,9 +90,9 @@ LZTimerObject *tm) { if (havePerformanceCounter) - QueryPerformanceCounter((LARGE_INTEGER*)&tm->end); + QueryPerformanceCounter((LARGE_INTEGER*)&tm->end); else - tm->end.low = timeGetTime(); + tm->end.low = timeGetTime(); } /**************************************************************************** @@ -105,11 +105,11 @@ CPU_largeInteger tmCount; if (havePerformanceCounter) { - _CPU_diffTime64(&tm->start,&tm->end,&tmCount); - return _CPU_calcMicroSec(&tmCount,countFreq.low); - } + _CPU_diffTime64(&tm->start,&tm->end,&tmCount); + return _CPU_calcMicroSec(&tmCount,countFreq.low); + } else - return (tm->end.low - tm->start.low) * 1000L; + return (tm->end.low - tm->start.low) * 1000L; } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/event.c b/board/MAI/bios_emulator/scitech/src/pm/smx/event.c index fc13bbb..533c261 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/smx/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/smx/event.c @@ -98,8 +98,8 @@ the mouse interrupt subroutine, so it must be efficient. NOTE: Interrupts MUST be OFF while this routine is called to ensure we have - mutually exclusive access to our internal data structures for - interrupt driven systems (like under DOS). + mutually exclusive access to our internal data structures for + interrupt driven systems (like under DOS). ****************************************************************************/ static void addMouseEvent( uint what, @@ -113,18 +113,18 @@ event_t evt; if (EVT.count < EVENTQSIZE) { - /* Save information in event record. */ - evt.when = _EVT_getTicks(); - evt.what = what; - evt.message = message; - evt.modifiers = but_stat; - evt.where_x = x; /* Save mouse event position */ - evt.where_y = y; - evt.relative_x = mickeyX; - evt.relative_y = mickeyY; - evt.modifiers |= EVT.keyModifiers; - addEvent(&evt); /* Add to tail of event queue */ - } + /* Save information in event record. */ + evt.when = _EVT_getTicks(); + evt.what = what; + evt.message = message; + evt.modifiers = but_stat; + evt.where_x = x; /* Save mouse event position */ + evt.where_y = y; + evt.relative_x = mickeyX; + evt.relative_y = mickeyY; + evt.modifiers |= EVT.keyModifiers; + addEvent(&evt); /* Add to tail of event queue */ + } } /**************************************************************************** @@ -140,8 +140,8 @@ to the event queue. Note: Interrupts are ON when this routine is called by the mouse driver code. -//AM: NOTE: This function has not actually been ported from DOS yet and should not -//AM: be installed until it is. +/*AM: NOTE: This function has not actually been ported from DOS yet and should not */ +/*AM: be installed until it is. */ ****************************************************************************/ static void EVTAPI mouseISR( uint mask, @@ -155,39 +155,39 @@ uint ps; if (mask & 1) { - /* Save the current mouse coordinates */ - EVT.mx = x; EVT.my = y; + /* Save the current mouse coordinates */ + EVT.mx = x; EVT.my = y; - /* If the last event was a movement event, then modify the last - * event rather than post a new one, so that the queue will not - * become saturated. Before we modify the data structures, we - * MUST ensure that interrupts are off. - */ - ps = _EVT_disableInt(); - if (EVT.oldMove != -1) { - EVT.evtq[EVT.oldMove].where_x = x; /* Modify existing one */ - EVT.evtq[EVT.oldMove].where_y = y; - EVT.evtq[EVT.oldMove].relative_x += mickeyX; - EVT.evtq[EVT.oldMove].relative_y += mickeyY; - } - else { - EVT.oldMove = EVT.freeHead; /* Save id of this move event */ - addMouseEvent(EVT_MOUSEMOVE,0,x,y,mickeyX,mickeyY,butstate); - } - _EVT_restoreInt(ps); - } + /* If the last event was a movement event, then modify the last + * event rather than post a new one, so that the queue will not + * become saturated. Before we modify the data structures, we + * MUST ensure that interrupts are off. + */ + ps = _EVT_disableInt(); + if (EVT.oldMove != -1) { + EVT.evtq[EVT.oldMove].where_x = x; /* Modify existing one */ + EVT.evtq[EVT.oldMove].where_y = y; + EVT.evtq[EVT.oldMove].relative_x += mickeyX; + EVT.evtq[EVT.oldMove].relative_y += mickeyY; + } + else { + EVT.oldMove = EVT.freeHead; /* Save id of this move event */ + addMouseEvent(EVT_MOUSEMOVE,0,x,y,mickeyX,mickeyY,butstate); + } + _EVT_restoreInt(ps); + } if (mask & 0x2A) { - ps = _EVT_disableInt(); - addMouseEvent(EVT_MOUSEDOWN,mask >> 1,x,y,0,0,butstate); - EVT.oldMove = -1; - _EVT_restoreInt(ps); - } + ps = _EVT_disableInt(); + addMouseEvent(EVT_MOUSEDOWN,mask >> 1,x,y,0,0,butstate); + EVT.oldMove = -1; + _EVT_restoreInt(ps); + } if (mask & 0x54) { - ps = _EVT_disableInt(); - addMouseEvent(EVT_MOUSEUP,mask >> 2,x,y,0,0,butstate); - EVT.oldMove = -1; - _EVT_restoreInt(ps); - } + ps = _EVT_disableInt(); + addMouseEvent(EVT_MOUSEUP,mask >> 2,x,y,0,0,butstate); + EVT.oldMove = -1; + _EVT_restoreInt(ps); + } EVT.oldKey = -1; } @@ -196,7 +196,7 @@ Keyboard interrupt handler function. NOTE: Interrupts are OFF when this routine is called by the keyboard ISR, - and we leave them OFF the entire time. This has been modified to work + and we leave them OFF the entire time. This has been modified to work in conjunction with smx keyboard handler. ****************************************************************************/ static void EVTAPI keyboardISR(void) @@ -252,51 +252,51 @@ PM_lockHandle lh; if (_EVT_useEvents) { - /* Initialise the event queue and enable our interrupt handlers */ - initEventQueue(); - PM_setKeyHandler(keyboardISR); - if ((haveMouse = detectMouse()) != 0) - PM_setMouseHandler(0xFFFF,mouseISR); + /* Initialise the event queue and enable our interrupt handlers */ + initEventQueue(); + PM_setKeyHandler(keyboardISR); + if ((haveMouse = detectMouse()) != 0) + PM_setMouseHandler(0xFFFF,mouseISR); - /* Read the keyboard modifier flags from the BIOS to get the - * correct initialisation state. The only state we care about is - * the correct toggle state flags such as SCROLLLOCK, NUMLOCK and - * CAPSLOCK. - */ - EVT.keyModifiers = 0; - mods = PM_getByte(_EVT_biosPtr+0x17); - if (mods & 0x10) - EVT.keyModifiers |= EVT_SCROLLLOCK; - if (mods & 0x20) - EVT.keyModifiers |= EVT_NUMLOCK; - if (mods & 0x40) - EVT.keyModifiers |= EVT_CAPSLOCK; + /* Read the keyboard modifier flags from the BIOS to get the + * correct initialisation state. The only state we care about is + * the correct toggle state flags such as SCROLLLOCK, NUMLOCK and + * CAPSLOCK. + */ + EVT.keyModifiers = 0; + mods = PM_getByte(_EVT_biosPtr+0x17); + if (mods & 0x10) + EVT.keyModifiers |= EVT_SCROLLLOCK; + if (mods & 0x20) + EVT.keyModifiers |= EVT_NUMLOCK; + if (mods & 0x40) + EVT.keyModifiers |= EVT_CAPSLOCK; - /* Lock all of the code and data used by our protected mode interrupt - * handling routines, so that it will continue to work correctly - * under real mode. - */ - if (!locked) { - /* It is difficult to ensure that we lock our global data, so we - * do this by taking the address of a variable locking all data - * 2Kb on either side. This should properly cover the global data - * used by the module (the other alternative is to declare the - * variables in assembler, in which case we know it will be - * correct). - */ - stat = !PM_lockDataPages(&EVT,sizeof(EVT),&lh); - stat |= !PM_lockDataPages(&_EVT_biosPtr,sizeof(_EVT_biosPtr),&lh); - stat |= !PM_lockCodePages((__codePtr)_EVT_cCodeStart,(int)_EVT_cCodeEnd-(int)_EVT_cCodeStart,&lh); - stat |= !PM_lockCodePages((__codePtr)_EVT_codeStart,(int)_EVT_codeEnd-(int)_EVT_codeStart,&lh); - if (stat) { - PM_fatalError("Page locking services failed - interrupt handling not safe!"); - exit(1); - } - locked = 1; - } + /* Lock all of the code and data used by our protected mode interrupt + * handling routines, so that it will continue to work correctly + * under real mode. + */ + if (!locked) { + /* It is difficult to ensure that we lock our global data, so we + * do this by taking the address of a variable locking all data + * 2Kb on either side. This should properly cover the global data + * used by the module (the other alternative is to declare the + * variables in assembler, in which case we know it will be + * correct). + */ + stat = !PM_lockDataPages(&EVT,sizeof(EVT),&lh); + stat |= !PM_lockDataPages(&_EVT_biosPtr,sizeof(_EVT_biosPtr),&lh); + stat |= !PM_lockCodePages((__codePtr)_EVT_cCodeStart,(int)_EVT_cCodeEnd-(int)_EVT_cCodeStart,&lh); + stat |= !PM_lockCodePages((__codePtr)_EVT_codeStart,(int)_EVT_codeEnd-(int)_EVT_codeStart,&lh); + if (stat) { + PM_fatalError("Page locking services failed - interrupt handling not safe!"); + exit(1); + } + locked = 1; + } - _EVT_installed = true; - } + _EVT_installed = true; + } } /**************************************************************************** @@ -310,9 +310,9 @@ int yRes) { if (haveMouse) { - ps2MouseStop(); - ps2MouseStart( 0, xRes, 0, yRes, -1, -1, -1); - } + ps2MouseStop(); + ps2MouseStart( 0, xRes, 0, yRes, -1, -1, -1); + } } /**************************************************************************** @@ -325,7 +325,7 @@ int *y) { if (haveMouse) - ps2MouseMove(*x, *y); + ps2MouseMove(*x, *y); } /**************************************************************************** @@ -338,24 +338,24 @@ uchar mods; if (_EVT_installed) { - PM_restoreKeyHandler(); + PM_restoreKeyHandler(); if (haveMouse) - PM_restoreMouseHandler(); + PM_restoreMouseHandler(); - /* Set the keyboard modifier flags in the BIOS to our values */ - EVT_allowLEDS(true); - mods = PM_getByte(_EVT_biosPtr+0x17) & ~0x70; - if (EVT.keyModifiers & EVT_SCROLLLOCK) - mods |= 0x10; - if (EVT.keyModifiers & EVT_NUMLOCK) - mods |= 0x20; - if (EVT.keyModifiers & EVT_CAPSLOCK) - mods |= 0x40; - PM_setByte(_EVT_biosPtr+0x17,mods); + /* Set the keyboard modifier flags in the BIOS to our values */ + EVT_allowLEDS(true); + mods = PM_getByte(_EVT_biosPtr+0x17) & ~0x70; + if (EVT.keyModifiers & EVT_SCROLLLOCK) + mods |= 0x10; + if (EVT.keyModifiers & EVT_NUMLOCK) + mods |= 0x20; + if (EVT.keyModifiers & EVT_CAPSLOCK) + mods |= 0x40; + PM_setByte(_EVT_biosPtr+0x17,mods); - /* Flag that we are no longer installed */ - _EVT_installed = false; - } + /* Flag that we are no longer installed */ + _EVT_installed = false; + } } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c b/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c index d6c95d6..99ee3d4 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/smx/pm.c @@ -147,9 +147,9 @@ { uint pos = strlen(s); if (s[pos-1] != '\\') { - s[pos] = '\\'; - s[pos+1] = '\0'; - } + s[pos] = '\\'; + s[pos+1] = '\0'; + } } void PMAPI PM_setFatalErrorCleanup( @@ -163,28 +163,28 @@ void PMAPI PM_fatalError(const char *msg) { if (fatalErrorCleanup) - fatalErrorCleanup(); + fatalErrorCleanup(); MGLOutput(msg); -// No support for fprintf() under smx currently! -// fprintf(stderr,"%s\n", msg); +/* No support for fprintf() under smx currently! */ +/* fprintf(stderr,"%s\n", msg); */ exit(1); } static void ExitVBEBuf(void) { if (VESABuf_ptr) - PM_freeRealSeg(VESABuf_ptr); + PM_freeRealSeg(VESABuf_ptr); VESABuf_ptr = 0; } void * PMAPI PM_getVESABuf(uint *len,uint *rseg,uint *roff) { if (!VESABuf_ptr) { - /* Allocate a global buffer for communicating with the VESA VBE */ - if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) - return NULL; - atexit(ExitVBEBuf); - } + /* Allocate a global buffer for communicating with the VESA VBE */ + if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) + return NULL; + atexit(ExitVBEBuf); + } *len = VESABuf_len; *rseg = VESABuf_rseg; *roff = VESABuf_roff; @@ -234,12 +234,12 @@ int i; for (i = 0; i < MAX_RM_BLOCKS; i++) { - if (rmBlocks[i].p == NULL) { - rmBlocks[i].p = mem; - rmBlocks[i].tag = tag; - return; - } - } + if (rmBlocks[i].p == NULL) { + rmBlocks[i].p = mem; + rmBlocks[i].tag = tag; + return; + } + } PM_fatalError("To many real mode memory block allocations!"); } @@ -248,9 +248,9 @@ int i; for (i = 0; i < MAX_RM_BLOCKS; i++) { - if (rmBlocks[i].p == mem) - return rmBlocks[i].tag; - } + if (rmBlocks[i].p == mem) + return rmBlocks[i].tag; + } PM_fatalError("Could not find prior real mode memory block allocation!"); return 0; } @@ -274,7 +274,7 @@ char *env; if ((env = getenv("NUCLEUS_PATH")) != NULL) - return env; + return env; return "c:\\nucleus"; } @@ -339,12 +339,12 @@ sb->oldMode = regs.h.al & 0x7F; sb->old50Lines = false; if (sb->oldMode == 0x3) { - regs.x.ax = 0x1130; - regs.x.bx = 0; - regs.x.dx = 0; - PM_int86(0x10,®s,®s); - sb->old50Lines = (regs.h.dl == 42 || regs.h.dl == 49); - } + regs.x.ax = 0x1130; + regs.x.bx = 0; + regs.x.dx = 0; + PM_int86(0x10,®s,®s); + sb->old50Lines = (regs.h.dl == 42 || regs.h.dl == 49); + } (void)hwndConsole; } @@ -361,10 +361,10 @@ /* Retore 50 line mode if set */ if (sb->old50Lines) { - regs.x.ax = 0x1112; - regs.x.bx = 0; - PM_int86(0x10,®s,®s); - } + regs.x.ax = 0x1112; + regs.x.bx = 0; + PM_int86(0x10,®s,®s); + } (void)hwndConsole; } @@ -388,13 +388,13 @@ PM_setWord(_biosPtr+0x4C,width*2); PM_setByte(_biosPtr+0x84,height-1); if (height > 25) { - PM_setWord(_biosPtr+0x60,0x0607); - PM_setByte(_biosPtr+0x85,0x08); - } + PM_setWord(_biosPtr+0x60,0x0607); + PM_setByte(_biosPtr+0x85,0x08); + } else { - PM_setWord(_biosPtr+0x60,0x0D0E); - PM_setByte(_biosPtr+0x85,0x016); - } + PM_setWord(_biosPtr+0x60,0x0D0E); + PM_setByte(_biosPtr+0x85,0x016); + } } void * PMAPI PM_mallocShared(long size) @@ -424,22 +424,22 @@ /* Create a zero memory mapping for us to use */ if (firstTime) { - rmZeroPtr = PM_mapPhysicalAddr(0,0x7FFF,true); - firstTime = false; - } + rmZeroPtr = PM_mapPhysicalAddr(0,0x7FFF,true); + firstTime = false; + } /* Remap the secondary BIOS to 0xC0000 physical */ if (BIOSPhysAddr != 0xC0000L || BIOSLen > 32768) { - /* SMX cannot virtually remap the BIOS, so we can only work if all - * the secondary controllers are identical, and we then use the - * BIOS on the first controller for all the remaining controllers. - * - * For OS'es that do virtual memory, and remapping of 0xC0000 - * physical (perhaps a copy on write mapping) should be all that - * is needed. - */ - return false; - } + /* SMX cannot virtually remap the BIOS, so we can only work if all + * the secondary controllers are identical, and we then use the + * BIOS on the first controller for all the remaining controllers. + * + * For OS'es that do virtual memory, and remapping of 0xC0000 + * physical (perhaps a copy on write mapping) should be all that + * is needed. + */ + return false; + } /* Save current handlers of int 10h and 6Dh */ GetRMVect(0x10,&Current10); @@ -457,9 +457,9 @@ /* Second the primary BIOS mappin 1:1 for 0xC0000 physical */ if (BIOSPhysAddr != 0xC0000L) { - /* SMX does not support this */ - (void)mappedBIOS; - } + /* SMX does not support this */ + (void)mappedBIOS; + } return true; } @@ -470,26 +470,26 @@ LZTimerOnExt(&tm); while (LZTimerLapExt(&tm) < microseconds) - ; + ; LZTimerOffExt(&tm); } int PMAPI PM_getCOMPort(int port) { switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + } return 0; } int PMAPI PM_getLPTPort(int port) { switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -534,15 +534,15 @@ memset(findData,0,findData->dwSize); findData->dwSize = dwSize; if (blk->attrib & _A_RDONLY) - findData->attrib |= PM_FILE_READONLY; + findData->attrib |= PM_FILE_READONLY; if (blk->attrib & _A_SUBDIR) - findData->attrib |= PM_FILE_DIRECTORY; + findData->attrib |= PM_FILE_DIRECTORY; if (blk->attrib & _A_ARCH) - findData->attrib |= PM_FILE_ARCHIVE; + findData->attrib |= PM_FILE_ARCHIVE; if (blk->attrib & _A_HIDDEN) - findData->attrib |= PM_FILE_HIDDEN; + findData->attrib |= PM_FILE_HIDDEN; if (blk->attrib & _A_SYSTEM) - findData->attrib |= PM_FILE_SYSTEM; + findData->attrib |= PM_FILE_SYSTEM; findData->sizeLo = blk->size; strncpy(findData->name,blk->name,PM_MAX_PATH); findData->name[PM_MAX_PATH-1] = 0; @@ -561,11 +561,11 @@ struct find_t *blk; if ((blk = PM_malloc(sizeof(*blk))) == NULL) - return PM_FILE_INVALID; + return PM_FILE_INVALID; if (_dos_findfirst((char*)filename,FIND_MASK,blk) == 0) { - convertFindData(findData,blk); - return blk; - } + convertFindData(findData,blk); + return blk; + } return PM_FILE_INVALID; } @@ -580,9 +580,9 @@ struct find_t *blk = handle; if (_dos_findnext(blk) == 0) { - convertFindData(findData,blk); - return true; - } + convertFindData(findData,blk); + return true; + } return false; } @@ -614,9 +614,9 @@ { RMREGS regs; regs.h.dl = (uchar)(drive - 'A' + 1); - regs.h.ah = 0x36; // Get disk information service + regs.h.ah = 0x36; /* Get disk information service */ PM_int86(0x21,®s,®s); - return regs.x.ax != 0xFFFF; // AX = 0xFFFF if disk is invalid + return regs.x.ax != 0xFFFF; /* AX = 0xFFFF if disk is invalid */ } /**************************************************************************** @@ -649,25 +649,25 @@ DWORD attr = 0; if (attrib & PM_FILE_READONLY) - attr |= FILE_ATTRIBUTE_READONLY; + attr |= FILE_ATTRIBUTE_READONLY; if (attrib & PM_FILE_ARCHIVE) - attr |= FILE_ATTRIBUTE_ARCHIVE; + attr |= FILE_ATTRIBUTE_ARCHIVE; if (attrib & PM_FILE_HIDDEN) - attr |= FILE_ATTRIBUTE_HIDDEN; + attr |= FILE_ATTRIBUTE_HIDDEN; if (attrib & PM_FILE_SYSTEM) - attr |= FILE_ATTRIBUTE_SYSTEM; + attr |= FILE_ATTRIBUTE_SYSTEM; SetFileAttributes((LPSTR)filename, attr); #else uint attr = 0; if (attrib & PM_FILE_READONLY) - attr |= _A_RDONLY; + attr |= _A_RDONLY; if (attrib & PM_FILE_ARCHIVE) - attr |= _A_ARCH; + attr |= _A_ARCH; if (attrib & PM_FILE_HIDDEN) - attr |= _A_HIDDEN; + attr |= _A_HIDDEN; if (attrib & PM_FILE_SYSTEM) - attr |= _A_SYSTEM; + attr |= _A_SYSTEM; _dos_setfileattr(filename,attr); #endif } @@ -682,7 +682,7 @@ #ifdef __GNUC__ return mkdir(filename,S_IRUSR) == 0; #else -//AM: return mkdir(filename) == 0; +/*AM: return mkdir(filename) == 0; */ return(false); #endif } @@ -694,7 +694,7 @@ ibool PMAPI PM_rmdir( const char *filename) { -//AM: return rmdir(filename) == 0; +/*AM: return rmdir(filename) == 0; */ return(false); } @@ -719,9 +719,9 @@ * properly page align the start of the memory block for DMA operations. */ if (size > 4096) - return NULL; + return NULL; if ((p = PM_allocRealSeg((size + 0xFFF) & ~0xFFF,&r_seg,&r_off)) == NULL) - return NULL; + return NULL; *physAddr = ((r_seg << 4) + r_off + 0xFFF) & ~0xFFF; PM_lockDataPages(p,size*2,&lh); return p; @@ -743,11 +743,11 @@ ulong physOfs; if (physAddr < 0x100000L) { - /* We can't map memory below 1Mb, but the linear address are already - * mapped 1:1 for this memory anyway so we just return the base address. - */ - return physAddr; - } + /* We can't map memory below 1Mb, but the linear address are already + * mapped 1:1 for this memory anyway so we just return the base address. + */ + return physAddr; + } /* Round the physical address to a 4Kb boundary and the limit to a * 4Kb-1 boundary before passing the values to DPMI as some extenders @@ -766,7 +766,7 @@ r.x.di = limit & 0xFFFF; PM_int386(0x31, &r, &r); if (r.x.cflag) - return 0xFFFFFFFFUL; + return 0xFFFFFFFFUL; return ((ulong)r.x.bx << 16) + r.x.cx + physOfs; } @@ -780,7 +780,7 @@ r.x.dx = linAddr & 0xFFFF; PM_int386(0x31, &r, &r); if (r.x.cflag) - return 0; + return 0; return 1; } @@ -804,7 +804,7 @@ r.x.dx = limit & 0xFFFF; PM_int386(0x31, &r, &r); if (r.x.cflag) - return 0; + return 0; return 1; } @@ -830,11 +830,11 @@ /* Map physical memory and create selector */ if ((base = DPMI_mapPhysicalToLinear(base,limit)) == 0xFFFFFFFFUL) - return 0; + return 0; if (!DPMI_setSelectorBase(sel,base)) - return 0; + return 0; if (!DPMI_setSelectorLimit(sel,limit)) - return 0; + return 0; return sel; } @@ -883,28 +883,28 @@ PM_segread(&sregs); DSBaseAddr = DPMI_getSelectorBase(sregs.ds); if ((base < 0x100000) && (DSBaseAddr == 0)) { - /* DS is zero based, so we can directly access the first 1Mb of - * system memory (like under DOS4GW). - */ - return (void*)base; - } + /* DS is zero based, so we can directly access the first 1Mb of + * system memory (like under DOS4GW). + */ + return (void*)base; + } /* Map the memory to a linear address using DPMI function 0x800 */ if ((linAddr = DPMI_mapPhysicalToLinear(base,limit)) == 0) { - if (base >= 0x100000) - return NULL; - /* If the linear address mapping fails but we are trying to - * map an area in the first 1Mb of system memory, then we must - * be running under a Windows or OS/2 DOS box. Under these - * environments we can use the segment wrap around as a fallback - * measure, as this does work properly. - */ - linAddr = base; - } + if (base >= 0x100000) + return NULL; + /* If the linear address mapping fails but we are trying to + * map an area in the first 1Mb of system memory, then we must + * be running under a Windows or OS/2 DOS box. Under these + * environments we can use the segment wrap around as a fallback + * measure, as this does work properly. + */ + linAddr = base; + } /* Now expand the default DS selector to 4Gb so we can access it */ if (!DPMI_setSelectorLimit(sregs.ds,0xFFFFFFFFUL)) - return NULL; + return NULL; /* Finally enable caching for the page tables that we just mapped in, * since DOS4GW and PMODE/W create the page table entries without @@ -916,34 +916,34 @@ * caching) so that MMIO register regions do not screw up. */ if (isCached) { - if ((PDB = _PM_getPDB()) != 0 && DSBaseAddr == 0) { - int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage; - ulong pageTable,*pPageTable; - if (!pPDB) { - if (PDB >= 0x100000) - pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF); - else - pPDB = (ulong*)PDB; - } - if (pPDB) { - startPDB = (linAddr >> 22) & 0x3FF; - startPage = (linAddr >> 12) & 0x3FF; - endPDB = ((linAddr+limit) >> 22) & 0x3FF; - endPage = ((linAddr+limit) >> 12) & 0x3FF; - for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { - pageTable = pPDB[iPDB] & ~0xFFF; - if (pageTable >= 0x100000) - pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF); - else - pPageTable = (ulong*)pageTable; - start = (iPDB == startPDB) ? startPage : 0; - end = (iPDB == endPDB) ? endPage : 0x3FF; - for (iPage = start; iPage <= end; iPage++) - pPageTable[iPage] &= ~0x18; - } - } - } - } + if ((PDB = _PM_getPDB()) != 0 && DSBaseAddr == 0) { + int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage; + ulong pageTable,*pPageTable; + if (!pPDB) { + if (PDB >= 0x100000) + pPDB = (ulong*)DPMI_mapPhysicalToLinear(PDB,0xFFF); + else + pPDB = (ulong*)PDB; + } + if (pPDB) { + startPDB = (linAddr >> 22) & 0x3FF; + startPage = (linAddr >> 12) & 0x3FF; + endPDB = ((linAddr+limit) >> 22) & 0x3FF; + endPage = ((linAddr+limit) >> 12) & 0x3FF; + for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { + pageTable = pPDB[iPDB] & ~0xFFF; + if (pageTable >= 0x100000) + pPageTable = (ulong*)DPMI_mapPhysicalToLinear(pageTable,0xFFF); + else + pPageTable = (ulong*)pageTable; + start = (iPDB == startPDB) ? startPage : 0; + end = (iPDB == endPDB) ? endPage : 0x3FF; + for (iPage = start; iPage <= end; iPage++) + pPageTable[iPage] &= ~0x18; + } + } + } + } /* Now return the base address of the memory into the default DS */ return (void*)(linAddr - DSBaseAddr); @@ -971,10 +971,10 @@ uint oldSeg,oldOff; if (!crPtr) { - /* Allocate and copy the memory block only once */ - crPtr = PM_allocRealSeg(sizeof(int6AHandler), &crRSeg, &crROff); - memcpy(crPtr,int6AHandler,sizeof(int6AHandler)); - } + /* Allocate and copy the memory block only once */ + crPtr = PM_allocRealSeg(sizeof(int6AHandler), &crRSeg, &crROff); + memcpy(crPtr,int6AHandler,sizeof(int6AHandler)); + } PM_setWord(crPtr,off); /* Plug in address to call */ PM_setWord(crPtr+2,seg); p = PM_mapRealPointer(0,0x6A * 4); @@ -1003,8 +1003,8 @@ ulong PMAPI PM_getPhysicalAddr(void *p) { - // TODO: This function should find the physical address of a linear - // address. + /* TODO: This function should find the physical address of a linear */ + /* address. */ (void)p; return 0xFFFFFFFFUL; } @@ -1020,7 +1020,7 @@ static uchar *zeroPtr = NULL; if (!zeroPtr) - zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); + zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); return (void*)(zeroPtr + MK_PHYS(r_seg,r_off)); } @@ -1033,7 +1033,7 @@ r.x.bx = (size + 0xF) >> 4; /* number of paragraphs */ PM_int386(0x31, &r, &r); if (r.x.cflag) - return NULL; /* DPMI call failed */ + return NULL; /* DPMI call failed */ *r_seg = r.x.ax; /* Real mode segment */ *r_off = 0; p = PM_mapRealPointer(*r_seg,*r_off); @@ -1063,9 +1063,9 @@ PMSREGS sr; if (intno == 0x10 && DPMI_int10) { - if (DPMI_int10(regs)) - return; - } + if (DPMI_int10(regs)) + return; + } PM_segread(&sr); r.x.ax = 0x300; /* DPMI issue real interrupt */ r.h.bl = intno; @@ -1086,8 +1086,8 @@ memset(&rmregs, 0, sizeof(rmregs)); IN(eax); IN(ebx); IN(ecx); IN(edx); IN(esi); IN(edi); -// These real mode ints may cause crashes. -//AM: DPMI_int86(intno,&rmregs); /* DPMI issue real interrupt */ +/* These real mode ints may cause crashes. */ +/*AM: DPMI_int86(intno,&rmregs); /###* DPMI issue real interrupt */ OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi); out->x.cflag = rmregs.flags & 0x1; @@ -1104,7 +1104,7 @@ rmregs.es = sregs->es; rmregs.ds = sregs->ds; -//AM: DPMI_int86(intno,&rmregs); /* DPMI issue real interrupt */ +/*AM: DPMI_int86(intno,&rmregs); /###* DPMI issue real interrupt */ OUT(eax); OUT(ebx); OUT(ecx); OUT(edx); OUT(esi); OUT(edi); sregs->es = rmregs.es; @@ -1118,17 +1118,17 @@ #pragma pack(1) typedef struct { - uint LargestBlockAvail; - uint MaxUnlockedPage; - uint LargestLockablePage; - uint LinAddrSpace; - uint NumFreePagesAvail; - uint NumPhysicalPagesFree; - uint TotalPhysicalPages; - uint FreeLinAddrSpace; - uint SizeOfPageFile; - uint res[3]; - } MemInfo; + uint LargestBlockAvail; + uint MaxUnlockedPage; + uint LargestLockablePage; + uint LinAddrSpace; + uint NumFreePagesAvail; + uint NumPhysicalPagesFree; + uint TotalPhysicalPages; + uint FreeLinAddrSpace; + uint SizeOfPageFile; + uint res[3]; + } MemInfo; #pragma pack() @@ -1146,7 +1146,7 @@ *physical = memInfo.NumPhysicalPagesFree * 4096; *total = memInfo.LargestBlockAvail; if (*total < *physical) - *physical = *total; + *physical = *total; } /**************************************************************************** @@ -1156,7 +1156,7 @@ uint PMAPI PM_getFileAttr( const char *filename) { - // TODO: Implement this! + /* TODO: Implement this! */ return 0; } @@ -1169,7 +1169,7 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this! + /* TODO: Implement this! */ return false; } @@ -1182,6 +1182,6 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this! + /* TODO: Implement this! */ return false; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c b/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c index 2596c76..98e31bc 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c +++ b/board/MAI/bios_emulator/scitech/src/pm/smx/pmsmx.c @@ -134,41 +134,41 @@ void PMAPI PM_setRealTimeClockFrequency(int frequency) { static short convert[] = { - 8192, - 4096, - 2048, - 1024, - 512, - 256, - 128, - 64, - 32, - 16, - 8, - 4, - 2, - -1, - }; + 8192, + 4096, + 2048, + 1024, + 512, + 256, + 128, + 64, + 32, + 16, + 8, + 4, + 2, + -1, + }; int i; /* First clear any pending RTC timeout if not cleared */ _PM_readCMOS(0x0C); if (frequency == 0) { - /* Disable RTC timout */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F); - } + /* Disable RTC timout */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F); + } else { - /* Convert frequency value to RTC clock indexes */ - for (i = 0; convert[i] != -1; i++) { - if (convert[i] == frequency) - break; - } + /* Convert frequency value to RTC clock indexes */ + for (i = 0; convert[i] != -1; i++) { + if (convert[i] == frequency) + break; + } - /* Set RTC timout value and enable timeout */ - _PM_writeCMOS(0x0A,(_PM_oldCMOSRegA & 0xF0) | (i+3)); - _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40); - } + /* Set RTC timout value and enable timeout */ + _PM_writeCMOS(0x0A,(_PM_oldCMOSRegA & 0xF0) | (i+3)); + _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40); + } } static void PMAPI lockPMHandlers(void) @@ -176,22 +176,22 @@ static int locked = 0; int stat = 0; PM_lockHandle lh; - + /* Lock all of the code and data used by our protected mode interrupt * handling routines, so that it will continue to work correctly * under real mode. */ if (!locked) { - PM_saveDS(); - stat = !PM_lockDataPages(&globalDataStart-2048,4096,&lh); - stat |= !PM_lockDataPages(&_PM_pmsmxDataStart,(int)&_PM_pmsmxDataEnd - (int)&_PM_pmsmxDataStart,&lh); - stat |= !PM_lockCodePages((__codePtr)_PM_pmsmxCodeStart,(int)_PM_pmsmxCodeEnd-(int)_PM_pmsmxCodeStart,&lh); - if (stat) { - printf("Page locking services failed - interrupt handling not safe!\n"); - exit(1); - } - locked = 1; - } + PM_saveDS(); + stat = !PM_lockDataPages(&globalDataStart-2048,4096,&lh); + stat |= !PM_lockDataPages(&_PM_pmsmxDataStart,(int)&_PM_pmsmxDataEnd - (int)&_PM_pmsmxDataStart,&lh); + stat |= !PM_lockCodePages((__codePtr)_PM_pmsmxCodeStart,(int)_PM_pmsmxCodeEnd-(int)_PM_pmsmxCodeStart,&lh); + if (stat) { + printf("Page locking services failed - interrupt handling not safe!\n"); + exit(1); + } + locked = 1; + } } void PMAPI PM_getPMvect(int intno, PMFARPTR *isr) @@ -245,7 +245,7 @@ void PMAPI PM_restoreMouseHandler(void) { if (_PM_mouseHandler) - _PM_mouseHandler = NULL; + _PM_mouseHandler = NULL; } static void getISR(int intno, PMFARPTR *pmisr, long *realisr) @@ -274,9 +274,9 @@ void PMAPI PM_restoreTimerHandler(void) { if (_PM_timerHandler) { - restoreISR(PM_IRQ0, _PM_prevTimer, _PM_prevRealTimer); - _PM_timerHandler = NULL; - } + restoreISR(PM_IRQ0, _PM_prevTimer, _PM_prevRealTimer); + _PM_timerHandler = NULL; + } } ibool PMAPI PM_setRealTimeClockHandler(PM_intHandler th,int frequency) @@ -302,15 +302,15 @@ void PMAPI PM_restoreRealTimeClockHandler(void) { if (_PM_rtcHandler) { - /* Restore CMOS registers and mask RTC clock */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); - PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); + /* Restore CMOS registers and mask RTC clock */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); + PM_outpb(0xA1,(PM_inpb(0xA1) & 0xFE) | (_PM_oldRTCPIC2 & ~0xFE)); - /* Restore the interrupt vector */ - restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC); - _PM_rtcHandler = NULL; - } + /* Restore the interrupt vector */ + restoreISR(0x70, _PM_prevRTC, _PM_prevRealRTC); + _PM_rtcHandler = NULL; + } } void PMAPI PM_setKeyHandler(PM_intHandler kh) @@ -323,9 +323,9 @@ void PMAPI PM_restoreKeyHandler(void) { if (_PM_keyHandler) { - restoreISR(PM_IRQ1, _PM_prevKey, _PM_prevRealKey); - _PM_keyHandler = NULL; - } + restoreISR(PM_IRQ1, _PM_prevKey, _PM_prevRealKey); + _PM_keyHandler = NULL; + } } void PMAPI PM_setKey15Handler(PM_key15Handler kh) @@ -338,9 +338,9 @@ void PMAPI PM_restoreKey15Handler(void) { if (_PM_key15Handler) { - restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15); - _PM_key15Handler = NULL; - } + restoreISR(0x15, _PM_prevKey15, _PM_prevRealKey15); + _PM_key15Handler = NULL; + } } /* Real mode Ctrl-C and Ctrl-Break handler. This handler simply sets a @@ -385,12 +385,12 @@ void PMAPI PM_restoreBreakHandler(void) { if (_PM_prevBreak.sel) { - restoreISR(0x1B, _PM_prevBreak, prevRealBreak); - restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC); - _PM_prevBreak.sel = 0; - _PM_breakHandler = NULL; - PM_freeRealSeg(_PM_ctrlBPtr); - } + restoreISR(0x1B, _PM_prevBreak, prevRealBreak); + restoreISR(0x23, _PM_prevCtrlC, prevRealCtrlC); + _PM_prevBreak.sel = 0; + _PM_breakHandler = NULL; + PM_freeRealSeg(_PM_ctrlBPtr); + } } /* Real mode Critical Error handler. This handler simply saves the AX and @@ -432,11 +432,11 @@ void PMAPI PM_restoreCriticalHandler(void) { if (_PM_prevCritical.sel) { - restoreISR(0x24, _PM_prevCritical, prevRealCritical); - PM_freeRealSeg(_PM_critPtr); - _PM_prevCritical.sel = 0; - _PM_critHandler = NULL; - } + restoreISR(0x24, _PM_prevCritical, prevRealCritical); + PM_freeRealSeg(_PM_critPtr); + _PM_prevCritical.sel = 0; + _PM_critHandler = NULL; + } } int PMAPI PM_lockDataPages(void *p,uint len,PM_lockHandle *lh) @@ -457,9 +457,9 @@ { PMSREGS sregs; PM_segread(&sregs); -//AM: causes minor glitch with -//AM: older versions pmEasy which don't allow DPMI 06 on -//AM: Code selector 0x0C -- assume base is 0 which it should be. +/*AM: causes minor glitch with */ +/*AM: older versions pmEasy which don't allow DPMI 06 on */ +/*AM: Code selector 0x0C -- assume base is 0 which it should be. */ return DPMI_lockLinearPages((uint)p,len); } diff --git a/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c index 01e180b..7941192 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c +++ b/board/MAI/bios_emulator/scitech/src/pm/smx/ztimer.c @@ -110,6 +110,6 @@ ulong __ULZElapsedTime(ulong start,ulong finish) { if (finish < start) - finish += xticks_per_second() * 3600 *24; /* Number of ticks in 24 hours */ + finish += xticks_per_second() * 3600 *24; /* Number of ticks in 24 hours */ return finish - start; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c index 2833a72..0615e90 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c +++ b/board/MAI/bios_emulator/scitech/src/pm/stub/cpuinfo.c @@ -37,8 +37,8 @@ ****************************************************************************/ static int SetMaxThreadPriority(void) { - // TODO: If you have thread priorities, increase it to maximum for the - // thread for timing the CPU frequency. + /* TODO: If you have thread priorities, increase it to maximum for the */ + /* thread for timing the CPU frequency. */ return oldPriority; } @@ -49,7 +49,7 @@ static void RestoreThreadPriority( int priority) { - // TODO: Restore the original thread priority on exit. + /* TODO: Restore the original thread priority on exit. */ } /**************************************************************************** @@ -59,8 +59,8 @@ static void GetCounterFrequency( CPU_largeInteger *freq) { - // TODO: Return the frequency of the counter in here. You should try to - // normalise this value to be around 100,000 ticks per second. + /* TODO: Return the frequency of the counter in here. You should try to */ + /* normalise this value to be around 100,000 ticks per second. */ freq->low = 0; freq->high = 0; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/event.c b/board/MAI/bios_emulator/scitech/src/pm/stub/event.c index 8e805d0..204c492 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/stub/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/stub/event.c @@ -59,7 +59,7 @@ ****************************************************************************/ ulong _EVT_getTicks(void) { - // TODO: Implement this for your OS! + /* TODO: Implement this for your OS! */ } /**************************************************************************** @@ -68,36 +68,36 @@ ****************************************************************************/ static void _EVT_pumpMessages(void) { - // TODO: The purpose of this function is to read all keyboard and mouse - // events from the OS specific event queue, translate them and post - // them into the SciTech event queue. - // - // NOTE: There are a couple of important things that this function must - // take care of: - // - // 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. - // - // 2. Support for reading hardware scan code as well as ASCII - // translated values is required. Games use the scan codes rather - // than ASCII values. Scan codes go into the high order byte of the - // keyboard message field. - // - // 3. Support for at least reading mouse motion data (mickeys) from the - // mouse is required. Using the mickey values, we can then translate - // to mouse cursor coordinates scaled to the range of the current - // graphics display mode. Mouse values are scaled based on the - // global 'rangeX' and 'rangeY'. - // - // 4. Support for a timestamp for the events is required, which is - // defined as the number of milliseconds since some event (usually - // system startup). This is the timestamp when the event occurred - // (ie: at interrupt time) not when it was stuff into the SciTech - // event queue. - // - // 5. Support for mouse double click events. If the OS has a native - // mechanism to determine this, it should be used. Otherwise the - // time stamp information will be used by the generic event code - // to generate double click events. + /* TODO: The purpose of this function is to read all keyboard and mouse */ + /* events from the OS specific event queue, translate them and post */ + /* them into the SciTech event queue. */ + /* */ + /* NOTE: There are a couple of important things that this function must */ + /* take care of: */ + /* */ + /* 1. Support for KEYDOWN, KEYREPEAT and KEYUP is required. */ + /* */ + /* 2. Support for reading hardware scan code as well as ASCII */ + /* translated values is required. Games use the scan codes rather */ + /* than ASCII values. Scan codes go into the high order byte of the */ + /* keyboard message field. */ + /* */ + /* 3. Support for at least reading mouse motion data (mickeys) from the */ + /* mouse is required. Using the mickey values, we can then translate */ + /* to mouse cursor coordinates scaled to the range of the current */ + /* graphics display mode. Mouse values are scaled based on the */ + /* global 'rangeX' and 'rangeY'. */ + /* */ + /* 4. Support for a timestamp for the events is required, which is */ + /* defined as the number of milliseconds since some event (usually */ + /* system startup). This is the timestamp when the event occurred */ + /* (ie: at interrupt time) not when it was stuff into the SciTech */ + /* event queue. */ + /* */ + /* 5. Support for mouse double click events. If the OS has a native */ + /* mechanism to determine this, it should be used. Otherwise the */ + /* time stamp information will be used by the generic event code */ + /* to generate double click events. */ } /**************************************************************************** @@ -141,7 +141,7 @@ initEventQueue(); memset(keyUpMsg,0,sizeof(keyUpMsg)); - // TODO: Do any OS specific initialisation here + /* TODO: Do any OS specific initialisation here */ /* Catch program termination signals so we can clean up properly */ signal(SIGABRT, _EVT_abort); @@ -171,7 +171,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for non DOS systems + /* Do nothing for non DOS systems */ } /**************************************************************************** @@ -181,7 +181,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for non DOS systems + /* Do nothing for non DOS systems */ } /**************************************************************************** @@ -195,5 +195,5 @@ signal(SIGFPE, SIG_DFL); signal(SIGINT, SIG_DFL); - // TODO: Do any OS specific cleanup in here + /* TODO: Do any OS specific cleanup in here */ } diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h index 81a20aa..1395cbc 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h +++ b/board/MAI/bios_emulator/scitech/src/pm/stub/oshdr.h @@ -28,6 +28,6 @@ * ****************************************************************************/ -// TODO: This is where you include OS specific headers for the event handling -// library. You may leave this empty if you have no OS specific headers -// to include. +/* TODO: This is where you include OS specific headers for the event handling */ +/* library. You may leave this empty if you have no OS specific headers */ +/* to include. */ diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c b/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c index 51656b0..5f278c3 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/stub/pm.c @@ -38,13 +38,13 @@ #include #include -// TODO: Include any OS specific headers here! +/* TODO: Include any OS specific headers here! */ /*--------------------------- Global variables ----------------------------*/ -// TODO: If you support access to the BIOS, the following VESABuf globals -// keep track of a single VESA transfer buffer. If you don't support -// access to the BIOS, remove these variables. +/* TODO: If you support access to the BIOS, the following VESABuf globals */ +/* keep track of a single VESA transfer buffer. If you don't support */ +/* access to the BIOS, remove these variables. */ static uint VESABuf_len = 1024; /* Length of the VESABuf buffer */ static void *VESABuf_ptr = NULL; /* Near pointer to VESABuf */ @@ -61,12 +61,12 @@ ****************************************************************************/ void PMAPI PM_init(void) { - // TODO: Do any initialisation in here. This includes getting IOPL - // access for the process calling PM_init. This will get called - // more than once. + /* TODO: Do any initialisation in here. This includes getting IOPL */ + /* access for the process calling PM_init. This will get called */ + /* more than once. */ - // TODO: If you support the supplied MTRR register stuff (you need to - // be at ring 0 for this!), you should initialise it in here. + /* TODO: If you support the supplied MTRR register stuff (you need to */ + /* be at ring 0 for this!), you should initialise it in here. */ /* MTRR_init(); */ } @@ -77,7 +77,7 @@ ****************************************************************************/ long PMAPI PM_getOSType(void) { - // TODO: Change this to return the define for your OS from drvlib/os.h + /* TODO: Change this to return the define for your OS from drvlib/os.h */ return _OS_MYOS; } @@ -97,9 +97,9 @@ { uint pos = strlen(s); if (s[pos-1] != '/') { - s[pos] = '/'; - s[pos+1] = '\0'; - } + s[pos] = '/'; + s[pos+1] = '\0'; + } } /**************************************************************************** @@ -119,11 +119,11 @@ void PMAPI PM_fatalError( const char *msg) { - // TODO: If you are running in a GUI environment without a console, - // this needs to be changed to bring up a fatal error message - // box and terminate the program. + /* TODO: If you are running in a GUI environment without a console, */ + /* this needs to be changed to bring up a fatal error message */ + /* box and terminate the program. */ if (fatalErrorCleanup) - fatalErrorCleanup(); + fatalErrorCleanup(); fprintf(stderr,"%s\n", msg); exit(1); } @@ -134,9 +134,9 @@ ****************************************************************************/ static void ExitVBEBuf(void) { - // TODO: If you do not have BIOS access, remove this function. + /* TODO: If you do not have BIOS access, remove this function. */ if (VESABuf_ptr) - PM_freeRealSeg(VESABuf_ptr); + PM_freeRealSeg(VESABuf_ptr); VESABuf_ptr = 0; } @@ -149,14 +149,14 @@ uint *rseg, uint *roff) { - // TODO: If you do not have BIOS access, simply delete the guts of - // this function and return NULL. + /* TODO: If you do not have BIOS access, simply delete the guts of */ + /* this function and return NULL. */ if (!VESABuf_ptr) { - /* Allocate a global buffer for communicating with the VESA VBE */ - if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) - return NULL; - atexit(ExitVBEBuf); - } + /* Allocate a global buffer for communicating with the VESA VBE */ + if ((VESABuf_ptr = PM_allocRealSeg(VESABuf_len, &VESABuf_rseg, &VESABuf_roff)) == NULL) + return NULL; + atexit(ExitVBEBuf); + } *len = VESABuf_len; *rseg = VESABuf_rseg; *roff = VESABuf_roff; @@ -169,9 +169,9 @@ ****************************************************************************/ int PMAPI PM_kbhit(void) { - // TODO: This function checks if a key is available to be read. This - // should be implemented, but is mostly used by the test programs - // these days. + /* TODO: This function checks if a key is available to be read. This */ + /* should be implemented, but is mostly used by the test programs */ + /* these days. */ return true; } @@ -181,9 +181,9 @@ ****************************************************************************/ int PMAPI PM_getch(void) { - // TODO: This returns the ASCII code of the key pressed. This - // should be implemented, but is mostly used by the test programs - // these days. + /* TODO: This returns the ASCII code of the key pressed. This */ + /* should be implemented, but is mostly used by the test programs */ + /* these days. */ return 0xD; } @@ -193,12 +193,12 @@ ****************************************************************************/ int PMAPI PM_openConsole(void) { - // TODO: Opens up a fullscreen console for graphics output. If your - // console does not have graphics/text modes, this can be left - // empty. The main purpose of this is to disable console switching - // when in graphics modes if you can switch away from fullscreen - // consoles (if you want to allow switching, this can be done - // elsewhere with a full save/restore state of the graphics mode). + /* TODO: Opens up a fullscreen console for graphics output. If your */ + /* console does not have graphics/text modes, this can be left */ + /* empty. The main purpose of this is to disable console switching */ + /* when in graphics modes if you can switch away from fullscreen */ + /* consoles (if you want to allow switching, this can be done */ + /* elsewhere with a full save/restore state of the graphics mode). */ return 0; } @@ -208,9 +208,9 @@ ****************************************************************************/ int PMAPI PM_getConsoleStateSize(void) { - // TODO: Returns the size of the console state buffer used to save the - // state of the console before going into graphics mode. This is - // used to restore the console back to normal when we are done. + /* TODO: Returns the size of the console state buffer used to save the */ + /* state of the console before going into graphics mode. This is */ + /* used to restore the console back to normal when we are done. */ return 1; } @@ -222,11 +222,11 @@ void *stateBuf, int console_id) { - // TODO: Saves the state of the console into the state buffer. This is - // used to restore the console back to normal when we are done. - // We will always restore 80x25 text mode after being in graphics - // mode, so if restoring text mode is all you need to do this can - // be left empty. + /* TODO: Saves the state of the console into the state buffer. This is */ + /* used to restore the console back to normal when we are done. */ + /* We will always restore 80x25 text mode after being in graphics */ + /* mode, so if restoring text mode is all you need to do this can */ + /* be left empty. */ } /**************************************************************************** @@ -237,11 +237,11 @@ const void *stateBuf, int console_id) { - // TODO: Restore the state of the console from the state buffer. This is - // used to restore the console back to normal when we are done. - // We will always restore 80x25 text mode after being in graphics - // mode, so if restoring text mode is all you need to do this can - // be left empty. + /* TODO: Restore the state of the console from the state buffer. This is */ + /* used to restore the console back to normal when we are done. */ + /* We will always restore 80x25 text mode after being in graphics */ + /* mode, so if restoring text mode is all you need to do this can */ + /* be left empty. */ } /**************************************************************************** @@ -251,7 +251,7 @@ void PMAPI PM_closeConsole( int console_id) { - // TODO: Close the console when we are done, going back to text mode. + /* TODO: Close the console when we are done, going back to text mode. */ } /**************************************************************************** @@ -262,8 +262,8 @@ int x, int y) { - // TODO: Set the OS console cursor location to the new value. This is - // generally used for new OS ports (used mostly for DOS). + /* TODO: Set the OS console cursor location to the new value. This is */ + /* generally used for new OS ports (used mostly for DOS). */ } /**************************************************************************** @@ -274,8 +274,8 @@ int width, int height) { - // TODO: Set the OS console screen width. This is generally unused for - // new OS ports. + /* TODO: Set the OS console screen width. This is generally unused for */ + /* new OS ports. */ } /**************************************************************************** @@ -286,12 +286,12 @@ PM_intHandler ih, int frequency) { - // TODO: Install a real time clock interrupt handler. Normally this - // will not be supported from most OS'es in user land, so an - // alternative mechanism is needed to enable software stereo. - // Hence leave this unimplemented unless you have a high priority - // mechanism to call the 32-bit callback when the real time clock - // interrupt fires. + /* TODO: Install a real time clock interrupt handler. Normally this */ + /* will not be supported from most OS'es in user land, so an */ + /* alternative mechanism is needed to enable software stereo. */ + /* Hence leave this unimplemented unless you have a high priority */ + /* mechanism to call the 32-bit callback when the real time clock */ + /* interrupt fires. */ return false; } @@ -302,9 +302,9 @@ void PMAPI PM_setRealTimeClockFrequency( int frequency) { - // TODO: Set the real time clock interrupt frequency. Used for stereo - // LC shutter glasses when doing software stereo. Usually sets - // the frequency to around 2048 Hz. + /* TODO: Set the real time clock interrupt frequency. Used for stereo */ + /* LC shutter glasses when doing software stereo. Usually sets */ + /* the frequency to around 2048 Hz. */ } /**************************************************************************** @@ -313,7 +313,7 @@ ****************************************************************************/ void PMAPI PM_restoreRealTimeClockHandler(void) { - // TODO: Restores the real time clock handler. + /* TODO: Restores the real time clock handler. */ } /**************************************************************************** @@ -333,8 +333,8 @@ ****************************************************************************/ char PMAPI PM_getBootDrive(void) { - // TODO: Return the boot drive letter for the OS. Normally this is 'c' - // for DOS based OS'es and '/' for Unices. + /* TODO: Return the boot drive letter for the OS. Normally this is 'c' */ + /* for DOS based OS'es and '/' for Unices. */ return '/'; } @@ -353,8 +353,8 @@ ****************************************************************************/ const char * PMAPI PM_getNucleusPath(void) { - // TODO: Change this to the default path to Nucleus driver files. The - // following is the default for Unices. + /* TODO: Change this to the default path to Nucleus driver files. The */ + /* following is the default for Unices. */ char *env = getenv("NUCLEUS_PATH"); return env ? env : "/usr/lib/nucleus"; } @@ -378,8 +378,8 @@ ****************************************************************************/ const char * PMAPI PM_getUniqueID(void) { - // TODO: Return a unique ID for the machine. If a unique ID is not - // available, return the machine name. + /* TODO: Return a unique ID for the machine. If a unique ID is not */ + /* available, return the machine name. */ static char buf[128]; gethostname(buf, 128); return buf; @@ -391,7 +391,7 @@ ****************************************************************************/ const char * PMAPI PM_getMachineName(void) { - // TODO: Return the network machine name for the machine. + /* TODO: Return the network machine name for the machine. */ static char buf[128]; gethostname(buf, 128); return buf; @@ -403,10 +403,10 @@ ****************************************************************************/ void * PMAPI PM_getBIOSPointer(void) { - // TODO: This returns a pointer to the real mode BIOS data area. If you - // do not support BIOS access, you can simply return NULL here. + /* TODO: This returns a pointer to the real mode BIOS data area. If you */ + /* do not support BIOS access, you can simply return NULL here. */ if (!zeroPtr) - zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); + zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF,true); return (void*)(zeroPtr + 0x400); } @@ -418,7 +418,7 @@ { static void *bankPtr; if (!bankPtr) - bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); + bankPtr = PM_mapPhysicalAddr(0xA0000,0xFFFF,true); return bankPtr; } @@ -431,23 +431,23 @@ ulong limit, ibool isCached) { - // TODO: This function maps a physical memory address to a linear - // address in the address space of the calling process. + /* TODO: This function maps a physical memory address to a linear */ + /* address in the address space of the calling process. */ - // NOTE: This function *must* be able to handle any phsyical base - // address, and hence you will have to handle rounding of - // the physical base address to a page boundary (ie: 4Kb on - // x86 CPU's) to be able to properly map in the memory - // region. + /* NOTE: This function *must* be able to handle any phsyical base */ + /* address, and hence you will have to handle rounding of */ + /* the physical base address to a page boundary (ie: 4Kb on */ + /* x86 CPU's) to be able to properly map in the memory */ + /* region. */ - // NOTE: If possible the isCached bit should be used to ensure that - // the PCD (Page Cache Disable) and PWT (Page Write Through) - // bits are set to disable caching for a memory mapping used - // for MMIO register access. We also disable caching using - // the MTRR registers for Pentium Pro and later chipsets so if - // MTRR support is enabled for your OS then you can safely ignore - // the isCached flag and always enable caching in the page - // tables. + /* NOTE: If possible the isCached bit should be used to ensure that */ + /* the PCD (Page Cache Disable) and PWT (Page Write Through) */ + /* bits are set to disable caching for a memory mapping used */ + /* for MMIO register access. We also disable caching using */ + /* the MTRR registers for Pentium Pro and later chipsets so if */ + /* MTRR support is enabled for your OS then you can safely ignore */ + /* the isCached flag and always enable caching in the page */ + /* tables. */ return NULL; } @@ -459,9 +459,9 @@ void *ptr, ulong limit) { - // TODO: This function will free a physical memory mapping previously - // allocated with PM_mapPhysicalAddr() if at all possible. If - // you can't free physical memory mappings, simply do nothing. + /* TODO: This function will free a physical memory mapping previously */ + /* allocated with PM_mapPhysicalAddr() if at all possible. If */ + /* you can't free physical memory mappings, simply do nothing. */ } /**************************************************************************** @@ -470,36 +470,36 @@ ****************************************************************************/ ulong PMAPI PM_getPhysicalAddr(void *p) { - // TODO: This function should find the physical address of a linear - // address. + /* TODO: This function should find the physical address of a linear */ + /* address. */ return 0xFFFFFFFFUL; } void PMAPI PM_sleep(ulong milliseconds) { - // TODO: Put the process to sleep for milliseconds + /* TODO: Put the process to sleep for milliseconds */ } int PMAPI PM_getCOMPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + } return 0; } int PMAPI PM_getLPTPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -510,11 +510,11 @@ void * PMAPI PM_mallocShared( long size) { - // TODO: This is used to allocate memory that is shared between process - // that all access the common Nucleus drivers via a common display - // driver DLL. If your OS does not support shared memory (or if - // the display driver does not need to allocate shared memory - // for each process address space), this should just call PM_malloc. + /* TODO: This is used to allocate memory that is shared between process */ + /* that all access the common Nucleus drivers via a common display */ + /* driver DLL. If your OS does not support shared memory (or if */ + /* the display driver does not need to allocate shared memory */ + /* for each process address space), this should just call PM_malloc. */ return PM_malloc(size); } @@ -525,10 +525,10 @@ void PMAPI PM_freeShared( void *ptr) { - // TODO: Free the shared memory block. This will be called in the context - // of the original calling process that allocated the shared - // memory with PM_mallocShared. Simply call PM_free if you do not - // need this. + /* TODO: Free the shared memory block. This will be called in the context */ + /* of the original calling process that allocated the shared */ + /* memory with PM_mallocShared. Simply call PM_free if you do not */ + /* need this. */ PM_free(ptr); } @@ -542,16 +542,16 @@ void *base, ulong limit) { - // TODO: This function is used to map a physical memory mapping - // previously allocated with PM_mapPhysicalAddr into the - // address space of the calling process. If the memory mapping - // allocated by PM_mapPhysicalAddr is global to all processes, - // simply return the pointer. + /* TODO: This function is used to map a physical memory mapping */ + /* previously allocated with PM_mapPhysicalAddr into the */ + /* address space of the calling process. If the memory mapping */ + /* allocated by PM_mapPhysicalAddr is global to all processes, */ + /* simply return the pointer. */ - // NOTE: This function must also handle rounding to page boundaries, - // since this function is used to map in shared memory buffers - // allocated with PM_mapPhysicalAddr(). Hence if you aligned - // the physical address above, then you also need to do it here. + /* NOTE: This function must also handle rounding to page boundaries, */ + /* since this function is used to map in shared memory buffers */ + /* allocated with PM_mapPhysicalAddr(). Hence if you aligned */ + /* the physical address above, then you also need to do it here. */ return base; } @@ -563,11 +563,11 @@ uint r_seg, uint r_off) { - // TODO: This function maps a real mode memory pointer into the - // calling processes address space as a 32-bit near pointer. If - // you do not support BIOS access, simply return NULL here. + /* TODO: This function maps a real mode memory pointer into the */ + /* calling processes address space as a 32-bit near pointer. If */ + /* you do not support BIOS access, simply return NULL here. */ if (!zeroPtr) - zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF); + zeroPtr = PM_mapPhysicalAddr(0,0xFFFFF); return (void*)(zeroPtr + MK_PHYS(r_seg,r_off)); } @@ -580,10 +580,10 @@ uint *r_seg, uint *r_off) { - // TODO: This function allocates a block of real mode memory for the - // calling process used to communicate with real mode BIOS - // functions. If you do not support BIOS access, simply return - // NULL here. + /* TODO: This function allocates a block of real mode memory for the */ + /* calling process used to communicate with real mode BIOS */ + /* functions. If you do not support BIOS access, simply return */ + /* NULL here. */ return NULL; } @@ -594,8 +594,8 @@ void PMAPI PM_freeRealSeg( void *mem) { - // TODO: Frees a previously allocated real mode memory block. If you - // do not support BIOS access, this function should be empty. + /* TODO: Frees a previously allocated real mode memory block. If you */ + /* do not support BIOS access, this function should be empty. */ } /**************************************************************************** @@ -606,9 +606,9 @@ int intno, DPMI_regs *regs) { - // TODO: This function calls the real mode BIOS using the passed in - // register structure. If you do not support real mode BIOS - // access, this function should be empty. + /* TODO: This function calls the real mode BIOS using the passed in */ + /* register structure. If you do not support real mode BIOS */ + /* access, this function should be empty. */ } /**************************************************************************** @@ -620,9 +620,9 @@ RMREGS *in, RMREGS *out) { - // TODO: This function calls the real mode BIOS using the passed in - // register structure. If you do not support real mode BIOS - // access, this function should return 0. + /* TODO: This function calls the real mode BIOS using the passed in */ + /* register structure. If you do not support real mode BIOS */ + /* access, this function should return 0. */ return 0; } @@ -636,9 +636,9 @@ RMREGS *out, RMSREGS *sregs) { - // TODO: This function calls the real mode BIOS using the passed in - // register structure. If you do not support real mode BIOS - // access, this function should return 0. + /* TODO: This function calls the real mode BIOS using the passed in */ + /* register structure. If you do not support real mode BIOS */ + /* access, this function should return 0. */ return 0; } @@ -652,9 +652,9 @@ RMREGS *in, RMSREGS *sregs) { - // TODO: This function calls a real mode far function with a far call. - // If you do not support BIOS access, this function should be - // empty. + /* TODO: This function calls a real mode far function with a far call. */ + /* If you do not support BIOS access, this function should be */ + /* empty. */ } /**************************************************************************** @@ -665,9 +665,9 @@ ulong *physical, ulong *total) { - // TODO: Report the amount of available memory, both the amount of - // physical memory left and the amount of virtual memory left. - // If the OS does not provide these services, report 0's. + /* TODO: Report the amount of available memory, both the amount of */ + /* physical memory left and the amount of virtual memory left. */ + /* If the OS does not provide these services, report 0's. */ *physical = *total = 0; } @@ -681,10 +681,10 @@ ibool contiguous, ibool below16M) { - // TODO: Allocate a block of locked, physical memory of the specified - // size. This is used for bus master operations. If this is not - // supported by the OS, return NULL and bus mastering will not - // be used. + /* TODO: Allocate a block of locked, physical memory of the specified */ + /* size. This is used for bus master operations. If this is not */ + /* supported by the OS, return NULL and bus mastering will not */ + /* be used. */ return NULL; } @@ -697,7 +697,7 @@ uint size, ibool contiguous) { - // TODO: Free a memory block allocated with PM_allocLockedMem. + /* TODO: Free a memory block allocated with PM_allocLockedMem. */ } /**************************************************************************** @@ -709,9 +709,9 @@ { RMREGS regs; - // TODO: This does a bank switch function by calling the real mode - // VESA BIOS. If you do not support BIOS access, this function should - // be empty. + /* TODO: This does a bank switch function by calling the real mode */ + /* VESA BIOS. If you do not support BIOS access, this function should */ + /* be empty. */ regs.x.ax = 0x4F05; regs.x.bx = 0x0000; regs.x.dx = bank; @@ -727,9 +727,9 @@ { RMREGS regs; - // TODO: This does a bank switch function by calling the real mode - // VESA BIOS. If you do not support BIOS access, this function should - // be empty. + /* TODO: This does a bank switch function by calling the real mode */ + /* VESA BIOS. If you do not support BIOS access, this function should */ + /* be empty. */ regs.x.ax = 0x4F05; regs.x.bx = 0x0000; regs.x.dx = bank; @@ -751,9 +751,9 @@ { RMREGS regs; - // TODO: This changes the display start address by calling the real mode - // VESA BIOS. If you do not support BIOS access, this function - // should be empty. + /* TODO: This changes the display start address by calling the real mode */ + /* VESA BIOS. If you do not support BIOS access, this function */ + /* should be empty. */ regs.x.ax = 0x4F07; regs.x.bx = waitVRT; regs.x.cx = x; @@ -770,17 +770,17 @@ ulong length, uint type) { - // TODO: This function should enable Pentium Pro and Pentium II MTRR - // write combining for the passed in physical memory base address - // and length. Normally this is done via calls to an OS specific - // device driver as this can only be done at ring 0. - // - // NOTE: This is a *very* important function to implement! If you do - // not implement, graphics performance on the latest Intel chips - // will be severly impaired. For sample code that can be used - // directly in a ring 0 device driver, see the MSDOS implementation - // which includes assembler code to do this directly (if the - // program is running at ring 0). + /* TODO: This function should enable Pentium Pro and Pentium II MTRR */ + /* write combining for the passed in physical memory base address */ + /* and length. Normally this is done via calls to an OS specific */ + /* device driver as this can only be done at ring 0. */ + /* */ + /* NOTE: This is a *very* important function to implement! If you do */ + /* not implement, graphics performance on the latest Intel chips */ + /* will be severly impaired. For sample code that can be used */ + /* directly in a ring 0 device driver, see the MSDOS implementation */ + /* which includes assembler code to do this directly (if the */ + /* program is running at ring 0). */ return false; } @@ -793,19 +793,19 @@ ulong BIOSPhysAddr, void *mappedBIOS) { - // TODO: This function is used to run the BIOS POST code on a secondary - // controller to initialise it for use. This is not necessary - // for multi-controller operation, but it will make it a lot - // more convenicent for end users (otherwise they have to boot - // the system once with the secondary controller as primary, and - // then boot with both controllers installed). - // - // Even if you don't support full BIOS access, it would be - // adviseable to be able to POST the secondary controllers in the - // system using this function as a minimum requirement. Some - // graphics hardware has registers that contain values that only - // the BIOS knows about, which makes bring up a card from cold - // reset difficult if the BIOS has not POST'ed it. + /* TODO: This function is used to run the BIOS POST code on a secondary */ + /* controller to initialise it for use. This is not necessary */ + /* for multi-controller operation, but it will make it a lot */ + /* more convenicent for end users (otherwise they have to boot */ + /* the system once with the secondary controller as primary, and */ + /* then boot with both controllers installed). */ + /* */ + /* Even if you don't support full BIOS access, it would be */ + /* adviseable to be able to POST the secondary controllers in the */ + /* system using this function as a minimum requirement. Some */ + /* graphics hardware has registers that contain values that only */ + /* the BIOS knows about, which makes bring up a card from cold */ + /* reset difficult if the BIOS has not POST'ed it. */ return false; } @@ -817,8 +817,8 @@ PM_MODULE PMAPI PM_loadLibrary( const char *szDLLName) { - // TODO: This function should load a native shared library from disk - // given the path to the library. + /* TODO: This function should load a native shared library from disk */ + /* given the path to the library. */ (void)szDLLName; return NULL; } @@ -831,8 +831,8 @@ PM_MODULE hModule, const char *szProcName) { - // TODO: This function should return the address of a named procedure - // from a native shared library. + /* TODO: This function should return the address of a named procedure */ + /* from a native shared library. */ (void)hModule; (void)szProcName; return NULL; @@ -845,7 +845,7 @@ void PMAPI PM_freeLibrary( PM_MODULE hModule) { - // TODO: This function free a previously loaded native shared library. + /* TODO: This function free a previously loaded native shared library. */ (void)hModule; } @@ -860,8 +860,8 @@ int PMAPI PM_setIOPL( int level) { - // TODO: This function should enable IOPL for the task (if IOPL is - // not always enabled for the app through some other means). + /* TODO: This function should enable IOPL for the task (if IOPL is */ + /* not always enabled for the app through some other means). */ return level; } @@ -873,9 +873,9 @@ const char *filename, PM_findData *findData) { - // TODO: This function should start a directory enumeration search - // given the filename (with wildcards). The data should be - // converted and returned in the findData standard form. + /* TODO: This function should start a directory enumeration search */ + /* given the filename (with wildcards). The data should be */ + /* converted and returned in the findData standard form. */ (void)filename; (void)findData; return PM_FILE_INVALID; @@ -889,10 +889,10 @@ void *handle, PM_findData *findData) { - // TODO: This function should find the next file in directory enumeration - // search given the search criteria defined in the call to - // PM_findFirstFile. The data should be converted and returned - // in the findData standard form. + /* TODO: This function should find the next file in directory enumeration */ + /* search given the search criteria defined in the call to */ + /* PM_findFirstFile. The data should be converted and returned */ + /* in the findData standard form. */ (void)handle; (void)findData; return false; @@ -905,8 +905,8 @@ void PMAPI PM_findClose( void *handle) { - // TODO: This function should close the find process. This may do - // nothing for some OS'es. + /* TODO: This function should close the find process. This may do */ + /* nothing for some OS'es. */ (void)handle; } @@ -927,7 +927,7 @@ char drive) { if (drive == 3) - return true; + return true; return false; } @@ -954,7 +954,7 @@ const char *filename, uint attrib) { - // TODO: Set the file attributes for a file + /* TODO: Set the file attributes for a file */ (void)filename; (void)attrib; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c index 9bad6c0..820e292 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c +++ b/board/MAI/bios_emulator/scitech/src/pm/stub/ztimer.c @@ -36,7 +36,7 @@ ****************************************************************************/ void __ZTimerInit(void) { - // TODO: Do any specific internal initialisation in here + /* TODO: Do any specific internal initialisation in here */ } /**************************************************************************** @@ -46,8 +46,8 @@ static void __LZTimerOn( LZTimerObject *tm) { - // TODO: Start the Zen Timer counting. This should be a macro if - // possible. + /* TODO: Start the Zen Timer counting. This should be a macro if */ + /* possible. */ } /**************************************************************************** @@ -57,8 +57,8 @@ static ulong __LZTimerLap( LZTimerObject *tm) { - // TODO: Compute the lap time between the current time and when the - // timer was started. + /* TODO: Compute the lap time between the current time and when the */ + /* timer was started. */ return 0; } @@ -69,7 +69,7 @@ static void __LZTimerOff( LZTimerObject *tm) { - // TODO: Stop the timer counting. Should be a macro if possible. + /* TODO: Stop the timer counting. Should be a macro if possible. */ } /**************************************************************************** @@ -79,7 +79,7 @@ static ulong __LZTimerCount( LZTimerObject *tm) { - // TODO: Compute the elapsed time and return it. Always microseconds. + /* TODO: Compute the elapsed time and return it. Always microseconds. */ return 0; } @@ -95,9 +95,9 @@ ****************************************************************************/ static ulong __ULZReadTime(void) { - // TODO: Read the long period timer from the OS. The resolution of this - // timer should be around 1/20 of a second for timing long - // periods if possible. + /* TODO: Read the long period timer from the OS. The resolution of this */ + /* timer should be around 1/20 of a second for timing long */ + /* periods if possible. */ } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c b/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c index 5d899b7..ba90262 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/altbrk.c @@ -47,43 +47,43 @@ void PMAPI breakHandler(uint bHit) { if (bHit) - breakHit = true; + breakHit = true; else - ctrlCHit = true; + ctrlCHit = true; } int main(void) { printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } PM_installAltBreakHandler(breakHandler); printf("Control C/Break interrupt handler installed\n"); while (1) { - if (ctrlCHit) { - printf("Code termimated with Ctrl-C.\n"); - break; - } - if (breakHit) { - printf("Code termimated with Ctrl-Break.\n"); - break; - } - if (PM_kbhit() && PM_getch() == 0x1B) { - printf("No break code detected!\n"); - break; - } - printf("Hit Ctrl-C or Ctrl-Break to exit!\n"); - } + if (ctrlCHit) { + printf("Code termimated with Ctrl-C.\n"); + break; + } + if (breakHit) { + printf("Code termimated with Ctrl-Break.\n"); + break; + } + if (PM_kbhit() && PM_getch() == 0x1B) { + printf("No break code detected!\n"); + break; + } + printf("Hit Ctrl-C or Ctrl-Break to exit!\n"); + } PM_restoreBreakHandler(); return 0; diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c b/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c index c5390f6..e137307 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/altcrit.c @@ -59,27 +59,27 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } PM_installAltCriticalHandler(criticalHandler); printf("Critical Error handler installed - trying to read from A: drive...\n"); f = fopen("a:\bog.bog","rb"); if (f) fclose(f); if (criticalError) { - printf("Critical error occured on INT 21h function %02X!\n", - axValue >> 8); - } + printf("Critical error occured on INT 21h function %02X!\n", + axValue >> 8); + } else - printf("Critical error was not caught!\n"); + printf("Critical error was not caught!\n"); PM_restoreCriticalHandler(); return 0; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c b/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c index 4366848..5fa3382 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/biosptr.c @@ -64,29 +64,29 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } bios = PM_getBIOSPointer(); printf("Hit any key to test, Ctrl-Shift-Esc to quit\n"); while (!done) { - if (KB_HIT()) { - c = PM_getch(); - if (c == 0) PM_getch(); - printf("TIME=%-8lX ST=%02X CHAR=%02X ", TICKS(), KB_STAT, c); - printf("\n"); - if ((c == ESC) && SHIFT() && CTRL())/* Ctrl-Shift-Esc */ - break; - } - } + if (KB_HIT()) { + c = PM_getch(); + if (c == 0) PM_getch(); + printf("TIME=%-8lX ST=%02X CHAR=%02X ", TICKS(), KB_STAT, c); + printf("\n"); + if ((c == ESC) && SHIFT() && CTRL())/* Ctrl-Shift-Esc */ + break; + } + } return 0; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/block.c b/board/MAI/bios_emulator/scitech/src/pm/tests/block.c index e948872..15d503c 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/block.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/block.c @@ -61,9 +61,9 @@ ZTimerInit(); LZTimerOn(); for (i = 0; i < LOOPS; i++) { - PM_blockUntilTimeout(DELAY_MSECS); - ReportTime(LZTimerLap()); - } + PM_blockUntilTimeout(DELAY_MSECS); + ReportTime(LZTimerLap()); + } LZTimerOff(); return 0; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c b/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c index 3561fee..10b6446 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/brk.c @@ -44,34 +44,34 @@ { printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } PM_installBreakHandler(); printf("Control C/Break interrupt handler installed\n"); while (1) { - if (PM_ctrlCHit(1)) { - printf("Code termimated with Ctrl-C.\n"); - break; - } - if (PM_ctrlBreakHit(1)) { - printf("Code termimated with Ctrl-Break.\n"); - break; - } - if (PM_kbhit() && PM_getch() == 0x1B) { - printf("No break code detected!\n"); - break; - } - printf("Hit Ctrl-C or Ctrl-Break to exit!\n"); - } + if (PM_ctrlCHit(1)) { + printf("Code termimated with Ctrl-C.\n"); + break; + } + if (PM_ctrlBreakHit(1)) { + printf("Code termimated with Ctrl-Break.\n"); + break; + } + if (PM_kbhit() && PM_getch() == 0x1B) { + printf("No break code detected!\n"); + break; + } + printf("Hit Ctrl-C or Ctrl-Break to exit!\n"); + } PM_restoreBreakHandler(); return 0; diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c b/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c index 3897ce9..4d37cab 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/callreal.c @@ -58,22 +58,22 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } /* Allocate a the block of real mode memory */ if ((p = PM_allocRealSeg(sizeof(realModeCode), &r_seg, &r_off)) == NULL) { - printf("Unable to allocate real mode memory!\n"); - exit(1); - } + printf("Unable to allocate real mode memory!\n"); + exit(1); + } /* Copy the real mode code */ memcpy(p,realModeCode,sizeof(realModeCode)); @@ -89,17 +89,17 @@ sregs.ds = 8; PM_callRealMode(r_seg,r_off,®s,&sregs); if (regs.x.ax != 2 || regs.x.bx != 1 || regs.x.cx != 4 || regs.x.dx != 3 - || regs.x.si != 5 || regs.x.di != 6 || sregs.es != 7 - || sregs.ds != 8) { - printf("Real mode call failed!\n"); - printf("\n"); - printf("ax = %04X, bx = %04X, cx = %04X, dx = %04X\n", - regs.x.ax,regs.x.bx,regs.x.cx,regs.x.dx); - printf("si = %04X, di = %04X, es = %04X, ds = %04X\n", - regs.x.si,regs.x.di,sregs.es,sregs.ds); - } + || regs.x.si != 5 || regs.x.di != 6 || sregs.es != 7 + || sregs.ds != 8) { + printf("Real mode call failed!\n"); + printf("\n"); + printf("ax = %04X, bx = %04X, cx = %04X, dx = %04X\n", + regs.x.ax,regs.x.bx,regs.x.cx,regs.x.dx); + printf("si = %04X, di = %04X, es = %04X, ds = %04X\n", + regs.x.si,regs.x.di,sregs.es,sregs.ds); + } else - printf("Real mode call succeeded!\n"); + printf("Real mode call succeeded!\n"); /* Free the memory we allocated */ PM_freeRealSeg(p); diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c b/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c index 81737e1..5933ac9 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/checks.c @@ -80,21 +80,21 @@ sprintf(buf,msg,cond,file,line); if (log) { - fputs(buf,log); - fflush(log); - fclose(log); + fputs(buf,log); + fflush(log); + fclose(log); #ifdef __WINDOWS__ - OutputDebugStr(buf); + OutputDebugStr(buf); #endif - } + } if (fatal) { #ifdef __WINDOWS__ - MessageBox(NULL, buf,"Fatal Error!",MB_ICONEXCLAMATION); + MessageBox(NULL, buf,"Fatal Error!",MB_ICONEXCLAMATION); #else - fputs(buf,stderr); + fputs(buf,stderr); #endif - exit(-1); - } + exit(-1); + } } #endif /* CHECKED */ diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c b/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c index 34abb24..30e5dd3 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/cpu.c @@ -41,6 +41,6 @@ fflush(stdout); printf("\n\n%s\n", CPU_getProcessorName()); if (CPU_haveRDTSC()) - printf("\nProcessor supports Read Time Stamp Counter performance timer.\n"); + printf("\nProcessor supports Read Time Stamp Counter performance timer.\n"); return 0; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c b/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c index 21ec994..60f1251 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/critical.c @@ -45,25 +45,25 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } PM_installCriticalHandler(); printf("Critical Error handler installed - trying to read from A: drive...\n"); f = fopen("a:\bog.bog","rb"); if (f) fclose(f); if (PM_criticalError(&axcode,&dicode,1)) { - printf("Critical error occured on INT 21h function %02X!\n", - axcode >> 8); - } + printf("Critical error occured on INT 21h function %02X!\n", + axcode >> 8); + } else printf("Critical error was not caught!\n"); PM_restoreCriticalHandler(); return 0; diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c b/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c index c70f7ee..06c2180 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/getch.c @@ -309,9 +309,9 @@ KeyEntry *key; for (key = keys; key->code != 0; key++) { - if (key->code == code) - break; - } + if (key->code == code) + break; + } return key; } @@ -326,29 +326,29 @@ event_t *evt) { if (evt->modifiers & EVT_LEFTBUT) - printf(", LBUT"); + printf(", LBUT"); if (evt->modifiers & EVT_RIGHTBUT) - printf(", RBUT"); + printf(", RBUT"); if (evt->modifiers & EVT_MIDDLEBUT) - printf(", MBUT"); + printf(", MBUT"); if (evt->modifiers & EVT_SHIFTKEY) { - if (evt->modifiers & EVT_LEFTSHIFT) - printf(", LSHIFT"); - if (evt->modifiers & EVT_RIGHTSHIFT) - printf(", RSHIFT"); - } + if (evt->modifiers & EVT_LEFTSHIFT) + printf(", LSHIFT"); + if (evt->modifiers & EVT_RIGHTSHIFT) + printf(", RSHIFT"); + } if (evt->modifiers & EVT_CTRLSTATE) { - if (evt->modifiers & EVT_LEFTCTRL) - printf(", LCTRL"); - if (evt->modifiers & EVT_RIGHTCTRL) - printf(", RCTRL"); - } + if (evt->modifiers & EVT_LEFTCTRL) + printf(", LCTRL"); + if (evt->modifiers & EVT_RIGHTCTRL) + printf(", RCTRL"); + } if (evt->modifiers & EVT_ALTSTATE) { - if (evt->modifiers & EVT_LEFTALT) - printf(", LALT"); - if (evt->modifiers & EVT_RIGHTALT) - printf(", RALT"); - } + if (evt->modifiers & EVT_LEFTALT) + printf(", LALT"); + if (evt->modifiers & EVT_RIGHTALT) + printf(", RALT"); + } } /**************************************************************************** @@ -369,7 +369,7 @@ ascii = FindKey(ch,ASCIICodes); scan = FindKey(EVT_scanCode(evt->message),ScanCodes); printf("%s: 0x%04X -> %s, %s, '%c'", - msg, (int)evt->message & 0xFFFF, scan->name, ascii->name, isprint(ch) ? ch : ' '); + msg, (int)evt->message & 0xFFFF, scan->name, ascii->name, isprint(ch) ? ch : ' '); DisplayModifiers(evt); printf("\n"); } @@ -388,15 +388,15 @@ { printf("%s: ", msg); if (evt->message & EVT_LEFTBMASK) - printf("LEFT "); + printf("LEFT "); if (evt->message & EVT_RIGHTBMASK) - printf("RIGHT "); + printf("RIGHT "); if (evt->message & EVT_MIDDLEBMASK) - printf("MIDDLE "); + printf("MIDDLE "); printf("abs(%d,%d), rel(%d,%d)", evt->where_x, evt->where_y, evt->relative_x, evt->relative_y); DisplayModifiers(evt); if (evt->message & EVT_DBLCLICK) - printf(", DBLCLICK"); + printf(", DBLCLICK"); printf("\n"); } @@ -413,12 +413,12 @@ event_t *evt) { printf("%s: Joy1(%4d,%4d,%c%c), Joy2(%4d,%4d,%c%c)\n", msg, - evt->where_x,evt->where_y, - (evt->message & EVT_JOY1_BUTTONA) ? 'A' : 'a', - (evt->message & EVT_JOY1_BUTTONB) ? 'B' : 'b', - evt->relative_x,evt->relative_y, - (evt->message & EVT_JOY2_BUTTONA) ? 'A' : 'a', - (evt->message & EVT_JOY2_BUTTONB) ? 'B' : 'b'); + evt->where_x,evt->where_y, + (evt->message & EVT_JOY1_BUTTONA) ? 'A' : 'a', + (evt->message & EVT_JOY1_BUTTONB) ? 'B' : 'b', + evt->relative_x,evt->relative_y, + (evt->message & EVT_JOY2_BUTTONA) ? 'A' : 'a', + (evt->message & EVT_JOY2_BUTTONB) ? 'B' : 'b'); } /**************************************************************************** @@ -460,41 +460,41 @@ EVT_setMouseRange(1024,768); CalibrateJoy(); do { - EVT_pollJoystick(); - if (EVT_getNext(&evt,EVT_EVERYEVT)) { - switch (evt.what) { - case EVT_KEYDOWN: - DisplayKey("EVT_KEYDOWN ", &evt); - if (EVT_scanCode(evt.message) == KB_esc) - done = true; - break; - case EVT_KEYREPEAT: - DisplayKey("EVT_KEYREPEAT", &evt); - break; - case EVT_KEYUP: - DisplayKey("EVT_KEYUP ", &evt); - break; - case EVT_MOUSEDOWN: - DisplayMouse("EVT_MOUSEDOWN", &evt); - break; - case EVT_MOUSEAUTO: - DisplayMouse("EVT_MOUSEAUTO", &evt); - break; - case EVT_MOUSEUP: - DisplayMouse("EVT_MOUSEUP ", &evt); - break; - case EVT_MOUSEMOVE: - DisplayMouse("EVT_MOUSEMOVE", &evt); - break; - case EVT_JOYCLICK: - DisplayJoy("EVT_JOYCLICK ", &evt); - break; - case EVT_JOYMOVE: - DisplayJoy("EVT_JOYMOVE ", &evt); - break; - } - } - } while (!done); + EVT_pollJoystick(); + if (EVT_getNext(&evt,EVT_EVERYEVT)) { + switch (evt.what) { + case EVT_KEYDOWN: + DisplayKey("EVT_KEYDOWN ", &evt); + if (EVT_scanCode(evt.message) == KB_esc) + done = true; + break; + case EVT_KEYREPEAT: + DisplayKey("EVT_KEYREPEAT", &evt); + break; + case EVT_KEYUP: + DisplayKey("EVT_KEYUP ", &evt); + break; + case EVT_MOUSEDOWN: + DisplayMouse("EVT_MOUSEDOWN", &evt); + break; + case EVT_MOUSEAUTO: + DisplayMouse("EVT_MOUSEAUTO", &evt); + break; + case EVT_MOUSEUP: + DisplayMouse("EVT_MOUSEUP ", &evt); + break; + case EVT_MOUSEMOVE: + DisplayMouse("EVT_MOUSEMOVE", &evt); + break; + case EVT_JOYCLICK: + DisplayJoy("EVT_JOYCLICK ", &evt); + break; + case EVT_JOYMOVE: + DisplayJoy("EVT_JOYMOVE ", &evt); + break; + } + } + } while (!done); EVT_exit(); PM_closeConsole(hwndConsole); return 0; diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c b/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c index 9c02452..67ad245 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/isvesa.c @@ -68,24 +68,24 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } /* Allocate a 256 byte block of real memory for communicating with * the VESA BIOS. */ if ((vgPtr = PM_getVESABuf(&vgLen,&r_vgseg,&r_vgoff)) == NULL) { - printf("Unable to allocate VESA memory buffer!\n"); - exit(1); - } + printf("Unable to allocate VESA memory buffer!\n"); + exit(1); + } /* Call the VESA VBE to see if it is out there */ regs.x.ax = 0x4F00; @@ -95,16 +95,16 @@ PM_int86x(0x10, ®s, ®s, &sregs); memcpy(&vgaInfo,vgPtr,sizeof(VgaInfoBlock)); if (regs.x.ax == 0x4F && strncmp(vgaInfo.VESASignature,"VESA",4) == 0) { - printf("VESA VBE version %d.%d BIOS detected\n\n", - vgaInfo.VESAVersion >> 8, vgaInfo.VESAVersion & 0xF); - printf("Available video modes:\n"); - mode = PM_mapRealPointer(vgaInfo.VideoModePtr >> 16, vgaInfo.VideoModePtr & 0xFFFF); - while (*mode != 0xFFFF) { - printf(" %04hXh (%08X)\n", *mode, (int)mode); - mode++; - } - } + printf("VESA VBE version %d.%d BIOS detected\n\n", + vgaInfo.VESAVersion >> 8, vgaInfo.VESAVersion & 0xF); + printf("Available video modes:\n"); + mode = PM_mapRealPointer(vgaInfo.VideoModePtr >> 16, vgaInfo.VideoModePtr & 0xFFFF); + while (*mode != 0xFFFF) { + printf(" %04hXh (%08X)\n", *mode, (int)mode); + mode++; + } + } else - printf("VESA VBE not found\n"); + printf("VESA VBE not found\n"); return 0; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/key.c b/board/MAI/bios_emulator/scitech/src/pm/tests/key.c index cf89f79..dba8885 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/key.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/key.c @@ -56,16 +56,16 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } /* Install our timer handler and lock handler pages in memory. It is * difficult to get the size of a function in C, but we know our @@ -79,9 +79,9 @@ printf("Keyboard interrupt handler installed - Type some characters and\n"); printf("hit ESC to exit\n"); while ((ch = PM_getch()) != 0x1B) { - printf("%c", ch); - fflush(stdout); - } + printf("%c", ch); + fflush(stdout); + } PM_restoreKeyHandler(); PM_restoreBreakHandler(); diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c b/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c index 5c0d27a..b0b94be 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/key15.c @@ -59,16 +59,16 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } /* Install our timer handler and lock handler pages in memory. It is * difficult to get the size of a function in C, but we know our @@ -82,9 +82,9 @@ printf("Keyboard interrupt handler installed - Type some characters and\n"); printf("hit ESC to exit\n"); while ((ch = PM_getch()) != 0x1B) { - printf("%c", ch); - fflush(stdout); - } + printf("%c", ch); + fflush(stdout); + } PM_restoreKey15Handler(); PM_restoreBreakHandler(); diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c b/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c index 221bfb1..a2c655b 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/memtest.c @@ -56,16 +56,16 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } printf("Memory available at start:\n"); PM_availableMemory(&physical,&total); @@ -73,18 +73,18 @@ printf(" Total (including virtual): %ld Kb\n", total / 1024); printf("\n"); for (allocs = i = 0; i < MAXALLOC; i++) { - if ((pa[i] = PM_malloc(10*1024)) != 0) { /* in 10k blocks */ - p = pa[allocs]; - memset(p, 0, 10*1024); /* touch every byte */ - *p = 'x'; /* do something, anything with */ - p[1023] = 'y'; /* the allocated memory */ - allocs++; - printf("Allocated %lu bytes\r", 10*(allocs << 10)); - } - else break; - if (PM_kbhit() && (PM_getch() == 0x1B)) - break; - } + if ((pa[i] = PM_malloc(10*1024)) != 0) { /* in 10k blocks */ + p = pa[allocs]; + memset(p, 0, 10*1024); /* touch every byte */ + *p = 'x'; /* do something, anything with */ + p[1023] = 'y'; /* the allocated memory */ + allocs++; + printf("Allocated %lu bytes\r", 10*(allocs << 10)); + } + else break; + if (PM_kbhit() && (PM_getch() == 0x1B)) + break; + } printf("\n\nAllocated total of %lu bytes\n", 10 * (allocs << 10)); @@ -94,7 +94,7 @@ printf(" Total (including virtual): %ld Kb\n", total / 1024); for (i = allocs-1; i >= 0; i--) - PM_free(pa[i]); + PM_free(pa[i]); printf("\nMemory available after freeing all blocks (note that under protected mode\n"); printf("this will most likely not be correct after freeing blocks):\n\n"); diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c b/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c index 5b42651..2765a0d 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/mouse.c @@ -69,23 +69,23 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } regs.x.ax = 33; /* Mouse function 33 - Software reset */ PM_int86(0x33,®s,®s); if (regs.x.bx == 0) { - printf("No mouse installed.\n"); - exit(1); - } + printf("No mouse installed.\n"); + exit(1); + } /* Install our mouse handler and lock handler pages in memory. It is * difficult to get the size of a function in C, but we know our @@ -95,9 +95,9 @@ PM_lockCodePages((__codePtr)mouseHandler,100,&lh); PM_lockDataPages((void*)&count,sizeof(count),&lh); if (!PM_setMouseHandler(0xFFFF, mouseHandler)) { - printf("Unable to install mouse handler!\n"); - exit(1); - } + printf("Unable to install mouse handler!\n"); + exit(1); + } printf("Mouse handler installed - Hit any key to exit\n"); PM_getch(); diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c b/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c index b808052..e00be75 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/restore.c @@ -45,24 +45,24 @@ int main(void) { PM_HWND hwndConsole; - ulong stateSize; + ulong stateSize; void *stateBuf; FILE *f; /* Write the saved console state buffer to disk */ if ((f = fopen("/etc/pmsave.dat","rb")) == NULL) { - printf("Unable to open /etc/pmsave.dat for reading!\n"); - return -1; - } + printf("Unable to open /etc/pmsave.dat for reading!\n"); + return -1; + } fread(&stateSize,1,sizeof(stateSize),f); if (stateSize != PM_getConsoleStateSize()) { - printf("Size mismatch in /etc/pmsave.dat!\n"); - return -1; - } + printf("Size mismatch in /etc/pmsave.dat!\n"); + return -1; + } if ((stateBuf = PM_malloc(stateSize)) == NULL) { - printf("Unable to allocate console state buffer!\n"); - return -1; - } + printf("Unable to allocate console state buffer!\n"); + return -1; + } fread(stateBuf,1,stateSize,f); fclose(f); @@ -71,7 +71,7 @@ /* Forcibly set 80x25 text mode using the BIOS */ setVideoMode(0x3); - + /* Restore the previous console state */ PM_restoreConsoleState(stateBuf,0); PM_closeConsole(hwndConsole); @@ -79,4 +79,3 @@ printf("Console state successfully restored from /etc/pmsave.dat\n"); return 0; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c b/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c index 07c6eaa..acef922 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/rtc.c @@ -52,16 +52,16 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } /* Install our timer handler and lock handler pages in memory. It is * difficult to get the size of a function in C, but we know our @@ -75,13 +75,13 @@ printf("RealTimeClock interrupt handler installed - Hit ESC to exit\n"); oldCount = count; while (1) { - if (PM_kbhit() && (PM_getch() == 0x1B)) - break; - if (count != oldCount) { - printf("Tick, Tock: %ld\n", count); - oldCount = count; - } - } + if (PM_kbhit() && (PM_getch() == 0x1B)) + break; + if (count != oldCount) { + printf("Tick, Tock: %ld\n", count); + oldCount = count; + } + } PM_restoreRealTimeClockHandler(); PM_restoreBreakHandler(); diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/save.c b/board/MAI/bios_emulator/scitech/src/pm/tests/save.c index be96968..f732456 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/save.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/save.c @@ -37,7 +37,7 @@ int main(void) { PM_HWND hwndConsole; - ulong stateSize; + ulong stateSize; void *stateBuf; FILE *f; @@ -45,26 +45,25 @@ hwndConsole = PM_openConsole(0,0,0,0,0,true); stateSize = PM_getConsoleStateSize(); if ((stateBuf = PM_malloc(stateSize)) == NULL) { - PM_closeConsole(hwndConsole); - printf("Unable to allocate console state buffer!\n"); - return -1; - } + PM_closeConsole(hwndConsole); + printf("Unable to allocate console state buffer!\n"); + return -1; + } PM_saveConsoleState(stateBuf,0); - + /* Restore the console state on exit */ PM_restoreConsoleState(stateBuf,0); PM_closeConsole(hwndConsole); - + /* Write the saved console state buffer to disk */ if ((f = fopen("/etc/pmsave.dat","wb")) == NULL) - printf("Unable to open /etc/pmsave/dat for writing!\n"); + printf("Unable to open /etc/pmsave/dat for writing!\n"); else { - fwrite(&stateSize,1,sizeof(stateSize),f); - fwrite(stateBuf,1,stateSize,f); - fclose(f); - printf("Console state successfully saved to /etc/pmsave.dat\n"); - } + fwrite(&stateSize,1,sizeof(stateSize),f); + fwrite(stateBuf,1,stateSize,f); + fclose(f); + printf("Console state successfully saved to /etc/pmsave.dat\n"); + } PM_free(stateBuf); return 0; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c b/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c index 8222b86..be275e1 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/showpci.c @@ -58,123 +58,123 @@ PCIDeviceInfo *info; printf("Displaying enumeration of PCI bus (%d devices, %d display devices)\n", - NumPCI, NumDevices); + NumPCI, NumDevices); for (index = 0; index < NumDevices; index++) - printf(" Display device %d is PCI device %d\n",index,DeviceIndex[index]); + printf(" Display device %d is PCI device %d\n",index,DeviceIndex[index]); printf("\n"); printf("Bus Slot Fnc DeviceID SubSystem Rev Class IRQ Int Cmd\n"); for (i = 0; i < NumPCI; i++) { - printf("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ", - PCI[i].slot.p.Bus, - PCI[i].slot.p.Device, - PCI[i].slot.p.Function, - PCI[i].VendorID, - PCI[i].DeviceID, - PCI[i].u.type0.SubSystemVendorID, - PCI[i].u.type0.SubSystemID, - PCI[i].RevID, - PCI[i].BaseClass, - PCI[i].SubClass, - PCI[i].u.type0.InterruptLine, - PCI[i].u.type0.InterruptPin, - PCI[i].Command); - for (index = 0; index < NumDevices; index++) { - if (DeviceIndex[index] == i) - break; - } - if (index < NumDevices) - printf("<- %d\n", index); - else - printf("\n"); - } + printf("%2d %2d %2d %04X:%04X %04X:%04X %02X %02X:%02X %02X %02X %04X ", + PCI[i].slot.p.Bus, + PCI[i].slot.p.Device, + PCI[i].slot.p.Function, + PCI[i].VendorID, + PCI[i].DeviceID, + PCI[i].u.type0.SubSystemVendorID, + PCI[i].u.type0.SubSystemID, + PCI[i].RevID, + PCI[i].BaseClass, + PCI[i].SubClass, + PCI[i].u.type0.InterruptLine, + PCI[i].u.type0.InterruptPin, + PCI[i].Command); + for (index = 0; index < NumDevices; index++) { + if (DeviceIndex[index] == i) + break; + } + if (index < NumDevices) + printf("<- %d\n", index); + else + printf("\n"); + } printf("\n"); printf("DeviceID Stat Ifc Cch Lat Hdr BIST\n"); for (i = 0; i < NumPCI; i++) { - printf("%04X:%04X %04X %02X %02X %02X %02X %02X ", - PCI[i].VendorID, - PCI[i].DeviceID, - PCI[i].Status, - PCI[i].Interface, - PCI[i].CacheLineSize, - PCI[i].LatencyTimer, - PCI[i].HeaderType, - PCI[i].BIST); - for (index = 0; index < NumDevices; index++) { - if (DeviceIndex[index] == i) - break; - } - if (index < NumDevices) - printf("<- %d\n", index); - else - printf("\n"); - } + printf("%04X:%04X %04X %02X %02X %02X %02X %02X ", + PCI[i].VendorID, + PCI[i].DeviceID, + PCI[i].Status, + PCI[i].Interface, + PCI[i].CacheLineSize, + PCI[i].LatencyTimer, + PCI[i].HeaderType, + PCI[i].BIST); + for (index = 0; index < NumDevices; index++) { + if (DeviceIndex[index] == i) + break; + } + if (index < NumDevices) + printf("<- %d\n", index); + else + printf("\n"); + } printf("\n"); printf("DeviceID Base10h Base14h Base18h Base1Ch Base20h Base24h ROMBase\n"); for (i = 0; i < NumPCI; i++) { - printf("%04X:%04X %08lX %08lX %08lX %08lX %08lX %08lX %08lX ", - PCI[i].VendorID, - PCI[i].DeviceID, - PCI[i].u.type0.BaseAddress10, - PCI[i].u.type0.BaseAddress14, - PCI[i].u.type0.BaseAddress18, - PCI[i].u.type0.BaseAddress1C, - PCI[i].u.type0.BaseAddress20, - PCI[i].u.type0.BaseAddress24, - PCI[i].u.type0.ROMBaseAddress); - for (index = 0; index < NumDevices; index++) { - if (DeviceIndex[index] == i) - break; - } - if (index < NumDevices) - printf("<- %d\n", index); - else - printf("\n"); - } + printf("%04X:%04X %08lX %08lX %08lX %08lX %08lX %08lX %08lX ", + PCI[i].VendorID, + PCI[i].DeviceID, + PCI[i].u.type0.BaseAddress10, + PCI[i].u.type0.BaseAddress14, + PCI[i].u.type0.BaseAddress18, + PCI[i].u.type0.BaseAddress1C, + PCI[i].u.type0.BaseAddress20, + PCI[i].u.type0.BaseAddress24, + PCI[i].u.type0.ROMBaseAddress); + for (index = 0; index < NumDevices; index++) { + if (DeviceIndex[index] == i) + break; + } + if (index < NumDevices) + printf("<- %d\n", index); + else + printf("\n"); + } printf("\n"); printf("DeviceID BAR10Len BAR14Len BAR18Len BAR1CLen BAR20Len BAR24Len ROMLen\n"); for (i = 0; i < NumPCI; i++) { - printf("%04X:%04X %08lX %08lX %08lX %08lX %08lX %08lX %08lX ", - PCI[i].VendorID, - PCI[i].DeviceID, - PCI[i].u.type0.BaseAddress10Len, - PCI[i].u.type0.BaseAddress14Len, - PCI[i].u.type0.BaseAddress18Len, - PCI[i].u.type0.BaseAddress1CLen, - PCI[i].u.type0.BaseAddress20Len, - PCI[i].u.type0.BaseAddress24Len, - PCI[i].u.type0.ROMBaseAddressLen); - for (index = 0; index < NumDevices; index++) { - if (DeviceIndex[index] == i) - break; - } - if (index < NumDevices) - printf("<- %d\n", index); - else - printf("\n"); - } + printf("%04X:%04X %08lX %08lX %08lX %08lX %08lX %08lX %08lX ", + PCI[i].VendorID, + PCI[i].DeviceID, + PCI[i].u.type0.BaseAddress10Len, + PCI[i].u.type0.BaseAddress14Len, + PCI[i].u.type0.BaseAddress18Len, + PCI[i].u.type0.BaseAddress1CLen, + PCI[i].u.type0.BaseAddress20Len, + PCI[i].u.type0.BaseAddress24Len, + PCI[i].u.type0.ROMBaseAddressLen); + for (index = 0; index < NumDevices; index++) { + if (DeviceIndex[index] == i) + break; + } + if (index < NumDevices) + printf("<- %d\n", index); + else + printf("\n"); + } printf("\n"); printf("Displaying enumeration of %d bridge devices\n",NumBridges); printf("\n"); printf("DeviceID P# S# B# IOB IOL MemBase MemLimit PreBase PreLimit Ctrl\n"); for (i = 0; i < NumBridges; i++) { - info = (PCIDeviceInfo*)&PCI[BridgeIndex[i]]; - printf("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n", - info->VendorID, - info->DeviceID, - info->u.type1.PrimaryBusNumber, - info->u.type1.SecondayBusNumber, - info->u.type1.SubordinateBusNumber, - ((u16)info->u.type1.IOBase << 8) & 0xF000, - info->u.type1.IOLimit ? - ((u16)info->u.type1.IOLimit << 8) | 0xFFF : 0, - ((u32)info->u.type1.MemoryBase << 16) & 0xFFF00000, - info->u.type1.MemoryLimit ? - ((u32)info->u.type1.MemoryLimit << 16) | 0xFFFFF : 0, - ((u32)info->u.type1.PrefetchableMemoryBase << 16) & 0xFFF00000, - info->u.type1.PrefetchableMemoryLimit ? - ((u32)info->u.type1.PrefetchableMemoryLimit << 16) | 0xFFFFF : 0, - info->u.type1.BridgeControl); - } + info = (PCIDeviceInfo*)&PCI[BridgeIndex[i]]; + printf("%04X:%04X %02X %02X %02X %04X %04X %08X %08X %08X %08X %04X\n", + info->VendorID, + info->DeviceID, + info->u.type1.PrimaryBusNumber, + info->u.type1.SecondayBusNumber, + info->u.type1.SubordinateBusNumber, + ((u16)info->u.type1.IOBase << 8) & 0xF000, + info->u.type1.IOLimit ? + ((u16)info->u.type1.IOLimit << 8) | 0xFFF : 0, + ((u32)info->u.type1.MemoryBase << 16) & 0xFFF00000, + info->u.type1.MemoryLimit ? + ((u32)info->u.type1.MemoryLimit << 16) | 0xFFFFF : 0, + ((u32)info->u.type1.PrefetchableMemoryBase << 16) & 0xFFF00000, + info->u.type1.PrefetchableMemoryLimit ? + ((u32)info->u.type1.PrefetchableMemoryLimit << 16) | 0xFFFFF : 0, + info->u.type1.BridgeControl); + } printf("\n"); } @@ -191,63 +191,63 @@ int i,j; PCIDeviceInfo *info; - // If this is the first time we have been called, enumerate all - // devices on the PCI bus. + /* If this is the first time we have been called, enumerate all */ + /* devices on the PCI bus. */ if (NumPCI == -1) { - if ((NumPCI = PCI_getNumDevices()) == 0) - return -1; - PCI = malloc(NumPCI * sizeof(PCI[0])); - BridgeIndex = malloc(NumPCI * sizeof(BridgeIndex[0])); - DeviceIndex = malloc(NumPCI * sizeof(DeviceIndex[0])); - if (!PCI || !BridgeIndex || !DeviceIndex) - return -1; - for (i = 0; i < NumPCI; i++) - PCI[i].dwSize = sizeof(PCI[i]); - if (PCI_enumerate(PCI) == 0) - return -1; + if ((NumPCI = PCI_getNumDevices()) == 0) + return -1; + PCI = malloc(NumPCI * sizeof(PCI[0])); + BridgeIndex = malloc(NumPCI * sizeof(BridgeIndex[0])); + DeviceIndex = malloc(NumPCI * sizeof(DeviceIndex[0])); + if (!PCI || !BridgeIndex || !DeviceIndex) + return -1; + for (i = 0; i < NumPCI; i++) + PCI[i].dwSize = sizeof(PCI[i]); + if (PCI_enumerate(PCI) == 0) + return -1; - // Build a list of all PCI bridge devices - for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) { - if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) - BridgeIndex[NumBridges++] = i; - } + /* Build a list of all PCI bridge devices */ + for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) { + if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) + BridgeIndex[NumBridges++] = i; + } - // Now build a list of all display class devices - for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) { - if (PCI_IS_DISPLAY_CLASS(&PCI[i])) { - if ((PCI[i].Command & 0x3) == 0x3) - DeviceIndex[0] = i; - else - DeviceIndex[NumDevices++] = i; - if (PCI[i].slot.p.Bus != 0) { - // This device is on a different bus than the primary - // PCI bus, so it is probably an AGP device. Find the - // AGP bus device that controls that bus so we can - // control it. - for (j = 0; j < NumBridges; j++) { - info = (PCIDeviceInfo*)&PCI[BridgeIndex[j]]; - if (info->u.type1.SecondayBusNumber == PCI[i].slot.p.Bus) { - AGPBridge = info; - break; - } - } - } - } - } + /* Now build a list of all display class devices */ + for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) { + if (PCI_IS_DISPLAY_CLASS(&PCI[i])) { + if ((PCI[i].Command & 0x3) == 0x3) + DeviceIndex[0] = i; + else + DeviceIndex[NumDevices++] = i; + if (PCI[i].slot.p.Bus != 0) { + /* This device is on a different bus than the primary */ + /* PCI bus, so it is probably an AGP device. Find the */ + /* AGP bus device that controls that bus so we can */ + /* control it. */ + for (j = 0; j < NumBridges; j++) { + info = (PCIDeviceInfo*)&PCI[BridgeIndex[j]]; + if (info->u.type1.SecondayBusNumber == PCI[i].slot.p.Bus) { + AGPBridge = info; + break; + } + } + } + } + } - // Enumerate all PCI and bridge devices to standard output - EnumeratePCI(); - } + /* Enumerate all PCI and bridge devices to standard output */ + EnumeratePCI(); + } return NumDevices; } int main(void) { - // Enumerate all PCI devices + /* Enumerate all PCI devices */ PM_init(); if (PCI_enumerateDevices() < 1) { - printf("No PCI display devices found!\n"); - return -1; - } + printf("No PCI display devices found!\n"); + return -1; + } return 0; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c b/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c index ee1014f..378725e 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/tick.c @@ -54,16 +54,16 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } /* Install our timer handler and lock handler pages in memory. It is * difficult to get the size of a function in C, but we know our @@ -77,13 +77,13 @@ printf("Timer interrupt handler installed - Hit ESC to exit\n"); oldCount = count; while (1) { - if (PM_kbhit() && (PM_getch() == 0x1B)) - break; - if (count != oldCount) { - printf("Tick, Tock: %ld\n", count); - oldCount = count; - } - } + if (PM_kbhit() && (PM_getch() == 0x1B)) + break; + if (count != oldCount) { + printf("Tick, Tock: %ld\n", count); + oldCount = count; + } + } PM_restoreTimerHandler(); PM_restoreBreakHandler(); diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c b/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c index 55e95a8..7fa77b7 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/timerc.c @@ -69,8 +69,8 @@ LZTimerOn(); for (j = 0; j < 10; j++) - for (i = 0; i < 20000; i++) - i = i; + for (i = 0; i < 20000; i++) + i = i; LZTimerOff(); ReportTime(LZTimerCount()); @@ -80,7 +80,7 @@ delay(DELAY_SECS * 1000); finish = ULZReadTime(); printf("Delay of %d secs took %d 1/10ths of a second\n", - DELAY_SECS,ULZElapsedTime(start,finish)); + DELAY_SECS,ULZElapsedTime(start,finish)); #endif return 0; diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c b/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c index 0892e25..f0c7bd6 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/uswc.c @@ -66,50 +66,50 @@ int i,j; PCIDeviceInfo *info; - // If this is the first time we have been called, enumerate all - // devices on the PCI bus. + /* If this is the first time we have been called, enumerate all */ + /* devices on the PCI bus. */ if (NumPCI == -1) { - if ((NumPCI = PCI_getNumDevices()) == 0) - return -1; - PCI = malloc(NumPCI * sizeof(PCI[0])); - BridgeIndex = malloc(NumPCI * sizeof(BridgeIndex[0])); - DeviceIndex = malloc(NumPCI * sizeof(DeviceIndex[0])); - if (!PCI || !BridgeIndex || !DeviceIndex) - return -1; - for (i = 0; i < NumPCI; i++) - PCI[i].dwSize = sizeof(PCI[i]); - if (PCI_enumerate(PCI) == 0) - return -1; + if ((NumPCI = PCI_getNumDevices()) == 0) + return -1; + PCI = malloc(NumPCI * sizeof(PCI[0])); + BridgeIndex = malloc(NumPCI * sizeof(BridgeIndex[0])); + DeviceIndex = malloc(NumPCI * sizeof(DeviceIndex[0])); + if (!PCI || !BridgeIndex || !DeviceIndex) + return -1; + for (i = 0; i < NumPCI; i++) + PCI[i].dwSize = sizeof(PCI[i]); + if (PCI_enumerate(PCI) == 0) + return -1; - // Build a list of all PCI bridge devices - for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) { - if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) - BridgeIndex[NumBridges++] = i; - } + /* Build a list of all PCI bridge devices */ + for (i = 0,NumBridges = 0,BridgeIndex[0] = -1; i < NumPCI; i++) { + if (PCI[i].BaseClass == PCI_BRIDGE_CLASS) + BridgeIndex[NumBridges++] = i; + } - // Now build a list of all display class devices - for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) { - if (PCI_IS_DISPLAY_CLASS(&PCI[i])) { - if ((PCI[i].Command & 0x3) == 0x3) - DeviceIndex[0] = i; - else - DeviceIndex[NumDevices++] = i; - if (PCI[i].slot.p.Bus != 0) { - // This device is on a different bus than the primary - // PCI bus, so it is probably an AGP device. Find the - // AGP bus device that controls that bus so we can - // control it. - for (j = 0; j < NumBridges; j++) { - info = (PCIDeviceInfo*)&PCI[BridgeIndex[j]]; - if (info->u.type1.SecondayBusNumber == PCI[i].slot.p.Bus) { - AGPBridge = info; - break; - } - } - } - } - } - } + /* Now build a list of all display class devices */ + for (i = 0,NumDevices = 1,DeviceIndex[0] = -1; i < NumPCI; i++) { + if (PCI_IS_DISPLAY_CLASS(&PCI[i])) { + if ((PCI[i].Command & 0x3) == 0x3) + DeviceIndex[0] = i; + else + DeviceIndex[NumDevices++] = i; + if (PCI[i].slot.p.Bus != 0) { + /* This device is on a different bus than the primary */ + /* PCI bus, so it is probably an AGP device. Find the */ + /* AGP bus device that controls that bus so we can */ + /* control it. */ + for (j = 0; j < NumBridges; j++) { + info = (PCIDeviceInfo*)&PCI[BridgeIndex[j]]; + if (info->u.type1.SecondayBusNumber == PCI[i].slot.p.Bus) { + AGPBridge = info; + break; + } + } + } + } + } + } return NumDevices; } @@ -125,17 +125,17 @@ printf("\n"); printf("DeviceID SubSystem Base10h (length ) Base14h (length )\n"); for (index = 0; index < NumDevices; index++) { - i = DeviceIndex[index]; - printf("%04X:%04X %04X:%04X %08lX (%6ld KB) %08lX (%6ld KB)\n", - PCI[i].VendorID, - PCI[i].DeviceID, - PCI[i].u.type0.SubSystemVendorID, - PCI[i].u.type0.SubSystemID, - PCI[i].u.type0.BaseAddress10, - PCI[i].u.type0.BaseAddress10Len / 1024, - PCI[i].u.type0.BaseAddress14, - PCI[i].u.type0.BaseAddress14Len / 1024); - } + i = DeviceIndex[index]; + printf("%04X:%04X %04X:%04X %08lX (%6ld KB) %08lX (%6ld KB)\n", + PCI[i].VendorID, + PCI[i].DeviceID, + PCI[i].u.type0.SubSystemVendorID, + PCI[i].u.type0.SubSystemID, + PCI[i].u.type0.BaseAddress10, + PCI[i].u.type0.BaseAddress10Len / 1024, + PCI[i].u.type0.BaseAddress14, + PCI[i].u.type0.BaseAddress14Len / 1024); + } printf("\n"); } @@ -147,16 +147,16 @@ uint type) { static char *names[] = { - "UNCACHABLE", - "WRCOMB", - "UNKNOWN", - "UNKNOWN", - "WRTHROUGH", - "WRPROT", - "WRBACK", - }; + "UNCACHABLE", + "WRCOMB", + "UNKNOWN", + "UNKNOWN", + "WRTHROUGH", + "WRPROT", + "WRBACK", + }; if (type <= PM_MTRR_MAX) - return names[type]; + return names[type]; return "UNKNOWN"; } @@ -183,42 +183,42 @@ int err) { if (err == PM_MTRR_ERR_OK) - return; + return; switch (err) { - case PM_MTRR_NOT_SUPPORTED: - printf("Failed: MTRR is not supported by host CPU\n"); - break; - case PM_MTRR_ERR_PARAMS: - printf("Failed: Invalid parameters passed to PM_enableWriteCombined!\n"); - break; - case PM_MTRR_ERR_NOT_4KB_ALIGNED: - printf("Failed: Address is not 4Kb aligned!\n"); - break; - case PM_MTRR_ERR_BELOW_1MB: - printf("Failed: Addresses below 1Mb cannot be write combined!\n"); - break; - case PM_MTRR_ERR_NOT_ALIGNED: - printf("Failed: Address is not correctly aligned for processor!\n"); - break; - case PM_MTRR_ERR_OVERLAP: - printf("Failed: Address overlaps an existing region!\n"); - break; - case PM_MTRR_ERR_TYPE_MISMATCH: - printf("Failed: Adress is contained with existing region, but type is different!\n"); - break; - case PM_MTRR_ERR_NONE_FREE: - printf("Failed: Out of MTRR registers!\n"); - break; - case PM_MTRR_ERR_NOWRCOMB: - printf("Failed: This processor does not support write combining!\n"); - break; - case PM_MTRR_ERR_NO_OS_SUPPORT: - printf("Failed: MTRR is not supported by host OS\n"); - break; - default: - printf("Failed: UNKNOWN ERROR!\n"); - break; - } + case PM_MTRR_NOT_SUPPORTED: + printf("Failed: MTRR is not supported by host CPU\n"); + break; + case PM_MTRR_ERR_PARAMS: + printf("Failed: Invalid parameters passed to PM_enableWriteCombined!\n"); + break; + case PM_MTRR_ERR_NOT_4KB_ALIGNED: + printf("Failed: Address is not 4Kb aligned!\n"); + break; + case PM_MTRR_ERR_BELOW_1MB: + printf("Failed: Addresses below 1Mb cannot be write combined!\n"); + break; + case PM_MTRR_ERR_NOT_ALIGNED: + printf("Failed: Address is not correctly aligned for processor!\n"); + break; + case PM_MTRR_ERR_OVERLAP: + printf("Failed: Address overlaps an existing region!\n"); + break; + case PM_MTRR_ERR_TYPE_MISMATCH: + printf("Failed: Adress is contained with existing region, but type is different!\n"); + break; + case PM_MTRR_ERR_NONE_FREE: + printf("Failed: Out of MTRR registers!\n"); + break; + case PM_MTRR_ERR_NOWRCOMB: + printf("Failed: This processor does not support write combining!\n"); + break; + case PM_MTRR_ERR_NO_OS_SUPPORT: + printf("Failed: MTRR is not supported by host OS\n"); + break; + default: + printf("Failed: UNKNOWN ERROR!\n"); + break; + } exit(-1); } @@ -242,20 +242,20 @@ int i,index; for (index = 0; index < NumDevices; index++) { - i = DeviceIndex[index]; - if (PCI[i].u.type0.BaseAddress10 & 0x8) { - LogMTRRError(PM_enableWriteCombine( - PCI[i].u.type0.BaseAddress10 & 0xFFFFFFF0, - PCI[i].u.type0.BaseAddress10Len, - PM_MTRR_WRCOMB)); - } - if (PCI[i].u.type0.BaseAddress14 & 0x8) { - LogMTRRError(PM_enableWriteCombine( - PCI[i].u.type0.BaseAddress14 & 0xFFFFFFF0, - PCI[i].u.type0.BaseAddress14Len, - PM_MTRR_WRCOMB)); - } - } + i = DeviceIndex[index]; + if (PCI[i].u.type0.BaseAddress10 & 0x8) { + LogMTRRError(PM_enableWriteCombine( + PCI[i].u.type0.BaseAddress10 & 0xFFFFFFF0, + PCI[i].u.type0.BaseAddress10Len, + PM_MTRR_WRCOMB)); + } + if (PCI[i].u.type0.BaseAddress14 & 0x8) { + LogMTRRError(PM_enableWriteCombine( + PCI[i].u.type0.BaseAddress14 & 0xFFFFFFF0, + PCI[i].u.type0.BaseAddress14Len, + PM_MTRR_WRCOMB)); + } + } printf("\n"); ShowDisplayDevices(); ShowWriteCombine(); @@ -270,20 +270,20 @@ int i,index; for (index = 0; index < NumDevices; index++) { - i = DeviceIndex[index]; - if (PCI[i].u.type0.BaseAddress10 & 0x8) { - LogMTRRError(PM_enableWriteCombine( - PCI[i].u.type0.BaseAddress10 & 0xFFFFFFF0, - PCI[i].u.type0.BaseAddress10Len, - PM_MTRR_UNCACHABLE)); - } - if (PCI[i].u.type0.BaseAddress14 & 0x8) { - LogMTRRError(PM_enableWriteCombine( - PCI[i].u.type0.BaseAddress14 & 0xFFFFFFF0, - PCI[i].u.type0.BaseAddress14Len, - PM_MTRR_UNCACHABLE)); - } - } + i = DeviceIndex[index]; + if (PCI[i].u.type0.BaseAddress10 & 0x8) { + LogMTRRError(PM_enableWriteCombine( + PCI[i].u.type0.BaseAddress10 & 0xFFFFFFF0, + PCI[i].u.type0.BaseAddress10Len, + PM_MTRR_UNCACHABLE)); + } + if (PCI[i].u.type0.BaseAddress14 & 0x8) { + LogMTRRError(PM_enableWriteCombine( + PCI[i].u.type0.BaseAddress14 & 0xFFFFFFF0, + PCI[i].u.type0.BaseAddress14Len, + PM_MTRR_UNCACHABLE)); + } + } printf("\n"); ShowDisplayDevices(); ShowWriteCombine(); @@ -293,19 +293,19 @@ { PM_init(); if (PCI_enumerateDevices() < 1) { - printf("No PCI display devices found!\n"); - return -1; - } + printf("No PCI display devices found!\n"); + return -1; + } if (argc < 2) { - printf("usage: uswc [-show -on -off]\n\n"); - ShowDisplayDevices(); - return -1; - } + printf("usage: uswc [-show -on -off]\n\n"); + ShowDisplayDevices(); + return -1; + } if (stricmp(argv[1],"-show") == 0) - ShowWriteCombine(); + ShowWriteCombine(); else if (stricmp(argv[1],"-on") == 0) - EnableWriteCombine(); + EnableWriteCombine(); else if (stricmp(argv[1],"-off") == 0) - DisableWriteCombine(); + DisableWriteCombine(); return 0; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c b/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c index 633a76d..b7e3bb7 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/vftest.c @@ -51,27 +51,27 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } if (!VF_available()) { - printf("Virtual Linear Framebuffer not available.\n"); - exit(1); - } + printf("Virtual Linear Framebuffer not available.\n"); + exit(1); + } vfBuffer = VF_init(0xA0000,64,sizeof(code),code); if (!vfBuffer) { - printf("Failure to initialise Virtual Linear Framebuffer!\n"); - exit(1); - } + printf("Failure to initialise Virtual Linear Framebuffer!\n"); + exit(1); + } VF_exit(); printf("Virtual Linear Framebuffer set up successfully!\n"); return 0; diff --git a/board/MAI/bios_emulator/scitech/src/pm/tests/video.c b/board/MAI/bios_emulator/scitech/src/pm/tests/video.c index 7f6f67f..92adcdd 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/tests/video.c +++ b/board/MAI/bios_emulator/scitech/src/pm/tests/video.c @@ -90,12 +90,12 @@ int x,y; for (y = starty; y <= endy; y++) { - v = SCREEN(startx,y); - for (x = startx; x <= endx; x++) { - *v++ = c; - *v++ = attr; - } - } + v = SCREEN(startx,y); + for (x = startx; x <= endx; x++) { + *v++ = c; + *v++ = attr; + } + } } /* Routine to display a single character using direct video writes */ @@ -124,18 +124,18 @@ b = border_chars; for (i = starty+1; i < endy; i++) { - writeChar(startx, i, *b, attr); - writeChar(endx, i, *b, attr); - } + writeChar(startx, i, *b, attr); + writeChar(endx, i, *b, attr); + } b++; for (i = startx+1, v = SCREEN(startx+1, starty); i < endx; i++) { - *v++ = *b; - *v++ = attr; - } + *v++ = *b; + *v++ = attr; + } for (i = startx+1, v = SCREEN(startx+1, endy); i < endx; i++) { - *v++ = *b; - *v++ = attr; - } + *v++ = *b; + *v++ = attr; + } b++; writeChar(startx, starty, *b++, attr); writeChar(endx, starty, *b++, attr); @@ -150,16 +150,16 @@ printf("Program running in "); switch (PM_getModeType()) { - case PM_realMode: - printf("real mode.\n\n"); - break; - case PM_286: - printf("16 bit protected mode.\n\n"); - break; - case PM_386: - printf("32 bit protected mode.\n\n"); - break; - } + case PM_realMode: + printf("real mode.\n\n"); + break; + case PM_286: + printf("16 bit protected mode.\n\n"); + break; + case PM_386: + printf("32 bit protected mode.\n\n"); + break; + } hwndConsole = PM_openConsole(0,0,0,0,0,true); printf("Hit any key to start 80x25 text mode and perform some direct video output.\n"); @@ -167,17 +167,17 @@ /* Allocate a buffer to save console state and save the state */ if ((stateBuf = PM_malloc(PM_getConsoleStateSize())) == NULL) { - printf("Unable to allocate console state buffer!\n"); - exit(1); - } + printf("Unable to allocate console state buffer!\n"); + exit(1); + } PM_saveConsoleState(stateBuf,0); bios = PM_getBIOSPointer(); orgMode = getVideoMode(); setVideoMode(0x3); if ((videoPtr = PM_mapPhysicalAddr(0xB8000,0xFFFF,true)) == NULL) { - printf("Unable to obtain pointer to framebuffer!\n"); - exit(1); - } + printf("Unable to obtain pointer to framebuffer!\n"); + exit(1); + } /* Draw some text on the screen */ fill(0, 0, 79, 24, 176, 0x1E); @@ -197,4 +197,3 @@ printf("Video Memory = %08X\n", (int)videoPtr); return 0; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c index dbbaf37..93742de 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c +++ b/board/MAI/bios_emulator/scitech/src/pm/vdd/fileio.c @@ -63,54 +63,54 @@ ULONG omode, oflags; if (f != NULL) { - f->offset = 0; - f->text = (mode[1] == 't' || mode[2] == 't'); - f->writemode = (mode[0] == 'w') || (mode[0] == 'a'); - f->unputc = EOF; - f->endp = f->buf + sizeof(f->buf); - f->curp = f->startp = f->buf; + f->offset = 0; + f->text = (mode[1] == 't' || mode[2] == 't'); + f->writemode = (mode[0] == 'w') || (mode[0] == 'a'); + f->unputc = EOF; + f->endp = f->buf + sizeof(f->buf); + f->curp = f->startp = f->buf; - if (mode[0] == 'r') { - #ifdef __OS2_VDD__ - omode = VDHOPEN_ACCESS_READONLY | VDHOPEN_SHARE_DENYNONE; - oflags = VDHOPEN_ACTION_OPEN_IF_EXISTS | VDHOPEN_ACTION_FAIL_IF_NEW; - #else - omode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE; - oflags = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_FAIL_IF_NEW; - #endif - } - else if (mode[0] == 'w') { - #ifdef __OS2_VDD__ - omode = VDHOPEN_ACCESS_WRITEONLY | VDHOPEN_SHARE_DENYWRITE; - oflags = VDHOPEN_ACTION_REPLACE_IF_EXISTS | VDHOPEN_ACTION_CREATE_IF_NEW; - #else - omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE; - oflags = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; - #endif - } - else { - #ifdef __OS2_VDD__ - omode = VDHOPEN_ACCESS_READWRITE | VDHOPEN_SHARE_DENYWRITE; - oflags = VDHOPEN_ACTION_OPEN_IF_EXISTS | VDHOPEN_ACTION_CREATE_IF_NEW; - #else - omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE; - oflags = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; - #endif - } - rc = _OS2Open((PSZ)filename, (PHFILE)&f->handle, &ulAction, 0, VDHOPEN_FILE_NORMAL, oflags, omode, NULL); - if (rc != 0) { - PM_free(f); - return NULL; - } + if (mode[0] == 'r') { + #ifdef __OS2_VDD__ + omode = VDHOPEN_ACCESS_READONLY | VDHOPEN_SHARE_DENYNONE; + oflags = VDHOPEN_ACTION_OPEN_IF_EXISTS | VDHOPEN_ACTION_FAIL_IF_NEW; + #else + omode = OPEN_ACCESS_READONLY | OPEN_SHARE_DENYNONE; + oflags = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_FAIL_IF_NEW; + #endif + } + else if (mode[0] == 'w') { + #ifdef __OS2_VDD__ + omode = VDHOPEN_ACCESS_WRITEONLY | VDHOPEN_SHARE_DENYWRITE; + oflags = VDHOPEN_ACTION_REPLACE_IF_EXISTS | VDHOPEN_ACTION_CREATE_IF_NEW; + #else + omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_DENYWRITE; + oflags = OPEN_ACTION_REPLACE_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; + #endif + } + else { + #ifdef __OS2_VDD__ + omode = VDHOPEN_ACCESS_READWRITE | VDHOPEN_SHARE_DENYWRITE; + oflags = VDHOPEN_ACTION_OPEN_IF_EXISTS | VDHOPEN_ACTION_CREATE_IF_NEW; + #else + omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_DENYWRITE; + oflags = OPEN_ACTION_OPEN_IF_EXISTS | OPEN_ACTION_CREATE_IF_NEW; + #endif + } + rc = _OS2Open((PSZ)filename, (PHFILE)&f->handle, &ulAction, 0, VDHOPEN_FILE_NORMAL, oflags, omode, NULL); + if (rc != 0) { + PM_free(f); + return NULL; + } - #ifdef __OS2_VDD__ - f->filesize = VDHSeek((HFILE)f->handle, 0, VDHSK_END_OF_FILE); - #else - rc = DosSetFilePtr((HFILE)f->handle, 0, FILE_END, &f->filesize); - #endif + #ifdef __OS2_VDD__ + f->filesize = VDHSeek((HFILE)f->handle, 0, VDHSK_END_OF_FILE); + #else + rc = DosSetFilePtr((HFILE)f->handle, 0, FILE_END, &f->filesize); + #endif - if (mode[0] == 'a') - fseek(f,0,2); + if (mode[0] == 'a') + fseek(f,0,2); } return f; } @@ -131,23 +131,23 @@ /* First copy any data already read into our buffer */ if ((bytes = (f->curp - f->startp)) > 0) { - memcpy(buf,f->curp,bytes); - f->startp = f->curp = f->buf; - buf += bytes; - totalbytes += bytes; - bytes = (size * n) - bytes; - } + memcpy(buf,f->curp,bytes); + f->startp = f->curp = f->buf; + buf += bytes; + totalbytes += bytes; + bytes = (size * n) - bytes; + } else - bytes = size * n; + bytes = size * n; if (bytes) { - #ifdef __OS2_VDD__ - readbytes = VDHRead((HFILE)f->handle, buf, bytes); - #else - DosRead((HFILE)f->handle, buf, bytes, &readbytes); - #endif - totalbytes += readbytes; - f->offset += readbytes; - } + #ifdef __OS2_VDD__ + readbytes = VDHRead((HFILE)f->handle, buf, bytes); + #else + DosRead((HFILE)f->handle, buf, bytes, &readbytes); + #endif + totalbytes += readbytes; + f->offset += readbytes; + } return totalbytes / size; } @@ -166,7 +166,7 @@ /* Flush anything already in the buffer */ if (!f->writemode) - return 0; + return 0; fflush(f); bytes = size * n; #ifdef __OS2_VDD__ @@ -177,7 +177,7 @@ totalbytes += writtenbytes; f->offset += writtenbytes; if (f->offset > f->filesize) - f->filesize = f->offset; + f->filesize = f->offset; return totalbytes / size; } @@ -192,16 +192,16 @@ /* First copy any data already written into our buffer */ if (f->writemode && (bytes = (f->curp - f->startp)) > 0) { - #ifdef __OS2_VDD__ - bytes = VDHWrite((HFILE)f->handle, f->startp, bytes); - #else - DosWrite((HFILE)f->handle, f->startp, bytes, &bytes); - #endif - f->offset += bytes; - if (f->offset > f->filesize) - f->filesize = f->offset; - f->startp = f->curp = f->buf; - } + #ifdef __OS2_VDD__ + bytes = VDHWrite((HFILE)f->handle, f->startp, bytes); + #else + DosWrite((HFILE)f->handle, f->startp, bytes, &bytes); + #endif + f->offset += bytes; + if (f->offset > f->filesize) + f->filesize = f->offset; + f->startp = f->curp = f->buf; + } return 0; } @@ -217,11 +217,11 @@ fflush(f); if (whence == 0) - f->offset = offset; + f->offset = offset; else if (whence == 1) - f->offset += offset; + f->offset += offset; else if (whence == 2) - f->offset = f->filesize + offset; + f->offset = f->filesize + offset; #ifdef __OS2_VDD__ VDHSeek((HFILE)f->handle, f->offset, VDHSK_ABSOLUTE); @@ -267,23 +267,23 @@ int c; if (f->unputc != EOF) { - c = f->unputc; - f->unputc = EOF; - } + c = f->unputc; + f->unputc = EOF; + } else { - if (f->startp == f->curp) { - int bytes = fread(f->buf,1,sizeof(f->buf),f); - if (bytes == 0) - return EOF; - f->curp = f->startp + bytes; - } - c = *f->startp++; - if (f->text && c == '\r') { - int nc = __getc(f); - if (nc != '\n') - f->unputc = nc; - } - } + if (f->startp == f->curp) { + int bytes = fread(f->buf,1,sizeof(f->buf),f); + if (bytes == 0) + return EOF; + f->curp = f->startp + bytes; + } + c = *f->startp++; + if (f->text && c == '\r') { + int nc = __getc(f); + if (nc != '\n') + f->unputc = nc; + } + } return c; } @@ -296,11 +296,11 @@ { int count = 1; if (f->text && c == '\n') { - __putc('\r',f); - count = 2; - } + __putc('\r',f); + count = 2; + } if (f->curp == f->endp) - fflush(f); + fflush(f); *f->curp++ = c; return count; } @@ -319,12 +319,12 @@ cs = s; while (--n > 0 && (c = __getc(f)) != EOF) { - *cs++ = c; - if (c == '\n') - break; - } + *cs++ = c; + if (c == '\n') + break; + } if (c == EOF && cs == s) - return NULL; + return NULL; *cs = '\0'; return s; } @@ -341,7 +341,7 @@ int c; while ((c = *s++) != 0) - r = __putc(c, f); + r = __putc(c, f); return r; } diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c index 32177f8..6688bab 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/vdd/pm.c @@ -44,7 +44,7 @@ #define MAX_MEMORY_SHARED 100 #define MAX_MEMORY_MAPPINGS 100 -// TODO: I think the global and linear members will be the same, but not sure yet. +/* TODO: I think the global and linear members will be the same, but not sure yet. */ typedef struct { void *linear; ulong global; @@ -90,18 +90,18 @@ { MTRR_init(); - // Initialize VDD-specific data - // Note: PM_init must be (obviously) called in VDM task context! + /* Initialize VDD-specific data */ + /* Note: PM_init must be (obviously) called in VDM task context! */ VDHCreateSem(&hevFarCallRet, VDH_EVENTSEM); VDHCreateSem(&hevIRet, VDH_EVENTSEM); hhookUserReturnHook = VDHAllocHook(VDH_RETURN_HOOK, (PFNARM)UserReturnHook, 0); hhookUserIRetHook = VDHAllocHook(VDH_RETURN_HOOK, (PFNARM)UserIRetHook, 0); if ((hevIRet == NULL) || (hevFarCallRet == NULL) || - (hhookUserReturnHook == NULL) || (hhookUserIRetHook == NULL)) { - // something failed, we can't go on - // TODO: take some action here! - } + (hhookUserReturnHook == NULL) || (hhookUserIRetHook == NULL)) { + /* something failed, we can't go on */ + /* TODO: take some action here! */ + } } /* Do some cleaning up */ @@ -109,17 +109,17 @@ { /* Note: Hooks allocated during or after VDM creation are deallocated automatically */ if (hevIRet != NULL) - VDHDestroySem(hevIRet); + VDHDestroySem(hevIRet); if (hevFarCallRet != NULL) - VDHDestroySem(hevFarCallRet); + VDHDestroySem(hevFarCallRet); } ibool PMAPI PM_haveBIOSAccess(void) { return _PM_haveBIOS; } long PMAPI PM_getOSType(void) -{ return /*_OS_OS2VDD*/ _OS_OS2; } //FIX!! +{ return /*_OS_OS2VDD*/ _OS_OS2; } /*FIX!! */ int PMAPI PM_getModeType(void) { return PM_386; } @@ -128,9 +128,9 @@ { uint pos = strlen(s); if (s[pos-1] != '\\') { - s[pos] = '\\'; - s[pos+1] = '\0'; - } + s[pos] = '\\'; + s[pos+1] = '\0'; + } } void PMAPI PM_setFatalErrorCleanup( @@ -142,8 +142,8 @@ void PMAPI PM_fatalError(const char *msg) { if (fatalErrorCleanup) - fatalErrorCleanup(); -// Fatal_Error_Handler(msg,0); TODO: implement somehow! + fatalErrorCleanup(); +/* Fatal_Error_Handler(msg,0); TODO: implement somehow! */ } /**************************************************************************** @@ -162,11 +162,11 @@ uint *roff) { if (_PM_rmBufAddr) { - *len = 0; //VESA_BUF_SIZE; - *rseg = (ulong)(_PM_rmBufAddr) >> 4; - *roff = (ulong)(_PM_rmBufAddr) & 0xF; - return _PM_rmBufAddr; - } + *len = 0; /*VESA_BUF_SIZE; */ + *rseg = (ulong)(_PM_rmBufAddr) >> 4; + *roff = (ulong)(_PM_rmBufAddr) & 0xF; + return _PM_rmBufAddr; + } return NULL; } @@ -200,12 +200,12 @@ const char * PMAPI PM_getNucleusPath(void) { - static char path[CCHMAXPATH]; - strcpy(path,"x:\\os2\\drivers"); - path[0] = PM_getBootDrive(); - PM_backslash(path); - strcat(path,"nucleus"); - return path; + static char path[CCHMAXPATH]; + strcpy(path,"x:\\os2\\drivers"); + path[0] = PM_getBootDrive(); + PM_backslash(path); + strcat(path,"nucleus"); + return path; } const char * PMAPI PM_getNucleusConfigPath(void) @@ -292,15 +292,15 @@ /* First find a free slot in our shared memory table */ for (i = 0; i < MAX_MEMORY_SHARED; i++) { - if (shared[i].linear == 0) - break; - } + if (shared[i].linear == 0) + break; + } if (i < MAX_MEMORY_SHARED) { - shared[i].linear = VDHAllocPages(NULL, nPages, VDHAP_SYSTEM | VDHAP_FIXED); - shared[i].npages = nPages; - shared[i].global = (ULONG)shared[i].linear; - return (void*)shared[i].global; - } + shared[i].linear = VDHAllocPages(NULL, nPages, VDHAP_SYSTEM | VDHAP_FIXED); + shared[i].npages = nPages; + shared[i].global = (ULONG)shared[i].linear; + return (void*)shared[i].global; + } return NULL; } @@ -314,12 +314,12 @@ /* Find a shared memory block in our table and free it */ for (i = 0; i < MAX_MEMORY_SHARED; i++) { - if (shared[i].global == (ulong)p) { - VDHFreePages(shared[i].linear); - shared[i].linear = 0; - break; - } - } + if (shared[i].global == (ulong)p) { + VDHFreePages(shared[i].linear); + shared[i].linear = 0; + break; + } + } } void * PMAPI PM_mapToProcess(void *base,ulong limit) @@ -331,7 +331,7 @@ void *mappedBIOS, ulong BIOSLen) { - // TODO: Figure out how to do this + /* TODO: Figure out how to do this */ return false; } @@ -364,18 +364,18 @@ *npages = (length + (base & 0xFFF) + 4095) >> 12; flags = PR_FIXED | PR_STATIC; if (base == 0xA0000) { - /* We require the linear address to be aligned to a 64Kb boundary - * for mapping the banked framebuffer (so we can do efficient - * carry checking for bank changes in the assembler code). The only - * way to ensure this is to force the linear address to be aligned - * to a 4Mb boundary. - */ - flags |= PR_4MEG; - } + /* We require the linear address to be aligned to a 64Kb boundary + * for mapping the banked framebuffer (so we can do efficient + * carry checking for bank changes in the assembler code). The only + * way to ensure this is to force the linear address to be aligned + * to a 4Mb boundary. + */ + flags |= PR_4MEG; + } if ((linear = (ulong)PageReserve(PR_SYSTEM,*npages,flags)) == (ulong)-1) - return 0; + return 0; if (!PageCommitPhys(linear >> 12,*npages,ppage,PC_INCR | PC_USER | PC_WRITEABLE)) - return 0; + return 0; #endif return linear + (base & 0xFFF); } @@ -397,9 +397,9 @@ sticky paws. NOTE: If the memory is not expected to be cached, this function will - directly re-program the PCD (Page Cache Disable) bit in the - page tables. There does not appear to be a mechanism in the VMM - to control this bit via the regular interface. + directly re-program the PCD (Page Cache Disable) bit in the + page tables. There does not appear to be a mechanism in the VMM + to control this bit via the regular interface. ****************************************************************************/ void * PMAPI PM_mapPhysicalAddr( ulong base, @@ -414,11 +414,11 @@ * a region of memory that will serve this purpose. */ for (i = 0; i < numMappings; i++) { - if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached) - return (void*)maps[i].linear; - } + if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached) + return (void*)maps[i].linear; + } if (numMappings == MAX_MEMORY_MAPPINGS) - return NULL; + return NULL; /* We did not find any previously mapped memory region, so map it in. * Note that we do not use MapPhysToLinear, since this function appears @@ -426,7 +426,7 @@ * Hence we use PageReserve and PageCommitPhys. */ if ((linear = MapPhysicalToLinear(base,limit,&npages)) == 0) - return NULL; + return NULL; maps[numMappings].physical = base; maps[numMappings].length = length; maps[numMappings].linear = linear; @@ -437,33 +437,33 @@ #if 0 /* Finally disable caching where necessary */ if (!isCached && (PDB = _PM_getPDB()) != 0) { - int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage; - ulong pageTable,*pPageTable; + int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage; + ulong pageTable,*pPageTable; - if (PDB >= 0x100000) - pPDB = (ulong*)MapPhysicalToLinear(PDB,0xFFF,&npages); - else - pPDB = (ulong*)PDB; - if (pPDB) { - startPDB = (linear >> 22) & 0x3FF; - startPage = (linear >> 12) & 0x3FF; - endPDB = ((linear+limit) >> 22) & 0x3FF; - endPage = ((linear+limit) >> 12) & 0x3FF; - for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { - pageTable = pPDB[iPDB] & ~0xFFF; - if (pageTable >= 0x100000) - pPageTable = (ulong*)MapPhysicalToLinear(pageTable,0xFFF,&npages); - else - pPageTable = (ulong*)pageTable; - start = (iPDB == startPDB) ? startPage : 0; - end = (iPDB == endPDB) ? endPage : 0x3FF; - for (iPage = start; iPage <= end; iPage++) - pPageTable[iPage] |= 0x10; - PageFree((ulong)pPageTable,PR_STATIC); - } - PageFree((ulong)pPDB,PR_STATIC); - } - } + if (PDB >= 0x100000) + pPDB = (ulong*)MapPhysicalToLinear(PDB,0xFFF,&npages); + else + pPDB = (ulong*)PDB; + if (pPDB) { + startPDB = (linear >> 22) & 0x3FF; + startPage = (linear >> 12) & 0x3FF; + endPDB = ((linear+limit) >> 22) & 0x3FF; + endPage = ((linear+limit) >> 12) & 0x3FF; + for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { + pageTable = pPDB[iPDB] & ~0xFFF; + if (pageTable >= 0x100000) + pPageTable = (ulong*)MapPhysicalToLinear(pageTable,0xFFF,&npages); + else + pPageTable = (ulong*)pageTable; + start = (iPDB == startPDB) ? startPage : 0; + end = (iPDB == endPDB) ? endPage : 0x3FF; + for (iPage = start; iPage <= end; iPage++) + pPageTable[iPage] |= 0x10; + PageFree((ulong)pPageTable,PR_STATIC); + } + PageFree((ulong)pPDB,PR_STATIC); + } + } #endif return (void*)linear; } @@ -480,39 +480,39 @@ int PMAPI PM_getCOMPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + } return 0; } int PMAPI PM_getLPTPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } ulong PMAPI PM_getPhysicalAddr(void *p) { - // TODO: This function should find the physical address of a linear - // address. - return 0xFFFFFFFFUL; + /* TODO: This function should find the physical address of a linear */ + /* address. */ + return 0xFFFFFFFFUL; } void PMAPI _PM_freeMemoryMappings(void) { int i; -// for (i = 0; i < numMappings; i++) -// PageFree(maps[i].linear,PR_STATIC); +/* for (i = 0; i < numMappings; i++) */ +/* PageFree(maps[i].linear,PR_STATIC); */ } void * PMAPI PM_mapRealPointer(uint r_seg,uint r_off) @@ -539,16 +539,16 @@ RMREGS *in, RMSREGS *sregs) { - PCRF pcrf; // current client register frame + PCRF pcrf; /* current client register frame */ - // get pointer to registers + /* get pointer to registers */ pcrf = (PCRF)VDHQuerySysValue(CURRENT_VDM, VDHLSV_PCRF); - // Note: We could do VDHPushRegs instead but this should be safer as it - // doesn't rely on the VDM session having enough free stack space. - *saveRegs = *pcrf; // save all registers + /* Note: We could do VDHPushRegs instead but this should be safer as it */ + /* doesn't rely on the VDM session having enough free stack space. */ + *saveRegs = *pcrf; /* save all registers */ - pcrf->crf_eax = in->e.eax; // load new values + pcrf->crf_eax = in->e.eax; /* load new values */ pcrf->crf_ebx = in->e.ebx; pcrf->crf_ecx = in->e.ecx; pcrf->crf_edx = in->e.edx; @@ -568,12 +568,12 @@ RMREGS *out, RMSREGS *sregs) { - PCRF pcrf; // current client register frame + PCRF pcrf; /* current client register frame */ - // get pointer to registers + /* get pointer to registers */ pcrf = (PCRF)VDHQuerySysValue(CURRENT_VDM, VDHLSV_PCRF); - // read new register values + /* read new register values */ out->e.eax = pcrf->crf_eax; out->e.ebx = pcrf->crf_ebx; out->e.ecx = pcrf->crf_ecx; @@ -583,7 +583,7 @@ sregs->es = pcrf->crf_es; sregs->ds = pcrf->crf_ds; - // restore original client registers + /* restore original client registers */ *pcrf = *saveRegs; } @@ -626,18 +626,18 @@ TRACE("SDDHELP: Entering PM_callRealMode()\n"); LoadV86Registers(SSToDS(&saveRegs),regs,sregs); - // set up return hook for call + /* set up return hook for call */ rc = VDHArmReturnHook(hhookUserReturnHook, VDHARH_CSEIP_HOOK); VDHResetEventSem(hevFarCallRet); - // the address is a 16:32 pointer + /* the address is a 16:32 pointer */ OFFSETOF32(fnAddress) = off; SEGMENTOF32(fnAddress) = seg; rc = VDHPushFarCall(fnAddress); VDHYield(0); - // wait until the V86 call returns - our return hook posts the semaphore + /* wait until the V86 call returns - our return hook posts the semaphore */ rc = VDHWaitEventSem(hevFarCallRet, SEM_INDEFINITE_WAIT); ReadV86Registers(SSToDS(&saveRegs),regs,sregs); @@ -662,13 +662,13 @@ memset(SSToDS(&sregs), 0, sizeof(sregs)); -#if 0 // do we need this?? +#if 0 /* do we need this?? */ /* Disable pass-up to our VDD handler so we directly call BIOS */ TRACE("SDDHELP: Entering PM_int86()\n"); if (disableTSRFlag) { - oldDisable = *disableTSRFlag; - *disableTSRFlag = 0; - } + oldDisable = *disableTSRFlag; + *disableTSRFlag = 0; + } #endif LoadV86Registers(SSToDS(&saveRegs), in, SSToDS(&sregs)); @@ -676,20 +676,20 @@ VDHResetEventSem(hevIRet); rc = VDHPushInt(intno); - // set up return hook for interrupt + /* set up return hook for interrupt */ rc = VDHArmReturnHook(hhookUserIRetHook, VDHARH_NORMAL_IRET); VDHYield(0); - // wait until the V86 IRETs - our return hook posts the semaphore - rc = VDHWaitEventSem(hevIRet, 5000); //SEM_INDEFINITE_WAIT); + /* wait until the V86 IRETs - our return hook posts the semaphore */ + rc = VDHWaitEventSem(hevIRet, 5000); /*SEM_INDEFINITE_WAIT); */ ReadV86Registers(SSToDS(&saveRegs), out, SSToDS(&sregs)); #if 0 /* Re-enable pass-up to our VDD handler if previously enabled */ if (disableTSRFlag) - *disableTSRFlag = oldDisable; + *disableTSRFlag = oldDisable; #endif TRACE("SDDHELP: Exiting PM_int86()\n"); @@ -716,29 +716,29 @@ /* Disable pass-up to our VxD handler so we directly call BIOS */ TRACE("SDDHELP: Entering PM_int86x()\n"); if (disableTSRFlag) { - oldDisable = *disableTSRFlag; - *disableTSRFlag = 0; - } + oldDisable = *disableTSRFlag; + *disableTSRFlag = 0; + } #endif LoadV86Registers(SSToDS(&saveRegs), in, sregs); VDHResetEventSem(hevIRet); rc = VDHPushInt(intno); - // set up return hook for interrupt + /* set up return hook for interrupt */ rc = VDHArmReturnHook(hhookUserIRetHook, VDHARH_NORMAL_IRET); VDHYield(0); - // wait until the V86 IRETs - our return hook posts the semaphore - rc = VDHWaitEventSem(hevIRet, 5000); //SEM_INDEFINITE_WAIT); + /* wait until the V86 IRETs - our return hook posts the semaphore */ + rc = VDHWaitEventSem(hevIRet, 5000); /*SEM_INDEFINITE_WAIT); */ ReadV86Registers(SSToDS(&saveRegs), out, sregs); #if 0 /* Re-enable pass-up to our VxD handler if previously enabled */ if (disableTSRFlag) - *disableTSRFlag = oldDisable; + *disableTSRFlag = oldDisable; #endif TRACE("SDDHELP: Exiting PM_int86x()\n"); @@ -776,7 +776,7 @@ ibool contiguous) { if (p) - VDHFreePages((PVOID)p); + VDHFreePages((PVOID)p); } /**************************************************************************** @@ -787,7 +787,7 @@ { ULONG lockHandle; - // TODO: the lock handle is essential for the unlock operation!! + /* TODO: the lock handle is essential for the unlock operation!! */ lockHandle = VDHLockMem(p, len, 0, (PVOID)VDHLM_NO_ADDR, NULL); if (lockHandle != NULL) @@ -802,8 +802,8 @@ ****************************************************************************/ int PMAPI PM_unlockDataPages(void *p,uint len,PM_lockHandle *lh) { - // TODO: implement - use a table of lock handles? - // VDHUnlockPages(lockHandle); + /* TODO: implement - use a table of lock handles? */ + /* VDHUnlockPages(lockHandle); */ return 0; } @@ -867,9 +867,9 @@ const char *filename, PM_findData *findData) { - // TODO: This function should start a directory enumeration search - // given the filename (with wildcards). The data should be - // converted and returned in the findData standard form. + /* TODO: This function should start a directory enumeration search */ + /* given the filename (with wildcards). The data should be */ + /* converted and returned in the findData standard form. */ (void)filename; (void)findData; return PM_FILE_INVALID; @@ -883,10 +883,10 @@ void *handle, PM_findData *findData) { - // TODO: This function should find the next file in directory enumeration - // search given the search criteria defined in the call to - // PM_findFirstFile. The data should be converted and returned - // in the findData standard form. + /* TODO: This function should find the next file in directory enumeration */ + /* search given the search criteria defined in the call to */ + /* PM_findFirstFile. The data should be converted and returned */ + /* in the findData standard form. */ (void)handle; (void)findData; return false; @@ -899,8 +899,8 @@ void PMAPI PM_findClose( void *handle) { - // TODO: This function should close the find process. This may do - // nothing for some OS'es. + /* TODO: This function should close the find process. This may do */ + /* nothing for some OS'es. */ (void)handle; } @@ -920,7 +920,7 @@ ibool PMAPI PM_driveValid( char drive) { - // Not applicable in a VDD + /* Not applicable in a VDD */ (void)drive; return false; } @@ -936,7 +936,7 @@ char *dir, int len) { - // Not applicable in a VDD + /* Not applicable in a VDD */ (void)drive; (void)dir; (void)len; @@ -970,7 +970,7 @@ const char *filename, uint attrib) { - // TODO: Implement this ? + /* TODO: Implement this ? */ (void)filename; (void)attrib; PM_fatalError("PM_setFileAttr not implemented!"); @@ -983,7 +983,7 @@ uint PMAPI PM_getFileAttr( const char *filename) { - // TODO: Implement this ? + /* TODO: Implement this ? */ (void)filename; PM_fatalError("PM_getFileAttr not implemented!"); return 0; @@ -996,7 +996,7 @@ ibool PMAPI PM_mkdir( const char *filename) { - // TODO: Implement this ? + /* TODO: Implement this ? */ (void)filename; PM_fatalError("PM_mkdir not implemented!"); return false; @@ -1009,7 +1009,7 @@ ibool PMAPI PM_rmdir( const char *filename) { - // TODO: Implement this ? + /* TODO: Implement this ? */ (void)filename; PM_fatalError("PM_rmdir not implemented!"); return false; @@ -1024,7 +1024,7 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this ? + /* TODO: Implement this ? */ (void)filename; (void)gmTime; (void)time; @@ -1041,7 +1041,7 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this ? + /* TODO: Implement this ? */ (void)filename; (void)gmTime; (void)time; diff --git a/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c b/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c index 10c63e3..2163928 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c +++ b/board/MAI/bios_emulator/scitech/src/pm/vdd/vflat.c @@ -32,12 +32,12 @@ ibool PMAPI VF_available(void) { - return false; + return false; } void * PMAPI VF_init(ulong baseAddr,int bankSize,int codeLen,void *bankFunc) { - return NULL; + return NULL; } void PMAPI VF_exit(void) diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c index e2ff585..3c6ce99 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c +++ b/board/MAI/bios_emulator/scitech/src/pm/vxd/fileio.c @@ -47,62 +47,62 @@ long oldpos; if (f) { - f->offset = 0; - f->text = (mode[1] == 't' || mode[2] == 't'); - f->writemode = (mode[0] == 'w') || (mode[0] == 'a'); - if (initComplete) { - WORD omode,error; - BYTE action; + f->offset = 0; + f->text = (mode[1] == 't' || mode[2] == 't'); + f->writemode = (mode[0] == 'w') || (mode[0] == 'a'); + if (initComplete) { + WORD omode,error; + BYTE action; - if (mode[0] == 'r') { - omode = OPEN_ACCESS_READONLY | OPEN_SHARE_COMPATIBLE; - action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_FAIL; - } - else if (mode[0] == 'w') { - omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_COMPATIBLE; - action = ACTION_IFEXISTS_TRUNCATE | ACTION_IFNOTEXISTS_CREATE; - } - else { - omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_COMPATIBLE; - action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_CREATE; - } - f->handle = (int)R0_OpenCreateFile(false,(char*)filename,omode,ATTR_NORMAL,action,0,&error,&action); - if (f->handle == 0) { - PM_free(f); - return NULL; - } - f->filesize = R0_GetFileSize((HANDLE)f->handle,&error); - if (mode[0] == 'a') - fseek(f,0,2); - } - else { - int oflag,pmode; + if (mode[0] == 'r') { + omode = OPEN_ACCESS_READONLY | OPEN_SHARE_COMPATIBLE; + action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_FAIL; + } + else if (mode[0] == 'w') { + omode = OPEN_ACCESS_WRITEONLY | OPEN_SHARE_COMPATIBLE; + action = ACTION_IFEXISTS_TRUNCATE | ACTION_IFNOTEXISTS_CREATE; + } + else { + omode = OPEN_ACCESS_READWRITE | OPEN_SHARE_COMPATIBLE; + action = ACTION_IFEXISTS_OPEN | ACTION_IFNOTEXISTS_CREATE; + } + f->handle = (int)R0_OpenCreateFile(false,(char*)filename,omode,ATTR_NORMAL,action,0,&error,&action); + if (f->handle == 0) { + PM_free(f); + return NULL; + } + f->filesize = R0_GetFileSize((HANDLE)f->handle,&error); + if (mode[0] == 'a') + fseek(f,0,2); + } + else { + int oflag,pmode; - if (mode[0] == 'r') { - pmode = _S_IREAD; - oflag = _O_RDONLY; - } - else if (mode[0] == 'w') { - pmode = _S_IWRITE; - oflag = _O_WRONLY | _O_CREAT | _O_TRUNC; - } - else { - pmode = _S_IWRITE; - oflag = _O_RDWR | _O_CREAT | _O_APPEND; - } - if (f->text) - oflag |= _O_TEXT; - else - oflag |= _O_BINARY; - if ((f->handle = i_open(filename,oflag,pmode)) == -1) { - PM_free(f); - return NULL; - } - oldpos = i_lseek(f->handle,0,1); - f->filesize = i_lseek(f->handle,0,2); - i_lseek(f->handle,oldpos,0); - } - } + if (mode[0] == 'r') { + pmode = _S_IREAD; + oflag = _O_RDONLY; + } + else if (mode[0] == 'w') { + pmode = _S_IWRITE; + oflag = _O_WRONLY | _O_CREAT | _O_TRUNC; + } + else { + pmode = _S_IWRITE; + oflag = _O_RDWR | _O_CREAT | _O_APPEND; + } + if (f->text) + oflag |= _O_TEXT; + else + oflag |= _O_BINARY; + if ((f->handle = i_open(filename,oflag,pmode)) == -1) { + PM_free(f); + return NULL; + } + oldpos = i_lseek(f->handle,0,1); + f->filesize = i_lseek(f->handle,0,2); + i_lseek(f->handle,oldpos,0); + } + } return f; } @@ -125,27 +125,27 @@ int readbytes,totalbytes = 0; while (bytes > 0x10000) { - if (initComplete) { - readbytes = R0_ReadFile(false,(HANDLE)f->handle,buf,0x8000,f->offset,&error); - readbytes += R0_ReadFile(false,(HANDLE)f->handle,buf+0x8000,0x8000,f->offset+0x8000,&error); - } - else { - readbytes = i_read(f->handle,buf,0x8000); - readbytes += i_read(f->handle,buf+0x8000,0x8000); - } - totalbytes += readbytes; - f->offset += readbytes; - buf += 0x10000; - bytes -= 0x10000; - } + if (initComplete) { + readbytes = R0_ReadFile(false,(HANDLE)f->handle,buf,0x8000,f->offset,&error); + readbytes += R0_ReadFile(false,(HANDLE)f->handle,buf+0x8000,0x8000,f->offset+0x8000,&error); + } + else { + readbytes = i_read(f->handle,buf,0x8000); + readbytes += i_read(f->handle,buf+0x8000,0x8000); + } + totalbytes += readbytes; + f->offset += readbytes; + buf += 0x10000; + bytes -= 0x10000; + } if (bytes) { - if (initComplete) - readbytes = R0_ReadFile(false,(HANDLE)f->handle,buf,bytes,f->offset,&error); - else - readbytes = i_read(f->handle,buf,bytes); - totalbytes += readbytes; - f->offset += readbytes; - } + if (initComplete) + readbytes = R0_ReadFile(false,(HANDLE)f->handle,buf,bytes,f->offset,&error); + else + readbytes = i_read(f->handle,buf,bytes); + totalbytes += readbytes; + f->offset += readbytes; + } return totalbytes / size; } @@ -168,29 +168,29 @@ int writtenbytes,totalbytes = 0; if (!f->writemode) - return 0; + return 0; while (bytes > 0x10000) { - if (initComplete) { - writtenbytes = R0_WriteFile(false,(HANDLE)f->handle,buf,0x8000,f->offset,&error); - writtenbytes += R0_WriteFile(false,(HANDLE)f->handle,buf+0x8000,0x8000,f->offset+0x8000,&error); - } - else { - writtenbytes = i_write(f->handle,buf,0x8000); - writtenbytes += i_write(f->handle,buf+0x8000,0x8000); - } - totalbytes += writtenbytes; - f->offset += writtenbytes; - buf += 0x10000; - bytes -= 0x10000; - } + if (initComplete) { + writtenbytes = R0_WriteFile(false,(HANDLE)f->handle,buf,0x8000,f->offset,&error); + writtenbytes += R0_WriteFile(false,(HANDLE)f->handle,buf+0x8000,0x8000,f->offset+0x8000,&error); + } + else { + writtenbytes = i_write(f->handle,buf,0x8000); + writtenbytes += i_write(f->handle,buf+0x8000,0x8000); + } + totalbytes += writtenbytes; + f->offset += writtenbytes; + buf += 0x10000; + bytes -= 0x10000; + } if (initComplete) - writtenbytes = R0_WriteFile(false,(HANDLE)f->handle,buf,bytes,f->offset,&error); + writtenbytes = R0_WriteFile(false,(HANDLE)f->handle,buf,bytes,f->offset,&error); else - writtenbytes = i_write(f->handle,buf,bytes); + writtenbytes = i_write(f->handle,buf,bytes); totalbytes += writtenbytes; f->offset += writtenbytes; if (f->offset > f->filesize) - f->filesize = f->offset; + f->filesize = f->offset; return totalbytes / size; } @@ -201,7 +201,7 @@ int fflush( FILE *f) { - // Nothing to do since we are not doing buffered file I/O + /* Nothing to do since we are not doing buffered file I/O */ (void)f; return 0; } @@ -216,13 +216,13 @@ int whence) { if (whence == 0) - f->offset = offset; + f->offset = offset; else if (whence == 1) - f->offset += offset; + f->offset += offset; else if (whence == 2) - f->offset = f->filesize + offset; + f->offset = f->filesize + offset; if (!initComplete) - i_lseek(f->handle,f->offset,0); + i_lseek(f->handle,f->offset,0); return 0; } @@ -258,19 +258,19 @@ int len; char *cs; - // Read the entire buffer into memory (our functions are unbuffered!) + /* Read the entire buffer into memory (our functions are unbuffered!) */ if ((len = fread(s,1,n,f)) == 0) - return NULL; + return NULL; - // Search for '\n' or end of string + /* Search for '\n' or end of string */ if (n > len) - n = len; + n = len; cs = s; while (--n > 0) { - if (*cs == '\n') - break; - cs++; - } + if (*cs == '\n') + break; + cs++; + } *cs = '\0'; return s; } @@ -296,10 +296,9 @@ WORD error; if (initComplete) - R0_CloseFile((HANDLE)f->handle,&error); + R0_CloseFile((HANDLE)f->handle,&error); else - i_close(f->handle); + i_close(f->handle); PM_free(f); return 0; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c b/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c index 8d00df9..4cb7f19 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/vxd/pm.c @@ -105,7 +105,7 @@ { void *p = PM_mallocShared(nelem * size); if (p) - memset(p,0,nelem * size); + memset(p,0,nelem * size); return p; } @@ -119,9 +119,9 @@ { void *p = PM_mallocShared(size); if (p) { - memcpy(p,ptr,size); - PM_freeShared(ptr); - } + memcpy(p,ptr,size); + PM_freeShared(ptr); + } return p; } @@ -166,9 +166,9 @@ { uint pos = strlen(s); if (s[pos-1] != '\\') { - s[pos] = '\\'; - s[pos+1] = '\0'; - } + s[pos] = '\\'; + s[pos+1] = '\0'; + } } void PMAPI PM_setFatalErrorCleanup( @@ -180,7 +180,7 @@ void PMAPI PM_fatalError(const char *msg) { if (fatalErrorCleanup) - fatalErrorCleanup(); + fatalErrorCleanup(); Fatal_Error_Handler(msg,0); } @@ -204,11 +204,11 @@ * transfer buffer to return, so we fail the call. */ if (_PM_rmBufAddr) { - *len = VESA_BUF_SIZE; - *rseg = (ulong)(_PM_rmBufAddr) >> 4; - *roff = (ulong)(_PM_rmBufAddr) & 0xF; - return _PM_rmBufAddr; - } + *len = VESA_BUF_SIZE; + *rseg = (ulong)(_PM_rmBufAddr) >> 4; + *roff = (ulong)(_PM_rmBufAddr) & 0xF; + return _PM_rmBufAddr; + } return NULL; } @@ -276,10 +276,10 @@ memset(value,0,sizeof(value)); if (RegOpenKey(HKEY_LOCAL_MACHINE,szKey,&hKey) == ERROR_SUCCESS) { - if (RegQueryValueEx(hKey,(PCHAR)szValue,(ulong*)NULL,(ulong*)&type,value,(ulong*)&size) == ERROR_SUCCESS) - status = true; - RegCloseKey(hKey); - } + if (RegQueryValueEx(hKey,(PCHAR)szValue,(ulong*)NULL,(ulong*)&type,value,(ulong*)&size) == ERROR_SUCCESS) + status = true; + RegCloseKey(hKey); + } return status; } @@ -288,12 +288,12 @@ static char path[256]; if (strlen(_PM_nucleusPath) > 0) { - strcpy(path,_PM_nucleusPath); - PM_backslash(path); - return path; - } + strcpy(path,_PM_nucleusPath); + PM_backslash(path); + return path; + } if (!REG_queryString(szWindowsKey,szSystemRoot,path,sizeof(path))) - strcpy(path,"c:\\windows"); + strcpy(path,"c:\\windows"); PM_backslash(path); strcat(path,"system\\nucleus"); return path; @@ -315,7 +315,7 @@ { static char name[256]; if (REG_queryString(szMachineNameKey,szMachineName,name,sizeof(name))) - return name; + return name; return "Unknown"; } @@ -352,7 +352,7 @@ void PMAPI PM_setSuspendAppCallback( int (_ASMAPIP saveState)( - int flags)) + int flags)) { /* Unused in VxDs */ } @@ -405,16 +405,16 @@ /* First find a free slot in our shared memory table */ for (i = 0; i < MAX_MEMORY_SHARED; i++) { - if (shared[i].linear == 0) - break; - } + if (shared[i].linear == 0) + break; + } if (i < MAX_MEMORY_SHARED) { - PageAllocate(nPages,PG_SYS,0,0,0,0,NULL,0,&hMem,&shared[i].linear); - shared[i].npages = nPages; - pgNum = (ulong)shared[i].linear >> 12; - shared[i].global = LinPageLock(pgNum,nPages,PAGEMAPGLOBAL); - return (void*)shared[i].global; - } + PageAllocate(nPages,PG_SYS,0,0,0,0,NULL,0,&hMem,&shared[i].linear); + shared[i].npages = nPages; + pgNum = (ulong)shared[i].linear >> 12; + shared[i].global = LinPageLock(pgNum,nPages,PAGEMAPGLOBAL); + return (void*)shared[i].global; + } return NULL; } @@ -428,13 +428,13 @@ /* Find a shared memory block in our table and free it */ for (i = 0; i < MAX_MEMORY_SHARED; i++) { - if (shared[i].global == (ulong)p) { - LinPageUnLock(shared[i].global >> 12,shared[i].npages,PAGEMAPGLOBAL); - PageFree((ulong)shared[i].linear,0); - shared[i].linear = 0; - break; - } - } + if (shared[i].global == (ulong)p) { + LinPageUnLock(shared[i].global >> 12,shared[i].npages,PAGEMAPGLOBAL); + PageFree((ulong)shared[i].linear,0); + shared[i].linear = 0; + break; + } + } } /**************************************************************************** @@ -455,7 +455,7 @@ void *mappedBIOS, ulong BIOSLen) { - // TODO: Figure out how to do this + /* TODO: Figure out how to do this */ return false; } @@ -485,29 +485,29 @@ int i,ppage,flags; if (base < 0x100000) { - /* Windows 9x is zero based for the first meg of memory */ - return base; - } + /* Windows 9x is zero based for the first meg of memory */ + return base; + } ppage = base >> 12; *npages = (length + (base & 0xFFF) + 4095) >> 12; flags = PR_FIXED | PR_STATIC; if (base == 0xA0000) { - /* We require the linear address to be aligned to a 64Kb boundary - * for mapping the banked framebuffer (so we can do efficient - * carry checking for bank changes in the assembler code). The only - * way to ensure this is to force the linear address to be aligned - * to a 4Mb boundary. - */ - flags |= PR_4MEG; - } + /* We require the linear address to be aligned to a 64Kb boundary + * for mapping the banked framebuffer (so we can do efficient + * carry checking for bank changes in the assembler code). The only + * way to ensure this is to force the linear address to be aligned + * to a 4Mb boundary. + */ + flags |= PR_4MEG; + } if ((linear = (ulong)PageReserve(PR_SYSTEM,*npages,flags)) == (ulong)-1) - return 0xFFFFFFFF; + return 0xFFFFFFFF; if (!PageCommitPhys(linear >> 12,*npages,ppage,PC_INCR | PC_USER | PC_WRITEABLE)) - return 0xFFFFFFFF; + return 0xFFFFFFFF; return linear + (base & 0xFFF); } -// Page table flags +/* Page table flags */ #define PAGE_FLAGS_PRESENT 0x00000001 #define PAGE_FLAGS_WRITEABLE 0x00000002 @@ -535,9 +535,9 @@ sticky paws. NOTE: If the memory is not expected to be cached, this function will - directly re-program the PCD (Page Cache Disable) bit in the - page tables. There does not appear to be a mechanism in the VMM - to control this bit via the regular interface. + directly re-program the PCD (Page Cache Disable) bit in the + page tables. There does not appear to be a mechanism in the VMM + to control this bit via the regular interface. ****************************************************************************/ void * PMAPI PM_mapPhysicalAddr( ulong base, @@ -552,11 +552,11 @@ * a region of memory that will serve this purpose. */ for (i = 0; i < numMappings; i++) { - if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached) - return (void*)maps[i].linear; - } + if (maps[i].physical == base && maps[i].length == length && maps[i].isCached == isCached) + return (void*)maps[i].linear; + } if (numMappings == MAX_MEMORY_MAPPINGS) - return NULL; + return NULL; /* We did not find any previously mapped memory region, so maps it in. * Note that we do not use MapPhysToLinear, since this function appears @@ -564,7 +564,7 @@ * Hence we use PageReserve and PageCommitPhys. */ if ((linear = _PM_mapPhysicalToLinear(base,limit,&npages)) == 0xFFFFFFFF) - return NULL; + return NULL; maps[numMappings].physical = base; maps[numMappings].length = length; maps[numMappings].linear = linear; @@ -574,34 +574,34 @@ /* Finally disable caching where necessary */ if (!isCached && (PDB = _PM_getPDB()) != 0) { - int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage; - ulong pageTable,*pPageTable; - pPDB = (ulong*)_PM_mapPhysicalToLinear(PDB,0xFFF,&npages); - if (pPDB) { - startPDB = (linear >> 22) & 0x3FF; - startPage = (linear >> 12) & 0x3FF; - endPDB = ((linear+limit) >> 22) & 0x3FF; - endPage = ((linear+limit) >> 12) & 0x3FF; - for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { - // Set the bits in the page directory entry - required as per - // Pentium 4 manual. This also takes care of the 4MB page entries - pPDB[iPDB] = pPDB[iPDB] |= (PAGE_FLAGS_WRITE_THROUGH | PAGE_FLAGS_CACHE_DISABLE); - if (!(pPDB[iPDB] & PAGE_FLAGS_4MB)) { - // If we are dealing with 4KB pages then we need to iterate - // through each of the page table entries - pageTable = pPDB[iPDB] & ~0xFFF; - pPageTable = (ulong*)_PM_mapPhysicalToLinear(pageTable,0xFFF,&npages); - start = (iPDB == startPDB) ? startPage : 0; - end = (iPDB == endPDB) ? endPage : 0x3FF; - for (iPage = start; iPage <= end; iPage++) - pPageTable[iPage] |= (PAGE_FLAGS_WRITE_THROUGH | PAGE_FLAGS_CACHE_DISABLE); - PageFree((ulong)pPageTable,PR_STATIC); - } - } - PageFree((ulong)pPDB,PR_STATIC); - PM_flushTLB(); - } - } + int startPDB,endPDB,iPDB,startPage,endPage,start,end,iPage; + ulong pageTable,*pPageTable; + pPDB = (ulong*)_PM_mapPhysicalToLinear(PDB,0xFFF,&npages); + if (pPDB) { + startPDB = (linear >> 22) & 0x3FF; + startPage = (linear >> 12) & 0x3FF; + endPDB = ((linear+limit) >> 22) & 0x3FF; + endPage = ((linear+limit) >> 12) & 0x3FF; + for (iPDB = startPDB; iPDB <= endPDB; iPDB++) { + /* Set the bits in the page directory entry - required as per */ + /* Pentium 4 manual. This also takes care of the 4MB page entries */ + pPDB[iPDB] = pPDB[iPDB] |= (PAGE_FLAGS_WRITE_THROUGH | PAGE_FLAGS_CACHE_DISABLE); + if (!(pPDB[iPDB] & PAGE_FLAGS_4MB)) { + /* If we are dealing with 4KB pages then we need to iterate */ + /* through each of the page table entries */ + pageTable = pPDB[iPDB] & ~0xFFF; + pPageTable = (ulong*)_PM_mapPhysicalToLinear(pageTable,0xFFF,&npages); + start = (iPDB == startPDB) ? startPage : 0; + end = (iPDB == endPDB) ? endPage : 0x3FF; + for (iPage = start; iPage <= end; iPage++) + pPageTable[iPage] |= (PAGE_FLAGS_WRITE_THROUGH | PAGE_FLAGS_CACHE_DISABLE); + PageFree((ulong)pPageTable,PR_STATIC); + } + } + PageFree((ulong)pPDB,PR_STATIC); + PM_flushTLB(); + } + } return (void*)linear; } @@ -619,26 +619,26 @@ int PMAPI PM_getCOMPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - case 2: return 0x3E8; - case 3: return 0x2E8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + case 2: return 0x3E8; + case 3: return 0x2E8; + } return 0; } int PMAPI PM_getLPTPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -647,18 +647,18 @@ { DWORD pte; - // Touch the memory before calling CopyPageTable. For some reason - // we need to do this on Windows 9x, otherwise the memory may not - // be paged in correctly. Of course if the passed in pointer is - // invalid, this function will fault, but we shouldn't be passed bogus - // pointers anyway ;-) + /* Touch the memory before calling CopyPageTable. For some reason */ + /* we need to do this on Windows 9x, otherwise the memory may not */ + /* be paged in correctly. Of course if the passed in pointer is */ + /* invalid, this function will fault, but we shouldn't be passed bogus */ + /* pointers anyway ;-) */ pte = *((ulong*)p); - // Return assembled address value only if VMM service succeeds + /* Return assembled address value only if VMM service succeeds */ if (CopyPageTable(((DWORD)p) >> 12, 1, (PVOID*)&pte, 0)) - return (pte & ~0xFFF) | (((DWORD)p) & 0xFFF); + return (pte & ~0xFFF) | (((DWORD)p) & 0xFFF); - // Return failure to the caller! + /* Return failure to the caller! */ return 0xFFFFFFFFUL; } @@ -671,10 +671,10 @@ ulong linear = (ulong)p & ~0xFFF; for (i = (length + 0xFFF) >> 12; i > 0; i--) { - if ((*physAddress++ = PM_getPhysicalAddr((void*)linear)) == 0xFFFFFFFF) - return false; - linear += 4096; - } + if ((*physAddress++ = PM_getPhysicalAddr((void*)linear)) == 0xFFFFFFFF) + return false; + linear += 4096; + } return true; } @@ -682,7 +682,7 @@ { int i; for (i = 0; i < numMappings; i++) - PageFree(maps[i].linear,PR_STATIC); + PageFree(maps[i].linear,PR_STATIC); } void * PMAPI PM_mapRealPointer( @@ -777,7 +777,7 @@ * loaded, and not statically loaded. */ if (!_PM_haveBIOS) - return; + return; _TRACE("SDDHELP: Entering PM_callRealMode()\n"); Begin_Nest_V86_Exec(); @@ -807,16 +807,16 @@ * loaded, and not statically loaded. */ if (!_PM_haveBIOS) { - *out = *in; - return out->x.ax; - } + *out = *in; + return out->x.ax; + } /* Disable pass-up to our VxD handler so we directly call BIOS */ _TRACE("SDDHELP: Entering PM_int86()\n"); if (disableTSRFlag) { - oldDisable = *disableTSRFlag; - *disableTSRFlag = 0; - } + oldDisable = *disableTSRFlag; + *disableTSRFlag = 0; + } Begin_Nest_V86_Exec(); LoadV86Registers(&saveRegs,in,&sregs); Exec_Int(intno); @@ -825,7 +825,7 @@ /* Re-enable pass-up to our VxD handler if previously enabled */ if (disableTSRFlag) - *disableTSRFlag = oldDisable; + *disableTSRFlag = oldDisable; _TRACE("SDDHELP: Exiting PM_int86()\n"); return out->x.ax; @@ -849,16 +849,16 @@ * loaded, and not statically loaded. */ if (!_PM_haveBIOS) { - *out = *in; - return out->x.ax; - } + *out = *in; + return out->x.ax; + } /* Disable pass-up to our VxD handler so we directly call BIOS */ _TRACE("SDDHELP: Entering PM_int86x()\n"); if (disableTSRFlag) { - oldDisable = *disableTSRFlag; - *disableTSRFlag = 0; - } + oldDisable = *disableTSRFlag; + *disableTSRFlag = 0; + } Begin_Nest_V86_Exec(); LoadV86Registers(&saveRegs,in,sregs); Exec_Int(intno); @@ -867,7 +867,7 @@ /* Re-enable pass-up to our VxD handler if previously enabled */ if (disableTSRFlag) - *disableTSRFlag = oldDisable; + *disableTSRFlag = oldDisable; _TRACE("SDDHELP: Exiting PM_int86x()\n"); return out->x.ax; @@ -900,14 +900,14 @@ DWORD maxPhys = below16M ? 0x00FFFFFF : 0xFFFFFFFF; void *p; - // TODO: This may need to be modified if the memory needs to be globally - // accessible. Check how we implemented PM_mallocShared() as we - // may need to do something similar in here. + /* TODO: This may need to be modified if the memory needs to be globally */ + /* accessible. Check how we implemented PM_mallocShared() as we */ + /* may need to do something similar in here. */ PageAllocate(nPages,PG_SYS,0,0,0,maxPhys,physAddr,flags,&hMem,&p); - // TODO: We may need to modify the memory blocks to disable caching via - // the page tables (PCD|PWT) since DMA memory blocks *cannot* be - // cached! + /* TODO: We may need to modify the memory blocks to disable caching via */ + /* the page tables (PCD|PWT) since DMA memory blocks *cannot* be */ + /* cached! */ return p; } @@ -921,7 +921,7 @@ ibool contiguous) { if (p) - PageFree((ulong)p,0); + PageFree((ulong)p,0); } /**************************************************************************** @@ -934,9 +934,9 @@ MEMHANDLE hMem; void *p; - // TODO: This will need to be modified if the memory needs to be globally - // accessible. Check how we implemented PM_mallocShared() as we - // may need to do something similar in here. + /* TODO: This will need to be modified if the memory needs to be globally */ + /* accessible. Check how we implemented PM_mallocShared() as we */ + /* may need to do something similar in here. */ PageAllocate(1,PG_SYS,0,0,0,0,0,PAGEFIXED,&hMem,&p); return p; } @@ -949,7 +949,7 @@ void *p) { if (p) - PageFree((ulong)p,0); + PageFree((ulong)p,0); } /**************************************************************************** @@ -1012,41 +1012,41 @@ int frequency) { static short convert[] = { - 8192, - 4096, - 2048, - 1024, - 512, - 256, - 128, - 64, - 32, - 16, - 8, - 4, - 2, - -1, - }; + 8192, + 4096, + 2048, + 1024, + 512, + 256, + 128, + 64, + 32, + 16, + 8, + 4, + 2, + -1, + }; int i; /* First clear any pending RTC timeout if not cleared */ _PM_readCMOS(0x0C); if (frequency == 0) { - /* Disable RTC timout */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F); - } + /* Disable RTC timout */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB & 0x0F); + } else { - /* Convert frequency value to RTC clock indexes */ - for (i = 0; convert[i] != -1; i++) { - if (convert[i] == frequency) - break; - } + /* Convert frequency value to RTC clock indexes */ + for (i = 0; convert[i] != -1; i++) { + if (convert[i] == frequency) + break; + } - /* Set RTC timout value and enable timeout */ - _PM_writeCMOS(0x0A,0x20 | (i+3)); - _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40); - } + /* Set RTC timout value and enable timeout */ + _PM_writeCMOS(0x0A,0x20 | (i+3)); + _PM_writeCMOS(0x0B,(_PM_oldCMOSRegB & 0x0F) | 0x40); + } } /**************************************************************************** @@ -1072,11 +1072,11 @@ * new one comes along; if that happens we ignore the old one). */ if (!inside) { - inside = 1; - enable(); - _PM_rtcHandler(); - inside = 0; - } + inside = 1; + enable(); + _PM_rtcHandler(); + inside = 0; + } return TRUE; } @@ -1106,7 +1106,7 @@ IRQdesc.VID_IRET_Proc = 0; IRQdesc.VID_IRET_Time_Out = 500; if ((RTCIRQHandle = VPICD_Virtualize_IRQ(&IRQdesc)) == 0) - return false; + return false; /* Program the real time clock default frequency */ PM_setRealTimeClockFrequency(frequency); @@ -1123,15 +1123,15 @@ void PMAPI PM_restoreRealTimeClockHandler(void) { if (RTCIRQHandle) { - /* Restore CMOS registers and mask RTC clock */ - _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); - _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); + /* Restore CMOS registers and mask RTC clock */ + _PM_writeCMOS(0x0A,_PM_oldCMOSRegA); + _PM_writeCMOS(0x0B,_PM_oldCMOSRegB); - /* Restore the interrupt vector */ - VPICD_Set_Auto_Masking(RTCIRQHandle); - VPICD_Force_Default_Behavior(RTCIRQHandle); - RTCIRQHandle = 0; - } + /* Restore the interrupt vector */ + VPICD_Set_Auto_Masking(RTCIRQHandle); + VPICD_Force_Default_Behavior(RTCIRQHandle); + RTCIRQHandle = 0; + } } /**************************************************************************** @@ -1176,9 +1176,9 @@ const char *filename, PM_findData *findData) { - // TODO: This function should start a directory enumeration search - // given the filename (with wildcards). The data should be - // converted and returned in the findData standard form. + /* TODO: This function should start a directory enumeration search */ + /* given the filename (with wildcards). The data should be */ + /* converted and returned in the findData standard form. */ (void)filename; (void)findData; return PM_FILE_INVALID; @@ -1192,10 +1192,10 @@ void *handle, PM_findData *findData) { - // TODO: This function should find the next file in directory enumeration - // search given the search criteria defined in the call to - // PM_findFirstFile. The data should be converted and returned - // in the findData standard form. + /* TODO: This function should find the next file in directory enumeration */ + /* search given the search criteria defined in the call to */ + /* PM_findFirstFile. The data should be converted and returned */ + /* in the findData standard form. */ (void)handle; (void)findData; return false; @@ -1208,8 +1208,8 @@ void PMAPI PM_findClose( void *handle) { - // TODO: This function should close the find process. This may do - // nothing for some OS'es. + /* TODO: This function should close the find process. This may do */ + /* nothing for some OS'es. */ (void)handle; } @@ -1229,7 +1229,7 @@ ibool PMAPI PM_driveValid( char drive) { - // Not supported in a VxD + /* Not supported in a VxD */ (void)drive; return false; } @@ -1245,7 +1245,7 @@ char *dir, int len) { - // Not supported in a VxD + /* Not supported in a VxD */ (void)drive; (void)dir; (void)len; @@ -1279,7 +1279,7 @@ const char *filename, uint attrib) { - // TODO: Implement this + /* TODO: Implement this */ (void)filename; (void)attrib; PM_fatalError("PM_setFileAttr not implemented yet!"); @@ -1292,7 +1292,7 @@ uint PMAPI PM_getFileAttr( const char *filename) { - // TODO: Implement this + /* TODO: Implement this */ (void)filename; PM_fatalError("PM_getFileAttr not implemented yet!"); return 0; @@ -1305,7 +1305,7 @@ ibool PMAPI PM_mkdir( const char *filename) { - // TODO: Implement this + /* TODO: Implement this */ (void)filename; PM_fatalError("PM_mkdir not implemented yet!"); return false; @@ -1318,7 +1318,7 @@ ibool PMAPI PM_rmdir( const char *filename) { - // TODO: Implement this + /* TODO: Implement this */ (void)filename; PM_fatalError("PM_rmdir not implemented yet!"); return false; @@ -1333,7 +1333,7 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)filename; (void)gmTime; (void)time; @@ -1350,11 +1350,10 @@ ibool gmTime, PM_time *time) { - // TODO: Implement this! + /* TODO: Implement this! */ (void)filename; (void)gmTime; (void)time; PM_fatalError("PM_setFileTime not implemented yet!"); return false; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c b/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c index 5978b9f..7da9752 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c +++ b/board/MAI/bios_emulator/scitech/src/pm/win32/cpuinfo.c @@ -46,7 +46,7 @@ oldPriority = GetThreadPriority(hThread); if (oldPriority != THREAD_PRIORITY_ERROR_RETURN) - SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL); + SetThreadPriority(hThread, THREAD_PRIORITY_TIME_CRITICAL); return oldPriority; } @@ -60,7 +60,7 @@ HANDLE hThread = GetCurrentThread(); if (oldPriority != THREAD_PRIORITY_ERROR_RETURN) - SetThreadPriority(hThread, oldPriority); + SetThreadPriority(hThread, oldPriority); } /**************************************************************************** @@ -71,12 +71,12 @@ CPU_largeInteger *freq) { if (!QueryPerformanceFrequency((LARGE_INTEGER*)freq)) { - havePerformanceCounter = false; - freq->low = 100000; - freq->high = 0; - } + havePerformanceCounter = false; + freq->low = 100000; + freq->high = 0; + } else - havePerformanceCounter = true; + havePerformanceCounter = true; } /**************************************************************************** @@ -86,9 +86,9 @@ #define GetCounter(t) \ { \ if (havePerformanceCounter) \ - QueryPerformanceCounter((LARGE_INTEGER*)t); \ + QueryPerformanceCounter((LARGE_INTEGER*)t); \ else { \ - (t)->low = timeGetTime() * 100; \ - (t)->high = 0; \ - } \ + (t)->low = timeGetTime() * 100; \ + (t)->high = 0; \ + } \ } diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c b/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c index cf89401..d6c3f60 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c +++ b/board/MAI/bios_emulator/scitech/src/pm/win32/ddraw.c @@ -85,11 +85,11 @@ HKEY hKey; if (RegOpenKeyEx(HKEY_CURRENT_USER,szAutoPlayKey,0,KEY_EXECUTE | KEY_WRITE,&hKey) == ERROR_SUCCESS) { - RegQueryValueEx(hKey,szAutoPlayValue,NULL,NULL,(void*)&dwAutoPlay,&dwSize); - dwAutoPlay |= AUTOPLAY_DRIVE_CDROM; - RegSetValueEx(hKey,szAutoPlayValue,0,REG_DWORD,(void*)&dwAutoPlay,dwSize); - RegCloseKey(hKey); - } + RegQueryValueEx(hKey,szAutoPlayValue,NULL,NULL,(void*)&dwAutoPlay,&dwSize); + dwAutoPlay |= AUTOPLAY_DRIVE_CDROM; + RegSetValueEx(hKey,szAutoPlayValue,0,REG_DWORD,(void*)&dwAutoPlay,dwSize); + RegCloseKey(hKey); + } } /**************************************************************************** @@ -102,11 +102,11 @@ HKEY hKey; if (RegOpenKeyEx(HKEY_CURRENT_USER,szAutoPlayKey,0,KEY_EXECUTE | KEY_WRITE,&hKey) == ERROR_SUCCESS) { - RegQueryValueEx(hKey,szAutoPlayValue,NULL,NULL,(void*)&dwAutoPlay,&dwSize); - dwAutoPlay &= ~AUTOPLAY_DRIVE_CDROM; - RegSetValueEx(hKey,szAutoPlayValue,0,REG_DWORD,(void*)&dwAutoPlay,dwSize); - RegCloseKey(hKey); - } + RegQueryValueEx(hKey,szAutoPlayValue,NULL,NULL,(void*)&dwAutoPlay,&dwSize); + dwAutoPlay &= ~AUTOPLAY_DRIVE_CDROM; + RegSetValueEx(hKey,szAutoPlayValue,0,REG_DWORD,(void*)&dwAutoPlay,dwSize); + RegCloseKey(hKey); + } } /**************************************************************************** @@ -121,20 +121,20 @@ int retCode = PM_SUSPEND_APP; if (backInGDI) - return; + return; if (suspendApp) - retCode = suspendApp(PM_DEACTIVATE); + retCode = suspendApp(PM_DEACTIVATE); RestoreAutoPlay(); backInGDI = true; /* Now process messages normally until we are re-activated */ waitActive = true; if (retCode != PM_NO_SUSPEND_APP) { - while (waitActive) { - _EVT_pumpMessages(); - Sleep(200); - } - } + while (waitActive) { + _EVT_pumpMessages(); + Sleep(200); + } + } } /**************************************************************************** @@ -147,27 +147,27 @@ static ibool firstTime = true; if (firstTime) { - /* Clear the message queue while waiting for the surfaces to be - * restored. - */ - firstTime = false; - while (1) { - /* Continue looping until out application has been restored - * and we have reset the display mode. - */ - _EVT_pumpMessages(); - if (GetActiveWindow() == _PM_hwndConsole) { - if (suspendApp) - suspendApp(PM_REACTIVATE); - DisableAutoPlay(); - backInGDI = false; - waitActive = false; - firstTime = true; - return; - } - Sleep(200); - } - } + /* Clear the message queue while waiting for the surfaces to be + * restored. + */ + firstTime = false; + while (1) { + /* Continue looping until out application has been restored + * and we have reset the display mode. + */ + _EVT_pumpMessages(); + if (GetActiveWindow() == _PM_hwndConsole) { + if (suspendApp) + suspendApp(PM_REACTIVATE); + DisableAutoPlay(); + backInGDI = false; + waitActive = false; + firstTime = true; + return; + } + Sleep(200); + } + } } /**************************************************************************** @@ -192,17 +192,17 @@ /* Call system DLL version if found */ if (_PM_imports.PM_doSuspendApp != PM_doSuspendApp) { - _PM_imports.PM_doSuspendApp(); - return; - } + _PM_imports.PM_doSuspendApp(); + return; + } if (firstTime) { - if (suspendApp) - suspendApp(PM_DEACTIVATE); - RestoreAutoPlay(); - firstTime = false; - backInGDI = true; - } + if (suspendApp) + suspendApp(PM_DEACTIVATE); + RestoreAutoPlay(); + firstTime = false; + backInGDI = true; + } RestoreFullScreen(); firstTime = true; } @@ -220,60 +220,60 @@ LONG lParam) { switch (msg) { - case WM_SYSCHAR: - /* Stop Alt-Space from pausing our application */ - return 0; - case WM_KEYDOWN: - case WM_SYSKEYDOWN: - if (HIWORD(lParam) & KF_REPEAT) { - if (msg == WM_SYSKEYDOWN) - return 0; - break; - } - /* Fall through for keydown events */ - case WM_KEYUP: - case WM_SYSKEYUP: - if (msg == WM_SYSKEYDOWN || msg == WM_SYSKEYUP) { - if ((HIWORD(lParam) & KF_ALTDOWN) && wParam == VK_RETURN) - break; - /* We ignore the remainder of the system keys to stop the - * system menu from being activated from the keyboard and pausing - * our app while fullscreen (ie: pressing the Alt key). - */ - return 0; - } - break; - case WM_SYSCOMMAND: - switch (wParam & ~0x0F) { - case SC_SCREENSAVE: - case SC_MONITORPOWER: - /* Ignore screensaver requests in fullscreen modes */ - return 0; - } - break; - case WM_SIZE: - if (waitActive && backInGDI && (wParam != SIZE_MINIMIZED)) { - /* Start the re-activation process */ - PostMessage(hwnd,WM_DO_SUSPEND_APP,WM_PM_RESTORE_FULLSCREEN,0); - } - else if (!waitActive && isFullScreen && !backInGDI && (wParam == SIZE_MINIMIZED)) { - /* Start the de-activation process */ - PostMessage(hwnd,WM_DO_SUSPEND_APP,WM_PM_LEAVE_FULLSCREEN,0); - } - break; - case WM_DO_SUSPEND_APP: - switch (wParam) { + case WM_SYSCHAR: + /* Stop Alt-Space from pausing our application */ + return 0; + case WM_KEYDOWN: + case WM_SYSKEYDOWN: + if (HIWORD(lParam) & KF_REPEAT) { + if (msg == WM_SYSKEYDOWN) + return 0; + break; + } + /* Fall through for keydown events */ + case WM_KEYUP: + case WM_SYSKEYUP: + if (msg == WM_SYSKEYDOWN || msg == WM_SYSKEYUP) { + if ((HIWORD(lParam) & KF_ALTDOWN) && wParam == VK_RETURN) + break; + /* We ignore the remainder of the system keys to stop the + * system menu from being activated from the keyboard and pausing + * our app while fullscreen (ie: pressing the Alt key). + */ + return 0; + } + break; + case WM_SYSCOMMAND: + switch (wParam & ~0x0F) { + case SC_SCREENSAVE: + case SC_MONITORPOWER: + /* Ignore screensaver requests in fullscreen modes */ + return 0; + } + break; + case WM_SIZE: + if (waitActive && backInGDI && (wParam != SIZE_MINIMIZED)) { + /* Start the re-activation process */ + PostMessage(hwnd,WM_DO_SUSPEND_APP,WM_PM_RESTORE_FULLSCREEN,0); + } + else if (!waitActive && isFullScreen && !backInGDI && (wParam == SIZE_MINIMIZED)) { + /* Start the de-activation process */ + PostMessage(hwnd,WM_DO_SUSPEND_APP,WM_PM_LEAVE_FULLSCREEN,0); + } + break; + case WM_DO_SUSPEND_APP: + switch (wParam) { case WM_PM_RESTORE_FULLSCREEN: RestoreFullScreen(); break; case WM_PM_LEAVE_FULLSCREEN: LeaveFullScreen(); break; - } - return 0; - } + } + return 0; + } if (oldWinProc) - return oldWinProc(hwnd,msg,wParam,lParam); + return oldWinProc(hwnd,msg,wParam,lParam); return DefWindowProc(hwnd,msg,wParam,lParam); } @@ -349,32 +349,32 @@ /* Call system DLL version if found */ if (_PM_imports.PM_loadDirectDraw != PM_loadDirectDraw) - return _PM_imports.PM_loadDirectDraw(device); + return _PM_imports.PM_loadDirectDraw(device); - // TODO: Handle multi-monitor!! + /* TODO: Handle multi-monitor!! */ if (device != 0) - return NULL; + return NULL; /* Load the DirectDraw DLL if not presently loaded */ GET_DEFAULT_CW(); if (!hInstDD) { - hdc = GetDC(NULL); - bits = GetDeviceCaps(hdc,BITSPIXEL); - ReleaseDC(NULL,hdc); - if (bits < 8) - return NULL; - if ((hInstDD = LoadLibrary("ddraw.dll")) == NULL) - return NULL; - pDirectDrawCreate = (void*)GetProcAddress(hInstDD,"DirectDrawCreate"); - if (!pDirectDrawCreate) - return NULL; - } + hdc = GetDC(NULL); + bits = GetDeviceCaps(hdc,BITSPIXEL); + ReleaseDC(NULL,hdc); + if (bits < 8) + return NULL; + if ((hInstDD = LoadLibrary("ddraw.dll")) == NULL) + return NULL; + pDirectDrawCreate = (void*)GetProcAddress(hInstDD,"DirectDrawCreate"); + if (!pDirectDrawCreate) + return NULL; + } /* Create the DirectDraw object */ if (!lpDD && pDirectDrawCreate(NULL, &lpDD, NULL) != DD_OK) { - lpDD = NULL; - return NULL; - } + lpDD = NULL; + return NULL; + } RESET_DEFAULT_CW(); return lpDD; } @@ -394,13 +394,13 @@ { /* Call system DLL version if found */ if (_PM_imports.PM_unloadDirectDraw != PM_unloadDirectDraw) { - _PM_imports.PM_unloadDirectDraw(device); - return; - } + _PM_imports.PM_unloadDirectDraw(device); + return; + } if (lpDD) { - IDirectDraw_Release(lpDD); - lpDD = NULL; - } + IDirectDraw_Release(lpDD); + lpDD = NULL; + } (void)device; } @@ -423,56 +423,56 @@ /* Call system DLL version if found */ GA_getSystemPMImports(); if (_PM_imports.PM_openConsole != PM_openConsole) { - if (fullScreen) { - _PM_deskX = xRes; - _PM_deskY = yRes; - } - return _PM_imports.PM_openConsole(hWndUser,device,xRes,yRes,bpp,fullScreen); - } + if (fullScreen) { + _PM_deskX = xRes; + _PM_deskY = yRes; + } + return _PM_imports.PM_openConsole(hWndUser,device,xRes,yRes,bpp,fullScreen); + } /* Create the fullscreen window if necessary */ hwndUser = hWndUser; if (fullScreen) { - if (!classRegistered) { - /* Create a Window class for the fullscreen window in here, since - * we need to register one that will do all our event handling for - * us. - */ - hInstApp = GetModuleHandle(NULL); - cls.hCursor = LoadCursor(NULL,IDC_ARROW); - cls.hIcon = LoadIcon(hInstApp,MAKEINTRESOURCE(1)); - cls.lpszMenuName = NULL; - cls.lpszClassName = szWinClassName; - cls.hbrBackground = GetStockObject(BLACK_BRUSH); - cls.hInstance = hInstApp; - cls.style = CS_DBLCLKS; - cls.lpfnWndProc = PM_winProc; - cls.cbWndExtra = 0; - cls.cbClsExtra = 0; - if (!RegisterClass(&cls)) - return NULL; - classRegistered = true; - } - _PM_deskX = xRes; - _PM_deskY = yRes; - if (!hwndUser) { - char windowTitle[80]; - if (LoadString(hInstApp,1,windowTitle,sizeof(windowTitle)) == 0) - strcpy(windowTitle,"MGL Fullscreen Application"); - _PM_hwndConsole = CreateWindowEx(WS_EX_APPWINDOW,szWinClassName, - windowTitle,WS_POPUP | WS_SYSMENU,0,0,xRes,yRes, - NULL,NULL,hInstApp,NULL); - } - else { - _PM_hwndConsole = _PM_convertUserWindow(hwndUser,xRes,yRes); - } - ShowCursor(false); - isFullScreen = true; - } + if (!classRegistered) { + /* Create a Window class for the fullscreen window in here, since + * we need to register one that will do all our event handling for + * us. + */ + hInstApp = GetModuleHandle(NULL); + cls.hCursor = LoadCursor(NULL,IDC_ARROW); + cls.hIcon = LoadIcon(hInstApp,MAKEINTRESOURCE(1)); + cls.lpszMenuName = NULL; + cls.lpszClassName = szWinClassName; + cls.hbrBackground = GetStockObject(BLACK_BRUSH); + cls.hInstance = hInstApp; + cls.style = CS_DBLCLKS; + cls.lpfnWndProc = PM_winProc; + cls.cbWndExtra = 0; + cls.cbClsExtra = 0; + if (!RegisterClass(&cls)) + return NULL; + classRegistered = true; + } + _PM_deskX = xRes; + _PM_deskY = yRes; + if (!hwndUser) { + char windowTitle[80]; + if (LoadString(hInstApp,1,windowTitle,sizeof(windowTitle)) == 0) + strcpy(windowTitle,"MGL Fullscreen Application"); + _PM_hwndConsole = CreateWindowEx(WS_EX_APPWINDOW,szWinClassName, + windowTitle,WS_POPUP | WS_SYSMENU,0,0,xRes,yRes, + NULL,NULL,hInstApp,NULL); + } + else { + _PM_hwndConsole = _PM_convertUserWindow(hwndUser,xRes,yRes); + } + ShowCursor(false); + isFullScreen = true; + } else { - _PM_hwndConsole = hwndUser; - isFullScreen = false; - } + _PM_hwndConsole = hwndUser; + isFullScreen = false; + } SetFocus(_PM_hwndConsole); SetForegroundWindow(_PM_hwndConsole); DisableAutoPlay(); @@ -488,7 +488,7 @@ { /* Call system DLL version if found */ if (_PM_imports.PM_getConsoleStateSize != PM_getConsoleStateSize) - return _PM_imports.PM_getConsoleStateSize(); + return _PM_imports.PM_getConsoleStateSize(); /* Not used in Windows */ return 1; @@ -504,9 +504,9 @@ { /* Call system DLL version if found */ if (_PM_imports.PM_saveConsoleState != PM_saveConsoleState) { - _PM_imports.PM_saveConsoleState(stateBuf,hwndConsole); - return; - } + _PM_imports.PM_saveConsoleState(stateBuf,hwndConsole); + return; + } /* Not used in Windows */ (void)stateBuf; @@ -522,9 +522,9 @@ { /* Call system DLL version if found */ if (_PM_imports.PM_setSuspendAppCallback != PM_setSuspendAppCallback) { - _PM_imports.PM_setSuspendAppCallback(saveState); - return; - } + _PM_imports.PM_setSuspendAppCallback(saveState); + return; + } suspendApp = saveState; } @@ -538,9 +538,9 @@ { /* Call system DLL version if found */ if (_PM_imports.PM_restoreConsoleState != PM_restoreConsoleState) { - _PM_imports.PM_restoreConsoleState(stateBuf,hwndConsole); - return; - } + _PM_imports.PM_restoreConsoleState(stateBuf,hwndConsole); + return; + } /* Not used in Windows */ (void)stateBuf; @@ -556,15 +556,15 @@ { /* Call system DLL version if found */ if (_PM_imports.PM_closeConsole != PM_closeConsole) { - _PM_imports.PM_closeConsole(hwndConsole); - return; - } + _PM_imports.PM_closeConsole(hwndConsole); + return; + } ShowCursor(true); RestoreAutoPlay(); if (hwndUser) - _PM_restoreUserWindow(hwndConsole); + _PM_restoreUserWindow(hwndConsole); else - DestroyWindow(hwndConsole); + DestroyWindow(hwndConsole); hwndUser = NULL; _PM_hwndConsole = NULL; } @@ -577,7 +577,6 @@ { /* Call system DLL version if found */ if (_PM_imports.PM_getDirectDrawWindow != PM_getDirectDrawWindow) - return _PM_imports.PM_getDirectDrawWindow(); + return _PM_imports.PM_getDirectDrawWindow(); return _PM_hwndConsole; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/event.c b/board/MAI/bios_emulator/scitech/src/pm/win32/event.c index c14377d..86448e3 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/win32/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/win32/event.c @@ -70,143 +70,143 @@ MSG charMsg; event_t evt; - // TODO: Add support for DirectInput! We can't support relative mouse - // movement motion counters without DirectInput ;-(. + /* TODO: Add support for DirectInput! We can't support relative mouse */ + /* movement motion counters without DirectInput ;-(. */ while (PeekMessage(&msg,NULL,0,0,PM_REMOVE)) { - memset(&evt,0,sizeof(evt)); - switch (msg.message) { - case WM_MOUSEMOVE: - evt.what = EVT_MOUSEMOVE; - break; - case WM_LBUTTONDBLCLK: - evt.what = EVT_MOUSEDOWN; - evt.message = EVT_LEFTBMASK | EVT_DBLCLICK; - break; - case WM_LBUTTONDOWN: - evt.what = EVT_MOUSEDOWN; - evt.message = EVT_LEFTBMASK; - break; - case WM_LBUTTONUP: - evt.what = EVT_MOUSEUP; - evt.message = EVT_LEFTBMASK; - break; - case WM_RBUTTONDBLCLK: - evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK; - evt.message = EVT_RIGHTBMASK; - break; - case WM_RBUTTONDOWN: - evt.what = EVT_MOUSEDOWN; - evt.message = EVT_RIGHTBMASK; - break; - case WM_RBUTTONUP: - evt.what = EVT_MOUSEUP; - evt.message = EVT_RIGHTBMASK; - break; - case WM_MBUTTONDBLCLK: - evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK; - evt.message = EVT_MIDDLEBMASK; - break; - case WM_MBUTTONDOWN: - evt.what = EVT_MOUSEDOWN; - evt.message = EVT_MIDDLEBMASK; - break; - case WM_MBUTTONUP: - evt.what = EVT_MOUSEUP; - evt.message = EVT_MIDDLEBMASK; - break; - case WM_KEYDOWN: - case WM_SYSKEYDOWN: - if (HIWORD(msg.lParam) & KF_REPEAT) { - evt.what = EVT_KEYREPEAT; - } - else { - evt.what = EVT_KEYDOWN; - } - break; - case WM_KEYUP: - case WM_SYSKEYUP: - evt.what = EVT_KEYUP; - break; - } + memset(&evt,0,sizeof(evt)); + switch (msg.message) { + case WM_MOUSEMOVE: + evt.what = EVT_MOUSEMOVE; + break; + case WM_LBUTTONDBLCLK: + evt.what = EVT_MOUSEDOWN; + evt.message = EVT_LEFTBMASK | EVT_DBLCLICK; + break; + case WM_LBUTTONDOWN: + evt.what = EVT_MOUSEDOWN; + evt.message = EVT_LEFTBMASK; + break; + case WM_LBUTTONUP: + evt.what = EVT_MOUSEUP; + evt.message = EVT_LEFTBMASK; + break; + case WM_RBUTTONDBLCLK: + evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK; + evt.message = EVT_RIGHTBMASK; + break; + case WM_RBUTTONDOWN: + evt.what = EVT_MOUSEDOWN; + evt.message = EVT_RIGHTBMASK; + break; + case WM_RBUTTONUP: + evt.what = EVT_MOUSEUP; + evt.message = EVT_RIGHTBMASK; + break; + case WM_MBUTTONDBLCLK: + evt.what = EVT_MOUSEDOWN | EVT_DBLCLICK; + evt.message = EVT_MIDDLEBMASK; + break; + case WM_MBUTTONDOWN: + evt.what = EVT_MOUSEDOWN; + evt.message = EVT_MIDDLEBMASK; + break; + case WM_MBUTTONUP: + evt.what = EVT_MOUSEUP; + evt.message = EVT_MIDDLEBMASK; + break; + case WM_KEYDOWN: + case WM_SYSKEYDOWN: + if (HIWORD(msg.lParam) & KF_REPEAT) { + evt.what = EVT_KEYREPEAT; + } + else { + evt.what = EVT_KEYDOWN; + } + break; + case WM_KEYUP: + case WM_SYSKEYUP: + evt.what = EVT_KEYUP; + break; + } - /* Convert mouse event modifier flags */ - if (evt.what & EVT_MOUSEEVT) { - if (_PM_deskX) { - evt.where_x = ((long)msg.pt.x * rangeX) / _PM_deskX; - evt.where_y = ((long)msg.pt.y * rangeY) / _PM_deskY; - } - else { - ScreenToClient(_PM_hwndConsole, &msg.pt); - evt.where_x = msg.pt.x; - evt.where_y = msg.pt.y; - } - if (evt.what == EVT_MOUSEMOVE) { - /* Save the current mouse position */ - EVT.mx = evt.where_x; - EVT.my = evt.where_y; - if (EVT.oldMove != -1) { - EVT.evtq[EVT.oldMove].where_x = evt.where_x;/* Modify existing one */ - EVT.evtq[EVT.oldMove].where_y = evt.where_y; -// EVT.evtq[EVT.oldMove].relative_x += mickeyX; // TODO! -// EVT.evtq[EVT.oldMove].relative_y += mickeyY; // TODO! - evt.what = 0; - } - else { - EVT.oldMove = EVT.freeHead; /* Save id of this move event */ -// evt.relative_x = mickeyX; // TODO! -// evt.relative_y = mickeyY; // TODO! - } - } - else - EVT.oldMove = -1; - if (msg.wParam & MK_LBUTTON) - evt.modifiers |= EVT_LEFTBUT; - if (msg.wParam & MK_RBUTTON) - evt.modifiers |= EVT_RIGHTBUT; - if (msg.wParam & MK_MBUTTON) - evt.modifiers |= EVT_MIDDLEBUT; - if (msg.wParam & MK_SHIFT) - evt.modifiers |= EVT_SHIFTKEY; - if (msg.wParam & MK_CONTROL) - evt.modifiers |= EVT_CTRLSTATE; - } + /* Convert mouse event modifier flags */ + if (evt.what & EVT_MOUSEEVT) { + if (_PM_deskX) { + evt.where_x = ((long)msg.pt.x * rangeX) / _PM_deskX; + evt.where_y = ((long)msg.pt.y * rangeY) / _PM_deskY; + } + else { + ScreenToClient(_PM_hwndConsole, &msg.pt); + evt.where_x = msg.pt.x; + evt.where_y = msg.pt.y; + } + if (evt.what == EVT_MOUSEMOVE) { + /* Save the current mouse position */ + EVT.mx = evt.where_x; + EVT.my = evt.where_y; + if (EVT.oldMove != -1) { + EVT.evtq[EVT.oldMove].where_x = evt.where_x;/* Modify existing one */ + EVT.evtq[EVT.oldMove].where_y = evt.where_y; +/* EVT.evtq[EVT.oldMove].relative_x += mickeyX; // TODO! */ +/* EVT.evtq[EVT.oldMove].relative_y += mickeyY; // TODO! */ + evt.what = 0; + } + else { + EVT.oldMove = EVT.freeHead; /* Save id of this move event */ +/* evt.relative_x = mickeyX; // TODO! */ +/* evt.relative_y = mickeyY; // TODO! */ + } + } + else + EVT.oldMove = -1; + if (msg.wParam & MK_LBUTTON) + evt.modifiers |= EVT_LEFTBUT; + if (msg.wParam & MK_RBUTTON) + evt.modifiers |= EVT_RIGHTBUT; + if (msg.wParam & MK_MBUTTON) + evt.modifiers |= EVT_MIDDLEBUT; + if (msg.wParam & MK_SHIFT) + evt.modifiers |= EVT_SHIFTKEY; + if (msg.wParam & MK_CONTROL) + evt.modifiers |= EVT_CTRLSTATE; + } - /* Convert keyboard codes */ - TranslateMessage(&msg); - if (evt.what & EVT_KEYEVT) { - int scanCode = (msg.lParam >> 16) & 0xFF; - if (evt.what == EVT_KEYUP) { - /* Get message for keyup code from table of cached down values */ - evt.message = keyUpMsg[scanCode]; - keyUpMsg[scanCode] = 0; - } - else { - if (PeekMessage(&charMsg,NULL,WM_CHAR,WM_CHAR,PM_REMOVE)) - evt.message = charMsg.wParam; - if (PeekMessage(&charMsg,NULL,WM_SYSCHAR,WM_SYSCHAR,PM_REMOVE)) - evt.message = charMsg.wParam; - evt.message |= ((msg.lParam >> 8) & 0xFF00); - keyUpMsg[scanCode] = (ushort)evt.message; - } - if (evt.what == EVT_KEYREPEAT) - evt.message |= (msg.lParam << 16); - if (HIWORD(msg.lParam) & KF_ALTDOWN) - evt.modifiers |= EVT_ALTSTATE; - if (GetKeyState(VK_SHIFT) & 0x8000U) - evt.modifiers |= EVT_SHIFTKEY; - if (GetKeyState(VK_CONTROL) & 0x8000U) - evt.modifiers |= EVT_CTRLSTATE; - EVT.oldMove = -1; - } + /* Convert keyboard codes */ + TranslateMessage(&msg); + if (evt.what & EVT_KEYEVT) { + int scanCode = (msg.lParam >> 16) & 0xFF; + if (evt.what == EVT_KEYUP) { + /* Get message for keyup code from table of cached down values */ + evt.message = keyUpMsg[scanCode]; + keyUpMsg[scanCode] = 0; + } + else { + if (PeekMessage(&charMsg,NULL,WM_CHAR,WM_CHAR,PM_REMOVE)) + evt.message = charMsg.wParam; + if (PeekMessage(&charMsg,NULL,WM_SYSCHAR,WM_SYSCHAR,PM_REMOVE)) + evt.message = charMsg.wParam; + evt.message |= ((msg.lParam >> 8) & 0xFF00); + keyUpMsg[scanCode] = (ushort)evt.message; + } + if (evt.what == EVT_KEYREPEAT) + evt.message |= (msg.lParam << 16); + if (HIWORD(msg.lParam) & KF_ALTDOWN) + evt.modifiers |= EVT_ALTSTATE; + if (GetKeyState(VK_SHIFT) & 0x8000U) + evt.modifiers |= EVT_SHIFTKEY; + if (GetKeyState(VK_CONTROL) & 0x8000U) + evt.modifiers |= EVT_CTRLSTATE; + EVT.oldMove = -1; + } - if (evt.what != 0) { - /* Add time stamp and add the event to the queue */ - evt.when = msg.time; - if (EVT.count < EVENTQSIZE) - addEvent(&evt); - } - DispatchMessage(&msg); - } + if (evt.what != 0) { + /* Add time stamp and add the event to the queue */ + evt.when = msg.time; + if (EVT.count < EVENTQSIZE) + addEvent(&evt); + } + DispatchMessage(&msg); + } } /**************************************************************************** @@ -299,7 +299,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for Win32 + /* Do nothing for Win32 */ } /**************************************************************************** @@ -309,7 +309,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for Win32 + /* Do nothing for Win32 */ } /**************************************************************************** @@ -343,7 +343,7 @@ ****************************************************************************/ int EVTAPI EVT_joyIsPresent(void) { - // TODO: Implement joystick code based on DirectX! + /* TODO: Implement joystick code based on DirectX! */ return 0; } @@ -362,9 +362,9 @@ queue for later retrieval. Note: Most analogue joysticks will provide readings that change even - though the joystick has not moved. Hence if you call this routine - you will likely get an EVT_JOYMOVE event every time through your - event loop. + though the joystick has not moved. Hence if you call this routine + you will likely get an EVT_JOYMOVE event every time through your + event loop. SEE ALSO: EVT_getNext, EVT_peekNext, EVT_joySetUpperLeft, EVT_joySetLowerRight, @@ -457,4 +457,3 @@ void EVTAPI EVT_joySetCenter(void) { } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c b/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c index a3324d3..59d9aa0 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c +++ b/board/MAI/bios_emulator/scitech/src/pm/win32/ntservc.c @@ -64,63 +64,63 @@ char keyPath[MAX_PATH]; ulong status; - // Obtain a handle to the service control manager requesting all access + /* Obtain a handle to the service control manager requesting all access */ if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL) - return GetLastError(); + return GetLastError(); - // Find the path to the driver in system directory + /* Find the path to the driver in system directory */ GetSystemDirectory(szDriverPath, sizeof(szDriverPath)); strcat(szDriverPath, "\\drivers\\"); strcat(szDriverPath, szDriverName); - // Create the service with the Service Control Manager. + /* Create the service with the Service Control Manager. */ driverHandle = CreateService(scmHandle, - szServiceName, - szServiceName, - SERVICE_ALL_ACCESS, - dwServiceType, - SERVICE_BOOT_START, - SERVICE_ERROR_NORMAL, - szDriverPath, - szLoadGroup, - NULL, - NULL, - NULL, - NULL); + szServiceName, + szServiceName, + SERVICE_ALL_ACCESS, + dwServiceType, + SERVICE_BOOT_START, + SERVICE_ERROR_NORMAL, + szDriverPath, + szLoadGroup, + NULL, + NULL, + NULL, + NULL); - // Check to see if the driver could actually be installed. + /* Check to see if the driver could actually be installed. */ if (!driverHandle) { - status = GetLastError(); - CloseServiceHandle(scmHandle); - return status; - } + status = GetLastError(); + CloseServiceHandle(scmHandle); + return status; + } - // Get a handle to the key for driver so that it can be altered in the - // next step. + /* Get a handle to the key for driver so that it can be altered in the */ + /* next step. */ strcpy(keyPath, "SYSTEM\\CurrentControlSet\\Services\\"); strcat(keyPath, szServiceName); if ((status = RegOpenKeyEx(HKEY_LOCAL_MACHINE,keyPath,0,KEY_ALL_ACCESS,&key)) != ERROR_SUCCESS) { - // A problem has occured. Delete the service so that it is not installed. - status = GetLastError(); - DeleteService(driverHandle); - CloseServiceHandle(driverHandle); - CloseServiceHandle(scmHandle); - return status; - } + /* A problem has occured. Delete the service so that it is not installed. */ + status = GetLastError(); + DeleteService(driverHandle); + CloseServiceHandle(driverHandle); + CloseServiceHandle(scmHandle); + return status; + } - // Delete the ImagePath value in the newly created key so that the - // system looks for the driver in the normal location. + /* Delete the ImagePath value in the newly created key so that the */ + /* system looks for the driver in the normal location. */ if ((status = RegDeleteValue(key, "ImagePath")) != ERROR_SUCCESS) { - // A problem has occurred. Delete the service so that it is not - // installed and will not try to start. - RegCloseKey(key); - DeleteService(driverHandle); - CloseServiceHandle(driverHandle); - CloseServiceHandle(scmHandle); - return status; - } + /* A problem has occurred. Delete the service so that it is not */ + /* installed and will not try to start. */ + RegCloseKey(key); + DeleteService(driverHandle); + CloseServiceHandle(driverHandle); + CloseServiceHandle(scmHandle); + return status; + } - // Clean up and exit + /* Clean up and exit */ RegCloseKey(key); CloseServiceHandle(driverHandle); CloseServiceHandle(scmHandle); @@ -145,32 +145,32 @@ SERVICE_STATUS serviceStatus; ulong status; - // Obtain a handle to the service control manager requesting all access + /* Obtain a handle to the service control manager requesting all access */ if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL) - return GetLastError(); + return GetLastError(); - // Open the service with the Service Control Manager. + /* Open the service with the Service Control Manager. */ if ((driverHandle = OpenService(scmHandle,szServiceName,SERVICE_ALL_ACCESS)) == NULL) { - status = GetLastError(); - CloseServiceHandle(scmHandle); - return status; - } + status = GetLastError(); + CloseServiceHandle(scmHandle); + return status; + } - // Start the service + /* Start the service */ if (!StartService(driverHandle,0,NULL)) { - status = GetLastError(); - CloseServiceHandle(driverHandle); - CloseServiceHandle(scmHandle); - return status; - } + status = GetLastError(); + CloseServiceHandle(driverHandle); + CloseServiceHandle(scmHandle); + return status; + } - // Query the service to make sure it is there - if (!QueryServiceStatus(driverHandle,&serviceStatus)) { - status = GetLastError(); - CloseServiceHandle(driverHandle); - CloseServiceHandle(scmHandle); - return status; - } + /* Query the service to make sure it is there */ + if (!QueryServiceStatus(driverHandle,&serviceStatus)) { + status = GetLastError(); + CloseServiceHandle(driverHandle); + CloseServiceHandle(scmHandle); + return status; + } CloseServiceHandle(driverHandle); CloseServiceHandle(scmHandle); return ERROR_SUCCESS; @@ -194,24 +194,24 @@ SERVICE_STATUS serviceStatus; ulong status; - // Obtain a handle to the service control manager requesting all access + /* Obtain a handle to the service control manager requesting all access */ if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL) - return GetLastError(); + return GetLastError(); - // Open the service with the Service Control Manager. + /* Open the service with the Service Control Manager. */ if ((driverHandle = OpenService(scmHandle,szServiceName,SERVICE_ALL_ACCESS)) == NULL) { - status = GetLastError(); - CloseServiceHandle(scmHandle); - return status; - } + status = GetLastError(); + CloseServiceHandle(scmHandle); + return status; + } - // Stop the service from running + /* Stop the service from running */ if (!ControlService(driverHandle, SERVICE_CONTROL_STOP, &serviceStatus)) { - status = GetLastError(); - CloseServiceHandle(driverHandle); - CloseServiceHandle(scmHandle); - return status; - } + status = GetLastError(); + CloseServiceHandle(driverHandle); + CloseServiceHandle(scmHandle); + return status; + } CloseServiceHandle(driverHandle); CloseServiceHandle(scmHandle); return ERROR_SUCCESS; @@ -234,26 +234,25 @@ SC_HANDLE driverHandle; ulong status; - // Obtain a handle to the service control manager requesting all access + /* Obtain a handle to the service control manager requesting all access */ if ((scmHandle = OpenSCManager(NULL, NULL, SC_MANAGER_ALL_ACCESS)) == NULL) - return GetLastError(); + return GetLastError(); - // Open the service with the Service Control Manager. + /* Open the service with the Service Control Manager. */ if ((driverHandle = OpenService(scmHandle,szServiceName,SERVICE_ALL_ACCESS)) == NULL) { - status = GetLastError(); - CloseServiceHandle(scmHandle); - return status; - } + status = GetLastError(); + CloseServiceHandle(scmHandle); + return status; + } - // Remove the service + /* Remove the service */ if (!DeleteService(driverHandle)) { - status = GetLastError(); - CloseServiceHandle(driverHandle); - CloseServiceHandle(scmHandle); - return status; - } + status = GetLastError(); + CloseServiceHandle(driverHandle); + CloseServiceHandle(scmHandle); + return status; + } CloseServiceHandle(driverHandle); CloseServiceHandle(scmHandle); return ERROR_SUCCESS; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h b/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h index 018c936..0c59e90 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h +++ b/board/MAI/bios_emulator/scitech/src/pm/win32/oshdr.h @@ -47,7 +47,7 @@ #define GET_DEFAULT_CW() \ { \ if (_PM_cw_default == 0) \ - _PM_cw_default = _control87(0,0); \ + _PM_cw_default = _control87(0,0); \ } #define RESET_DEFAULT_CW() \ _control87(_PM_cw_default,0xFFFFFFFF) @@ -77,4 +77,3 @@ /*-------------------------- Internal Functions ---------------------------*/ void _EVT_pumpMessages(void); - diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c b/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c index d08da4c..1ffdbcc 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c +++ b/board/MAI/bios_emulator/scitech/src/pm/win32/pm.c @@ -69,10 +69,10 @@ #define CHECK_FOR_PMHELP() \ { \ if (_PM_hDevice == INVALID_HANDLE_VALUE) \ - if (_PM_haveWinNT) \ - PM_fatalError("Unable to connect to PMHELP.SYS or SDDHELP.SYS!"); \ - else \ - PM_fatalError("Unable to connect to PMHELP.VXD or SDDHELP.VXD!"); \ + if (_PM_haveWinNT) \ + PM_fatalError("Unable to connect to PMHELP.SYS or SDDHELP.SYS!"); \ + else \ + PM_fatalError("Unable to connect to PMHELP.VXD or SDDHELP.VXD!"); \ } /**************************************************************************** @@ -95,71 +95,71 @@ * of SDD is loaded, we use the PMHELP VxD instead. */ if (!inited) { - /* Determine if we are running under Windows NT or not and - * set the global OS type variable. - */ - _PM_haveWinNT = false; - if ((GetVersion() & 0x80000000UL) == 0) - _PM_haveWinNT = true; - ___drv_os_type = (_PM_haveWinNT) ? _OS_WINNT : _OS_WIN95; + /* Determine if we are running under Windows NT or not and + * set the global OS type variable. + */ + _PM_haveWinNT = false; + if ((GetVersion() & 0x80000000UL) == 0) + _PM_haveWinNT = true; + ___drv_os_type = (_PM_haveWinNT) ? _OS_WINNT : _OS_WIN95; - /* Now try to connect to SDDHELP.VXD or SDDHELP.SYS */ - _PM_hDevice = CreateFile(SDDHELP_MODULE_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0); - if (_PM_hDevice != INVALID_HANDLE_VALUE) { - if (!DeviceIoControl(_PM_hDevice, PMHELP_GETVER32, NULL, 0, - outBuf, sizeof(outBuf), &count, NULL) || outBuf[0] < PMHELP_VERSION) { - /* Old version of SDDHELP loaded, so use PMHELP instead */ - CloseHandle(_PM_hDevice); - _PM_hDevice = INVALID_HANDLE_VALUE; - } - } - if (_PM_hDevice == INVALID_HANDLE_VALUE) { - /* First try to see if there is a currently loaded PMHELP driver. - * This is usually the case when we are running under Windows NT/2K. - */ - _PM_hDevice = CreateFile(PMHELP_MODULE_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0); - if (_PM_hDevice == INVALID_HANDLE_VALUE) { - /* The driver was not staticly loaded, so try creating a file handle - * to a dynamic version of the VxD if possible. Note that on WinNT/2K we - * cannot support dynamically loading the drivers. - */ - _PM_hDevice = CreateFile(PMHELP_VXD_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0); - } - } - if (_PM_hDevice != INVALID_HANDLE_VALUE) { - /* Call the driver to determine the version number */ - if (!DeviceIoControl(_PM_hDevice, PMHELP_GETVER32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL) || outBuf[0] < PMHELP_VERSION) { - if (_PM_haveWinNT) - PM_fatalError("Older version of PMHELP.SYS found!"); - else - PM_fatalError("Older version of PMHELP.VXD found!"); - } + /* Now try to connect to SDDHELP.VXD or SDDHELP.SYS */ + _PM_hDevice = CreateFile(SDDHELP_MODULE_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0); + if (_PM_hDevice != INVALID_HANDLE_VALUE) { + if (!DeviceIoControl(_PM_hDevice, PMHELP_GETVER32, NULL, 0, + outBuf, sizeof(outBuf), &count, NULL) || outBuf[0] < PMHELP_VERSION) { + /* Old version of SDDHELP loaded, so use PMHELP instead */ + CloseHandle(_PM_hDevice); + _PM_hDevice = INVALID_HANDLE_VALUE; + } + } + if (_PM_hDevice == INVALID_HANDLE_VALUE) { + /* First try to see if there is a currently loaded PMHELP driver. + * This is usually the case when we are running under Windows NT/2K. + */ + _PM_hDevice = CreateFile(PMHELP_MODULE_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0); + if (_PM_hDevice == INVALID_HANDLE_VALUE) { + /* The driver was not staticly loaded, so try creating a file handle + * to a dynamic version of the VxD if possible. Note that on WinNT/2K we + * cannot support dynamically loading the drivers. + */ + _PM_hDevice = CreateFile(PMHELP_VXD_PATH, 0,0,0, CREATE_NEW, FILE_FLAG_DELETE_ON_CLOSE, 0); + } + } + if (_PM_hDevice != INVALID_HANDLE_VALUE) { + /* Call the driver to determine the version number */ + if (!DeviceIoControl(_PM_hDevice, PMHELP_GETVER32, inBuf, sizeof(inBuf), + outBuf, sizeof(outBuf), &count, NULL) || outBuf[0] < PMHELP_VERSION) { + if (_PM_haveWinNT) + PM_fatalError("Older version of PMHELP.SYS found!"); + else + PM_fatalError("Older version of PMHELP.VXD found!"); + } - /* Now set the current path inside the VxD so it knows what the - * current directory is for loading Nucleus drivers. - */ - inBuf[0] = (ulong)PM_getCurrentPath(cntPath,sizeof(cntPath)); - if (!DeviceIoControl(_PM_hDevice, PMHELP_SETCNTPATH32, inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &count, NULL)) - PM_fatalError("Unable to set VxD current path!"); + /* Now set the current path inside the VxD so it knows what the + * current directory is for loading Nucleus drivers. + */ + inBuf[0] = (ulong)PM_getCurrentPath(cntPath,sizeof(cntPath)); + if (!DeviceIoControl(_PM_hDevice, PMHELP_SETCNTPATH32, inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &count, NULL)) + PM_fatalError("Unable to set VxD current path!"); - /* Now pass down the NUCLEUS_PATH environment variable to the device - * driver so it can use this value if it is found. - */ - if ((env = getenv("NUCLEUS_PATH")) != NULL) { - inBuf[0] = (ulong)env; - if (!DeviceIoControl(_PM_hDevice, PMHELP_SETNUCLEUSPATH32, inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &count, NULL)) - PM_fatalError("Unable to set VxD Nucleus path!"); - } + /* Now pass down the NUCLEUS_PATH environment variable to the device + * driver so it can use this value if it is found. + */ + if ((env = getenv("NUCLEUS_PATH")) != NULL) { + inBuf[0] = (ulong)env; + if (!DeviceIoControl(_PM_hDevice, PMHELP_SETNUCLEUSPATH32, inBuf, sizeof(inBuf), outBuf, sizeof(outBuf), &count, NULL)) + PM_fatalError("Unable to set VxD Nucleus path!"); + } - /* Enable IOPL for ring-3 code by default if driver is present */ - if (_PM_haveWinNT) - PM_setIOPL(3); - } + /* Enable IOPL for ring-3 code by default if driver is present */ + if (_PM_haveWinNT) + PM_setIOPL(3); + } - /* Indicate that we have been initialised */ - inited = true; - } + /* Indicate that we have been initialised */ + inited = true; + } } /**************************************************************************** @@ -177,14 +177,14 @@ /* Enable I/O by adjusting the I/O permissions map on Windows NT */ if (_PM_haveWinNT) { - CHECK_FOR_PMHELP(); - if (iopl == 3) - DeviceIoControl(_PM_hDevice, PMHELP_ENABLERING3IOPL, inBuf, sizeof(inBuf),outBuf, sizeof(outBuf), &count, NULL); - else - DeviceIoControl(_PM_hDevice, PMHELP_DISABLERING3IOPL, inBuf, sizeof(inBuf),outBuf, sizeof(outBuf), &count, NULL); - cntIOPL = iopl; - return oldIOPL; - } + CHECK_FOR_PMHELP(); + if (iopl == 3) + DeviceIoControl(_PM_hDevice, PMHELP_ENABLERING3IOPL, inBuf, sizeof(inBuf),outBuf, sizeof(outBuf), &count, NULL); + else + DeviceIoControl(_PM_hDevice, PMHELP_DISABLERING3IOPL, inBuf, sizeof(inBuf),outBuf, sizeof(outBuf), &count, NULL); + cntIOPL = iopl; + return oldIOPL; + } /* We always have IOPL on Windows 9x */ return 3; @@ -197,9 +197,9 @@ ibool PMAPI PM_haveBIOSAccess(void) { if (PM_getOSType() == _OS_WINNT) - return false; + return false; else - return _PM_hDevice != INVALID_HANDLE_VALUE; + return _PM_hDevice != INVALID_HANDLE_VALUE; } /**************************************************************************** @@ -209,9 +209,9 @@ long PMAPI PM_getOSType(void) { if ((GetVersion() & 0x80000000UL) == 0) - return ___drv_os_type = _OS_WINNT; + return ___drv_os_type = _OS_WINNT; else - return ___drv_os_type = _OS_WIN95; + return ___drv_os_type = _OS_WIN95; } /**************************************************************************** @@ -232,9 +232,9 @@ { uint pos = strlen(s); if (s[pos-1] != '\\') { - s[pos] = '\\'; - s[pos+1] = '\0'; - } + s[pos] = '\\'; + s[pos+1] = '\0'; + } } /**************************************************************************** @@ -255,7 +255,7 @@ const char *msg) { if (fatalErrorCleanup) - fatalErrorCleanup(); + fatalErrorCleanup(); MessageBox(NULL,msg,"Fatal Error!", MB_ICONEXCLAMATION); exit(1); } @@ -279,19 +279,19 @@ * memory blocks out of order). */ if (!inited) - PM_init(); + PM_init(); if (!VESABuf_ptr) { - CHECK_FOR_PMHELP(); - if (DeviceIoControl(_PM_hDevice, PMHELP_GETVESABUF32, NULL, 0, - outBuf, sizeof(outBuf), &count, NULL)) { - if (!outBuf[0]) - return NULL; - VESABuf_ptr = (void*)outBuf[0]; - VESABuf_len = outBuf[1]; - VESABuf_rseg = outBuf[2]; - VESABuf_roff = outBuf[3]; - } - } + CHECK_FOR_PMHELP(); + if (DeviceIoControl(_PM_hDevice, PMHELP_GETVESABUF32, NULL, 0, + outBuf, sizeof(outBuf), &count, NULL)) { + if (!outBuf[0]) + return NULL; + VESABuf_ptr = (void*)outBuf[0]; + VESABuf_len = outBuf[1]; + VESABuf_rseg = outBuf[2]; + VESABuf_roff = outBuf[3]; + } + } *len = VESABuf_len; *rseg = VESABuf_rseg; *roff = VESABuf_roff; @@ -405,7 +405,7 @@ DWORD type; if (RegQueryValueEx(hKey,(PCHAR)szValue,(PDWORD)NULL,(PDWORD)&type,(LPBYTE)value,(PDWORD)&size) == ERROR_SUCCESS) - return true; + return true; return false; } @@ -424,9 +424,9 @@ memset(value,0,sizeof(value)); if (RegOpenKey(HKEY_LOCAL_MACHINE,szKey,&hKey) == ERROR_SUCCESS) { - status = REG_queryStringEx(hKey,szValue,value,size); - RegCloseKey(hKey); - } + status = REG_queryStringEx(hKey,szValue,value,size); + RegCloseKey(hKey); + } return status; } @@ -460,7 +460,7 @@ char *env; if ((env = getenv("NUCLEUS_PATH")) != NULL) - return env; + return env; GetSystemDirectory(path,sizeof(path)); strcat(path,"\\nucleus"); return path; @@ -497,9 +497,9 @@ static char name[256]; if (REG_queryString(szMachineNameKey,szMachineName,name,sizeof(name))) - return name; + return name; if (REG_queryString(szMachineNameKeyNT,szMachineName,name,sizeof(name))) - return name; + return name; return "Unknown"; } @@ -510,13 +510,13 @@ void * PMAPI PM_getBIOSPointer(void) { if (_PM_haveWinNT) { - /* On Windows NT we have to map it physically directly */ + /* On Windows NT we have to map it physically directly */ return PM_mapPhysicalAddr(0x400, 0x1000, true); - } + } else { - /* For Windows 9x we can access this memory directly */ - return (void*)0x400; - } + /* For Windows 9x we can access this memory directly */ + return (void*)0x400; + } } /**************************************************************************** @@ -526,16 +526,16 @@ void * PMAPI PM_getA0000Pointer(void) { if (_PM_haveWinNT) { - /* On Windows NT we have to map it physically directly */ + /* On Windows NT we have to map it physically directly */ return PM_mapPhysicalAddr(0xA0000, 0x0FFFF, false); - } + } else { - /* Always use the 0xA0000 linear address so that we will use - * whatever page table mappings are set up for us (ie: for virtual - * bank switching. - */ - return (void*)0xA0000; - } + /* Always use the 0xA0000 linear address so that we will use + * whatever page table mappings are set up for us (ie: for virtual + * bank switching. + */ + return (void*)0xA0000; + } } /**************************************************************************** @@ -552,14 +552,14 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = base; inBuf[1] = limit; inBuf[2] = isCached; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_MAPPHYS32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return (void*)outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return (void*)outBuf[0]; return NULL; } @@ -590,12 +590,12 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = (ulong)p; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_GETPHYSICALADDR32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return 0xFFFFFFFFUL; } @@ -613,14 +613,14 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = (ulong)p; inBuf[1] = (ulong)length; inBuf[2] = (ulong)physAddress; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_GETPHYSICALADDRRANGE32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return false; } @@ -640,14 +640,14 @@ ****************************************************************************/ int PMAPI PM_getCOMPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3F8; - case 1: return 0x2F8; - case 2: return 0x3E8; - case 3: return 0x2E8; - } + case 0: return 0x3F8; + case 1: return 0x2F8; + case 2: return 0x3E8; + case 3: return 0x2E8; + } return 0; } @@ -657,13 +657,13 @@ ****************************************************************************/ int PMAPI PM_getLPTPort(int port) { - // TODO: Re-code this to determine real values using the Plug and Play - // manager for the OS. + /* TODO: Re-code this to determine real values using the Plug and Play */ + /* manager for the OS. */ switch (port) { - case 0: return 0x3BC; - case 1: return 0x378; - case 2: return 0x278; - } + case 0: return 0x3BC; + case 1: return 0x378; + case 2: return 0x278; + } return 0; } @@ -685,8 +685,8 @@ inBuf[0] = size; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_MALLOCSHARED32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return (void*)outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return (void*)outBuf[0]; return NULL; } @@ -772,12 +772,12 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = intno; inBuf[1] = (ulong)regs; CHECK_FOR_PMHELP(); DeviceIoControl(_PM_hDevice, PMHELP_DPMIINT8632, inBuf, sizeof(inBuf), - NULL, 0, &count, NULL); + NULL, 0, &count, NULL); } /**************************************************************************** @@ -794,14 +794,14 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = intno; inBuf[1] = (ulong)in; inBuf[2] = (ulong)out; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_INT8632, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return 0; } @@ -820,15 +820,15 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = intno; inBuf[1] = (ulong)in; inBuf[2] = (ulong)out; inBuf[3] = (ulong)sregs; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_INT86X32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return 0; } @@ -846,14 +846,14 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = seg; inBuf[1] = off; inBuf[2] = (ulong)in; inBuf[3] = (ulong)sregs; CHECK_FOR_PMHELP(); DeviceIoControl(_PM_hDevice, PMHELP_CALLREALMODE32, inBuf, sizeof(inBuf), - NULL, 0, &count, NULL); + NULL, 0, &count, NULL); } /**************************************************************************** @@ -883,15 +883,15 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = size; inBuf[1] = (ulong)physAddr; inBuf[2] = (ulong)contiguous; inBuf[3] = (ulong)below16M; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_ALLOCLOCKED32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return (void*)outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return (void*)outBuf[0]; return NULL; } @@ -908,13 +908,13 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = (ulong)p; inBuf[1] = size; inBuf[2] = contiguous; CHECK_FOR_PMHELP(); DeviceIoControl(_PM_hDevice, PMHELP_FREELOCKED32, inBuf, sizeof(inBuf), - NULL, 0, &count, NULL); + NULL, 0, &count, NULL); } /**************************************************************************** @@ -929,12 +929,12 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = locked; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_ALLOCPAGE32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return (void*)outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return (void*)outBuf[0]; return NULL; } @@ -949,11 +949,11 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = (ulong)p; CHECK_FOR_PMHELP(); DeviceIoControl(_PM_hDevice, PMHELP_FREEPAGE32, inBuf, sizeof(inBuf), - NULL, 0, &count, NULL); + NULL, 0, &count, NULL); } /**************************************************************************** @@ -971,8 +971,8 @@ inBuf[2] = (ulong)lh; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_LOCKDATAPAGES32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return 0; } @@ -991,8 +991,8 @@ inBuf[2] = (ulong)lh; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_UNLOCKDATAPAGES32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return 0; } @@ -1011,8 +1011,8 @@ inBuf[2] = (ulong)lh; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_LOCKCODEPAGES32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return 0; } @@ -1031,8 +1031,8 @@ inBuf[2] = (ulong)lh; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_UNLOCKCODEPAGES32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return 0; } @@ -1099,14 +1099,14 @@ DWORD count; /* Count of bytes returned from VxD */ if (!inited) - PM_init(); + PM_init(); inBuf[0] = base; inBuf[1] = length; inBuf[2] = type; CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_ENABLELFBCOMB32, inBuf, sizeof(inBuf), - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return false; } @@ -1121,8 +1121,8 @@ CHECK_FOR_PMHELP(); if (DeviceIoControl(_PM_hDevice, PMHELP_GETPDB32, NULL, 0, - outBuf, sizeof(outBuf), &count, NULL)) - return outBuf[0]; + outBuf, sizeof(outBuf), &count, NULL)) + return outBuf[0]; return 0; } @@ -1201,15 +1201,15 @@ memset(findData,0,findData->dwSize); findData->dwSize = dwSize; if (blk->dwFileAttributes & FILE_ATTRIBUTE_READONLY) - findData->attrib |= PM_FILE_READONLY; + findData->attrib |= PM_FILE_READONLY; if (blk->dwFileAttributes & FILE_ATTRIBUTE_DIRECTORY) - findData->attrib |= PM_FILE_DIRECTORY; + findData->attrib |= PM_FILE_DIRECTORY; if (blk->dwFileAttributes & FILE_ATTRIBUTE_ARCHIVE) - findData->attrib |= PM_FILE_ARCHIVE; + findData->attrib |= PM_FILE_ARCHIVE; if (blk->dwFileAttributes & FILE_ATTRIBUTE_HIDDEN) - findData->attrib |= PM_FILE_HIDDEN; + findData->attrib |= PM_FILE_HIDDEN; if (blk->dwFileAttributes & FILE_ATTRIBUTE_SYSTEM) - findData->attrib |= PM_FILE_SYSTEM; + findData->attrib |= PM_FILE_SYSTEM; findData->sizeLo = blk->nFileSizeLow; findData->sizeHi = blk->nFileSizeHigh; strncpy(findData->name,blk->cFileName,PM_MAX_PATH); @@ -1228,9 +1228,9 @@ HANDLE hfile; if ((hfile = FindFirstFile(filename,&blk)) != INVALID_HANDLE_VALUE) { - convertFindData(findData,&blk); - return (void*)hfile; - } + convertFindData(findData,&blk); + return (void*)hfile; + } return PM_FILE_INVALID; } @@ -1245,9 +1245,9 @@ WIN32_FIND_DATA blk; if (FindNextFile((HANDLE)handle,&blk)) { - convertFindData(findData,&blk); - return true; - } + convertFindData(findData,&blk); + return true; + } return false; } @@ -1295,8 +1295,8 @@ char *dir, int len) { - // NT stores the current directory for drive N in the magic environment - // variable =N: so we simply look for that environment variable. + /* NT stores the current directory for drive N in the magic environment */ + /* variable =N: so we simply look for that environment variable. */ char envname[4]; envname[0] = '='; @@ -1304,14 +1304,14 @@ envname[2] = ':'; envname[3] = '\0'; if (GetEnvironmentVariable(envname,dir,len) == 0) { - // The current directory or the drive has not been set yet, so - // simply set it to the root. - dir[0] = envname[1]; - dir[1] = ':'; - dir[2] = '\\'; - dir[3] = '\0'; - SetEnvironmentVariable(envname,dir); - } + /* The current directory or the drive has not been set yet, so */ + /* simply set it to the root. */ + dir[0] = envname[1]; + dir[1] = ':'; + dir[2] = '\\'; + dir[3] = '\0'; + SetEnvironmentVariable(envname,dir); + } } /**************************************************************************** @@ -1325,13 +1325,13 @@ DWORD attr = 0; if (attrib & PM_FILE_READONLY) - attr |= FILE_ATTRIBUTE_READONLY; + attr |= FILE_ATTRIBUTE_READONLY; if (attrib & PM_FILE_ARCHIVE) - attr |= FILE_ATTRIBUTE_ARCHIVE; + attr |= FILE_ATTRIBUTE_ARCHIVE; if (attrib & PM_FILE_HIDDEN) - attr |= FILE_ATTRIBUTE_HIDDEN; + attr |= FILE_ATTRIBUTE_HIDDEN; if (attrib & PM_FILE_SYSTEM) - attr |= FILE_ATTRIBUTE_SYSTEM; + attr |= FILE_ATTRIBUTE_SYSTEM; SetFileAttributes((LPSTR)filename, attr); } @@ -1346,13 +1346,13 @@ uint attrib = 0; if (attr & FILE_ATTRIBUTE_READONLY) - attrib |= PM_FILE_READONLY; + attrib |= PM_FILE_READONLY; if (attr & FILE_ATTRIBUTE_ARCHIVE) - attrib |= PM_FILE_ARCHIVE; + attrib |= PM_FILE_ARCHIVE; if (attr & FILE_ATTRIBUTE_HIDDEN) - attrib |= PM_FILE_HIDDEN; + attrib |= PM_FILE_HIDDEN; if (attr & FILE_ATTRIBUTE_SYSTEM) - attrib |= PM_FILE_SYSTEM; + attrib |= PM_FILE_SYSTEM; return attrib; } @@ -1393,17 +1393,17 @@ of.cBytes = sizeof(of); if ((f = OpenFile(filename,&of,OF_READ)) == HFILE_ERROR) - return false; + return false; if (!GetFileTime((HANDLE)f,NULL,NULL,&utcTime)) - goto Exit; + goto Exit; if (!gmTime) { - if (!FileTimeToLocalFileTime(&utcTime,&localTime)) - goto Exit; - } + if (!FileTimeToLocalFileTime(&utcTime,&localTime)) + goto Exit; + } else - localTime = utcTime; + localTime = utcTime; if (!FileTimeToSystemTime(&localTime,&sysTime)) - goto Exit; + goto Exit; time->year = sysTime.wYear; time->mon = sysTime.wMonth-1; time->day = sysTime.wYear; @@ -1434,7 +1434,7 @@ of.cBytes = sizeof(of); if ((f = OpenFile(filename,&of,OF_WRITE)) == HFILE_ERROR) - return false; + return false; sysTime.wYear = time->year; sysTime.wMonth = time->mon+1; sysTime.wYear = time->day; @@ -1442,19 +1442,18 @@ sysTime.wMinute = time->min; sysTime.wSecond = time->sec; if (!SystemTimeToFileTime(&sysTime,&localTime)) - goto Exit; + goto Exit; if (!gmTime) { - if (!LocalFileTimeToFileTime(&localTime,&utcTime)) - goto Exit; - } + if (!LocalFileTimeToFileTime(&localTime,&utcTime)) + goto Exit; + } else - utcTime = localTime; + utcTime = localTime; if (!SetFileTime((HANDLE)f,NULL,NULL,&utcTime)) - goto Exit; + goto Exit; status = true; Exit: CloseHandle((HANDLE)f); return status; } - diff --git a/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c index 318929a..5a901a4 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c +++ b/board/MAI/bios_emulator/scitech/src/pm/win32/ztimer.c @@ -57,9 +57,9 @@ LZTimerObject *tm) { if (havePerformanceCounter) - QueryPerformanceCounter((LARGE_INTEGER*)&tm->start); + QueryPerformanceCounter((LARGE_INTEGER*)&tm->start); else - tm->start.low = timeGetTime(); + tm->start.low = timeGetTime(); } /**************************************************************************** @@ -72,14 +72,14 @@ CPU_largeInteger tmLap,tmCount; if (havePerformanceCounter) { - QueryPerformanceCounter((LARGE_INTEGER*)&tmLap); - _CPU_diffTime64(&tm->start,&tmLap,&tmCount); - return _CPU_calcMicroSec(&tmCount,countFreq.low); - } + QueryPerformanceCounter((LARGE_INTEGER*)&tmLap); + _CPU_diffTime64(&tm->start,&tmLap,&tmCount); + return _CPU_calcMicroSec(&tmCount,countFreq.low); + } else { - tmLap.low = timeGetTime(); - return (tmLap.low - tm->start.low) * 1000L; - } + tmLap.low = timeGetTime(); + return (tmLap.low - tm->start.low) * 1000L; + } } /**************************************************************************** @@ -90,9 +90,9 @@ LZTimerObject *tm) { if (havePerformanceCounter) - QueryPerformanceCounter((LARGE_INTEGER*)&tm->end); + QueryPerformanceCounter((LARGE_INTEGER*)&tm->end); else - tm->end.low = timeGetTime(); + tm->end.low = timeGetTime(); } /**************************************************************************** @@ -105,11 +105,11 @@ CPU_largeInteger tmCount; if (havePerformanceCounter) { - _CPU_diffTime64(&tm->start,&tm->end,&tmCount); - return _CPU_calcMicroSec(&tmCount,countFreq.low); - } + _CPU_diffTime64(&tm->start,&tm->end,&tmCount); + return _CPU_calcMicroSec(&tmCount,countFreq.low); + } else - return (tm->end.low - tm->start.low) * 1000L; + return (tm->end.low - tm->start.low) * 1000L; } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/x11/event.c b/board/MAI/bios_emulator/scitech/src/pm/x11/event.c index 23b9380..b34bfac 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/x11/event.c +++ b/board/MAI/bios_emulator/scitech/src/pm/x11/event.c @@ -83,7 +83,7 @@ { static unsigned starttime = 0; struct timeval t; - + gettimeofday(&t, NULL); if (starttime == 0) starttime = t.tv_sec * 1000 + (t.tv_usec/1000); @@ -105,14 +105,14 @@ static void _EVT_pumpMessages(void) #endif { - // TODO: The purpose of this function is to read all keyboard and mouse - // events from the OS specific event queue, translate them and post - // them into the SciTech event queue. + /* TODO: The purpose of this function is to read all keyboard and mouse */ + /* events from the OS specific event queue, translate them and post */ + /* them into the SciTech event queue. */ event_t evt; XEvent ev; static int old_mx = 0, old_my = 0, buts = 0, c; char buf[2]; - + while (XPending(_EVT_dpy) && XNextEvent(_EVT_dpy,&ev)) { evt.when = _MGL_getTicks(); @@ -129,36 +129,36 @@ evt.what = EVT_KEYUP; evt.message = keyUpMsg[c]; if(count < EVENTQSIZE) - addEvent(&evt); + addEvent(&evt); keyUpMsg[c] = 0; repeatKey[c] = 0; break; case ButtonPress: evt.what = EVT_MOUSEDOWN; if(ev.xbutton.button == 1){ - buts |= EVT_LEFTBUT; - evt.message = EVT_LEFTBMASK; + buts |= EVT_LEFTBUT; + evt.message = EVT_LEFTBMASK; }else if(ev.xbutton.button == 2){ - buts |= EVT_MIDDLEBUT; - evt.message = EVT_MIDDLEBMASK; + buts |= EVT_MIDDLEBUT; + evt.message = EVT_MIDDLEBMASK; }else if(ev.xbutton.button == 3){ - buts |= EVT_RIGHTBUT; - evt.message = EVT_RIGHTBMASK; + buts |= EVT_RIGHTBUT; + evt.message = EVT_RIGHTBMASK; } evt.modifiers = modifiers | buts; - + break; case ButtonRelease: evt.what = EVT_MOUSEUP; if(ev.xbutton.button == 1){ - buts &= ~EVT_LEFTBUT; - evt.message = EVT_LEFTBMASK; + buts &= ~EVT_LEFTBUT; + evt.message = EVT_LEFTBMASK; }else if(ev.xbutton.button == 2){ - buts &= ~EVT_MIDDLEBUT; - evt.message = EVT_MIDDLEBMASK; + buts &= ~EVT_MIDDLEBUT; + evt.message = EVT_MIDDLEBMASK; }else if(ev.xbutton.button == 3){ - buts &= ~EVT_RIGHTBUT; - evt.message = EVT_RIGHTBMASK; + buts &= ~EVT_RIGHTBUT; + evt.message = EVT_RIGHTBMASK; } evt.modifiers = modifiers | buts; @@ -226,7 +226,7 @@ _mouseMove = mouseMove; initEventQueue(); memset(keyUpMsg,0,sizeof(keyUpMsg)); - + /* query server for input extensions */ result =XQueryExtension(_EVT_dpy,"XInputExtension",&i,&j,&k); @@ -269,7 +269,7 @@ ****************************************************************************/ void EVT_resume(void) { - // Do nothing for non DOS systems + /* Do nothing for non DOS systems */ } /**************************************************************************** @@ -279,7 +279,7 @@ ****************************************************************************/ void EVT_suspend(void) { - // Do nothing for non DOS systems + /* Do nothing for non DOS systems */ } /**************************************************************************** @@ -293,7 +293,7 @@ signal(SIGFPE, SIG_DFL); signal(SIGINT, SIG_DFL); - // TODO: Do any OS specific cleanup in here + /* TODO: Do any OS specific cleanup in here */ } /**************************************************************************** diff --git a/board/MAI/bios_emulator/scitech/src/pm/ztimer.c b/board/MAI/bios_emulator/scitech/src/pm/ztimer.c index 35081e9..5acf7b1 100644 --- a/board/MAI/bios_emulator/scitech/src/pm/ztimer.c +++ b/board/MAI/bios_emulator/scitech/src/pm/ztimer.c @@ -104,12 +104,12 @@ ibool accurate) { if (cpuSpeed == -1) { - __ZTimerInit(); + __ZTimerInit(); #ifdef __INTEL__ - cpuSpeed = CPU_getProcessorSpeedInHZ(accurate); - haveRDTSC = CPU_haveRDTSC() && (cpuSpeed > 0); + cpuSpeed = CPU_getProcessorSpeedInHZ(accurate); + haveRDTSC = CPU_haveRDTSC() && (cpuSpeed > 0); #endif - } + } } /**************************************************************************** @@ -174,11 +174,11 @@ { #ifdef __INTEL__ if (haveRDTSC) { - _CPU_readTimeStamp(&tm->start); - } + _CPU_readTimeStamp(&tm->start); + } else #endif - __LZTimerOn(tm); + __LZTimerOn(tm); } /**************************************************************************** @@ -210,13 +210,13 @@ CPU_largeInteger tmLap,tmCount; if (haveRDTSC) { - _CPU_readTimeStamp(&tmLap); - _CPU_diffTime64(&tm->start,&tmLap,&tmCount); - return _CPU_calcMicroSec(&tmCount,cpuSpeed); - } + _CPU_readTimeStamp(&tmLap); + _CPU_diffTime64(&tm->start,&tmLap,&tmCount); + return _CPU_calcMicroSec(&tmCount,cpuSpeed); + } else #endif - return __LZTimerLap(tm); + return __LZTimerLap(tm); } /**************************************************************************** @@ -244,11 +244,11 @@ { #ifdef __INTEL__ if (haveRDTSC) { - _CPU_readTimeStamp(&tm->end); - } + _CPU_readTimeStamp(&tm->end); + } else #endif - __LZTimerOff(tm); + __LZTimerOff(tm); } /**************************************************************************** @@ -278,12 +278,12 @@ CPU_largeInteger tmCount; if (haveRDTSC) { - _CPU_diffTime64(&tm->start,&tm->end,&tmCount); - return _CPU_calcMicroSec(&tmCount,cpuSpeed); - } + _CPU_diffTime64(&tm->start,&tm->end,&tmCount); + return _CPU_calcMicroSec(&tmCount,cpuSpeed); + } else #endif - return __LZTimerCount(tm); + return __LZTimerCount(tm); } /**************************************************************************** @@ -514,4 +514,3 @@ void ZAPI ULZTimerResolution( ulong *resolution) { *resolution = ULZTIMER_RESOLUTION; } - diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h b/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h index e824299..77c545a 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h +++ b/board/MAI/bios_emulator/scitech/src/v86bios/AsmMacros.h @@ -2,24 +2,24 @@ /* * (c) Copyright 1993,1994 by David Wexelblat * - * Permission is hereby granted, free of charge, to any person obtaining a - * copy of this software and associated documentation files (the "Software"), - * to deal in the Software without restriction, including without limitation - * the rights to use, copy, modify, merge, publish, distribute, sublicense, - * and/or sell copies of the Software, and to permit persons to whom the + * Permission is hereby granted, free of charge, to any person obtaining a + * copy of this software and associated documentation files (the "Software"), + * to deal in the Software without restriction, including without limitation + * the rights to use, copy, modify, merge, publish, distribute, sublicense, + * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. - * + * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL - * DAVID WEXELBLAT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF - * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * DAVID WEXELBLAT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, + * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF + * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. - * + * * Except as contained in this notice, the name of David Wexelblat shall not be * used in advertising or otherwise to promote the sale, use or other dealings * in this Software without prior written authorization from David Wexelblat. @@ -28,32 +28,32 @@ /* * Copyright 1997 * Digital Equipment Corporation. All rights reserved. - * This software is furnished under license and may be used and copied only in - * accordance with the following terms and conditions. Subject to these - * conditions, you may download, copy, install, use, modify and distribute - * this software in source and/or binary form. No title or ownership is + * This software is furnished under license and may be used and copied only in + * accordance with the following terms and conditions. Subject to these + * conditions, you may download, copy, install, use, modify and distribute + * this software in source and/or binary form. No title or ownership is * transferred hereby. * - * 1) Any source code used, modified or distributed must reproduce and retain + * 1) Any source code used, modified or distributed must reproduce and retain * this copyright notice and list of conditions as they appear in the source * file. * - * 2) No right is granted to use any trade name, trademark, or logo of Digital - * Equipment Corporation. Neither the "Digital Equipment Corporation" name - * nor any trademark or logo of Digital Equipment Corporation may be used - * to endorse or promote products derived from this software without the + * 2) No right is granted to use any trade name, trademark, or logo of Digital + * Equipment Corporation. Neither the "Digital Equipment Corporation" name + * nor any trademark or logo of Digital Equipment Corporation may be used + * to endorse or promote products derived from this software without the * prior written permission of Digital Equipment Corporation. * - * 3) This software is provided "AS-IS" and any express or implied warranties, - * including but not limited to, any implied warranties of merchantability, - * fitness for a particular purpose, or non-infringement are disclaimed. In - * no event shall DIGITAL be liable for any damages whatsoever, and in - * particular, DIGITAL shall not be liable for special, indirect, - * consequential, or incidental damages or damages for - * lost profits, loss of revenue or loss of use, whether such damages arise - * in contract, - * negligence, tort, under statute, in equity, at law or otherwise, even if - * advised of the possibility of such damage. + * 3) This software is provided "AS-IS" and any express or implied warranties, + * including but not limited to, any implied warranties of merchantability, + * fitness for a particular purpose, or non-infringement are disclaimed. In + * no event shall DIGITAL be liable for any damages whatsoever, and in + * particular, DIGITAL shall not be liable for special, indirect, + * consequential, or incidental damages or damages for + * lost profits, loss of revenue or loss of use, whether such damages arise + * in contract, + * negligence, tort, under statute, in equity, at law or otherwise, even if + * advised of the possibility of such damage. * */ @@ -356,8 +356,8 @@ { unsigned int ret; __asm__ __volatile__("in%B0 (%1)" : - "=a" (ret) : - "d" (port)); + "=a" (ret) : + "d" (port)); return ret; } @@ -367,8 +367,8 @@ { unsigned int ret; __asm__ __volatile__("in%W0 (%1)" : - "=a" (ret) : - "d" (port)); + "=a" (ret) : + "d" (port)); return ret; } @@ -378,8 +378,8 @@ { unsigned int ret; __asm__ __volatile__("in%L0 (%1)" : - "=a" (ret) : - "d" (port)); + "=a" (ret) : + "d" (port)); return ret; } @@ -395,7 +395,7 @@ #define intr_disable() #define intr_enable() -#else +#else static __inline__ void intr_disable() diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/README b/board/MAI/bios_emulator/scitech/src/v86bios/README index 4b7d0fa..cb65674 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/README +++ b/board/MAI/bios_emulator/scitech/src/v86bios/README @@ -2,12 +2,12 @@ This is a preliminary version of a VGA softbooter for LINUX. It makes use of the of the vm86() call and is therefore only -usable on ix86 systems. +usable on ix86 systems. There are plans to port this program to use a x86 emulator like x86emu. Also it may be ported to other operating systems. So far it has been tested on a small number of cards. It might -well be that it will fail on your card. +well be that it will fail on your card. If you need to make modifications to the programs to be able to boot your card please let the author know. @@ -16,20 +16,17 @@ to be hardcoded. You can do this by editing debug.h. You can turn on a bunch of debug output. Other options allow you to boot the primary card (CONFIG_ACTIVE_DEVICE), save the bios -to a file (SAVE_BIOS), and map the original system bios +to a file (SAVE_BIOS), and map the original system bios (MAP_SYS_BIOS). The author wants to thank Hans Lermen (dosemu) and Kendall Bennett (x86emu) -for their support. +for their support. Parts of the code - especially in v86.c and io.c - are based on code taken from dosemu. Parts of the code in int.c are based on code taken from x86emu Egbert Eich. - - - diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c b/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c index 4173c95..6b12dff 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c +++ b/board/MAI/bios_emulator/scitech/src/v86bios/cbios.c @@ -57,18 +57,18 @@ Config.IoStatistics = IO_STATISTICS; Config.PrintIrq = PRINT_IRQ; Config.PrintPci = PRINT_PCI; - Config.ShowAllDev = SHOW_ALL_DEV; - Config.PrintIp = PRINT_IP; - Config.SaveBios = SAVE_BIOS; - Config.Trace = TRACE; - Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY; + Config.ShowAllDev = SHOW_ALL_DEV; + Config.PrintIp = PRINT_IP; + Config.SaveBios = SAVE_BIOS; + Config.Trace = TRACE; + Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY; Config.ConfigActiveDevice = CONFIG_ACTIVE_DEVICE; - Config.MapSysBios = MAP_SYS_BIOS; - Config.Resort = RESORT; - Config.FixRom = FIX_ROM; - Config.NoConsole = NO_CONSOLE; + Config.MapSysBios = MAP_SYS_BIOS; + Config.Resort = RESORT; + Config.FixRom = FIX_ROM; + Config.NoConsole = NO_CONSOLE; Config.Verbose = VERBOSE; - + if (!map()) exit(1); if (!copy_sys_bios()) @@ -79,7 +79,7 @@ exit(1); if (!copy_vbios(vbios_base)) exit(1); - + iopl(3); setup_io(); runBIOS(argc,argv); @@ -91,18 +91,18 @@ exit (1); } -int +int map(void) { void* mem; mem = mmap(0, (size_t)SIZE, - PROT_EXEC | PROT_READ | PROT_WRITE, - MAP_FIXED | MAP_PRIVATE | MAP_ANON, - -1, 0 ); + PROT_EXEC | PROT_READ | PROT_WRITE, + MAP_FIXED | MAP_PRIVATE | MAP_ANON, + -1, 0 ); if (mem != 0) { - perror("anonymous map"); - return (0); + perror("anonymous map"); + return (0); } memset(mem,0,SIZE); @@ -117,14 +117,14 @@ int mem_fd; if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) { - perror("opening memory"); - return (0); + perror("opening memory"); + return (0); } - - if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS) - goto Error; - if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF) - goto Error; + + if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS) + goto Error; + if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF) + goto Error; close(mem_fd); return (1); @@ -141,33 +141,33 @@ int mem_fd; #ifdef __ia64__ - if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) #else - if ((mem_fd = open(MEM_FILE,O_RDWR))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR))<0) #endif { - perror("opening memory"); - return 0; + perror("opening memory"); + return 0; } #ifndef __alpha__ if (mmap((void *) VRAM_START, (size_t) VRAM_SIZE, - PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED, - mem_fd, VRAM_START) == (void *) -1) + PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED, + mem_fd, VRAM_START) == (void *) -1) #else - if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */ - if (!_bus_base_sparse()) sparse_shift = 0; - if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift), - PROT_READ | PROT_WRITE, - MAP_SHARED, - mem_fd, (VRAM_START << sparse_shift) - | _bus_base_sparse())) == (void *) -1) + if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */ + if (!_bus_base_sparse()) sparse_shift = 0; + if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift), + PROT_READ | PROT_WRITE, + MAP_SHARED, + mem_fd, (VRAM_START << sparse_shift) + | _bus_base_sparse())) == (void *) -1) #endif { - perror("mmap error in map_hardware_ram"); - close(mem_fd); - return (0); - } + perror("mmap error in map_hardware_ram"); + close(mem_fd); + return (0); + } vram_mapped = 1; close(mem_fd); return (1); @@ -181,39 +181,39 @@ int size; if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) { - perror("opening memory"); - return (0); + perror("opening memory"); + return (0); } - if (lseek(mem_fd,(off_t) v_base, SEEK_SET) != (off_t) v_base) { - fprintf(stderr,"Cannot lseek\n"); - goto Error; + if (lseek(mem_fd,(off_t) v_base, SEEK_SET) != (off_t) v_base) { + fprintf(stderr,"Cannot lseek\n"); + goto Error; } tmp = (unsigned char *)malloc(3); if (read(mem_fd, (char *)tmp, (size_t) 3) != (size_t) 3) { - fprintf(stderr,"Cannot read\n"); - goto Error; + fprintf(stderr,"Cannot read\n"); + goto Error; } - if (lseek(mem_fd,(off_t) v_base,SEEK_SET) != (off_t) v_base) - goto Error; + if (lseek(mem_fd,(off_t) v_base,SEEK_SET) != (off_t) v_base) + goto Error; if (*tmp != 0x55 || *(tmp+1) != 0xAA ) { - fprintf(stderr,"No bios found at: 0x%lx\n",v_base); - goto Error; + fprintf(stderr,"No bios found at: 0x%lx\n",v_base); + goto Error; } #ifdef DEBUG - dprint((unsigned long)tmp,0x100); + dprint((unsigned long)tmp,0x100); #endif size = *(tmp+2) * 512; if (read(mem_fd, (char *)v_base, (size_t) size) != (size_t) size) { - fprintf(stderr,"Cannot read\n"); - goto Error; + fprintf(stderr,"Cannot read\n"); + goto Error; } free(tmp); close(mem_fd); if (!chksum((CARD8*)v_base)) - return (0); + return (0); return (1); @@ -233,7 +233,7 @@ unmap_vram(void) { if (!vram_mapped) return; - + munmap((void*)VRAM_START,VRAM_SIZE); vram_mapped = 0; } @@ -259,15 +259,15 @@ int mem_fd; CARD32 vbase; void *map; - + if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) { perror("opening memory"); return (0); } - + if ((map = mmap((void *) 0, (size_t) 0x2000, - PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED, - mem_fd, 0)) == (void *)-1) { + PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED, + mem_fd, 0)) == (void *)-1) { perror("mmap error in map_hardware_ram"); close(mem_fd); return (0); @@ -282,7 +282,7 @@ */ bios_var = (char *)malloc(BIOS_MEM); memcpy(bios_var,0,BIOS_MEM); - + vbase = (*((CARD16*)(0x10 << 2) + 1)) << 4; fprintf(stderr,"vbase: 0x%x\n",vbase); return vbase; @@ -294,28 +294,28 @@ int mem_fd; void *map; memType i; - + #ifdef __ia64__ - if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) #else - if ((mem_fd = open(MEM_FILE,O_RDWR))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR))<0) #endif { - perror("opening memory"); - return; + perror("opening memory"); + return; } - + if ((map = mmap((void *) 0, (size_t) 0x2000, - PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED, - mem_fd, 0)) == (void *)-1) { + PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED, + mem_fd, 0)) == (void *)-1) { perror("mmap error in map_hardware_ram"); close(mem_fd); return; } for (i = 0; i < BIOS_MEM; i++) { - if (bios_var[i] != *(CARD8*)i) - *((CARD8*)map + i) = *(CARD8*)i; + if (bios_var[i] != *(CARD8*)i) + *((CARD8*)map + i) = *(CARD8*)i; } munmap(map,0x2000); @@ -338,23 +338,23 @@ while ((c = getopt(argc,argv,"a:b:c:d:e:i:")) != EOF) { switch (c) { case 'a': - regs->ax = strtol(optarg,NULL,0); - break; + regs->ax = strtol(optarg,NULL,0); + break; case 'b': - regs->bx = strtol(optarg,NULL,0); - break; + regs->bx = strtol(optarg,NULL,0); + break; case 'c': - regs->cx = strtol(optarg,NULL,0); - break; + regs->cx = strtol(optarg,NULL,0); + break; case 'd': - regs->dx = strtol(optarg,NULL,0); - break; + regs->dx = strtol(optarg,NULL,0); + break; case 'e': - regs->es = strtol(optarg,NULL,0); - break; + regs->es = strtol(optarg,NULL,0); + break; case 'i': - regs->di = strtol(optarg,NULL,0); - break; + regs->di = strtol(optarg,NULL,0); + break; } } } @@ -367,10 +367,10 @@ CARD8 val = 0; int i; - size = *(start+2) * 512; + size = *(start+2) * 512; for (i = 0; i> 4); j++) { - printf ("\n0x%lx: ",(unsigned long)c); - for (i = 0; i<16; i++) - printf("%x ",(unsigned char) (*(c++))); + printf ("\n0x%lx: ",(unsigned long)c); + for (i = 0; i<16; i++) + printf("%x ",(unsigned char) (*(c++))); } printf("\n"); } diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/command.c b/board/MAI/bios_emulator/scitech/src/v86bios/command.c index 5494ff8..e2bce6d 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/command.c +++ b/board/MAI/bios_emulator/scitech/src/v86bios/command.c @@ -15,24 +15,24 @@ static int len = 0; int tmp_len; char *buff; - + if (len <= 0) { buff = readline(PROMPT); add_history(buff); - + if ((tmp_len = strlen(buff)) > line_len) { - free(line); - line = malloc(tmp_len); - line_len = tmp_len; + free(line); + line = malloc(tmp_len); + line_len = tmp_len; } sprintf(line,"%s\n",buff); free(buff); line_pointer = line; len = strlen(line); } - - *num = max_num > len? len : max_num; - strncpy(buf,line_pointer,*num); + + *num = max_num > len? len : max_num; + strncpy(buf,line_pointer,*num); line_pointer = line_pointer + *num; len = len - *num; } diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/console.c b/board/MAI/bios_emulator/scitech/src/v86bios/console.c index 4680515..5e9c924 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/console.c +++ b/board/MAI/bios_emulator/scitech/src/v86bios/console.c @@ -36,43 +36,43 @@ char VTname[11]; console Con = {-1,-1}; struct vt_stat vts; - + if (NO_CONSOLE) - return Con; - + return Con; + if ((fd = open("/dev/tty0",O_WRONLY,0)) < 0) - return Con; + return Con; if ((ioctl(fd, VT_OPENQRY, &VTno) < 0) || (VTno == -1)) { - fprintf(stderr,"cannot get a vt\n"); - return Con; + fprintf(stderr,"cannot get a vt\n"); + return Con; } - + close(fd); sprintf(VTname,"/dev/tty%i",VTno); - + if ((fd = open(VTname, O_RDWR|O_NDELAY, 0)) < 0) { - fprintf(stderr,"cannot open console\n"); - return Con; + fprintf(stderr,"cannot open console\n"); + return Con; } - - if (ioctl(fd, VT_GETSTATE, &vts) == 0) - Con.vt = vts.v_active; + + if (ioctl(fd, VT_GETSTATE, &vts) == 0) + Con.vt = vts.v_active; if (ioctl(fd, VT_ACTIVATE, VTno) != 0) { - fprintf(stderr,"cannot activate console\n"); - close(fd); - return Con; + fprintf(stderr,"cannot activate console\n"); + close(fd); + return Con; } if (ioctl(fd, VT_WAITACTIVE, VTno) != 0) { - fprintf(stderr,"wait for active console failed\n"); - close(fd); - return Con; + fprintf(stderr,"wait for active console failed\n"); + close(fd); + return Con; } #if 0 if (ioctl(fd, KDSETMODE, KD_GRAPHICS) < 0) { - close(fd); - return Con; + close(fd); + return Con; } #endif Con.fd = fd; @@ -83,22 +83,13 @@ close_console(console Con) { if (Con.fd == -1) - return; - + return; + #if 0 ioctl(Con.fd, KDSETMODE, KD_TEXT); #endif if (Con.vt >=0) - ioctl(Con.fd, VT_ACTIVATE, Con.vt); - + ioctl(Con.fd, VT_ACTIVATE, Con.vt); + close(Con.fd); } - - - - - - - - - diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/debug.h b/board/MAI/bios_emulator/scitech/src/v86bios/debug.h index bc0b111..c5c906b 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/debug.h +++ b/board/MAI/bios_emulator/scitech/src/v86bios/debug.h @@ -19,7 +19,7 @@ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR * PERFORMANCE OF THIS SOFTWARE. */ -//#define V86BIOS_DEBUG +/*#define V86BIOS_DEBUG */ /* * uncomment the following if needed @@ -32,7 +32,7 @@ #define PRINT_PCI 1 #define PRINT_IP 0 /* print IP address with PIO information */ #define TRACE 0 /* turn on debugger in x86emu */ - /* requires x86emu compiled with -DDEBUG */ + /* requires x86emu compiled with -DDEBUG */ /* * these should not be here. @@ -48,10 +48,8 @@ #define SHOW_ALL_DEV 0 #define VERBOSE 0 -//#define V_BIOS 0xe0000 -//#define V_BIOS 0xe4000 - - +/*#define V_BIOS 0xe0000 */ +/*#define V_BIOS 0xe4000 */ #if (PRINT_IO == 1) && (PRINT_PORT == 0) diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/int.c b/board/MAI/bios_emulator/scitech/src/v86bios/int.c index 40b17b1..3504c6c 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/int.c +++ b/board/MAI/bios_emulator/scitech/src/v86bios/int.c @@ -37,11 +37,11 @@ switch (num) { case 0x10: case 0x42: - return (int42_handler(num,regs)); + return (int42_handler(num,regs)); case 0x1A: - return (int1A_handler(regs)); + return (int1A_handler(regs)); default: - return 0; + return 0; } return 0; } @@ -53,38 +53,38 @@ CARD32 val; i_printf("int 0x%x: ax:0x%lx bx:0x%lx cx:0x%lx dx:0x%lx\n",num, - regs->eax,regs->ebx, regs->ecx, regs->edx); - + regs->eax,regs->ebx, regs->ecx, regs->edx); + /* * video bios has modified these - * leave it to the video bios to do this */ val = getIntVect(num); - if (val != 0xF000F065) + if (val != 0xF000F065) return 0; - + if ((regs->ebx & 0xff) == 0x32) { - switch (regs->eax & 0xFFFF) { - case 0x1200: - i_printf("enabling video\n"); - c = inb(0x3cc); - c |= 0x02; - outb(0x3c2,c); - return 1; - case 0x1201: - i_printf("disabling video\n"); - c = inb(0x3cc); - c &= ~0x02; - outb(0x3c2,c); - return 1; - default: - } + switch (regs->eax & 0xFFFF) { + case 0x1200: + i_printf("enabling video\n"); + c = inb(0x3cc); + c |= 0x02; + outb(0x3c2,c); + return 1; + case 0x1201: + i_printf("disabling video\n"); + c = inb(0x3cc); + c &= ~0x02; + outb(0x3c2,c); + return 1; + default: + } } if (num == 0x42) - return 1; + return 1; else - return 0; + return 0; } #define SUCCESSFUL 0x00 @@ -100,139 +100,139 @@ if (! CurrentPci) return 0; /* oops */ i_printf("int 0x1a: ax=0x%lx bx=0x%lx cx=0x%lx dx=0x%lx di=0x%lx" - " si=0x%lx\n", regs->eax,regs->ebx,regs->ecx,regs->edx, - regs->edi,regs->esi); + " si=0x%lx\n", regs->eax,regs->ebx,regs->ecx,regs->edx, + regs->edi,regs->esi); switch (regs->eax & 0xFFFF) { case 0xb101: - regs->eax &= 0xFF00; /* no config space/special cycle support */ - regs->edx = 0x20494350; /* " ICP" */ - regs->ebx = 0x0210; /* Version 2.10 */ - regs->ecx &= 0xFF00; - regs->ecx |= (pciMaxBus & 0xFF); /* Max bus number in system */ - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - i_printf("ax=0x%lx dx=0x%lx bx=0x%lx cx=0x%lx flags=0x%lx\n", - regs->eax,regs->edx,regs->ebx,regs->ecx,regs->eflags); - return 1; + regs->eax &= 0xFF00; /* no config space/special cycle support */ + regs->edx = 0x20494350; /* " ICP" */ + regs->ebx = 0x0210; /* Version 2.10 */ + regs->ecx &= 0xFF00; + regs->ecx |= (pciMaxBus & 0xFF); /* Max bus number in system */ + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + i_printf("ax=0x%lx dx=0x%lx bx=0x%lx cx=0x%lx flags=0x%lx\n", + regs->eax,regs->edx,regs->ebx,regs->ecx,regs->eflags); + return 1; case 0xb102: - if (((regs->edx & 0xFFFF) == CurrentPci->VendorID) && - ((regs->ecx & 0xFFFF) == CurrentPci->DeviceID) && - (regs->esi == 0)) { - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - regs->ebx = pciSlotBX(CurrentPci); - } - else if (Config.ShowAllDev && - (pPci = findPciDevice(regs->edx,regs->ecx,regs->esi)) != NULL) { - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - regs->ebx = pciSlotBX(pPci); - } else { - regs->eax = (regs->eax & 0x00FF) | (DEVICE_NOT_FOUND << 8); - regs->eflags |= ((unsigned long)0x01); /* set carry flag */ - } - i_printf("ax=0x%lx bx=0x%lx flags=0x%lx\n", - regs->eax,regs->ebx,regs->eflags); - return 1; + if (((regs->edx & 0xFFFF) == CurrentPci->VendorID) && + ((regs->ecx & 0xFFFF) == CurrentPci->DeviceID) && + (regs->esi == 0)) { + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + regs->ebx = pciSlotBX(CurrentPci); + } + else if (Config.ShowAllDev && + (pPci = findPciDevice(regs->edx,regs->ecx,regs->esi)) != NULL) { + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + regs->ebx = pciSlotBX(pPci); + } else { + regs->eax = (regs->eax & 0x00FF) | (DEVICE_NOT_FOUND << 8); + regs->eflags |= ((unsigned long)0x01); /* set carry flag */ + } + i_printf("ax=0x%lx bx=0x%lx flags=0x%lx\n", + regs->eax,regs->ebx,regs->eflags); + return 1; case 0xb103: - if (((regs->ecx & 0xFF) == CurrentPci->Interface) && - (((regs->ecx & 0xFF00) >> 8) == CurrentPci->SubClass) && - (((regs->ecx & 0xFFFF0000) >> 16) == CurrentPci->BaseClass) && - ((regs->esi & 0xff) == 0)) { - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->ebx = pciSlotBX(CurrentPci); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - } - else if (Config.ShowAllDev - && (pPci = findPciClass(regs->ecx & 0xFF, (regs->ecx & 0xff00) >> 8, - (regs->ecx & 0xffff0000) >> 16, regs->esi)) != NULL) { - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->ebx = pciSlotBX(pPci); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - } else { - regs->eax = (regs->eax & 0x00FF) | (DEVICE_NOT_FOUND << 8); - regs->eflags |= ((unsigned long)0x01); /* set carry flag */ - } - i_printf("ax=0x%lx flags=0x%lx\n",regs->eax,regs->eflags); - return 1; + if (((regs->ecx & 0xFF) == CurrentPci->Interface) && + (((regs->ecx & 0xFF00) >> 8) == CurrentPci->SubClass) && + (((regs->ecx & 0xFFFF0000) >> 16) == CurrentPci->BaseClass) && + ((regs->esi & 0xff) == 0)) { + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->ebx = pciSlotBX(CurrentPci); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + } + else if (Config.ShowAllDev + && (pPci = findPciClass(regs->ecx & 0xFF, (regs->ecx & 0xff00) >> 8, + (regs->ecx & 0xffff0000) >> 16, regs->esi)) != NULL) { + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->ebx = pciSlotBX(pPci); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + } else { + regs->eax = (regs->eax & 0x00FF) | (DEVICE_NOT_FOUND << 8); + regs->eflags |= ((unsigned long)0x01); /* set carry flag */ + } + i_printf("ax=0x%lx flags=0x%lx\n",regs->eax,regs->eflags); + return 1; case 0xb108: - i_printf("Slot=0x%x\n",CurrentPci->Slot.l); - if ((Slot = findPci(regs->ebx))) { - regs->ecx &= 0xFFFFFF00; - regs->ecx |= PciRead8(regs->edi,Slot); - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - } else { - regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); - regs->eflags |= ((unsigned long)0x01); /* set carry flag */ - } - i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n", - regs->eax,regs->ecx,regs->eflags); - return 1; + i_printf("Slot=0x%x\n",CurrentPci->Slot.l); + if ((Slot = findPci(regs->ebx))) { + regs->ecx &= 0xFFFFFF00; + regs->ecx |= PciRead8(regs->edi,Slot); + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + } else { + regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); + regs->eflags |= ((unsigned long)0x01); /* set carry flag */ + } + i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n", + regs->eax,regs->ecx,regs->eflags); + return 1; case 0xb109: - i_printf("Slot=0x%x\n",CurrentPci->Slot.l); - if ((Slot = findPci(regs->ebx))) { - regs->ecx &= 0xFFFF0000; - regs->ecx |= PciRead16(regs->edi,Slot); - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - } else { - regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); - regs->eflags |= ((unsigned long)0x01); /* set carry flag */ - } - i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n", - regs->eax,regs->ecx,regs->eflags); - return 1; + i_printf("Slot=0x%x\n",CurrentPci->Slot.l); + if ((Slot = findPci(regs->ebx))) { + regs->ecx &= 0xFFFF0000; + regs->ecx |= PciRead16(regs->edi,Slot); + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + } else { + regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); + regs->eflags |= ((unsigned long)0x01); /* set carry flag */ + } + i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n", + regs->eax,regs->ecx,regs->eflags); + return 1; case 0xb10a: - i_printf("Slot=0x%x\n",CurrentPci->Slot.l); - if ((Slot = findPci(regs->ebx))) { - regs->ecx &= 0; - regs->ecx |= PciRead32(regs->edi,Slot); - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - } else { - regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); - regs->eflags |= ((unsigned long)0x01); /* set carry flag */ - } - i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n", - regs->eax,regs->ecx,regs->eflags); - return 1; + i_printf("Slot=0x%x\n",CurrentPci->Slot.l); + if ((Slot = findPci(regs->ebx))) { + regs->ecx &= 0; + regs->ecx |= PciRead32(regs->edi,Slot); + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + } else { + regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); + regs->eflags |= ((unsigned long)0x01); /* set carry flag */ + } + i_printf("ax=0x%lx cx=0x%lx flags=0x%lx\n", + regs->eax,regs->ecx,regs->eflags); + return 1; case 0xb10b: - i_printf("Slot=0x%x\n",CurrentPci->Slot.l); - if ((Slot = findPci(regs->ebx))) { - PciWrite8(regs->edi,(CARD8)regs->ecx,Slot); - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - } else { - regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); - regs->eflags |= ((unsigned long)0x01); /* set carry flag */ - } - i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags); - return 1; + i_printf("Slot=0x%x\n",CurrentPci->Slot.l); + if ((Slot = findPci(regs->ebx))) { + PciWrite8(regs->edi,(CARD8)regs->ecx,Slot); + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + } else { + regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); + regs->eflags |= ((unsigned long)0x01); /* set carry flag */ + } + i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags); + return 1; case 0xb10c: - i_printf("Slot=0x%x\n",CurrentPci->Slot.l); - if ((Slot = findPci(regs->ebx))) { - PciWrite16(regs->edi,(CARD16)regs->ecx,Slot); - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - } else { - regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); - regs->eflags |= ((unsigned long)0x01); /* set carry flag */ - } - i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags); - return 1; + i_printf("Slot=0x%x\n",CurrentPci->Slot.l); + if ((Slot = findPci(regs->ebx))) { + PciWrite16(regs->edi,(CARD16)regs->ecx,Slot); + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + } else { + regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); + regs->eflags |= ((unsigned long)0x01); /* set carry flag */ + } + i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags); + return 1; case 0xb10d: - i_printf("Slot=0x%x\n",CurrentPci->Slot.l); - if ((Slot = findPci(regs->ebx))) { - PciWrite32(regs->edi,(CARD32)regs->ecx,Slot); - regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); - regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ - } else { - regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); - regs->eflags |= ((unsigned long)0x01); /* set carry flag */ - } - i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags); - return 1; + i_printf("Slot=0x%x\n",CurrentPci->Slot.l); + if ((Slot = findPci(regs->ebx))) { + PciWrite32(regs->edi,(CARD32)regs->ecx,Slot); + regs->eax = (regs->eax & 0x00FF) | (SUCCESSFUL << 8); + regs->eflags &= ~((unsigned long)0x01); /* clear carry flag */ + } else { + regs->eax = (regs->eax & 0x00FF) | (BAD_REGISTER_NUMBER << 8); + regs->eflags |= ((unsigned long)0x01); /* set carry flag */ + } + i_printf("ax=0x%lx flags=0x%lx\n", regs->eax,regs->eflags); + return 1; default: - return 0; + return 0; } } diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/io.c b/board/MAI/bios_emulator/scitech/src/v86bios/io.c index 129e24f..f35b43e 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/io.c +++ b/board/MAI/bios_emulator/scitech/src/v86bios/io.c @@ -38,17 +38,17 @@ { register int inc = d_f ? -1 : 1; CARD8 *dst = base; - + p_printf(" rep_insb(%#x) %d bytes at %p %s", - port, count, base, d_f?"up":"down"); + port, count, base, d_f?"up":"down"); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); r_inb++; while (count--) { - *dst = inb(port); - dst += inc; + *dst = inb(port); + dst += inc; } return (dst-base); } @@ -58,17 +58,17 @@ { register int inc = d_f ? -1 : 1; CARD16 *dst = base; - + p_printf(" rep_insw(%#x) %d bytes at %p %s", - port, count, base, d_f?"up":"down"); + port, count, base, d_f?"up":"down"); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); r_inw++; while (count--) { - *dst = inw(port); - dst += inc; + *dst = inw(port); + dst += inc; } return (dst-base); } @@ -78,17 +78,17 @@ { register int inc = d_f ? -1 : 1; CARD32 *dst = base; - + p_printf(" rep_insl(%#x) %d bytes at %p %s", - port, count, base, d_f?"up":"down"); + port, count, base, d_f?"up":"down"); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); r_inl++; while (count--) { - *dst = inl(port); - dst += inc; + *dst = inl(port); + dst += inc; } return (dst-base); } @@ -98,17 +98,17 @@ { register int inc = d_f ? -1 : 1; CARD8 *dst = base; - + p_printf(" rep_outb(%#x) %d bytes at %p %s", - port, count, base, d_f?"up":"down"); + port, count, base, d_f?"up":"down"); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); r_outb++; while (count--) { - outb(port,*dst); - dst += inc; + outb(port,*dst); + dst += inc; } return (dst-base); } @@ -118,17 +118,17 @@ { register int inc = d_f ? -1 : 1; CARD16 *dst = base; - + p_printf(" rep_outw(%#x) %d bytes at %p %s", - port, count, base, d_f?"up":"down"); + port, count, base, d_f?"up":"down"); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); r_outw++; while (count--) { - outw(port,*dst); - dst += inc; + outw(port,*dst); + dst += inc; } return (dst-base); } @@ -138,17 +138,17 @@ { register int inc = d_f ? -1 : 1; CARD32 *dst = base; - + p_printf(" rep_outl(%#x) %d bytes at %p %s", - port, count, base, d_f?"up":"down"); + port, count, base, d_f?"up":"down"); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); r_outl++; while (count--) { - outl(port,*dst); - dst += inc; + outl(port,*dst); + dst += inc; } return (dst-base); } @@ -161,7 +161,7 @@ val = inb(port); p_printf(" inb(%#x) = %2.2x",port,val); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); return val; @@ -175,7 +175,7 @@ val = inw(port); p_printf(" inw(%#x) = %4.4x",port,val); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); return val; @@ -188,13 +188,13 @@ in_l++; #ifdef NEED_PCI_IO if (cfg1in(port,&val)) - return val; + return val; else #endif val = inl(port); p_printf(" inl(%#x) = %8.8x",port,val); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); return val; @@ -206,7 +206,7 @@ out_b++; p_printf(" outb(%#x, %2.2x)",port,val); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); outb(port,val); @@ -218,7 +218,7 @@ out_w++; p_printf(" outw(%#x, %4.4x)",port,val); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); outw(port,val); @@ -230,12 +230,12 @@ out_l++; p_printf(" outl(%#x, %8.8x)",port,val); if (Config.PrintIp) - p_printf(" %x\n",getIP()); + p_printf(" %x\n",getIP()); else p_printf("\n"); #ifdef NEED_PCI_IO if (cfg1out(port,val)) - return; + return; #endif outl(port,val); } @@ -244,9 +244,9 @@ io_statistics(void) { p_printf("rep: inb: %i, inw: %i, inl: %i, outb: %i, outw: %i, outl: %i\n", - r_inb,r_inw,r_inl,r_outb,r_outw,r_outl); + r_inb,r_inw,r_inl,r_outb,r_outw,r_outl); p_printf("inb: %i, inw: %i, inl: %i, outb: %i, outw: %i, outl: %i\n", - in_b,in_w,in_l,out_b,out_w,out_l); + in_b,in_w,in_l,out_b,out_w,out_l); } void diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/main.c b/board/MAI/bios_emulator/scitech/src/v86bios/main.c index b73d057..15f9115 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/main.c +++ b/board/MAI/bios_emulator/scitech/src/v86bios/main.c @@ -45,12 +45,12 @@ #define V_BIOS_SIZE 0x1FFFF #define BIOS_START 0x7C00 /* default BIOS entry */ -//CARD8 code[] = { 0xb8 , 0xf0 , 0xf0, 0xf4 }; +/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0, 0xf4 }; */ #define VB_X(x) (V_BIOS >> x) & 0xFF CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xf4 }; -//CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xb8, 0x03, 0x00, -//0xcd, 0x10, 0xf4 }; -//CARD8 code[] = { 0xb8 , 0xf0 , 0xf0 ,0xf4 }; +/*CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xb8, 0x03, 0x00, */ +/*0xcd, 0x10, 0xf4 }; */ +/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0 ,0xf4 }; */ static void sig_handler(int); static int map(void); @@ -87,154 +87,154 @@ Config.IoStatistics = IO_STATISTICS; Config.PrintIrq = PRINT_IRQ; Config.PrintPci = PRINT_PCI; - Config.ShowAllDev = SHOW_ALL_DEV; - Config.PrintIp = PRINT_IP; - Config.SaveBios = SAVE_BIOS; - Config.Trace = TRACE; - Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY; + Config.ShowAllDev = SHOW_ALL_DEV; + Config.PrintIp = PRINT_IP; + Config.SaveBios = SAVE_BIOS; + Config.Trace = TRACE; + Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY; Config.ConfigActiveDevice = CONFIG_ACTIVE_DEVICE; - Config.MapSysBios = MAP_SYS_BIOS; - Config.Resort = RESORT; - Config.FixRom = FIX_ROM; - Config.NoConsole = NO_CONSOLE; + Config.MapSysBios = MAP_SYS_BIOS; + Config.Resort = RESORT; + Config.FixRom = FIX_ROM; + Config.NoConsole = NO_CONSOLE; Config.Verbose = VERBOSE; if (!map()) - exit(1); - + exit(1); + if (!setup_system_bios()) - exit(1); - + exit(1); + iopl(3); setup_io(); - + scan_pci(); if (!CurrentPci && !Config.ConfigActiveDevice && !Config.ConfigActiveOnly) - exit (1); + exit (1); #endif Console = open_console(); if (Config.ConfigActiveOnly) { - CARD16 ax; - int activePci = 0; - int error = 0; - - while (CurrentPci) { - if (CurrentPci->active) { - activePci = 1; - if (!(mapPciRom(NULL) && chksum((CARD8*)V_BIOS))) - error = 1; - break; - } - CurrentPci = CurrentPci->next; - } - ax = ((CARD16)(CurrentPci->bus) << 8) - | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7); - P_printf("ax: 0x%x\n",ax); - setup_int_vect(); - if (!error && (activePci || copy_vbios())) { - - if (Config.SaveBios) save_bios_to_file(); - if (map_vram()) { - printf("initializing ISA\n"); - bootBIOS(0); - } - } - unmap_vram(); - sleep(1); + CARD16 ax; + int activePci = 0; + int error = 0; + + while (CurrentPci) { + if (CurrentPci->active) { + activePci = 1; + if (!(mapPciRom(NULL) && chksum((CARD8*)V_BIOS))) + error = 1; + break; + } + CurrentPci = CurrentPci->next; + } + ax = ((CARD16)(CurrentPci->bus) << 8) + | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7); + P_printf("ax: 0x%x\n",ax); + setup_int_vect(); + if (!error && (activePci || copy_vbios())) { + + if (Config.SaveBios) save_bios_to_file(); + if (map_vram()) { + printf("initializing ISA\n"); + bootBIOS(0); + } + } + unmap_vram(); + sleep(1); } else { - /* disable primary card */ - save_msr = inb(0x3CC); - save_vse = inb(0x3C3); - save_46e8 = inb(0x46e8); - save_pos102 = inb(0x102); - - signal(2,sig_handler); - signal(11,sig_handler); - - outb(0x3C2,~(CARD8)0x03 & save_msr); - outb(0x3C3,~(CARD8)0x01 & save_vse); - outb(0x46e8, ~(CARD8)0x08 & save_46e8); - outb(0x102, ~(CARD8)0x01 & save_pos102); - - pciVideoDisable(); - - while (CurrentPci) { - CARD16 ax; - - if (CurrentPci->active) { - Active_is_Pci = 1; - if (!Config.ConfigActiveDevice) { - CurrentPci = CurrentPci->next; - continue; - } - } - - EnableCurrent(); - - if (CurrentPci->active) { - outb(0x102, save_pos102); - outb(0x46e8, save_46e8); - outb(0x3C3, save_vse); - outb(0x3C2, save_msr); - } - - /* clear interrupt vectors */ - setup_int_vect(); - - ax = ((CARD16)(CurrentPci->bus) << 8) - | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7); - P_printf("ax: 0x%x\n",ax); - - if (!((mapPciRom(NULL) && chksum((CARD8*)V_BIOS)) - || (CurrentPci->active && copy_vbios()))) { - CurrentPci = CurrentPci->next; - continue; - } - if (!map_vram()) { - CurrentPci = CurrentPci->next; - continue; - } - if (Config.SaveBios) save_bios_to_file(); - printf("initializing PCI bus: %i dev: %i func: %i\n",CurrentPci->bus, - CurrentPci->dev,CurrentPci->func); - bootBIOS(ax); - unmap_vram(); - - CurrentPci = CurrentPci->next; - } - - /* We have an ISA device - configure if requested */ - if (!Active_is_Pci && Config.ConfigActiveDevice) { - pciVideoDisable(); - - outb(0x102, save_pos102); - outb(0x46e8, save_46e8); - outb(0x3C3, save_vse); - outb(0x3C2, save_msr); + /* disable primary card */ + save_msr = inb(0x3CC); + save_vse = inb(0x3C3); + save_46e8 = inb(0x46e8); + save_pos102 = inb(0x102); - setup_int_vect(); - if (copy_vbios()) { - - if (Config.SaveBios) save_bios_to_file(); - if (map_vram()) { - printf("initializing ISA\n"); - bootBIOS(0); - } - } - - unmap_vram(); - sleep(1); - } - - pciVideoRestore(); + signal(2,sig_handler); + signal(11,sig_handler); - outb(0x102, save_pos102); - outb(0x46e8, save_46e8); - outb(0x3C3, save_vse); - outb(0x3C2, save_msr); + outb(0x3C2,~(CARD8)0x03 & save_msr); + outb(0x3C3,~(CARD8)0x01 & save_vse); + outb(0x46e8, ~(CARD8)0x08 & save_46e8); + outb(0x102, ~(CARD8)0x01 & save_pos102); + + pciVideoDisable(); + + while (CurrentPci) { + CARD16 ax; + + if (CurrentPci->active) { + Active_is_Pci = 1; + if (!Config.ConfigActiveDevice) { + CurrentPci = CurrentPci->next; + continue; + } + } + + EnableCurrent(); + + if (CurrentPci->active) { + outb(0x102, save_pos102); + outb(0x46e8, save_46e8); + outb(0x3C3, save_vse); + outb(0x3C2, save_msr); + } + + /* clear interrupt vectors */ + setup_int_vect(); + + ax = ((CARD16)(CurrentPci->bus) << 8) + | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7); + P_printf("ax: 0x%x\n",ax); + + if (!((mapPciRom(NULL) && chksum((CARD8*)V_BIOS)) + || (CurrentPci->active && copy_vbios()))) { + CurrentPci = CurrentPci->next; + continue; + } + if (!map_vram()) { + CurrentPci = CurrentPci->next; + continue; + } + if (Config.SaveBios) save_bios_to_file(); + printf("initializing PCI bus: %i dev: %i func: %i\n",CurrentPci->bus, + CurrentPci->dev,CurrentPci->func); + bootBIOS(ax); + unmap_vram(); + + CurrentPci = CurrentPci->next; + } + + /* We have an ISA device - configure if requested */ + if (!Active_is_Pci && Config.ConfigActiveDevice) { + pciVideoDisable(); + + outb(0x102, save_pos102); + outb(0x46e8, save_46e8); + outb(0x3C3, save_vse); + outb(0x3C2, save_msr); + + setup_int_vect(); + if (copy_vbios()) { + + if (Config.SaveBios) save_bios_to_file(); + if (map_vram()) { + printf("initializing ISA\n"); + bootBIOS(0); + } + } + + unmap_vram(); + sleep(1); + } + + pciVideoRestore(); + + outb(0x102, save_pos102); + outb(0x46e8, save_46e8); + outb(0x3C3, save_vse); + outb(0x3C2, save_msr); } - + close_console(Console); #ifdef DELETE iopl(0); @@ -243,24 +243,24 @@ printf("done !\n"); #endif if (Config.IoStatistics) - io_statistics(); + io_statistics(); #ifdef DELETE exit(0); #endif } -int +int map(void) { void* mem; mem = mmap(0, (size_t)SIZE, - PROT_EXEC | PROT_READ | PROT_WRITE, - MAP_FIXED | MAP_PRIVATE | MAP_ANON, - -1, 0 ); + PROT_EXEC | PROT_READ | PROT_WRITE, + MAP_FIXED | MAP_PRIVATE | MAP_ANON, + -1, 0 ); if (mem != 0) { - perror("anonymous map"); - return (0); + perror("anonymous map"); + return (0); } memset(mem,0,SIZE); @@ -294,33 +294,33 @@ int mem_fd; #ifdef __ia64__ - if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) #else - if ((mem_fd = open(MEM_FILE,O_RDWR))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR))<0) #endif { - perror("opening memory"); - return 0; + perror("opening memory"); + return 0; } #ifndef __alpha__ if (mmap((void *) VRAM_START, (size_t) VRAM_SIZE, - PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED, - mem_fd, VRAM_START) == (void *) -1) + PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED, + mem_fd, VRAM_START) == (void *) -1) #else - if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */ - if (!_bus_base_sparse()) sparse_shift = 0; - if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift), - PROT_READ | PROT_WRITE, - MAP_SHARED, - mem_fd, (VRAM_START << sparse_shift) - | _bus_base_sparse())) == (void *) -1) + if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */ + if (!_bus_base_sparse()) sparse_shift = 0; + if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift), + PROT_READ | PROT_WRITE, + MAP_SHARED, + mem_fd, (VRAM_START << sparse_shift) + | _bus_base_sparse())) == (void *) -1) #endif { - perror("mmap error in map_hardware_ram"); - close(mem_fd); - return (0); - } + perror("mmap error in map_hardware_ram"); + close(mem_fd); + return (0); + } vram_mapped = 1; close(mem_fd); return (1); @@ -330,7 +330,7 @@ unmap_vram(void) { if (!vram_mapped) return; - + munmap((void*)VRAM_START,VRAM_SIZE); vram_mapped = 0; } @@ -343,39 +343,39 @@ int size; if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) { - perror("opening memory"); - return (0); + perror("opening memory"); + return (0); } - if (lseek(mem_fd,(off_t) V_BIOS, SEEK_SET) != (off_t) V_BIOS) { - fprintf(stderr,"Cannot lseek\n"); - goto Error; + if (lseek(mem_fd,(off_t) V_BIOS, SEEK_SET) != (off_t) V_BIOS) { + fprintf(stderr,"Cannot lseek\n"); + goto Error; } tmp = (unsigned char *)malloc(3); if (read(mem_fd, (char *)tmp, (size_t) 3) != (size_t) 3) { - fprintf(stderr,"Cannot read\n"); - goto Error; + fprintf(stderr,"Cannot read\n"); + goto Error; } - if (lseek(mem_fd,(off_t) V_BIOS,SEEK_SET) != (off_t) V_BIOS) - goto Error; + if (lseek(mem_fd,(off_t) V_BIOS,SEEK_SET) != (off_t) V_BIOS) + goto Error; if (*tmp != 0x55 || *(tmp+1) != 0xAA ) { #ifdef DEBUG - dprint((unsigned long)tmp,0x100); + dprint((unsigned long)tmp,0x100); #endif - fprintf(stderr,"No bios found at: 0x%x\n",V_BIOS); - goto Error; + fprintf(stderr,"No bios found at: 0x%x\n",V_BIOS); + goto Error; } size = *(tmp+2) * 512; if (read(mem_fd, (char *)V_BIOS, (size_t) size) != (size_t) size) { - fprintf(stderr,"Cannot read\n"); - goto Error; + fprintf(stderr,"Cannot read\n"); + goto Error; } free(tmp); close(mem_fd); if (!chksum((CARD8)V_BIOS)) - return (0); + return (0); return (1); @@ -392,14 +392,14 @@ int mem_fd; if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) { - perror("opening memory"); - return (0); + perror("opening memory"); + return (0); } - - if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS) - goto Error; - if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF) - goto Error; + + if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS) + goto Error; + if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF) + goto Error; close(mem_fd); return (1); @@ -415,16 +415,16 @@ { int i; CARD8 val; - + for ( i=0;;i++) { - val = code[i]; - *ptr++ = val; - if (val == 0xf4) break; + val = code[i]; + *ptr++ = val; + if (val == 0xf4) break; } return; } - -void + +void dprint(unsigned long start, unsigned long size) { int i,j; @@ -433,13 +433,13 @@ for (j = 0; j < (size >> 4); j++) { char *d = c; printf("\n0x%lx: ",(unsigned long)c); - for (i = 0; i<16; i++) - printf("%2.2x ",(unsigned char) (*(c++))); + for (i = 0; i<16; i++) + printf("%2.2x ",(unsigned char) (*(c++))); c = d; for (i = 0; i<16; i++) { - printf("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ? - (unsigned char) (*(c)): '.'); - c++; + printf("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ? + (unsigned char) (*(c)): '.'); + c++; } } printf("\n"); @@ -452,16 +452,16 @@ int size, count; char file_name[256]; int fd; - + sprintf(file_name,"bios_%i.fil",num); if ((fd = open(file_name,O_WRONLY | O_CREAT | O_TRUNC,00644)) == -1) - return; + return; size = (*(unsigned char*)(V_BIOS + 2)) * 512; #ifdef V86BIOS_DEBUG dprint(V_BIOS,20); #endif if ((count = write(fd,(void *)(V_BIOS),size)) != size) - fprintf(stderr,"only saved %i of %i bytes\n",size,count); + fprintf(stderr,"only saved %i of %i bytes\n",size,count); num++; } @@ -511,11 +511,11 @@ const CARD16 cs = 0x0000; const CARD16 ip = 0x0; int i; - + /* let the int vects point to the SYS_BIOS seg */ for (i=0; i<0x80; i++) { - ((CARD16*)0)[i<<1] = ip; - ((CARD16*)0)[(i<<1)+1] = cs; + ((CARD16*)0)[i<<1] = ip; + ((CARD16*)0)[(i<<1)+1] = cs; } /* video interrupts default location */ ((CARD16*)0)[(0x42<<1)+1] = 0xf000; @@ -566,13 +566,13 @@ { char *date = "06/01/99"; char *eisa_ident = "PCI/ISA"; - + #if MAP_SYS_BIOS if (!copy_sys_bios()) return 0; return 1; #endif -// memset((void *)0xF0000,0xf4,0xfff7); - +/* memset((void *)0xF0000,0xf4,0xfff7); */ + /* * we trap the "industry standard entry points" to the BIOS * and all other locations by filling them with "hlt" @@ -586,7 +586,7 @@ * and the font tables (0xfa6e-0xfe6d) * from the original bios here */ - + /* set bios date */ strcpy((char *)0xFFFF5,date); /* set up eisa ident string */ @@ -604,10 +604,10 @@ CARD8 val = 0; int i; - size = *(start+2) * 512; + size = *(start+2) * 512; for (i = 0; i>= shift; return 0xffUL & result; - } else + } else #endif return rdb(addr); } @@ -52,15 +52,15 @@ mem_rw(CARD32 addr) { unsigned long result, shift; -#if 1 +#if 1 if (addr >= 0xA0000 && addr <= 0xBFFFF) { addr -= 0xA0000; shift = (addr & 0x2) * 8; result = *(vuip)((unsigned long)vram_map+(addr<>= shift; return 0xffffUL & result; - } else + } else #endif return rdw(addr); } @@ -69,12 +69,12 @@ mem_rl(CARD32 addr) { unsigned long result; -#if 1 +#if 1 if (addr >= 0xA0000 && addr <= 0xBFFFF) { addr -= 0xA0000; result = *(vuip)((unsigned long)vram_map+(addr<= 0xA0000 && addr <= 0xBFFFF) { addr -= 0xA0000; *(vuip) ((unsigned long)vram_map + (addr << sparse_shift)) = b * 0x01010101; mem_barrier(); - } else + } else #endif wrb(addr,val); } @@ -97,13 +97,13 @@ mem_ww(CARD32 addr, CARD16 val) { unsigned int w = val & 0xffffU; -#if 1 +#if 1 if (addr >= 0xA0000 && addr <= 0xBFFFF) { addr -= 0xA0000; *(vuip)((unsigned long)vram_map+(addr<= 0xA0000 && addr <= 0xBFFFF) { addr -= 0xA0000; *(vuip)((unsigned long)vram_map+(addr< MAX_PCI_DEVICES) - continue; - } while (func < 8); - } - } while (++busidx < PCI_MAXBUS); + P_printf("PCI probing configuration type 1\n"); + busidx = 0; + numbus = 1; + idx = 0; + do { + P_printf("\nProbing for devices on PCI bus %d:\n", busidx); + for (cardnum = 0; cardnum < MAX_DEV_PER_VENDOR_CFG1; cardnum++) { + func = 0; + do { + /* loop over the different functions, if present */ + if (!checkSlotCfg1(busidx,cardnum,func)) + break; + readConfigSpaceCfg1(busidx,cardnum,func,reg); + + func = interpretConfigSpace(reg,busidx, + cardnum,func); + + if (idx++ > MAX_PCI_DEVICES) + continue; + } while (func < 8); + } + } while (++busidx < PCI_MAXBUS); #if defined(__alpha__) || defined(__powerpc__) || defined(__sparc__) || defined(__ia64__) - /* don't use outl() ;-) */ + /* don't use outl() ;-) */ #else - outl(PCI_MODE1_ADDRESS_REG, 0); + outl(PCI_MODE1_ADDRESS_REG, 0); #endif } else { - int slot; - - P_printf("PCI probing configuration type 2\n"); - busidx = 0; - numbus = 1; - idx = 0; - do { - for (slot=0xc0; slot<0xd0; i++) { - if (!checkSlotCfg2(busidx,slot)) - break; - readConfigSpaceCfg2(busidx,slot,reg); - - interpretConfigSpace(reg,busidx, - slot,0); - if (idx++ > MAX_PCI_DEVICES) - continue; - } - } while (++busidx < PCI_MAXBUS); + int slot; + + P_printf("PCI probing configuration type 2\n"); + busidx = 0; + numbus = 1; + idx = 0; + do { + for (slot=0xc0; slot<0xd0; i++) { + if (!checkSlotCfg2(busidx,slot)) + break; + readConfigSpaceCfg2(busidx,slot,reg); + + interpretConfigSpace(reg,busidx, + slot,0); + if (idx++ > MAX_PCI_DEVICES) + continue; + } + } while (++busidx < PCI_MAXBUS); } - - + + pciMaxBus = numbus - 1; P_printf("Number of buses in system: %i\n",pciMaxBus + 1); P_printf("Min PCI mem address: 0x%lx\n",pciMinMemReg); - + /* link buses */ pci_b1 = PciBuses; while (pci_b1) { - pci_b2 = PciBuses; - pci_b1->pBus = NULL; - while (pci_b2) { - if (pci_b1->primary == pci_b2->secondary) - pci_b1->pBus = pci_b2; - pci_b2 = pci_b2->next; - } - pci_b1 = pci_b1->next; + pci_b2 = PciBuses; + pci_b1->pBus = NULL; + while (pci_b2) { + if (pci_b1->primary == pci_b2->secondary) + pci_b1->pBus = pci_b2; + pci_b2 = pci_b2->next; + } + pci_b1 = pci_b1->next; } pci1 = PciStruct; while (pci1) { - pci_b2 = PciBuses; - pci1->pBus = NULL; - while (pci_b2) { - if (pci1->bus == pci_b2->secondary) - pci1->pBus = pci_b2; - pci_b2 = pci_b2->next; - } - pci1 = pci1->next; + pci_b2 = PciBuses; + pci1->pBus = NULL; + while (pci_b2) { + if (pci1->bus == pci_b2->secondary) + pci1->pBus = pci_b2; + pci_b2 = pci_b2->next; + } + pci1 = pci1->next; } if (RESORT) { - PciStructPtr tmp = PciStruct, tmp1; - PciStruct = NULL; - while (tmp) { - tmp1 = tmp->next; - tmp->next = PciStruct; - PciStruct = tmp; - tmp = tmp1; - } + PciStructPtr tmp = PciStruct, tmp1; + PciStruct = NULL; + while (tmp) { + tmp1 = tmp->next; + tmp->next = PciStruct; + PciStruct = tmp; + tmp = tmp1; + } } PciList = CurrentPci = PciStruct; } @@ -255,7 +254,7 @@ readPciCfg1(CARD32 reg) { CARD32 val; - + outl(PCI_MODE1_ADDRESS_REG, reg); val = inl(PCI_MODE1_DATA_REG); outl(PCI_MODE1_ADDRESS_REG, 0); @@ -279,7 +278,7 @@ CARD8 bus = (reg >> 16) & 0xff; CARD8 dev = (reg >> 11) & 0x1f; CARD8 num = reg & 0xff; - + outb(PCI_MODE2_ENABLE_REG, 0xF1); outb(PCI_MODE2_FORWARD_REG, bus); val = inl((dev << 8) + num); @@ -309,16 +308,16 @@ /* disable VGA routing on bridges */ PciBusPtr pbp = PciBuses; PciStructPtr pcp = PciStruct; - + while (pbp) { - writePci(pbp->Slot.l | 0x3c, pbp->bctl & ~(CARD32)(8<<16)); - pbp = pbp->next; + writePci(pbp->Slot.l | 0x3c, pbp->bctl & ~(CARD32)(8<<16)); + pbp = pbp->next; } /* disable display devices */ while (pcp) { - writePci(pcp->Slot.l | 0x04, pcp->cmd_st & ~(CARD32)3); - writePci(pcp->Slot.l | 0x30, pcp->RomBase & ~(CARD32)1); - pcp = pcp->next; + writePci(pcp->Slot.l | 0x04, pcp->cmd_st & ~(CARD32)3); + writePci(pcp->Slot.l | 0x30, pcp->RomBase & ~(CARD32)1); + pcp = pcp->next; } } @@ -328,16 +327,16 @@ /* disable VGA routing on bridges */ PciBusPtr pbp = PciBuses; PciStructPtr pcp = PciStruct; - + while (pbp) { - writePci(pbp->Slot.l | 0x3c, pbp->bctl); - pbp = pbp->next; + writePci(pbp->Slot.l | 0x3c, pbp->bctl); + pbp = pbp->next; } /* disable display devices */ while (pcp) { - writePci(pcp->Slot.l | 0x04, pcp->cmd_st); - writePci(pcp->Slot.l | 0x30, pcp->RomBase); - pcp = pcp->next; + writePci(pcp->Slot.l | 0x04, pcp->cmd_st); + writePci(pcp->Slot.l | 0x30, pcp->RomBase); + pcp = pcp->next; } } @@ -346,13 +345,13 @@ { PciBusPtr pbp; PciStructPtr pcp = CurrentPci; - + pciVideoDisable(); - + pbp = pcp->pBus; while (pbp) { /* enable bridges */ - writePci(pbp->Slot.l | 0x3c, pbp->bctl | (CARD32)(8<<16)); - pbp = pbp->pBus; + writePci(pbp->Slot.l | 0x3c, pbp->bctl | (CARD32)(8<<16)); + pbp = pbp->pBus; } writePci(pcp->Slot.l | 0x04, pcp->cmd_st | (CARD32)3); writePci(pcp->Slot.l | 0x30, pcp->RomBase | (CARD32)1); @@ -427,35 +426,35 @@ pciP = CurrentPci; if (FIX_ROM) { - RomBase = findBIOSMap(pciP, &biosSize); - if (!RomBase) { - fprintf(stderr,"Cannot remap BIOS of %i:%i:%i " - "- trying preset address\n",pciP->bus,pciP->dev, - pciP->func); - RomBase = pciP->RomBase & ~(CARD32)0xFF; - } + RomBase = findBIOSMap(pciP, &biosSize); + if (!RomBase) { + fprintf(stderr,"Cannot remap BIOS of %i:%i:%i " + "- trying preset address\n",pciP->bus,pciP->dev, + pciP->func); + RomBase = pciP->RomBase & ~(CARD32)0xFF; + } } else { - RomBase = pciP->RomBase & ~(CARD32)0xFF; - if (~RomBase + 1 < biosSize || !RomBase) - RomBase = findBIOSMap(pciP, &biosSize); + RomBase = pciP->RomBase & ~(CARD32)0xFF; + if (~RomBase + 1 < biosSize || !RomBase) + RomBase = findBIOSMap(pciP, &biosSize); } P_printf("RomBase: 0x%lx\n",RomBase); - + if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) { - perror("opening memory"); - restoreMem(pciP); - return (0); + perror("opening memory"); + restoreMem(pciP); + return (0); } PciWrite32(0x30,RomBase | 1,pciP->Slot.l); #ifdef __alpha__ mem = ptr = (unsigned char *)mmap(0, biosSize, PROT_READ, - MAP_SHARED, mem_fd, RomBase | _bus_base()); + MAP_SHARED, mem_fd, RomBase | _bus_base()); #else mem = ptr = (unsigned char *)mmap(0, biosSize, PROT_READ, - MAP_SHARED, mem_fd, RomBase); + MAP_SHARED, mem_fd, RomBase); #endif if (pciP != CurrentPci) { enablePci = PciRead32(0x4,pciP->Slot.l); @@ -466,37 +465,37 @@ dprint((unsigned long)ptr,0x30); #endif while ( *ptr == 0x55 && *(ptr+1) == 0xAA) { - unsigned short data_off = *(ptr+0x18) | (*(ptr+0x19)<< 8); - unsigned char *data = ptr + data_off; - unsigned char type; - int i; + unsigned short data_off = *(ptr+0x18) | (*(ptr+0x19)<< 8); + unsigned char *data = ptr + data_off; + unsigned char type; + int i; - if (*data!='P' || *(data+1)!='C' || *(data+2)!='I' || *(data+3)!='R') { - break; - } - type = *(data + 0x14); - P_printf("data segment in BIOS: 0x%x, type: 0x%x ",data_off,type); - - if (type != 0) { /* not PC-AT image: find next one */ - unsigned int image_length; - unsigned char indicator = *(data + 0x15); - if (indicator & 0x80) /* last image */ - break; - image_length = (*(data + 0x10) - | (*(data + 0x11) << 8)) << 9; - P_printf("data image length: 0x%x, ind: 0x%x\n", - image_length,indicator); - ptr = ptr + image_length; - continue; - } - /* OK, we have a PC Image */ - length = (*(ptr + 2) << 9); - P_printf("BIOS length: 0x%x\n",length); - scratch = (unsigned char *)malloc(length); - /* don't use memcpy() here: Reading from bus! */ - for (i=0;iSlot.l | 0x30, pciP->RomBase & ~(CARD32)1); if (scratch && length) { - memcpy((unsigned char *)V_BIOS, scratch, length); - free(scratch); + memcpy((unsigned char *)V_BIOS, scratch, length); + free(scratch); } - + restoreMem(pciP); return length; } @@ -523,24 +522,24 @@ CARD32 slot = slotBX << 8; if (slot == (CurrentPci->Slot.l & ~PCI_EN)) - return (CurrentPci->Slot.l | PCI_EN); + return (CurrentPci->Slot.l | PCI_EN); else { #if !SHOW_ALL_DEV - PciBusPtr pBus = CurrentPci->pBus; - while (pBus) { - // fprintf(stderr,"slot: 0x%x bridge: 0x%x\n",slot, pBus->Slot.l); - if (slot == (pBus->Slot.l & ~PCI_EN)) - return pBus->Slot.l | PCI_EN; - pBus = pBus->next; - } + PciBusPtr pBus = CurrentPci->pBus; + while (pBus) { + /* fprintf(stderr,"slot: 0x%x bridge: 0x%x\n",slot, pBus->Slot.l); */ + if (slot == (pBus->Slot.l & ~PCI_EN)) + return pBus->Slot.l | PCI_EN; + pBus = pBus->next; + } #else - PciStructPtr pPci = PciStruct; - while (pPci) { - //fprintf(stderr,"slot: 0x%x bridge: 0x%x\n",slot, pPci->Slot.l); - if (slot == (pPci->Slot.l & ~PCI_EN)) - return pPci->Slot.l | PCI_EN; - pPci = pPci->next; - } + PciStructPtr pPci = PciStruct; + while (pPci) { + /*fprintf(stderr,"slot: 0x%x bridge: 0x%x\n",slot, pPci->Slot.l); */ + if (slot == (pPci->Slot.l & ~PCI_EN)) + return pPci->Slot.l | PCI_EN; + pPci = pPci->next; + } #endif } return 0; @@ -559,9 +558,9 @@ n++; while (pPci) { - if ((pPci->VendorID == vendorID) && (pPci->DeviceID == deviceID)) { - if (!(--n)) break; - } + if ((pPci->VendorID == vendorID) && (pPci->DeviceID == deviceID)) { + if (!(--n)) break; + } pPci = pPci->next; } return pPci; @@ -574,10 +573,10 @@ n++; while (pPci) { - if ((pPci->Interface == intf) && (pPci->SubClass == subClass) - && (pPci->BaseClass == class)) { - if (!(--n)) break; - } + if ((pPci->Interface == intf) && (pPci->SubClass == subClass) + && (pPci->BaseClass == class)) { + if (!(--n)) break; + } pPci = pPci->next; } return pPci; @@ -592,14 +591,14 @@ for (i = 0; i<64;i+=4) { #ifdef __alpha__ - reg[i] = axpPciCfgRead(config_cmd | i); + reg[i] = axpPciCfgRead(config_cmd | i); #else - outl(PCI_MODE1_ADDRESS_REG, config_cmd | i); - reg[i] = inl(PCI_MODE1_DATA_REG); + outl(PCI_MODE1_ADDRESS_REG, config_cmd | i); + reg[i] = inl(PCI_MODE1_DATA_REG); #endif #ifdef V86BIOS_DEBUG - P_printf("0x%lx\n",reg[i]); + P_printf("0x%lx\n",reg[i]); #endif } } @@ -611,15 +610,15 @@ (dev<<11) | (func<<8); CARD32 reg; #ifdef __alpha__ - reg = axpPciCfgRead(config_cmd); + reg = axpPciCfgRead(config_cmd); #else - outl(PCI_MODE1_ADDRESS_REG, config_cmd); - reg = inl(PCI_MODE1_DATA_REG); + outl(PCI_MODE1_ADDRESS_REG, config_cmd); + reg = inl(PCI_MODE1_DATA_REG); #endif if (reg != 0xFFFFFFFF) - return 1; + return 1; else - return 0; + return 0; } static int @@ -633,9 +632,9 @@ outb(PCI_MODE2_FORWARD_REG, 0x00); outb(PCI_MODE2_ENABLE_REG, 0x00); if (val == 0xFFFFFFFF) - return 0; + return 0; if (val == 0xF0F0F0F0) - return 0; + return 0; return 1; } @@ -647,9 +646,9 @@ outb(PCI_MODE2_ENABLE_REG, 0xF1); outb(PCI_MODE2_FORWARD_REG, bus); for (i = 0; i<64;i+=4) { - reg[i] = inl((dev << 8) + i); + reg[i] = inl((dev << 8) + i); #ifdef V86BIOS_DEBUG - P_printf("0x%lx\n",reg[i]); + P_printf("0x%lx\n",reg[i]); #endif } outb(PCI_MODE2_ENABLE_REG, 0x00); @@ -664,22 +663,22 @@ CARD8 primary, secondary; CARD8 header, interface; int i; - + config_cmd = PCI_EN | busidx<<16 | - (dev<<11) | (func<<8); + (dev<<11) | (func<<8); for (i = 0x10; i < 0x28; i+=4) { - if (IS_MEM32(reg[i])) - if ((reg[i] & 0xFFFFFFF0) < pciMinMemReg) - pciMinMemReg = (reg[i] & 0xFFFFFFF0); + if (IS_MEM32(reg[i])) + if ((reg[i] & 0xFFFFFFF0) < pciMinMemReg) + pciMinMemReg = (reg[i] & 0xFFFFFFF0); #ifdef __alpha__ - if (IS_MEM64(reg[i])) { - unsigned long addr = reg[i] | - (unsigned long)(reg[i+4]) << 32; - if ((addr & ~0xfL) < pciMinMemReg) - pciMinMemReg = (addr & ~0xfL); - i+=4; - } + if (IS_MEM64(reg[i])) { + unsigned long addr = reg[i] | + (unsigned long)(reg[i+4]) << 32; + if ((addr & ~0xfL) < pciMinMemReg) + pciMinMemReg = (addr & ~0xfL); + i+=4; + } #endif } vendor = reg[0] & 0xFFFF; @@ -691,49 +690,49 @@ header = (reg[0x0c] >> 16) & 0xff; P_printf("bc 0x%x, sub 0x%x, if 0x%x, hdr 0x%x\n", - baseclass,subclass,interface,header); + baseclass,subclass,interface,header); if (BRIDGE_CLASS(baseclass)) { - if (BRIDGE_PCI_CLASS(subclass)) { - PciBusPtr pbp = malloc(sizeof(PciBusRec)); - P_printf("Pci-Pci Bridge found; "); - primary = reg[0x18] & 0xFF; - secondary = (reg[0x18] >> 8) & 0xFF; - P_printf("primary: 0x%x secondary: 0x%x\n", - primary,secondary); - pbp->bctl = reg[0x3c]; - pbp->primary = primary; - pbp->secondary = secondary; - pbp->Slot.l = config_cmd; - pbp->next = PciBuses; - PciBuses = pbp; - numbus++; - } else if (BRIDGE_HOST_CLASS(subclass) - && (hostbridges++ > 1)) { - numbus++; - } + if (BRIDGE_PCI_CLASS(subclass)) { + PciBusPtr pbp = malloc(sizeof(PciBusRec)); + P_printf("Pci-Pci Bridge found; "); + primary = reg[0x18] & 0xFF; + secondary = (reg[0x18] >> 8) & 0xFF; + P_printf("primary: 0x%x secondary: 0x%x\n", + primary,secondary); + pbp->bctl = reg[0x3c]; + pbp->primary = primary; + pbp->secondary = secondary; + pbp->Slot.l = config_cmd; + pbp->next = PciBuses; + PciBuses = pbp; + numbus++; + } else if (BRIDGE_HOST_CLASS(subclass) + && (hostbridges++ > 1)) { + numbus++; + } } else if (VIDEO_CLASS(baseclass,subclass)) { - PciStructPtr pcp = malloc(sizeof(PciStructRec)); - P_printf("Display adapter found\n"); - pcp->RomBase = reg[0x30]; - pcp->cmd_st = reg[4]; - pcp->active = (reg[4] & 0x03) == 3 ? 1 : 0; - pcp->VendorID = vendor; - pcp->DeviceID = device; - pcp->Interface = interface; - pcp->BaseClass = baseclass; - pcp->SubClass = subclass; - pcp->Slot.l = config_cmd; - pcp->bus = busidx; - pcp->dev = dev; - pcp->func = func; - pcp->next = PciStruct; - PciStruct = pcp; + PciStructPtr pcp = malloc(sizeof(PciStructRec)); + P_printf("Display adapter found\n"); + pcp->RomBase = reg[0x30]; + pcp->cmd_st = reg[4]; + pcp->active = (reg[4] & 0x03) == 3 ? 1 : 0; + pcp->VendorID = vendor; + pcp->DeviceID = device; + pcp->Interface = interface; + pcp->BaseClass = baseclass; + pcp->SubClass = subclass; + pcp->Slot.l = config_cmd; + pcp->bus = busidx; + pcp->dev = dev; + pcp->func = func; + pcp->next = PciStruct; + PciStruct = pcp; } if ((func == 0) - && ((header & PCI_MULTIFUNC_DEV) == 0)) - func = 8; + && ((header & PCI_MULTIFUNC_DEV) == 0)) + func = 8; else - func++; + func++; return func; } @@ -748,36 +747,36 @@ CARD32 org; CARD32 val; CARD32 size_n; - - org = PciRead32(num + 0x10,pciP->Slot.l); - - while (pciPtr) { - for (i = 0; i < 20; i=i+4) { - val = PciRead32(i + 0x10,pciPtr->Slot.l); - /* don't map it on itself */ - if ((org & 0xfffffff0) == (val & 0xfffffff0)) - continue; - if (val && !(val & 1)) - PciWrite32(i + 0x10,0xffffffff,pciPtr->Slot.l); - else - continue; - size_n = PciRead32(i + 0x10,pciPtr->Slot.l); - PciWrite32(i + 0x10,val,pciPtr->Slot.l); - size_n = ~(CARD32)(size_n & 0xfffffff0) + 1; - - if (size_n >= size) { - PciWrite32(num + 0x10,val,pciP->Slot.l); - return 1; - } - } - pciPtr = pciPtr->next; + org = PciRead32(num + 0x10,pciP->Slot.l); + + while (pciPtr) { + for (i = 0; i < 20; i=i+4) { + + val = PciRead32(i + 0x10,pciPtr->Slot.l); + /* don't map it on itself */ + if ((org & 0xfffffff0) == (val & 0xfffffff0)) + continue; + if (val && !(val & 1)) + PciWrite32(i + 0x10,0xffffffff,pciPtr->Slot.l); + else + continue; + size_n = PciRead32(i + 0x10,pciPtr->Slot.l); + PciWrite32(i + 0x10,val,pciPtr->Slot.l); + size_n = ~(CARD32)(size_n & 0xfffffff0) + 1; + + if (size_n >= size) { + PciWrite32(num + 0x10,val,pciP->Slot.l); + return 1; + } + } + pciPtr = pciPtr->next; } /* last resort: try to go below lowest PCI mem address */ val = ((pciMinMemReg & ~(CARD32)(size - 1)) - size); if (val > 0x7fffffff) { - PciWrite32(num + 0x10,val, pciP->Slot.l); - return 1; + PciWrite32(num + 0x10,val, pciP->Slot.l); + return 1; } return 0; @@ -798,7 +797,7 @@ int i; CARD32 val; CARD32 size; - + PciWrite32(0x30,0xffffffff,pciP->Slot.l); *biosSize = PciRead32(0x30,pciP->Slot.l); P_printf("bios size: 0x%x\n",*biosSize); @@ -810,43 +809,43 @@ P_printf("fixing broken BIOS size: 0x%x\n",*biosSize); } while (pciPtr) { - if (pciPtr->bus != pciP->bus) { - pciPtr = pciPtr->next; - continue; - } - for (i = 0; i < 20; i=i+4) { - - val = PciRead32(i + 0x10,pciPtr->Slot.l); - if (!(val & 1)) - - PciWrite32(i + 0x10,0xffffffff,pciPtr->Slot.l); - else - continue; - size = PciRead32(i + 0x10,pciPtr->Slot.l); - PciWrite32(i + 0x10,val,pciPtr->Slot.l); - size = ~(CARD32)(size & 0xFFFFFFF0) + 1; + if (pciPtr->bus != pciP->bus) { + pciPtr = pciPtr->next; + continue; + } + for (i = 0; i < 20; i=i+4) { + + val = PciRead32(i + 0x10,pciPtr->Slot.l); + if (!(val & 1)) + + PciWrite32(i + 0x10,0xffffffff,pciPtr->Slot.l); + else + continue; + size = PciRead32(i + 0x10,pciPtr->Slot.l); + PciWrite32(i + 0x10,val,pciPtr->Slot.l); + size = ~(CARD32)(size & 0xFFFFFFF0) + 1; #ifdef V86_BIOS_DEBUG - P_printf("size: 0x%x\n",size); + P_printf("size: 0x%x\n",size); #endif - if (size >= *biosSize) { - if (pciP == pciPtr) { /* if same device remap ram*/ - if (!(remapMem(pciP,i,size))) - continue; - remapMEM_val = val; - remapMEM_num = i; - } else { - remapMEM_val = 0; - } - return val & 0xFFFFFF00; - } - } - pciPtr = pciPtr->next; + if (size >= *biosSize) { + if (pciP == pciPtr) { /* if same device remap ram*/ + if (!(remapMem(pciP,i,size))) + continue; + remapMEM_val = val; + remapMEM_num = i; + } else { + remapMEM_val = 0; + } + return val & 0xFFFFFF00; + } + } + pciPtr = pciPtr->next; } remapMEM_val = 0; /* very last resort */ - if (pciP->bus == 0 && (pciMinMemReg > *biosSize)) + if (pciP->bus == 0 && (pciMinMemReg > *biosSize)) return (pciMinMemReg - size) & ~(size - 1); - + return 0; } @@ -863,7 +862,7 @@ return 0; } -int +int cfg1in(CARD16 addr, CARD32 *val) { if (addr == 0xCF8) { @@ -883,8 +882,8 @@ while (pci) { printf("[0x%x:0x%x:0x%x] vendor: 0x%4.4x dev: 0x%4.4x class: 0x%4.4x" - " subclass: 0x%4.4x\n",pci->bus,pci->dev,pci->func, - pci->VendorID,pci->DeviceID,pci->BaseClass,pci->SubClass); + " subclass: 0x%4.4x\n",pci->bus,pci->dev,pci->func, + pci->VendorID,pci->DeviceID,pci->BaseClass,pci->SubClass); pci = pci->next; } } @@ -893,7 +892,7 @@ findPciByIDs(int bus, int dev, int func) { PciStructPtr pciP = PciList; - + while (pciP) { if (pciP->bus == bus && pciP->dev == dev && pciP->func == func) return pciP; diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/pci.h b/board/MAI/bios_emulator/scitech/src/v86bios/pci.h index 0ab7363..58ad522 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/pci.h +++ b/board/MAI/bios_emulator/scitech/src/v86bios/pci.h @@ -26,13 +26,13 @@ typedef union { struct { - unsigned int zero:2; - unsigned int reg:6; - unsigned int func:3; - unsigned int dev:5; - unsigned int bus:8; - unsigned int reserved:7; - unsigned int enable:1; + unsigned int zero:2; + unsigned int reg:6; + unsigned int func:3; + unsigned int dev:5; + unsigned int bus:8; + unsigned int reserved:7; + unsigned int enable:1; } pci; CARD32 l; } PciSlot; diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/v86.c b/board/MAI/bios_emulator/scitech/src/v86bios/v86.c index 3170a9c..4deed04 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/v86.c +++ b/board/MAI/bios_emulator/scitech/src/v86bios/v86.c @@ -46,14 +46,14 @@ #define CPU_REG_HW(reg) (*((CARD16 *)&CPU_REG(reg) + 1)) #define CPU_REG_LB(reg) (*(CARD8 *)&CPU_REG(e##reg)) #define SEG_ADR(type, seg, reg) type((CPU_REG_LW(seg) << 4) \ - + CPU_REG_LW(e##reg)) + + CPU_REG_LW(e##reg)) #define DF (1 << 10) struct pio P; void -setup_io(void) +setup_io(void) { if (!Config.PrintPort && !Config.IoStatistics) { P.inb = (CARD8(*)(CARD16))inb; @@ -72,13 +72,13 @@ } } - + static void setup_vm86(unsigned long bios_start, i86biosRegsPtr regs) { CARD32 eip; CARD16 cs; - + vm86s.flags = VM86_SCREEN_BITMAP; vm86s.flags = 0; vm86s.screen_bitmap = 0; @@ -88,7 +88,7 @@ eip = bios_start & 0xFFFF; cs = (bios_start & 0xFF0000) >> 4; - + CPU_REG(eax) = regs->ax; CPU_REG(ebx) = regs->bx; CPU_REG(ecx) = regs->cx; @@ -97,7 +97,7 @@ CPU_REG(edi) = regs->di; CPU_REG(ebp) = 0; CPU_REG(eip) = eip; - CPU_REG(cs) = cs; + CPU_REG(cs) = cs; CPU_REG(esp) = 0x100; CPU_REG(ss) = 0x30; /* This is the standard pc bios stack */ CPU_REG(es) = regs->es; @@ -124,44 +124,44 @@ do_vm86(void) { int retval; - + #ifdef V86BIOS_DEBUG dump_registers(); #endif -// retval = SYS_vm86old(&vm86s); -// retval = syscall(SYS_vm86old,&vm86s); +/* retval = SYS_vm86old(&vm86s); */ +/* retval = syscall(SYS_vm86old,&vm86s); */ retval = vm86_rep(&vm86s); - + switch (VM86_TYPE(retval)) { case VM86_UNKNOWN: - if (!vm86_GP_fault()) return 0; - break; + if (!vm86_GP_fault()) return 0; + break; case VM86_STI: - fprintf(stderr,"vm86_sti :-((\n"); - stack_trace(); - dump_code(); - return 0; + fprintf(stderr,"vm86_sti :-((\n"); + stack_trace(); + dump_code(); + return 0; case VM86_INTx: - if (!vm86_do_int(VM86_ARG(retval))) { - fprintf(stderr,"\nUnknown vm86_int: %X\n\n",VM86_ARG(retval)); - dump_registers(); - return 0; - } - /* I'm not sure yet what to do if we can handle ints */ - break; + if (!vm86_do_int(VM86_ARG(retval))) { + fprintf(stderr,"\nUnknown vm86_int: %X\n\n",VM86_ARG(retval)); + dump_registers(); + return 0; + } + /* I'm not sure yet what to do if we can handle ints */ + break; case VM86_SIGNAL: - fprintf(stderr,"received signal\n"); - return 0; + fprintf(stderr,"received signal\n"); + return 0; default: - fprintf(stderr,"unknown type(0x%x)=0x%x\n", - VM86_ARG(retval),VM86_TYPE(retval)); - dump_registers(); - dump_code(); - stack_trace(); - return 0; + fprintf(stderr,"unknown type(0x%x)=0x%x\n", + VM86_ARG(retval),VM86_TYPE(retval)); + dump_registers(); + dump_code(); + stack_trace(); + return 0; } - + return 1; } @@ -176,17 +176,17 @@ do_x86(unsigned long bios_start, i86biosRegsPtr regs) { static void (*org_handler)(int); - + setup_vm86(bios_start, regs); if (setjmp(x86_esc) == 0) { - org_handler = signal(2,vmexit); - while(do_vm86()) {}; - signal(2,org_handler); - collect_bios_regs(regs); + org_handler = signal(2,vmexit); + while(do_vm86()) {}; + signal(2,org_handler); + collect_bios_regs(regs); } else { - signal(2,org_handler); - printf("interrupted at 0x%x\n",((CARD16)CPU_REG(cs)) << 4 - | (CARD16)CPU_REG(eip)); + signal(2,org_handler); + printf("interrupted at 0x%x\n",((CARD16)CPU_REG(cs)) << 4 + | (CARD16)CPU_REG(eip)); } } @@ -217,19 +217,19 @@ /* eat up prefixes */ done = 0; do { - switch (*(csp++)) { - case 0x66: /* operand prefix */ prefix66=1; break; - case 0x67: /* address prefix */ prefix67=1; break; - case 0x2e: /* CS */ pref_seg=CPU_REG(cs); break; - case 0x3e: /* DS */ pref_seg=CPU_REG(ds); break; - case 0x26: /* ES */ pref_seg=CPU_REG(es); break; - case 0x36: /* SS */ pref_seg=CPU_REG(ss); break; - case 0x65: /* GS */ pref_seg=CPU_REG(gs); break; - case 0x64: /* FS */ pref_seg=CPU_REG(fs); break; - case 0xf2: /* repnz */ - case 0xf3: /* rep */ is_rep=1; break; - default: done=1; - } + switch (*(csp++)) { + case 0x66: /* operand prefix */ prefix66=1; break; + case 0x67: /* address prefix */ prefix67=1; break; + case 0x2e: /* CS */ pref_seg=CPU_REG(cs); break; + case 0x3e: /* DS */ pref_seg=CPU_REG(ds); break; + case 0x26: /* ES */ pref_seg=CPU_REG(es); break; + case 0x36: /* SS */ pref_seg=CPU_REG(ss); break; + case 0x65: /* GS */ pref_seg=CPU_REG(gs); break; + case 0x64: /* FS */ pref_seg=CPU_REG(fs); break; + case 0xf2: /* repnz */ + case 0xf3: /* rep */ is_rep=1; break; + default: done=1; + } } while (!done); csp--; /* oops one too many */ org_eip = CPU_REG(eip); @@ -238,125 +238,125 @@ switch (*csp) { case 0x6c: /* insb */ - /* NOTE: ES can't be overwritten; prefixes 66,67 should use esi,edi,ecx - * but is anyone using extended regs in real mode? */ - /* WARNING: no test for DI wrapping! */ - CPU_REG_LW(edi) += port_rep_inb(CPU_REG_LW(edx), - SEG_ADR((CARD8 *),es,di), - CPU_REG_LW(eflags)&DF, - (is_rep? LWECX:1)); - if (is_rep) LWECX = 0; - CPU_REG_LW(eip)++; - break; + /* NOTE: ES can't be overwritten; prefixes 66,67 should use esi,edi,ecx + * but is anyone using extended regs in real mode? */ + /* WARNING: no test for DI wrapping! */ + CPU_REG_LW(edi) += port_rep_inb(CPU_REG_LW(edx), + SEG_ADR((CARD8 *),es,di), + CPU_REG_LW(eflags)&DF, + (is_rep? LWECX:1)); + if (is_rep) LWECX = 0; + CPU_REG_LW(eip)++; + break; case 0x6d: /* (rep) insw / insd */ - /* NOTE: ES can't be overwritten */ - /* WARNING: no test for _DI wrapping! */ - if (prefix66) { - CPU_REG_LW(edi) += port_rep_inl(CPU_REG_LW(edx), - SEG_ADR((CARD32 *),es,di), - CPU_REG_LW(eflags)&DF, - (is_rep? LWECX:1)); - } - else { - CPU_REG_LW(edi) += port_rep_inw(CPU_REG_LW(edx), - SEG_ADR((CARD16 *),es,di), - CPU_REG_LW(eflags)&DF, - (is_rep? LWECX:1)); - } - if (is_rep) LWECX = 0; - CPU_REG_LW(eip)++; - break; + /* NOTE: ES can't be overwritten */ + /* WARNING: no test for _DI wrapping! */ + if (prefix66) { + CPU_REG_LW(edi) += port_rep_inl(CPU_REG_LW(edx), + SEG_ADR((CARD32 *),es,di), + CPU_REG_LW(eflags)&DF, + (is_rep? LWECX:1)); + } + else { + CPU_REG_LW(edi) += port_rep_inw(CPU_REG_LW(edx), + SEG_ADR((CARD16 *),es,di), + CPU_REG_LW(eflags)&DF, + (is_rep? LWECX:1)); + } + if (is_rep) LWECX = 0; + CPU_REG_LW(eip)++; + break; case 0x6e: /* (rep) outsb */ - if (pref_seg < 0) pref_seg = CPU_REG_LW(ds); - /* WARNING: no test for _SI wrapping! */ - CPU_REG_LW(esi) += port_rep_outb(CPU_REG_LW(edx),(CARD8*)LIN_PREF_SI, - CPU_REG_LW(eflags)&DF, - (is_rep? LWECX:1)); - if (is_rep) LWECX = 0; - CPU_REG_LW(eip)++; - break; + if (pref_seg < 0) pref_seg = CPU_REG_LW(ds); + /* WARNING: no test for _SI wrapping! */ + CPU_REG_LW(esi) += port_rep_outb(CPU_REG_LW(edx),(CARD8*)LIN_PREF_SI, + CPU_REG_LW(eflags)&DF, + (is_rep? LWECX:1)); + if (is_rep) LWECX = 0; + CPU_REG_LW(eip)++; + break; case 0x6f: /* (rep) outsw / outsd */ - if (pref_seg < 0) pref_seg = CPU_REG_LW(ds); - /* WARNING: no test for _SI wrapping! */ - if (prefix66) { - CPU_REG_LW(esi) += port_rep_outl(CPU_REG_LW(edx), - (CARD32 *)LIN_PREF_SI, - CPU_REG_LW(eflags)&DF, - (is_rep? LWECX:1)); - } - else { - CPU_REG_LW(esi) += port_rep_outw(CPU_REG_LW(edx), - (CARD16 *)LIN_PREF_SI, - CPU_REG_LW(eflags)&DF, - (is_rep? LWECX:1)); - } - if (is_rep) LWECX = 0; - CPU_REG_LW(eip)++; - break; + if (pref_seg < 0) pref_seg = CPU_REG_LW(ds); + /* WARNING: no test for _SI wrapping! */ + if (prefix66) { + CPU_REG_LW(esi) += port_rep_outl(CPU_REG_LW(edx), + (CARD32 *)LIN_PREF_SI, + CPU_REG_LW(eflags)&DF, + (is_rep? LWECX:1)); + } + else { + CPU_REG_LW(esi) += port_rep_outw(CPU_REG_LW(edx), + (CARD16 *)LIN_PREF_SI, + CPU_REG_LW(eflags)&DF, + (is_rep? LWECX:1)); + } + if (is_rep) LWECX = 0; + CPU_REG_LW(eip)++; + break; case 0xe5: /* inw xx, inl xx */ - if (prefix66) CPU_REG(eax) = P.inl((int) csp[1]); - else CPU_REG_LW(eax) = P.inw((int) csp[1]); - CPU_REG_LW(eip) += 2; - break; + if (prefix66) CPU_REG(eax) = P.inl((int) csp[1]); + else CPU_REG_LW(eax) = P.inw((int) csp[1]); + CPU_REG_LW(eip) += 2; + break; case 0xe4: /* inb xx */ - CPU_REG_LW(eax) &= ~(CARD32)0xff; - CPU_REG_LB(ax) |= P.inb((int) csp[1]); - CPU_REG_LW(eip) += 2; - break; + CPU_REG_LW(eax) &= ~(CARD32)0xff; + CPU_REG_LB(ax) |= P.inb((int) csp[1]); + CPU_REG_LW(eip) += 2; + break; case 0xed: /* inw dx, inl dx */ - if (prefix66) CPU_REG(eax) = P.inl(CPU_REG_LW(edx)); - else CPU_REG_LW(eax) = P.inw(CPU_REG_LW(edx)); - CPU_REG_LW(eip) += 1; - break; + if (prefix66) CPU_REG(eax) = P.inl(CPU_REG_LW(edx)); + else CPU_REG_LW(eax) = P.inw(CPU_REG_LW(edx)); + CPU_REG_LW(eip) += 1; + break; case 0xec: /* inb dx */ - CPU_REG_LW(eax) &= ~(CARD32)0xff; - CPU_REG_LB(ax) |= P.inb(CPU_REG_LW(edx)); - CPU_REG_LW(eip) += 1; - break; + CPU_REG_LW(eax) &= ~(CARD32)0xff; + CPU_REG_LB(ax) |= P.inb(CPU_REG_LW(edx)); + CPU_REG_LW(eip) += 1; + break; case 0xe7: /* outw xx */ - if (prefix66) P.outl((int)csp[1], CPU_REG(eax)); - else P.outw((int)csp[1], CPU_REG_LW(eax)); - CPU_REG_LW(eip) += 2; - break; + if (prefix66) P.outl((int)csp[1], CPU_REG(eax)); + else P.outw((int)csp[1], CPU_REG_LW(eax)); + CPU_REG_LW(eip) += 2; + break; case 0xe6: /* outb xx */ - P.outb((int) csp[1], CPU_REG_LB(ax)); - CPU_REG_LW(eip) += 2; - break; + P.outb((int) csp[1], CPU_REG_LB(ax)); + CPU_REG_LW(eip) += 2; + break; case 0xef: /* outw dx */ - if (prefix66) P.outl(CPU_REG_LW(edx), CPU_REG(eax)); - else P.outw(CPU_REG_LW(edx), CPU_REG_LW(eax)); - CPU_REG_LW(eip) += 1; - break; + if (prefix66) P.outl(CPU_REG_LW(edx), CPU_REG(eax)); + else P.outw(CPU_REG_LW(edx), CPU_REG_LW(eax)); + CPU_REG_LW(eip) += 1; + break; case 0xee: /* outb dx */ - P.outb(CPU_REG_LW(edx), CPU_REG_LB(ax)); - CPU_REG_LW(eip) += 1; - break; + P.outb(CPU_REG_LW(edx), CPU_REG_LB(ax)); + CPU_REG_LW(eip) += 1; + break; case 0xf4: #ifdef V86BIOS_DEBUG - printf("hlt at %p\n", lina); + printf("hlt at %p\n", lina); #endif - return 0; + return 0; - case 0x0f: - fprintf(stderr,"CPU 0x0f Trap at eip=0x%lx\n",CPU_REG(eip)); - goto op0ferr; - break; + case 0x0f: + fprintf(stderr,"CPU 0x0f Trap at eip=0x%lx\n",CPU_REG(eip)); + goto op0ferr; + break; case 0xf0: /* lock */ default: - fprintf(stderr,"unknown reason for exception\n"); - dump_registers(); - stack_trace(); + fprintf(stderr,"unknown reason for exception\n"); + dump_registers(); + stack_trace(); op0ferr: - dump_code(); - fprintf(stderr,"cannot continue\n"); - return 0; + dump_code(); + fprintf(stderr,"cannot continue\n"); + return 0; } /* end of switch() */ return 1; } @@ -369,16 +369,16 @@ i_printf("int 0x%x received: ax:0x%lx",num,CPU_REG(eax)); if (Config.PrintIp) - i_printf(" at: 0x%x\n",getIP()); + i_printf(" at: 0x%x\n",getIP()); else - i_printf("\n"); + i_printf("\n"); /* try to run bios interrupt */ - + /* if not installed fall back */ #define COPY(x) regs.##x = CPU_REG(x) #define COPY_R(x) CPU_REG(x) = regs.##x - + COPY(eax); COPY(ebx); COPY(ecx); @@ -397,9 +397,9 @@ COPY(eflags); if (!(val = int_handler(num,®s))) - if (!(val = run_bios_int(num,®s))) - return val; - + if (!(val = run_bios_int(num,®s))) + return val; + COPY_R(eax); COPY_R(ebx); COPY_R(ecx); @@ -429,11 +429,11 @@ unsigned char *lina = SEG_ADR((unsigned char *), cs, ip); fprintf(stderr,"code at 0x%8.8x: ",(CARD32)lina); - for (i=0; i<0x10; i++) - fprintf(stderr,"%2.2x ",*(lina + i)); + for (i=0; i<0x10; i++) + fprintf(stderr,"%2.2x ",*(lina + i)); fprintf(stderr,"\n "); - for (; i<0x20; i++) - fprintf(stderr,"%2.2x ",*(lina + i)); + for (; i<0x20; i++) + fprintf(stderr,"%2.2x ",*(lina + i)); fprintf(stderr,"\n"); } @@ -466,41 +466,41 @@ stack_trace(void) { int i; - unsigned char *stack = SEG_ADR((unsigned char *), ss, sp); + unsigned char *stack = SEG_ADR((unsigned char *), ss, sp); fprintf(stderr,"stack at 0x%8.8lx:\n",(unsigned long)stack); - for (i=0; i < 0x10; i++) - fprintf(stderr,"%2.2x ",*(stack + i)); + for (i=0; i < 0x10; i++) + fprintf(stderr,"%2.2x ",*(stack + i)); fprintf(stderr,"\n"); - + } static int -vm86_rep(struct vm86_struct *ptr) +vm86_rep(struct vm86_struct *ptr) { int __res; __asm__ __volatile__("int $0x80\n" - :"=a" (__res):"a" ((int)113), - "b" ((struct vm86_struct *)ptr)); + :"=a" (__res):"a" ((int)113), + "b" ((struct vm86_struct *)ptr)); - if ((__res) < 0) { - errno = -__res; - __res=-1; - } - else errno = 0; - return __res; + if ((__res) < 0) { + errno = -__res; + __res=-1; + } + else errno = 0; + return __res; } #define pushw(base, ptr, val) \ __asm__ __volatile__( \ - "decw %w0\n\t" \ - "movb %h2,(%1,%0)\n\t" \ - "decw %w0\n\t" \ - "movb %b2,(%1,%0)" \ - : "=r" (ptr) \ - : "r" (base), "q" (val), "0" (ptr)) + "decw %w0\n\t" \ + "movb %h2,(%1,%0)\n\t" \ + "decw %w0\n\t" \ + "movb %b2,(%1,%0)" \ + : "=r" (ptr) \ + : "r" (base), "q" (val), "0" (ptr)) int run_bios_int(int num, struct regs86 *regs) @@ -515,25 +515,25 @@ /* check if bios vector is initialized */ if (((CARD16*)0)[(num<<1)+1] == 0x0000) { /* SYS_BIOS_SEG ?*/ #ifdef V86BIOS_DEBUG - i_printf("card BIOS not loaded\n"); + i_printf("card BIOS not loaded\n"); #endif - return 0; + return 0; } - + #ifdef V86BIOS_DEBUG if (firsttime) { - dprint(0,0x3D0); - firsttime = 0; + dprint(0,0x3D0); + firsttime = 0; } #endif - + i_printf("calling card BIOS at: "); ssp = (CARD16*)(CPU_REG(ss)<<4); sp = (CARD32) CPU_REG_LW(esp); eflags = regs->eflags; eflags = ((eflags & VIF_MASK) != 0) - ? (eflags | IF_MASK) : (eflags & ~(CARD32) IF_MASK); + ? (eflags | IF_MASK) : (eflags & ~(CARD32) IF_MASK); pushw(ssp, sp, eflags); pushw(ssp, sp, regs->cs); pushw(ssp, sp, (CARD16)regs->eip); @@ -545,7 +545,7 @@ dump_code(); #endif regs->eflags = regs->eflags - & ~(VIF_MASK | TF_MASK | IF_MASK | NT_MASK); + & ~(VIF_MASK | TF_MASK | IF_MASK | NT_MASK); return 1; } diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c b/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c index 7a3fb36..101c1f2 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c +++ b/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.c @@ -48,12 +48,12 @@ #define BIOS_START 0x7C00 /* default BIOS entry */ #define BIOS_MEM 0x600 -//CARD8 code[] = { 0xb8 , 0xf0 , 0xf0, 0xf4 }; +/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0, 0xf4 }; */ #define VB_X(x) (V_BIOS >> x) & 0xFF CARD8 code[] = { 6, 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xf4 }; -//CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xb8, 0x03, 0x00, -//0xcd, 0x10, 0xf4 }; -//CARD8 code[] = { 0xb8 , 0xf0 , 0xf0 ,0xf4 }; +/*CARD8 code[] = { 0x9a, 0x03, 0x00, 0x00, VB_X(12), 0xb8, 0x03, 0x00, */ +/*0xcd, 0x10, 0xf4 }; */ +/*CARD8 code[] = { 0xb8 , 0xf0 , 0xf0 ,0xf4 }; */ int ioperm_list[IOPERM_BITS] = {0,}; @@ -97,87 +97,87 @@ int main(int argc,char **argv) { int c; - + Config.PrintPort = PRINT_PORT; Config.IoStatistics = IO_STATISTICS; Config.PrintIrq = PRINT_IRQ; Config.PrintPci = PRINT_PCI; - Config.ShowAllDev = SHOW_ALL_DEV; - Config.PrintIp = PRINT_IP; - Config.SaveBios = SAVE_BIOS; - Config.Trace = TRACE; + Config.ShowAllDev = SHOW_ALL_DEV; + Config.PrintIp = PRINT_IP; + Config.SaveBios = SAVE_BIOS; + Config.Trace = TRACE; Config.ConfigActiveOnly = CONFIG_ACTIVE_ONLY; /* boot */ Config.ConfigActiveDevice = CONFIG_ACTIVE_DEVICE; /* boot */ - Config.MapSysBios = MAP_SYS_BIOS; - Config.Resort = RESORT; /* boot */ - Config.FixRom = FIX_ROM; + Config.MapSysBios = MAP_SYS_BIOS; + Config.Resort = RESORT; /* boot */ + Config.FixRom = FIX_ROM; Config.NoConsole = NO_CONSOLE; Config.BootOnly = FALSE; Config.Verbose = VERBOSE; - - opterr = 0; + + opterr = 0; while ((c = getopt(argc,argv,"psicaPStAdbrfnv:?")) != EOF) { switch(c) { case 'p': - Config.PrintPort = TRUE; - break; + Config.PrintPort = TRUE; + break; case 's': - Config.IoStatistics = TRUE; - break; + Config.IoStatistics = TRUE; + break; case 'i': - Config.PrintIrq = TRUE; - break; + Config.PrintIrq = TRUE; + break; case 'c': - Config.PrintPci = TRUE; - break; + Config.PrintPci = TRUE; + break; case 'a': - Config.ShowAllDev = TRUE; - break; + Config.ShowAllDev = TRUE; + break; case 'P': - Config.PrintIp = TRUE; - break; + Config.PrintIp = TRUE; + break; case 'S': - Config.SaveBios = TRUE; - break; + Config.SaveBios = TRUE; + break; case 't': - Config.Trace = TRUE; - break; + Config.Trace = TRUE; + break; case 'A': - Config.ConfigActiveOnly = TRUE; - break; + Config.ConfigActiveOnly = TRUE; + break; case 'd': - Config.ConfigActiveDevice = TRUE; - break; + Config.ConfigActiveDevice = TRUE; + break; case 'b': - Config.MapSysBios = TRUE; - break; + Config.MapSysBios = TRUE; + break; case 'r': - Config.Resort = TRUE; - break; + Config.Resort = TRUE; + break; case 'f': - Config.FixRom = TRUE; - break; + Config.FixRom = TRUE; + break; case 'n': - Config.NoConsole = TRUE; - break; + Config.NoConsole = TRUE; + break; case 'v': - Config.Verbose = strtol(optarg,NULL,0); - break; + Config.Verbose = strtol(optarg,NULL,0); + break; case '?': - print_usage(); - break; + print_usage(); + break; default: - break; + break; } } - - + + if (!map()) exit(1); - + if (!setup_system_bios()) exit(1); - + iopl(3); scan_pci(); @@ -188,23 +188,23 @@ save_pos102 = inb(0x102); if (Config.BootOnly) { - + if (!CurrentPci && !Config.ConfigActiveDevice - && !Config.ConfigActiveOnly) { - iopl(0); - unmap(); - exit (1); + && !Config.ConfigActiveOnly) { + iopl(0); + unmap(); + exit (1); } call_boot(NULL); } else { using_history(); yyparse(); } - + unmap(); pciVideoRestore(); - + outb(0x102, save_pos102); outb(0x46e8, save_46e8); outb(0x3C3, save_vse); @@ -223,139 +223,139 @@ { int Active_is_Pci = 0; CARD32 vbios_base; - + CurrentPci = PciList; Console = open_console(); - + set_ioperm(); - + signal(2,sig_handler); signal(11,sig_handler); - + /* disable primary card */ pciVideoRestore(); /* reset PCI state to see primary card */ outb(0x3C2,~(CARD8)0x03 & save_msr); outb(0x3C3,~(CARD8)0x01 & save_vse); outb(0x46e8, ~(CARD8)0x08 & save_46e8); outb(0x102, ~(CARD8)0x01 & save_pos102); - + pciVideoDisable(); - + while (CurrentPci) { CARD16 ax; - + if (CurrentPci->active) { - Active_is_Pci = 1; - if (!Config.ConfigActiveDevice && !dev) { - CurrentPci = CurrentPci->next; - continue; - } + Active_is_Pci = 1; + if (!Config.ConfigActiveDevice && !dev) { + CurrentPci = CurrentPci->next; + continue; + } } else if (Config.ConfigActiveOnly && !dev) { - CurrentPci = CurrentPci->next; - continue; + CurrentPci = CurrentPci->next; + continue; } if (dev && ((dev->type != PCI) - || (dev->type == PCI - && (dev->loc.pci.dev != CurrentPci->dev - || dev->loc.pci.bus != CurrentPci->bus - || dev->loc.pci.func != CurrentPci->func)))) { - CurrentPci = CurrentPci->next; - continue; + || (dev->type == PCI + && (dev->loc.pci.dev != CurrentPci->dev + || dev->loc.pci.bus != CurrentPci->bus + || dev->loc.pci.func != CurrentPci->func)))) { + CurrentPci = CurrentPci->next; + continue; } - + EnableCurrent(); - + if (CurrentPci->active) { - outb(0x102, save_pos102); - outb(0x46e8, save_46e8); - outb(0x3C3, save_vse); - outb(0x3C2, save_msr); + outb(0x102, save_pos102); + outb(0x46e8, save_46e8); + outb(0x3C3, save_vse); + outb(0x3C2, save_msr); } - + /* clear interrupt vectors */ #ifdef __ia32__ vbios_base = CurrentPci->active ? setup_primary_int_vect() - : setup_int_vect(); + : setup_int_vect(); #else vbios_base = setup_int_vect(); #endif ax = ((CARD16)(CurrentPci->bus) << 8) - | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7); + | (CurrentPci->dev << 3) | (CurrentPci->func & 0x7); if (Config.Verbose > 1) P_printf("ax: 0x%x\n",ax); - + BootBios = findPciByIDs(CurrentPci->bus,CurrentPci->dev, - CurrentPci->func); + CurrentPci->func); if (!((mapPciRom(BootBios) && chksum((CARD8*)V_BIOS)) - || (CurrentPci->active && copy_vbios(vbios_base)))) { - CurrentPci = CurrentPci->next; - continue; + || (CurrentPci->active && copy_vbios(vbios_base)))) { + CurrentPci = CurrentPci->next; + continue; } if (!map_vram()) { - CurrentPci = CurrentPci->next; - continue; + CurrentPci = CurrentPci->next; + continue; } if (Config.SaveBios) save_bios_to_file(); printf("initializing PCI bus: %i dev: %i func: %i\n",CurrentPci->bus, - CurrentPci->dev,CurrentPci->func); + CurrentPci->dev,CurrentPci->func); bootBIOS(ax); unmap_vram(); if (CurrentPci->active) - close_console(Console); + close_console(Console); if (dev) return; - + CurrentPci = CurrentPci->next; } - + /* We have an ISA device - configure if requested */ if (!Active_is_Pci /* no isa card in system! */ && ((!dev && (Config.ConfigActiveDevice || Config.ConfigActiveOnly)) - || (dev && dev->type == ISA))) { + || (dev && dev->type == ISA))) { pciVideoDisable(); if (!dev || dev->type == ISA) { - outb(0x102, save_pos102); - outb(0x46e8, save_46e8); - outb(0x3C3, save_vse); - outb(0x3C2, save_msr); - + outb(0x102, save_pos102); + outb(0x46e8, save_46e8); + outb(0x3C3, save_vse); + outb(0x3C2, save_msr); + #ifdef __ia32__ - vbios_base = setup_primary_int_vect(); + vbios_base = setup_primary_int_vect(); #else - vbios_base = setup_int_vect(); + vbios_base = setup_int_vect(); #endif - if (copy_vbios(vbios_base)) { - - if (Config.SaveBios) save_bios_to_file(); - if (map_vram()) { - printf("initializing ISA bus\n"); - bootBIOS(0); - } - } - - unmap_vram(); - sleep(1); - close_console(Console); + if (copy_vbios(vbios_base)) { + + if (Config.SaveBios) save_bios_to_file(); + if (map_vram()) { + printf("initializing ISA bus\n"); + bootBIOS(0); + } + } + + unmap_vram(); + sleep(1); + close_console(Console); } } - - + + } -int +int map(void) { void* mem; mem = mmap(0, (size_t)SIZE, - PROT_EXEC | PROT_READ | PROT_WRITE, - MAP_FIXED | MAP_PRIVATE | MAP_ANON, - -1, 0 ); + PROT_EXEC | PROT_READ | PROT_WRITE, + MAP_FIXED | MAP_PRIVATE | MAP_ANON, + -1, 0 ); if (mem != 0) { - perror("anonymous map"); - return (0); + perror("anonymous map"); + return (0); } memset(mem,0,SIZE); @@ -390,33 +390,33 @@ int mem_fd; #ifdef __ia64__ - if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) #else - if ((mem_fd = open(MEM_FILE,O_RDWR))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR))<0) #endif - { - perror("opening memory"); - return 0; + { + perror("opening memory"); + return 0; } #ifdef __alpha__ if (!_bus_base()) sparse_shift = 7; /* Uh, oh, JENSEN... */ - if (!_bus_base_sparse()) sparse_shift = 0; - if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift), - PROT_READ | PROT_WRITE, - MAP_SHARED, - mem_fd, (VRAM_START << sparse_shift) - | _bus_base_sparse())) == (void *) -1) + if (!_bus_base_sparse()) sparse_shift = 0; + if ((vram_map = mmap(0,(size_t) (VRAM_SIZE << sparse_shift), + PROT_READ | PROT_WRITE, + MAP_SHARED, + mem_fd, (VRAM_START << sparse_shift) + | _bus_base_sparse())) == (void *) -1) #else if (mmap((void *) VRAM_START, (size_t) VRAM_SIZE, - PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED, - mem_fd, VRAM_START) == (void *) -1) + PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED | MAP_FIXED, + mem_fd, VRAM_START) == (void *) -1) #endif { - perror("mmap error in map_hardware_ram (1)"); - close(mem_fd); - return (0); - } + perror("mmap error in map_hardware_ram (1)"); + close(mem_fd); + return (0); + } vram_mapped = 1; close(mem_fd); return (1); @@ -426,7 +426,7 @@ unmap_vram(void) { if (!vram_mapped) return; - + munmap((void*)VRAM_START,VRAM_SIZE); vram_mapped = 0; } @@ -439,39 +439,39 @@ int size; if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) { - perror("opening memory"); - return (0); + perror("opening memory"); + return (0); } - if (lseek(mem_fd,(off_t) v_base, SEEK_SET) != (off_t) v_base) { - fprintf(stderr,"Cannot lseek\n"); - goto Error; + if (lseek(mem_fd,(off_t) v_base, SEEK_SET) != (off_t) v_base) { + fprintf(stderr,"Cannot lseek\n"); + goto Error; } tmp = (unsigned char *)malloc(3); if (read(mem_fd, (char *)tmp, (size_t) 3) != (size_t) 3) { - fprintf(stderr,"Cannot read\n"); - goto Error; + fprintf(stderr,"Cannot read\n"); + goto Error; } - if (lseek(mem_fd,(off_t) v_base,SEEK_SET) != (off_t) v_base) - goto Error; + if (lseek(mem_fd,(off_t) v_base,SEEK_SET) != (off_t) v_base) + goto Error; if (*tmp != 0x55 || *(tmp+1) != 0xAA ) { - fprintf(stderr,"No bios found at: 0x%lx\n",v_base); - goto Error; + fprintf(stderr,"No bios found at: 0x%lx\n",v_base); + goto Error; } #ifdef DEBUG - dprint((unsigned long)tmp,0x100); + dprint((unsigned long)tmp,0x100); #endif size = *(tmp+2) * 512; if (read(mem_fd, (char *)v_base, (size_t) size) != (size_t) size) { - fprintf(stderr,"Cannot read\n"); - goto Error; + fprintf(stderr,"Cannot read\n"); + goto Error; } free(tmp); close(mem_fd); if (!chksum((CARD8*)v_base)) - return (0); + return (0); return (1); @@ -488,14 +488,14 @@ int mem_fd; if ((mem_fd = open(MEM_FILE,O_RDONLY))<0) { - perror("opening memory"); - return (0); + perror("opening memory"); + return (0); } - - if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS) - goto Error; - if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF) - goto Error; + + if (lseek(mem_fd,(off_t) SYS_BIOS,SEEK_SET) != (off_t) SYS_BIOS) + goto Error; + if (read(mem_fd, (char *)SYS_BIOS, (size_t) 0xFFFF) != (size_t) 0xFFFF) + goto Error; close(mem_fd); return (1); @@ -512,15 +512,15 @@ int i; CARD8 val; int size = code[0]; - + for ( i=1;i<=size;i++) { - val = code[i]; - *ptr++ = val; + val = code[i]; + *ptr++ = val; } return; } - -void + +void dprint(unsigned long start, unsigned long size) { int i,j; @@ -529,13 +529,13 @@ for (j = 0; j < (size >> 4); j++) { char *d = c; printf("\n0x%lx: ",(unsigned long)c); - for (i = 0; i<16; i++) - printf("%2.2x ",(unsigned char) (*(c++))); + for (i = 0; i<16; i++) + printf("%2.2x ",(unsigned char) (*(c++))); c = d; for (i = 0; i<16; i++) { - printf("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ? - (unsigned char) (*(c)): '.'); - c++; + printf("%c",((((CARD8)(*c)) > 32) && (((CARD8)(*c)) < 128)) ? + (unsigned char) (*(c)): '.'); + c++; } } printf("\n"); @@ -548,16 +548,16 @@ int size, count; char file_name[256]; int fd; - + sprintf(file_name,"bios_%i.fil",num); if ((fd = open(file_name,O_WRONLY | O_CREAT | O_TRUNC,00644)) == -1) - return; + return; size = (*(unsigned char*)(V_BIOS + 2)) * 512; #ifdef V86BIOS_DEBUG dprint(V_BIOS,20); #endif if ((count = write(fd,(void *)(V_BIOS),size)) != size) - fprintf(stderr,"only saved %i of %i bytes\n",size,count); + fprintf(stderr,"only saved %i of %i bytes\n",size,count); num++; } @@ -612,15 +612,15 @@ CARD32 vbase; void *map; - if ((mem_fd = open(MEM_FILE,O_RDWR))<0) - { + if ((mem_fd = open(MEM_FILE,O_RDWR))<0) + { perror("opening memory"); return (0); } - + if ((map = mmap((void *) 0, (size_t) 0x2000, - PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED, - mem_fd, 0)) == (void *)-1) { + PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED, + mem_fd, 0)) == (void *)-1) { perror("mmap error in map_hardware_ram (2)"); close(mem_fd); return (0); @@ -636,7 +636,7 @@ if (!bios_var) bios_var = (char *)malloc(BIOS_MEM); memcpy(bios_var,0,BIOS_MEM); - + vbase = (*((CARD16*)(0x10 << 2) + 1)) << 4; if (Config.Verbose > 0) printf("vbase: 0x%x\n",vbase); return vbase; @@ -649,11 +649,11 @@ const CARD16 cs = 0x0; const CARD16 ip = 0x0; int i; - + /* let the int vects point to the SYS_BIOS seg */ for (i=0; i<0x80; i++) { - ((CARD16*)0)[i<<1] = ip; - ((CARD16*)0)[(i<<1)+1] = cs; + ((CARD16*)0)[i<<1] = ip; + ((CARD16*)0)[(i<<1)+1] = cs; } /* video interrupts default location */ ((CARD16*)0)[(0x42<<1)+1] = 0xf000; @@ -705,40 +705,40 @@ { char *date = "06/01/99"; char *eisa_ident = "PCI/ISA"; - + if (Config.MapSysBios) { - if (!copy_sys_bios()) return 0; - return 1; + if (!copy_sys_bios()) return 0; + return 1; } else { -// memset((void *)0xF0000,0xf4,0xfff7); - - /* - * we trap the "industry standard entry points" to the BIOS - * and all other locations by filling them with "hlt" - * TODO: implement hlt-handler for these - */ - memset((void *)0xF0000,0xf4,0x10000); - - /* - * TODO: we should copy the fdd table (0xfec59-0xfec5b) - * the video parameter table (0xf0ac-0xf0fb) - * and the font tables (0xfa6e-0xfe6d) - * from the original bios here - */ - - /* set bios date */ - strcpy((char *)0xFFFF5,date); - /* set up eisa ident string */ - strcpy((char *)0xFFFD9,eisa_ident); - /* write system model id for IBM-AT */ - ((char *)0)[0xFFFFE] = 0xfc; +/* memset((void *)0xF0000,0xf4,0xfff7); */ - return 1; + /* + * we trap the "industry standard entry points" to the BIOS + * and all other locations by filling them with "hlt" + * TODO: implement hlt-handler for these + */ + memset((void *)0xF0000,0xf4,0x10000); + + /* + * TODO: we should copy the fdd table (0xfec59-0xfec5b) + * the video parameter table (0xf0ac-0xf0fb) + * and the font tables (0xfa6e-0xfe6d) + * from the original bios here + */ + + /* set bios date */ + strcpy((char *)0xFFFF5,date); + /* set up eisa ident string */ + strcpy((char *)0xFFFD9,eisa_ident); + /* write system model id for IBM-AT */ + ((char *)0)[0xFFFFE] = 0xfc; + + return 1; } - + } static void @@ -747,28 +747,28 @@ int mem_fd; void *map; memType i; - + #ifdef __ia64__ - if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR | O_SYNC))<0) #else - if ((mem_fd = open(MEM_FILE,O_RDWR))<0) + if ((mem_fd = open(MEM_FILE,O_RDWR))<0) #endif - { + { perror("opening memory"); return; } - + if ((map = mmap((void *) 0, (size_t) 0x2000, - PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED, - mem_fd, 0)) == (void *)-1) { + PROT_EXEC | PROT_READ | PROT_WRITE, MAP_SHARED, + mem_fd, 0)) == (void *)-1) { perror("mmap error in map_hardware_ram (3)"); close(mem_fd); return; } for (i = 0; i < BIOS_MEM; i++) { - if (bios_var[i] != *(CARD8*)i) - *((CARD8*)map + i) = *(CARD8*)i; + if (bios_var[i] != *(CARD8*)i) + *((CARD8*)map + i) = *(CARD8*)i; } munmap(map,0x2000); @@ -782,10 +782,10 @@ CARD8 val = 0; int i; - size = *(start+2) * 512; + size = *(start+2) * 512; for (i = 0; iactive)) || !isVideo) + if ((isVideo && (!CurrentPci || CurrentPci->active)) || !isVideo) update_bios_vars(); } @@ -867,11 +867,11 @@ printf("address out of range\n"); return; } - + for (i=0; i<20; i++) { if (hltp[i].address == 0) { - hltp[i].address = (void*)val; - break; + hltp[i].address = (void*)val; + break; } } if (i == 20) printf("no more hltpoints available\n"); @@ -884,7 +884,7 @@ int i; printf("clearing all hltpoints\n"); for (i=0; i <20; i++) - hltp[i].address = NULL; + hltp[i].address = NULL; } else if (val >= 0 && val <20) hltp[val].address = NULL; else printf("hltpoint %i out of range: valid range 0-19\n",val); @@ -894,22 +894,22 @@ list_hlt() { int i; - for (i=0; i<20; i++) + for (i=0; i<20; i++) if (hltp[i].address) - printf("hltpoint[%i]: 0x%lx\n",i,(unsigned long)hltp[i].address); + printf("hltpoint[%i]: 0x%lx\n",i,(unsigned long)hltp[i].address); } static void set_hlt(Bool set) { int i; - for (i=0; i<20; i++) + for (i=0; i<20; i++) if (hltp[i].address) { - if (set) { - hltp[i].orgval = *(CARD8*)hltp[i].address; - *(CARD8*)hltp[i].address = 0xf4; - } else - *(CARD8*)hltp[i].address = hltp[i].orgval; + if (set) { + hltp[i].orgval = *(CARD8*)hltp[i].address; + *(CARD8*)hltp[i].address = 0xf4; + } else + *(CARD8*)hltp[i].address = hltp[i].orgval; } } @@ -922,12 +922,12 @@ for (i = 0; i < IOPERM_BITS;i++) if (ioperm_list[i]) { - start = i; - for (;i < IOPERM_BITS; i++) { - if (!ioperm_list[i]) { - ioperm(start,i - start, 1); - break; - } - } + start = i; + for (;i < IOPERM_BITS; i++) { + if (!ioperm_list[i]) { + ioperm(start,i - start, 1); + break; + } + } } } diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h b/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h index 06d0f9f..a8f3f8e 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h +++ b/board/MAI/bios_emulator/scitech/src/v86bios/v86bios.h @@ -31,11 +31,11 @@ #include #define p_printf(f,a...) do {if (Config.PrintPort) lprintf(f,##a);} \ - while(0) + while(0) #define i_printf(f,a...) do {if (Config.PrintIrq) lprintf(f,##a);} \ - while(0) + while(0) #define P_printf(f,a...) do {if (Config.PrintPci) lprintf(f,##a);} \ - while(0) + while(0) typedef unsigned char CARD8; typedef unsigned short CARD16; @@ -65,7 +65,7 @@ Bool MapSysBios; Bool Resort; Bool FixRom; - Bool NoConsole; + Bool NoConsole; Bool BootOnly; int Verbose; }; @@ -80,21 +80,21 @@ }; struct regs86 { - long ebx; - long ecx; - long edx; - long esi; - long edi; - long ebp; - long eax; - long eip; - long esp; - unsigned short cs; - unsigned short ss; - unsigned short es; - unsigned short ds; - unsigned short fs; - unsigned short gs; + long ebx; + long ecx; + long edx; + long esi; + long edi; + long ebp; + long eax; + long eip; + long esp; + unsigned short cs; + unsigned short ss; + unsigned short es; + unsigned short ds; + unsigned short fs; + unsigned short gs; long eflags; }; @@ -127,9 +127,9 @@ union { int none; struct pci { - int bus; - int dev; - int func; + int bus; + int dev; + int func; } pci; } loc; }; @@ -212,4 +212,3 @@ #endif #endif - diff --git a/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c b/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c index 2cc72df..b5c99d7 100644 --- a/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c +++ b/board/MAI/bios_emulator/scitech/src/v86bios/x86emu.c @@ -28,7 +28,7 @@ #include #include #include -//#include +/*#include */ #include #include #include @@ -50,10 +50,10 @@ struct pio P; void -setup_io(void) +setup_io(void) { if (!Config.PrintPort && !Config.IoStatistics) { - + #if defined (__i386__) P.inb = (u8(*)(u16))inb; P.inw = (u16(*)(u16))inw; @@ -86,19 +86,19 @@ x86emu_do_int(int num) { struct regs86 regs; - + i_printf("int 0x%x received: ax:0x%x",num,CPU_REG(AX)); if (Config.PrintIp) - i_printf(" at: 0x%x\n",getIP()); + i_printf(" at: 0x%x\n",getIP()); else - i_printf("\n"); - + i_printf("\n"); + /* try to run bios interrupt */ - + /* if not installed fall back */ #define COPY(x,y) regs.y = M.x86.x #define COPY_R(x,y) M.x86.x = regs.y - + COPY(R_EAX,eax); COPY(R_EBX,ebx); COPY(R_ECX,ecx); @@ -117,12 +117,12 @@ COPY(R_EFLG,eflags); if (!(int_handler(num,®s))) { - if (!run_bios_int(num,®s)) - goto unknown_int; - else - return; + if (!run_bios_int(num,®s)) + goto unknown_int; + else + return; } - + COPY_R(R_EAX,eax); COPY_R(R_EBX,ebx); COPY_R(R_ECX,ecx); @@ -145,7 +145,7 @@ fprintf(stderr,"\nUnknown vm86_int: %X\n\n",num); X86EMU_halt_sys(); return; - + #undef COPY #undef COPY_R } @@ -159,12 +159,12 @@ X86EMU_intrFuncs intFuncs[256]; X86EMU_pioFuncs pioFuncs = { - (u8(*)(u16))P.inb, - (u16(*)(u16))P.inw, - (u32(*)(u16))P.inl, - (void(*)(u16,u8))P.outb, - (void(*)(u16,u16))P.outw, - (void(*)(u16,u32))P.outl + (u8(*)(u16))P.inb, + (u16(*)(u16))P.inw, + (u32(*)(u16))P.inl, + (void(*)(u16,u8))P.outb, + (void(*)(u16,u16))P.outw, + (void(*)(u16,u32))P.outl }; #ifdef __alpha__ X86EMU_memFuncs memFuncs = { @@ -178,29 +178,29 @@ #endif M.mem_base = 0; M.mem_size = 1024*1024 + 1024; - // M.x86.debug = DEBUG_DISASSEMBLE_F | DEBUG_TRACE_F | DEBUG_DECODE_F; - // M.x86.debug |= DEBUG_DECODE_F | DEBUG_TRACE_F; + /* M.x86.debug = DEBUG_DISASSEMBLE_F | DEBUG_TRACE_F | DEBUG_DECODE_F; */ + /* M.x86.debug |= DEBUG_DECODE_F | DEBUG_TRACE_F; */ /* * For single step tracing compile x86emu with option -DDEBUG */ M.x86.debug = 0; if (Config.PrintIp) - M.x86.debug = DEBUG_SAVE_CS_IP; + M.x86.debug = DEBUG_SAVE_CS_IP; if (Config.Trace) - X86EMU_trace_on(); + X86EMU_trace_on(); X86EMU_setupPioFuncs(&pioFuncs); #ifdef __alpha__ X86EMU_setupMemFuncs(&memFuncs); #endif for (i=0;i<256;i++) - intFuncs[i] = x86emu_do_int; + intFuncs[i] = x86emu_do_int; X86EMU_setupIntrFuncs(intFuncs); eip = bios_start & 0xFFFF; cs = (bios_start & 0xFF0000) >> 4; - + CPU_REG(EAX) = regs->ax; CPU_REG(EBX) = regs->bx; CPU_REG(ECX) = regs->cx; @@ -209,7 +209,7 @@ CPU_REG(EDI) = regs->di; CPU_REG(EBP) = 0; CPU_REG(EIP) = eip; - CPU_REG(CS) = cs; + CPU_REG(CS) = cs; CPU_REG(SP) = 0x100; CPU_REG(SS) = 0x30; /* This is the standard pc bios stack */ CPU_REG(ES) = regs->es; @@ -252,14 +252,14 @@ setup_x86emu(bios_start,regs); if (setjmp(x86_esc) == 0) { - org_handler = signal(2,vmexit); - do_x86emu(); - signal(2,org_handler); - collect_bios_regs(regs); + org_handler = signal(2,vmexit); + do_x86emu(); + signal(2,org_handler); + collect_bios_regs(regs); } else { - signal(2,org_handler); - printf("interrupted at 0x%x\n",((CARD16)CPU_REG(CS)) << 4 - | (CARD16)CPU_REG(EIP)); + signal(2,org_handler); + printf("interrupted at 0x%x\n",((CARD16)CPU_REG(CS)) << 4 + | (CARD16)CPU_REG(EIP)); } } @@ -272,23 +272,23 @@ /* check if bios vector is initialized */ if (((CARD16*)0)[(num<<1)+1] == 0x0000) { /* SYS_BIOS_SEG ?*/ #ifdef V86BIOS_DEBUG - i_printf("card BIOS not loaded\n"); + i_printf("card BIOS not loaded\n"); #endif - return 0; + return 0; } - + #ifdef V86BIOS_DEBUG if (firsttime) { - dprint(0,0x3D0); - firsttime = 0; + dprint(0,0x3D0); + firsttime = 0; } #endif - + i_printf("calling card BIOS at: "); i_printf("0x%x:%x\n",((CARD16 *) 0)[(num << 1) + 1], - (CARD32)((CARD16 *) 0)[num << 1]); + (CARD32)((CARD16 *) 0)[num << 1]); X86EMU_prepareForInt(num); - + return 1; } diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/debug.c b/board/MAI/bios_emulator/scitech/src/x86emu/debug.c index 050008c..235e6ac 100644 --- a/board/MAI/bios_emulator/scitech/src/x86emu/debug.c +++ b/board/MAI/bios_emulator/scitech/src/x86emu/debug.c @@ -48,7 +48,7 @@ static void print_encoded_bytes (u16 s, u16 o); static void print_decoded_instruction (void); static int parse_line (char *s, int *ps, int *n); - + /* should look something like debug's output. */ void X86EMU_trace_regs (void) { @@ -94,11 +94,11 @@ * SINGLE_STEP(r,m); which disappear if DEBUG is not defined to * the preprocessor. The TRACE_REGS macro expands to: * - * if (debug&DEBUG_DISASSEMBLE) + * if (debug&DEBUG_DISASSEMBLE) * {just_disassemble(); goto EndOfInstruction;} * if (debug&DEBUG_TRACE) trace_regs(r,m); * - * ...... and at the last line of the routine. + * ...... and at the last line of the routine. * * EndOfInstruction: end_instr(); * @@ -112,14 +112,14 @@ tregs = M; tregs.x86.R_IP = off; tregs.x86.R_CS = seg; - + /* reset the decoding buffers */ tregs.x86.enc_str_pos = 0; tregs.x86.enc_pos = 0; - + /* turn on the "disassemble only, no execute" flag */ tregs.x86.debug |= DEBUG_DISASSEMBLE_F; - + /* DUMP NEXT n instructions to screen in straight_line fashion */ /* * This looks like the regular instruction fetch stream, except @@ -210,7 +210,7 @@ u32 end = (off+16) & 0xfffffff0; u32 i; u32 current; - + current = start; while (end <= off + amt) { printk("%04x:%04x ", seg, start); @@ -235,7 +235,7 @@ int offset; static int breakpoint; static int noDecode = 1; - + char *p; if (DEBUG_BREAK()) { @@ -249,19 +249,19 @@ X86EMU_trace_regs(); } } - + done=0; offset = M.x86.saved_ip; while (!done) { - printk("-"); - //p = fgets(s, 1023, stdin); + printk("-"); + /*p = fgets(s, 1023, stdin); */ cons_gets(s); - cmd = parse_line(s, ps, &ntok); - switch(cmd) { + cmd = parse_line(s, ps, &ntok); + switch(cmd) { case 'u': disassemble_forward(M.x86.saved_cs,(u16)offset,10); - break; - case 'd': + break; + case 'd': if (ntok == 2) { segment = M.x86.saved_cs; offset = ps[1]; @@ -277,22 +277,22 @@ X86EMU_dump_memory(segment,(u16)offset,16); offset += 16; } - break; + break; case 'c': M.x86.debug ^= DEBUG_TRACECALL_F; - break; + break; case 's': M.x86.debug ^= DEBUG_SVC_F | DEBUG_SYS_F | DEBUG_SYSINT_F; - break; + break; case 'r': X86EMU_trace_regs(); - break; + break; case 'x': X86EMU_trace_xregs(); - break; + break; case 'g': - if (ntok == 2) { - breakpoint = ps[1]; + if (ntok == 2) { + breakpoint = ps[1]; printk("breakpoint set to 0x%X\n", breakpoint); if (noDecode) { M.x86.debug |= DEBUG_DECODE_NOPRINT_F; @@ -302,8 +302,8 @@ M.x86.debug &= ~DEBUG_TRACE_F; M.x86.debug |= DEBUG_BREAK_F; done = 1; - } - break; + } + break; case 'q': M.x86.debug |= DEBUG_EXIT; return; @@ -313,9 +313,9 @@ break; case 't': case 0: - done = 1; - break; - } + done = 1; + break; + } } } @@ -338,23 +338,23 @@ ps[*n] = *s; switch (*s) { case '\n': - *n += 1; - return 0; + *n += 1; + return 0; default: - cmd = *s; - *n += 1; + cmd = *s; + *n += 1; } while (1) { while (*s != ' ' && *s != '\t' && *s != '\n') s++; - + if (*s == '\n') return cmd; - + while(*s == ' ' || *s == '\t') s++; - + ps[*n]=atoi(s); - //sscanf(s,"%x",&ps[*n]); + /*sscanf(s,"%x",&ps[*n]); */ *n += 1; } } @@ -405,7 +405,7 @@ if (ACCESS_FLAG(F_CF)) printk("CY "); else printk("NC "); printk("\n"); - //x86emu_dump_stack(); + /*x86emu_dump_stack(); */ } void x86emu_dump_xregs (void) diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/decode.c b/board/MAI/bios_emulator/scitech/src/x86emu/decode.c index bb204e6..832b1f5 100644 --- a/board/MAI/bios_emulator/scitech/src/x86emu/decode.c +++ b/board/MAI/bios_emulator/scitech/src/x86emu/decode.c @@ -93,7 +93,7 @@ M.x86.intr = 0; DB(x86emu_end_instr();) - + for (;;) { DB(if (CHECK_IP_FETCH()) x86emu_check_ip_access();) /* If debugging, save the IP and CS values. */ @@ -745,11 +745,11 @@ return M.x86.R_ECX; case 2: DECODE_PRINTF("[EDX]"); -// M.x86.mode |= SYSMODE_SEG_DS_SS; +/* M.x86.mode |= SYSMODE_SEG_DS_SS; */ return M.x86.R_EDX; case 3: DECODE_PRINTF("[EBX]"); -// M.x86.mode |= SYSMODE_SEG_DS_SS; +/* M.x86.mode |= SYSMODE_SEG_DS_SS; */ return M.x86.R_EBX; case 4: printk("Unsupported SIB encoding\n"); @@ -933,7 +933,7 @@ } else { - int displacement = (s16)fetch_word_imm(); + int displacement = (s16)fetch_word_imm(); switch (rm) { case 0: DECODE_PRINTF2("%d[BX+SI]", displacement); diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c b/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c index 08aea42..7f7c345 100644 --- a/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c +++ b/board/MAI/bios_emulator/scitech/src/x86emu/fpu.c @@ -102,24 +102,24 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (mod != 3) { - DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl); + DECODE_PRINTINSTR32(x86emu_fpu_op_d9_tab, mod, rh, rl); } else { - DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]); + DECODE_PRINTF(x86emu_fpu_op_d9_tab1[(rh << 3) + rl]); } #endif switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; case 3: /* register to register */ stkelem = (u8)rl; if (rh < 4) { @@ -127,167 +127,167 @@ } else { DECODE_PRINTF("\n"); } - break; + break; } #ifdef X86EMU_FPU_PRESENT /* execute */ switch (mod) { case 3: - switch (rh) { - case 0: - x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem); - break; - case 1: - x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem); - break; - case 2: - switch (rl) { - case 0: - x86emu_fpu_R_nop(); - break; - default: - x86emu_fpu_illegal(); - break; - } - case 3: - x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem); - break; - case 4: - switch (rl) { - case 0: - x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP); - break; - default: - /* 2,3,6,7 */ - x86emu_fpu_illegal(); - break; - } - break; + switch (rh) { + case 0: + x86emu_fpu_R_fld(X86EMU_FPU_STKTOP, stkelem); + break; + case 1: + x86emu_fpu_R_fxch(X86EMU_FPU_STKTOP, stkelem); + break; + case 2: + switch (rl) { + case 0: + x86emu_fpu_R_nop(); + break; + default: + x86emu_fpu_illegal(); + break; + } + case 3: + x86emu_fpu_R_fstp(X86EMU_FPU_STKTOP, stkelem); + break; + case 4: + switch (rl) { + case 0: + x86emu_fpu_R_fchs(X86EMU_FPU_STKTOP); + break; + case 1: + x86emu_fpu_R_fabs(X86EMU_FPU_STKTOP); + break; + case 4: + x86emu_fpu_R_ftst(X86EMU_FPU_STKTOP); + break; + case 5: + x86emu_fpu_R_fxam(X86EMU_FPU_STKTOP); + break; + default: + /* 2,3,6,7 */ + x86emu_fpu_illegal(); + break; + } + break; - case 5: - switch (rl) { - case 0: - x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP); - break; - case 6: - x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP); - break; - default: - /* 7 */ - x86emu_fpu_illegal(); - break; - } - break; + case 5: + switch (rl) { + case 0: + x86emu_fpu_R_fld1(X86EMU_FPU_STKTOP); + break; + case 1: + x86emu_fpu_R_fldl2t(X86EMU_FPU_STKTOP); + break; + case 2: + x86emu_fpu_R_fldl2e(X86EMU_FPU_STKTOP); + break; + case 3: + x86emu_fpu_R_fldpi(X86EMU_FPU_STKTOP); + break; + case 4: + x86emu_fpu_R_fldlg2(X86EMU_FPU_STKTOP); + break; + case 5: + x86emu_fpu_R_fldln2(X86EMU_FPU_STKTOP); + break; + case 6: + x86emu_fpu_R_fldz(X86EMU_FPU_STKTOP); + break; + default: + /* 7 */ + x86emu_fpu_illegal(); + break; + } + break; - case 6: - switch (rl) { - case 0: - x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_illegal(); - break; - case 6: - x86emu_fpu_R_decstp(); - break; - case 7: - x86emu_fpu_R_incstp(); - break; - } - break; + case 6: + switch (rl) { + case 0: + x86emu_fpu_R_f2xm1(X86EMU_FPU_STKTOP); + break; + case 1: + x86emu_fpu_R_fyl2x(X86EMU_FPU_STKTOP); + break; + case 2: + x86emu_fpu_R_fptan(X86EMU_FPU_STKTOP); + break; + case 3: + x86emu_fpu_R_fpatan(X86EMU_FPU_STKTOP); + break; + case 4: + x86emu_fpu_R_fxtract(X86EMU_FPU_STKTOP); + break; + case 5: + x86emu_fpu_illegal(); + break; + case 6: + x86emu_fpu_R_decstp(); + break; + case 7: + x86emu_fpu_R_incstp(); + break; + } + break; - case 7: - switch (rl) { - case 0: - x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_illegal(); - break; - case 4: - x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP); - break; - case 6: - case 7: - default: - x86emu_fpu_illegal(); - break; - } - break; + case 7: + switch (rl) { + case 0: + x86emu_fpu_R_fprem(X86EMU_FPU_STKTOP); + break; + case 1: + x86emu_fpu_R_fyl2xp1(X86EMU_FPU_STKTOP); + break; + case 2: + x86emu_fpu_R_fsqrt(X86EMU_FPU_STKTOP); + break; + case 3: + x86emu_fpu_illegal(); + break; + case 4: + x86emu_fpu_R_frndint(X86EMU_FPU_STKTOP); + break; + case 5: + x86emu_fpu_R_fscale(X86EMU_FPU_STKTOP); + break; + case 6: + case 7: + default: + x86emu_fpu_illegal(); + break; + } + break; - default: - switch (rh) { - case 0: - x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset); - break; - case 3: - x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset); - break; - case 4: - x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset); - break; - case 5: - x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset); - break; - case 6: - x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset); - break; - case 7: - x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset); - break; - } - } + default: + switch (rh) { + case 0: + x86emu_fpu_M_fld(X86EMU_FPU_FLOAT, destoffset); + break; + case 1: + x86emu_fpu_illegal(); + break; + case 2: + x86emu_fpu_M_fst(X86EMU_FPU_FLOAT, destoffset); + break; + case 3: + x86emu_fpu_M_fstp(X86EMU_FPU_FLOAT, destoffset); + break; + case 4: + x86emu_fpu_M_fldenv(X86EMU_FPU_WORD, destoffset); + break; + case 5: + x86emu_fpu_M_fldcw(X86EMU_FPU_WORD, destoffset); + break; + case 6: + x86emu_fpu_M_fstenv(X86EMU_FPU_WORD, destoffset); + break; + case 7: + x86emu_fpu_M_fstcw(X86EMU_FPU_WORD, destoffset); + break; + } + } } #endif /* X86EMU_FPU_PRESENT */ DECODE_CLEAR_SEGOVR(); @@ -306,7 +306,7 @@ "FICOMP\tDWORD PTR ", "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", "FIDIVR\tDWORD PTR ", - + "FIADD\tDWORD PTR ", "FIMUL\tDWORD PTR ", "FICOM\tDWORD PTR ", "FICOMP\tDWORD PTR ", "FISUB\tDWORD PTR ", "FISUBR\tDWORD PTR ", "FIDIV\tDWORD PTR ", @@ -330,54 +330,54 @@ DECODE_PRINTINSTR32(x86emu_fpu_op_da_tab, mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; case 3: /* register to register */ stkelem = (u8)rl; - DECODE_PRINTF2("\tST(%d),ST\n", stkelem); - break; + DECODE_PRINTF2("\tST(%d),ST\n", stkelem); + break; } #ifdef X86EMU_FPU_PRESENT switch (mod) { case 3: - x86emu_fpu_illegal(); - break; + x86emu_fpu_illegal(); + break; default: - switch (rh) { - case 0: - x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset); - break; - case 1: - x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset); - break; - case 2: - x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset); - break; - case 3: - x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset); - break; - case 4: - x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset); - break; - case 5: - x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset); - break; - case 6: - x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset); - break; - case 7: - x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset); - break; - } + switch (rh) { + case 0: + x86emu_fpu_M_iadd(X86EMU_FPU_SHORT, destoffset); + break; + case 1: + x86emu_fpu_M_imul(X86EMU_FPU_SHORT, destoffset); + break; + case 2: + x86emu_fpu_M_icom(X86EMU_FPU_SHORT, destoffset); + break; + case 3: + x86emu_fpu_M_icomp(X86EMU_FPU_SHORT, destoffset); + break; + case 4: + x86emu_fpu_M_isub(X86EMU_FPU_SHORT, destoffset); + break; + case 5: + x86emu_fpu_M_isubr(X86EMU_FPU_SHORT, destoffset); + break; + case 6: + x86emu_fpu_M_idiv(X86EMU_FPU_SHORT, destoffset); + break; + case 7: + x86emu_fpu_M_idivr(X86EMU_FPU_SHORT, destoffset); + break; + } } #endif DECODE_CLEAR_SEGOVR(); @@ -409,95 +409,95 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (mod != 3) { - DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl); + DECODE_PRINTINSTR32(x86emu_fpu_op_db_tab, mod, rh, rl); } else if (rh == 4) { /* === 11 10 0 nnn */ - switch (rl) { - case 0: - DECODE_PRINTF("FENI\n"); - break; - case 1: - DECODE_PRINTF("FDISI\n"); - break; - case 2: - DECODE_PRINTF("FCLEX\n"); - break; - case 3: - DECODE_PRINTF("FINIT\n"); - break; - } + switch (rl) { + case 0: + DECODE_PRINTF("FENI\n"); + break; + case 1: + DECODE_PRINTF("FDISI\n"); + break; + case 2: + DECODE_PRINTF("FCLEX\n"); + break; + case 3: + DECODE_PRINTF("FINIT\n"); + break; + } } else { - DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl)); + DECODE_PRINTF2("ESC_DB %0x\n", (mod << 6) + (rh << 3) + (rl)); } #endif /* DEBUG */ switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - break; + destoffset = decode_rm00_address(rl); + break; case 1: - destoffset = decode_rm01_address(rl); - break; + destoffset = decode_rm01_address(rl); + break; case 2: - destoffset = decode_rm10_address(rl); - break; + destoffset = decode_rm10_address(rl); + break; case 3: /* register to register */ - break; + break; } #ifdef X86EMU_FPU_PRESENT /* execute */ switch (mod) { case 3: - switch (rh) { - case 4: - switch (rl) { - case 0: - x86emu_fpu_R_feni(); - break; - case 1: - x86emu_fpu_R_fdisi(); - break; - case 2: - x86emu_fpu_R_fclex(); - break; - case 3: - x86emu_fpu_R_finit(); - break; - default: - x86emu_fpu_illegal(); - break; - } - break; - default: - x86emu_fpu_illegal(); - break; - } - break; + switch (rh) { + case 4: + switch (rl) { + case 0: + x86emu_fpu_R_feni(); + break; + case 1: + x86emu_fpu_R_fdisi(); + break; + case 2: + x86emu_fpu_R_fclex(); + break; + case 3: + x86emu_fpu_R_finit(); + break; + default: + x86emu_fpu_illegal(); + break; + } + break; + default: + x86emu_fpu_illegal(); + break; + } + break; default: - switch (rh) { - case 0: - x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset); - break; - case 3: - x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset); - break; - case 4: - x86emu_fpu_illegal(); - break; - case 5: - x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset); - break; - case 6: - x86emu_fpu_illegal(); - break; - case 7: - x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset); - break; - } + switch (rh) { + case 0: + x86emu_fpu_M_fild(X86EMU_FPU_SHORT, destoffset); + break; + case 1: + x86emu_fpu_illegal(); + break; + case 2: + x86emu_fpu_M_fist(X86EMU_FPU_SHORT, destoffset); + break; + case 3: + x86emu_fpu_M_fistp(X86EMU_FPU_SHORT, destoffset); + break; + case 4: + x86emu_fpu_illegal(); + break; + case 5: + x86emu_fpu_M_fld(X86EMU_FPU_LDBL, destoffset); + break; + case 6: + x86emu_fpu_illegal(); + break; + case 7: + x86emu_fpu_M_fstp(X86EMU_FPU_LDBL, destoffset); + break; + } } #endif DECODE_CLEAR_SEGOVR(); @@ -538,80 +538,80 @@ DECODE_PRINTINSTR32(x86emu_fpu_op_dc_tab, mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; case 3: /* register to register */ stkelem = (u8)rl; - DECODE_PRINTF2("\tST(%d),ST\n", stkelem); - break; + DECODE_PRINTF2("\tST(%d),ST\n", stkelem); + break; } #ifdef X86EMU_FPU_PRESENT /* execute */ switch (mod) { case 3: - switch (rh) { - case 0: - x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP); - break; - case 3: - x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP); - break; - case 4: - x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP); - break; - case 6: - x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP); - break; - case 7: - x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP); - break; - } - break; + switch (rh) { + case 0: + x86emu_fpu_R_fadd(stkelem, X86EMU_FPU_STKTOP); + break; + case 1: + x86emu_fpu_R_fmul(stkelem, X86EMU_FPU_STKTOP); + break; + case 2: + x86emu_fpu_R_fcom(stkelem, X86EMU_FPU_STKTOP); + break; + case 3: + x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP); + break; + case 4: + x86emu_fpu_R_fsubr(stkelem, X86EMU_FPU_STKTOP); + break; + case 5: + x86emu_fpu_R_fsub(stkelem, X86EMU_FPU_STKTOP); + break; + case 6: + x86emu_fpu_R_fdivr(stkelem, X86EMU_FPU_STKTOP); + break; + case 7: + x86emu_fpu_R_fdiv(stkelem, X86EMU_FPU_STKTOP); + break; + } + break; default: - switch (rh) { - case 0: - x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset); - break; - case 1: - x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset); - break; - case 2: - x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset); - break; - case 3: - x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset); - break; - case 4: - x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset); - break; - case 5: - x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset); - break; - case 6: - x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset); - break; - case 7: - x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset); - break; - } + switch (rh) { + case 0: + x86emu_fpu_M_fadd(X86EMU_FPU_DOUBLE, destoffset); + break; + case 1: + x86emu_fpu_M_fmul(X86EMU_FPU_DOUBLE, destoffset); + break; + case 2: + x86emu_fpu_M_fcom(X86EMU_FPU_DOUBLE, destoffset); + break; + case 3: + x86emu_fpu_M_fcomp(X86EMU_FPU_DOUBLE, destoffset); + break; + case 4: + x86emu_fpu_M_fsub(X86EMU_FPU_DOUBLE, destoffset); + break; + case 5: + x86emu_fpu_M_fsubr(X86EMU_FPU_DOUBLE, destoffset); + break; + case 6: + x86emu_fpu_M_fdiv(X86EMU_FPU_DOUBLE, destoffset); + break; + case 7: + x86emu_fpu_M_fdivr(X86EMU_FPU_DOUBLE, destoffset); + break; + } } #endif DECODE_CLEAR_SEGOVR(); @@ -648,70 +648,70 @@ DECODE_PRINTINSTR32(x86emu_fpu_op_dd_tab, mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; case 3: /* register to register */ stkelem = (u8)rl; - DECODE_PRINTF2("\tST(%d),ST\n", stkelem); - break; + DECODE_PRINTF2("\tST(%d),ST\n", stkelem); + break; } #ifdef X86EMU_FPU_PRESENT switch (mod) { case 3: - switch (rh) { - case 0: - x86emu_fpu_R_ffree(stkelem); - break; - case 1: - x86emu_fpu_R_fxch(stkelem); - break; - case 2: - x86emu_fpu_R_fst(stkelem); /* register version */ - break; - case 3: - x86emu_fpu_R_fstp(stkelem); /* register version */ - break; - default: - x86emu_fpu_illegal(); - break; - } - break; + switch (rh) { + case 0: + x86emu_fpu_R_ffree(stkelem); + break; + case 1: + x86emu_fpu_R_fxch(stkelem); + break; + case 2: + x86emu_fpu_R_fst(stkelem); /* register version */ + break; + case 3: + x86emu_fpu_R_fstp(stkelem); /* register version */ + break; + default: + x86emu_fpu_illegal(); + break; + } + break; default: - switch (rh) { - case 0: - x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset); - break; - case 3: - x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset); - break; - case 4: - x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset); - break; - case 5: - x86emu_fpu_illegal(); - break; - case 6: - x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset); - break; - case 7: - x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset); - break; - } + switch (rh) { + case 0: + x86emu_fpu_M_fld(X86EMU_FPU_DOUBLE, destoffset); + break; + case 1: + x86emu_fpu_illegal(); + break; + case 2: + x86emu_fpu_M_fst(X86EMU_FPU_DOUBLE, destoffset); + break; + case 3: + x86emu_fpu_M_fstp(X86EMU_FPU_DOUBLE, destoffset); + break; + case 4: + x86emu_fpu_M_frstor(X86EMU_FPU_WORD, destoffset); + break; + case 5: + x86emu_fpu_illegal(); + break; + case 6: + x86emu_fpu_M_fsave(X86EMU_FPU_WORD, destoffset); + break; + case 7: + x86emu_fpu_M_fstsw(X86EMU_FPU_WORD, destoffset); + break; + } } #endif DECODE_CLEAR_SEGOVR(); @@ -755,82 +755,82 @@ DECODE_PRINTINSTR32(x86emu_fpu_op_de_tab, mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; case 3: /* register to register */ stkelem = (u8)rl; - DECODE_PRINTF2("\tST(%d),ST\n", stkelem); - break; + DECODE_PRINTF2("\tST(%d),ST\n", stkelem); + break; } #ifdef X86EMU_FPU_PRESENT switch (mod) { case 3: - switch (rh) { - case 0: - x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP); - break; - case 1: - x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP); - break; - case 2: - x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP); - break; - case 3: - if (stkelem == 1) - x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP); - else - x86emu_fpu_illegal(); - break; - case 4: - x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP); - break; - case 5: - x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP); - break; - case 6: - x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP); - break; - case 7: - x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP); - break; - } - break; + switch (rh) { + case 0: + x86emu_fpu_R_faddp(stkelem, X86EMU_FPU_STKTOP); + break; + case 1: + x86emu_fpu_R_fmulp(stkelem, X86EMU_FPU_STKTOP); + break; + case 2: + x86emu_fpu_R_fcomp(stkelem, X86EMU_FPU_STKTOP); + break; + case 3: + if (stkelem == 1) + x86emu_fpu_R_fcompp(stkelem, X86EMU_FPU_STKTOP); + else + x86emu_fpu_illegal(); + break; + case 4: + x86emu_fpu_R_fsubrp(stkelem, X86EMU_FPU_STKTOP); + break; + case 5: + x86emu_fpu_R_fsubp(stkelem, X86EMU_FPU_STKTOP); + break; + case 6: + x86emu_fpu_R_fdivrp(stkelem, X86EMU_FPU_STKTOP); + break; + case 7: + x86emu_fpu_R_fdivp(stkelem, X86EMU_FPU_STKTOP); + break; + } + break; default: - switch (rh) { - case 0: - x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset); - break; - case 1: - x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset); - break; - case 2: - x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset); - break; - case 3: - x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset); - break; - case 4: - x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset); - break; - case 5: - x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset); - break; - case 6: - x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset); - break; - case 7: - x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset); - break; - } + switch (rh) { + case 0: + x86emu_fpu_M_fiadd(X86EMU_FPU_WORD, destoffset); + break; + case 1: + x86emu_fpu_M_fimul(X86EMU_FPU_WORD, destoffset); + break; + case 2: + x86emu_fpu_M_ficom(X86EMU_FPU_WORD, destoffset); + break; + case 3: + x86emu_fpu_M_ficomp(X86EMU_FPU_WORD, destoffset); + break; + case 4: + x86emu_fpu_M_fisub(X86EMU_FPU_WORD, destoffset); + break; + case 5: + x86emu_fpu_M_fisubr(X86EMU_FPU_WORD, destoffset); + break; + case 6: + x86emu_fpu_M_fidiv(X86EMU_FPU_WORD, destoffset); + break; + case 7: + x86emu_fpu_M_fidivr(X86EMU_FPU_WORD, destoffset); + break; + } } #endif DECODE_CLEAR_SEGOVR(); @@ -874,70 +874,70 @@ DECODE_PRINTINSTR32(x86emu_fpu_op_df_tab, mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + break; case 3: /* register to register */ stkelem = (u8)rl; - DECODE_PRINTF2("\tST(%d)\n", stkelem); - break; + DECODE_PRINTF2("\tST(%d)\n", stkelem); + break; } #ifdef X86EMU_FPU_PRESENT switch (mod) { case 3: - switch (rh) { - case 0: - x86emu_fpu_R_ffree(stkelem); - break; - case 1: - x86emu_fpu_R_fxch(stkelem); - break; - case 2: - x86emu_fpu_R_fst(stkelem); /* register version */ - break; - case 3: - x86emu_fpu_R_fstp(stkelem); /* register version */ - break; - default: - x86emu_fpu_illegal(); - break; - } - break; + switch (rh) { + case 0: + x86emu_fpu_R_ffree(stkelem); + break; + case 1: + x86emu_fpu_R_fxch(stkelem); + break; + case 2: + x86emu_fpu_R_fst(stkelem); /* register version */ + break; + case 3: + x86emu_fpu_R_fstp(stkelem); /* register version */ + break; + default: + x86emu_fpu_illegal(); + break; + } + break; default: - switch (rh) { - case 0: - x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset); - break; - case 1: - x86emu_fpu_illegal(); - break; - case 2: - x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset); - break; - case 3: - x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset); - break; - case 4: - x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset); - break; - case 5: - x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset); - break; - case 6: - x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset); - break; - case 7: - x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset); - break; - } + switch (rh) { + case 0: + x86emu_fpu_M_fild(X86EMU_FPU_WORD, destoffset); + break; + case 1: + x86emu_fpu_illegal(); + break; + case 2: + x86emu_fpu_M_fist(X86EMU_FPU_WORD, destoffset); + break; + case 3: + x86emu_fpu_M_fistp(X86EMU_FPU_WORD, destoffset); + break; + case 4: + x86emu_fpu_M_fbld(X86EMU_FPU_BSD, destoffset); + break; + case 5: + x86emu_fpu_M_fild(X86EMU_FPU_LONG, destoffset); + break; + case 6: + x86emu_fpu_M_fbstp(X86EMU_FPU_BSD, destoffset); + break; + case 7: + x86emu_fpu_M_fistp(X86EMU_FPU_LONG, destoffset); + break; + } } #endif DECODE_CLEAR_SEGOVR(); diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/ops.c b/board/MAI/bios_emulator/scitech/src/x86emu/ops.c index 0d79776..2d4f93e 100644 --- a/board/MAI/bios_emulator/scitech/src/x86emu/ops.c +++ b/board/MAI/bios_emulator/scitech/src/x86emu/ops.c @@ -88,7 +88,7 @@ DECODE_PRINTF("ILLEGAL X86 OPCODE\n"); TRACE_REGS(); printk("%04x:%04x: %02X ILLEGAL X86 OPCODE!\n", - M.x86.R_CS, M.x86.R_IP-1,op1); + M.x86.R_CS, M.x86.R_IP-1,op1); HALT_SYS(); END_OF_INSTR(); } @@ -109,43 +109,43 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = add_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = add_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = add_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = add_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = add_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = add_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -165,107 +165,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = add_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = add_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = add_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = add_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = add_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = add_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = add_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = add_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = add_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = add_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = add_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = add_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -287,40 +287,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_byte(*destreg, srcval); + break; case 1: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_byte(*destreg, srcval); + break; case 2: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_byte(*destreg, srcval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -340,101 +340,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_word(*destreg, srcval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_word(*destreg, srcval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_word(*destreg, srcval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = add_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = add_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -468,18 +468,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("ADD\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("ADD\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("ADD\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("ADD\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = add_long(M.x86.R_EAX, srcval); + M.x86.R_EAX = add_long(M.x86.R_EAX, srcval); } else { - M.x86.R_AX = add_word(M.x86.R_AX, (u16)srcval); + M.x86.R_AX = add_word(M.x86.R_AX, (u16)srcval); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -529,43 +529,43 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = or_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = or_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = or_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = or_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = or_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = or_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -585,107 +585,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = or_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = or_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = or_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = or_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = or_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = or_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = or_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = or_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = or_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = or_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = or_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = or_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -707,40 +707,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_byte(*destreg, srcval); + break; case 1: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_byte(*destreg, srcval); + break; case 2: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_byte(*destreg, srcval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -760,101 +760,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_word(*destreg, srcval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_word(*destreg, srcval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_word(*destreg, srcval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = or_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = or_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -888,18 +888,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("OR\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("OR\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("OR\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("OR\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = or_long(M.x86.R_EAX, srcval); + M.x86.R_EAX = or_long(M.x86.R_EAX, srcval); } else { - M.x86.R_AX = or_word(M.x86.R_AX, (u16)srcval); + M.x86.R_AX = or_word(M.x86.R_AX, (u16)srcval); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -946,43 +946,43 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = adc_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = adc_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = adc_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = adc_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = adc_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = adc_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1002,107 +1002,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = adc_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = adc_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = adc_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = adc_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = adc_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = adc_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = adc_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = adc_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = adc_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = adc_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = adc_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = adc_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1124,40 +1124,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_byte(*destreg, srcval); + break; case 1: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_byte(*destreg, srcval); + break; case 2: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_byte(*destreg, srcval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1177,101 +1177,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_word(*destreg, srcval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_word(*destreg, srcval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_word(*destreg, srcval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = adc_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = adc_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1305,18 +1305,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("ADC\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("ADC\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("ADC\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("ADC\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = adc_long(M.x86.R_EAX, srcval); + M.x86.R_EAX = adc_long(M.x86.R_EAX, srcval); } else { - M.x86.R_AX = adc_word(M.x86.R_AX, (u16)srcval); + M.x86.R_AX = adc_word(M.x86.R_AX, (u16)srcval); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1366,43 +1366,43 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sbb_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sbb_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sbb_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sbb_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sbb_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sbb_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1422,107 +1422,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sbb_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sbb_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sbb_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sbb_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sbb_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sbb_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sbb_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sbb_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sbb_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sbb_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sbb_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sbb_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1544,40 +1544,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_byte(*destreg, srcval); + break; case 1: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_byte(*destreg, srcval); + break; case 2: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_byte(*destreg, srcval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1597,101 +1597,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_word(*destreg, srcval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_word(*destreg, srcval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_word(*destreg, srcval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sbb_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sbb_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1725,18 +1725,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("SBB\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("SBB\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("SBB\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("SBB\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = sbb_long(M.x86.R_EAX, srcval); + M.x86.R_EAX = sbb_long(M.x86.R_EAX, srcval); } else { - M.x86.R_AX = sbb_word(M.x86.R_AX, (u16)srcval); + M.x86.R_AX = sbb_word(M.x86.R_AX, (u16)srcval); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1787,46 +1787,46 @@ switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = and_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = and_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = and_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = and_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = and_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = and_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1846,107 +1846,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = and_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = and_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = and_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = and_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = and_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = and_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = and_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = and_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = and_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = and_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = and_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = and_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1968,40 +1968,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_byte(*destreg, srcval); + break; case 1: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_byte(*destreg, srcval); + break; case 2: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_byte(*destreg, srcval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2021,102 +2021,102 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_word(*destreg, srcval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_long(*destreg, srcval); - break; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_long(*destreg, srcval); + break; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_word(*destreg, srcval); - break; - } + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_word(*destreg, srcval); + break; + } case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_word(*destreg, srcval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = and_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = and_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2150,18 +2150,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("AND\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("AND\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("AND\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("AND\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = and_long(M.x86.R_EAX, srcval); + M.x86.R_EAX = and_long(M.x86.R_EAX, srcval); } else { - M.x86.R_AX = and_word(M.x86.R_AX, (u16)srcval); + M.x86.R_AX = and_word(M.x86.R_AX, (u16)srcval); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2214,43 +2214,43 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sub_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sub_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sub_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sub_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sub_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sub_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2270,107 +2270,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sub_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sub_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sub_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sub_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sub_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sub_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sub_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sub_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sub_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sub_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = sub_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = sub_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2392,40 +2392,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_byte(*destreg, srcval); + break; case 1: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_byte(*destreg, srcval); + break; case 2: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_byte(*destreg, srcval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2445,101 +2445,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_word(*destreg, srcval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_word(*destreg, srcval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_word(*destreg, srcval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = sub_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = sub_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2573,18 +2573,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("SUB\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("SUB\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("SUB\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("SUB\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = sub_long(M.x86.R_EAX, srcval); + M.x86.R_EAX = sub_long(M.x86.R_EAX, srcval); } else { - M.x86.R_AX = sub_word(M.x86.R_AX, (u16)srcval); + M.x86.R_AX = sub_word(M.x86.R_AX, (u16)srcval); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2634,43 +2634,43 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = xor_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = xor_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = xor_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = xor_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = xor_byte(destval, *srcreg); - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = xor_byte(destval, *srcreg); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2690,107 +2690,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = xor_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = xor_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = xor_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = xor_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = xor_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = xor_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = xor_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = xor_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = xor_long(destval, *srcreg); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = xor_long(destval, *srcreg); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = xor_word(destval, *srcreg); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = xor_word(destval, *srcreg); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2812,40 +2812,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_byte(*destreg, srcval); + break; case 1: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_byte(*destreg, srcval); + break; case 2: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_byte(*destreg, srcval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2865,101 +2865,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_word(*destreg, srcval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_word(*destreg, srcval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_word(*destreg, srcval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = xor_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = xor_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2993,18 +2993,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("XOR\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("XOR\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("XOR\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("XOR\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = xor_long(M.x86.R_EAX, srcval); + M.x86.R_EAX = xor_long(M.x86.R_EAX, srcval); } else { - M.x86.R_AX = xor_word(M.x86.R_AX, (u16)srcval); + M.x86.R_AX = xor_word(M.x86.R_AX, (u16)srcval); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3054,40 +3054,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_byte(destval, *srcreg); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_byte(destval, *srcreg); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_byte(destval, *srcreg); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_byte(destval, *srcreg); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_byte(destval, *srcreg); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_byte(destval, *srcreg); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3107,101 +3107,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_long(destval, *srcreg); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_long(destval, *srcreg); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_word(destval, *srcreg); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_word(destval, *srcreg); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_long(destval, *srcreg); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_long(destval, *srcreg); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_word(destval, *srcreg); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_word(destval, *srcreg); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_long(destval, *srcreg); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_long(destval, *srcreg); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_word(destval, *srcreg); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_word(destval, *srcreg); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3223,40 +3223,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_byte(*destreg, srcval); + break; case 1: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_byte(*destreg, srcval); + break; case 2: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_byte(*destreg, srcval); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_byte(*destreg, srcval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3276,101 +3276,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_word(*destreg, srcval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_word(*destreg, srcval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_word(*destreg, srcval); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_word(*destreg, srcval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - cmp_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + cmp_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3404,18 +3404,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CMP\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("CMP\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("CMP\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("CMP\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - cmp_long(M.x86.R_EAX, srcval); + cmp_long(M.x86.R_EAX, srcval); } else { - cmp_word(M.x86.R_AX, (u16)srcval); + cmp_word(M.x86.R_AX, (u16)srcval); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3457,15 +3457,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tEAX\n"); + DECODE_PRINTF("INC\tEAX\n"); } else { - DECODE_PRINTF("INC\tAX\n"); + DECODE_PRINTF("INC\tAX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = inc_long(M.x86.R_EAX); + M.x86.R_EAX = inc_long(M.x86.R_EAX); } else { - M.x86.R_AX = inc_word(M.x86.R_AX); + M.x86.R_AX = inc_word(M.x86.R_AX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3479,15 +3479,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tECX\n"); + DECODE_PRINTF("INC\tECX\n"); } else { - DECODE_PRINTF("INC\tCX\n"); + DECODE_PRINTF("INC\tCX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ECX = inc_long(M.x86.R_ECX); + M.x86.R_ECX = inc_long(M.x86.R_ECX); } else { - M.x86.R_CX = inc_word(M.x86.R_CX); + M.x86.R_CX = inc_word(M.x86.R_CX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3501,15 +3501,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tEDX\n"); + DECODE_PRINTF("INC\tEDX\n"); } else { - DECODE_PRINTF("INC\tDX\n"); + DECODE_PRINTF("INC\tDX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDX = inc_long(M.x86.R_EDX); + M.x86.R_EDX = inc_long(M.x86.R_EDX); } else { - M.x86.R_DX = inc_word(M.x86.R_DX); + M.x86.R_DX = inc_word(M.x86.R_DX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3523,15 +3523,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tEBX\n"); + DECODE_PRINTF("INC\tEBX\n"); } else { - DECODE_PRINTF("INC\tBX\n"); + DECODE_PRINTF("INC\tBX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EBX = inc_long(M.x86.R_EBX); + M.x86.R_EBX = inc_long(M.x86.R_EBX); } else { - M.x86.R_BX = inc_word(M.x86.R_BX); + M.x86.R_BX = inc_word(M.x86.R_BX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3545,15 +3545,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tESP\n"); + DECODE_PRINTF("INC\tESP\n"); } else { - DECODE_PRINTF("INC\tSP\n"); + DECODE_PRINTF("INC\tSP\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ESP = inc_long(M.x86.R_ESP); + M.x86.R_ESP = inc_long(M.x86.R_ESP); } else { - M.x86.R_SP = inc_word(M.x86.R_SP); + M.x86.R_SP = inc_word(M.x86.R_SP); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3567,15 +3567,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tEBP\n"); + DECODE_PRINTF("INC\tEBP\n"); } else { - DECODE_PRINTF("INC\tBP\n"); + DECODE_PRINTF("INC\tBP\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EBP = inc_long(M.x86.R_EBP); + M.x86.R_EBP = inc_long(M.x86.R_EBP); } else { - M.x86.R_BP = inc_word(M.x86.R_BP); + M.x86.R_BP = inc_word(M.x86.R_BP); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3589,15 +3589,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tESI\n"); + DECODE_PRINTF("INC\tESI\n"); } else { - DECODE_PRINTF("INC\tSI\n"); + DECODE_PRINTF("INC\tSI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ESI = inc_long(M.x86.R_ESI); + M.x86.R_ESI = inc_long(M.x86.R_ESI); } else { - M.x86.R_SI = inc_word(M.x86.R_SI); + M.x86.R_SI = inc_word(M.x86.R_SI); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3611,15 +3611,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tEDI\n"); + DECODE_PRINTF("INC\tEDI\n"); } else { - DECODE_PRINTF("INC\tDI\n"); + DECODE_PRINTF("INC\tDI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDI = inc_long(M.x86.R_EDI); + M.x86.R_EDI = inc_long(M.x86.R_EDI); } else { - M.x86.R_DI = inc_word(M.x86.R_DI); + M.x86.R_DI = inc_word(M.x86.R_DI); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3633,15 +3633,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tEAX\n"); + DECODE_PRINTF("DEC\tEAX\n"); } else { - DECODE_PRINTF("DEC\tAX\n"); + DECODE_PRINTF("DEC\tAX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = dec_long(M.x86.R_EAX); + M.x86.R_EAX = dec_long(M.x86.R_EAX); } else { - M.x86.R_AX = dec_word(M.x86.R_AX); + M.x86.R_AX = dec_word(M.x86.R_AX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3655,15 +3655,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tECX\n"); + DECODE_PRINTF("DEC\tECX\n"); } else { - DECODE_PRINTF("DEC\tCX\n"); + DECODE_PRINTF("DEC\tCX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ECX = dec_long(M.x86.R_ECX); + M.x86.R_ECX = dec_long(M.x86.R_ECX); } else { - M.x86.R_CX = dec_word(M.x86.R_CX); + M.x86.R_CX = dec_word(M.x86.R_CX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3677,15 +3677,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tEDX\n"); + DECODE_PRINTF("DEC\tEDX\n"); } else { - DECODE_PRINTF("DEC\tDX\n"); + DECODE_PRINTF("DEC\tDX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDX = dec_long(M.x86.R_EDX); + M.x86.R_EDX = dec_long(M.x86.R_EDX); } else { - M.x86.R_DX = dec_word(M.x86.R_DX); + M.x86.R_DX = dec_word(M.x86.R_DX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3699,15 +3699,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tEBX\n"); + DECODE_PRINTF("DEC\tEBX\n"); } else { - DECODE_PRINTF("DEC\tBX\n"); + DECODE_PRINTF("DEC\tBX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EBX = dec_long(M.x86.R_EBX); + M.x86.R_EBX = dec_long(M.x86.R_EBX); } else { - M.x86.R_BX = dec_word(M.x86.R_BX); + M.x86.R_BX = dec_word(M.x86.R_BX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3721,15 +3721,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tESP\n"); + DECODE_PRINTF("DEC\tESP\n"); } else { - DECODE_PRINTF("DEC\tSP\n"); + DECODE_PRINTF("DEC\tSP\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ESP = dec_long(M.x86.R_ESP); + M.x86.R_ESP = dec_long(M.x86.R_ESP); } else { - M.x86.R_SP = dec_word(M.x86.R_SP); + M.x86.R_SP = dec_word(M.x86.R_SP); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3743,15 +3743,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tEBP\n"); + DECODE_PRINTF("DEC\tEBP\n"); } else { - DECODE_PRINTF("DEC\tBP\n"); + DECODE_PRINTF("DEC\tBP\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EBP = dec_long(M.x86.R_EBP); + M.x86.R_EBP = dec_long(M.x86.R_EBP); } else { - M.x86.R_BP = dec_word(M.x86.R_BP); + M.x86.R_BP = dec_word(M.x86.R_BP); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3765,15 +3765,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tESI\n"); + DECODE_PRINTF("DEC\tESI\n"); } else { - DECODE_PRINTF("DEC\tSI\n"); + DECODE_PRINTF("DEC\tSI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ESI = dec_long(M.x86.R_ESI); + M.x86.R_ESI = dec_long(M.x86.R_ESI); } else { - M.x86.R_SI = dec_word(M.x86.R_SI); + M.x86.R_SI = dec_word(M.x86.R_SI); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3787,15 +3787,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tEDI\n"); + DECODE_PRINTF("DEC\tEDI\n"); } else { - DECODE_PRINTF("DEC\tDI\n"); + DECODE_PRINTF("DEC\tDI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDI = dec_long(M.x86.R_EDI); + M.x86.R_EDI = dec_long(M.x86.R_EDI); } else { - M.x86.R_DI = dec_word(M.x86.R_DI); + M.x86.R_DI = dec_word(M.x86.R_DI); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3809,15 +3809,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSH\tEAX\n"); + DECODE_PRINTF("PUSH\tEAX\n"); } else { - DECODE_PRINTF("PUSH\tAX\n"); + DECODE_PRINTF("PUSH\tAX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(M.x86.R_EAX); + push_long(M.x86.R_EAX); } else { - push_word(M.x86.R_AX); + push_word(M.x86.R_AX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3831,15 +3831,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSH\tECX\n"); + DECODE_PRINTF("PUSH\tECX\n"); } else { - DECODE_PRINTF("PUSH\tCX\n"); + DECODE_PRINTF("PUSH\tCX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(M.x86.R_ECX); + push_long(M.x86.R_ECX); } else { - push_word(M.x86.R_CX); + push_word(M.x86.R_CX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3853,15 +3853,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSH\tEDX\n"); + DECODE_PRINTF("PUSH\tEDX\n"); } else { - DECODE_PRINTF("PUSH\tDX\n"); + DECODE_PRINTF("PUSH\tDX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(M.x86.R_EDX); + push_long(M.x86.R_EDX); } else { - push_word(M.x86.R_DX); + push_word(M.x86.R_DX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3875,15 +3875,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSH\tEBX\n"); + DECODE_PRINTF("PUSH\tEBX\n"); } else { - DECODE_PRINTF("PUSH\tBX\n"); + DECODE_PRINTF("PUSH\tBX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(M.x86.R_EBX); + push_long(M.x86.R_EBX); } else { - push_word(M.x86.R_BX); + push_word(M.x86.R_BX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3897,9 +3897,9 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSH\tESP\n"); + DECODE_PRINTF("PUSH\tESP\n"); } else { - DECODE_PRINTF("PUSH\tSP\n"); + DECODE_PRINTF("PUSH\tSP\n"); } TRACE_AND_STEP(); /* Always push (E)SP, since we are emulating an i386 and above @@ -3923,15 +3923,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSH\tEBP\n"); + DECODE_PRINTF("PUSH\tEBP\n"); } else { - DECODE_PRINTF("PUSH\tBP\n"); + DECODE_PRINTF("PUSH\tBP\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(M.x86.R_EBP); + push_long(M.x86.R_EBP); } else { - push_word(M.x86.R_BP); + push_word(M.x86.R_BP); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3945,15 +3945,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSH\tESI\n"); + DECODE_PRINTF("PUSH\tESI\n"); } else { - DECODE_PRINTF("PUSH\tSI\n"); + DECODE_PRINTF("PUSH\tSI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(M.x86.R_ESI); + push_long(M.x86.R_ESI); } else { - push_word(M.x86.R_SI); + push_word(M.x86.R_SI); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3967,15 +3967,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSH\tEDI\n"); + DECODE_PRINTF("PUSH\tEDI\n"); } else { - DECODE_PRINTF("PUSH\tDI\n"); + DECODE_PRINTF("PUSH\tDI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(M.x86.R_EDI); + push_long(M.x86.R_EDI); } else { - push_word(M.x86.R_DI); + push_word(M.x86.R_DI); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -3989,15 +3989,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POP\tEAX\n"); + DECODE_PRINTF("POP\tEAX\n"); } else { - DECODE_PRINTF("POP\tAX\n"); + DECODE_PRINTF("POP\tAX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = pop_long(); + M.x86.R_EAX = pop_long(); } else { - M.x86.R_AX = pop_word(); + M.x86.R_AX = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4011,15 +4011,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POP\tECX\n"); + DECODE_PRINTF("POP\tECX\n"); } else { - DECODE_PRINTF("POP\tCX\n"); + DECODE_PRINTF("POP\tCX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ECX = pop_long(); + M.x86.R_ECX = pop_long(); } else { - M.x86.R_CX = pop_word(); + M.x86.R_CX = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4033,15 +4033,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POP\tEDX\n"); + DECODE_PRINTF("POP\tEDX\n"); } else { - DECODE_PRINTF("POP\tDX\n"); + DECODE_PRINTF("POP\tDX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDX = pop_long(); + M.x86.R_EDX = pop_long(); } else { - M.x86.R_DX = pop_word(); + M.x86.R_DX = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4055,15 +4055,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POP\tEBX\n"); + DECODE_PRINTF("POP\tEBX\n"); } else { - DECODE_PRINTF("POP\tBX\n"); + DECODE_PRINTF("POP\tBX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EBX = pop_long(); + M.x86.R_EBX = pop_long(); } else { - M.x86.R_BX = pop_word(); + M.x86.R_BX = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4077,15 +4077,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POP\tESP\n"); + DECODE_PRINTF("POP\tESP\n"); } else { - DECODE_PRINTF("POP\tSP\n"); + DECODE_PRINTF("POP\tSP\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ESP = pop_long(); + M.x86.R_ESP = pop_long(); } else { - M.x86.R_SP = pop_word(); + M.x86.R_SP = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4099,15 +4099,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POP\tEBP\n"); + DECODE_PRINTF("POP\tEBP\n"); } else { - DECODE_PRINTF("POP\tBP\n"); + DECODE_PRINTF("POP\tBP\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EBP = pop_long(); + M.x86.R_EBP = pop_long(); } else { - M.x86.R_BP = pop_word(); + M.x86.R_BP = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4121,15 +4121,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POP\tESI\n"); + DECODE_PRINTF("POP\tESI\n"); } else { - DECODE_PRINTF("POP\tSI\n"); + DECODE_PRINTF("POP\tSI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ESI = pop_long(); + M.x86.R_ESI = pop_long(); } else { - M.x86.R_SI = pop_word(); + M.x86.R_SI = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4143,15 +4143,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POP\tEDI\n"); + DECODE_PRINTF("POP\tEDI\n"); } else { - DECODE_PRINTF("POP\tDI\n"); + DECODE_PRINTF("POP\tDI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDI = pop_long(); + M.x86.R_EDI = pop_long(); } else { - M.x86.R_DI = pop_word(); + M.x86.R_DI = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4165,33 +4165,33 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSHAD\n"); + DECODE_PRINTF("PUSHAD\n"); } else { - DECODE_PRINTF("PUSHA\n"); + DECODE_PRINTF("PUSHA\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 old_sp = M.x86.R_ESP; + u32 old_sp = M.x86.R_ESP; - push_long(M.x86.R_EAX); - push_long(M.x86.R_ECX); - push_long(M.x86.R_EDX); - push_long(M.x86.R_EBX); - push_long(old_sp); - push_long(M.x86.R_EBP); - push_long(M.x86.R_ESI); - push_long(M.x86.R_EDI); + push_long(M.x86.R_EAX); + push_long(M.x86.R_ECX); + push_long(M.x86.R_EDX); + push_long(M.x86.R_EBX); + push_long(old_sp); + push_long(M.x86.R_EBP); + push_long(M.x86.R_ESI); + push_long(M.x86.R_EDI); } else { - u16 old_sp = M.x86.R_SP; + u16 old_sp = M.x86.R_SP; - push_word(M.x86.R_AX); - push_word(M.x86.R_CX); - push_word(M.x86.R_DX); - push_word(M.x86.R_BX); - push_word(old_sp); - push_word(M.x86.R_BP); - push_word(M.x86.R_SI); - push_word(M.x86.R_DI); + push_word(M.x86.R_AX); + push_word(M.x86.R_CX); + push_word(M.x86.R_DX); + push_word(M.x86.R_BX); + push_word(old_sp); + push_word(M.x86.R_BP); + push_word(M.x86.R_SI); + push_word(M.x86.R_DI); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4205,29 +4205,29 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POPAD\n"); + DECODE_PRINTF("POPAD\n"); } else { - DECODE_PRINTF("POPA\n"); + DECODE_PRINTF("POPA\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDI = pop_long(); - M.x86.R_ESI = pop_long(); - M.x86.R_EBP = pop_long(); - M.x86.R_ESP += 4; /* skip ESP */ - M.x86.R_EBX = pop_long(); - M.x86.R_EDX = pop_long(); - M.x86.R_ECX = pop_long(); - M.x86.R_EAX = pop_long(); + M.x86.R_EDI = pop_long(); + M.x86.R_ESI = pop_long(); + M.x86.R_EBP = pop_long(); + M.x86.R_ESP += 4; /* skip ESP */ + M.x86.R_EBX = pop_long(); + M.x86.R_EDX = pop_long(); + M.x86.R_ECX = pop_long(); + M.x86.R_EAX = pop_long(); } else { - M.x86.R_DI = pop_word(); - M.x86.R_SI = pop_word(); - M.x86.R_BP = pop_word(); - M.x86.R_SP += 2; /* skip SP */ - M.x86.R_BX = pop_word(); - M.x86.R_DX = pop_word(); - M.x86.R_CX = pop_word(); - M.x86.R_AX = pop_word(); + M.x86.R_DI = pop_word(); + M.x86.R_SI = pop_word(); + M.x86.R_BP = pop_word(); + M.x86.R_SP += 2; /* skip SP */ + M.x86.R_BX = pop_word(); + M.x86.R_DX = pop_word(); + M.x86.R_CX = pop_word(); + M.x86.R_AX = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4308,16 +4308,16 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - imm = fetch_long_imm(); + imm = fetch_long_imm(); } else { - imm = fetch_word_imm(); + imm = fetch_word_imm(); } DECODE_PRINTF2("PUSH\t%x\n", imm); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(imm); + push_long(imm); } else { - push_word((u16)imm); + push_word((u16)imm); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4337,188 +4337,188 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; - u32 res_lo,res_hi; - s32 imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; + u32 res_lo,res_hi; + s32 imm; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg; - u16 srcval; - u32 res; - s16 imm; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + imm = fetch_long_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg; + u16 srcval; + u32 res; + s16 imm; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - res = (s16)srcval * (s16)imm; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + imm = fetch_word_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + res = (s16)srcval * (s16)imm; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; - u32 res_lo,res_hi; - s32 imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; + u32 res_lo,res_hi; + s32 imm; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg; - u16 srcval; - u32 res; - s16 imm; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + imm = fetch_long_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg; + u16 srcval; + u32 res; + s16 imm; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - res = (s16)srcval * (s16)imm; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + imm = fetch_word_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + res = (s16)srcval * (s16)imm; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; - u32 res_lo,res_hi; - s32 imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; + u32 res_lo,res_hi; + s32 imm; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg; - u16 srcval; - u32 res; - s16 imm; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + imm = fetch_long_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg; + u16 srcval; + u32 res; + s16 imm; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - res = (s16)srcval * (s16)imm; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + imm = fetch_word_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + res = (s16)srcval * (s16)imm; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; - u32 res_lo,res_hi; - s32 imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; + u32 res_lo,res_hi; + s32 imm; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg,*srcreg; - u32 res; - s16 imm; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + imm = fetch_long_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg,*srcreg; + u32 res; + s16 imm; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - res = (s16)*srcreg * (s16)imm; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + imm = fetch_word_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + res = (s16)*srcreg * (s16)imm; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4556,180 +4556,180 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; - u32 res_lo,res_hi; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; + u32 res_lo,res_hi; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg; - u16 srcval; - u32 res; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg; + u16 srcval; + u32 res; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - res = (s16)srcval * (s16)imm; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + res = (s16)srcval * (s16)imm; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; - u32 res_lo,res_hi; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; + u32 res_lo,res_hi; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg; - u16 srcval; - u32 res; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg; + u16 srcval; + u32 res; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - res = (s16)srcval * (s16)imm; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + res = (s16)srcval * (s16)imm; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; - u32 res_lo,res_hi; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; + u32 res_lo,res_hi; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg; - u16 srcval; - u32 res; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)srcval,(s32)imm); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg; + u16 srcval; + u32 res; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - res = (s16)srcval * (s16)imm; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + res = (s16)srcval * (s16)imm; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; - u32 res_lo,res_hi; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; + u32 res_lo,res_hi; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg,*srcreg; - u32 res; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)*srcreg,(s32)imm); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg,*srcreg; + u32 res; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%d\n", (s32)imm); - res = (s16)*srcreg * (s16)imm; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%d\n", (s32)imm); + res = (s16)*srcreg * (s16)imm; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -4757,11 +4757,11 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INSD\n"); - ins(4); + DECODE_PRINTF("INSD\n"); + ins(4); } else { - DECODE_PRINTF("INSW\n"); - ins(2); + DECODE_PRINTF("INSW\n"); + ins(2); } TRACE_AND_STEP(); DECODE_CLEAR_SEGOVR(); @@ -4790,11 +4790,11 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("OUTSD\n"); - outs(4); + DECODE_PRINTF("OUTSD\n"); + outs(4); } else { - DECODE_PRINTF("OUTSW\n"); - outs(2); + DECODE_PRINTF("OUTSW\n"); + outs(2); } TRACE_AND_STEP(); DECODE_CLEAR_SEGOVR(); @@ -4818,7 +4818,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (ACCESS_FLAG(F_OF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -4840,7 +4840,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (!ACCESS_FLAG(F_OF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -4862,7 +4862,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (ACCESS_FLAG(F_CF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -4884,7 +4884,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (!ACCESS_FLAG(F_CF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -4906,7 +4906,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (ACCESS_FLAG(F_ZF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -4928,7 +4928,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (!ACCESS_FLAG(F_ZF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -4951,7 +4951,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -4974,7 +4974,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (!(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF))) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -4996,7 +4996,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (ACCESS_FLAG(F_SF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -5018,7 +5018,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (!ACCESS_FLAG(F_SF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -5040,7 +5040,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (ACCESS_FLAG(F_PF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -5062,7 +5062,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (!ACCESS_FLAG(F_PF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -5087,7 +5087,7 @@ sf = ACCESS_FLAG(F_SF) != 0; of = ACCESS_FLAG(F_OF) != 0; if (sf ^ of) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -5113,7 +5113,7 @@ of = ACCESS_FLAG(F_OF) != 0; /* note: inverse of above, but using == instead of xor. */ if (sf == of) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -5139,7 +5139,7 @@ sf = ACCESS_FLAG(F_SF) != 0; of = ACCESS_FLAG(F_OF) != 0; if ((sf ^ of) || ACCESS_FLAG(F_ZF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -5165,7 +5165,7 @@ sf = ACCESS_FLAG(F_SF) != 0; of = ACCESS_FLAG(F_OF) != 0; if ((sf == of) && !ACCESS_FLAG(F_ZF)) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -5203,88 +5203,88 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } + switch (rh) { + case 0: + DECODE_PRINTF("ADD\t"); + break; + case 1: + DECODE_PRINTF("OR\t"); + break; + case 2: + DECODE_PRINTF("ADC\t"); + break; + case 3: + DECODE_PRINTF("SBB\t"); + break; + case 4: + DECODE_PRINTF("AND\t"); + break; + case 5: + DECODE_PRINTF("SUB\t"); + break; + case 6: + DECODE_PRINTF("XOR\t"); + break; + case 7: + DECODE_PRINTF("CMP\t"); + break; + } } #endif /* know operation, decode the mod byte to find the addressing mode. */ switch (mod) { case 0: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc80_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc80_byte_operation[rh]) (destval, imm); + if (rh != 7) + store_data_byte(destoffset, destval); + break; case 1: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc80_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc80_byte_operation[rh]) (destval, imm); + if (rh != 7) + store_data_byte(destoffset, destval); + break; case 2: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc80_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc80_byte_operation[rh]) (destval, imm); + if (rh != 7) + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - imm = fetch_byte_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc80_byte_operation[rh]) (*destreg, imm); - if (rh != 7) - *destreg = destval; - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + imm = fetch_byte_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc80_byte_operation[rh]) (*destreg, imm); + if (rh != 7) + *destreg = destval; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -5332,158 +5332,158 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } + switch (rh) { + case 0: + DECODE_PRINTF("ADD\t"); + break; + case 1: + DECODE_PRINTF("OR\t"); + break; + case 2: + DECODE_PRINTF("ADC\t"); + break; + case 3: + DECODE_PRINTF("SBB\t"); + break; + case 4: + DECODE_PRINTF("AND\t"); + break; + case 5: + DECODE_PRINTF("SUB\t"); + break; + case 6: + DECODE_PRINTF("XOR\t"); + break; + case 7: + DECODE_PRINTF("CMP\t"); + break; + } } #endif /* - * Know operation, decode the mod byte to find the addressing + * Know operation, decode the mod byte to find the addressing * mode. */ switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval,imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval,imm; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc81_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - u16 destval,imm; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + imm = fetch_long_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc81_long_operation[rh]) (destval, imm); + if (rh != 7) + store_data_long(destoffset, destval); + } else { + u16 destval,imm; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc81_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + imm = fetch_word_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc81_word_operation[rh]) (destval, imm); + if (rh != 7) + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval,imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval,imm; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc81_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - u16 destval,imm; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + imm = fetch_long_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc81_long_operation[rh]) (destval, imm); + if (rh != 7) + store_data_long(destoffset, destval); + } else { + u16 destval,imm; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc81_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + imm = fetch_word_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc81_word_operation[rh]) (destval, imm); + if (rh != 7) + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval,imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval,imm; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - imm = fetch_long_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc81_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - u16 destval,imm; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + imm = fetch_long_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc81_long_operation[rh]) (destval, imm); + if (rh != 7) + store_data_long(destoffset, destval); + } else { + u16 destval,imm; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc81_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + imm = fetch_word_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc81_word_operation[rh]) (destval, imm); + if (rh != 7) + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 destval,imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 destval,imm; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - imm = fetch_long_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc81_long_operation[rh]) (*destreg, imm); - if (rh != 7) - *destreg = destval; - } else { - u16 *destreg; - u16 destval,imm; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + imm = fetch_long_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc81_long_operation[rh]) (*destreg, imm); + if (rh != 7) + *destreg = destval; + } else { + u16 *destreg; + u16 destval,imm; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - imm = fetch_word_imm(); - DECODE_PRINTF2("%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc81_word_operation[rh]) (*destreg, imm); - if (rh != 7) - *destreg = destval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + imm = fetch_word_imm(); + DECODE_PRINTF2("%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc81_word_operation[rh]) (*destreg, imm); + if (rh != 7) + *destreg = destval; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -5492,12 +5492,12 @@ static u8 (*opc82_byte_operation[])(u8 s, u8 d) = { add_byte, /*00 */ - or_byte, /*01 *//*YYY UNUSED ???? */ + or_byte, /*01 */ /*YYY UNUSED ???? */ adc_byte, /*02 */ sbb_byte, /*03 */ - and_byte, /*04 *//*YYY UNUSED ???? */ + and_byte, /*04 */ /*YYY UNUSED ???? */ sub_byte, /*05 */ - xor_byte, /*06 *//*YYY UNUSED ???? */ + xor_byte, /*06 */ /*YYY UNUSED ???? */ cmp_byte, /*07 */ }; @@ -5523,83 +5523,83 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ + switch (rh) { + case 0: + DECODE_PRINTF("ADD\t"); + break; + case 1: + DECODE_PRINTF("OR\t"); + break; + case 2: + DECODE_PRINTF("ADC\t"); + break; + case 3: + DECODE_PRINTF("SBB\t"); + break; + case 4: + DECODE_PRINTF("AND\t"); + break; + case 5: + DECODE_PRINTF("SUB\t"); + break; + case 6: + DECODE_PRINTF("XOR\t"); + break; + case 7: + DECODE_PRINTF("CMP\t"); + break; + } } #endif /* know operation, decode the mod byte to find the addressing mode. */ switch (mod) { case 0: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm00_address(rl); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc82_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm00_address(rl); + destval = fetch_data_byte(destoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc82_byte_operation[rh]) (destval, imm); + if (rh != 7) + store_data_byte(destoffset, destval); + break; case 1: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm01_address(rl); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc82_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm01_address(rl); + destval = fetch_data_byte(destoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc82_byte_operation[rh]) (destval, imm); + if (rh != 7) + store_data_byte(destoffset, destval); + break; case 2: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm10_address(rl); - destval = fetch_data_byte(destoffset); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc82_byte_operation[rh]) (destval, imm); - if (rh != 7) - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm10_address(rl); + destval = fetch_data_byte(destoffset); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc82_byte_operation[rh]) (destval, imm); + if (rh != 7) + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc82_byte_operation[rh]) (*destreg, imm); - if (rh != 7) - *destreg = destval; - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc82_byte_operation[rh]) (*destreg, imm); + if (rh != 7) + *destreg = destval; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -5608,24 +5608,24 @@ static u16 (*opc83_word_operation[])(u16 s, u16 d) = { add_word, /*00 */ - or_word, /*01 *//*YYY UNUSED ???? */ + or_word, /*01 */ /*YYY UNUSED ???? */ adc_word, /*02 */ sbb_word, /*03 */ - and_word, /*04 *//*YYY UNUSED ???? */ + and_word, /*04 */ /*YYY UNUSED ???? */ sub_word, /*05 */ - xor_word, /*06 *//*YYY UNUSED ???? */ + xor_word, /*06 */ /*YYY UNUSED ???? */ cmp_word, /*07 */ }; static u32 (*opc83_long_operation[])(u32 s, u32 d) = { add_long, /*00 */ - or_long, /*01 *//*YYY UNUSED ???? */ + or_long, /*01 */ /*YYY UNUSED ???? */ adc_long, /*02 */ sbb_long, /*03 */ - and_long, /*04 *//*YYY UNUSED ???? */ + and_long, /*04 */ /*YYY UNUSED ???? */ sub_long, /*05 */ - xor_long, /*06 *//*YYY UNUSED ???? */ + xor_long, /*06 */ /*YYY UNUSED ???? */ cmp_long, /*07 */ }; @@ -5648,147 +5648,147 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ switch (rh) { - case 0: - DECODE_PRINTF("ADD\t"); - break; - case 1: - DECODE_PRINTF("OR\t"); - break; - case 2: - DECODE_PRINTF("ADC\t"); - break; - case 3: - DECODE_PRINTF("SBB\t"); - break; - case 4: - DECODE_PRINTF("AND\t"); - break; - case 5: - DECODE_PRINTF("SUB\t"); - break; - case 6: - DECODE_PRINTF("XOR\t"); - break; - case 7: - DECODE_PRINTF("CMP\t"); - break; - } + case 0: + DECODE_PRINTF("ADD\t"); + break; + case 1: + DECODE_PRINTF("OR\t"); + break; + case 2: + DECODE_PRINTF("ADC\t"); + break; + case 3: + DECODE_PRINTF("SBB\t"); + break; + case 4: + DECODE_PRINTF("AND\t"); + break; + case 5: + DECODE_PRINTF("SUB\t"); + break; + case 6: + DECODE_PRINTF("XOR\t"); + break; + case 7: + DECODE_PRINTF("CMP\t"); + break; + } } #endif /* know operation, decode the mod byte to find the addressing mode. */ switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval,imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval,imm; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm00_address(rl); - destval = fetch_data_long(destoffset); - imm = (s8) fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc83_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - u16 destval,imm; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm00_address(rl); + destval = fetch_data_long(destoffset); + imm = (s8) fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc83_long_operation[rh]) (destval, imm); + if (rh != 7) + store_data_long(destoffset, destval); + } else { + u16 destval,imm; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm00_address(rl); - destval = fetch_data_word(destoffset); - imm = (s8) fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc83_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm00_address(rl); + destval = fetch_data_word(destoffset); + imm = (s8) fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc83_word_operation[rh]) (destval, imm); + if (rh != 7) + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval,imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval,imm; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm01_address(rl); - destval = fetch_data_long(destoffset); - imm = (s8) fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc83_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - u16 destval,imm; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm01_address(rl); + destval = fetch_data_long(destoffset); + imm = (s8) fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc83_long_operation[rh]) (destval, imm); + if (rh != 7) + store_data_long(destoffset, destval); + } else { + u16 destval,imm; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm01_address(rl); - destval = fetch_data_word(destoffset); - imm = (s8) fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc83_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm01_address(rl); + destval = fetch_data_word(destoffset); + imm = (s8) fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc83_word_operation[rh]) (destval, imm); + if (rh != 7) + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval,imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval,imm; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm10_address(rl); - destval = fetch_data_long(destoffset); - imm = (s8) fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc83_long_operation[rh]) (destval, imm); - if (rh != 7) - store_data_long(destoffset, destval); - } else { - u16 destval,imm; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm10_address(rl); + destval = fetch_data_long(destoffset); + imm = (s8) fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc83_long_operation[rh]) (destval, imm); + if (rh != 7) + store_data_long(destoffset, destval); + } else { + u16 destval,imm; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm10_address(rl); - destval = fetch_data_word(destoffset); - imm = (s8) fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc83_word_operation[rh]) (destval, imm); - if (rh != 7) - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm10_address(rl); + destval = fetch_data_word(destoffset); + imm = (s8) fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc83_word_operation[rh]) (destval, imm); + if (rh != 7) + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 destval,imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 destval,imm; - destreg = DECODE_RM_LONG_REGISTER(rl); - imm = (s8) fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc83_long_operation[rh]) (*destreg, imm); - if (rh != 7) - *destreg = destval; - } else { - u16 *destreg; - u16 destval,imm; + destreg = DECODE_RM_LONG_REGISTER(rl); + imm = (s8) fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc83_long_operation[rh]) (*destreg, imm); + if (rh != 7) + *destreg = destval; + } else { + u16 *destreg; + u16 destval,imm; - destreg = DECODE_RM_WORD_REGISTER(rl); - imm = (s8) fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - destval = (*opc83_word_operation[rh]) (*destreg, imm); - if (rh != 7) - *destreg = destval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + imm = (s8) fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + destval = (*opc83_word_operation[rh]) (*destreg, imm); + if (rh != 7) + *destreg = destval; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -5810,40 +5810,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_byte(destval, *srcreg); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_byte(destval, *srcreg); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_byte(destval, *srcreg); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_byte(destval, *srcreg); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_byte(destval, *srcreg); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_byte(destval, *srcreg); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_byte(*destreg, *srcreg); - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_byte(*destreg, *srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -5863,101 +5863,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_long(destval, *srcreg); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_long(destval, *srcreg); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_word(destval, *srcreg); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_word(destval, *srcreg); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_long(destval, *srcreg); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_long(destval, *srcreg); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_word(destval, *srcreg); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_word(destval, *srcreg); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_long(destval, *srcreg); - } else { - u16 destval; - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_long(destval, *srcreg); + } else { + u16 destval; + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_word(destval, *srcreg); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_word(destval, *srcreg); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_long(*destreg, *srcreg); - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_long(*destreg, *srcreg); + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - test_word(*destreg, *srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + test_word(*destreg, *srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -5980,51 +5980,51 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = destval; + destval = tmp; + store_data_byte(destoffset, destval); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = destval; + destval = tmp; + store_data_byte(destoffset, destval); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_byte(destoffset); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_byte(destoffset, destval); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_byte(destoffset); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = destval; + destval = tmp; + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = *destreg; - *destreg = tmp; - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = *destreg; + *destreg = tmp; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6044,125 +6044,125 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg; - u32 destval,tmp; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *srcreg; + u32 destval,tmp; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_long(destoffset, destval); - } else { - u16 *srcreg; - u16 destval,tmp; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = destval; + destval = tmp; + store_data_long(destoffset, destval); + } else { + u16 *srcreg; + u16 destval,tmp; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = destval; + destval = tmp; + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg; - u32 destval,tmp; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *srcreg; + u32 destval,tmp; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_long(destoffset, destval); - } else { - u16 *srcreg; - u16 destval,tmp; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = destval; + destval = tmp; + store_data_long(destoffset, destval); + } else { + u16 *srcreg; + u16 destval,tmp; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = destval; + destval = tmp; + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg; - u32 destval,tmp; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *srcreg; + u32 destval,tmp; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_long(destoffset); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_long(destoffset, destval); - } else { - u16 *srcreg; - u16 destval,tmp; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_long(destoffset); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = destval; + destval = tmp; + store_data_long(destoffset, destval); + } else { + u16 *srcreg; + u16 destval,tmp; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - destval = fetch_data_word(destoffset); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = destval; - destval = tmp; - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + destval = fetch_data_word(destoffset); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = destval; + destval = tmp; + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; - u32 tmp; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; + u32 tmp; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = *destreg; - *destreg = tmp; - } else { - u16 *destreg,*srcreg; - u16 tmp; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = *destreg; + *destreg = tmp; + } else { + u16 *destreg,*srcreg; + u16 tmp; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - tmp = *srcreg; - *srcreg = *destreg; - *destreg = tmp; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + tmp = *srcreg; + *srcreg = *destreg; + *destreg = tmp; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6183,37 +6183,37 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - store_data_byte(destoffset, *srcreg); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + store_data_byte(destoffset, *srcreg); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - store_data_byte(destoffset, *srcreg); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + store_data_byte(destoffset, *srcreg); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - store_data_byte(destoffset, *srcreg); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + store_data_byte(destoffset, *srcreg); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6233,89 +6233,89 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - store_data_long(destoffset, *srcreg); - } else { - u16 *srcreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + store_data_long(destoffset, *srcreg); + } else { + u16 *srcreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - store_data_word(destoffset, *srcreg); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + store_data_word(destoffset, *srcreg); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - store_data_long(destoffset, *srcreg); - } else { - u16 *srcreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + store_data_long(destoffset, *srcreg); + } else { + u16 *srcreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - store_data_word(destoffset, *srcreg); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + store_data_word(destoffset, *srcreg); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - store_data_long(destoffset, *srcreg); - } else { - u16 *srcreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + store_data_long(destoffset, *srcreg); + } else { + u16 *srcreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - store_data_word(destoffset, *srcreg); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + store_data_word(destoffset, *srcreg); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } else { - u16 *destreg,*srcreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + } else { + u16 *destreg,*srcreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6337,40 +6337,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 1: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 2: - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - break; + destreg = DECODE_RM_BYTE_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6390,101 +6390,101 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg, *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg, *srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } else { - u16 *destreg, *srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + } else { + u16 *destreg, *srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6506,40 +6506,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - srcreg = decode_rm_seg_register(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = *srcreg; - store_data_word(destoffset, destval); - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + srcreg = decode_rm_seg_register(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = *srcreg; + store_data_word(destoffset, destval); + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - srcreg = decode_rm_seg_register(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = *srcreg; - store_data_word(destoffset, destval); - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + srcreg = decode_rm_seg_register(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = *srcreg; + store_data_word(destoffset, destval); + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - srcreg = decode_rm_seg_register(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = *srcreg; - store_data_word(destoffset, destval); - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + srcreg = decode_rm_seg_register(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = *srcreg; + store_data_word(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcreg = decode_rm_seg_register(rh); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcreg = decode_rm_seg_register(rh); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6560,38 +6560,38 @@ * * lea eax,[eax+ebx*2] ?? */ - + START_OF_INSTR(); DECODE_PRINTF("LEA\t"); FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *srcreg = (u16)destoffset; - break; + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *srcreg = (u16)destoffset; + break; case 1: - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *srcreg = (u16)destoffset; - break; + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *srcreg = (u16)destoffset; + break; case 2: - srcreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *srcreg = (u16)destoffset; - break; + srcreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *srcreg = (u16)destoffset; + break; case 3: /* register to register */ - /* undefined. Do nothing. */ - break; + /* undefined. Do nothing. */ + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6613,40 +6613,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = decode_rm_seg_register(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = decode_rm_seg_register(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 1: - destreg = decode_rm_seg_register(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = decode_rm_seg_register(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 2: - destreg = decode_rm_seg_register(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = decode_rm_seg_register(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 3: /* register to register */ - destreg = decode_rm_seg_register(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - break; + destreg = decode_rm_seg_register(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + break; } /* * Clean up, and reset all the R_xSP pointers to the correct @@ -6671,84 +6671,84 @@ DECODE_PRINTF("POP\t"); FETCH_DECODE_MODRM(mod, rh, rl); if (rh != 0) { - DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n"); - HALT_SYS(); + DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n"); + HALT_SYS(); } switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = pop_long(); - store_data_long(destoffset, destval); - } else { - u16 destval; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = pop_long(); + store_data_long(destoffset, destval); + } else { + u16 destval; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = pop_word(); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = pop_word(); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = pop_long(); - store_data_long(destoffset, destval); - } else { - u16 destval; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = pop_long(); + store_data_long(destoffset, destval); + } else { + u16 destval; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = pop_word(); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = pop_word(); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = pop_long(); - store_data_long(destoffset, destval); - } else { - u16 destval; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = pop_long(); + store_data_long(destoffset, destval); + } else { + u16 destval; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - destval = pop_word(); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + destval = pop_word(); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = pop_long(); - } else { - u16 *destreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = pop_long(); + } else { + u16 *destreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = pop_word(); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = pop_word(); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6777,19 +6777,19 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("XCHG\tEAX,ECX\n"); + DECODE_PRINTF("XCHG\tEAX,ECX\n"); } else { - DECODE_PRINTF("XCHG\tAX,CX\n"); + DECODE_PRINTF("XCHG\tAX,CX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - tmp = M.x86.R_EAX; - M.x86.R_EAX = M.x86.R_ECX; - M.x86.R_ECX = tmp; + tmp = M.x86.R_EAX; + M.x86.R_EAX = M.x86.R_ECX; + M.x86.R_ECX = tmp; } else { - tmp = M.x86.R_AX; - M.x86.R_AX = M.x86.R_CX; - M.x86.R_CX = (u16)tmp; + tmp = M.x86.R_AX; + M.x86.R_AX = M.x86.R_CX; + M.x86.R_CX = (u16)tmp; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6805,19 +6805,19 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("XCHG\tEAX,EDX\n"); + DECODE_PRINTF("XCHG\tEAX,EDX\n"); } else { - DECODE_PRINTF("XCHG\tAX,DX\n"); + DECODE_PRINTF("XCHG\tAX,DX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - tmp = M.x86.R_EAX; - M.x86.R_EAX = M.x86.R_EDX; - M.x86.R_EDX = tmp; + tmp = M.x86.R_EAX; + M.x86.R_EAX = M.x86.R_EDX; + M.x86.R_EDX = tmp; } else { - tmp = M.x86.R_AX; - M.x86.R_AX = M.x86.R_DX; - M.x86.R_DX = (u16)tmp; + tmp = M.x86.R_AX; + M.x86.R_AX = M.x86.R_DX; + M.x86.R_DX = (u16)tmp; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6833,19 +6833,19 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("XCHG\tEAX,EBX\n"); + DECODE_PRINTF("XCHG\tEAX,EBX\n"); } else { - DECODE_PRINTF("XCHG\tAX,BX\n"); + DECODE_PRINTF("XCHG\tAX,BX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - tmp = M.x86.R_EAX; - M.x86.R_EAX = M.x86.R_EBX; - M.x86.R_EBX = tmp; + tmp = M.x86.R_EAX; + M.x86.R_EAX = M.x86.R_EBX; + M.x86.R_EBX = tmp; } else { - tmp = M.x86.R_AX; - M.x86.R_AX = M.x86.R_BX; - M.x86.R_BX = (u16)tmp; + tmp = M.x86.R_AX; + M.x86.R_AX = M.x86.R_BX; + M.x86.R_BX = (u16)tmp; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6861,19 +6861,19 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("XCHG\tEAX,ESP\n"); + DECODE_PRINTF("XCHG\tEAX,ESP\n"); } else { - DECODE_PRINTF("XCHG\tAX,SP\n"); + DECODE_PRINTF("XCHG\tAX,SP\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - tmp = M.x86.R_EAX; - M.x86.R_EAX = M.x86.R_ESP; - M.x86.R_ESP = tmp; + tmp = M.x86.R_EAX; + M.x86.R_EAX = M.x86.R_ESP; + M.x86.R_ESP = tmp; } else { - tmp = M.x86.R_AX; - M.x86.R_AX = M.x86.R_SP; - M.x86.R_SP = (u16)tmp; + tmp = M.x86.R_AX; + M.x86.R_AX = M.x86.R_SP; + M.x86.R_SP = (u16)tmp; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6889,19 +6889,19 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("XCHG\tEAX,EBP\n"); + DECODE_PRINTF("XCHG\tEAX,EBP\n"); } else { - DECODE_PRINTF("XCHG\tAX,BP\n"); + DECODE_PRINTF("XCHG\tAX,BP\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - tmp = M.x86.R_EAX; - M.x86.R_EAX = M.x86.R_EBP; - M.x86.R_EBP = tmp; + tmp = M.x86.R_EAX; + M.x86.R_EAX = M.x86.R_EBP; + M.x86.R_EBP = tmp; } else { - tmp = M.x86.R_AX; - M.x86.R_AX = M.x86.R_BP; - M.x86.R_BP = (u16)tmp; + tmp = M.x86.R_AX; + M.x86.R_AX = M.x86.R_BP; + M.x86.R_BP = (u16)tmp; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6917,19 +6917,19 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("XCHG\tEAX,ESI\n"); + DECODE_PRINTF("XCHG\tEAX,ESI\n"); } else { - DECODE_PRINTF("XCHG\tAX,SI\n"); + DECODE_PRINTF("XCHG\tAX,SI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - tmp = M.x86.R_EAX; - M.x86.R_EAX = M.x86.R_ESI; - M.x86.R_ESI = tmp; + tmp = M.x86.R_EAX; + M.x86.R_EAX = M.x86.R_ESI; + M.x86.R_ESI = tmp; } else { - tmp = M.x86.R_AX; - M.x86.R_AX = M.x86.R_SI; - M.x86.R_SI = (u16)tmp; + tmp = M.x86.R_AX; + M.x86.R_AX = M.x86.R_SI; + M.x86.R_SI = (u16)tmp; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6945,19 +6945,19 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("XCHG\tEAX,EDI\n"); + DECODE_PRINTF("XCHG\tEAX,EDI\n"); } else { - DECODE_PRINTF("XCHG\tAX,DI\n"); + DECODE_PRINTF("XCHG\tAX,DI\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - tmp = M.x86.R_EAX; - M.x86.R_EAX = M.x86.R_EDI; - M.x86.R_EDI = tmp; + tmp = M.x86.R_EAX; + M.x86.R_EAX = M.x86.R_EDI; + M.x86.R_EDI = tmp; } else { - tmp = M.x86.R_AX; - M.x86.R_AX = M.x86.R_DI; - M.x86.R_DI = (u16)tmp; + tmp = M.x86.R_AX; + M.x86.R_AX = M.x86.R_DI; + M.x86.R_DI = (u16)tmp; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -6971,23 +6971,23 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CWDE\n"); + DECODE_PRINTF("CWDE\n"); } else { - DECODE_PRINTF("CBW\n"); + DECODE_PRINTF("CBW\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - if (M.x86.R_AX & 0x8000) { - M.x86.R_EAX |= 0xffff0000; - } else { - M.x86.R_EAX &= 0x0000ffff; - } + if (M.x86.R_AX & 0x8000) { + M.x86.R_EAX |= 0xffff0000; + } else { + M.x86.R_EAX &= 0x0000ffff; + } } else { - if (M.x86.R_AL & 0x80) { - M.x86.R_AH = 0xff; - } else { - M.x86.R_AH = 0x0; - } + if (M.x86.R_AL & 0x80) { + M.x86.R_AH = 0xff; + } else { + M.x86.R_AH = 0x0; + } } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7001,24 +7001,24 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CDQ\n"); + DECODE_PRINTF("CDQ\n"); } else { - DECODE_PRINTF("CWD\n"); + DECODE_PRINTF("CWD\n"); } DECODE_PRINTF("CWD\n"); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - if (M.x86.R_EAX & 0x80000000) { - M.x86.R_EDX = 0xffffffff; - } else { - M.x86.R_EDX = 0x0; - } + if (M.x86.R_EAX & 0x80000000) { + M.x86.R_EDX = 0xffffffff; + } else { + M.x86.R_EDX = 0x0; + } } else { - if (M.x86.R_AX & 0x8000) { - M.x86.R_DX = 0xffff; - } else { - M.x86.R_DX = 0x0; - } + if (M.x86.R_AX & 0x8000) { + M.x86.R_DX = 0xffff; + } else { + M.x86.R_DX = 0x0; + } } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7041,7 +7041,7 @@ CALL_TRACE(M.x86.saved_cs, M.x86.saved_ip, farseg, faroff, "FAR "); /* XXX - * + * * Hooked interrupt vectors calling into our "BIOS" will cause * problems unless all intersegment stuff is checked for BIOS * access. Check needed here. For moment, let it alone. @@ -7079,18 +7079,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("PUSHFD\n"); + DECODE_PRINTF("PUSHFD\n"); } else { - DECODE_PRINTF("PUSHF\n"); + DECODE_PRINTF("PUSHF\n"); } TRACE_AND_STEP(); /* clear out *all* bits not representing flags, and turn on real bits */ flags = (M.x86.R_EFLG & F_MSK) | F_ALWAYS_ON; if (M.x86.mode & SYSMODE_PREFIX_DATA) { - push_long(flags); + push_long(flags); } else { - push_word((u16)flags); + push_word((u16)flags); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7104,15 +7104,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("POPFD\n"); + DECODE_PRINTF("POPFD\n"); } else { - DECODE_PRINTF("POPF\n"); + DECODE_PRINTF("POPF\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EFLG = pop_long(); + M.x86.R_EFLG = pop_long(); } else { - M.x86.R_FLG = pop_word(); + M.x86.R_FLG = pop_word(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7181,15 +7181,15 @@ START_OF_INSTR(); offset = fetch_word_imm(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("MOV\tEAX,[%04x]\n", offset); + DECODE_PRINTF2("MOV\tEAX,[%04x]\n", offset); } else { - DECODE_PRINTF2("MOV\tAX,[%04x]\n", offset); + DECODE_PRINTF2("MOV\tAX,[%04x]\n", offset); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = fetch_data_long(offset); + M.x86.R_EAX = fetch_data_long(offset); } else { - M.x86.R_AX = fetch_data_word(offset); + M.x86.R_AX = fetch_data_word(offset); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7224,15 +7224,15 @@ START_OF_INSTR(); offset = fetch_word_imm(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("MOV\t[%04x],EAX\n", offset); + DECODE_PRINTF2("MOV\t[%04x],EAX\n", offset); } else { - DECODE_PRINTF2("MOV\t[%04x],AX\n", offset); + DECODE_PRINTF2("MOV\t[%04x],AX\n", offset); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - store_data_long(offset, M.x86.R_EAX); + store_data_long(offset, M.x86.R_EAX); } else { - store_data_word(offset, M.x86.R_AX); + store_data_word(offset, M.x86.R_AX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7251,23 +7251,23 @@ START_OF_INSTR(); DECODE_PRINTF("MOVS\tBYTE\n"); if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; + inc = -1; else - inc = 1; + inc = 1; TRACE_AND_STEP(); count = 1; if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + count = M.x86.R_CX; + M.x86.R_CX = 0; + M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); } while (count--) { - val = fetch_data_byte(M.x86.R_SI); - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val); - M.x86.R_SI += inc; - M.x86.R_DI += inc; + val = fetch_data_byte(M.x86.R_SI); + store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, val); + M.x86.R_SI += inc; + M.x86.R_DI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7285,37 +7285,37 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOVS\tDWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; + DECODE_PRINTF("MOVS\tDWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -4; + else + inc = 4; } else { - DECODE_PRINTF("MOVS\tWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; + DECODE_PRINTF("MOVS\tWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -2; + else + inc = 2; } TRACE_AND_STEP(); count = 1; if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + count = M.x86.R_CX; + M.x86.R_CX = 0; + M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); } while (count--) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long(M.x86.R_SI); - store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val); - } else { - val = fetch_data_word(M.x86.R_SI); - store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (u16)val); - } - M.x86.R_SI += inc; - M.x86.R_DI += inc; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + val = fetch_data_long(M.x86.R_SI); + store_data_long_abs(M.x86.R_ES, M.x86.R_DI, val); + } else { + val = fetch_data_word(M.x86.R_SI); + store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (u16)val); + } + M.x86.R_SI += inc; + M.x86.R_DI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7334,44 +7334,44 @@ DECODE_PRINTF("CMPS\tBYTE\n"); TRACE_AND_STEP(); if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; + inc = -1; else - inc = 1; + inc = 1; if (M.x86.mode & SYSMODE_PREFIX_REPE) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val1 = fetch_data_byte(M.x86.R_SI); - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(val1, val2); - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF) == 0) - break; - } - M.x86.mode &= ~SYSMODE_PREFIX_REPE; + /* REPE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + val1 = fetch_data_byte(M.x86.R_SI); + val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); + cmp_byte(val1, val2); + M.x86.R_CX -= 1; + M.x86.R_SI += inc; + M.x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF) == 0) + break; + } + M.x86.mode &= ~SYSMODE_PREFIX_REPE; } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) { - /* REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val1 = fetch_data_byte(M.x86.R_SI); - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(val1, val2); - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF)) - break; /* zero flag set means equal */ - } - M.x86.mode &= ~SYSMODE_PREFIX_REPNE; + /* REPNE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + val1 = fetch_data_byte(M.x86.R_SI); + val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); + cmp_byte(val1, val2); + M.x86.R_CX -= 1; + M.x86.R_SI += inc; + M.x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF)) + break; /* zero flag set means equal */ + } + M.x86.mode &= ~SYSMODE_PREFIX_REPNE; } else { - val1 = fetch_data_byte(M.x86.R_SI); - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(val1, val2); - M.x86.R_SI += inc; - M.x86.R_DI += inc; + val1 = fetch_data_byte(M.x86.R_SI); + val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); + cmp_byte(val1, val2); + M.x86.R_SI += inc; + M.x86.R_DI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7388,71 +7388,71 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("CMPS\tDWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; + DECODE_PRINTF("CMPS\tDWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -4; + else + inc = 4; } else { - DECODE_PRINTF("CMPS\tWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; + DECODE_PRINTF("CMPS\tWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -2; + else + inc = 2; } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_REPE) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val1 = fetch_data_long(M.x86.R_SI); - val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(val1, val2); - } else { - val1 = fetch_data_word(M.x86.R_SI); - val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word((u16)val1, (u16)val2); - } - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF) == 0) - break; - } - M.x86.mode &= ~SYSMODE_PREFIX_REPE; + /* REPE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + val1 = fetch_data_long(M.x86.R_SI); + val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); + cmp_long(val1, val2); + } else { + val1 = fetch_data_word(M.x86.R_SI); + val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); + cmp_word((u16)val1, (u16)val2); + } + M.x86.R_CX -= 1; + M.x86.R_SI += inc; + M.x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF) == 0) + break; + } + M.x86.mode &= ~SYSMODE_PREFIX_REPE; } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) { - /* REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val1 = fetch_data_long(M.x86.R_SI); - val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(val1, val2); - } else { - val1 = fetch_data_word(M.x86.R_SI); - val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word((u16)val1, (u16)val2); - } - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF)) - break; /* zero flag set means equal */ - } - M.x86.mode &= ~SYSMODE_PREFIX_REPNE; + /* REPNE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + val1 = fetch_data_long(M.x86.R_SI); + val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); + cmp_long(val1, val2); + } else { + val1 = fetch_data_word(M.x86.R_SI); + val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); + cmp_word((u16)val1, (u16)val2); + } + M.x86.R_CX -= 1; + M.x86.R_SI += inc; + M.x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF)) + break; /* zero flag set means equal */ + } + M.x86.mode &= ~SYSMODE_PREFIX_REPNE; } else { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val1 = fetch_data_long(M.x86.R_SI); - val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(val1, val2); - } else { - val1 = fetch_data_word(M.x86.R_SI); - val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word((u16)val1, (u16)val2); - } - M.x86.R_SI += inc; - M.x86.R_DI += inc; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + val1 = fetch_data_long(M.x86.R_SI); + val2 = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); + cmp_long(val1, val2); + } else { + val1 = fetch_data_word(M.x86.R_SI); + val2 = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); + cmp_word((u16)val1, (u16)val2); + } + M.x86.R_SI += inc; + M.x86.R_DI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7486,18 +7486,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("TEST\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("TEST\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("TEST\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("TEST\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - test_long(M.x86.R_EAX, srcval); + test_long(M.x86.R_EAX, srcval); } else { - test_word(M.x86.R_AX, (u16)srcval); + test_word(M.x86.R_AX, (u16)srcval); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7514,22 +7514,22 @@ START_OF_INSTR(); DECODE_PRINTF("STOS\tBYTE\n"); if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; + inc = -1; else - inc = 1; + inc = 1; TRACE_AND_STEP(); if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL); - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL); + M.x86.R_CX -= 1; + M.x86.R_DI += inc; + } + M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); } else { - store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL); - M.x86.R_DI += inc; + store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AL); + M.x86.R_DI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7546,34 +7546,34 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("STOS\tDWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; + DECODE_PRINTF("STOS\tDWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -4; + else + inc = 4; } else { - DECODE_PRINTF("STOS\tWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; + DECODE_PRINTF("STOS\tWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -2; + else + inc = 2; } TRACE_AND_STEP(); count = 1; if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + count = M.x86.R_CX; + M.x86.R_CX = 0; + M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); } while (count--) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX); - } else { - store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX); - } - M.x86.R_DI += inc; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + store_data_long_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_EAX); + } else { + store_data_word_abs(M.x86.R_ES, M.x86.R_DI, M.x86.R_AX); + } + M.x86.R_DI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7591,21 +7591,21 @@ DECODE_PRINTF("LODS\tBYTE\n"); TRACE_AND_STEP(); if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; + inc = -1; else - inc = 1; + inc = 1; if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - M.x86.R_AL = fetch_data_byte(M.x86.R_SI); - M.x86.R_CX -= 1; - M.x86.R_SI += inc; - } - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + M.x86.R_AL = fetch_data_byte(M.x86.R_SI); + M.x86.R_CX -= 1; + M.x86.R_SI += inc; + } + M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); } else { - M.x86.R_AL = fetch_data_byte(M.x86.R_SI); - M.x86.R_SI += inc; + M.x86.R_AL = fetch_data_byte(M.x86.R_SI); + M.x86.R_SI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7622,34 +7622,34 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("LODS\tDWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; + DECODE_PRINTF("LODS\tDWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -4; + else + inc = 4; } else { - DECODE_PRINTF("LODS\tWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; + DECODE_PRINTF("LODS\tWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -2; + else + inc = 2; } TRACE_AND_STEP(); count = 1; if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* move them until CX is ZERO. */ - count = M.x86.R_CX; - M.x86.R_CX = 0; - M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); + /* dont care whether REPE or REPNE */ + /* move them until CX is ZERO. */ + count = M.x86.R_CX; + M.x86.R_CX = 0; + M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); } while (count--) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = fetch_data_long(M.x86.R_SI); - } else { - M.x86.R_AX = fetch_data_word(M.x86.R_SI); - } - M.x86.R_SI += inc; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + M.x86.R_EAX = fetch_data_long(M.x86.R_SI); + } else { + M.x86.R_AX = fetch_data_word(M.x86.R_SI); + } + M.x86.R_SI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7668,37 +7668,37 @@ DECODE_PRINTF("SCAS\tBYTE\n"); TRACE_AND_STEP(); if (ACCESS_FLAG(F_DF)) /* down */ - inc = -1; + inc = -1; else - inc = 1; + inc = 1; if (M.x86.mode & SYSMODE_PREFIX_REPE) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(M.x86.R_AL, val2); - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF) == 0) - break; - } - M.x86.mode &= ~SYSMODE_PREFIX_REPE; + /* REPE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); + cmp_byte(M.x86.R_AL, val2); + M.x86.R_CX -= 1; + M.x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF) == 0) + break; + } + M.x86.mode &= ~SYSMODE_PREFIX_REPE; } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) { - /* REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(M.x86.R_AL, val2); - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF)) - break; /* zero flag set means equal */ - } - M.x86.mode &= ~SYSMODE_PREFIX_REPNE; + /* REPNE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); + cmp_byte(M.x86.R_AL, val2); + M.x86.R_CX -= 1; + M.x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF)) + break; /* zero flag set means equal */ + } + M.x86.mode &= ~SYSMODE_PREFIX_REPNE; } else { - val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); - cmp_byte(M.x86.R_AL, val2); - M.x86.R_DI += inc; + val2 = fetch_data_byte_abs(M.x86.R_ES, M.x86.R_DI); + cmp_byte(M.x86.R_AL, val2); + M.x86.R_DI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7715,62 +7715,62 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("SCAS\tDWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -4; - else - inc = 4; + DECODE_PRINTF("SCAS\tDWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -4; + else + inc = 4; } else { - DECODE_PRINTF("SCAS\tWORD\n"); - if (ACCESS_FLAG(F_DF)) /* down */ - inc = -2; - else - inc = 2; + DECODE_PRINTF("SCAS\tWORD\n"); + if (ACCESS_FLAG(F_DF)) /* down */ + inc = -2; + else + inc = 2; } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_REPE) { - /* REPE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(M.x86.R_EAX, val); - } else { - val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word(M.x86.R_AX, (u16)val); - } - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF) == 0) - break; - } - M.x86.mode &= ~SYSMODE_PREFIX_REPE; + /* REPE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); + cmp_long(M.x86.R_EAX, val); + } else { + val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); + cmp_word(M.x86.R_AX, (u16)val); + } + M.x86.R_CX -= 1; + M.x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF) == 0) + break; + } + M.x86.mode &= ~SYSMODE_PREFIX_REPE; } else if (M.x86.mode & SYSMODE_PREFIX_REPNE) { - /* REPNE */ - /* move them until CX is ZERO. */ - while (M.x86.R_CX != 0) { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(M.x86.R_EAX, val); - } else { - val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word(M.x86.R_AX, (u16)val); - } - M.x86.R_CX -= 1; - M.x86.R_DI += inc; - if (ACCESS_FLAG(F_ZF)) - break; /* zero flag set means equal */ - } - M.x86.mode &= ~SYSMODE_PREFIX_REPNE; + /* REPNE */ + /* move them until CX is ZERO. */ + while (M.x86.R_CX != 0) { + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); + cmp_long(M.x86.R_EAX, val); + } else { + val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); + cmp_word(M.x86.R_AX, (u16)val); + } + M.x86.R_CX -= 1; + M.x86.R_DI += inc; + if (ACCESS_FLAG(F_ZF)) + break; /* zero flag set means equal */ + } + M.x86.mode &= ~SYSMODE_PREFIX_REPNE; } else { - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); - cmp_long(M.x86.R_EAX, val); - } else { - val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); - cmp_word(M.x86.R_AX, (u16)val); - } - M.x86.R_DI += inc; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + val = fetch_data_long_abs(M.x86.R_ES, M.x86.R_DI); + cmp_long(M.x86.R_EAX, val); + } else { + val = fetch_data_word_abs(M.x86.R_ES, M.x86.R_DI); + cmp_word(M.x86.R_AX, (u16)val); + } + M.x86.R_DI += inc; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7930,18 +7930,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOV\tEAX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("MOV\tEAX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("MOV\tAX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("MOV\tAX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = srcval; + M.x86.R_EAX = srcval; } else { - M.x86.R_AX = (u16)srcval; + M.x86.R_AX = (u16)srcval; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7957,18 +7957,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOV\tECX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("MOV\tECX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("MOV\tCX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("MOV\tCX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ECX = srcval; + M.x86.R_ECX = srcval; } else { - M.x86.R_CX = (u16)srcval; + M.x86.R_CX = (u16)srcval; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -7984,18 +7984,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOV\tEDX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("MOV\tEDX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("MOV\tDX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("MOV\tDX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDX = srcval; + M.x86.R_EDX = srcval; } else { - M.x86.R_DX = (u16)srcval; + M.x86.R_DX = (u16)srcval; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8011,18 +8011,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOV\tEBX,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("MOV\tEBX,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("MOV\tBX,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("MOV\tBX,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EBX = srcval; + M.x86.R_EBX = srcval; } else { - M.x86.R_BX = (u16)srcval; + M.x86.R_BX = (u16)srcval; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8038,18 +8038,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOV\tESP,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("MOV\tESP,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("MOV\tSP,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("MOV\tSP,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ESP = srcval; + M.x86.R_ESP = srcval; } else { - M.x86.R_SP = (u16)srcval; + M.x86.R_SP = (u16)srcval; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8065,18 +8065,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOV\tEBP,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("MOV\tEBP,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("MOV\tBP,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("MOV\tBP,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EBP = srcval; + M.x86.R_EBP = srcval; } else { - M.x86.R_BP = (u16)srcval; + M.x86.R_BP = (u16)srcval; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8092,18 +8092,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOV\tESI,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("MOV\tESI,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("MOV\tSI,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("MOV\tSI,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_ESI = srcval; + M.x86.R_ESI = srcval; } else { - M.x86.R_SI = (u16)srcval; + M.x86.R_SI = (u16)srcval; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8119,18 +8119,18 @@ START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("MOV\tEDI,"); - srcval = fetch_long_imm(); + DECODE_PRINTF("MOV\tEDI,"); + srcval = fetch_long_imm(); } else { - DECODE_PRINTF("MOV\tDI,"); - srcval = fetch_word_imm(); + DECODE_PRINTF("MOV\tDI,"); + srcval = fetch_word_imm(); } DECODE_PRINTF2("%x\n", srcval); TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EDI = srcval; + M.x86.R_EDI = srcval; } else { - M.x86.R_DI = (u16)srcval; + M.x86.R_DI = (u16)srcval; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8170,80 +8170,80 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } + switch (rh) { + case 0: + DECODE_PRINTF("ROL\t"); + break; + case 1: + DECODE_PRINTF("ROR\t"); + break; + case 2: + DECODE_PRINTF("RCL\t"); + break; + case 3: + DECODE_PRINTF("RCR\t"); + break; + case 4: + DECODE_PRINTF("SHL\t"); + break; + case 5: + DECODE_PRINTF("SHR\t"); + break; + case 6: + DECODE_PRINTF("SAL\t"); + break; + case 7: + DECODE_PRINTF("SAR\t"); + break; + } } #endif /* know operation, decode the mod byte to find the addressing mode. */ switch (mod) { case 0: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm00_address(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm00_address(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (destval, amt); + store_data_byte(destoffset, destval); + break; case 1: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm01_address(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm01_address(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (destval, amt); + store_data_byte(destoffset, destval); + break; case 2: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm10_address(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm10_address(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (destval, amt); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (*destreg, amt); - *destreg = destval; - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (*destreg, amt); + *destreg = destval; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8294,136 +8294,136 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } + switch (rh) { + case 0: + DECODE_PRINTF("ROL\t"); + break; + case 1: + DECODE_PRINTF("ROR\t"); + break; + case 2: + DECODE_PRINTF("RCL\t"); + break; + case 3: + DECODE_PRINTF("RCR\t"); + break; + case 4: + DECODE_PRINTF("SHL\t"); + break; + case 5: + DECODE_PRINTF("SHR\t"); + break; + case 6: + DECODE_PRINTF("SAL\t"); + break; + case 7: + DECODE_PRINTF("SAR\t"); + break; + } } #endif /* know operation, decode the mod byte to find the addressing mode. */ switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm00_address(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm00_address(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (destval, amt); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm00_address(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm00_address(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (destval, amt); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm01_address(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm01_address(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (destval, amt); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm01_address(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm01_address(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (destval, amt); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm10_address(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm10_address(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (destval, amt); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm10_address(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm10_address(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (destval, amt); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - TRACE_AND_STEP(); - *destreg = (*opcD1_long_operation[rh]) (*destreg, amt); - } else { - u16 *destreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + TRACE_AND_STEP(); + *destreg = (*opcD1_long_operation[rh]) (*destreg, amt); + } else { + u16 *destreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - amt = fetch_byte_imm(); - DECODE_PRINTF2(",%x\n", amt); - TRACE_AND_STEP(); - *destreg = (*opcD1_word_operation[rh]) (*destreg, amt); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + amt = fetch_byte_imm(); + DECODE_PRINTF2(",%x\n", amt); + TRACE_AND_STEP(); + *destreg = (*opcD1_word_operation[rh]) (*destreg, amt); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8479,35 +8479,35 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_ES = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_ES = fetch_data_word(srcoffset + 2); + break; case 1: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_ES = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_ES = fetch_data_word(srcoffset + 2); + break; case 2: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_ES = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_ES = fetch_data_word(srcoffset + 2); + break; case 3: /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); + /* UNDEFINED! */ + TRACE_AND_STEP(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8528,35 +8528,35 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_DS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_DS = fetch_data_word(srcoffset + 2); + break; case 1: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_DS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_DS = fetch_data_word(srcoffset + 2); + break; case 2: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_DS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_DS = fetch_data_word(srcoffset + 2); + break; case 3: /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); + /* UNDEFINED! */ + TRACE_AND_STEP(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8577,41 +8577,41 @@ DECODE_PRINTF("MOV\t"); FETCH_DECODE_MODRM(mod, rh, rl); if (rh != 0) { - DECODE_PRINTF("ILLEGAL DECODE OF OPCODE c6\n"); - HALT_SYS(); + DECODE_PRINTF("ILLEGAL DECODE OF OPCODE c6\n"); + HALT_SYS(); } switch (mod) { case 0: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm00_address(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%2x\n", imm); - TRACE_AND_STEP(); - store_data_byte(destoffset, imm); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm00_address(rl); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%2x\n", imm); + TRACE_AND_STEP(); + store_data_byte(destoffset, imm); + break; case 1: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm01_address(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%2x\n", imm); - TRACE_AND_STEP(); - store_data_byte(destoffset, imm); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm01_address(rl); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%2x\n", imm); + TRACE_AND_STEP(); + store_data_byte(destoffset, imm); + break; case 2: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm10_address(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%2x\n", imm); - TRACE_AND_STEP(); - store_data_byte(destoffset, imm); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm10_address(rl); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%2x\n", imm); + TRACE_AND_STEP(); + store_data_byte(destoffset, imm); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - imm = fetch_byte_imm(); - DECODE_PRINTF2(",%2x\n", imm); - TRACE_AND_STEP(); - *destreg = imm; - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + imm = fetch_byte_imm(); + DECODE_PRINTF2(",%2x\n", imm); + TRACE_AND_STEP(); + *destreg = imm; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8630,94 +8630,94 @@ DECODE_PRINTF("MOV\t"); FETCH_DECODE_MODRM(mod, rh, rl); if (rh != 0) { - DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n"); - HALT_SYS(); + DECODE_PRINTF("ILLEGAL DECODE OF OPCODE 8F\n"); + HALT_SYS(); } switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 imm; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm00_address(rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - store_data_long(destoffset, imm); - } else { - u16 imm; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm00_address(rl); + imm = fetch_long_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + store_data_long(destoffset, imm); + } else { + u16 imm; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm00_address(rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - store_data_word(destoffset, imm); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm00_address(rl); + imm = fetch_word_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + store_data_word(destoffset, imm); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 imm; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm01_address(rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - store_data_long(destoffset, imm); - } else { - u16 imm; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm01_address(rl); + imm = fetch_long_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + store_data_long(destoffset, imm); + } else { + u16 imm; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm01_address(rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - store_data_word(destoffset, imm); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm01_address(rl); + imm = fetch_word_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + store_data_word(destoffset, imm); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 imm; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 imm; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm10_address(rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - store_data_long(destoffset, imm); - } else { - u16 imm; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm10_address(rl); + imm = fetch_long_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + store_data_long(destoffset, imm); + } else { + u16 imm; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm10_address(rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - store_data_word(destoffset, imm); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm10_address(rl); + imm = fetch_word_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + store_data_word(destoffset, imm); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { + if (M.x86.mode & SYSMODE_PREFIX_DATA) { u32 *destreg; u32 imm; - destreg = DECODE_RM_LONG_REGISTER(rl); - imm = fetch_long_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - *destreg = imm; - } else { + destreg = DECODE_RM_LONG_REGISTER(rl); + imm = fetch_long_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + *destreg = imm; + } else { u16 *destreg; u16 imm; - destreg = DECODE_RM_WORD_REGISTER(rl); - imm = fetch_word_imm(); - DECODE_PRINTF2(",%x\n", imm); - TRACE_AND_STEP(); - *destreg = imm; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + imm = fetch_word_imm(); + DECODE_PRINTF2(",%x\n", imm); + TRACE_AND_STEP(); + *destreg = imm; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8742,12 +8742,12 @@ push_word(M.x86.R_BP); frame_pointer = M.x86.R_SP; if (nesting > 0) { - for (i = 1; i < nesting; i++) { - M.x86.R_BP -= 2; - push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP)); - } - push_word(frame_pointer); - } + for (i = 1; i < nesting; i++) { + M.x86.R_BP -= 2; + push_word(fetch_data_word_abs(M.x86.R_SS, M.x86.R_BP)); + } + push_word(frame_pointer); + } M.x86.R_BP = frame_pointer; M.x86.R_SP = (u16)(M.x86.R_SP - local); DECODE_CLEAR_SEGOVR(); @@ -8822,13 +8822,13 @@ if (_X86EMU_intrTab[3]) { (*_X86EMU_intrTab[3])(3); } else { - push_word((u16)M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(3 * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(3 * 4); + push_word((u16)M.x86.R_FLG); + CLEAR_FLAG(F_IF); + CLEAR_FLAG(F_TF); + push_word(M.x86.R_CS); + M.x86.R_CS = mem_access_word(3 * 4 + 2); + push_word(M.x86.R_IP); + M.x86.R_IP = mem_access_word(3 * 4); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8852,13 +8852,13 @@ if (_X86EMU_intrTab[intnum]) { (*_X86EMU_intrTab[intnum])(intnum); } else { - push_word((u16)M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(intnum * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(intnum * 4); + push_word((u16)M.x86.R_FLG); + CLEAR_FLAG(F_IF); + CLEAR_FLAG(F_TF); + push_word(M.x86.R_CS); + M.x86.R_CS = mem_access_word(intnum * 4 + 2); + push_word(M.x86.R_IP); + M.x86.R_IP = mem_access_word(intnum * 4); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8876,18 +8876,18 @@ DECODE_PRINTF("INTO\n"); TRACE_AND_STEP(); if (ACCESS_FLAG(F_OF)) { - tmp = mem_access_word(4 * 4 + 2); + tmp = mem_access_word(4 * 4 + 2); if (_X86EMU_intrTab[4]) { (*_X86EMU_intrTab[4])(4); - } else { - push_word((u16)M.x86.R_FLG); - CLEAR_FLAG(F_IF); - CLEAR_FLAG(F_TF); - push_word(M.x86.R_CS); - M.x86.R_CS = mem_access_word(4 * 4 + 2); - push_word(M.x86.R_IP); - M.x86.R_IP = mem_access_word(4 * 4); - } + } else { + push_word((u16)M.x86.R_FLG); + CLEAR_FLAG(F_IF); + CLEAR_FLAG(F_TF); + push_word(M.x86.R_CS); + M.x86.R_CS = mem_access_word(4 * 4 + 2); + push_word(M.x86.R_IP); + M.x86.R_IP = mem_access_word(4 * 4); + } } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -8931,75 +8931,75 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ + switch (rh) { + case 0: + DECODE_PRINTF("ROL\t"); + break; + case 1: + DECODE_PRINTF("ROR\t"); + break; + case 2: + DECODE_PRINTF("RCL\t"); + break; + case 3: + DECODE_PRINTF("RCR\t"); + break; + case 4: + DECODE_PRINTF("SHL\t"); + break; + case 5: + DECODE_PRINTF("SHR\t"); + break; + case 6: + DECODE_PRINTF("SAL\t"); + break; + case 7: + DECODE_PRINTF("SAR\t"); + break; + } } #endif /* know operation, decode the mod byte to find the addressing mode. */ switch (mod) { case 0: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(",1\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, 1); - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(",1\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (destval, 1); + store_data_byte(destoffset, destval); + break; case 1: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(",1\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, 1); - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(",1\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (destval, 1); + store_data_byte(destoffset, destval); + break; case 2: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(",1\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, 1); - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(",1\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (destval, 1); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(",1\n"); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (*destreg, 1); - *destreg = destval; - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(",1\n"); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (*destreg, 1); + *destreg = destval; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -9023,131 +9023,131 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ + switch (rh) { + case 0: + DECODE_PRINTF("ROL\t"); + break; + case 1: + DECODE_PRINTF("ROR\t"); + break; + case 2: + DECODE_PRINTF("RCL\t"); + break; + case 3: + DECODE_PRINTF("RCR\t"); + break; + case 4: + DECODE_PRINTF("SHL\t"); + break; + case 5: + DECODE_PRINTF("SHR\t"); + break; + case 6: + DECODE_PRINTF("SAL\t"); + break; + case 7: + DECODE_PRINTF("SAR\t"); + break; + } } #endif /* know operation, decode the mod byte to find the addressing mode. */ switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(",1\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, 1); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(",1\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (destval, 1); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(",1\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, 1); - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(",1\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (destval, 1); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(",1\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, 1); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(",1\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (destval, 1); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(",1\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, 1); - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(",1\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (destval, 1); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(",1\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, 1); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(",1\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (destval, 1); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(",1\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, 1); - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(",1\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (destval, 1); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { + if (M.x86.mode & SYSMODE_PREFIX_DATA) { u32 destval; u32 *destreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(",1\n"); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (*destreg, 1); - *destreg = destval; - } else { + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(",1\n"); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (*destreg, 1); + *destreg = destval; + } else { u16 destval; u16 *destreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(",1\n"); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (*destreg, 1); - *destreg = destval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(",1\n"); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (*destreg, 1); + *destreg = destval; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -9174,36 +9174,36 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ + switch (rh) { + case 0: + DECODE_PRINTF("ROL\t"); + break; + case 1: + DECODE_PRINTF("ROR\t"); + break; + case 2: + DECODE_PRINTF("RCL\t"); + break; + case 3: + DECODE_PRINTF("RCR\t"); + break; + case 4: + DECODE_PRINTF("SHL\t"); + break; + case 5: + DECODE_PRINTF("SHR\t"); + break; + case 6: + DECODE_PRINTF("SAL\t"); + break; + case 7: + DECODE_PRINTF("SAR\t"); + break; + } } #endif /* know operation, decode the mod byte to find the addressing @@ -9211,39 +9211,39 @@ amt = M.x86.R_CL; switch (mod) { case 0: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(",CL\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(",CL\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (destval, amt); + store_data_byte(destoffset, destval); + break; case 1: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(",CL\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(",CL\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (destval, amt); + store_data_byte(destoffset, destval); + break; case 2: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(",CL\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (destval, amt); - store_data_byte(destoffset, destval); - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(",CL\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (destval, amt); + store_data_byte(destoffset, destval); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = (*opcD0_byte_operation[rh]) (*destreg, amt); - *destreg = destval; - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = (*opcD0_byte_operation[rh]) (*destreg, amt); + *destreg = destval; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -9268,36 +9268,36 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("ROL\t"); - break; - case 1: - DECODE_PRINTF("ROR\t"); - break; - case 2: - DECODE_PRINTF("RCL\t"); - break; - case 3: - DECODE_PRINTF("RCR\t"); - break; - case 4: - DECODE_PRINTF("SHL\t"); - break; - case 5: - DECODE_PRINTF("SHR\t"); - break; - case 6: - DECODE_PRINTF("SAL\t"); - break; - case 7: - DECODE_PRINTF("SAR\t"); - break; - } + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ + switch (rh) { + case 0: + DECODE_PRINTF("ROL\t"); + break; + case 1: + DECODE_PRINTF("ROR\t"); + break; + case 2: + DECODE_PRINTF("RCL\t"); + break; + case 3: + DECODE_PRINTF("RCR\t"); + break; + case 4: + DECODE_PRINTF("SHL\t"); + break; + case 5: + DECODE_PRINTF("SHR\t"); + break; + case 6: + DECODE_PRINTF("SAL\t"); + break; + case 7: + DECODE_PRINTF("SAR\t"); + break; + } } #endif /* know operation, decode the mod byte to find the addressing @@ -9305,91 +9305,91 @@ amt = M.x86.R_CL; switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(",CL\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(",CL\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (destval, amt); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(",CL\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(",CL\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (destval, amt); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(",CL\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(",CL\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (destval, amt); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(",CL\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(",CL\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (destval, amt); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(",CL\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_long_operation[rh]) (destval, amt); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("DWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(",CL\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_long_operation[rh]) (destval, amt); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("WORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(",CL\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = (*opcD1_word_operation[rh]) (destval, amt); - store_data_word(destoffset, destval); - } - break; + DECODE_PRINTF("WORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(",CL\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = (*opcD1_word_operation[rh]) (destval, amt); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = (*opcD1_long_operation[rh]) (*destreg, amt); - } else { - u16 *destreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + *destreg = (*opcD1_long_operation[rh]) (*destreg, amt); + } else { + u16 *destreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = (*opcD1_word_operation[rh]) (*destreg, amt); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + *destreg = (*opcD1_word_operation[rh]) (*destreg, amt); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -9407,9 +9407,9 @@ DECODE_PRINTF("AAM\n"); a = fetch_byte_imm(); /* this is a stupid encoding. */ if (a != 10) { - DECODE_PRINTF("ERROR DECODING AAM\n"); - TRACE_REGS(); - HALT_SYS(); + DECODE_PRINTF("ERROR DECODING AAM\n"); + TRACE_REGS(); + HALT_SYS(); } TRACE_AND_STEP(); /* note the type change here --- returning AL and AH in AX. */ @@ -9472,7 +9472,7 @@ TRACE_AND_STEP(); M.x86.R_CX -= 1; if (M.x86.R_CX != 0 && !ACCESS_FLAG(F_ZF)) /* CX != 0 and !ZF */ - M.x86.R_IP = ip; + M.x86.R_IP = ip; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -9493,7 +9493,7 @@ TRACE_AND_STEP(); M.x86.R_CX -= 1; if (M.x86.R_CX != 0 && ACCESS_FLAG(F_ZF)) /* CX != 0 and ZF */ - M.x86.R_IP = ip; + M.x86.R_IP = ip; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -9514,7 +9514,7 @@ TRACE_AND_STEP(); M.x86.R_CX -= 1; if (M.x86.R_CX != 0) - M.x86.R_IP = ip; + M.x86.R_IP = ip; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -9536,7 +9536,7 @@ DECODE_PRINTF2("%x\n", target); TRACE_AND_STEP(); if (M.x86.R_CX == 0) - M.x86.R_IP = target; + M.x86.R_IP = target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -9571,15 +9571,15 @@ DECODE_PRINTF("IN\t"); port = (u8) fetch_byte_imm(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("EAX,%x\n", port); + DECODE_PRINTF2("EAX,%x\n", port); } else { - DECODE_PRINTF2("AX,%x\n", port); + DECODE_PRINTF2("AX,%x\n", port); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = (*sys_inl)(port); + M.x86.R_EAX = (*sys_inl)(port); } else { - M.x86.R_AX = (*sys_inw)(port); + M.x86.R_AX = (*sys_inw)(port); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -9615,15 +9615,15 @@ DECODE_PRINTF("OUT\t"); port = (u8) fetch_byte_imm(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF2("%x,EAX\n", port); + DECODE_PRINTF2("%x,EAX\n", port); } else { - DECODE_PRINTF2("%x,AX\n", port); + DECODE_PRINTF2("%x,AX\n", port); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - (*sys_outl)(port, M.x86.R_EAX); + (*sys_outl)(port, M.x86.R_EAX); } else { - (*sys_outw)(port, M.x86.R_AX); + (*sys_outw)(port, M.x86.R_AX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -9732,15 +9732,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("IN\tEAX,DX\n"); + DECODE_PRINTF("IN\tEAX,DX\n"); } else { - DECODE_PRINTF("IN\tAX,DX\n"); + DECODE_PRINTF("IN\tAX,DX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - M.x86.R_EAX = (*sys_inl)(M.x86.R_DX); + M.x86.R_EAX = (*sys_inl)(M.x86.R_DX); } else { - M.x86.R_AX = (*sys_inw)(M.x86.R_DX); + M.x86.R_AX = (*sys_inw)(M.x86.R_DX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -9768,15 +9768,15 @@ { START_OF_INSTR(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("OUT\tDX,EAX\n"); + DECODE_PRINTF("OUT\tDX,EAX\n"); } else { - DECODE_PRINTF("OUT\tDX,AX\n"); + DECODE_PRINTF("OUT\tDX,AX\n"); } TRACE_AND_STEP(); if (M.x86.mode & SYSMODE_PREFIX_DATA) { - (*sys_outl)(M.x86.R_DX, M.x86.R_EAX); + (*sys_outl)(M.x86.R_DX, M.x86.R_EAX); } else { - (*sys_outw)(M.x86.R_DX, M.x86.R_AX); + (*sys_outw)(M.x86.R_DX, M.x86.R_AX); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -9871,268 +9871,268 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: /* mod=00 */ - switch (rh) { - case 0: /* test byte imm */ - DECODE_PRINTF("TEST\tBYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%02x\n", srcval); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - test_byte(destval, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("NOT\tBYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = not_byte(destval); - store_data_byte(destoffset, destval); - break; - case 3: - DECODE_PRINTF("NEG\tBYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = neg_byte(destval); - store_data_byte(destoffset, destval); - break; - case 4: - DECODE_PRINTF("MUL\tBYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - mul_byte(destval); - break; - case 5: - DECODE_PRINTF("IMUL\tBYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - imul_byte(destval); - break; - case 6: - DECODE_PRINTF("DIV\tBYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - div_byte(destval); - break; - case 7: - DECODE_PRINTF("IDIV\tBYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - idiv_byte(destval); - break; - } - break; /* end mod==00 */ + switch (rh) { + case 0: /* test byte imm */ + DECODE_PRINTF("TEST\tBYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + srcval = fetch_byte_imm(); + DECODE_PRINTF2("%02x\n", srcval); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + test_byte(destval, srcval); + break; + case 1: + DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n"); + HALT_SYS(); + break; + case 2: + DECODE_PRINTF("NOT\tBYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = not_byte(destval); + store_data_byte(destoffset, destval); + break; + case 3: + DECODE_PRINTF("NEG\tBYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = neg_byte(destval); + store_data_byte(destoffset, destval); + break; + case 4: + DECODE_PRINTF("MUL\tBYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + mul_byte(destval); + break; + case 5: + DECODE_PRINTF("IMUL\tBYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + imul_byte(destval); + break; + case 6: + DECODE_PRINTF("DIV\tBYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + div_byte(destval); + break; + case 7: + DECODE_PRINTF("IDIV\tBYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + idiv_byte(destval); + break; + } + break; /* end mod==00 */ case 1: /* mod=01 */ - switch (rh) { - case 0: /* test byte imm */ - DECODE_PRINTF("TEST\tBYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%02x\n", srcval); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - test_byte(destval, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=01 RH=01 OP=F6\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("NOT\tBYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = not_byte(destval); - store_data_byte(destoffset, destval); - break; - case 3: - DECODE_PRINTF("NEG\tBYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = neg_byte(destval); - store_data_byte(destoffset, destval); - break; - case 4: - DECODE_PRINTF("MUL\tBYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - mul_byte(destval); - break; - case 5: - DECODE_PRINTF("IMUL\tBYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - imul_byte(destval); - break; - case 6: - DECODE_PRINTF("DIV\tBYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - div_byte(destval); - break; - case 7: - DECODE_PRINTF("IDIV\tBYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - idiv_byte(destval); - break; - } - break; /* end mod==01 */ + switch (rh) { + case 0: /* test byte imm */ + DECODE_PRINTF("TEST\tBYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + srcval = fetch_byte_imm(); + DECODE_PRINTF2("%02x\n", srcval); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + test_byte(destval, srcval); + break; + case 1: + DECODE_PRINTF("ILLEGAL OP MOD=01 RH=01 OP=F6\n"); + HALT_SYS(); + break; + case 2: + DECODE_PRINTF("NOT\tBYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = not_byte(destval); + store_data_byte(destoffset, destval); + break; + case 3: + DECODE_PRINTF("NEG\tBYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = neg_byte(destval); + store_data_byte(destoffset, destval); + break; + case 4: + DECODE_PRINTF("MUL\tBYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + mul_byte(destval); + break; + case 5: + DECODE_PRINTF("IMUL\tBYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + imul_byte(destval); + break; + case 6: + DECODE_PRINTF("DIV\tBYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + div_byte(destval); + break; + case 7: + DECODE_PRINTF("IDIV\tBYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + idiv_byte(destval); + break; + } + break; /* end mod==01 */ case 2: /* mod=10 */ - switch (rh) { - case 0: /* test byte imm */ - DECODE_PRINTF("TEST\tBYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%02x\n", srcval); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - test_byte(destval, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=10 RH=01 OP=F6\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("NOT\tBYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = not_byte(destval); - store_data_byte(destoffset, destval); - break; - case 3: - DECODE_PRINTF("NEG\tBYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = neg_byte(destval); - store_data_byte(destoffset, destval); - break; - case 4: - DECODE_PRINTF("MUL\tBYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - mul_byte(destval); - break; - case 5: - DECODE_PRINTF("IMUL\tBYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - imul_byte(destval); - break; - case 6: - DECODE_PRINTF("DIV\tBYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - div_byte(destval); - break; - case 7: - DECODE_PRINTF("IDIV\tBYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - idiv_byte(destval); - break; - } - break; /* end mod==10 */ + switch (rh) { + case 0: /* test byte imm */ + DECODE_PRINTF("TEST\tBYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + srcval = fetch_byte_imm(); + DECODE_PRINTF2("%02x\n", srcval); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + test_byte(destval, srcval); + break; + case 1: + DECODE_PRINTF("ILLEGAL OP MOD=10 RH=01 OP=F6\n"); + HALT_SYS(); + break; + case 2: + DECODE_PRINTF("NOT\tBYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = not_byte(destval); + store_data_byte(destoffset, destval); + break; + case 3: + DECODE_PRINTF("NEG\tBYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = neg_byte(destval); + store_data_byte(destoffset, destval); + break; + case 4: + DECODE_PRINTF("MUL\tBYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + mul_byte(destval); + break; + case 5: + DECODE_PRINTF("IMUL\tBYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + imul_byte(destval); + break; + case 6: + DECODE_PRINTF("DIV\tBYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + div_byte(destval); + break; + case 7: + DECODE_PRINTF("IDIV\tBYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + idiv_byte(destval); + break; + } + break; /* end mod==10 */ case 3: /* mod=11 */ - switch (rh) { - case 0: /* test byte imm */ - DECODE_PRINTF("TEST\t"); - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF(","); - srcval = fetch_byte_imm(); - DECODE_PRINTF2("%02x\n", srcval); - TRACE_AND_STEP(); - test_byte(*destreg, srcval); - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n"); - HALT_SYS(); - break; - case 2: - DECODE_PRINTF("NOT\t"); - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = not_byte(*destreg); - break; - case 3: - DECODE_PRINTF("NEG\t"); - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = neg_byte(*destreg); - break; - case 4: - DECODE_PRINTF("MUL\t"); - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - mul_byte(*destreg); /*!!! */ - break; - case 5: - DECODE_PRINTF("IMUL\t"); - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - imul_byte(*destreg); - break; - case 6: - DECODE_PRINTF("DIV\t"); - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - div_byte(*destreg); - break; - case 7: - DECODE_PRINTF("IDIV\t"); - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - idiv_byte(*destreg); - break; - } - break; /* end mod==11 */ + switch (rh) { + case 0: /* test byte imm */ + DECODE_PRINTF("TEST\t"); + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF(","); + srcval = fetch_byte_imm(); + DECODE_PRINTF2("%02x\n", srcval); + TRACE_AND_STEP(); + test_byte(*destreg, srcval); + break; + case 1: + DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n"); + HALT_SYS(); + break; + case 2: + DECODE_PRINTF("NOT\t"); + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = not_byte(*destreg); + break; + case 3: + DECODE_PRINTF("NEG\t"); + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = neg_byte(*destreg); + break; + case 4: + DECODE_PRINTF("MUL\t"); + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + mul_byte(*destreg); /*!!! */ + break; + case 5: + DECODE_PRINTF("IMUL\t"); + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + imul_byte(*destreg); + break; + case 6: + DECODE_PRINTF("DIV\t"); + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + div_byte(*destreg); + break; + case 7: + DECODE_PRINTF("IDIV\t"); + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + idiv_byte(*destreg); + break; + } + break; /* end mod==11 */ } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -10153,641 +10153,641 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: /* mod=00 */ - switch (rh) { - case 0: /* test word imm */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval,srcval; + switch (rh) { + case 0: /* test word imm */ + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval,srcval; - DECODE_PRINTF("TEST\tDWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - srcval = fetch_long_imm(); - DECODE_PRINTF2("%x\n", srcval); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - test_long(destval, srcval); - } else { - u16 destval,srcval; + DECODE_PRINTF("TEST\tDWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + srcval = fetch_long_imm(); + DECODE_PRINTF2("%x\n", srcval); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + test_long(destval, srcval); + } else { + u16 destval,srcval; - DECODE_PRINTF("TEST\tWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - srcval = fetch_word_imm(); - DECODE_PRINTF2("%x\n", srcval); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - test_word(destval, srcval); - } - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n"); - HALT_SYS(); - break; - case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("TEST\tWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + srcval = fetch_word_imm(); + DECODE_PRINTF2("%x\n", srcval); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + test_word(destval, srcval); + } + break; + case 1: + DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F7\n"); + HALT_SYS(); + break; + case 2: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("NOT\tDWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = not_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("NOT\tDWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = not_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("NOT\tWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = not_word(destval); - store_data_word(destoffset, destval); - } - break; - case 3: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("NOT\tWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = not_word(destval); + store_data_word(destoffset, destval); + } + break; + case 3: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("NEG\tDWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = neg_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("NEG\tDWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = neg_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("NEG\tWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = neg_word(destval); - store_data_word(destoffset, destval); - } - break; - case 4: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("NEG\tWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = neg_word(destval); + store_data_word(destoffset, destval); + } + break; + case 4: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("MUL\tDWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - mul_long(destval); - } else { - u16 destval; + DECODE_PRINTF("MUL\tDWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + mul_long(destval); + } else { + u16 destval; - DECODE_PRINTF("MUL\tWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - mul_word(destval); - } - break; - case 5: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("MUL\tWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + mul_word(destval); + } + break; + case 5: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("IMUL\tDWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - imul_long(destval); - } else { - u16 destval; + DECODE_PRINTF("IMUL\tDWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + imul_long(destval); + } else { + u16 destval; - DECODE_PRINTF("IMUL\tWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - imul_word(destval); - } - break; - case 6: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("IMUL\tWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + imul_word(destval); + } + break; + case 6: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DIV\tDWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - div_long(destval); - } else { - u16 destval; + DECODE_PRINTF("DIV\tDWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + div_long(destval); + } else { + u16 destval; - DECODE_PRINTF("DIV\tWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - div_word(destval); - } - break; - case 7: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("DIV\tWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + div_word(destval); + } + break; + case 7: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("IDIV\tDWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - idiv_long(destval); - } else { - u16 destval; + DECODE_PRINTF("IDIV\tDWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + idiv_long(destval); + } else { + u16 destval; - DECODE_PRINTF("IDIV\tWORD PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - idiv_word(destval); - } - break; - } - break; /* end mod==00 */ + DECODE_PRINTF("IDIV\tWORD PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + idiv_word(destval); + } + break; + } + break; /* end mod==00 */ case 1: /* mod=01 */ - switch (rh) { - case 0: /* test word imm */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval,srcval; + switch (rh) { + case 0: /* test word imm */ + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval,srcval; - DECODE_PRINTF("TEST\tDWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - srcval = fetch_long_imm(); - DECODE_PRINTF2("%x\n", srcval); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - test_long(destval, srcval); - } else { - u16 destval,srcval; + DECODE_PRINTF("TEST\tDWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + srcval = fetch_long_imm(); + DECODE_PRINTF2("%x\n", srcval); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + test_long(destval, srcval); + } else { + u16 destval,srcval; - DECODE_PRINTF("TEST\tWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - srcval = fetch_word_imm(); - DECODE_PRINTF2("%x\n", srcval); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - test_word(destval, srcval); - } - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=01 RH=01 OP=F6\n"); - HALT_SYS(); - break; - case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("TEST\tWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + srcval = fetch_word_imm(); + DECODE_PRINTF2("%x\n", srcval); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + test_word(destval, srcval); + } + break; + case 1: + DECODE_PRINTF("ILLEGAL OP MOD=01 RH=01 OP=F6\n"); + HALT_SYS(); + break; + case 2: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("NOT\tDWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = not_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("NOT\tDWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = not_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("NOT\tWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = not_word(destval); - store_data_word(destoffset, destval); - } - break; - case 3: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("NOT\tWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = not_word(destval); + store_data_word(destoffset, destval); + } + break; + case 3: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("NEG\tDWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = neg_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("NEG\tDWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = neg_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("NEG\tWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = neg_word(destval); - store_data_word(destoffset, destval); - } - break; - case 4: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("NEG\tWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = neg_word(destval); + store_data_word(destoffset, destval); + } + break; + case 4: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("MUL\tDWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - mul_long(destval); - } else { - u16 destval; + DECODE_PRINTF("MUL\tDWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + mul_long(destval); + } else { + u16 destval; - DECODE_PRINTF("MUL\tWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - mul_word(destval); - } - break; - case 5: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("MUL\tWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + mul_word(destval); + } + break; + case 5: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("IMUL\tDWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - imul_long(destval); - } else { - u16 destval; + DECODE_PRINTF("IMUL\tDWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + imul_long(destval); + } else { + u16 destval; - DECODE_PRINTF("IMUL\tWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - imul_word(destval); - } - break; - case 6: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("IMUL\tWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + imul_word(destval); + } + break; + case 6: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DIV\tDWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - div_long(destval); - } else { - u16 destval; + DECODE_PRINTF("DIV\tDWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + div_long(destval); + } else { + u16 destval; - DECODE_PRINTF("DIV\tWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - div_word(destval); - } - break; - case 7: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("DIV\tWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + div_word(destval); + } + break; + case 7: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("IDIV\tDWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - idiv_long(destval); - } else { - u16 destval; + DECODE_PRINTF("IDIV\tDWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + idiv_long(destval); + } else { + u16 destval; - DECODE_PRINTF("IDIV\tWORD PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - idiv_word(destval); - } - break; - } - break; /* end mod==01 */ + DECODE_PRINTF("IDIV\tWORD PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + idiv_word(destval); + } + break; + } + break; /* end mod==01 */ case 2: /* mod=10 */ - switch (rh) { - case 0: /* test word imm */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval,srcval; + switch (rh) { + case 0: /* test word imm */ + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval,srcval; - DECODE_PRINTF("TEST\tDWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - srcval = fetch_long_imm(); - DECODE_PRINTF2("%x\n", srcval); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - test_long(destval, srcval); - } else { - u16 destval,srcval; + DECODE_PRINTF("TEST\tDWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + srcval = fetch_long_imm(); + DECODE_PRINTF2("%x\n", srcval); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + test_long(destval, srcval); + } else { + u16 destval,srcval; - DECODE_PRINTF("TEST\tWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - srcval = fetch_word_imm(); - DECODE_PRINTF2("%x\n", srcval); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - test_word(destval, srcval); - } - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=10 RH=01 OP=F6\n"); - HALT_SYS(); - break; - case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("TEST\tWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + srcval = fetch_word_imm(); + DECODE_PRINTF2("%x\n", srcval); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + test_word(destval, srcval); + } + break; + case 1: + DECODE_PRINTF("ILLEGAL OP MOD=10 RH=01 OP=F6\n"); + HALT_SYS(); + break; + case 2: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("NOT\tDWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = not_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("NOT\tDWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = not_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("NOT\tWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = not_word(destval); - store_data_word(destoffset, destval); - } - break; - case 3: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("NOT\tWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = not_word(destval); + store_data_word(destoffset, destval); + } + break; + case 3: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("NEG\tDWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = neg_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + DECODE_PRINTF("NEG\tDWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = neg_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - DECODE_PRINTF("NEG\tWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = neg_word(destval); - store_data_word(destoffset, destval); - } - break; - case 4: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("NEG\tWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = neg_word(destval); + store_data_word(destoffset, destval); + } + break; + case 4: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("MUL\tDWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - mul_long(destval); - } else { - u16 destval; + DECODE_PRINTF("MUL\tDWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + mul_long(destval); + } else { + u16 destval; - DECODE_PRINTF("MUL\tWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - mul_word(destval); - } - break; - case 5: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("MUL\tWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + mul_word(destval); + } + break; + case 5: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("IMUL\tDWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - imul_long(destval); - } else { - u16 destval; + DECODE_PRINTF("IMUL\tDWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + imul_long(destval); + } else { + u16 destval; - DECODE_PRINTF("IMUL\tWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - imul_word(destval); - } - break; - case 6: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("IMUL\tWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + imul_word(destval); + } + break; + case 6: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("DIV\tDWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - div_long(destval); - } else { - u16 destval; + DECODE_PRINTF("DIV\tDWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + div_long(destval); + } else { + u16 destval; - DECODE_PRINTF("DIV\tWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - div_word(destval); - } - break; - case 7: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + DECODE_PRINTF("DIV\tWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + div_word(destval); + } + break; + case 7: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - DECODE_PRINTF("IDIV\tDWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - idiv_long(destval); - } else { - u16 destval; + DECODE_PRINTF("IDIV\tDWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + idiv_long(destval); + } else { + u16 destval; - DECODE_PRINTF("IDIV\tWORD PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - idiv_word(destval); - } - break; - } - break; /* end mod==10 */ + DECODE_PRINTF("IDIV\tWORD PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + idiv_word(destval); + } + break; + } + break; /* end mod==10 */ case 3: /* mod=11 */ - switch (rh) { - case 0: /* test word imm */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + switch (rh) { + case 0: /* test word imm */ + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - DECODE_PRINTF("TEST\t"); - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - srcval = fetch_long_imm(); - DECODE_PRINTF2("%x\n", srcval); - TRACE_AND_STEP(); - test_long(*destreg, srcval); - } else { - u16 *destreg; - u16 srcval; + DECODE_PRINTF("TEST\t"); + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + srcval = fetch_long_imm(); + DECODE_PRINTF2("%x\n", srcval); + TRACE_AND_STEP(); + test_long(*destreg, srcval); + } else { + u16 *destreg; + u16 srcval; - DECODE_PRINTF("TEST\t"); - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - srcval = fetch_word_imm(); - DECODE_PRINTF2("%x\n", srcval); - TRACE_AND_STEP(); - test_word(*destreg, srcval); - } - break; - case 1: - DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n"); - HALT_SYS(); - break; - case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + DECODE_PRINTF("TEST\t"); + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + srcval = fetch_word_imm(); + DECODE_PRINTF2("%x\n", srcval); + TRACE_AND_STEP(); + test_word(*destreg, srcval); + } + break; + case 1: + DECODE_PRINTF("ILLEGAL OP MOD=00 RH=01 OP=F6\n"); + HALT_SYS(); + break; + case 2: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - DECODE_PRINTF("NOT\t"); - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = not_long(*destreg); - } else { - u16 *destreg; + DECODE_PRINTF("NOT\t"); + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = not_long(*destreg); + } else { + u16 *destreg; - DECODE_PRINTF("NOT\t"); - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = not_word(*destreg); - } - break; - case 3: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + DECODE_PRINTF("NOT\t"); + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = not_word(*destreg); + } + break; + case 3: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - DECODE_PRINTF("NEG\t"); - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = neg_long(*destreg); - } else { - u16 *destreg; + DECODE_PRINTF("NEG\t"); + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = neg_long(*destreg); + } else { + u16 *destreg; - DECODE_PRINTF("NEG\t"); - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = neg_word(*destreg); - } - break; - case 4: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + DECODE_PRINTF("NEG\t"); + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = neg_word(*destreg); + } + break; + case 4: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - DECODE_PRINTF("MUL\t"); - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - mul_long(*destreg); /*!!! */ - } else { - u16 *destreg; + DECODE_PRINTF("MUL\t"); + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + mul_long(*destreg); /*!!! */ + } else { + u16 *destreg; - DECODE_PRINTF("MUL\t"); - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - mul_word(*destreg); /*!!! */ - } - break; - case 5: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + DECODE_PRINTF("MUL\t"); + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + mul_word(*destreg); /*!!! */ + } + break; + case 5: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - DECODE_PRINTF("IMUL\t"); - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - imul_long(*destreg); - } else { - u16 *destreg; + DECODE_PRINTF("IMUL\t"); + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + imul_long(*destreg); + } else { + u16 *destreg; - DECODE_PRINTF("IMUL\t"); - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - imul_word(*destreg); - } - break; - case 6: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + DECODE_PRINTF("IMUL\t"); + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + imul_word(*destreg); + } + break; + case 6: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - DECODE_PRINTF("DIV\t"); - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - div_long(*destreg); - } else { - u16 *destreg; + DECODE_PRINTF("DIV\t"); + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + div_long(*destreg); + } else { + u16 *destreg; - DECODE_PRINTF("DIV\t"); - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - div_word(*destreg); - } - break; - case 7: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + DECODE_PRINTF("DIV\t"); + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + div_word(*destreg); + } + break; + case 7: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - DECODE_PRINTF("IDIV\t"); - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - idiv_long(*destreg); - } else { - u16 *destreg; + DECODE_PRINTF("IDIV\t"); + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + idiv_long(*destreg); + } else { + u16 *destreg; - DECODE_PRINTF("IDIV\t"); - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - idiv_word(*destreg); - } - break; - } - break; /* end mod==11 */ + DECODE_PRINTF("IDIV\t"); + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + idiv_word(*destreg); + } + break; + } + break; /* end mod==11 */ } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -10899,102 +10899,102 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ - switch (rh) { - case 0: - DECODE_PRINTF("INC\t"); - break; - case 1: - DECODE_PRINTF("DEC\t"); - break; - case 2: - case 3: - case 4: - case 5: - case 6: - case 7: - DECODE_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x \n", mod); - HALT_SYS(); - break; - } + switch (rh) { + case 0: + DECODE_PRINTF("INC\t"); + break; + case 1: + DECODE_PRINTF("DEC\t"); + break; + case 2: + case 3: + case 4: + case 5: + case 6: + case 7: + DECODE_PRINTF2("ILLEGAL OP MAJOR OP 0xFE MINOR OP %x \n", mod); + HALT_SYS(); + break; + } } #endif switch (mod) { case 0: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - switch (rh) { - case 0: /* inc word ptr ... */ - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = inc_byte(destval); - store_data_byte(destoffset, destval); - break; - case 1: /* dec word ptr ... */ - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = dec_byte(destval); - store_data_byte(destoffset, destval); - break; - } - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + switch (rh) { + case 0: /* inc word ptr ... */ + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = inc_byte(destval); + store_data_byte(destoffset, destval); + break; + case 1: /* dec word ptr ... */ + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = dec_byte(destval); + store_data_byte(destoffset, destval); + break; + } + break; case 1: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - switch (rh) { - case 0: - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = inc_byte(destval); - store_data_byte(destoffset, destval); - break; - case 1: - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = dec_byte(destval); - store_data_byte(destoffset, destval); - break; - } - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + switch (rh) { + case 0: + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = inc_byte(destval); + store_data_byte(destoffset, destval); + break; + case 1: + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = dec_byte(destval); + store_data_byte(destoffset, destval); + break; + } + break; case 2: - DECODE_PRINTF("BYTE PTR "); - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - switch (rh) { - case 0: - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = inc_byte(destval); - store_data_byte(destoffset, destval); - break; - case 1: - destval = fetch_data_byte(destoffset); - TRACE_AND_STEP(); - destval = dec_byte(destval); - store_data_byte(destoffset, destval); - break; - } - break; + DECODE_PRINTF("BYTE PTR "); + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + switch (rh) { + case 0: + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = inc_byte(destval); + store_data_byte(destoffset, destval); + break; + case 1: + destval = fetch_data_byte(destoffset); + TRACE_AND_STEP(); + destval = dec_byte(destval); + store_data_byte(destoffset, destval); + break; + } + break; case 3: - destreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - switch (rh) { - case 0: - TRACE_AND_STEP(); - *destreg = inc_byte(*destreg); - break; - case 1: - TRACE_AND_STEP(); - *destreg = dec_byte(*destreg); - break; - } - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + switch (rh) { + case 0: + TRACE_AND_STEP(); + *destreg = inc_byte(*destreg); + break; + case 1: + TRACE_AND_STEP(); + *destreg = dec_byte(*destreg); + break; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -11016,374 +11016,374 @@ FETCH_DECODE_MODRM(mod, rh, rl); #ifdef DEBUG if (DEBUG_DECODE()) { - /* XXX DECODE_PRINTF may be changed to something more - general, so that it is important to leave the strings - in the same format, even though the result is that the - above test is done twice. */ + /* XXX DECODE_PRINTF may be changed to something more + general, so that it is important to leave the strings + in the same format, even though the result is that the + above test is done twice. */ - switch (rh) { - case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("INC\tDWORD PTR "); - } else { - DECODE_PRINTF("INC\tWORD PTR "); - } - break; - case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - DECODE_PRINTF("DEC\tDWORD PTR "); - } else { - DECODE_PRINTF("DEC\tWORD PTR "); - } - break; - case 2: - DECODE_PRINTF("CALL\t "); - break; - case 3: - DECODE_PRINTF("CALL\tFAR "); - break; - case 4: - DECODE_PRINTF("JMP\t"); - break; - case 5: - DECODE_PRINTF("JMP\tFAR "); - break; - case 6: - DECODE_PRINTF("PUSH\t"); - break; - case 7: - DECODE_PRINTF("ILLEGAL DECODING OF OPCODE FF\t"); - HALT_SYS(); - break; - } + switch (rh) { + case 0: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + DECODE_PRINTF("INC\tDWORD PTR "); + } else { + DECODE_PRINTF("INC\tWORD PTR "); + } + break; + case 1: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + DECODE_PRINTF("DEC\tDWORD PTR "); + } else { + DECODE_PRINTF("DEC\tWORD PTR "); + } + break; + case 2: + DECODE_PRINTF("CALL\t "); + break; + case 3: + DECODE_PRINTF("CALL\tFAR "); + break; + case 4: + DECODE_PRINTF("JMP\t"); + break; + case 5: + DECODE_PRINTF("JMP\tFAR "); + break; + case 6: + DECODE_PRINTF("PUSH\t"); + break; + case 7: + DECODE_PRINTF("ILLEGAL DECODING OF OPCODE FF\t"); + HALT_SYS(); + break; + } } #endif switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - switch (rh) { - case 0: /* inc word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + switch (rh) { + case 0: /* inc word ptr ... */ + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = inc_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = inc_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = inc_word(destval); - store_data_word(destoffset, destval); - } - break; - case 1: /* dec word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = inc_word(destval); + store_data_word(destoffset, destval); + } + break; + case 1: /* dec word ptr ... */ + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = dec_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = dec_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = dec_word(destval); - store_data_word(destoffset, destval); - } - break; - case 2: /* call word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 3: /* call far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - push_word(M.x86.R_CS); - M.x86.R_CS = destval2; - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 4: /* jmp word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - break; - case 5: /* jmp far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - M.x86.R_CS = destval2; - break; - case 6: /* push word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = dec_word(destval); + store_data_word(destoffset, destval); + } + break; + case 2: /* call word ptr ... */ + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + push_word(M.x86.R_IP); + M.x86.R_IP = destval; + break; + case 3: /* call far ptr ... */ + destval = fetch_data_word(destoffset); + destval2 = fetch_data_word(destoffset + 2); + TRACE_AND_STEP(); + push_word(M.x86.R_CS); + M.x86.R_CS = destval2; + push_word(M.x86.R_IP); + M.x86.R_IP = destval; + break; + case 4: /* jmp word ptr ... */ + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + M.x86.R_IP = destval; + break; + case 5: /* jmp far ptr ... */ + destval = fetch_data_word(destoffset); + destval2 = fetch_data_word(destoffset + 2); + TRACE_AND_STEP(); + M.x86.R_IP = destval; + M.x86.R_CS = destval2; + break; + case 6: /* push word ptr ... */ + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - push_long(destval); - } else { - u16 destval; + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + push_long(destval); + } else { + u16 destval; - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(destval); - } - break; - } - break; + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + push_word(destval); + } + break; + } + break; case 1: - destoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - switch (rh) { - case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + switch (rh) { + case 0: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = inc_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = inc_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = inc_word(destval); - store_data_word(destoffset, destval); - } - break; - case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = inc_word(destval); + store_data_word(destoffset, destval); + } + break; + case 1: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = dec_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = dec_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = dec_word(destval); - store_data_word(destoffset, destval); - } - break; - case 2: /* call word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 3: /* call far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - push_word(M.x86.R_CS); - M.x86.R_CS = destval2; - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 4: /* jmp word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - break; - case 5: /* jmp far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - M.x86.R_CS = destval2; - break; - case 6: /* push word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = dec_word(destval); + store_data_word(destoffset, destval); + } + break; + case 2: /* call word ptr ... */ + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + push_word(M.x86.R_IP); + M.x86.R_IP = destval; + break; + case 3: /* call far ptr ... */ + destval = fetch_data_word(destoffset); + destval2 = fetch_data_word(destoffset + 2); + TRACE_AND_STEP(); + push_word(M.x86.R_CS); + M.x86.R_CS = destval2; + push_word(M.x86.R_IP); + M.x86.R_IP = destval; + break; + case 4: /* jmp word ptr ... */ + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + M.x86.R_IP = destval; + break; + case 5: /* jmp far ptr ... */ + destval = fetch_data_word(destoffset); + destval2 = fetch_data_word(destoffset + 2); + TRACE_AND_STEP(); + M.x86.R_IP = destval; + M.x86.R_CS = destval2; + break; + case 6: /* push word ptr ... */ + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - push_long(destval); - } else { - u16 destval; + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + push_long(destval); + } else { + u16 destval; - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(destval); - } - break; - } - break; + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + push_word(destval); + } + break; + } + break; case 2: - destoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - switch (rh) { - case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + switch (rh) { + case 0: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = inc_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = inc_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = inc_word(destval); - store_data_word(destoffset, destval); - } - break; - case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = inc_word(destval); + store_data_word(destoffset, destval); + } + break; + case 1: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - destval = dec_long(destval); - store_data_long(destoffset, destval); - } else { - u16 destval; + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + destval = dec_long(destval); + store_data_long(destoffset, destval); + } else { + u16 destval; - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - destval = dec_word(destval); - store_data_word(destoffset, destval); - } - break; - case 2: /* call word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 3: /* call far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - push_word(M.x86.R_CS); - M.x86.R_CS = destval2; - push_word(M.x86.R_IP); - M.x86.R_IP = destval; - break; - case 4: /* jmp word ptr ... */ - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - break; - case 5: /* jmp far ptr ... */ - destval = fetch_data_word(destoffset); - destval2 = fetch_data_word(destoffset + 2); - TRACE_AND_STEP(); - M.x86.R_IP = destval; - M.x86.R_CS = destval2; - break; - case 6: /* push word ptr ... */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + destval = dec_word(destval); + store_data_word(destoffset, destval); + } + break; + case 2: /* call word ptr ... */ + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + push_word(M.x86.R_IP); + M.x86.R_IP = destval; + break; + case 3: /* call far ptr ... */ + destval = fetch_data_word(destoffset); + destval2 = fetch_data_word(destoffset + 2); + TRACE_AND_STEP(); + push_word(M.x86.R_CS); + M.x86.R_CS = destval2; + push_word(M.x86.R_IP); + M.x86.R_IP = destval; + break; + case 4: /* jmp word ptr ... */ + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + M.x86.R_IP = destval; + break; + case 5: /* jmp far ptr ... */ + destval = fetch_data_word(destoffset); + destval2 = fetch_data_word(destoffset + 2); + TRACE_AND_STEP(); + M.x86.R_IP = destval; + M.x86.R_CS = destval2; + break; + case 6: /* push word ptr ... */ + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; - destval = fetch_data_long(destoffset); - TRACE_AND_STEP(); - push_long(destval); - } else { - u16 destval; + destval = fetch_data_long(destoffset); + TRACE_AND_STEP(); + push_long(destval); + } else { + u16 destval; - destval = fetch_data_word(destoffset); - TRACE_AND_STEP(); - push_word(destval); - } - break; - } - break; + destval = fetch_data_word(destoffset); + TRACE_AND_STEP(); + push_word(destval); + } + break; + } + break; case 3: - switch (rh) { - case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + switch (rh) { + case 0: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = inc_long(*destreg); - } else { - u16 *destreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = inc_long(*destreg); + } else { + u16 *destreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = inc_word(*destreg); - } - break; - case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = inc_word(*destreg); + } + break; + case 1: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = dec_long(*destreg); - } else { - u16 *destreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = dec_long(*destreg); + } else { + u16 *destreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = dec_word(*destreg); - } - break; - case 2: /* call word ptr ... */ - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - push_word(M.x86.R_IP); - M.x86.R_IP = *destreg; - break; - case 3: /* jmp far ptr ... */ - DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n"); - TRACE_AND_STEP(); - HALT_SYS(); - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = dec_word(*destreg); + } + break; + case 2: /* call word ptr ... */ + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + push_word(M.x86.R_IP); + M.x86.R_IP = *destreg; + break; + case 3: /* jmp far ptr ... */ + DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n"); + TRACE_AND_STEP(); + HALT_SYS(); + break; - case 4: /* jmp ... */ - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - M.x86.R_IP = (u16) (*destreg); - break; - case 5: /* jmp far ptr ... */ - DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n"); - TRACE_AND_STEP(); - HALT_SYS(); - break; - case 6: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; + case 4: /* jmp ... */ + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + M.x86.R_IP = (u16) (*destreg); + break; + case 5: /* jmp far ptr ... */ + DECODE_PRINTF("OPERATION UNDEFINED 0XFF \n"); + TRACE_AND_STEP(); + HALT_SYS(); + break; + case 6: + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - push_long(*destreg); - } else { - u16 *destreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + push_long(*destreg); + } else { + u16 *destreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - push_word(*destreg); - } - break; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + push_word(*destreg); + } + break; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c b/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c index 2ada44e..d381307 100644 --- a/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c +++ b/board/MAI/bios_emulator/scitech/src/x86emu/ops2.c @@ -77,71 +77,71 @@ START_OF_INSTR(); switch (op2) { case 0x80: - name = "JO\t"; - cond = ACCESS_FLAG(F_OF); - break; + name = "JO\t"; + cond = ACCESS_FLAG(F_OF); + break; case 0x81: - name = "JNO\t"; - cond = !ACCESS_FLAG(F_OF); - break; + name = "JNO\t"; + cond = !ACCESS_FLAG(F_OF); + break; case 0x82: - name = "JB\t"; - cond = ACCESS_FLAG(F_CF); - break; + name = "JB\t"; + cond = ACCESS_FLAG(F_CF); + break; case 0x83: - name = "JNB\t"; - cond = !ACCESS_FLAG(F_CF); - break; + name = "JNB\t"; + cond = !ACCESS_FLAG(F_CF); + break; case 0x84: - name = "JZ\t"; - cond = ACCESS_FLAG(F_ZF); - break; + name = "JZ\t"; + cond = ACCESS_FLAG(F_ZF); + break; case 0x85: - name = "JNZ\t"; - cond = !ACCESS_FLAG(F_ZF); - break; + name = "JNZ\t"; + cond = !ACCESS_FLAG(F_ZF); + break; case 0x86: - name = "JBE\t"; - cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF); - break; + name = "JBE\t"; + cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF); + break; case 0x87: - name = "JNBE\t"; - cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); - break; + name = "JNBE\t"; + cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); + break; case 0x88: - name = "JS\t"; - cond = ACCESS_FLAG(F_SF); - break; + name = "JS\t"; + cond = ACCESS_FLAG(F_SF); + break; case 0x89: - name = "JNS\t"; - cond = !ACCESS_FLAG(F_SF); - break; + name = "JNS\t"; + cond = !ACCESS_FLAG(F_SF); + break; case 0x8a: - name = "JP\t"; - cond = ACCESS_FLAG(F_PF); - break; + name = "JP\t"; + cond = ACCESS_FLAG(F_PF); + break; case 0x8b: - name = "JNP\t"; - cond = !ACCESS_FLAG(F_PF); - break; + name = "JNP\t"; + cond = !ACCESS_FLAG(F_PF); + break; case 0x8c: - name = "JL\t"; - cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; + name = "JL\t"; + cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); + break; case 0x8d: - name = "JNL\t"; - cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; + name = "JNL\t"; + cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); + break; case 0x8e: - name = "JLE\t"; - cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; + name = "JLE\t"; + cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || + ACCESS_FLAG(F_ZF)); + break; case 0x8f: - name = "JNLE\t"; - cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; + name = "JNLE\t"; + cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || + ACCESS_FLAG(F_ZF)); + break; } DECODE_PRINTF(name); target = (s16) fetch_word_imm(); @@ -149,7 +149,7 @@ DECODE_PRINTF2("%04x\n", target); TRACE_AND_STEP(); if (cond) - M.x86.R_IP = (u16)target; + M.x86.R_IP = (u16)target; DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); } @@ -169,95 +169,95 @@ START_OF_INSTR(); switch (op2) { case 0x90: - name = "SETO\t"; - cond = ACCESS_FLAG(F_OF); - break; + name = "SETO\t"; + cond = ACCESS_FLAG(F_OF); + break; case 0x91: - name = "SETNO\t"; - cond = !ACCESS_FLAG(F_OF); - break; + name = "SETNO\t"; + cond = !ACCESS_FLAG(F_OF); + break; case 0x92: - name = "SETB\t"; - cond = ACCESS_FLAG(F_CF); - break; + name = "SETB\t"; + cond = ACCESS_FLAG(F_CF); + break; case 0x93: - name = "SETNB\t"; - cond = !ACCESS_FLAG(F_CF); - break; + name = "SETNB\t"; + cond = !ACCESS_FLAG(F_CF); + break; case 0x94: - name = "SETZ\t"; - cond = ACCESS_FLAG(F_ZF); - break; + name = "SETZ\t"; + cond = ACCESS_FLAG(F_ZF); + break; case 0x95: - name = "SETNZ\t"; - cond = !ACCESS_FLAG(F_ZF); - break; + name = "SETNZ\t"; + cond = !ACCESS_FLAG(F_ZF); + break; case 0x96: - name = "SETBE\t"; - cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF); - break; + name = "SETBE\t"; + cond = ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF); + break; case 0x97: - name = "SETNBE\t"; - cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); - break; + name = "SETNBE\t"; + cond = !(ACCESS_FLAG(F_CF) || ACCESS_FLAG(F_ZF)); + break; case 0x98: - name = "SETS\t"; - cond = ACCESS_FLAG(F_SF); - break; + name = "SETS\t"; + cond = ACCESS_FLAG(F_SF); + break; case 0x99: - name = "SETNS\t"; - cond = !ACCESS_FLAG(F_SF); - break; + name = "SETNS\t"; + cond = !ACCESS_FLAG(F_SF); + break; case 0x9a: - name = "SETP\t"; - cond = ACCESS_FLAG(F_PF); - break; + name = "SETP\t"; + cond = ACCESS_FLAG(F_PF); + break; case 0x9b: - name = "SETNP\t"; - cond = !ACCESS_FLAG(F_PF); - break; + name = "SETNP\t"; + cond = !ACCESS_FLAG(F_PF); + break; case 0x9c: - name = "SETL\t"; - cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; + name = "SETL\t"; + cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); + break; case 0x9d: - name = "SETNL\t"; - cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); - break; + name = "SETNL\t"; + cond = xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)); + break; case 0x9e: - name = "SETLE\t"; - cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; + name = "SETLE\t"; + cond = (xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || + ACCESS_FLAG(F_ZF)); + break; case 0x9f: - name = "SETNLE\t"; - cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || - ACCESS_FLAG(F_ZF)); - break; + name = "SETNLE\t"; + cond = !(xorl(ACCESS_FLAG(F_SF), ACCESS_FLAG(F_OF)) || + ACCESS_FLAG(F_ZF)); + break; } DECODE_PRINTF(name); FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destoffset = decode_rm00_address(rl); - TRACE_AND_STEP(); - store_data_byte(destoffset, cond ? 0x01 : 0x00); - break; + destoffset = decode_rm00_address(rl); + TRACE_AND_STEP(); + store_data_byte(destoffset, cond ? 0x01 : 0x00); + break; case 1: - destoffset = decode_rm01_address(rl); - TRACE_AND_STEP(); - store_data_byte(destoffset, cond ? 0x01 : 0x00); - break; + destoffset = decode_rm01_address(rl); + TRACE_AND_STEP(); + store_data_byte(destoffset, cond ? 0x01 : 0x00); + break; case 2: - destoffset = decode_rm10_address(rl); - TRACE_AND_STEP(); - store_data_byte(destoffset, cond ? 0x01 : 0x00); - break; + destoffset = decode_rm10_address(rl); + TRACE_AND_STEP(); + store_data_byte(destoffset, cond ? 0x01 : 0x00); + break; case 3: /* register to register */ - destreg = DECODE_RM_BYTE_REGISTER(rl); - TRACE_AND_STEP(); - *destreg = cond ? 0x01 : 0x00; - break; + destreg = DECODE_RM_BYTE_REGISTER(rl); + TRACE_AND_STEP(); + *destreg = cond ? 0x01 : 0x00; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -306,107 +306,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval; + u32 *shiftreg; - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (s16)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } else { - u16 srcval; - u16 *shiftreg; + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + disp = (s16)*shiftreg >> 5; + srcval = fetch_data_long(srcoffset+disp); + CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); + } else { + u16 srcval; + u16 *shiftreg; - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (s16)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } - break; + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0xF; + disp = (s16)*shiftreg >> 4; + srcval = fetch_data_word(srcoffset+disp); + CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval; + u32 *shiftreg; - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (s16)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } else { - u16 srcval; - u16 *shiftreg; + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + disp = (s16)*shiftreg >> 5; + srcval = fetch_data_long(srcoffset+disp); + CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); + } else { + u16 srcval; + u16 *shiftreg; - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (s16)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } - break; + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0xF; + disp = (s16)*shiftreg >> 4; + srcval = fetch_data_word(srcoffset+disp); + CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval; + u32 *shiftreg; - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (s16)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } else { - u16 srcval; - u16 *shiftreg; + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + disp = (s16)*shiftreg >> 5; + srcval = fetch_data_long(srcoffset+disp); + CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); + } else { + u16 srcval; + u16 *shiftreg; - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (s16)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); - CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); - } - break; + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0xF; + disp = (s16)*shiftreg >> 4; + srcval = fetch_data_word(srcoffset+disp); + CONDITIONAL_SET_FLAG(srcval & (0x1 << bit),F_CF); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg,*shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *srcreg,*shiftreg; - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF); - } else { - u16 *srcreg,*shiftreg; + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF); + } else { + u16 *srcreg,*shiftreg; - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF); - } - break; + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0xF; + CONDITIONAL_SET_FLAG(*srcreg & (0x1 << bit),F_CF); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -427,123 +427,123 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shld_long(destval,*shiftreg,shift); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shld_word(destval,*shiftreg,shift); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shld_long(destval,*shiftreg,shift); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shld_word(destval,*shiftreg,shift); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shld_long(destval,*shiftreg,shift); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shld_word(destval,*shiftreg,shift); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*shiftreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - *destreg = shld_long(*destreg,*shiftreg,shift); - } else { - u16 *destreg,*shiftreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + *destreg = shld_long(*destreg,*shiftreg,shift); + } else { + u16 *destreg,*shiftreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - *destreg = shld_word(*destreg,*shiftreg,shift); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + *destreg = shld_word(*destreg,*shiftreg,shift); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -563,107 +563,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shld_long(destval,*shiftreg,M.x86.R_CL); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shld_word(destval,*shiftreg,M.x86.R_CL); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shld_long(destval,*shiftreg,M.x86.R_CL); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shld_word(destval,*shiftreg,M.x86.R_CL); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shld_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shld_long(destval,*shiftreg,M.x86.R_CL); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shld_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shld_word(destval,*shiftreg,M.x86.R_CL); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*shiftreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL); - } else { - u16 *destreg,*shiftreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + *destreg = shld_long(*destreg,*shiftreg,M.x86.R_CL); + } else { + u16 *destreg,*shiftreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + *destreg = shld_word(*destreg,*shiftreg,M.x86.R_CL); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -712,85 +712,85 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval,mask; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval,mask; + u32 *shiftreg; - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (s16)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval | mask); - } else { - u16 srcval,mask; - u16 *shiftreg; + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + disp = (s16)*shiftreg >> 5; + srcval = fetch_data_long(srcoffset+disp); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + store_data_long(srcoffset+disp, srcval | mask); + } else { + u16 srcval,mask; + u16 *shiftreg; - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (s16)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0xF; + disp = (s16)*shiftreg >> 4; + srcval = fetch_data_word(srcoffset+disp); mask = (u16)(0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_word(srcoffset+disp, srcval | mask); - } - break; + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + store_data_word(srcoffset+disp, srcval | mask); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval,mask; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval,mask; + u32 *shiftreg; - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (s16)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval | mask); - } else { - u16 srcval,mask; - u16 *shiftreg; + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + disp = (s16)*shiftreg >> 5; + srcval = fetch_data_long(srcoffset+disp); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + store_data_long(srcoffset+disp, srcval | mask); + } else { + u16 srcval,mask; + u16 *shiftreg; - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (s16)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0xF; + disp = (s16)*shiftreg >> 4; + srcval = fetch_data_word(srcoffset+disp); mask = (u16)(0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_word(srcoffset+disp, srcval | mask); - } - break; + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + store_data_word(srcoffset+disp, srcval | mask); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval,mask; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval,mask; + u32 *shiftreg; - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (s16)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval | mask); - } else { - u16 srcval,mask; - u16 *shiftreg; + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + disp = (s16)*shiftreg >> 5; + srcval = fetch_data_long(srcoffset+disp); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + store_data_long(srcoffset+disp, srcval | mask); + } else { + u16 srcval,mask; + u16 *shiftreg; srcoffset = decode_rm10_address(rl); DECODE_PRINTF(","); @@ -827,10 +827,10 @@ TRACE_AND_STEP(); bit = *shiftreg & 0xF; mask = (u16)(0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg |= mask; - } - break; + CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); + *srcreg |= mask; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -851,123 +851,123 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shrd_long(destval,*shiftreg,shift); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shrd_word(destval,*shiftreg,shift); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shrd_long(destval,*shiftreg,shift); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shrd_word(destval,*shiftreg,shift); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,shift); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shrd_long(destval,*shiftreg,shift); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,shift); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shrd_word(destval,*shiftreg,shift); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*shiftreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - *destreg = shrd_long(*destreg,*shiftreg,shift); - } else { - u16 *destreg,*shiftreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + *destreg = shrd_long(*destreg,*shiftreg,shift); + } else { + u16 *destreg,*shiftreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - DECODE_PRINTF2("%d\n", shift); - TRACE_AND_STEP(); - *destreg = shrd_word(*destreg,*shiftreg,shift); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + DECODE_PRINTF2("%d\n", shift); + TRACE_AND_STEP(); + *destreg = shrd_word(*destreg,*shiftreg,shift); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -987,107 +987,107 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shrd_long(destval,*shiftreg,M.x86.R_CL); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shrd_word(destval,*shiftreg,M.x86.R_CL); + store_data_word(destoffset, destval); + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shrd_long(destval,*shiftreg,M.x86.R_CL); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shrd_word(destval,*shiftreg,M.x86.R_CL); + store_data_word(destoffset, destval); + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 destval; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 destval; + u32 *shiftreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_long(destoffset); - destval = shrd_long(destval,*shiftreg,M.x86.R_CL); - store_data_long(destoffset, destval); - } else { - u16 destval; - u16 *shiftreg; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_long(destoffset); + destval = shrd_long(destval,*shiftreg,M.x86.R_CL); + store_data_long(destoffset, destval); + } else { + u16 destval; + u16 *shiftreg; - destoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - destval = fetch_data_word(destoffset); - destval = shrd_word(destval,*shiftreg,M.x86.R_CL); - store_data_word(destoffset, destval); - } - break; + destoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + destval = fetch_data_word(destoffset); + destval = shrd_word(destval,*shiftreg,M.x86.R_CL); + store_data_word(destoffset, destval); + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*shiftreg; - destreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL); - } else { - u16 *destreg,*shiftreg; + destreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + *destreg = shrd_long(*destreg,*shiftreg,M.x86.R_CL); + } else { + u16 *destreg,*shiftreg; - destreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(",CL\n"); - TRACE_AND_STEP(); - *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(",CL\n"); + TRACE_AND_STEP(); + *destreg = shrd_word(*destreg,*shiftreg,M.x86.R_CL); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1107,164 +1107,164 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; - u32 res_lo,res_hi; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; + u32 res_lo,res_hi; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_long(srcoffset); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg; - u16 srcval; - u32 res; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_long(srcoffset); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg; + u16 srcval; + u32 res; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - TRACE_AND_STEP(); - res = (s16)*destreg * (s16)srcval; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + TRACE_AND_STEP(); + res = (s16)*destreg * (s16)srcval; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; - u32 res_lo,res_hi; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; + u32 res_lo,res_hi; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_long(srcoffset); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg; - u16 srcval; - u32 res; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_long(srcoffset); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg; + u16 srcval; + u32 res; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - TRACE_AND_STEP(); - res = (s16)*destreg * (s16)srcval; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + TRACE_AND_STEP(); + res = (s16)*destreg * (s16)srcval; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; - u32 res_lo,res_hi; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; + u32 res_lo,res_hi; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_long(srcoffset); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg; - u16 srcval; - u32 res; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_long(srcoffset); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)srcval); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg; + u16 srcval; + u32 res; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - TRACE_AND_STEP(); - res = (s16)*destreg * (s16)srcval; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + TRACE_AND_STEP(); + res = (s16)*destreg * (s16)srcval; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg,*srcreg; - u32 res_lo,res_hi; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg,*srcreg; + u32 res_lo,res_hi; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_LONG_REGISTER(rl); - TRACE_AND_STEP(); - imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg); - if (res_hi != 0) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u32)res_lo; - } else { - u16 *destreg,*srcreg; - u32 res; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_LONG_REGISTER(rl); + TRACE_AND_STEP(); + imul_long_direct(&res_lo,&res_hi,(s32)*destreg,(s32)*srcreg); + if (res_hi != 0) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u32)res_lo; + } else { + u16 *destreg,*srcreg; + u32 res; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - res = (s16)*destreg * (s16)*srcreg; - if (res > 0xFFFF) { - SET_FLAG(F_CF); - SET_FLAG(F_OF); - } else { - CLEAR_FLAG(F_CF); - CLEAR_FLAG(F_OF); - } - *destreg = (u16)res; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + res = (s16)*destreg * (s16)*srcreg; + if (res > 0xFFFF) { + SET_FLAG(F_CF); + SET_FLAG(F_OF); + } else { + CLEAR_FLAG(F_CF); + CLEAR_FLAG(F_OF); + } + *destreg = (u16)res; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1285,35 +1285,35 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_SS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_SS = fetch_data_word(srcoffset + 2); + break; case 1: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_SS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_SS = fetch_data_word(srcoffset + 2); + break; case 2: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_SS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_SS = fetch_data_word(srcoffset + 2); + break; case 3: /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); + /* UNDEFINED! */ + TRACE_AND_STEP(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1473,35 +1473,35 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_FS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_FS = fetch_data_word(srcoffset + 2); + break; case 1: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_FS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_FS = fetch_data_word(srcoffset + 2); + break; case 2: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_FS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_FS = fetch_data_word(srcoffset + 2); + break; case 3: /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); + /* UNDEFINED! */ + TRACE_AND_STEP(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1522,35 +1522,35 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_GS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_GS = fetch_data_word(srcoffset + 2); + break; case 1: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_GS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_GS = fetch_data_word(srcoffset + 2); + break; case 2: - dstreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *dstreg = fetch_data_word(srcoffset); - M.x86.R_GS = fetch_data_word(srcoffset + 2); - break; + dstreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *dstreg = fetch_data_word(srcoffset); + M.x86.R_GS = fetch_data_word(srcoffset + 2); + break; case 3: /* register to register */ - /* UNDEFINED! */ - TRACE_AND_STEP(); + /* UNDEFINED! */ + TRACE_AND_STEP(); } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1570,103 +1570,103 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_byte(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_byte(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u8 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u8 *srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } else { - u16 *destreg; - u8 *srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + } else { + u16 *destreg; + u8 *srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1689,40 +1689,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 1: - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 2: - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = fetch_data_word(srcoffset); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = fetch_data_word(srcoffset); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 3: /* register to register */ - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = *srcreg; - break; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = *srcreg; + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1742,237 +1742,237 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (rh) { case 3: - DECODE_PRINTF("BT\t"); - break; + DECODE_PRINTF("BT\t"); + break; case 4: - DECODE_PRINTF("BTS\t"); - break; + DECODE_PRINTF("BTS\t"); + break; case 5: - DECODE_PRINTF("BTR\t"); - break; + DECODE_PRINTF("BTR\t"); + break; case 6: - DECODE_PRINTF("BTC\t"); - break; + DECODE_PRINTF("BTC\t"); + break; default: - DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n"); - TRACE_REGS(); - printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n", - M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl); - HALT_SYS(); + DECODE_PRINTF("ILLEGAL EXTENDED X86 OPCODE\n"); + TRACE_REGS(); + printk("%04x:%04x: %02X%02X ILLEGAL EXTENDED X86 OPCODE EXTENSION!\n", + M.x86.R_CS, M.x86.R_IP-3,op2, (mod<<6)|(rh<<3)|rl); + HALT_SYS(); } switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval, mask; - u8 shift; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval, mask; + u8 shift; - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - TRACE_AND_STEP(); - bit = shift & 0x1F; - srcval = fetch_data_long(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 4: - store_data_long(srcoffset, srcval | mask); - break; - case 5: - store_data_long(srcoffset, srcval & ~mask); - break; - case 6: - store_data_long(srcoffset, srcval ^ mask); - break; - default: - break; - } - } else { - u16 srcval, mask; - u8 shift; + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + TRACE_AND_STEP(); + bit = shift & 0x1F; + srcval = fetch_data_long(srcoffset); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + switch (rh) { + case 4: + store_data_long(srcoffset, srcval | mask); + break; + case 5: + store_data_long(srcoffset, srcval & ~mask); + break; + case 6: + store_data_long(srcoffset, srcval ^ mask); + break; + default: + break; + } + } else { + u16 srcval, mask; + u8 shift; - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - TRACE_AND_STEP(); - bit = shift & 0xF; - srcval = fetch_data_word(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 4: - store_data_word(srcoffset, srcval | mask); - break; - case 5: - store_data_word(srcoffset, srcval & ~mask); - break; - case 6: - store_data_word(srcoffset, srcval ^ mask); - break; - default: - break; - } - } - break; + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + TRACE_AND_STEP(); + bit = shift & 0xF; + srcval = fetch_data_word(srcoffset); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + switch (rh) { + case 4: + store_data_word(srcoffset, srcval | mask); + break; + case 5: + store_data_word(srcoffset, srcval & ~mask); + break; + case 6: + store_data_word(srcoffset, srcval ^ mask); + break; + default: + break; + } + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval, mask; - u8 shift; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval, mask; + u8 shift; - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - TRACE_AND_STEP(); - bit = shift & 0x1F; - srcval = fetch_data_long(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 4: - store_data_long(srcoffset, srcval | mask); - break; - case 5: - store_data_long(srcoffset, srcval & ~mask); - break; - case 6: - store_data_long(srcoffset, srcval ^ mask); - break; - default: - break; - } - } else { - u16 srcval, mask; - u8 shift; + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + TRACE_AND_STEP(); + bit = shift & 0x1F; + srcval = fetch_data_long(srcoffset); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + switch (rh) { + case 4: + store_data_long(srcoffset, srcval | mask); + break; + case 5: + store_data_long(srcoffset, srcval & ~mask); + break; + case 6: + store_data_long(srcoffset, srcval ^ mask); + break; + default: + break; + } + } else { + u16 srcval, mask; + u8 shift; - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - TRACE_AND_STEP(); - bit = shift & 0xF; - srcval = fetch_data_word(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 4: - store_data_word(srcoffset, srcval | mask); - break; - case 5: - store_data_word(srcoffset, srcval & ~mask); - break; - case 6: - store_data_word(srcoffset, srcval ^ mask); - break; - default: - break; - } - } - break; + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + TRACE_AND_STEP(); + bit = shift & 0xF; + srcval = fetch_data_word(srcoffset); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + switch (rh) { + case 4: + store_data_word(srcoffset, srcval | mask); + break; + case 5: + store_data_word(srcoffset, srcval & ~mask); + break; + case 6: + store_data_word(srcoffset, srcval ^ mask); + break; + default: + break; + } + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval, mask; - u8 shift; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval, mask; + u8 shift; - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - TRACE_AND_STEP(); - bit = shift & 0x1F; - srcval = fetch_data_long(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 4: - store_data_long(srcoffset, srcval | mask); - break; - case 5: - store_data_long(srcoffset, srcval & ~mask); - break; - case 6: - store_data_long(srcoffset, srcval ^ mask); - break; - default: - break; - } - } else { - u16 srcval, mask; - u8 shift; + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + TRACE_AND_STEP(); + bit = shift & 0x1F; + srcval = fetch_data_long(srcoffset); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + switch (rh) { + case 4: + store_data_long(srcoffset, srcval | mask); + break; + case 5: + store_data_long(srcoffset, srcval & ~mask); + break; + case 6: + store_data_long(srcoffset, srcval ^ mask); + break; + default: + break; + } + } else { + u16 srcval, mask; + u8 shift; - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - TRACE_AND_STEP(); - bit = shift & 0xF; - srcval = fetch_data_word(srcoffset); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - switch (rh) { - case 4: - store_data_word(srcoffset, srcval | mask); - break; - case 5: - store_data_word(srcoffset, srcval & ~mask); - break; - case 6: - store_data_word(srcoffset, srcval ^ mask); - break; - default: - break; - } - } - break; + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + TRACE_AND_STEP(); + bit = shift & 0xF; + srcval = fetch_data_word(srcoffset); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + switch (rh) { + case 4: + store_data_word(srcoffset, srcval | mask); + break; + case 5: + store_data_word(srcoffset, srcval & ~mask); + break; + case 6: + store_data_word(srcoffset, srcval ^ mask); + break; + default: + break; + } + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *srcreg; - u32 mask; - u8 shift; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *srcreg; + u32 mask; + u8 shift; - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - TRACE_AND_STEP(); - bit = shift & 0x1F; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - switch (rh) { - case 4: - *srcreg |= mask; - break; - case 5: - *srcreg &= ~mask; - break; - case 6: - *srcreg ^= mask; - break; - default: - break; - } - } else { - u16 *srcreg; - u16 mask; - u8 shift; + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + TRACE_AND_STEP(); + bit = shift & 0x1F; + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); + switch (rh) { + case 4: + *srcreg |= mask; + break; + case 5: + *srcreg &= ~mask; + break; + case 6: + *srcreg ^= mask; + break; + default: + break; + } + } else { + u16 *srcreg; + u16 mask; + u8 shift; - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF(","); - shift = fetch_byte_imm(); - TRACE_AND_STEP(); - bit = shift & 0xF; - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - switch (rh) { - case 4: - *srcreg |= mask; - break; - case 5: - *srcreg &= ~mask; - break; - case 6: - *srcreg ^= mask; - break; - default: - break; - } - } - break; + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF(","); + shift = fetch_byte_imm(); + TRACE_AND_STEP(); + bit = shift & 0xF; + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); + switch (rh) { + case 4: + *srcreg |= mask; + break; + case 5: + *srcreg &= ~mask; + break; + case 6: + *srcreg ^= mask; + break; + default: + break; + } + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -1993,109 +1993,109 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval,mask; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval,mask; + u32 *shiftreg; - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (s16)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval ^ mask); - } else { - u16 srcval,mask; - u16 *shiftreg; + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + disp = (s16)*shiftreg >> 5; + srcval = fetch_data_long(srcoffset+disp); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + store_data_long(srcoffset+disp, srcval ^ mask); + } else { + u16 srcval,mask; + u16 *shiftreg; - srcoffset = decode_rm00_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (s16)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); + srcoffset = decode_rm00_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0xF; + disp = (s16)*shiftreg >> 4; + srcval = fetch_data_word(srcoffset+disp); mask = (u16)(0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); store_data_word(srcoffset+disp, (u16)(srcval ^ mask)); - } - break; + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval,mask; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval,mask; + u32 *shiftreg; - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (s16)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval ^ mask); - } else { - u16 srcval,mask; - u16 *shiftreg; + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + disp = (s16)*shiftreg >> 5; + srcval = fetch_data_long(srcoffset+disp); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + store_data_long(srcoffset+disp, srcval ^ mask); + } else { + u16 srcval,mask; + u16 *shiftreg; - srcoffset = decode_rm01_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (s16)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); + srcoffset = decode_rm01_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0xF; + disp = (s16)*shiftreg >> 4; + srcval = fetch_data_word(srcoffset+disp); mask = (u16)(0x1 << bit); CONDITIONAL_SET_FLAG(srcval & mask,F_CF); store_data_word(srcoffset+disp, (u16)(srcval ^ mask)); - } - break; + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 srcval,mask; - u32 *shiftreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 srcval,mask; + u32 *shiftreg; - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - disp = (s16)*shiftreg >> 5; - srcval = fetch_data_long(srcoffset+disp); - mask = (0x1 << bit); - CONDITIONAL_SET_FLAG(srcval & mask,F_CF); - store_data_long(srcoffset+disp, srcval ^ mask); - } else { - u16 srcval,mask; - u16 *shiftreg; + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + disp = (s16)*shiftreg >> 5; + srcval = fetch_data_long(srcoffset+disp); + mask = (0x1 << bit); + CONDITIONAL_SET_FLAG(srcval & mask,F_CF); + store_data_long(srcoffset+disp, srcval ^ mask); + } else { + u16 srcval,mask; + u16 *shiftreg; - srcoffset = decode_rm10_address(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_WORD_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0xF; - disp = (s16)*shiftreg >> 4; - srcval = fetch_data_word(srcoffset+disp); + srcoffset = decode_rm10_address(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_WORD_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0xF; + disp = (s16)*shiftreg >> 4; + srcval = fetch_data_word(srcoffset+disp); mask = (u16)(0x1 << bit); CONDITIONAL_SET_FLAG(srcval & mask,F_CF); store_data_word(srcoffset+disp, (u16)(srcval ^ mask)); - } - break; + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { + if (M.x86.mode & SYSMODE_PREFIX_DATA) { u32 *srcreg,*shiftreg; - u32 mask; + u32 mask; - srcreg = DECODE_RM_LONG_REGISTER(rl); - DECODE_PRINTF(","); - shiftreg = DECODE_RM_LONG_REGISTER(rh); - TRACE_AND_STEP(); - bit = *shiftreg & 0x1F; - mask = (0x1 << bit); + srcreg = DECODE_RM_LONG_REGISTER(rl); + DECODE_PRINTF(","); + shiftreg = DECODE_RM_LONG_REGISTER(rh); + TRACE_AND_STEP(); + bit = *shiftreg & 0x1F; + mask = (0x1 << bit); CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); *srcreg ^= mask; } else { @@ -2108,10 +2108,10 @@ TRACE_AND_STEP(); bit = *shiftreg & 0xF; mask = (u16)(0x1 << bit); - CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); - *srcreg ^= mask; - } - break; + CONDITIONAL_SET_FLAG(*srcreg & mask,F_CF); + *srcreg ^= mask; + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2363,103 +2363,103 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = (s32)((s8)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = (s32)((s8)fetch_data_byte(srcoffset)); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = (s16)((s8)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = (s16)((s8)fetch_data_byte(srcoffset)); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } + break; case 1: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = (s32)((s8)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = (s32)((s8)fetch_data_byte(srcoffset)); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = (s16)((s8)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = (s16)((s8)fetch_data_byte(srcoffset)); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } + break; case 2: - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u32 srcval; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u32 srcval; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = (s32)((s8)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } else { - u16 *destreg; - u16 srcval; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = (s32)((s8)fetch_data_byte(srcoffset)); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } else { + u16 *destreg; + u16 srcval; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = (s16)((s8)fetch_data_byte(srcoffset)); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = (s16)((s8)fetch_data_byte(srcoffset)); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + } + break; case 3: /* register to register */ - if (M.x86.mode & SYSMODE_PREFIX_DATA) { - u32 *destreg; - u8 *srcreg; + if (M.x86.mode & SYSMODE_PREFIX_DATA) { + u32 *destreg; + u8 *srcreg; - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = (s32)((s8)*srcreg); - } else { - u16 *destreg; - u8 *srcreg; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = (s32)((s8)*srcreg); + } else { + u16 *destreg; + u8 *srcreg; - destreg = DECODE_RM_WORD_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_BYTE_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = (s16)((s8)*srcreg); - } - break; + destreg = DECODE_RM_WORD_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_BYTE_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = (s16)((s8)*srcreg); + } + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); @@ -2482,40 +2482,40 @@ FETCH_DECODE_MODRM(mod, rh, rl); switch (mod) { case 0: - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm00_address(rl); - srcval = (s32)((s16)fetch_data_word(srcoffset)); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm00_address(rl); + srcval = (s32)((s16)fetch_data_word(srcoffset)); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 1: - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm01_address(rl); - srcval = (s32)((s16)fetch_data_word(srcoffset)); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm01_address(rl); + srcval = (s32)((s16)fetch_data_word(srcoffset)); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 2: - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcoffset = decode_rm10_address(rl); - srcval = (s32)((s16)fetch_data_word(srcoffset)); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = srcval; - break; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcoffset = decode_rm10_address(rl); + srcval = (s32)((s16)fetch_data_word(srcoffset)); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = srcval; + break; case 3: /* register to register */ - destreg = DECODE_RM_LONG_REGISTER(rh); - DECODE_PRINTF(","); - srcreg = DECODE_RM_WORD_REGISTER(rl); - DECODE_PRINTF("\n"); - TRACE_AND_STEP(); - *destreg = (s32)((s16)*srcreg); - break; + destreg = DECODE_RM_LONG_REGISTER(rh); + DECODE_PRINTF(","); + srcreg = DECODE_RM_WORD_REGISTER(rl); + DECODE_PRINTF("\n"); + TRACE_AND_STEP(); + *destreg = (s32)((s16)*srcreg); + break; } DECODE_CLEAR_SEGOVR(); END_OF_INSTR(); diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c b/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c index ba4ffde..72b1bf2 100644 --- a/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c +++ b/board/MAI/bios_emulator/scitech/src/x86emu/prim_ops.c @@ -843,9 +843,9 @@ /* s is the rotate distance. It varies from 0 - 8. */ /* have - CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 + CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 - want to rotate through the carry by "s" bits. We could + want to rotate through the carry by "s" bits. We could loop, but that's inefficient. So the width is 9, and we split into three parts: @@ -855,12 +855,12 @@ The new rotate is done mod 9, and given this, for a rotation of n bits (mod 9) the new carry flag is - then located n bits from the MSB. The low part is + then located n bits from the MSB. The low part is then shifted up cnt bits, and the high part is or'd - in. Using CAPS for new values, and lowercase for the + in. Using CAPS for new values, and lowercase for the original values, this can be expressed as: - IF n > 0 + IF n > 0 1) CF <- b_(8-n) 2) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 3) B_(n-1) <- cf @@ -868,37 +868,37 @@ */ res = d; if ((cnt = s % 9) != 0) { - /* extract the new CARRY FLAG. */ - /* CF <- b_(8-n) */ - cf = (d >> (8 - cnt)) & 0x1; + /* extract the new CARRY FLAG. */ + /* CF <- b_(8-n) */ + cf = (d >> (8 - cnt)) & 0x1; - /* get the low stuff which rotated - into the range B_7 .. B_cnt */ - /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 */ - /* note that the right hand side done by the mask */ + /* get the low stuff which rotated + into the range B_7 .. B_cnt */ + /* B_(7) .. B_(n) <- b_(8-(n+1)) .. b_0 */ + /* note that the right hand side done by the mask */ res = (d << cnt) & 0xff; - /* now the high stuff which rotated around - into the positions B_cnt-2 .. B_0 */ - /* B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) */ - /* shift it downward, 7-(n-2) = 9-n positions. - and mask off the result before or'ing in. - */ - mask = (1 << (cnt - 1)) - 1; - res |= (d >> (9 - cnt)) & mask; + /* now the high stuff which rotated around + into the positions B_cnt-2 .. B_0 */ + /* B_(n-2) .. B_0 <- b_7 .. b_(8-(n-1)) */ + /* shift it downward, 7-(n-2) = 9-n positions. + and mask off the result before or'ing in. + */ + mask = (1 << (cnt - 1)) - 1; + res |= (d >> (9 - cnt)) & mask; - /* if the carry flag was set, or it in. */ + /* if the carry flag was set, or it in. */ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - /* B_(n-1) <- cf */ - res |= 1 << (cnt - 1); - } - /* set the new carry flag, based on the variable "cf" */ + /* B_(n-1) <- cf */ + res |= 1 << (cnt - 1); + } + /* set the new carry flag, based on the variable "cf" */ CONDITIONAL_SET_FLAG(cf, F_CF); - /* OVERFLOW is set *IFF* cnt==1, then it is the - xor of CF and the most significant bit. Blecck. */ - /* parenthesized this expression since it appears to - be causing OF to be misset */ - CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)), + /* OVERFLOW is set *IFF* cnt==1, then it is the + xor of CF and the most significant bit. Blecck. */ + /* parenthesized this expression since it appears to + be causing OF to be misset */ + CONDITIONAL_SET_FLAG(cnt == 1 && XOR2(cf + ((res >> 6) & 0x2)), F_OF); } @@ -963,22 +963,22 @@ u32 mask, cf, ocf = 0; /* rotate right through carry */ - /* + /* s is the rotate distance. It varies from 0 - 8. - d is the byte object rotated. + d is the byte object rotated. - have + have - CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 + CF B_7 B_6 B_5 B_4 B_3 B_2 B_1 B_0 The new rotate is done mod 9, and given this, for a rotation of n bits (mod 9) the new carry flag is - then located n bits from the LSB. The low part is + then located n bits from the LSB. The low part is then shifted up cnt bits, and the high part is or'd - in. Using CAPS for new values, and lowercase for the + in. Using CAPS for new values, and lowercase for the original values, this can be expressed as: - IF n > 0 + IF n > 0 1) CF <- b_(n-1) 2) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) 3) B_(8-n) <- cf @@ -986,49 +986,49 @@ */ res = d; if ((cnt = s % 9) != 0) { - /* extract the new CARRY FLAG. */ - /* CF <- b_(n-1) */ - if (cnt == 1) { - cf = d & 0x1; - /* note hackery here. Access_flag(..) evaluates to either - 0 if flag not set - non-zero if flag is set. - doing access_flag(..) != 0 casts that into either + /* extract the new CARRY FLAG. */ + /* CF <- b_(n-1) */ + if (cnt == 1) { + cf = d & 0x1; + /* note hackery here. Access_flag(..) evaluates to either + 0 if flag not set + non-zero if flag is set. + doing access_flag(..) != 0 casts that into either 0..1 in any representation of the flags register - (i.e. packed bit array or unpacked.) - */ + (i.e. packed bit array or unpacked.) + */ ocf = ACCESS_FLAG(F_CF) != 0; - } else - cf = (d >> (cnt - 1)) & 0x1; + } else + cf = (d >> (cnt - 1)) & 0x1; - /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_n */ - /* note that the right hand side done by the mask - This is effectively done by shifting the - object to the right. The result must be masked, - in case the object came in and was treated - as a negative number. Needed??? */ + /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_n */ + /* note that the right hand side done by the mask + This is effectively done by shifting the + object to the right. The result must be masked, + in case the object came in and was treated + as a negative number. Needed??? */ - mask = (1 << (8 - cnt)) - 1; - res = (d >> cnt) & mask; + mask = (1 << (8 - cnt)) - 1; + res = (d >> cnt) & mask; - /* now the high stuff which rotated around - into the positions B_cnt-2 .. B_0 */ - /* B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) */ - /* shift it downward, 7-(n-2) = 9-n positions. - and mask off the result before or'ing in. - */ - res |= (d << (9 - cnt)); + /* now the high stuff which rotated around + into the positions B_cnt-2 .. B_0 */ + /* B_(7) .. B_(8-(n-1)) <- b_(n-2) .. b_(0) */ + /* shift it downward, 7-(n-2) = 9-n positions. + and mask off the result before or'ing in. + */ + res |= (d << (9 - cnt)); - /* if the carry flag was set, or it in. */ + /* if the carry flag was set, or it in. */ if (ACCESS_FLAG(F_CF)) { /* carry flag is set */ - /* B_(8-n) <- cf */ - res |= 1 << (8 - cnt); - } - /* set the new carry flag, based on the variable "cf" */ + /* B_(8-n) <- cf */ + res |= 1 << (8 - cnt); + } + /* set the new carry flag, based on the variable "cf" */ CONDITIONAL_SET_FLAG(cf, F_CF); - /* OVERFLOW is set *IFF* cnt==1, then it is the - xor of CF and the most significant bit. Blecck. */ - /* parenthesized... */ + /* OVERFLOW is set *IFF* cnt==1, then it is the + xor of CF and the most significant bit. Blecck. */ + /* parenthesized... */ if (cnt == 1) { CONDITIONAL_SET_FLAG(XOR2(ocf + ((d >> 6) & 0x2)), F_OF); @@ -1111,18 +1111,18 @@ register unsigned int res, cnt, mask; /* rotate left */ - /* + /* s is the rotate distance. It varies from 0 - 8. - d is the byte object rotated. + d is the byte object rotated. - have + have - CF B_7 ... B_0 + CF B_7 ... B_0 The new rotate is done mod 8. Much simpler than the "rcl" or "rcr" operations. - IF n > 0 + IF n > 0 1) B_(7) .. B_(n) <- b_(8-(n+1)) .. b_(0) 2) B_(n-1) .. B_(0) <- b_(7) .. b_(8-n) */ @@ -1210,34 +1210,34 @@ register unsigned int res, cnt, mask; /* rotate right */ - /* + /* s is the rotate distance. It varies from 0 - 8. - d is the byte object rotated. + d is the byte object rotated. - have + have - B_7 ... B_0 + B_7 ... B_0 The rotate is done mod 8. - IF n > 0 + IF n > 0 1) B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) 2) B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */ res = d; if ((cnt = s % 8) != 0) { /* not a typo, do nada if cnt==0 */ - /* B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */ - res = (d << (8 - cnt)); + /* B_(7) .. B_(8-n) <- b_(n-1) .. b_(0) */ + res = (d << (8 - cnt)); - /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) */ - mask = (1 << (8 - cnt)) - 1; - res |= (d >> (cnt)) & mask; + /* B_(8-(n+1)) .. B_(0) <- b_(7) .. b_(n) */ + mask = (1 << (8 - cnt)) - 1; + res |= (d >> (cnt)) & mask; - /* set the new carry flag, Note that it is the low order - bit of the result!!! */ + /* set the new carry flag, Note that it is the low order + bit of the result!!! */ CONDITIONAL_SET_FLAG(res & 0x80, F_CF); /* OVERFLOW is set *IFF* s==1, then it is the - xor of the two most significant bits. Blecck. */ + xor of the two most significant bits. Blecck. */ CONDITIONAL_SET_FLAG(s == 1 && XOR2(res >> 6), F_OF); } else if (s != 0) { /* set the new carry flag, Note that it is the low order @@ -1363,9 +1363,9 @@ (((res & 0x8000) == 0x8000) ^ (ACCESS_FLAG(F_CF) != 0)), F_OF); - } else { + } else { CLEAR_FLAG(F_OF); - } + } } else { res = 0; CONDITIONAL_SET_FLAG((d << (s-1)) & 0x8000, F_CF); @@ -1474,9 +1474,9 @@ if (cnt == 1) { CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF); - } else { + } else { CLEAR_FLAG(F_OF); - } + } } else { res = 0; CLEAR_FLAG(F_CF); @@ -1505,16 +1505,16 @@ CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); - } else { - res = d; - } - if (cnt == 1) { + } else { + res = d; + } + if (cnt == 1) { CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF); - } else { + } else { CLEAR_FLAG(F_OF); - } + } } else { - res = 0; + res = 0; CLEAR_FLAG(F_CF); CLEAR_FLAG(F_OF); SET_FLAG(F_ZF); @@ -1547,8 +1547,8 @@ CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); CONDITIONAL_SET_FLAG(res & 0x80, F_SF); } else if (cnt >= 8) { - if (sf) { - res = 0xff; + if (sf) { + res = 0xff; SET_FLAG(F_CF); CLEAR_FLAG(F_ZF); SET_FLAG(F_SF); @@ -1576,30 +1576,30 @@ cnt = s % 16; res = d; if (cnt > 0 && cnt < 16) { - mask = (1 << (16 - cnt)) - 1; - cf = d & (1 << (cnt - 1)); - res = (d >> cnt) & mask; + mask = (1 << (16 - cnt)) - 1; + cf = d & (1 << (cnt - 1)); + res = (d >> cnt) & mask; CONDITIONAL_SET_FLAG(cf, F_CF); - if (sf) { - res |= ~mask; - } + if (sf) { + res |= ~mask; + } CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); } else if (cnt >= 16) { - if (sf) { - res = 0xffff; + if (sf) { + res = 0xffff; SET_FLAG(F_CF); CLEAR_FLAG(F_ZF); SET_FLAG(F_SF); SET_FLAG(F_PF); - } else { - res = 0; + } else { + res = 0; CLEAR_FLAG(F_CF); SET_FLAG(F_ZF); CLEAR_FLAG(F_SF); CLEAR_FLAG(F_PF); - } + } } return (u16)res; } @@ -1616,19 +1616,19 @@ cnt = s % 32; res = d; if (cnt > 0 && cnt < 32) { - mask = (1 << (32 - cnt)) - 1; + mask = (1 << (32 - cnt)) - 1; cf = d & (1 << (cnt - 1)); - res = (d >> cnt) & mask; + res = (d >> cnt) & mask; CONDITIONAL_SET_FLAG(cf, F_CF); - if (sf) { - res |= ~mask; - } + if (sf) { + res |= ~mask; + } CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); } else if (cnt >= 32) { - if (sf) { - res = 0xffffffff; + if (sf) { + res = 0xffffffff; SET_FLAG(F_CF); CLEAR_FLAG(F_ZF); SET_FLAG(F_SF); @@ -1741,9 +1741,9 @@ if (cnt == 1) { CONDITIONAL_SET_FLAG(XOR2(res >> 14), F_OF); - } else { + } else { CLEAR_FLAG(F_OF); - } + } } else { res = 0; CLEAR_FLAG(F_CF); @@ -1777,9 +1777,9 @@ } if (cnt == 1) { CONDITIONAL_SET_FLAG(XOR2(res >> 30), F_OF); - } else { + } else { CLEAR_FLAG(F_OF); - } + } } else { res = 0; CLEAR_FLAG(F_CF); @@ -1826,9 +1826,9 @@ register u32 bc; if (ACCESS_FLAG(F_CF)) - res = d - s - 1; + res = d - s - 1; else - res = d - s; + res = d - s; CONDITIONAL_SET_FLAG(res & 0x8000, F_SF); CONDITIONAL_SET_FLAG((res & 0xffff) == 0, F_ZF); CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); @@ -1851,9 +1851,9 @@ register u32 bc; if (ACCESS_FLAG(F_CF)) - res = d - s - 1; + res = d - s - 1; else - res = d - s; + res = d - s; CONDITIONAL_SET_FLAG(res & 0x80000000, F_SF); CONDITIONAL_SET_FLAG((res & 0xffffffff) == 0, F_ZF); CONDITIONAL_SET_FLAG(PARITY(res & 0xff), F_PF); @@ -2219,7 +2219,7 @@ dvd = (s16)M.x86.R_AX; if (s == 0) { x86emu_intr_raise(0); - return; + return; } div = dvd / (s8)s; mod = dvd % (s8)s; @@ -2297,7 +2297,7 @@ do { div <<= 1; carry = (l_dvd >= l_s) ? 0 : 1; - + if (abs_h_dvd < (h_s + carry)) { h_s >>= 1; l_s = abs_s << (--counter); @@ -2311,7 +2311,7 @@ div |= 1; continue; } - + } while (counter > -1); /* overflow */ if (abs_h_dvd || (l_dvd > abs_s)) { @@ -2344,13 +2344,13 @@ dvd = M.x86.R_AX; if (s == 0) { x86emu_intr_raise(0); - return; + return; } div = dvd / (u8)s; mod = dvd % (u8)s; if (abs(div) > 0xff) { x86emu_intr_raise(0); - return; + return; } M.x86.R_AL = (u8)div; M.x86.R_AH = (u8)mod; @@ -2367,7 +2367,7 @@ dvd = (((u32)M.x86.R_DX) << 16) | M.x86.R_AX; if (s == 0) { x86emu_intr_raise(0); - return; + return; } div = dvd / (u16)s; mod = dvd % (u16)s; @@ -2413,7 +2413,7 @@ u32 l_s = 0; int counter = 32; int carry; - + if (s == 0) { x86emu_intr_raise(0); return; @@ -2421,7 +2421,7 @@ do { div <<= 1; carry = (l_dvd >= l_s) ? 0 : 1; - + if (h_dvd < (h_s + carry)) { h_s >>= 1; l_s = s << (--counter); @@ -2435,7 +2435,7 @@ div |= 1; continue; } - + } while (counter > -1); /* overflow */ if (h_dvd || (l_dvd > s)) { @@ -2468,54 +2468,54 @@ inc = -size; } if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* in until CX is ZERO. */ + /* dont care whether REPE or REPNE */ + /* in until CX is ZERO. */ u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ? M.x86.R_ECX : M.x86.R_CX); - switch (size) { - case 1: - while (count--) { + switch (size) { + case 1: + while (count--) { store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, (*sys_inb)(M.x86.R_DX)); M.x86.R_DI += inc; - } - break; + } + break; - case 2: - while (count--) { + case 2: + while (count--) { store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (*sys_inw)(M.x86.R_DX)); M.x86.R_DI += inc; - } - break; - case 4: - while (count--) { + } + break; + case 4: + while (count--) { store_data_long_abs(M.x86.R_ES, M.x86.R_DI, (*sys_inl)(M.x86.R_DX)); M.x86.R_DI += inc; - break; - } - } + break; + } + } M.x86.R_CX = 0; if (M.x86.mode & SYSMODE_PREFIX_DATA) { M.x86.R_ECX = 0; - } + } M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); } else { - switch (size) { - case 1: + switch (size) { + case 1: store_data_byte_abs(M.x86.R_ES, M.x86.R_DI, (*sys_inb)(M.x86.R_DX)); - break; - case 2: + break; + case 2: store_data_word_abs(M.x86.R_ES, M.x86.R_DI, (*sys_inw)(M.x86.R_DX)); - break; - case 4: + break; + case 4: store_data_long_abs(M.x86.R_ES, M.x86.R_DI, (*sys_inl)(M.x86.R_DX)); - break; - } + break; + } M.x86.R_DI += inc; } } @@ -2529,57 +2529,57 @@ int inc = size; if (ACCESS_FLAG(F_DF)) { - inc = -size; + inc = -size; } if (M.x86.mode & (SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE)) { - /* dont care whether REPE or REPNE */ - /* out until CX is ZERO. */ + /* dont care whether REPE or REPNE */ + /* out until CX is ZERO. */ u32 count = ((M.x86.mode & SYSMODE_PREFIX_DATA) ? M.x86.R_ECX : M.x86.R_CX); - switch (size) { - case 1: - while (count--) { + switch (size) { + case 1: + while (count--) { (*sys_outb)(M.x86.R_DX, fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI)); M.x86.R_SI += inc; - } - break; + } + break; - case 2: - while (count--) { + case 2: + while (count--) { (*sys_outw)(M.x86.R_DX, fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI)); M.x86.R_SI += inc; - } - break; - case 4: - while (count--) { + } + break; + case 4: + while (count--) { (*sys_outl)(M.x86.R_DX, fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI)); M.x86.R_SI += inc; - break; - } - } + break; + } + } M.x86.R_CX = 0; if (M.x86.mode & SYSMODE_PREFIX_DATA) { M.x86.R_ECX = 0; - } + } M.x86.mode &= ~(SYSMODE_PREFIX_REPE | SYSMODE_PREFIX_REPNE); } else { - switch (size) { - case 1: + switch (size) { + case 1: (*sys_outb)(M.x86.R_DX, fetch_data_byte_abs(M.x86.R_ES, M.x86.R_SI)); - break; - case 2: + break; + case 2: (*sys_outw)(M.x86.R_DX, fetch_data_word_abs(M.x86.R_ES, M.x86.R_SI)); - break; - case 4: + break; + case 4: (*sys_outl)(M.x86.R_DX, fetch_data_long_abs(M.x86.R_ES, M.x86.R_SI)); - break; - } + break; + } M.x86.R_SI += inc; } } diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/sys.c b/board/MAI/bios_emulator/scitech/src/x86emu/sys.c index d54ca79..afe58f8 100644 --- a/board/MAI/bios_emulator/scitech/src/x86emu/sys.c +++ b/board/MAI/bios_emulator/scitech/src/x86emu/sys.c @@ -129,7 +129,7 @@ } /* - * Elemental unaligned stores + * Elemental unaligned stores */ static __inline__ void stq_u(unsigned long r5, unsigned long * r11) @@ -268,7 +268,7 @@ Byte value read from emulator memory. REMARKS: -Reads a byte value from the emulator memory. +Reads a byte value from the emulator memory. ****************************************************************************/ u8 X86API rdb( u32 addr) @@ -330,7 +330,7 @@ RETURNS: Long value read from emulator memory. REMARKS: -Reads a long value from the emulator memory. +Reads a long value from the emulator memory. ****************************************************************************/ u32 X86API rdl( u32 addr) @@ -423,7 +423,7 @@ val - Value to store REMARKS: -Writes a long value to emulator memory. +Writes a long value to emulator memory. ****************************************************************************/ void X86API wrl( u32 addr, @@ -623,7 +623,7 @@ X86EMU_intrFuncs funcs[]) { int i; - + for (i=0; i < 256; i++) _X86EMU_intrTab[i] = NULL; if (funcs) { diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/validate.c b/board/MAI/bios_emulator/scitech/src/x86emu/validate.c index 239f6c1..c951301 100644 --- a/board/MAI/bios_emulator/scitech/src/x86emu/validate.c +++ b/board/MAI/bios_emulator/scitech/src/x86emu/validate.c @@ -63,63 +63,63 @@ int f,failed = false; \ char buf1[80],buf2[80]; \ for (d = 0; d < dmax; d += dincr) { \ - for (s = 0; s < smax; s += sincr) { \ - M.x86.R_EFLG = inflags = flags = def_flags; \ - for (f = 0; f < 2; f++) { + for (s = 0; s < smax; s += sincr) { \ + M.x86.R_EFLG = inflags = flags = def_flags; \ + for (f = 0; f < 2; f++) { #define VAL_TEST_BINARY(name) \ - r_asm = name##_asm(&flags,d,s); \ - r = name(d,s); \ - if (r != r_asm || M.x86.R_EFLG != flags) \ - failed = true; \ - if (failed || trace) { + r_asm = name##_asm(&flags,d,s); \ + r = name(d,s); \ + if (r != r_asm || M.x86.R_EFLG != flags) \ + failed = true; \ + if (failed || trace) { #define VAL_TEST_BINARY_VOID(name) \ - name##_asm(&flags,d,s); \ - name(d,s); \ - r = r_asm = 0; \ - if (M.x86.R_EFLG != flags) \ - failed = true; \ - if (failed || trace) { + name##_asm(&flags,d,s); \ + name(d,s); \ + r = r_asm = 0; \ + if (M.x86.R_EFLG != flags) \ + failed = true; \ + if (failed || trace) { #define VAL_FAIL_BYTE_BYTE_BINARY(name) \ - if (failed) \ - printk("fail\n"); \ - printk("0x%02X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \ - r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%02X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \ - r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); + if (failed) \ + printk("fail\n"); \ + printk("0x%02X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \ + r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%02X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \ + r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); #define VAL_FAIL_WORD_WORD_BINARY(name) \ - if (failed) \ - printk("fail\n"); \ - printk("0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \ - r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \ - r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); + if (failed) \ + printk("fail\n"); \ + printk("0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \ + r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \ + r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); #define VAL_FAIL_LONG_LONG_BINARY(name) \ - if (failed) \ - printk("fail\n"); \ - printk("0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \ - r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \ - r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); + if (failed) \ + printk("fail\n"); \ + printk("0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \ + r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \ + r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); #define VAL_END_BINARY() \ - } \ - M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ + } \ + M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ if (!failed) \ - printk("passed\n"); \ + printk("passed\n"); \ } #define VAL_BYTE_BYTE_BINARY(name) \ @@ -194,51 +194,51 @@ int f,failed = false; \ char buf1[80],buf2[80]; \ for (d = 0; d < dmax; d += dincr) { \ - for (s = 0; s < smax; s += sincr) { \ - for (shift = 0; shift < maxshift; shift += 1) { \ - M.x86.R_EFLG = inflags = flags = def_flags; \ - for (f = 0; f < 2; f++) { + for (s = 0; s < smax; s += sincr) { \ + for (shift = 0; shift < maxshift; shift += 1) { \ + M.x86.R_EFLG = inflags = flags = def_flags; \ + for (f = 0; f < 2; f++) { #define VAL_TEST_TERNARY(name) \ - r_asm = name##_asm(&flags,d,s,shift); \ - r = name(d,s,shift); \ - if (r != r_asm || M.x86.R_EFLG != flags) \ - failed = true; \ - if (failed || trace) { + r_asm = name##_asm(&flags,d,s,shift); \ + r = name(d,s,shift); \ + if (r != r_asm || M.x86.R_EFLG != flags) \ + failed = true; \ + if (failed || trace) { #define VAL_FAIL_WORD_WORD_TERNARY(name) \ - if (failed) \ - printk("fail\n"); \ - printk("0x%04X = %-15s(0x%04X,0x%04X,%d), flags = %s -> %s\n", \ - r, #name, d, s, shift, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%04X = %-15s(0x%04X,0x%04X,%d), flags = %s -> %s\n", \ - r_asm, #name"_asm", d, s, shift, print_flags(buf1,inflags), print_flags(buf2,flags)); + if (failed) \ + printk("fail\n"); \ + printk("0x%04X = %-15s(0x%04X,0x%04X,%d), flags = %s -> %s\n", \ + r, #name, d, s, shift, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%04X = %-15s(0x%04X,0x%04X,%d), flags = %s -> %s\n", \ + r_asm, #name"_asm", d, s, shift, print_flags(buf1,inflags), print_flags(buf2,flags)); #define VAL_FAIL_LONG_LONG_TERNARY(name) \ - if (failed) \ - printk("fail\n"); \ - printk("0x%08X = %-15s(0x%08X,0x%08X,%d), flags = %s -> %s\n", \ - r, #name, d, s, shift, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%08X = %-15s(0x%08X,0x%08X,%d), flags = %s -> %s\n", \ - r_asm, #name"_asm", d, s, shift, print_flags(buf1,inflags), print_flags(buf2,flags)); + if (failed) \ + printk("fail\n"); \ + printk("0x%08X = %-15s(0x%08X,0x%08X,%d), flags = %s -> %s\n", \ + r, #name, d, s, shift, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%08X = %-15s(0x%08X,0x%08X,%d), flags = %s -> %s\n", \ + r_asm, #name"_asm", d, s, shift, print_flags(buf1,inflags), print_flags(buf2,flags)); #define VAL_END_TERNARY() \ - } \ - M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ + } \ + M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ if (!failed) \ - printk("passed\n"); \ + printk("passed\n"); \ } #define VAL_WORD_ROTATE_DBL(name) \ @@ -262,47 +262,47 @@ int f,failed = false; \ char buf1[80],buf2[80]; \ for (d = 0; d < max; d += incr) { \ - M.x86.R_EFLG = inflags = flags = def_flags; \ - for (f = 0; f < 2; f++) { + M.x86.R_EFLG = inflags = flags = def_flags; \ + for (f = 0; f < 2; f++) { #define VAL_TEST_UNARY(name) \ - r_asm = name##_asm(&flags,d); \ - r = name(d); \ - if (r != r_asm || M.x86.R_EFLG != flags) { \ - failed = true; + r_asm = name##_asm(&flags,d); \ + r = name(d); \ + if (r != r_asm || M.x86.R_EFLG != flags) { \ + failed = true; #define VAL_FAIL_BYTE_UNARY(name) \ - printk("fail\n"); \ - printk("0x%02X = %-15s(0x%02X), flags = %s -> %s\n", \ - r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%02X = %-15s(0x%02X), flags = %s -> %s\n", \ - r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags)); + printk("fail\n"); \ + printk("0x%02X = %-15s(0x%02X), flags = %s -> %s\n", \ + r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%02X = %-15s(0x%02X), flags = %s -> %s\n", \ + r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags)); #define VAL_FAIL_WORD_UNARY(name) \ - printk("fail\n"); \ - printk("0x%04X = %-15s(0x%04X), flags = %s -> %s\n", \ - r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%04X = %-15s(0x%04X), flags = %s -> %s\n", \ - r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags)); + printk("fail\n"); \ + printk("0x%04X = %-15s(0x%04X), flags = %s -> %s\n", \ + r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%04X = %-15s(0x%04X), flags = %s -> %s\n", \ + r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags)); #define VAL_FAIL_LONG_UNARY(name) \ - printk("fail\n"); \ - printk("0x%08X = %-15s(0x%08X), flags = %s -> %s\n", \ - r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%08X = %-15s(0x%08X), flags = %s -> %s\n", \ - r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags)); + printk("fail\n"); \ + printk("0x%08X = %-15s(0x%08X), flags = %s -> %s\n", \ + r, #name, d, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%08X = %-15s(0x%08X), flags = %s -> %s\n", \ + r_asm, #name"_asm", d, print_flags(buf1,inflags), print_flags(buf2,flags)); #define VAL_END_UNARY() \ - } \ - M.x86.R_EFLG = inflags = flags = def_flags | ALL_FLAGS; \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ + } \ + M.x86.R_EFLG = inflags = flags = def_flags | ALL_FLAGS; \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ if (!failed) \ - printk("passed\n"); \ + printk("passed\n"); \ } #define VAL_BYTE_UNARY(name) \ @@ -342,35 +342,35 @@ int f,failed = false; \ char buf1[80],buf2[80]; \ for (d = 0; d < 0xFF; d += 1) { \ - for (s = 0; s < 0xFF; s += 1) { \ - M.x86.R_EFLG = inflags = flags = def_flags; \ - for (f = 0; f < 2; f++) { \ - name##_asm(&flags,&r_asm,d,s); \ - M.x86.R_AL = d; \ - name(s); \ - r = M.x86.R_AX; \ - if (r != r_asm || M.x86.R_EFLG != flags) \ - failed = true; \ - if (failed || trace) { \ - if (failed) \ - printk("fail\n"); \ - printk("0x%04X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \ - r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%04X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \ - r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ - } \ - M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ + for (s = 0; s < 0xFF; s += 1) { \ + M.x86.R_EFLG = inflags = flags = def_flags; \ + for (f = 0; f < 2; f++) { \ + name##_asm(&flags,&r_asm,d,s); \ + M.x86.R_AL = d; \ + name(s); \ + r = M.x86.R_AX; \ + if (r != r_asm || M.x86.R_EFLG != flags) \ + failed = true; \ + if (failed || trace) { \ + if (failed) \ + printk("fail\n"); \ + printk("0x%04X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \ + r, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%04X = %-15s(0x%02X,0x%02X), flags = %s -> %s\n", \ + r_asm, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ + } \ + M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ if (!failed) \ - printk("passed\n"); \ + printk("passed\n"); \ } #define VAL_WORD_MUL(name) \ @@ -383,36 +383,36 @@ int f,failed = false; \ char buf1[80],buf2[80]; \ for (d = 0; d < 0xFF00; d += 0x100) { \ - for (s = 0; s < 0xFF00; s += 0x100) { \ - M.x86.R_EFLG = inflags = flags = def_flags; \ - for (f = 0; f < 2; f++) { \ - name##_asm(&flags,&r_asm_lo,&r_asm_hi,d,s); \ - M.x86.R_AX = d; \ - name(s); \ - r_lo = M.x86.R_AX; \ - r_hi = M.x86.R_DX; \ - if (r_lo != r_asm_lo || r_hi != r_asm_hi || M.x86.R_EFLG != flags)\ - failed = true; \ - if (failed || trace) { \ - if (failed) \ - printk("fail\n"); \ - printk("0x%04X:0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \ - r_hi,r_lo, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%04X:0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \ - r_asm_hi,r_asm_lo, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ - } \ - M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ + for (s = 0; s < 0xFF00; s += 0x100) { \ + M.x86.R_EFLG = inflags = flags = def_flags; \ + for (f = 0; f < 2; f++) { \ + name##_asm(&flags,&r_asm_lo,&r_asm_hi,d,s); \ + M.x86.R_AX = d; \ + name(s); \ + r_lo = M.x86.R_AX; \ + r_hi = M.x86.R_DX; \ + if (r_lo != r_asm_lo || r_hi != r_asm_hi || M.x86.R_EFLG != flags)\ + failed = true; \ + if (failed || trace) { \ + if (failed) \ + printk("fail\n"); \ + printk("0x%04X:0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \ + r_hi,r_lo, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%04X:0x%04X = %-15s(0x%04X,0x%04X), flags = %s -> %s\n", \ + r_asm_hi,r_asm_lo, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ + } \ + M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ if (!failed) \ - printk("passed\n"); \ + printk("passed\n"); \ } #define VAL_LONG_MUL(name) \ @@ -425,36 +425,36 @@ int f,failed = false; \ char buf1[80],buf2[80]; \ for (d = 0; d < 0xFF000000; d += 0x1000000) { \ - for (s = 0; s < 0xFF000000; s += 0x1000000) { \ - M.x86.R_EFLG = inflags = flags = def_flags; \ - for (f = 0; f < 2; f++) { \ - name##_asm(&flags,&r_asm_lo,&r_asm_hi,d,s); \ - M.x86.R_EAX = d; \ - name(s); \ - r_lo = M.x86.R_EAX; \ - r_hi = M.x86.R_EDX; \ - if (r_lo != r_asm_lo || r_hi != r_asm_hi || M.x86.R_EFLG != flags)\ - failed = true; \ - if (failed || trace) { \ - if (failed) \ - printk("fail\n"); \ - printk("0x%08X:0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \ - r_hi,r_lo, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%08X:0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \ - r_asm_hi,r_asm_lo, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ - } \ - M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ + for (s = 0; s < 0xFF000000; s += 0x1000000) { \ + M.x86.R_EFLG = inflags = flags = def_flags; \ + for (f = 0; f < 2; f++) { \ + name##_asm(&flags,&r_asm_lo,&r_asm_hi,d,s); \ + M.x86.R_EAX = d; \ + name(s); \ + r_lo = M.x86.R_EAX; \ + r_hi = M.x86.R_EDX; \ + if (r_lo != r_asm_lo || r_hi != r_asm_hi || M.x86.R_EFLG != flags)\ + failed = true; \ + if (failed || trace) { \ + if (failed) \ + printk("fail\n"); \ + printk("0x%08X:0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \ + r_hi,r_lo, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%08X:0x%08X = %-15s(0x%08X,0x%08X), flags = %s -> %s\n", \ + r_asm_hi,r_asm_lo, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ + } \ + M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ if (!failed) \ - printk("passed\n"); \ + printk("passed\n"); \ } #define VAL_BYTE_DIV(name) \ @@ -466,39 +466,39 @@ int f,failed = false; \ char buf1[80],buf2[80]; \ for (d = 0; d < 0xFF00; d += 0x100) { \ - for (s = 1; s < 0xFF; s += 1) { \ - M.x86.R_EFLG = inflags = flags = def_flags; \ - for (f = 0; f < 2; f++) { \ - M.x86.intr = 0; \ - M.x86.R_AX = d; \ - name(s); \ - r_quot = M.x86.R_AL; \ - r_rem = M.x86.R_AH; \ - if (M.x86.intr & INTR_SYNCH) \ - continue; \ - name##_asm(&flags,&r_asm_quot,&r_asm_rem,d,s); \ - if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \ - failed = true; \ - if (failed || trace) { \ - if (failed) \ - printk("fail\n"); \ - printk("0x%02X:0x%02X = %-15s(0x%04X,0x%02X), flags = %s -> %s\n", \ - r_quot, r_rem, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%02X:0x%02X = %-15s(0x%04X,0x%02X), flags = %s -> %s\n", \ - r_asm_quot, r_asm_rem, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ - } \ - M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ + for (s = 1; s < 0xFF; s += 1) { \ + M.x86.R_EFLG = inflags = flags = def_flags; \ + for (f = 0; f < 2; f++) { \ + M.x86.intr = 0; \ + M.x86.R_AX = d; \ + name(s); \ + r_quot = M.x86.R_AL; \ + r_rem = M.x86.R_AH; \ + if (M.x86.intr & INTR_SYNCH) \ + continue; \ + name##_asm(&flags,&r_asm_quot,&r_asm_rem,d,s); \ + if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \ + failed = true; \ + if (failed || trace) { \ + if (failed) \ + printk("fail\n"); \ + printk("0x%02X:0x%02X = %-15s(0x%04X,0x%02X), flags = %s -> %s\n", \ + r_quot, r_rem, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%02X:0x%02X = %-15s(0x%04X,0x%02X), flags = %s -> %s\n", \ + r_asm_quot, r_asm_rem, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ + } \ + M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ if (!failed) \ - printk("passed\n"); \ + printk("passed\n"); \ } #define VAL_WORD_DIV(name) \ @@ -510,40 +510,40 @@ int f,failed = false; \ char buf1[80],buf2[80]; \ for (d = 0; d < 0xFF000000; d += 0x1000000) { \ - for (s = 0x100; s < 0xFF00; s += 0x100) { \ - M.x86.R_EFLG = inflags = flags = def_flags; \ - for (f = 0; f < 2; f++) { \ - M.x86.intr = 0; \ - M.x86.R_AX = d & 0xFFFF; \ - M.x86.R_DX = d >> 16; \ - name(s); \ - r_quot = M.x86.R_AX; \ - r_rem = M.x86.R_DX; \ - if (M.x86.intr & INTR_SYNCH) \ - continue; \ - name##_asm(&flags,&r_asm_quot,&r_asm_rem,d & 0xFFFF,d >> 16,s);\ - if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \ - failed = true; \ - if (failed || trace) { \ - if (failed) \ - printk("fail\n"); \ - printk("0x%04X:0x%04X = %-15s(0x%08X,0x%04X), flags = %s -> %s\n", \ - r_quot, r_rem, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%04X:0x%04X = %-15s(0x%08X,0x%04X), flags = %s -> %s\n", \ - r_asm_quot, r_asm_rem, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ - } \ - M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ + for (s = 0x100; s < 0xFF00; s += 0x100) { \ + M.x86.R_EFLG = inflags = flags = def_flags; \ + for (f = 0; f < 2; f++) { \ + M.x86.intr = 0; \ + M.x86.R_AX = d & 0xFFFF; \ + M.x86.R_DX = d >> 16; \ + name(s); \ + r_quot = M.x86.R_AX; \ + r_rem = M.x86.R_DX; \ + if (M.x86.intr & INTR_SYNCH) \ + continue; \ + name##_asm(&flags,&r_asm_quot,&r_asm_rem,d & 0xFFFF,d >> 16,s);\ + if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \ + failed = true; \ + if (failed || trace) { \ + if (failed) \ + printk("fail\n"); \ + printk("0x%04X:0x%04X = %-15s(0x%08X,0x%04X), flags = %s -> %s\n", \ + r_quot, r_rem, #name, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%04X:0x%04X = %-15s(0x%08X,0x%04X), flags = %s -> %s\n", \ + r_asm_quot, r_asm_rem, #name"_asm", d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ + } \ + M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ if (!failed) \ - printk("passed\n"); \ + printk("passed\n"); \ } #define VAL_LONG_DIV(name) \ @@ -555,40 +555,40 @@ int f,failed = false; \ char buf1[80],buf2[80]; \ for (d = 0; d < 0xFF000000; d += 0x1000000) { \ - for (s = 0x100; s < 0xFF00; s += 0x100) { \ - M.x86.R_EFLG = inflags = flags = def_flags; \ - for (f = 0; f < 2; f++) { \ - M.x86.intr = 0; \ - M.x86.R_EAX = d; \ - M.x86.R_EDX = 0; \ - name(s); \ - r_quot = M.x86.R_EAX; \ - r_rem = M.x86.R_EDX; \ - if (M.x86.intr & INTR_SYNCH) \ - continue; \ - name##_asm(&flags,&r_asm_quot,&r_asm_rem,d,0,s); \ - if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \ - failed = true; \ - if (failed || trace) { \ - if (failed) \ - printk("fail\n"); \ - printk("0x%08X:0x%08X = %-15s(0x%08X:0x%08X,0x%08X), flags = %s -> %s\n", \ - r_quot, r_rem, #name, 0, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ - printk("0x%08X:0x%08X = %-15s(0x%08X:0x%08X,0x%08X), flags = %s -> %s\n", \ - r_asm_quot, r_asm_rem, #name"_asm", 0, d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ - } \ - M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ - if (failed) \ - break; \ - } \ + for (s = 0x100; s < 0xFF00; s += 0x100) { \ + M.x86.R_EFLG = inflags = flags = def_flags; \ + for (f = 0; f < 2; f++) { \ + M.x86.intr = 0; \ + M.x86.R_EAX = d; \ + M.x86.R_EDX = 0; \ + name(s); \ + r_quot = M.x86.R_EAX; \ + r_rem = M.x86.R_EDX; \ + if (M.x86.intr & INTR_SYNCH) \ + continue; \ + name##_asm(&flags,&r_asm_quot,&r_asm_rem,d,0,s); \ + if (r_quot != r_asm_quot || r_rem != r_asm_rem || M.x86.R_EFLG != flags) \ + failed = true; \ + if (failed || trace) { \ + if (failed) \ + printk("fail\n"); \ + printk("0x%08X:0x%08X = %-15s(0x%08X:0x%08X,0x%08X), flags = %s -> %s\n", \ + r_quot, r_rem, #name, 0, d, s, print_flags(buf1,inflags), print_flags(buf2,M.x86.R_EFLG)); \ + printk("0x%08X:0x%08X = %-15s(0x%08X:0x%08X,0x%08X), flags = %s -> %s\n", \ + r_asm_quot, r_asm_rem, #name"_asm", 0, d, s, print_flags(buf1,inflags), print_flags(buf2,flags)); \ + } \ + M.x86.R_EFLG = inflags = flags = def_flags | (ALL_FLAGS & ~F_OF); \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ + if (failed) \ + break; \ + } \ if (!failed) \ - printk("passed\n"); \ + printk("passed\n"); \ } void printk(const char *fmt, ...) @@ -606,37 +606,37 @@ buf[0] = 0; if (flags & F_CF) { - strcat(buf,separator); - strcat(buf,"CF"); - separator = ","; - } + strcat(buf,separator); + strcat(buf,"CF"); + separator = ","; + } if (flags & F_PF) { - strcat(buf,separator); - strcat(buf,"PF"); - separator = ","; - } + strcat(buf,separator); + strcat(buf,"PF"); + separator = ","; + } if (flags & F_AF) { - strcat(buf,separator); - strcat(buf,"AF"); - separator = ","; - } + strcat(buf,separator); + strcat(buf,"AF"); + separator = ","; + } if (flags & F_ZF) { - strcat(buf,separator); - strcat(buf,"ZF"); - separator = ","; - } + strcat(buf,separator); + strcat(buf,"ZF"); + separator = ","; + } if (flags & F_SF) { - strcat(buf,separator); - strcat(buf,"SF"); - separator = ","; - } + strcat(buf,separator); + strcat(buf,"SF"); + separator = ","; + } if (flags & F_OF) { - strcat(buf,separator); - strcat(buf,"OF"); - separator = ","; - } + strcat(buf,separator); + strcat(buf,"OF"); + separator = ","; + } if (separator[0] == 0) - strcpy(buf,"None"); + strcpy(buf,"None"); return buf; } @@ -646,7 +646,7 @@ int trace = false; if (argc > 1) - trace = true; + trace = true; memset(&M, 0, sizeof(M)); def_flags = get_flags_asm() & ~ALL_FLAGS; @@ -673,7 +673,7 @@ VAL_LONG_LONG_BINARY(cmp_long); VAL_BYTE_UNARY(daa_byte); - VAL_BYTE_UNARY(das_byte); // Fails for 0x9A (out of range anyway) + VAL_BYTE_UNARY(das_byte); /* Fails for 0x9A (out of range anyway) */ VAL_BYTE_UNARY(dec_byte); VAL_WORD_UNARY(dec_word); diff --git a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h index b4a3ed5..9a4a096 100644 --- a/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h +++ b/board/MAI/bios_emulator/scitech/src/x86emu/x86emu/debug.h @@ -118,7 +118,7 @@ #define SAVE_IP_CS(x,y) \ if (DEBUG_DECODE() | DEBUG_TRACECALL() | DEBUG_BREAK() \ - | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \ + | DEBUG_IO_TRACE() | DEBUG_SAVE_IP_CS()) { \ M.x86.saved_cs = x; \ M.x86.saved_ip = y; \ } diff --git a/board/MAI/bios_emulator/x86interface.c b/board/MAI/bios_emulator/x86interface.c index e90ec5a..909cb3c 100644 --- a/board/MAI/bios_emulator/x86interface.c +++ b/board/MAI/bios_emulator/x86interface.c @@ -5,7 +5,7 @@ /* * This isn't nice, but there are a lot of incompatibilities in the U-Boot and scitech include * files that this is the only really workable solution. - * Might be cleaned out later. + * Might be cleaned out later. */ #ifdef DEBUG @@ -45,7 +45,7 @@ #define EMULATOR_BIOS_OFFSET 0xC0000 #define EMULATOR_STRAP_OFFSET 0x30000 #define EMULATOR_STACK_OFFSET 0x20000 -#define EMULATOR_LOGO_OFFSET 0x40000 // If you change this, change the strap code, too +#define EMULATOR_LOGO_OFFSET 0x40000 /* If you change this, change the strap code, too */ #define VIDEO_BASE (void *)0xFD0B8000 extern char *getenv(char *); @@ -72,7 +72,7 @@ char c = 0; buffer[0] = 0; - if (getenv("x86_runthru")) return; //FIXME: + if (getenv("x86_runthru")) return; /*FIXME: */ while (c != 0x0D && c != 0x0A) { while (!tstc()); @@ -167,7 +167,7 @@ int dolog(int port) { - if (log_init && log_do) + if (log_init && log_do) { if (log_low && port > 0x400) return 0; return 1; @@ -178,7 +178,7 @@ log_init = 1; log_do = (getenv("x86_logio") != (char *)0); log_low = (getenv("x86_loglow") != (char *)0); - if (log_do) + if (log_do) { if (log_low && port > 0x400) return 0; return 1; @@ -187,12 +187,12 @@ return 0; } -// Converts an emulator address to a physical address. -// Handles all special cases (bios date, model etc), and might need work +/* Converts an emulator address to a physical address. */ +/* Handles all special cases (bios date, model etc), and might need work */ u32 memaddr(u32 addr) { -// if (addr >= 0xF0000 && addr < 0xFFFFF) printf("WARNING: Segment F access (0x%x)\n", addr); -// printf("MemAddr=%p\n", addr); +/* if (addr >= 0xF0000 && addr < 0xFFFFF) printf("WARNING: Segment F access (0x%x)\n", addr); */ +/* printf("MemAddr=%p\n", addr); */ if (addr >= 0xA0000 && addr < 0xC0000) return 0xFD000000 + addr; else if (addr >= 0xFFFF5 && addr < 0xFFFFE) @@ -205,7 +205,7 @@ return (u32)&submodel; else if (addr >= 0x80000000) { - //printf("Warning: High memory access at 0x%x\n", addr); + /*printf("Warning: High memory access at 0x%x\n", addr); */ return addr; } else @@ -251,7 +251,7 @@ write_long_little((ULONG *)memaddr(addr), val); } -X86EMU_memFuncs _A1_mem = +X86EMU_memFuncs _A1_mem = { A1_rdb, A1_rdw, @@ -282,7 +282,7 @@ u8 A1_inb(int port) { u8 a; - //if (port == 0x3BA) return 0; + /*if (port == 0x3BA) return 0; */ a = in_byte(port); LOGIO(port, "inb: %Xh -> %d (%Xh)\n", port, a, a); return a; @@ -324,7 +324,7 @@ out_long(port, val); } -X86EMU_pioFuncs _A1_pio = +X86EMU_pioFuncs _A1_pio = { A1_inb, A1_inw, @@ -353,7 +353,7 @@ x86emu_optab[i] -= delta; x86emu_optab2[i] -= delta; } - + _A1_mem.rdb = A1_rdb; _A1_mem.rdw = A1_rdw; _A1_mem.rdl = A1_rdl; @@ -367,7 +367,7 @@ _A1_pio.outb = A1_outb; _A1_pio.outw = A1_outw; _A1_pio.outl = A1_outl; - + tables_relocate(delta); } @@ -379,9 +379,9 @@ unsigned char more_strap[] = { - 0xb4, 0x0, 0xb0, 0x2, 0xcd, 0x10, + 0xb4, 0x0, 0xb0, 0x2, 0xcd, 0x10, }; -#define MORE_STRAP_BYTES 6 // Additional bytes of strap code +#define MORE_STRAP_BYTES 6 /* Additional bytes of strap code */ unsigned char *done_msg="VGA Initialized\0"; @@ -415,12 +415,12 @@ PRINTF("Attempting to run emulator on %02x:%02x:%02x\n", PCI_BUS(gr_dev), PCI_DEV(gr_dev), PCI_FUNC(gr_dev)); - // Enable compatibility hole for emulator access to frame buffer + /* Enable compatibility hole for emulator access to frame buffer */ PRINTF("Enabling compatibility hole\n"); enable_compatibility_hole(); - // Allocate memory - // FIXME: We shouldn't use this much memory really. + /* Allocate memory */ + /* FIXME: We shouldn't use this much memory really. */ memset(&M, 0, sizeof(X86EMU_sysEnv)); M.mem_base = malloc(EMULATOR_MEM_SIZE); M.mem_size = EMULATOR_MEM_SIZE; @@ -470,10 +470,10 @@ { easteregg_active = 1; } - + if (easteregg_active) { - // Yay! + /* Yay! */ setenv("x86_mode", "1"); setenv("vga_fg_color", "11"); setenv("vga_bg_color", "1"); @@ -493,9 +493,9 @@ } } - /* + /* * Poke the strap routine. This might need a bit of extending - * if there is a mode switch involved, i.e. we want to int10 + * if there is a mode switch involved, i.e. we want to int10 * afterwards to set a different graphics mode, or alternatively * there might be a different start address requirement if the * ROM doesn't have an x86 image in its first image. @@ -503,19 +503,19 @@ PRINTF("Poking strap...\n"); - // FAR CALL c000:0003 + /* FAR CALL c000:0003 */ *strap++ = 0x9A; *strap++ = 0x03; *strap++ = 0x00; - *strap++ = 0x00; *strap++ = 0xC0; + *strap++ = 0x00; *strap++ = 0xC0; #if 1 - // insert additional strap code + /* insert additional strap code */ for (i=0; i < MORE_STRAP_BYTES; i++) { *strap++ = more_strap[i]; } #endif - // HALT - *strap++ = 0xF4; + /* HALT */ + *strap++ = 0xF4; PRINTF("Setting up logo data\n"); logo = (unsigned char *)M.mem_base + EMULATOR_LOGO_OFFSET; @@ -530,28 +530,28 @@ * must contain the devfn, encoded as (dev<<3)|fn */ - // Execution starts here - M.x86.R_CS = SEG(EMULATOR_STRAP_OFFSET); - M.x86.R_IP = OFF(EMULATOR_STRAP_OFFSET); + /* Execution starts here */ + M.x86.R_CS = SEG(EMULATOR_STRAP_OFFSET); + M.x86.R_IP = OFF(EMULATOR_STRAP_OFFSET); - // Stack at top of ram + /* Stack at top of ram */ M.x86.R_SS = SEG(EMULATOR_STACK_OFFSET); M.x86.R_SP = OFF(EMULATOR_STACK_OFFSET); - // Input parameters + /* Input parameters */ M.x86.R_AH = PCI_BUS(gr_dev); M.x86.R_AL = (PCI_DEV(gr_dev)<<3) | PCI_FUNC(gr_dev); - // Set the I/O and memory access functions + /* Set the I/O and memory access functions */ X86EMU_setupMemFuncs(&_A1_mem); X86EMU_setupPioFuncs(&_A1_pio); - // Enable timer 2 - cfg = in_byte(0x61); // Get Misc control - cfg |= 0x01; // Enable timer 2 - out_byte(0x61, cfg); // output again + /* Enable timer 2 */ + cfg = in_byte(0x61); /* Get Misc control */ + cfg |= 0x01; /* Enable timer 2 */ + out_byte(0x61, cfg); /* output again */ - // Set up the timers + /* Set up the timers */ out_byte(0x43, 0x54); out_byte(0x41, 0x18); @@ -563,10 +563,10 @@ out_byte(0x42, 0x31); out_byte(0x42, 0x13); - // Init the "BIOS". + /* Init the "BIOS". */ bios_init(); - // Video Card Reset + /* Video Card Reset */ out_byte(0x3D8, 0); out_byte(0x3B8, 1); (void)in_byte(0x3BA); @@ -583,7 +583,7 @@ } #endif - // Ready set go... + /* Ready set go... */ PRINTF("Running emulator\n"); X86EMU_exec(); PRINTF("Done running emulator\n"); @@ -593,8 +593,8 @@ if (pal_reset && strcmp(pal_reset, "on") == 0) { PRINTF("Palette reset\n"); - //(void)in_byte(0x3da); - //out_byte(0x3c0, 0); + /*(void)in_byte(0x3da); */ + /*out_byte(0x3c0, 0); */ out_byte(0x3C8, 0); out_byte(0x3C9, 0); @@ -645,15 +645,15 @@ if (getenv("x86_do_inout")) do_inout(); #endif -//FIXME: dcache_disable(); +/*FIXME: dcache_disable(); */ return 1; } -// Clean up the x86 mess +/* Clean up the x86 mess */ void shutdown_bios(void) { -// disable_compatibility_hole(); - // Free the memory associated +/* disable_compatibility_hole(); */ + /* Free the memory associated */ free(M.mem_base); } @@ -663,7 +663,7 @@ int base = 0; int res = 0; - if (*buffer == '$') + if (*buffer == '$') { base = 16; buffer++; @@ -687,27 +687,27 @@ case 'b': res *= base; res += 11; - break; + break; case 'C': case 'c': res *= base; res += 12; - break; + break; case 'D': case 'd': res *= base; res += 13; - break; + break; case 'E': case 'e': res *= base; res += 14; - break; + break; case 'F': case 'f': res *= base; res += 15; - break; + break; default: return res; } diff --git a/board/MAI/menu/cmd_menu.c b/board/MAI/menu/cmd_menu.c index 1788173..4c17c6a 100644 --- a/board/MAI/menu/cmd_menu.c +++ b/board/MAI/menu/cmd_menu.c @@ -1,9 +1,16 @@ #include #include -#include int do_menu( cmd_tbl_t *cmdtp, /*bd_t *bd,*/ int flag, int argc, char *argv[] ) { -// printf("\n"); - return 0; +/* printf("\n"); */ + return 0; } + +#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP) +cmd_tbl_t U_BOOT_CMD(MENU) = MK_CMD_ENTRY( + "menu", 1, 1, do_menu, + "menu - display BIOS setup menu\n", + "" +); +#endif diff --git a/board/MAI/menu/menu.c b/board/MAI/menu/menu.c index 3130142..c0c63a8 100644 --- a/board/MAI/menu/menu.c +++ b/board/MAI/menu/menu.c @@ -41,9 +41,9 @@ s = getenv("menu_disabled"); if (s) disabled_attr = atoi(s); - + for (i=0; i - /* Screen configurations: the initialization of the SD13806 depends on screen and on display mode. We handle only 8bpp and 16 bpp modes */ @@ -41,232 +40,232 @@ #define DISPLAY_HEIGHT 480 #ifdef CONFIG_VIDEO_SED13806_8BPP -static const S1D_REGS init_regs [] = +static const S1D_REGS init_regs [] = { - {0x0001,0x00}, // Miscellaneous Register - {0x01FC,0x00}, // Display Mode Register - {0x0004,0x1b}, // General IO Pins Configuration Register 0 - {0x0005,0x00}, // General IO Pins Configuration Register 1 - {0x0008,0xe5}, // General IO Pins Control Register 0 - {0x0009,0x1f}, // General IO Pins Control Register 1 - {0x0010,0x02}, // Memory Clock Configuration Register - {0x0014,0x10}, // LCD Pixel Clock Configuration Register - {0x0018,0x02}, // CRT/TV Pixel Clock Configuration Register - {0x001C,0x02}, // MediaPlug Clock Configuration Register - {0x001E,0x01}, // CPU To Memory Wait State Select Register - {0x0021,0x04}, // DRAM Refresh Rate Register - {0x002A,0x00}, // DRAM Timings Control Register 0 - {0x002B,0x01}, // DRAM Timings Control Register 1 - {0x0020,0x80}, // Memory Configuration Register - {0x0030,0x25}, // Panel Type Register - {0x0031,0x00}, // MOD Rate Register - {0x0032,0x4F}, // LCD Horizontal Display Width Register - {0x0034,0x13}, // LCD Horizontal Non-Display Period Register - {0x0035,0x01}, // TFT FPLINE Start Position Register - {0x0036,0x0B}, // TFT FPLINE Pulse Width Register - {0x0038,0xDF}, // LCD Vertical Display Height Register 0 - {0x0039,0x01}, // LCD Vertical Display Height Register 1 - {0x003A,0x2C}, // LCD Vertical Non-Display Period Register - {0x003B,0x00}, // TFT FPFRAME Start Position Register - {0x003C,0x01}, // TFT FPFRAME Pulse Width Register - {0x0040,0x03}, // LCD Display Mode Register - {0x0041,0x02}, // LCD Miscellaneous Register - {0x0042,0x00}, // LCD Display Start Address Register 0 - {0x0043,0x00}, // LCD Display Start Address Register 1 - {0x0044,0x00}, // LCD Display Start Address Register 2 - {0x0046,0x40}, // LCD Memory Address Offset Register 0 - {0x0047,0x01}, // LCD Memory Address Offset Register 1 - {0x0048,0x00}, // LCD Pixel Panning Register - {0x004A,0x00}, // LCD Display FIFO High Threshold Control Register - {0x004B,0x00}, // LCD Display FIFO Low Threshold Control Register - {0x0050,0x4F}, // CRT/TV Horizontal Display Width Register - {0x0052,0x13}, // CRT/TV Horizontal Non-Display Period Register - {0x0053,0x01}, // CRT/TV HRTC Start Position Register - {0x0054,0x0B}, // CRT/TV HRTC Pulse Width Register - {0x0056,0xDF}, // CRT/TV Vertical Display Height Register 0 - {0x0057,0x01}, // CRT/TV Vertical Display Height Register 1 - {0x0058,0x2B}, // CRT/TV Vertical Non-Display Period Register - {0x0059,0x09}, // CRT/TV VRTC Start Position Register - {0x005A,0x01}, // CRT/TV VRTC Pulse Width Register - {0x005B,0x00}, // TV Output Control Register - {0x0060,0x03}, // CRT/TV Display Mode Register - {0x0062,0x00}, // CRT/TV Display Start Address Register 0 - {0x0063,0x00}, // CRT/TV Display Start Address Register 1 - {0x0064,0x00}, // CRT/TV Display Start Address Register 2 - {0x0066,0x40}, // CRT/TV Memory Address Offset Register 0 - {0x0067,0x01}, // CRT/TV Memory Address Offset Register 1 - {0x0068,0x00}, // CRT/TV Pixel Panning Register - {0x006A,0x00}, // CRT/TV Display FIFO High Threshold Control Register - {0x006B,0x00}, // CRT/TV Display FIFO Low Threshold Control Register - {0x0070,0x00}, // LCD Ink/Cursor Control Register - {0x0071,0x00}, // LCD Ink/Cursor Start Address Register - {0x0072,0x00}, // LCD Cursor X Position Register 0 - {0x0073,0x00}, // LCD Cursor X Position Register 1 - {0x0074,0x00}, // LCD Cursor Y Position Register 0 - {0x0075,0x00}, // LCD Cursor Y Position Register 1 - {0x0076,0x00}, // LCD Ink/Cursor Blue Color 0 Register - {0x0077,0x00}, // LCD Ink/Cursor Green Color 0 Register - {0x0078,0x00}, // LCD Ink/Cursor Red Color 0 Register - {0x007A,0x1F}, // LCD Ink/Cursor Blue Color 1 Register - {0x007B,0x3F}, // LCD Ink/Cursor Green Color 1 Register - {0x007C,0x1F}, // LCD Ink/Cursor Red Color 1 Register - {0x007E,0x00}, // LCD Ink/Cursor FIFO Threshold Register - {0x0080,0x00}, // CRT/TV Ink/Cursor Control Register - {0x0081,0x00}, // CRT/TV Ink/Cursor Start Address Register - {0x0082,0x00}, // CRT/TV Cursor X Position Register 0 - {0x0083,0x00}, // CRT/TV Cursor X Position Register 1 - {0x0084,0x00}, // CRT/TV Cursor Y Position Register 0 - {0x0085,0x00}, // CRT/TV Cursor Y Position Register 1 - {0x0086,0x00}, // CRT/TV Ink/Cursor Blue Color 0 Register - {0x0087,0x00}, // CRT/TV Ink/Cursor Green Color 0 Register - {0x0088,0x00}, // CRT/TV Ink/Cursor Red Color 0 Register - {0x008A,0x1F}, // CRT/TV Ink/Cursor Blue Color 1 Register - {0x008B,0x3F}, // CRT/TV Ink/Cursor Green Color 1 Register - {0x008C,0x1F}, // CRT/TV Ink/Cursor Red Color 1 Register - {0x008E,0x00}, // CRT/TV Ink/Cursor FIFO Threshold Register - {0x0100,0x00}, // BitBlt Control Register 0 - {0x0101,0x00}, // BitBlt Control Register 1 - {0x0102,0x00}, // BitBlt ROP Code/Color Expansion Register - {0x0103,0x00}, // BitBlt Operation Register - {0x0104,0x00}, // BitBlt Source Start Address Register 0 - {0x0105,0x00}, // BitBlt Source Start Address Register 1 - {0x0106,0x00}, // BitBlt Source Start Address Register 2 - {0x0108,0x00}, // BitBlt Destination Start Address Register 0 - {0x0109,0x00}, // BitBlt Destination Start Address Register 1 - {0x010A,0x00}, // BitBlt Destination Start Address Register 2 - {0x010C,0x00}, // BitBlt Memory Address Offset Register 0 - {0x010D,0x00}, // BitBlt Memory Address Offset Register 1 - {0x0110,0x00}, // BitBlt Width Register 0 - {0x0111,0x00}, // BitBlt Width Register 1 - {0x0112,0x00}, // BitBlt Height Register 0 - {0x0113,0x00}, // BitBlt Height Register 1 - {0x0114,0x00}, // BitBlt Background Color Register 0 - {0x0115,0x00}, // BitBlt Background Color Register 1 - {0x0118,0x00}, // BitBlt Foreground Color Register 0 - {0x0119,0x00}, // BitBlt Foreground Color Register 1 - {0x01E0,0x00}, // Look-Up Table Mode Register - {0x01E2,0x00}, // Look-Up Table Address Register - {0x01E4,0x00}, // Look-Up Table Data Register - {0x01F0,0x10}, // Power Save Configuration Register - {0x01F1,0x00}, // Power Save Status Register - {0x01F4,0x00}, // CPU-to-Memory Access Watchdog Timer Register - {0x01FC,0x01}, // Display Mode Register + {0x0001,0x00}, /* Miscellaneous Register */ + {0x01FC,0x00}, /* Display Mode Register */ + {0x0004,0x1b}, /* General IO Pins Configuration Register 0 */ + {0x0005,0x00}, /* General IO Pins Configuration Register 1 */ + {0x0008,0xe5}, /* General IO Pins Control Register 0 */ + {0x0009,0x1f}, /* General IO Pins Control Register 1 */ + {0x0010,0x02}, /* Memory Clock Configuration Register */ + {0x0014,0x10}, /* LCD Pixel Clock Configuration Register */ + {0x0018,0x02}, /* CRT/TV Pixel Clock Configuration Register */ + {0x001C,0x02}, /* MediaPlug Clock Configuration Register */ + {0x001E,0x01}, /* CPU To Memory Wait State Select Register */ + {0x0021,0x04}, /* DRAM Refresh Rate Register */ + {0x002A,0x00}, /* DRAM Timings Control Register 0 */ + {0x002B,0x01}, /* DRAM Timings Control Register 1 */ + {0x0020,0x80}, /* Memory Configuration Register */ + {0x0030,0x25}, /* Panel Type Register */ + {0x0031,0x00}, /* MOD Rate Register */ + {0x0032,0x4F}, /* LCD Horizontal Display Width Register */ + {0x0034,0x13}, /* LCD Horizontal Non-Display Period Register */ + {0x0035,0x01}, /* TFT FPLINE Start Position Register */ + {0x0036,0x0B}, /* TFT FPLINE Pulse Width Register */ + {0x0038,0xDF}, /* LCD Vertical Display Height Register 0 */ + {0x0039,0x01}, /* LCD Vertical Display Height Register 1 */ + {0x003A,0x2C}, /* LCD Vertical Non-Display Period Register */ + {0x003B,0x00}, /* TFT FPFRAME Start Position Register */ + {0x003C,0x01}, /* TFT FPFRAME Pulse Width Register */ + {0x0040,0x03}, /* LCD Display Mode Register */ + {0x0041,0x02}, /* LCD Miscellaneous Register */ + {0x0042,0x00}, /* LCD Display Start Address Register 0 */ + {0x0043,0x00}, /* LCD Display Start Address Register 1 */ + {0x0044,0x00}, /* LCD Display Start Address Register 2 */ + {0x0046,0x40}, /* LCD Memory Address Offset Register 0 */ + {0x0047,0x01}, /* LCD Memory Address Offset Register 1 */ + {0x0048,0x00}, /* LCD Pixel Panning Register */ + {0x004A,0x00}, /* LCD Display FIFO High Threshold Control Register */ + {0x004B,0x00}, /* LCD Display FIFO Low Threshold Control Register */ + {0x0050,0x4F}, /* CRT/TV Horizontal Display Width Register */ + {0x0052,0x13}, /* CRT/TV Horizontal Non-Display Period Register */ + {0x0053,0x01}, /* CRT/TV HRTC Start Position Register */ + {0x0054,0x0B}, /* CRT/TV HRTC Pulse Width Register */ + {0x0056,0xDF}, /* CRT/TV Vertical Display Height Register 0 */ + {0x0057,0x01}, /* CRT/TV Vertical Display Height Register 1 */ + {0x0058,0x2B}, /* CRT/TV Vertical Non-Display Period Register */ + {0x0059,0x09}, /* CRT/TV VRTC Start Position Register */ + {0x005A,0x01}, /* CRT/TV VRTC Pulse Width Register */ + {0x005B,0x00}, /* TV Output Control Register */ + {0x0060,0x03}, /* CRT/TV Display Mode Register */ + {0x0062,0x00}, /* CRT/TV Display Start Address Register 0 */ + {0x0063,0x00}, /* CRT/TV Display Start Address Register 1 */ + {0x0064,0x00}, /* CRT/TV Display Start Address Register 2 */ + {0x0066,0x40}, /* CRT/TV Memory Address Offset Register 0 */ + {0x0067,0x01}, /* CRT/TV Memory Address Offset Register 1 */ + {0x0068,0x00}, /* CRT/TV Pixel Panning Register */ + {0x006A,0x00}, /* CRT/TV Display FIFO High Threshold Control Register */ + {0x006B,0x00}, /* CRT/TV Display FIFO Low Threshold Control Register */ + {0x0070,0x00}, /* LCD Ink/Cursor Control Register */ + {0x0071,0x00}, /* LCD Ink/Cursor Start Address Register */ + {0x0072,0x00}, /* LCD Cursor X Position Register 0 */ + {0x0073,0x00}, /* LCD Cursor X Position Register 1 */ + {0x0074,0x00}, /* LCD Cursor Y Position Register 0 */ + {0x0075,0x00}, /* LCD Cursor Y Position Register 1 */ + {0x0076,0x00}, /* LCD Ink/Cursor Blue Color 0 Register */ + {0x0077,0x00}, /* LCD Ink/Cursor Green Color 0 Register */ + {0x0078,0x00}, /* LCD Ink/Cursor Red Color 0 Register */ + {0x007A,0x1F}, /* LCD Ink/Cursor Blue Color 1 Register */ + {0x007B,0x3F}, /* LCD Ink/Cursor Green Color 1 Register */ + {0x007C,0x1F}, /* LCD Ink/Cursor Red Color 1 Register */ + {0x007E,0x00}, /* LCD Ink/Cursor FIFO Threshold Register */ + {0x0080,0x00}, /* CRT/TV Ink/Cursor Control Register */ + {0x0081,0x00}, /* CRT/TV Ink/Cursor Start Address Register */ + {0x0082,0x00}, /* CRT/TV Cursor X Position Register 0 */ + {0x0083,0x00}, /* CRT/TV Cursor X Position Register 1 */ + {0x0084,0x00}, /* CRT/TV Cursor Y Position Register 0 */ + {0x0085,0x00}, /* CRT/TV Cursor Y Position Register 1 */ + {0x0086,0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register */ + {0x0087,0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register */ + {0x0088,0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register */ + {0x008A,0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register */ + {0x008B,0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register */ + {0x008C,0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register */ + {0x008E,0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register */ + {0x0100,0x00}, /* BitBlt Control Register 0 */ + {0x0101,0x00}, /* BitBlt Control Register 1 */ + {0x0102,0x00}, /* BitBlt ROP Code/Color Expansion Register */ + {0x0103,0x00}, /* BitBlt Operation Register */ + {0x0104,0x00}, /* BitBlt Source Start Address Register 0 */ + {0x0105,0x00}, /* BitBlt Source Start Address Register 1 */ + {0x0106,0x00}, /* BitBlt Source Start Address Register 2 */ + {0x0108,0x00}, /* BitBlt Destination Start Address Register 0 */ + {0x0109,0x00}, /* BitBlt Destination Start Address Register 1 */ + {0x010A,0x00}, /* BitBlt Destination Start Address Register 2 */ + {0x010C,0x00}, /* BitBlt Memory Address Offset Register 0 */ + {0x010D,0x00}, /* BitBlt Memory Address Offset Register 1 */ + {0x0110,0x00}, /* BitBlt Width Register 0 */ + {0x0111,0x00}, /* BitBlt Width Register 1 */ + {0x0112,0x00}, /* BitBlt Height Register 0 */ + {0x0113,0x00}, /* BitBlt Height Register 1 */ + {0x0114,0x00}, /* BitBlt Background Color Register 0 */ + {0x0115,0x00}, /* BitBlt Background Color Register 1 */ + {0x0118,0x00}, /* BitBlt Foreground Color Register 0 */ + {0x0119,0x00}, /* BitBlt Foreground Color Register 1 */ + {0x01E0,0x00}, /* Look-Up Table Mode Register */ + {0x01E2,0x00}, /* Look-Up Table Address Register */ + {0x01E4,0x00}, /* Look-Up Table Data Register */ + {0x01F0,0x10}, /* Power Save Configuration Register */ + {0x01F1,0x00}, /* Power Save Status Register */ + {0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */ + {0x01FC,0x01}, /* Display Mode Register */ {0, 0} }; #endif /* CONFIG_VIDEO_SED13806_8BPP */ #ifdef CONFIG_VIDEO_SED13806_16BPP -static const S1D_REGS init_regs [] = +static const S1D_REGS init_regs [] = { - {0x0001,0x00}, // Miscellaneous Register - {0x01FC,0x00}, // Display Mode Register - {0x0004,0x1b}, // General IO Pins Configuration Register 0 - {0x0005,0x00}, // General IO Pins Configuration Register 1 - {0x0008,0xe5}, // General IO Pins Control Register 0 - {0x0009,0x1f}, // General IO Pins Control Register 1 - {0x0010,0x02}, // Memory Clock Configuration Register - {0x0014,0x10}, // LCD Pixel Clock Configuration Register - {0x0018,0x02}, // CRT/TV Pixel Clock Configuration Register - {0x001C,0x02}, // MediaPlug Clock Configuration Register - {0x001E,0x01}, // CPU To Memory Wait State Select Register - {0x0021,0x04}, // DRAM Refresh Rate Register - {0x002A,0x00}, // DRAM Timings Control Register 0 - {0x002B,0x01}, // DRAM Timings Control Register 1 - {0x0020,0x80}, // Memory Configuration Register - {0x0030,0x25}, // Panel Type Register - {0x0031,0x00}, // MOD Rate Register - {0x0032,0x4F}, // LCD Horizontal Display Width Register - {0x0034,0x13}, // LCD Horizontal Non-Display Period Register - {0x0035,0x01}, // TFT FPLINE Start Position Register - {0x0036,0x0B}, // TFT FPLINE Pulse Width Register - {0x0038,0xDF}, // LCD Vertical Display Height Register 0 - {0x0039,0x01}, // LCD Vertical Display Height Register 1 - {0x003A,0x2C}, // LCD Vertical Non-Display Period Register - {0x003B,0x00}, // TFT FPFRAME Start Position Register - {0x003C,0x01}, // TFT FPFRAME Pulse Width Register - {0x0040,0x05}, // LCD Display Mode Register - {0x0041,0x02}, // LCD Miscellaneous Register - {0x0042,0x00}, // LCD Display Start Address Register 0 - {0x0043,0x00}, // LCD Display Start Address Register 1 - {0x0044,0x00}, // LCD Display Start Address Register 2 - {0x0046,0x80}, // LCD Memory Address Offset Register 0 - {0x0047,0x02}, // LCD Memory Address Offset Register 1 - {0x0048,0x00}, // LCD Pixel Panning Register - {0x004A,0x00}, // LCD Display FIFO High Threshold Control Register - {0x004B,0x00}, // LCD Display FIFO Low Threshold Control Register - {0x0050,0x4F}, // CRT/TV Horizontal Display Width Register - {0x0052,0x13}, // CRT/TV Horizontal Non-Display Period Register - {0x0053,0x01}, // CRT/TV HRTC Start Position Register - {0x0054,0x0B}, // CRT/TV HRTC Pulse Width Register - {0x0056,0xDF}, // CRT/TV Vertical Display Height Register 0 - {0x0057,0x01}, // CRT/TV Vertical Display Height Register 1 - {0x0058,0x2B}, // CRT/TV Vertical Non-Display Period Register - {0x0059,0x09}, // CRT/TV VRTC Start Position Register - {0x005A,0x01}, // CRT/TV VRTC Pulse Width Register - {0x005B,0x00}, // TV Output Control Register - {0x0060,0x05}, // CRT/TV Display Mode Register - {0x0062,0x00}, // CRT/TV Display Start Address Register 0 - {0x0063,0x00}, // CRT/TV Display Start Address Register 1 - {0x0064,0x00}, // CRT/TV Display Start Address Register 2 - {0x0066,0x80}, // CRT/TV Memory Address Offset Register 0 - {0x0067,0x02}, // CRT/TV Memory Address Offset Register 1 - {0x0068,0x00}, // CRT/TV Pixel Panning Register - {0x006A,0x00}, // CRT/TV Display FIFO High Threshold Control Register - {0x006B,0x00}, // CRT/TV Display FIFO Low Threshold Control Register - {0x0070,0x00}, // LCD Ink/Cursor Control Register - {0x0071,0x00}, // LCD Ink/Cursor Start Address Register - {0x0072,0x00}, // LCD Cursor X Position Register 0 - {0x0073,0x00}, // LCD Cursor X Position Register 1 - {0x0074,0x00}, // LCD Cursor Y Position Register 0 - {0x0075,0x00}, // LCD Cursor Y Position Register 1 - {0x0076,0x00}, // LCD Ink/Cursor Blue Color 0 Register - {0x0077,0x00}, // LCD Ink/Cursor Green Color 0 Register - {0x0078,0x00}, // LCD Ink/Cursor Red Color 0 Register - {0x007A,0x1F}, // LCD Ink/Cursor Blue Color 1 Register - {0x007B,0x3F}, // LCD Ink/Cursor Green Color 1 Register - {0x007C,0x1F}, // LCD Ink/Cursor Red Color 1 Register - {0x007E,0x00}, // LCD Ink/Cursor FIFO Threshold Register - {0x0080,0x00}, // CRT/TV Ink/Cursor Control Register - {0x0081,0x00}, // CRT/TV Ink/Cursor Start Address Register - {0x0082,0x00}, // CRT/TV Cursor X Position Register 0 - {0x0083,0x00}, // CRT/TV Cursor X Position Register 1 - {0x0084,0x00}, // CRT/TV Cursor Y Position Register 0 - {0x0085,0x00}, // CRT/TV Cursor Y Position Register 1 - {0x0086,0x00}, // CRT/TV Ink/Cursor Blue Color 0 Register - {0x0087,0x00}, // CRT/TV Ink/Cursor Green Color 0 Register - {0x0088,0x00}, // CRT/TV Ink/Cursor Red Color 0 Register - {0x008A,0x1F}, // CRT/TV Ink/Cursor Blue Color 1 Register - {0x008B,0x3F}, // CRT/TV Ink/Cursor Green Color 1 Register - {0x008C,0x1F}, // CRT/TV Ink/Cursor Red Color 1 Register - {0x008E,0x00}, // CRT/TV Ink/Cursor FIFO Threshold Register - {0x0100,0x00}, // BitBlt Control Register 0 - {0x0101,0x00}, // BitBlt Control Register 1 - {0x0102,0x00}, // BitBlt ROP Code/Color Expansion Register - {0x0103,0x00}, // BitBlt Operation Register - {0x0104,0x00}, // BitBlt Source Start Address Register 0 - {0x0105,0x00}, // BitBlt Source Start Address Register 1 - {0x0106,0x00}, // BitBlt Source Start Address Register 2 - {0x0108,0x00}, // BitBlt Destination Start Address Register 0 - {0x0109,0x00}, // BitBlt Destination Start Address Register 1 - {0x010A,0x00}, // BitBlt Destination Start Address Register 2 - {0x010C,0x00}, // BitBlt Memory Address Offset Register 0 - {0x010D,0x00}, // BitBlt Memory Address Offset Register 1 - {0x0110,0x00}, // BitBlt Width Register 0 - {0x0111,0x00}, // BitBlt Width Register 1 - {0x0112,0x00}, // BitBlt Height Register 0 - {0x0113,0x00}, // BitBlt Height Register 1 - {0x0114,0x00}, // BitBlt Background Color Register 0 - {0x0115,0x00}, // BitBlt Background Color Register 1 - {0x0118,0x00}, // BitBlt Foreground Color Register 0 - {0x0119,0x00}, // BitBlt Foreground Color Register 1 - {0x01E0,0x01}, // Look-Up Table Mode Register - {0x01E2,0x00}, // Look-Up Table Address Register - {0x01E4,0x00}, // Look-Up Table Data Register - {0x01F0,0x10}, // Power Save Configuration Register - {0x01F1,0x00}, // Power Save Status Register - {0x01F4,0x00}, // CPU-to-Memory Access Watchdog Timer Register - {0x01FC,0x01}, // Display Mode Register + {0x0001,0x00}, /* Miscellaneous Register */ + {0x01FC,0x00}, /* Display Mode Register */ + {0x0004,0x1b}, /* General IO Pins Configuration Register 0 */ + {0x0005,0x00}, /* General IO Pins Configuration Register 1 */ + {0x0008,0xe5}, /* General IO Pins Control Register 0 */ + {0x0009,0x1f}, /* General IO Pins Control Register 1 */ + {0x0010,0x02}, /* Memory Clock Configuration Register */ + {0x0014,0x10}, /* LCD Pixel Clock Configuration Register */ + {0x0018,0x02}, /* CRT/TV Pixel Clock Configuration Register */ + {0x001C,0x02}, /* MediaPlug Clock Configuration Register */ + {0x001E,0x01}, /* CPU To Memory Wait State Select Register */ + {0x0021,0x04}, /* DRAM Refresh Rate Register */ + {0x002A,0x00}, /* DRAM Timings Control Register 0 */ + {0x002B,0x01}, /* DRAM Timings Control Register 1 */ + {0x0020,0x80}, /* Memory Configuration Register */ + {0x0030,0x25}, /* Panel Type Register */ + {0x0031,0x00}, /* MOD Rate Register */ + {0x0032,0x4F}, /* LCD Horizontal Display Width Register */ + {0x0034,0x13}, /* LCD Horizontal Non-Display Period Register */ + {0x0035,0x01}, /* TFT FPLINE Start Position Register */ + {0x0036,0x0B}, /* TFT FPLINE Pulse Width Register */ + {0x0038,0xDF}, /* LCD Vertical Display Height Register 0 */ + {0x0039,0x01}, /* LCD Vertical Display Height Register 1 */ + {0x003A,0x2C}, /* LCD Vertical Non-Display Period Register */ + {0x003B,0x00}, /* TFT FPFRAME Start Position Register */ + {0x003C,0x01}, /* TFT FPFRAME Pulse Width Register */ + {0x0040,0x05}, /* LCD Display Mode Register */ + {0x0041,0x02}, /* LCD Miscellaneous Register */ + {0x0042,0x00}, /* LCD Display Start Address Register 0 */ + {0x0043,0x00}, /* LCD Display Start Address Register 1 */ + {0x0044,0x00}, /* LCD Display Start Address Register 2 */ + {0x0046,0x80}, /* LCD Memory Address Offset Register 0 */ + {0x0047,0x02}, /* LCD Memory Address Offset Register 1 */ + {0x0048,0x00}, /* LCD Pixel Panning Register */ + {0x004A,0x00}, /* LCD Display FIFO High Threshold Control Register */ + {0x004B,0x00}, /* LCD Display FIFO Low Threshold Control Register */ + {0x0050,0x4F}, /* CRT/TV Horizontal Display Width Register */ + {0x0052,0x13}, /* CRT/TV Horizontal Non-Display Period Register */ + {0x0053,0x01}, /* CRT/TV HRTC Start Position Register */ + {0x0054,0x0B}, /* CRT/TV HRTC Pulse Width Register */ + {0x0056,0xDF}, /* CRT/TV Vertical Display Height Register 0 */ + {0x0057,0x01}, /* CRT/TV Vertical Display Height Register 1 */ + {0x0058,0x2B}, /* CRT/TV Vertical Non-Display Period Register */ + {0x0059,0x09}, /* CRT/TV VRTC Start Position Register */ + {0x005A,0x01}, /* CRT/TV VRTC Pulse Width Register */ + {0x005B,0x00}, /* TV Output Control Register */ + {0x0060,0x05}, /* CRT/TV Display Mode Register */ + {0x0062,0x00}, /* CRT/TV Display Start Address Register 0 */ + {0x0063,0x00}, /* CRT/TV Display Start Address Register 1 */ + {0x0064,0x00}, /* CRT/TV Display Start Address Register 2 */ + {0x0066,0x80}, /* CRT/TV Memory Address Offset Register 0 */ + {0x0067,0x02}, /* CRT/TV Memory Address Offset Register 1 */ + {0x0068,0x00}, /* CRT/TV Pixel Panning Register */ + {0x006A,0x00}, /* CRT/TV Display FIFO High Threshold Control Register */ + {0x006B,0x00}, /* CRT/TV Display FIFO Low Threshold Control Register */ + {0x0070,0x00}, /* LCD Ink/Cursor Control Register */ + {0x0071,0x00}, /* LCD Ink/Cursor Start Address Register */ + {0x0072,0x00}, /* LCD Cursor X Position Register 0 */ + {0x0073,0x00}, /* LCD Cursor X Position Register 1 */ + {0x0074,0x00}, /* LCD Cursor Y Position Register 0 */ + {0x0075,0x00}, /* LCD Cursor Y Position Register 1 */ + {0x0076,0x00}, /* LCD Ink/Cursor Blue Color 0 Register */ + {0x0077,0x00}, /* LCD Ink/Cursor Green Color 0 Register */ + {0x0078,0x00}, /* LCD Ink/Cursor Red Color 0 Register */ + {0x007A,0x1F}, /* LCD Ink/Cursor Blue Color 1 Register */ + {0x007B,0x3F}, /* LCD Ink/Cursor Green Color 1 Register */ + {0x007C,0x1F}, /* LCD Ink/Cursor Red Color 1 Register */ + {0x007E,0x00}, /* LCD Ink/Cursor FIFO Threshold Register */ + {0x0080,0x00}, /* CRT/TV Ink/Cursor Control Register */ + {0x0081,0x00}, /* CRT/TV Ink/Cursor Start Address Register */ + {0x0082,0x00}, /* CRT/TV Cursor X Position Register 0 */ + {0x0083,0x00}, /* CRT/TV Cursor X Position Register 1 */ + {0x0084,0x00}, /* CRT/TV Cursor Y Position Register 0 */ + {0x0085,0x00}, /* CRT/TV Cursor Y Position Register 1 */ + {0x0086,0x00}, /* CRT/TV Ink/Cursor Blue Color 0 Register */ + {0x0087,0x00}, /* CRT/TV Ink/Cursor Green Color 0 Register */ + {0x0088,0x00}, /* CRT/TV Ink/Cursor Red Color 0 Register */ + {0x008A,0x1F}, /* CRT/TV Ink/Cursor Blue Color 1 Register */ + {0x008B,0x3F}, /* CRT/TV Ink/Cursor Green Color 1 Register */ + {0x008C,0x1F}, /* CRT/TV Ink/Cursor Red Color 1 Register */ + {0x008E,0x00}, /* CRT/TV Ink/Cursor FIFO Threshold Register */ + {0x0100,0x00}, /* BitBlt Control Register 0 */ + {0x0101,0x00}, /* BitBlt Control Register 1 */ + {0x0102,0x00}, /* BitBlt ROP Code/Color Expansion Register */ + {0x0103,0x00}, /* BitBlt Operation Register */ + {0x0104,0x00}, /* BitBlt Source Start Address Register 0 */ + {0x0105,0x00}, /* BitBlt Source Start Address Register 1 */ + {0x0106,0x00}, /* BitBlt Source Start Address Register 2 */ + {0x0108,0x00}, /* BitBlt Destination Start Address Register 0 */ + {0x0109,0x00}, /* BitBlt Destination Start Address Register 1 */ + {0x010A,0x00}, /* BitBlt Destination Start Address Register 2 */ + {0x010C,0x00}, /* BitBlt Memory Address Offset Register 0 */ + {0x010D,0x00}, /* BitBlt Memory Address Offset Register 1 */ + {0x0110,0x00}, /* BitBlt Width Register 0 */ + {0x0111,0x00}, /* BitBlt Width Register 1 */ + {0x0112,0x00}, /* BitBlt Height Register 0 */ + {0x0113,0x00}, /* BitBlt Height Register 1 */ + {0x0114,0x00}, /* BitBlt Background Color Register 0 */ + {0x0115,0x00}, /* BitBlt Background Color Register 1 */ + {0x0118,0x00}, /* BitBlt Foreground Color Register 0 */ + {0x0119,0x00}, /* BitBlt Foreground Color Register 1 */ + {0x01E0,0x01}, /* Look-Up Table Mode Register */ + {0x01E2,0x00}, /* Look-Up Table Address Register */ + {0x01E4,0x00}, /* Look-Up Table Data Register */ + {0x01F0,0x10}, /* Power Save Configuration Register */ + {0x01F1,0x00}, /* Power Save Status Register */ + {0x01F4,0x00}, /* CPU-to-Memory Access Watchdog Timer Register */ + {0x01FC,0x01}, /* Display Mode Register */ {0, 0} }; @@ -274,7 +273,6 @@ #endif /* CONFIG_NEC_NL6448BC20 */ - #ifdef CONFIG_CONSOLE_EXTRA_INFO /*----------------------------------------------------------------------------- @@ -286,10 +284,10 @@ void video_get_info_str (int line_number, char *info) { if (line_number == 1) { - strcpy (info, " RPXClassic board"); + strcpy (info, " RPXClassic board"); } else { - info [0] = '\0'; + info [0] = '\0'; } } @@ -308,7 +306,7 @@ *(ECCX_CSR12) |= ECCX_860; *(ECCX_CSR8) |= ECCX_BE | ECCX_CS2; *(ECCX_CSR8) |= ECCX_ENEPSON; - + memctl->memc_or2 = SED13806_OR; memctl->memc_br2 = SED13806_REG_ADDR | SED13806_ACCES; @@ -316,7 +314,7 @@ } /*----------------------------------------------------------------------------- - * board_validate_screen -- + * board_validate_screen -- *----------------------------------------------------------------------------- */ void board_validate_screen (unsigned int base) @@ -325,7 +323,7 @@ *(volatile unsigned char *)(base + REG_GPIO_CTRL) = 0x80; } /*----------------------------------------------------------------------------- - * board_get_regs -- + * board_get_regs -- *----------------------------------------------------------------------------- */ const S1D_REGS *board_get_regs (void) @@ -333,7 +331,7 @@ return (init_regs); } /*----------------------------------------------------------------------------- - * board_get_width -- + * board_get_width -- *----------------------------------------------------------------------------- */ int board_get_width (void) @@ -342,7 +340,7 @@ } /*----------------------------------------------------------------------------- - * board_get_height -- + * board_get_height -- *----------------------------------------------------------------------------- */ int board_get_height (void) diff --git a/board/RPXClassic/flash.c b/board/RPXClassic/flash.c index fdf90cf..2e0b8f9 100644 --- a/board/RPXClassic/flash.c +++ b/board/RPXClassic/flash.c @@ -58,7 +58,7 @@ size_b0 = flash_get_size((vu_long *)CFG_FLASH_BASE, &flash_info[0]); - flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); + flash_get_offsets (CFG_FLASH_BASE, &flash_info[0]); #if CFG_MONITOR_BASE >= CFG_FLASH_BASE /* monitor protection ON by default */ @@ -112,12 +112,12 @@ } switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AMDL323B: - printf ("AMDL323DB (16 Mbytes, bottom boot sect)\n"); - break; + case FLASH_AMDL323B: + printf ("AMDL323DB (16 Mbytes, bottom boot sect)\n"); + break; default: - printf ("Unknown Chip Type\n"); - break; + printf ("Unknown Chip Type\n"); + break; } printf (" Size: %ld MB in %d Sectors\n", @@ -152,11 +152,11 @@ ulong value; ulong base = (ulong)addr; - /* Reset flash componeny */ - addr [0] = 0xf0f0f0f0; + /* Reset flash componeny */ + addr [0] = 0xf0f0f0f0; - /* Write auto select command: read Manufacturer ID */ - addr[0xAAA] = 0xAAAAAAAA ; + /* Write auto select command: read Manufacturer ID */ + addr[0xAAA] = 0xAAAAAAAA ; addr[0x555] = 0x55555555 ; addr[0xAAA] = 0x90909090 ; @@ -176,48 +176,48 @@ value = addr[2] ; /* device ID */ switch (value & 0x00FF00FF) { - case (AMD_ID_DL323B & 0x00FF00FF): - info->flash_id += FLASH_AMDL323B; - info->sector_count = 71; - info->size = 0x01000000; /* 16 Mb */ + case (AMD_ID_DL323B & 0x00FF00FF): + info->flash_id += FLASH_AMDL323B; + info->sector_count = 71; + info->size = 0x01000000; /* 16 Mb */ - break; + break; default: info->flash_id = FLASH_UNKNOWN; return (0); /* => no or unknown flash */ } /* set up sector start address table */ - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00008000; - info->start[2] = base + 0x00010000; - info->start[3] = base + 0x00018000; - info->start[4] = base + 0x00020000; - info->start[5] = base + 0x00028000; - info->start[6] = base + 0x00030000; - info->start[7] = base + 0x00038000; - for (i = 8; i < info->sector_count; i++) { - info->start[i] = base + ((i-7) * 0x00040000) ; - } + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00008000; + info->start[2] = base + 0x00010000; + info->start[3] = base + 0x00018000; + info->start[4] = base + 0x00020000; + info->start[5] = base + 0x00028000; + info->start[6] = base + 0x00030000; + info->start[7] = base + 0x00038000; + for (i = 8; i < info->sector_count; i++) { + info->start[i] = base + ((i-7) * 0x00040000) ; + } /* check for protected sectors */ - for (i = 0; i < 23; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr = (volatile unsigned long *)(info->start[i]); - info->protect[i] = addr[4] & 1 ; + for (i = 0; i < 23; i++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr = (volatile unsigned long *)(info->start[i]); + info->protect[i] = addr[4] & 1 ; } - /* Check for protected sectors in the 2nd bank */ - addr[0x100AAA] = 0xAAAAAAAA ; - addr[0x100555] = 0x55555555 ; - addr[0x100AAA] = 0x90909090 ; + /* Check for protected sectors in the 2nd bank */ + addr[0x100AAA] = 0xAAAAAAAA ; + addr[0x100555] = 0x55555555 ; + addr[0x100AAA] = 0x90909090 ; - for (i = 23; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr = (volatile unsigned long *)(info->start[i]); - info->protect[i] = addr[4] & 1 ; + for (i = 23; i < info->sector_count; i++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr = (volatile unsigned long *)(info->start[i]); + info->protect[i] = addr[4] & 1 ; } /* @@ -330,7 +330,7 @@ addr[0] = 0xF0F0F0F0; /* reset bank */ printf (" done\n"); - return 0; + return 0; } /*----------------------------------------------------------------------- diff --git a/board/RPXClassic/u-boot.lds b/board/RPXClassic/u-boot.lds index a31c362..082d8b0 100644 --- a/board/RPXClassic/u-boot.lds +++ b/board/RPXClassic/u-boot.lds @@ -110,6 +110,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -132,4 +137,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/RPXClassic/u-boot.lds.debug b/board/RPXClassic/u-boot.lds.debug index 22138f8..c0ee849 100644 --- a/board/RPXClassic/u-boot.lds.debug +++ b/board/RPXClassic/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/RPXlite/Makefile b/board/RPXlite/Makefile index ef173d0..13ce9fc 100644 --- a/board/RPXlite/Makefile +++ b/board/RPXlite/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/RPXlite/u-boot.lds b/board/RPXlite/u-boot.lds index a31c362..082d8b0 100644 --- a/board/RPXlite/u-boot.lds +++ b/board/RPXlite/u-boot.lds @@ -110,6 +110,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -132,4 +137,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/RPXlite/u-boot.lds.debug b/board/RPXlite/u-boot.lds.debug index 22138f8..c0ee849 100644 --- a/board/RPXlite/u-boot.lds.debug +++ b/board/RPXlite/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/RRvision/Makefile b/board/RRvision/Makefile index c748d35..fdc6fd5 100644 --- a/board/RRvision/Makefile +++ b/board/RRvision/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/RRvision/u-boot.lds b/board/RRvision/u-boot.lds index b2d8090..f81a10e 100644 --- a/board/RRvision/u-boot.lds +++ b/board/RRvision/u-boot.lds @@ -112,6 +112,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -134,4 +139,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/a3000/Makefile b/board/a3000/Makefile index 02e2b4b..5fde362 100644 --- a/board/a3000/Makefile +++ b/board/a3000/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/a3000/README b/board/a3000/README index 417969f..f0e92c5 100644 --- a/board/a3000/README +++ b/board/a3000/README @@ -15,4 +15,3 @@ U-Boot, at the address of 0xFFFE0000. There is a National ns83815 10/100M ethernet controller on-board. - diff --git a/board/a3000/flash.c b/board/a3000/flash.c index cbfd1d1..13a5ca5 100644 --- a/board/a3000/flash.c +++ b/board/a3000/flash.c @@ -71,7 +71,7 @@ int i; /* Init: no FLASHes known */ - for (i=0; iflash_id & FLASH_TYPEMASK) { - case FLASH_28F320J3A: + case FLASH_28F320J3A: printf ("28F320J3A (32Mbit = 128K x 32)\n"); break; - case FLASH_28F640J3A: + case FLASH_28F640J3A: printf ("28F640J3A (64Mbit = 128K x 64)\n"); break; - case FLASH_28F128J3A: + case FLASH_28F128J3A: printf ("28F128J3A (128Mbit = 128K x 128)\n"); break; - default: + default: printf ("Unknown Chip Type\n"); break; } diff --git a/board/a3000/u-boot.lds b/board/a3000/u-boot.lds index 627a53b..6bd865e 100644 --- a/board/a3000/u-boot.lds +++ b/board/a3000/u-boot.lds @@ -102,6 +102,10 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -125,4 +129,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/at91rm9200dk/Makefile b/board/at91rm9200dk/Makefile index d925d33..93ba699 100644 --- a/board/at91rm9200dk/Makefile +++ b/board/at91rm9200dk/Makefile @@ -29,7 +29,7 @@ SOBJS := $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/at91rm9200dk/config.mk b/board/at91rm9200dk/config.mk index 009b4d7..9ce161e 100644 --- a/board/at91rm9200dk/config.mk +++ b/board/at91rm9200dk/config.mk @@ -1,2 +1 @@ TEXT_BASE = 0x21f00000 - diff --git a/board/at91rm9200dk/flash.c b/board/at91rm9200dk/flash.c index 4d4524f..ebbd6f4 100644 --- a/board/at91rm9200dk/flash.c +++ b/board/at91rm9200dk/flash.c @@ -43,14 +43,14 @@ OrgDef OrgAT49BV16x4[] = { { 8, 8*1024 }, /* 8 * 8kBytes sectors */ - { 2, 32*1024 }, /* 2 * 32kBytes sectors */ - { 30, 64*1024 } /* 30 * 64kBytes sectors */ + { 2, 32*1024 }, /* 2 * 32kBytes sectors */ + { 30, 64*1024 } /* 30 * 64kBytes sectors */ }; OrgDef OrgAT49BV16x4A[] = { - { 8, 8*1024 }, /* 8 * 8kBytes sectors */ - { 31, 64*1024 } /* 31 * 64kBytes sectors */ + { 8, 8*1024 }, /* 8 * 8kBytes sectors */ + { 31, 64*1024 } /* 31 * 64kBytes sectors */ }; diff --git a/board/at91rm9200dk/u-boot.lds b/board/at91rm9200dk/u-boot.lds index 2447bca..17a85b8 100644 --- a/board/at91rm9200dk/u-boot.lds +++ b/board/at91rm9200dk/u-boot.lds @@ -27,28 +27,32 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/at91rm9200/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } armboot_end = .; } diff --git a/board/atc/Makefile b/board/atc/Makefile index 35b8428..7a2014d 100644 --- a/board/atc/Makefile +++ b/board/atc/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/atc/atc.c b/board/atc/atc.c index ea7416a..42abcda 100644 --- a/board/atc/atc.c +++ b/board/atc/atc.c @@ -207,14 +207,14 @@ * UPMB initialization table */ #define _NOT_USED_ 0xFFFFFFFF - + static const uint rtc_table[] = { /* * Single Read. (Offset 0 in UPMA RAM) */ - 0xfffec00, 0xfffac00, 0xfff2d00, 0xfef2800, - 0xfaf2080, 0xfaf2080, 0xfff2400, 0x1fff6c05, /* last */ + 0xfffec00, 0xfffac00, 0xfff2d00, 0xfef2800, + 0xfaf2080, 0xfaf2080, 0xfff2400, 0x1fff6c05, /* last */ /* * Burst Read. (Offset 8 in UPMA RAM) */ @@ -225,7 +225,7 @@ /* * Single Write. (Offset 18 in UPMA RAM) */ - 0xfffec00, 0xfffac00, 0xfff2d00, 0xfef2800, + 0xfffec00, 0xfffac00, 0xfff2d00, 0xfef2800, 0xfaf2080, 0xfaf2080, 0xfaf2400, 0x1fbf6c05, /* last */ /* * Burst Write. (Offset 20 in UPMA RAM) @@ -244,8 +244,8 @@ * Exception. (Offset 3c in UPMA RAM) */ _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, -}; - +}; + /* ------------------------------------------------------------------------- */ /* Check Board Identity: @@ -366,13 +366,13 @@ { volatile immap_t *immap = (immap_t *) CFG_IMMR; volatile memctl8260_t *memctl = &immap->im_memctl; - + upmconfig(UPMA, (uint *)rtc_table, sizeof(rtc_table) / sizeof(uint)); - memctl->memc_mamr = MxMR_RLFx_6X | MxMR_WLFx_6X | MxMR_OP_NORM; + memctl->memc_mamr = MxMR_RLFx_6X | MxMR_WLFx_6X | MxMR_OP_NORM; return (0); } - + long int initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; diff --git a/board/atc/flash.c b/board/atc/flash.c index 6d7b38b..26b7c80 100644 --- a/board/atc/flash.c +++ b/board/atc/flash.c @@ -76,14 +76,14 @@ memset(&flash_info[i], 0, sizeof(flash_info_t)); - flash_info[i].size = + flash_info[i].size = flash_get_size((FPW *)flashbase, &flash_info[i]); if (flash_info[i].flash_id == FLASH_UNKNOWN) { printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n", i, flash_info[i].size); } - + size += flash_info[i].size; } @@ -163,13 +163,13 @@ { int i; flash_info_t * info; - + for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { info = & flash_info[i]; if (info->start[0] <= base && base < info->start[0] + info->size) break; } - + return i == CFG_MAX_FLASH_BANKS ? 0 : info; } @@ -216,32 +216,32 @@ case FLASH_AM640U: fmt = "29LV641D (64 Mbit, uniform sectors)\n"; break; - case FLASH_28F800C3B: - case FLASH_28F800C3T: + case FLASH_28F800C3B: + case FLASH_28F800C3T: fmt = "28F800C3%s (8 Mbit, %s)\n"; break; case FLASH_INTEL800B: case FLASH_INTEL800T: fmt = "28F800B3%s (8 Mbit, %s)\n"; break; - case FLASH_28F160C3B: - case FLASH_28F160C3T: + case FLASH_28F160C3B: + case FLASH_28F160C3T: fmt = "28F160C3%s (16 Mbit, %s)\n"; break; case FLASH_INTEL160B: case FLASH_INTEL160T: fmt = "28F160B3%s (16 Mbit, %s)\n"; break; - case FLASH_28F320C3B: - case FLASH_28F320C3T: + case FLASH_28F320C3B: + case FLASH_28F320C3T: fmt = "28F320C3%s (32 Mbit, %s)\n"; break; case FLASH_INTEL320B: case FLASH_INTEL320T: fmt = "28F320B3%s (32 Mbit, %s)\n"; break; - case FLASH_28F640C3B: - case FLASH_28F640C3T: + case FLASH_28F640C3B: + case FLASH_28F640C3T: fmt = "28F640C3%s (64 Mbit, %s)\n"; break; case FLASH_INTEL640B: diff --git a/board/atc/u-boot.lds b/board/atc/u-boot.lds index 9d56f13..7ac29a0 100644 --- a/board/atc/u-boot.lds +++ b/board/atc/u-boot.lds @@ -94,6 +94,10 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -116,4 +120,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/bmw/Makefile b/board/bmw/Makefile index 46fe791..621640b 100644 --- a/board/bmw/Makefile +++ b/board/bmw/Makefile @@ -31,7 +31,7 @@ SOBJS = early_init.o $(LIB): .depend $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) ######################################################################### diff --git a/board/bmw/README b/board/bmw/README index 55ef56e..70bc813 100644 --- a/board/bmw/README +++ b/board/bmw/README @@ -20,39 +20,39 @@ onboard the processor module are listed briefly below: 0x00000000 - 0x40000000 - 64MB SDRAM SIMM - (Unregistered PC-100 SDRAM DIMM Module) + (Unregistered PC-100 SDRAM DIMM Module) 0xFF000000 - 0xFF001FFF - M-Systems DiskOnChip (TM) 2000 - TSOP 16MB (MD2211-D16-V3) + TSOP 16MB (MD2211-D16-V3) 0x70000000 - 0x70001FFF - M-Systems DiskOnChip (TM) 2000 - DIP32 (Socketed 16MB - 1GB ) * - NOTE: this is not populated on all systems. + DIP32 (Socketed 16MB - 1GB ) * + NOTE: this is not populated on all systems. 0x7c000000 - 0x7c000000 - Reset Register - (Write 0 to reset) + (Write 0 to reset) 0x7c000001 - 0x7c000001 - System LED - (Clear Bit 7 to turn on, set to shut off) + (Clear Bit 7 to turn on, set to shut off) 0x7c000002 - 0x7c000002 - M48T59 Watchdog IRQ3 - (Clear bit 7 to reset, set to assert IRQ3) + (Clear bit 7 to reset, set to assert IRQ3) 0x7c000003 - 0x7c000003 - M48T59 Write-Protect Register - (Clear bit 7 to make R/W, set to make R/O) + (Clear bit 7 to make R/W, set to make R/O) 0x7c002000 - 0x7c002003 - Infineon OSRAM DLR2416 4 Character - 5x7 Dot Matrix Alphanumeric Display - (Each byte sets the appropriate character) + 5x7 Dot Matrix Alphanumeric Display + (Each byte sets the appropriate character) 0x7c004000 - 0x7c005FF0 - SGS-THOMSON M48T59Y 8K NVRAM/RTC - NVRAM Memory Region + NVRAM Memory Region 0x7c005FF0 - 0x7c005FFF - SGS-THOMSON M48T59Y 8K NVRAM/RTC - Realtime Clock Registers + Realtime Clock Registers 0xFFF00000 - 0xFFF80000 - 512K PLCC32 BootRom - (AMD AM29F040, ST 29W040B) + (AMD AM29F040, ST 29W040B) 0xFFF00100 - System Reset Vector @@ -131,7 +131,6 @@ - DOC Support - (underway) - U-Boot 1.2.0 (Aug 6 2002 - 17:44:48) CPU: MPC8245 Revision 16.20 at 264 MHz: 16 kB I-Cache 16 kB D-Cache @@ -167,15 +166,10 @@ =>boot - - - - - DevTools ======== ELDK - DENX Embedded Linux Development Kit + DENX Embedded Linux Development Kit ROM Emulator Grammar Engine PROMICE P1160-90-AI21E (2MBx8bit, 90ns access time) @@ -187,7 +181,6 @@ WRS/EST VisionICE-II (PPC8240) - =>reset @@ -216,8 +209,8 @@ Filename 'vmlinux.img'. Load address: 0x100000 Loading: ################################################################# - ####################################T ############################# - ###################### + ####################################T ############################# + ###################### done Bytes transferred = 777199 (bdbef hex) @@ -317,7 +310,6 @@ MPC8245/BMW - switch-2 login: root Password: PAM_unix[49]: (login) session opened for user root by LOGIN(uid=0) @@ -328,7 +320,6 @@ MPC8245/BMW - login[49]: ROOT LOGIN on `console' root@switch-2:~# cat /proc/cpuinfo diff --git a/board/bmw/bmw.c b/board/bmw/bmw.c index 2685662..f2d33fc 100644 --- a/board/bmw/bmw.c +++ b/board/bmw/bmw.c @@ -94,9 +94,6 @@ } - - - /* * Initialize PCI Devices, report devices found. */ diff --git a/board/bmw/bmw.h b/board/bmw/bmw.h index 6b7571c..dd97569 100644 --- a/board/bmw/bmw.h +++ b/board/bmw/bmw.h @@ -46,13 +46,13 @@ #define LED_REG_BASE (XROM_BASE_ADDR | 0x2000) #define TOD_BASE (XROM_BASE_ADDR | 0x4000) #define LED_REG(x) (*(volatile unsigned char *) \ - (LED_REG_BASE + (x))) + (LED_REG_BASE + (x))) #define XROM_DEV_SIZE 0x00006000 #define ENET_DEV_BASE 0x80000000 #define PLD_REG(off) (*(volatile unsigned char *)\ - (PLD_REG_BASE + (off))) + (PLD_REG_BASE + (off))) #define PLD_REVID_B1 0x7f /* Fix me */ #define PLD_REVID_B2 0x01 /* Fix me */ diff --git a/board/bmw/config.mk b/board/bmw/config.mk index 7facadf..f991549 100644 --- a/board/bmw/config.mk +++ b/board/bmw/config.mk @@ -28,5 +28,5 @@ TEXT_BASE = 0xFFF00000 # NOTE: The flags below affect how the BCM570x driver is compiled PLATFORM_CPPFLAGS += -DEMBEDDED -DBIG_ENDIAN_HOST -DINCLUDE_5701_AX_FIX=1\ - -DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256\ - -DTEXT_BASE=$(TEXT_BASE) + -DDBG=0 -DT3_JUMBO_RCV_RCB_ENTRY_COUNT=256\ + -DTEXT_BASE=$(TEXT_BASE) diff --git a/board/bmw/early_init.S b/board/bmw/early_init.S index ec20a67..e6400c3 100644 --- a/board/bmw/early_init.S +++ b/board/bmw/early_init.S @@ -16,7 +16,7 @@ .global iommu_setup /* Initialize IO/MMU mappings via BAT method Ch. 7, * PPC Programming Reference - */ + */ iommu_setup: /* initialize the BAT registers (SPRs 528 - 543 */ @@ -64,7 +64,7 @@ BAT marked valid that is in an unknown or transient state */ - addis r5,0,0x0000 + addis r5,0,0x0000 mtibat0u(r5) mtibat0l(r5) mtibat1u(r5) @@ -81,106 +81,106 @@ mtdbat2l(r5) mtdbat3u(r5) mtdbat3l(r5) - isync + isync /* * Set up I/D BAT0 */ - lis r4, CFG_DBAT0L@h - ori r4, r4, CFG_DBAT0L@l - lis r3, CFG_DBAT0U@h - ori r3, r3, CFG_DBAT0U@l + lis r4, CFG_DBAT0L@h + ori r4, r4, CFG_DBAT0L@l + lis r3, CFG_DBAT0U@h + ori r3, r3, CFG_DBAT0U@l - mtdbat0l(r4) - isync - mtdbat0u(r3) - isync - sync + mtdbat0l(r4) + isync + mtdbat0u(r3) + isync + sync - lis r4, CFG_IBAT0L@h - ori r4, r4, CFG_IBAT0L@l - lis r3, CFG_IBAT0U@h - ori r3, r3, CFG_IBAT0U@l + lis r4, CFG_IBAT0L@h + ori r4, r4, CFG_IBAT0L@l + lis r3, CFG_IBAT0U@h + ori r3, r3, CFG_IBAT0U@l - isync - mtibat0l(r4) - isync + isync + mtibat0l(r4) + isync mtibat0u(r3) - isync + isync /* * Set up I/D BAT1 */ - lis r4, CFG_IBAT1L@h - ori r4, r4, CFG_IBAT1L@l - lis r3, CFG_IBAT1U@h - ori r3, r3, CFG_IBAT1U@l + lis r4, CFG_IBAT1L@h + ori r4, r4, CFG_IBAT1L@l + lis r3, CFG_IBAT1U@h + ori r3, r3, CFG_IBAT1U@l - isync - mtibat1l(r4) - isync - mtibat1u(r3) - isync - mtdbat1l(r4) - isync - mtdbat1u(r3) - isync - sync + isync + mtibat1l(r4) + isync + mtibat1u(r3) + isync + mtdbat1l(r4) + isync + mtdbat1u(r3) + isync + sync /* * Set up I/D BAT2 */ - lis r4, CFG_IBAT2L@h - ori r4, r4, CFG_IBAT2L@l - lis r3, CFG_IBAT2U@h - ori r3, r3, CFG_IBAT2U@l + lis r4, CFG_IBAT2L@h + ori r4, r4, CFG_IBAT2L@l + lis r3, CFG_IBAT2U@h + ori r3, r3, CFG_IBAT2U@l - isync - mtibat2l(r4) - isync - mtibat2u(r3) - isync - mtdbat2l(r4) - isync - mtdbat2u(r3) - isync - sync + isync + mtibat2l(r4) + isync + mtibat2u(r3) + isync + mtdbat2l(r4) + isync + mtdbat2u(r3) + isync + sync /* * Setup I/D BAT3 */ - lis r4, CFG_IBAT3L@h - ori r4, r4, CFG_IBAT3L@l - lis r3, CFG_IBAT3U@h - ori r3, r3, CFG_IBAT3U@l + lis r4, CFG_IBAT3L@h + ori r4, r4, CFG_IBAT3L@l + lis r3, CFG_IBAT3U@h + ori r3, r3, CFG_IBAT3U@l - isync - mtibat3l(r4) - isync - mtibat3u(r3) - isync - mtdbat3l(r4) - isync - mtdbat3u(r3) - isync - sync + isync + mtibat3l(r4) + isync + mtibat3u(r3) + isync + mtdbat3l(r4) + isync + mtdbat3u(r3) + isync + sync /* * Invalidate all 64 TLB's */ - lis r3, 0 - mtctr r3 - lis r5, 4 + lis r3, 0 + mtctr r3 + lis r5, 4 tlblp: - tlbie r3 - sync - addi r3, r3, 0x1000 - cmplw r3, r5 - blt tlblp + tlbie r3 + sync + addi r3, r3, 0x1000 + cmplw r3, r5 + blt tlblp - sync + sync /* * Enable Data Translation @@ -193,7 +193,7 @@ isync sync - blr + blr #ifdef USE_V2_INIT @@ -213,8 +213,8 @@ /* MPC8245/BMW CPCI System Init * Jimmy Blair, Broadcom Corp, 2002. */ - mflr r11 - /* Zero-out registers */ + mflr r11 + /* Zero-out registers */ addis r0,r0,0 mtspr SPRG0,r0 @@ -244,7 +244,7 @@ /* Set MPU/MSR to a known state. Turn off FP */ #if 1 /* Turn off floating point (remove to keep FP on) */ - andi. r3, r3, 0 + andi. r3, r3, 0 sync mtmsr r3 isync @@ -368,10 +368,10 @@ rlwinm r3, r4, 0, 21, 19 /* clear the ICFI bit */ /* - * The setting of the instruction cache enable (ICE) bit must be - * preceded by an isync instruction to prevent the cache from being - * enabled or disabled while an instruction access is in progress. - */ + * The setting of the instruction cache enable (ICE) bit must be + * preceded by an isync instruction to prevent the cache from being + * enabled or disabled while an instruction access is in progress. + */ isync writeReg4: mtspr HID0, r4 /* Enable Instr Cache & Inval cache */ @@ -397,13 +397,13 @@ cmp 0,0,r3,r7 beq cr0, X4_KAHLUA_START - /* It's not an 8240, is it an 8245? */ + /* It's not an 8240, is it an 8245? */ LOADPTR (r7, KAHLUA2_ID) /* Kahlua PCI controller ID */ cmp 0,0,r3,r7 beq cr0, X4_KAHLUA_START - /* Save the PCI controller type in r7 */ + /* Save the PCI controller type in r7 */ mr r7, r3 LOADPTR (r5, PREP_REG_ADDR) @@ -433,33 +433,33 @@ LOADPTR (r3, PROC_INT2_ADR) /* Processor I/F Config 2 reg. */ stwbrx r3,0,r5 - lis r4, 0x2000 /* Flush PCI config writes */ + lis r4, 0x2000 /* Flush PCI config writes */ stwbrx r4,0,r6 LOADPTR (r9, KAHLUA2_ID) - cmpl 0, 0, r7, r9 - bne L1not8245 + cmpl 0, 0, r7, r9 + bne L1not8245 - /* MIOCR1 -- turn on bit for DLL delay */ + /* MIOCR1 -- turn on bit for DLL delay */ LOADPTR (r3, MIOCR1_ADR_X) stwbrx r3,0,r5 - li r4, 0x04 + li r4, 0x04 stb r4, MIOCR1_SHIFT(r6) - /* For the MPC8245, set register 77 to %00100000 (see Errata #15) */ - /* SDRAM_CLK_DEL (0x77)*/ + /* For the MPC8245, set register 77 to %00100000 (see Errata #15) */ + /* SDRAM_CLK_DEL (0x77)*/ LOADPTR (r3, MIOCR2_ADR_X) stwbrx r3,0,r5 - li r4, 0x10 + li r4, 0x10 stb r4, MIOCR2_SHIFT(r6) - /* PMCR2 -- set PCI hold delay to <10>b for 33 MHz */ + /* PMCR2 -- set PCI hold delay to <10>b for 33 MHz */ LOADPTR (r3, PMCR2_ADR_X) stwbrx r3,0,r5 - li r4, 0x20 + li r4, 0x20 stb r4, PMCR2_SHIFT(r6) /* Initialize EUMBBAR early since 8245 has internal UART in EUMB */ @@ -471,21 +471,21 @@ L1not8245: - /* Toggle the DLL reset bit in AMBOR */ + /* Toggle the DLL reset bit in AMBOR */ LOADPTR (r3, AMBOR) stwbrx r3,0,r5 lbz r4, 0(r6) - andi. r4, r4, 0xdf + andi. r4, r4, 0xdf stb r4, 0(r6) /* Clear DLL_RESET */ - sync + sync - ori r4, r4, 0x20 /* Set DLL_RESET */ + ori r4, r4, 0x20 /* Set DLL_RESET */ stb r4, 0(r6) - sync + sync - andi. r4, r4, 0xdf + andi. r4, r4, 0xdf stb r4, 0(r6) /* Clear DLL_RESET */ @@ -533,10 +533,10 @@ MC1_MEMGO << 19 | MC1_SREN << 18 | \ MC1_RAM_TYPE << 17 | MC1_PCKEN << 16 ) li r3, MC1_BANKBITS - cmpl 0, 0, r7, r9 /* Check for Kahlua2 */ - bne BankBitsAdd - cmpli 0, 0, r3, 0x5555 - beq K2BankBitsHack /* On 8245, 5555 ==> 0 */ + cmpl 0, 0, r7, r9 /* Check for Kahlua2 */ + bne BankBitsAdd + cmpli 0, 0, r3, 0x5555 + beq K2BankBitsHack /* On 8245, 5555 ==> 0 */ BankBitsAdd: ori r4, r3, 0 K2BankBitsHack: @@ -569,9 +569,9 @@ MC2_INLRD_PARECC_CHK_EN << 18 | \ MC2_ECC_EN << 17 | MC2_EDO << 16 | \ MC2_REFINT << 2 | MC2_RSV_PG << 1 | MC2_RMW_PAR) - cmpl 0, 0, r7, r9 /* Check for Kahlua2 */ - bne notK2 - /* clear Kahlua2 reserved bits */ + cmpl 0, 0, r7, r9 /* Check for Kahlua2 */ + bne notK2 + /* clear Kahlua2 reserved bits */ LOADPTR (r3, 0xfffcffff) and r4, r4, r3 notK2: @@ -599,9 +599,9 @@ MC3_RDLAT << 20 | MC3_CPX << 19 | \ MC3_RAS6P << 15 | MC3_CAS5 << 12 | MC3_CP4 << 9 | \ MC3_CAS3 << 6 | MC3_RCD2 << 3 | MC3_RP1) - cmpl 0, 0, r7, r9 /* Check for Kahlua2 */ - bne notK2b - /* clear Kahlua2 reserved bits */ + cmpl 0, 0, r7, r9 /* Check for Kahlua2 */ + bne notK2b + /* clear Kahlua2 reserved bits */ LOADPTR (r3, 0xff000000) and r4, r4, r3 notK2b: @@ -633,9 +633,9 @@ MC4_REGDIMM << 15 | MC4_SDMODE_CAS << 12 | \ MC4_SDMODE_WRAP << 11 | MC4_SDMODE_BURST << 8 | \ MC4_ACTORW << 4 | MC4_BSTOPRE_L) - cmpl 0, 0, r7, r9 /* Check for Kahlua 2 */ - bne notK2c - /* Turn on Kahlua2 extended ROM space */ + cmpl 0, 0, r7, r9 /* Check for Kahlua 2 */ + bne notK2c + /* Turn on Kahlua2 extended ROM space */ LOADPTR (r3, 0x00200000) or r4, r4, r3 notK2c: @@ -745,13 +745,12 @@ sync eieio - mtlr r11 + mtlr r11 blr #else /* USE_V2_INIT */ - /* U-Boot works, but memory will not run reliably for all address ranges. * Early U-Boot Working init, but 2.4.19 kernel will crash since memory is not * initialized correctly. Could work if debugged. @@ -898,106 +897,106 @@ .globl early_init_f early_init_f: - mflr r11 - lis r10, 0x8000 + mflr r11 + lis r10, 0x8000 - /* PCI Latency Timer */ - li r4, 0x0d - ori r3, r10, PLTR@l - bl __pci_config_write_8 + /* PCI Latency Timer */ + li r4, 0x0d + ori r3, r10, PLTR@l + bl __pci_config_write_8 - /* Cache Line Size */ - li r4, 0x08 - ori r3, r10, PCLSR@l - bl __pci_config_write_8 + /* Cache Line Size */ + li r4, 0x08 + ori r3, r10, PCLSR@l + bl __pci_config_write_8 - /* PCI Cmd */ - li r4, 6 - ori r3, r10, PCICR@l - bl __pci_config_write_16 + /* PCI Cmd */ + li r4, 6 + ori r3, r10, PCICR@l + bl __pci_config_write_16 #if 1 - /* PCI Stat */ - ori r3, r10, PCISR@l - bl __pci_config_read_16 - ori r4, r4, 0xffff - ori r3, r10, PCISR@l - bl __pci_config_write_16 + /* PCI Stat */ + ori r3, r10, PCISR@l + bl __pci_config_read_16 + ori r4, r4, 0xffff + ori r3, r10, PCISR@l + bl __pci_config_write_16 #endif - /* PICR1 */ - lis r4, 0xff14 - ori r4, r4, 0x1b98 - ori r3, r10, PICR1@l - bl __pci_config_write_32 + /* PICR1 */ + lis r4, 0xff14 + ori r4, r4, 0x1b98 + ori r3, r10, PICR1@l + bl __pci_config_write_32 - /* PICR2 */ - lis r4, 0x0404 - ori r4, r4, 0x0004 - ori r3, r10, PICR2@l - bl __pci_config_write_32 + /* PICR2 */ + lis r4, 0x0404 + ori r4, r4, 0x0004 + ori r3, r10, PICR2@l + bl __pci_config_write_32 /* MIOCR1 */ - li r4, 0x04 - ori r3, r10, MIOCR1@l - bl __pci_config_write_8 + li r4, 0x04 + ori r3, r10, MIOCR1@l + bl __pci_config_write_8 /* For the MPC8245, set register 77 to %00100000 (see Errata #15) */ /* SDRAM_CLK_DEL (0x77)*/ - li r4, 0x10 - ori r3, r10, MIOCR2@l - bl __pci_config_write_8 + li r4, 0x10 + ori r3, r10, MIOCR2@l + bl __pci_config_write_8 - /* EUMBBAR */ - lis r4, 0xfc00 - ori r3, r10, EUMBBAR@l - bl __pci_config_write_32 + /* EUMBBAR */ + lis r4, 0xfc00 + ori r3, r10, EUMBBAR@l + bl __pci_config_write_32 /* AMBOR */ /* Even if Address Map B is not being used (though it should), - * the memory DLL needs to be cleared/set/cleared before using memory. + * the memory DLL needs to be cleared/set/cleared before using memory. */ - ori r3, r10, AMBOR@l - bl __pci_config_read_8 /* get Current bits */ + ori r3, r10, AMBOR@l + bl __pci_config_read_8 /* get Current bits */ - andi. r4, r4, 0xffdf - ori r3, r10, AMBOR@l - bl __pci_config_write_16 /* Clear DLL_RESET */ + andi. r4, r4, 0xffdf + ori r3, r10, AMBOR@l + bl __pci_config_write_16 /* Clear DLL_RESET */ - ori r4, r4, 0x0020 - ori r3, r10, AMBOR@l - bl __pci_config_write_16 /* Set DLL_RESET */ + ori r4, r4, 0x0020 + ori r3, r10, AMBOR@l + bl __pci_config_write_16 /* Set DLL_RESET */ - andi. r4, r4, 0xffdf - ori r3, r10, AMBOR@l - bl __pci_config_write_16 /* Clear DLL_RESET */ + andi. r4, r4, 0xffdf + ori r3, r10, AMBOR@l + bl __pci_config_write_16 /* Clear DLL_RESET */ - /* ERCR1 */ - lis r4, 0x8040 /* Enable RCS2, use supplied timings */ - ori r4, r4, 0x8000 - ori r3, r10, ERCR1@l - bl __pci_config_write_32 + /* ERCR1 */ + lis r4, 0x8040 /* Enable RCS2, use supplied timings */ + ori r4, r4, 0x8000 + ori r3, r10, ERCR1@l + bl __pci_config_write_32 - /* ERCR2 */ - lis r4, 0x0000 /* Disable RCS3 parms */ - ori r4, r4, 0x0000 - ori r3, r10, ERCR2@l - bl __pci_config_write_32 + /* ERCR2 */ + lis r4, 0x0000 /* Disable RCS3 parms */ + ori r4, r4, 0x0000 + ori r3, r10, ERCR2@l + bl __pci_config_write_32 - /* ERCR3 */ - lis r4, 0x0000 /* RCS3 at 0x70000000, 64K bytes */ - ori r4, r4, 0x0004 - ori r3, r10, ERCR2@l - bl __pci_config_write_32 + /* ERCR3 */ + lis r4, 0x0000 /* RCS3 at 0x70000000, 64K bytes */ + ori r4, r4, 0x0004 + ori r3, r10, ERCR2@l + bl __pci_config_write_32 /* Preserve memgo bit */ - /* MCCR1 */ + /* MCCR1 */ /* lis r4, 0x75a8 / Safe Local ROM = 11+3 clocks */ - lis r4, 0x75a0 /* Safe Local ROM = 11+3 clocks */ + lis r4, 0x75a0 /* Safe Local ROM = 11+3 clocks */ /* lis r4, 0x73a0 / Fast Local ROM = 7+3 clocks */ /* oris r4, r4, 0x0010 / Burst ROM/Flash enable */ /* oris r4, r4, 0x0004 / Self-refresh enable */ @@ -1005,17 +1004,17 @@ /* ori r4,r4,0xFFFF / 16Mbit 2bank SDRAM */ /* ori r4,r4,0xAAAA / 256Mbit 4bank SDRAM (8245 only) */ /* ori r4,r4,0x5555 / 64Mbit 2bank SDRAM */ - ori r4,r4,0x0000 /* 64Mbit 4bank SDRAM */ + ori r4,r4,0x0000 /* 64Mbit 4bank SDRAM */ - ori r3, r10, MCCR1@l - bl __pci_config_write_32 + ori r3, r10, MCCR1@l + bl __pci_config_write_32 - /* MCCR2 */ + /* MCCR2 */ - lis r4,0x0000 + lis r4,0x0000 /* oris r4,r4,0x4000 / TS_WAIT_TIMER = 3 clocks */ - oris r4,r4,0x1000 /* ASRISE = 8 clocks */ - oris r4,r4,0x0080 /* ASFALL = 8 clocks */ + oris r4,r4,0x1000 /* ASRISE = 8 clocks */ + oris r4,r4,0x0080 /* ASFALL = 8 clocks */ /* oris r4,r4,0x0010 / SDRAM Parity (else ECC) */ /* oris r4,r4,0x0008 / Write parity check */ /* oris r4,r4,0x0004 / SDRAM inline reads */ @@ -1030,143 +1029,142 @@ /* ori r4,r4,0x150c / 100 MHz mem bus = 1347 */ /* ori r4,r4,0x10fc / 83 MHz mem bus = 1087 */ /* ori r4,r4,0x0cc4 / 66 MHz mem bus = 817 */ - ori r4,r4,0x04cc /* 33 MHz mem bus (SAFE) = 307 */ + ori r4,r4,0x04cc /* 33 MHz mem bus (SAFE) = 307 */ /* ori r4,r4,0x0002 / Reserve a page */ /* ori r4,r4,0x0001 / RWM parity */ - ori r3, r10, MCCR2@l - bl __pci_config_write_32 + ori r3, r10, MCCR2@l + bl __pci_config_write_32 - /* MCCR3 */ - lis r4,0x0000 /* BSTOPRE_M = 7 (see A/N) */ - oris r4,r4,0x0500 /* REFREC = 8 clocks */ - ori r3, r10, MCCR3@l - bl __pci_config_write_32 + /* MCCR3 */ + lis r4,0x0000 /* BSTOPRE_M = 7 (see A/N) */ + oris r4,r4,0x0500 /* REFREC = 8 clocks */ + ori r3, r10, MCCR3@l + bl __pci_config_write_32 - /* MCCR4 */ /* Turn on registered buffer mode */ - lis r4, 0x2000 /* PRETOACT = 3 clocks */ - oris r4,r4,0x0400 /* ACTOPRE = 5 clocks */ + /* MCCR4 */ /* Turn on registered buffer mode */ + lis r4, 0x2000 /* PRETOACT = 3 clocks */ + oris r4,r4,0x0400 /* ACTOPRE = 5 clocks */ /* oris r4,r4,0x0080 / Enable 8-beat burst (32-bit bus) */ /* oris r4,r4,0x0040 / Enable Inline ECC/Parity */ - oris r4,r4,0x0020 /* EXTROM enabled */ - oris r4,r4,0x0010 /* Registered buffers */ + oris r4,r4,0x0020 /* EXTROM enabled */ + oris r4,r4,0x0010 /* Registered buffers */ /* oris r4,r4,0x0000 / BSTOPRE_U = 0 (see A/N) */ - oris r4,r4,0x0002 /* DBUS_SIZ[2] (8 bit on RCS1) */ + oris r4,r4,0x0002 /* DBUS_SIZ[2] (8 bit on RCS1) */ /* ori r4,r4,0x8000 / Registered DIMMs */ - ori r4,r4,0x2000 /*CAS Latency (CL=3) (see RDLAT) */ + ori r4,r4,0x2000 /*CAS Latency (CL=3) (see RDLAT) */ /* ori r4,r4,0x2000 / CAS Latency (CL=2) (see RDLAT) */ /* ori r4,r4,0x0300 / Sequential wrap/8-beat burst */ - ori r4,r4,0x0200 /* Sequential wrap/4-beat burst */ - ori r4,r4,0x0030 /* ACTORW = 3 clocks */ - ori r4,r4,0x0009 /* BSTOPRE_L = 9 (see A/N) */ + ori r4,r4,0x0200 /* Sequential wrap/4-beat burst */ + ori r4,r4,0x0030 /* ACTORW = 3 clocks */ + ori r4,r4,0x0009 /* BSTOPRE_L = 9 (see A/N) */ - ori r3, r10, MCCR4@l - bl __pci_config_write_32 + ori r3, r10, MCCR4@l + bl __pci_config_write_32 /* MSAR1 */ - lis r4, 0xc0804000@h - ori r4, r4, 0xc0804000@l - ori r3, r10, MSAR1@l - bl __pci_config_write_32 + lis r4, 0xc0804000@h + ori r4, r4, 0xc0804000@l + ori r3, r10, MSAR1@l + bl __pci_config_write_32 /* MSAR2 */ - lis r4, 0xc0804000@h - ori r4, r4, 0xc0804000@l - ori r3, r10, MSAR2@l - bl __pci_config_write_32 + lis r4, 0xc0804000@h + ori r4, r4, 0xc0804000@l + ori r3, r10, MSAR2@l + bl __pci_config_write_32 /* MESAR1 */ - lis r4, 0x00000000@h - ori r4, r4, 0x00000000@l - ori r3, r10, EMSAR1@l - bl __pci_config_write_32 + lis r4, 0x00000000@h + ori r4, r4, 0x00000000@l + ori r3, r10, EMSAR1@l + bl __pci_config_write_32 /* MESAR2 */ - lis r4, 0x01010101@h - ori r4, r4, 0x01010101@l - ori r3, r10, EMSAR2@l - bl __pci_config_write_32 + lis r4, 0x01010101@h + ori r4, r4, 0x01010101@l + ori r3, r10, EMSAR2@l + bl __pci_config_write_32 /* MEAR1 */ - lis r4, 0xffbf7f3f@h - ori r4, r4, 0xffbf7f3f@l - ori r3, r10, MEAR1@l - bl __pci_config_write_32 + lis r4, 0xffbf7f3f@h + ori r4, r4, 0xffbf7f3f@l + ori r3, r10, MEAR1@l + bl __pci_config_write_32 /* MEAR2 */ - lis r4, 0xffbf7f3f@h - ori r4, r4, 0xffbf7f3f@l - ori r3, r10, MEAR2@l - bl __pci_config_write_32 + lis r4, 0xffbf7f3f@h + ori r4, r4, 0xffbf7f3f@l + ori r3, r10, MEAR2@l + bl __pci_config_write_32 /* MEEAR1 */ - lis r4, 0x00000000@h - ori r4, r4, 0x00000000@l - ori r3, r10, EMEAR1@l - bl __pci_config_write_32 + lis r4, 0x00000000@h + ori r4, r4, 0x00000000@l + ori r3, r10, EMEAR1@l + bl __pci_config_write_32 /* MEEAR2 */ - lis r4, 0x01010101@h - ori r4, r4, 0x01010101@l - ori r3, r10, EMEAR2@l - bl __pci_config_write_32 + lis r4, 0x01010101@h + ori r4, r4, 0x01010101@l + ori r3, r10, EMEAR2@l + bl __pci_config_write_32 /* ODCR */ - li r4, 0x7f - ori r3, r10, ODCR@l - bl __pci_config_write_8 + li r4, 0x7f + ori r3, r10, ODCR@l + bl __pci_config_write_8 /* MBER */ - li r4, 0x01 - ori r3, r10, MBER@l - bl __pci_config_write_8 + li r4, 0x01 + ori r3, r10, MBER@l + bl __pci_config_write_8 - /* Page CTR aka PGMAX */ - li r4, 0x32 - ori r3, r10, 0x70 - bl __pci_config_write_8 + /* Page CTR aka PGMAX */ + li r4, 0x32 + ori r3, r10, 0x70 + bl __pci_config_write_8 #if 0 /* CLK Drive */ - ori r4, r10, 0xfc01 /* Top bit will be ignored */ - ori r3, r10, 0x74 - bl __pci_config_write_16 + ori r4, r10, 0xfc01 /* Top bit will be ignored */ + ori r3, r10, 0x74 + bl __pci_config_write_16 #endif /* delay */ - lis r7, 1 - mtctr r7 + lis r7, 1 + mtctr r7 label1: bdnz label1 - /* Set memgo bit */ - /* MCCR1 */ - ori r3, r10, MCCR1@l - bl __pci_config_read_32 - lis r7, 0x0008 - or r4, r3, r7 - ori r3, r10, MCCR1@l - bl __pci_config_write_32 + /* Set memgo bit */ + /* MCCR1 */ + ori r3, r10, MCCR1@l + bl __pci_config_read_32 + lis r7, 0x0008 + or r4, r3, r7 + ori r3, r10, MCCR1@l + bl __pci_config_write_32 /* delay again */ - lis r7, 1 - mtctr r7 + lis r7, 1 + mtctr r7 label2: bdnz label2 #if 0 /* DEBUG: Infinite loop, write then read */ loop: - lis r7, 0xffff - mtctr r7 - li r3, 0x5004 - lis r4, 0xa0a0 - ori r4, r4, 0x5050 + lis r7, 0xffff + mtctr r7 + li r3, 0x5004 + lis r4, 0xa0a0 + ori r4, r4, 0x5050 bl write_32_ne - li r3, 0x5004 + li r3, 0x5004 bl read_32_ne - bdnz loop + bdnz loop #endif - mtlr r11 - blr + mtlr r11 + blr #endif - diff --git a/board/bmw/flash.c b/board/bmw/flash.c index be62274..e04af97 100644 --- a/board/bmw/flash.c +++ b/board/bmw/flash.c @@ -91,7 +91,6 @@ #endif /* 0 */ - static unsigned long flash_id(unsigned char mfct, unsigned char chip) { @@ -135,7 +134,6 @@ } - unsigned long flash_init(void) { @@ -181,9 +179,9 @@ switch(pflinfo->flash_id & FLASH_TYPEMASK) { case FLASH_AM040: - pflinfo->size = 0x00080000; + pflinfo->size = 0x00080000; pflinfo->sector_count = 8; - for(j = 0; j < 8; j++) + for(j = 0; j < 8; j++) { pflinfo->start[j] = base_address + 0x00010000 * j; pflinfo->protect[j] = flash[(j << 16) | 0x2]; @@ -201,16 +199,16 @@ pflinfo->start[j+3] = base_address + 0x00010000 * j; } #if 0 - /* check for protected sectors */ - for (j = 0; j < pflinfo->sector_count; j++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile FLASH_WORD_SIZE *)(pflinfo->start[j]); - if (pflinfo->flash_id & FLASH_MAN_SST) - pflinfo->protect[j] = 0; - else - pflinfo->protect[j] = addr2[2] & 1; - } + /* check for protected sectors */ + for (j = 0; j < pflinfo->sector_count; j++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr2 = (volatile FLASH_WORD_SIZE *)(pflinfo->start[j]); + if (pflinfo->flash_id & FLASH_MAN_SST) + pflinfo->protect[j] = 0; + else + pflinfo->protect[j] = addr2[2] & 1; + } #endif break; } @@ -245,30 +243,30 @@ int i; /* set up sector start address table */ - if (info->flash_id & FLASH_MAN_SST) - { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } - else + if (info->flash_id & FLASH_MAN_SST) + { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } + else if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } } } @@ -367,7 +365,7 @@ short i; FLASH_WORD_SIZE value; ulong base = (ulong)addr; - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; printf("flash_get_size: \n"); /* Write auto select command: read Manufacturer ID */ @@ -379,123 +377,123 @@ switch (value) { case (FLASH_WORD_SIZE)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; + info->flash_id = FLASH_MAN_AMD; + break; case (FLASH_WORD_SIZE)FUJ_MANUFACT: - info->flash_id = FLASH_MAN_FUJ; - break; + info->flash_id = FLASH_MAN_FUJ; + break; case (FLASH_WORD_SIZE)SST_MANUFACT: - info->flash_id = FLASH_MAN_SST; - break; + info->flash_id = FLASH_MAN_SST; + break; default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ } printf("recognised manufacturer"); value = addr2[ADDR3]; /* device ID */ - debug ("\ndev_code=%x\n", value); + debug ("\ndev_code=%x\n", value); switch (value) { case (FLASH_WORD_SIZE)AMD_ID_LV400T: - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ + info->flash_id += FLASH_AM400T; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV400B: - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ + info->flash_id += FLASH_AM400B; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV800T: - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ + info->flash_id += FLASH_AM800T; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV800B: - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ + info->flash_id += FLASH_AM800B; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV160T: - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ case (FLASH_WORD_SIZE)SST_ID_xF800A: - info->flash_id += FLASH_SST800A; - info->sector_count = 16; - info->size = 0x00100000; - break; /* => 1 MB */ + info->flash_id += FLASH_SST800A; + info->sector_count = 16; + info->size = 0x00100000; + break; /* => 1 MB */ case (FLASH_WORD_SIZE)SST_ID_xF160A: - info->flash_id += FLASH_SST160A; - info->sector_count = 32; - info->size = 0x00200000; - break; /* => 2 MB */ + info->flash_id += FLASH_SST160A; + info->sector_count = 32; + info->size = 0x00200000; + break; /* => 2 MB */ case (FLASH_WORD_SIZE)AMD_ID_F040B: - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 0.5 MB */ + info->flash_id += FLASH_AM040; + info->sector_count = 8; + info->size = 0x00080000; + break; /* => 0.5 MB */ default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ } printf("flash id %lx; sector count %x, size %lx\n", info->flash_id,info->sector_count,info->size); /* set up sector start address table */ - if (info->flash_id & FLASH_MAN_SST) - { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } - else + if (info->flash_id & FLASH_MAN_SST) + { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } + else if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } } /* check for protected sectors */ for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); - if (info->flash_id & FLASH_MAN_SST) - info->protect[i] = 0; - else - info->protect[i] = addr2[2] & 1; + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); + if (info->flash_id & FLASH_MAN_SST) + info->protect[i] = 0; + else + info->protect[i] = addr2[2] & 1; } /* @@ -503,7 +501,7 @@ */ if (info->flash_id != FLASH_UNKNOWN) { addr2 = (FLASH_WORD_SIZE *)info->start[0]; - *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ + *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ } return (info->size); @@ -521,32 +519,32 @@ unsigned char sh8b; if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; } if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; + (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) { + printf ("Can't erase unknown flash type - aborted\n"); + return 1; } prot = 0; for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } + if (info->protect[sect]) { + prot++; + } } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); } else { - printf ("\n"); + printf ("\n"); } l_sect = -1; @@ -568,28 +566,28 @@ /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (FLASH_WORD_SIZE *)(info->start[0] + ( + if (info->protect[sect] == 0) { /* not protected */ + addr = (FLASH_WORD_SIZE *)(info->start[0] + ( (info->start[sect] - info->start[0]) << sh8b)); - if (info->flash_id & FLASH_MAN_SST) - { - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ - udelay(30000); /* wait 30 ms */ - } - else - addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ - l_sect = sect; - } + if (info->flash_id & FLASH_MAN_SST) + { + addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; + addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080; + addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; + addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ + udelay(30000); /* wait 30 ms */ + } + else + addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ + l_sect = sect; + } } /* re-enable interrupts if necessary */ if (flag) - enable_interrupts(); + enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ udelay (1000); @@ -598,22 +596,22 @@ * We wait for the last triggered sector */ if (l_sect < 0) - goto DONE; + goto DONE; start = get_timer (0); last = start; addr = (FLASH_WORD_SIZE *)(info->start[0] + ( (info->start[l_sect] - info->start[0]) << sh8b)); while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - serial_putc ('.'); - last = now; - } + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + serial_putc ('.'); + last = now; + } } DONE: @@ -643,42 +641,42 @@ * handle unaligned start bytes */ if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } + data = 0; + for (i=0, cp=wp; i0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; } /* * handle word aligned part */ while (cnt >= 4) { - data = 0; - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; } if (cnt == 0) { - return (0); + return (0); } /* @@ -686,11 +684,11 @@ */ data = 0; for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; + data = (data << 8) | *src++; + --cnt; } for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + data = (data << 8) | (*(uchar *)cp); } return (write_word(info, wp, data)); @@ -704,12 +702,12 @@ */ static int write_word (flash_info_t *info, ulong dest, ulong data) { - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0]; - volatile FLASH_WORD_SIZE *dest2; - volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0]; + volatile FLASH_WORD_SIZE *dest2; + volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; ulong start; int flag; - int i; + int i; unsigned char sh8b; /* Check the ROM CS */ @@ -723,32 +721,32 @@ /* Check if Flash is (sufficiently) erased */ if ((*dest2 & (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { - return (2); + return (2); } /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) - { - addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00A000A0; + for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) + { + addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; + addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; + addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00A000A0; - dest2[i << sh8b] = data2[i]; + dest2[i << sh8b] = data2[i]; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - return (1); - } - } - } + /* data polling for D7 */ + start = get_timer (0); + while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) != + (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + } return (0); } diff --git a/board/bmw/m48t59y.c b/board/bmw/m48t59y.c index 469f1ad..d72c861 100644 --- a/board/bmw/m48t59y.c +++ b/board/bmw/m48t59y.c @@ -320,4 +320,3 @@ { m48_tod_init(); } - diff --git a/board/bmw/ns16550.c b/board/bmw/ns16550.c index b6b6f4c..b1c28eb 100644 --- a/board/bmw/ns16550.c +++ b/board/bmw/ns16550.c @@ -55,6 +55,3 @@ { return ((com_port->lsr & LSR_DR) != 0); } - - - diff --git a/board/bmw/ns16550.h b/board/bmw/ns16550.h index b80ac02..0b7b389 100644 --- a/board/bmw/ns16550.h +++ b/board/bmw/ns16550.h @@ -78,4 +78,3 @@ unsigned char NS16550_getc(volatile struct NS16550 *com_port); int NS16550_tstc(volatile struct NS16550 *com_port); void NS16550_reinit(volatile struct NS16550 *com_port, int baud_divisor); - diff --git a/board/bmw/u-boot.lds b/board/bmw/u-boot.lds index 5ba99b1..98584dc 100644 --- a/board/bmw/u-boot.lds +++ b/board/bmw/u-boot.lds @@ -103,6 +103,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -126,4 +131,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/bubinga405ep/Makefile b/board/bubinga405ep/Makefile index 12b2fa8..97d6a1e 100644 --- a/board/bubinga405ep/Makefile +++ b/board/bubinga405ep/Makefile @@ -29,7 +29,7 @@ SOBJS = init.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/bubinga405ep/flash.c b/board/bubinga405ep/flash.c index f93dcd4..6a9907c 100644 --- a/board/bubinga405ep/flash.c +++ b/board/bubinga405ep/flash.c @@ -73,8 +73,8 @@ { unsigned long size_b0, size_b1; int i; - uint pbcr; - unsigned long base_b0, base_b1; + uint pbcr; + unsigned long base_b0, base_b1; /* Init: no FLASHes known */ for (i=0; iflash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || + if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || (info->flash_id == FLASH_AM040)){ for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000); - } else { + } else { if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -212,10 +211,10 @@ void flash_print_info (flash_info_t *info) { int i; - int k; - int size; - int erased; - volatile unsigned long *flash; + int k; + int size; + int erased; + volatile unsigned long *flash; if (info->flash_id == FLASH_UNKNOWN) { printf ("missing or unknown FLASH type\n"); @@ -261,24 +260,24 @@ printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; ksector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; + erased = 1; + flash = (volatile unsigned long *)info->start[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kflash_id += FLASH_AM040; + info->flash_id += FLASH_AM040; info->sector_count = 8; info->size = 0x0080000; /* => 512 ko */ break; @@ -423,11 +422,11 @@ } /* set up sector start address table */ - if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || + if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || (info->flash_id == FLASH_AM040)){ for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000); - } else { + } else { if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -458,10 +457,10 @@ info->protect[i] = addr2[4] & 1; #else addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) - info->protect[i] = 0; - else - info->protect[i] = addr2[2] & 1; + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) + info->protect[i] = 0; + else + info->protect[i] = addr2[2] & 1; #endif } @@ -472,9 +471,9 @@ #if 0 /* test-only */ #ifdef CONFIG_ADCIOP addr2 = (volatile unsigned char *)info->start[0]; - addr2[ADDR0] = 0xAA; - addr2[ADDR1] = 0x55; - addr2[ADDR0] = 0xF0; /* reset bank */ + addr2[ADDR0] = 0xAA; + addr2[ADDR1] = 0x55; + addr2[ADDR0] = 0xF0; /* reset bank */ #else addr2 = (FLASH_WORD_SIZE *)info->start[0]; *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ @@ -496,15 +495,15 @@ start = get_timer (0); last = start; while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return -1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc ('.'); - last = now; - } + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return -1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + putc ('.'); + last = now; + } } return 0; } diff --git a/board/bubinga405ep/init.S b/board/bubinga405ep/init.S index 12c51e8..e478525 100644 --- a/board/bubinga405ep/init.S +++ b/board/bubinga405ep/init.S @@ -50,6 +50,6 @@ /* Function: sdram_init */ /* Description: Dummy implementation here - done in C later */ /*----------------------------------------------------------------------------- */ - .globl sdram_init + .globl sdram_init sdram_init: - blr + blr diff --git a/board/bubinga405ep/u-boot.lds b/board/bubinga405ep/u-boot.lds index a1ddd84..3894614 100644 --- a/board/bubinga405ep/u-boot.lds +++ b/board/bubinga405ep/u-boot.lds @@ -121,6 +121,10 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/bubinga405ep/u-boot.lds.debug b/board/bubinga405ep/u-boot.lds.debug index 69b7872..df50b7d 100644 --- a/board/bubinga405ep/u-boot.lds.debug +++ b/board/bubinga405ep/u-boot.lds.debug @@ -144,4 +144,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/c2mon/Makefile b/board/c2mon/Makefile index 35b8428..7a2014d 100644 --- a/board/c2mon/Makefile +++ b/board/c2mon/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/c2mon/u-boot.lds b/board/c2mon/u-boot.lds index 4b0129f..86e587f 100644 --- a/board/c2mon/u-boot.lds +++ b/board/c2mon/u-boot.lds @@ -109,6 +109,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -131,4 +136,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/c2mon/u-boot.lds.debug b/board/c2mon/u-boot.lds.debug index 8dc6d40..f6f7cf4 100644 --- a/board/c2mon/u-boot.lds.debug +++ b/board/c2mon/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/cmi/Makefile b/board/cmi/Makefile index 0a92da8..2324d87 100644 --- a/board/cmi/Makefile +++ b/board/cmi/Makefile @@ -29,7 +29,7 @@ SOBJS := $(LIB): $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/cmi/flash.c b/board/cmi/flash.c index 9c802b9..f7c25f4 100644 --- a/board/cmi/flash.c +++ b/board/cmi/flash.c @@ -458,7 +458,7 @@ if (!(info->flash_id & FLASH_VENDMASK)) { return 4; } - *addr = FLASH_CMD_ERASE_CONFIRM; + *addr = FLASH_CMD_ERASE_CONFIRM; *addr = FLASH_CMD_WRITE; *((vu_short *)dest) = data; @@ -474,7 +474,7 @@ /* wait for error or finish */ while(!(addr[0] & FLASH_STATUS_DONE)){ if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - addr[0] = FLASH_CMD_RESET; + addr[0] = FLASH_CMD_RESET; return (1); } } @@ -505,7 +505,7 @@ start = get_timer (0); while(!(addr[0] & FLASH_STATUS_DONE)){ if (get_timer(start) > CFG_FLASH_ERASE_TOUT) { - printf("Flash protect timeout at address %lx\n", info->start[sector]); + printf("Flash protect timeout at address %lx\n", info->start[sector]); addr[0] = FLASH_CMD_RESET; return (1); } diff --git a/board/cmi/u-boot.lds b/board/cmi/u-boot.lds index 04cc87a..3188801 100644 --- a/board/cmi/u-boot.lds +++ b/board/cmi/u-boot.lds @@ -101,6 +101,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -123,10 +128,10 @@ _end = . ; PROVIDE (end = .); - . = env_start; +/* . = env_start; .ppcenv : { common/environment.o (.ppcenv) } - +*/ } diff --git a/board/cogent/Makefile b/board/cogent/Makefile index 0cf6411..4084c7e 100644 --- a/board/cogent/Makefile +++ b/board/cogent/Makefile @@ -29,7 +29,7 @@ SOBJS := $(LIB): $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/cogent/lcd.c b/board/cogent/lcd.c index 941ea65..c1b4d11 100644 --- a/board/cogent/lcd.c +++ b/board/cogent/lcd.c @@ -112,7 +112,7 @@ lcd_write_command(clp, LCD_CMD_ADD + addr); for (pos = 0; *string != '\0' && pos < linelen; pos++) - lcd_write_data(clp, *string++); + lcd_write_data(clp, *string++); } void @@ -131,7 +131,7 @@ linepos = 0; for (i = 0; i < LCD_LINE_LENGTH; i++) { - lines[0][i] = init_line0[i]; + lines[0][i] = init_line0[i]; lines[1][i] = init_line1[i]; } @@ -157,25 +157,25 @@ linelen--; if (c == '\n') { - lcd_dis(LCD_LINE0, &lines[curline^1][0]); - lcd_dis(LCD_LINE1, &lines[curline][0]); + lcd_dis(LCD_LINE0, &lines[curline^1][0]); + lcd_dis(LCD_LINE1, &lines[curline][0]); - /* Do a line feed */ - curline ^= 1; + /* Do a line feed */ + curline ^= 1; linelen = LCD_LINE_LENGTH; if (heartbeat_active && curline == 0) linelen--; - linepos = 0; + linepos = 0; - for (i = 0; i < linelen; i++) - lines[curline][i] = ' '; + for (i = 0; i < linelen; i++) + lines[curline][i] = ' '; - return; + return; } /* Only allow to be output if there is room on the LCD line */ if (linepos < linelen) - lines[curline][linepos++] = c; + lines[curline][linepos++] = c; } void diff --git a/board/cogent/u-boot.lds b/board/cogent/u-boot.lds index c3474b4..d9a1b68 100644 --- a/board/cogent/u-boot.lds +++ b/board/cogent/u-boot.lds @@ -96,6 +96,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -118,4 +123,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/cogent/u-boot.lds.debug b/board/cogent/u-boot.lds.debug index 22138f8..c0ee849 100644 --- a/board/cogent/u-boot.lds.debug +++ b/board/cogent/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/cpc45/Makefile b/board/cpc45/Makefile index cc66e32..db5a83b 100644 --- a/board/cpc45/Makefile +++ b/board/cpc45/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o plx9030.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/cpc45/cpc45.c b/board/cpc45/cpc45.c index 01067f5..08bff49 100644 --- a/board/cpc45/cpc45.c +++ b/board/cpc45/cpc45.c @@ -26,7 +26,7 @@ #include #include -int sysControlDisplay(int digit, uchar ascii_code); +int sysControlDisplay(int digit, uchar ascii_code); extern void Plx9030Init(void); /* We have to clear the initial data area here. Couldn't have done it @@ -170,4 +170,3 @@ return (0); } - diff --git a/board/cpc45/flash.c b/board/cpc45/flash.c index a289d08..9049235 100644 --- a/board/cpc45/flash.c +++ b/board/cpc45/flash.c @@ -80,7 +80,7 @@ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { - vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE); + vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE); addr[0] = 0x00900090; @@ -97,7 +97,7 @@ { flash_info[i].flash_id = (FLASH_MAN_INTEL & FLASH_VENDMASK) | - (INTEL_ID_28F160F3T & FLASH_TYPEMASK); + (INTEL_ID_28F160F3T & FLASH_TYPEMASK); } else { flash_info[i].flash_id = FLASH_UNKNOWN; @@ -115,12 +115,12 @@ for (j = 0; j < flash_info[i].sector_count; j++) { if (j > 30) { flash_info[i].start[j] = CFG_FLASH_BASE + - i * FLASH_BANK_SIZE + - (MAIN_SECT_SIZE * 31) + (j - 31) * PARAM_SECT_SIZE; + i * FLASH_BANK_SIZE + + (MAIN_SECT_SIZE * 31) + (j - 31) * PARAM_SECT_SIZE; } else { flash_info[i].start[j] = CFG_FLASH_BASE + - i * FLASH_BANK_SIZE + - j * MAIN_SECT_SIZE; + i * FLASH_BANK_SIZE + + j * MAIN_SECT_SIZE; } } size += flash_info[i].size; @@ -131,28 +131,28 @@ #if CFG_MONITOR_BASE >= CFG_FLASH_BASE #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[1]); + CFG_MONITOR_BASE, + CFG_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[1]); #else flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[0]); + CFG_MONITOR_BASE, + CFG_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[0]); #endif #endif #if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR) #if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[1]); + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[1]); #else flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[0]); + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[0]); #endif #endif @@ -275,7 +275,7 @@ while (((addr[0] & 0x00800080) != 0x00800080) || ((addr[1] & 0x00800080) != 0x00800080) ) { if ((now=get_timer(start)) > - CFG_FLASH_ERASE_TOUT) { + CFG_FLASH_ERASE_TOUT) { printf ("Timeout\n"); addr[0] = 0x00B000B0; /* suspend erase */ addr[0] = 0x00FF00FF; /* to read mode */ @@ -335,7 +335,7 @@ for (i = 0, cp = wp; i < l; i++, cp++) { if (i >= 4) { *datah = (*datah << 8) | - ((*datal & 0xFF000000) >> 24); + ((*datal & 0xFF000000) >> 24); } *datal = (*datal << 8) | (*(uchar *)cp); @@ -349,7 +349,7 @@ if (i >= 4) { *datah = (*datah << 8) | - ((*datal & 0xFF000000) >> 24); + ((*datal & 0xFF000000) >> 24); } *datal = (*datal << 8) | tmp; @@ -360,7 +360,7 @@ for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) { if (i >= 4) { *datah = (*datah << 8) | - ((*datal & 0xFF000000) >> 24); + ((*datal & 0xFF000000) >> 24); } *datal = (*datah << 8) | (*(uchar *)cp); @@ -401,7 +401,7 @@ for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) { char tmp; - tmp = *src; + tmp = *src; src++; diff --git a/board/cpc45/plx9030.c b/board/cpc45/plx9030.c index e337bd2..99ec39a 100644 --- a/board/cpc45/plx9030.c +++ b/board/cpc45/plx9030.c @@ -137,7 +137,7 @@ sysOutLong((membaseCsr + P9030_LAS0BA), 0x00000001); /* enable space base */ sysOutLong((membaseCsr + P9030_LAS0RR), 0x0FE00000); /* 2 MByte */ sysOutLong((membaseCsr + P9030_LAS0BRD), 0x51928900); /* 4 wait states */ - sysOutLong((membaseCsr + P9030_CS0BASE), 0x00100001); /* enable 2 MByte */ + sysOutLong((membaseCsr + P9030_CS0BASE), 0x00100001); /* enable 2 MByte */ /* remap CS0 (SRAM) */ pci_write_config_dword(devno, PCI_BASE_ADDRESS_2, SRAM_BASE); @@ -145,7 +145,7 @@ sysOutLong((membaseCsr + P9030_LAS1BA), 0x00400001); /* enable space base */ sysOutLong((membaseCsr + P9030_LAS1RR), 0x0FFFFF00); /* 256 byte */ sysOutLong((membaseCsr + P9030_LAS1BRD), 0x55122900); /* 4 wait states */ - sysOutLong((membaseCsr + P9030_CS1BASE), 0x00400081); /* enable 256 Byte */ + sysOutLong((membaseCsr + P9030_CS1BASE), 0x00400081); /* enable 256 Byte */ /* remap CS1 (ST16552 / CHAN A) */ /* remap CS1 (ST16552 / CHAN A) */ pci_write_config_dword(devno, PCI_BASE_ADDRESS_3, ST16552_A_BASE); @@ -154,7 +154,7 @@ sysOutLong((membaseCsr + P9030_LAS2BA), 0x00800001); /* enable space base */ sysOutLong((membaseCsr + P9030_LAS2RR), 0x0FFFFF00); /* 256 byte */ sysOutLong((membaseCsr + P9030_LAS2BRD), 0x55122900); /* 4 wait states */ - sysOutLong((membaseCsr + P9030_CS2BASE), 0x00800081); /* enable 256 Byte */ + sysOutLong((membaseCsr + P9030_CS2BASE), 0x00800081); /* enable 256 Byte */ /* remap CS2 (ST16552 / CHAN B) */ pci_write_config_dword(devno, PCI_BASE_ADDRESS_4, ST16552_B_BASE); @@ -162,7 +162,7 @@ sysOutLong((membaseCsr + P9030_LAS3BA), 0x00C00001); /* enable space base */ sysOutLong((membaseCsr + P9030_LAS3RR), 0x0FFFFF00); /* 256 byte */ sysOutLong((membaseCsr + P9030_LAS3BRD), 0x55357A80); /* 9 wait states */ - sysOutLong((membaseCsr + P9030_CS3BASE), 0x00C00081); /* enable 256 Byte */ + sysOutLong((membaseCsr + P9030_CS3BASE), 0x00C00081); /* enable 256 Byte */ /* remap CS3 (DISPLAY and BCSR) */ pci_write_config_dword(devno, PCI_BASE_ADDRESS_5, BCSR_BASE); } @@ -171,4 +171,3 @@ { *(ulong*)address = cpu_to_le32(value); } - diff --git a/board/cpc45/u-boot.lds b/board/cpc45/u-boot.lds index 59ddb42..b1807dd 100644 --- a/board/cpc45/u-boot.lds +++ b/board/cpc45/u-boot.lds @@ -103,6 +103,11 @@ _edata = .; PROVIDE (edata = .); + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -126,4 +131,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/cpu86/Makefile b/board/cpu86/Makefile index 35b8428..7a2014d 100644 --- a/board/cpu86/Makefile +++ b/board/cpu86/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/cpu86/u-boot.lds b/board/cpu86/u-boot.lds index 9d56f13..ce6c454 100644 --- a/board/cpu86/u-boot.lds +++ b/board/cpu86/u-boot.lds @@ -94,6 +94,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -116,4 +121,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/cradle/Makefile b/board/cradle/Makefile index b694e10..5a321eb 100644 --- a/board/cradle/Makefile +++ b/board/cradle/Makefile @@ -29,7 +29,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/cradle/config.mk b/board/cradle/config.mk index 2977572..3ffcfe8 100644 --- a/board/cradle/config.mk +++ b/board/cradle/config.mk @@ -1,3 +1,2 @@ TEXT_BASE = 0xa0f08000 #TEXT_BASE = 0 - diff --git a/board/cradle/flash.c b/board/cradle/flash.c index 463026d..e2d174e 100644 --- a/board/cradle/flash.c +++ b/board/cradle/flash.c @@ -45,26 +45,26 @@ { ulong flashbase = 0; flash_info[i].flash_id = - (INTEL_MANUFACT & FLASH_VENDMASK) | - (INTEL_ID_28F128J3 & FLASH_TYPEMASK); + (INTEL_MANUFACT & FLASH_VENDMASK) | + (INTEL_ID_28F128J3 & FLASH_TYPEMASK); flash_info[i].size = FLASH_BANK_SIZE; flash_info[i].sector_count = CFG_MAX_FLASH_SECT; memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); switch (i) { - case 0: - flashbase = PHYS_FLASH_1; - break; - case 1: - flashbase = PHYS_FLASH_2; - break; - default: - panic("configured to many flash banks!\n"); - break; + case 0: + flashbase = PHYS_FLASH_1; + break; + case 1: + flashbase = PHYS_FLASH_2; + break; + default: + panic("configured to many flash banks!\n"); + break; } for (j = 0; j < flash_info[i].sector_count; j++) { - flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE; + flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE; } size += flash_info[i].size; } @@ -72,14 +72,14 @@ /* Protect monitor and environment sectors */ flash_protect(FLAG_PROTECT_SET, - CFG_FLASH_BASE, - CFG_FLASH_BASE + monitor_flash_len - 1, - &flash_info[0]); + CFG_FLASH_BASE, + CFG_FLASH_BASE + monitor_flash_len - 1, + &flash_info[0]); flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[0]); + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[0]); return size; } @@ -94,40 +94,40 @@ { switch (info->flash_id & FLASH_VENDMASK) { - case (INTEL_MANUFACT & FLASH_VENDMASK): - printf("Intel: "); - break; - default: - printf("Unknown Vendor "); - break; + case (INTEL_MANUFACT & FLASH_VENDMASK): + printf("Intel: "); + break; + default: + printf("Unknown Vendor "); + break; } switch (info->flash_id & FLASH_TYPEMASK) { - case (INTEL_ID_28F320J3A & FLASH_TYPEMASK): - printf("28F320J3A (32Mbit)\n"); - break; - case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): - printf("28F128J3 (128Mbit)\n"); - break; - default: - printf("Unknown Chip Type\n"); - goto Done; - break; + case (INTEL_ID_28F320J3A & FLASH_TYPEMASK): + printf("28F320J3A (32Mbit)\n"); + break; + case (INTEL_ID_28F128J3 & FLASH_TYPEMASK): + printf("28F128J3 (128Mbit)\n"); + break; + default: + printf("Unknown Chip Type\n"); + goto Done; + break; } printf(" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); + info->size >> 20, info->sector_count); printf(" Sector Start Addresses:"); for (i = 0; i < info->sector_count; i++) { - if ((i % 5) == 0) - { - printf ("\n "); - } - printf (" %08lX%s", info->start[i], - info->protect[i] ? " (RO)" : " "); + if ((i % 5) == 0) + { + printf ("\n "); + } + printf (" %08lX%s", info->start[i], + info->protect[i] ? " (RO)" : " "); } printf ("\n"); info++; @@ -145,25 +145,25 @@ int rc = ERR_OK; if (info->flash_id == FLASH_UNKNOWN) - return ERR_UNKNOWN_FLASH_TYPE; + return ERR_UNKNOWN_FLASH_TYPE; if ((s_first < 0) || (s_first > s_last)) { - return ERR_INVAL; + return ERR_INVAL; } if ((info->flash_id & FLASH_VENDMASK) != - (INTEL_MANUFACT & FLASH_VENDMASK)) { - return ERR_UNKNOWN_FLASH_VENDOR; + (INTEL_MANUFACT & FLASH_VENDMASK)) { + return ERR_UNKNOWN_FLASH_VENDOR; } prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { - prot++; + prot++; } } if (prot) - return ERR_PROTECTED; + return ERR_PROTECTED; /* * Disable interrupts which might cause a timeout @@ -183,24 +183,24 @@ reset_timer_masked(); if (info->protect[sect] == 0) { /* not protected */ - vu_short *addr = (vu_short *)(info->start[sect]); + vu_short *addr = (vu_short *)(info->start[sect]); - *addr = 0x20; /* erase setup */ - *addr = 0xD0; /* erase confirm */ + *addr = 0x20; /* erase setup */ + *addr = 0xD0; /* erase confirm */ - while ((*addr & 0x80) != 0x80) { - if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) { - *addr = 0xB0; /* suspend erase */ - *addr = 0xFF; /* reset to read mode */ - rc = ERR_TIMOUT; - goto outahere; - } - } + while ((*addr & 0x80) != 0x80) { + if (get_timer_masked() > CFG_FLASH_ERASE_TOUT) { + *addr = 0xB0; /* suspend erase */ + *addr = 0xFF; /* reset to read mode */ + rc = ERR_TIMOUT; + goto outahere; + } + } - /* clear status register command */ - *addr = 0x50; - /* reset to read mode */ - *addr = 0xFF; + /* clear status register command */ + *addr = 0x50; + /* reset to read mode */ + *addr = 0xFF; } printf("ok.\n"); } @@ -258,30 +258,30 @@ while(((val = *addr) & 0x80) != 0x80) { if (get_timer_masked() > CFG_FLASH_WRITE_TOUT) { - rc = ERR_TIMOUT; - /* suspend program command */ - *addr = 0xB0; - goto outahere; + rc = ERR_TIMOUT; + /* suspend program command */ + *addr = 0xB0; + goto outahere; } } if(val & 0x1A) { /* check for error */ printf("\nFlash write error %02x at address %08lx\n", - (int)val, (unsigned long)dest); + (int)val, (unsigned long)dest); if(val & (1<<3)) { - printf("Voltage range error.\n"); - rc = ERR_PROG_ERROR; - goto outahere; + printf("Voltage range error.\n"); + rc = ERR_PROG_ERROR; + goto outahere; } if(val & (1<<1)) { - printf("Device protect error.\n"); - rc = ERR_PROTECTED; - goto outahere; + printf("Device protect error.\n"); + rc = ERR_PROTECTED; + goto outahere; } if(val & (1<<4)) { - printf("Programming error.\n"); - rc = ERR_PROG_ERROR; - goto outahere; + printf("Programming error.\n"); + rc = ERR_PROG_ERROR; + goto outahere; } rc = ERR_PROG_ERROR; goto outahere; @@ -317,19 +317,19 @@ { data = 0; for (i=0, cp=wp; i> 8) | (*(uchar *)cp << 8); + data = (data >> 8) | (*(uchar *)cp << 8); } for (; i<2 && cnt>0; ++i) { - data = (data >> 8) | (*src++ << 8); - --cnt; - ++cp; + data = (data >> 8) | (*src++ << 8); + --cnt; + ++cp; } for (; cnt==0 && i<2; ++i, ++cp) { - data = (data >> 8) | (*(uchar *)cp << 8); + data = (data >> 8) | (*(uchar *)cp << 8); } if ((rc = write_word(info, wp, data)) != 0) { - return (rc); + return (rc); } wp += 2; } @@ -340,7 +340,7 @@ while (cnt >= 2) { data = *((vu_short*)src); if ((rc = write_word(info, wp, data)) != 0) { - return (rc); + return (rc); } src += 2; wp += 2; diff --git a/board/cradle/memsetup.S b/board/cradle/memsetup.S index 2f1e042..8800cb0 100644 --- a/board/cradle/memsetup.S +++ b/board/cradle/memsetup.S @@ -170,8 +170,8 @@ SET_LED 2 mem_init: - @ get memory controller base address - ldr r1, =MEMC_BASE + @ get memory controller base address + ldr r1, =MEMC_BASE @**************************************************************************** diff --git a/board/cradle/u-boot.lds b/board/cradle/u-boot.lds index 46beb15..d321b62 100644 --- a/board/cradle/u-boot.lds +++ b/board/cradle/u-boot.lds @@ -26,30 +26,35 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/pxa/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); + . = ALIGN(4); bss_start = .; - .bss : { *(.bss) } + .bss : { *(.bss) } bss_end = .; armboot_end = .; + } diff --git a/board/cray/L1/L1.c b/board/cray/L1/L1.c index b1e2783..af0456d 100644 --- a/board/cray/L1/L1.c +++ b/board/cray/L1/L1.c @@ -25,9 +25,6 @@ #include #include <405gp_i2c.h> #include -#include -#include -#include #include #include #include @@ -249,7 +246,7 @@ *p = 0xaaaaaaaa; for (p = pstart; p < pend; p++) { if (*p != 0xaaaaaaaa) { - printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", + printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", (uint) p, *p, 0xaaaaaaaa); return 1; } @@ -259,7 +256,7 @@ *p = 0x55555555; for (p = pstart; p < pend; p++) { if (*p != 0x55555555) { - printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", + printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", (uint) p, *p, 0x55555555); return 1; } @@ -269,7 +266,7 @@ *p = (unsigned)p; for (p = pstart; p < pend; p++) { if (*p != (unsigned)p) { - printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", + printf ("SDRAM test fails at: %08x, was %08x expected %08x\n", (uint) p, *p, (uint)p); return 1; } diff --git a/board/cray/L1/Makefile b/board/cray/L1/Makefile index e7dc0a8..bfe0922 100644 --- a/board/cray/L1/Makefile +++ b/board/cray/L1/Makefile @@ -26,7 +26,7 @@ LIB = lib$(BOARD).a OBJS = $(BOARD).o flash.o -SOBJS = init.o +SOBJS = init.o # HACK: depend needs bootscript.c, which needs tools/mkimage, which is not # built in the depend stage. So... put bootscript.o here, not in OBJS diff --git a/board/cray/L1/flash.c b/board/cray/L1/flash.c index 829dbae..f313274 100644 --- a/board/cray/L1/flash.c +++ b/board/cray/L1/flash.c @@ -99,7 +99,6 @@ } - /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info) @@ -116,10 +115,10 @@ void flash_print_info (flash_info_t *info) { int i; - int k; - int size; - int erased; - volatile unsigned long *flash; + int k; + int size; + int erased; + volatile unsigned long *flash; if (info->flash_id == FLASH_UNKNOWN) { printf ("missing or unknown FLASH type\n"); @@ -143,24 +142,24 @@ printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; ksector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; + erased = 1; + flash = (volatile unsigned long *)info->start[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kstart[i]); - info->protect[i] = addr2[2] & 1; + info->protect[i] = addr2[2] & 1; } /* @@ -254,15 +253,15 @@ start = get_timer (0); last = start; while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return -1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc ('.'); - last = now; - } + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return -1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + putc ('.'); + last = now; + } } return 0; } @@ -427,42 +426,42 @@ */ static int write_word (flash_info_t *info, ulong dest, ulong data) { - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); - volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; - volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); + volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; + volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; ulong start; int flag; - int i; + int i; /* Check if Flash is (sufficiently) erased */ if ((*((volatile FLASH_WORD_SIZE *)dest) & - (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { + (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { return (2); } /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) - { - addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; + for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) + { + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; - dest2[i] = data2[i]; + dest2[i] = data2[i]; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - return (1); - } - } - } + /* data polling for D7 */ + start = get_timer (0); + while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != + (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + } return (0); } diff --git a/board/cray/L1/init.S b/board/cray/L1/init.S index acc5205..72a10d3 100644 --- a/board/cray/L1/init.S +++ b/board/cray/L1/init.S @@ -52,53 +52,53 @@ /* control registers to set that up are determined by what we've */ /* empirically discovered work there. */ - .globl ext_bus_cntlr_init + .globl ext_bus_cntlr_init ext_bus_cntlr_init: - mflr r4 /* save link register */ - bl ..getAddr + mflr r4 /* save link register */ + bl ..getAddr ..getAddr: - mflr r3 /* get address of ..getAddr */ - mtlr r4 /* restore link register */ - addi r4,0,14 /* set ctr to 10; used to prefetch */ - mtctr r4 /* 10 cache lines to fit this function */ - /* in cache (gives us 8x10=80 instrctns) */ + mflr r3 /* get address of ..getAddr */ + mtlr r4 /* restore link register */ + addi r4,0,14 /* set ctr to 10; used to prefetch */ + mtctr r4 /* 10 cache lines to fit this function */ + /* in cache (gives us 8x10=80 instrctns) */ ..ebcloop: - icbt r0,r3 /* prefetch cache line for addr in r3 */ - addi r3,r3,32 /* move to next cache line */ - bdnz ..ebcloop /* continue for 10 cache lines */ + icbt r0,r3 /* prefetch cache line for addr in r3 */ + addi r3,r3,32 /* move to next cache line */ + bdnz ..ebcloop /* continue for 10 cache lines */ - /*------------------------------------------------------------------- */ - /* Delay to ensure all accesses to ROM are complete before changing */ + /*------------------------------------------------------------------- */ + /* Delay to ensure all accesses to ROM are complete before changing */ /* bank 0 timings. 200usec should be enough. */ - /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ - /*------------------------------------------------------------------- */ + /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ + /*------------------------------------------------------------------- */ addis r3,0,0x0 - ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ - mtctr r3 + ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ + mtctr r3 ..spinlp: - bdnz ..spinlp /* spin loop */ + bdnz ..spinlp /* spin loop */ - /*---------------------------------------------------------------------- */ - /* Peripheral Bank 0 (Flash) initialization */ - /*---------------------------------------------------------------------- */ + /*---------------------------------------------------------------------- */ + /* Peripheral Bank 0 (Flash) initialization */ + /*---------------------------------------------------------------------- */ /* 0x7F8FFE80 slowest boot */ - addi r4,0,pb0ap - mtdcr ebccfga,r4 - addis r4,0,0x9B01 - ori r4,r4,0x5480 - mtdcr ebccfgd,r4 + addi r4,0,pb0ap + mtdcr ebccfga,r4 + addis r4,0,0x9B01 + ori r4,r4,0x5480 + mtdcr ebccfgd,r4 - addi r4,0,pb0cr - mtdcr ebccfga,r4 - addis r4,0,0xFFC5 /* BAS=0xFFC,BS=0x4(4MB),BU=0x3(R/W), */ - ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ - mtdcr ebccfgd,r4 + addi r4,0,pb0cr + mtdcr ebccfga,r4 + addis r4,0,0xFFC5 /* BAS=0xFFC,BS=0x4(4MB),BU=0x3(R/W), */ + ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ + mtdcr ebccfgd,r4 - blr + blr - /*---------------------------------------------------------------------- */ - /* Peripheral Bank 1 (NVRAM/RTC) initialization */ + /*---------------------------------------------------------------------- */ + /* Peripheral Bank 1 (NVRAM/RTC) initialization */ /* CRAY:the L1 has NOT this bank, it is tied to SV2/IOCA/etc/ instead */ /* and we do DMA on it. The ConfigurationRegister part is threfore */ /* almost arbitrary, except that our linux driver needs to know the */ @@ -119,21 +119,21 @@ /* ByteEnableMode BEM=0 */ /* ParityEnable PEN=0 */ /* all reserved bits=0 */ - /*---------------------------------------------------------------------- */ - /*---------------------------------------------------------------------- */ - addi r4,0,pb1ap - mtdcr ebccfga,r4 - addis r4,0,0x0185 /* hiword */ - ori r4,r4,0x4380 /* loword */ - mtdcr ebccfgd,r4 + /*---------------------------------------------------------------------- */ + /*---------------------------------------------------------------------- */ + addi r4,0,pb1ap + mtdcr ebccfga,r4 + addis r4,0,0x0185 /* hiword */ + ori r4,r4,0x4380 /* loword */ + mtdcr ebccfgd,r4 - addi r4,0,pb1cr - mtdcr ebccfga,r4 - addis r4,0,0xF001 /* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W), */ - ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ - mtdcr ebccfgd,r4 + addi r4,0,pb1cr + mtdcr ebccfga,r4 + addis r4,0,0xF001 /* BAS=0xF00,BS=0x0(1MB),BU=0x3(R/W), */ + ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ + mtdcr ebccfgd,r4 - blr + blr /*----------------------------------------------------------------------------- */ /* Function: sdram_init */ @@ -141,7 +141,7 @@ /* NOTE: for CrayL1 we have ECC memory, so enable it. */ /*....now done in C in L1.c:init_sdram for readability. */ /*----------------------------------------------------------------------------- */ - .globl sdram_init + .globl sdram_init sdram_init: blr diff --git a/board/cray/L1/u-boot.lds b/board/cray/L1/u-boot.lds index a709158..88c880e 100644 --- a/board/cray/L1/u-boot.lds +++ b/board/cray/L1/u-boot.lds @@ -121,6 +121,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/cray/L1/u-boot.lds.debug b/board/cray/L1/u-boot.lds.debug index f4f9743..d483424 100644 --- a/board/cray/L1/u-boot.lds.debug +++ b/board/cray/L1/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/csb226/Makefile b/board/csb226/Makefile index e6bf4ea..ac94642 100644 --- a/board/csb226/Makefile +++ b/board/csb226/Makefile @@ -29,7 +29,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/csb226/config.mk b/board/csb226/config.mk index 939ffff..2354392 100644 --- a/board/csb226/config.mk +++ b/board/csb226/config.mk @@ -13,4 +13,3 @@ # for the addresses _after_ relocation to RAM!! Otherwhise the # .bss segment is assumed in flash... TEXT_BASE = 0xa1fe0000 - diff --git a/board/csb226/csb226.c b/board/csb226/csb226.c index a79d168..bf9b4f8 100644 --- a/board/csb226/csb226.c +++ b/board/csb226/csb226.c @@ -32,15 +32,15 @@ # define SHOW_BOOT_PROGRESS(arg) #endif -/** +/** * misc_init_r: - misc initialisation routines */ int misc_init_r(void) { -#if 0 +#if 0 uchar *str; - + /* determine if the software update key is pressed during startup */ /* not ported yet... */ if (GPLR0 & 0x00000800) { @@ -52,15 +52,15 @@ } setenv("bootcmd",str); -#endif +#endif return 0; -} +} -/** +/** * board_init: - setup some data structures * - * @return: 0 in case of success + * @return: 0 in case of success */ int board_init (void) @@ -80,7 +80,7 @@ } -/** +/** * dram_init: - setup dynamic RAM * * @return: 0 in case of success @@ -97,7 +97,7 @@ } -/** +/** * csb226_set_led: - switch LEDs on or off * * @param led: LED to switch (0,1,2) @@ -108,26 +108,26 @@ { switch(led) { - case 0: if (state==1) { - GPCR0 |= CSB226_USER_LED0; + case 0: if (state==1) { + GPCR0 |= CSB226_USER_LED0; } else if (state==0) { GPSR0 |= CSB226_USER_LED0; } break; case 1: if (state==1) { - GPCR0 |= CSB226_USER_LED1; - } else if (state==0) { - GPSR0 |= CSB226_USER_LED1; - } - break; + GPCR0 |= CSB226_USER_LED1; + } else if (state==0) { + GPSR0 |= CSB226_USER_LED1; + } + break; case 2: if (state==1) { - GPCR0 |= CSB226_USER_LED2; - } else if (state==0) { - GPSR0 |= CSB226_USER_LED2; - } - break; + GPCR0 |= CSB226_USER_LED2; + } else if (state==0) { + GPSR0 |= CSB226_USER_LED2; + } + break; } return; @@ -137,10 +137,10 @@ /** * show_boot_progress: - indicate state of the boot process * - * @param status: Status number - see README for details. + * @param status: Status number - see README for details. * - * The CSB226 does only have 3 LEDs, so we switch them on at the most - * important states (1, 5, 15). + * The CSB226 does only have 3 LEDs, so we switch them on at the most + * important states (1, 5, 15). */ void show_boot_progress (int status) @@ -153,4 +153,3 @@ return; } - diff --git a/board/csb226/flash.c b/board/csb226/flash.c index 0ee78e6..9801773 100644 --- a/board/csb226/flash.c +++ b/board/csb226/flash.c @@ -7,7 +7,7 @@ * Marius Groeger * * (C) Copyright 2002 - * Robert Schwebel, Pengutronix, + * Robert Schwebel, Pengutronix, * * See file CREDITS for list of people who contributed to this * project. @@ -89,7 +89,7 @@ /** * flash_print_info: - print information about the flash situation * - * @param info: + * @param info: */ void flash_print_info (flash_info_t *info) @@ -118,13 +118,13 @@ return; } - printf(" Size: %ld MB in %d Sectors\n", + printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); printf(" Sector Start Addresses:"); for (i = 0; i < info->sector_count; i++) { if ((i % 5) == 0) printf ("\n "); - + printf (" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " "); } @@ -153,7 +153,7 @@ if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK)) return ERR_UNKNOWN_FLASH_VENDOR; - + prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) prot++; @@ -203,7 +203,7 @@ *addr = 0x00FF00FF; /* resest to read mode */ } - + printf("ok.\n"); } @@ -222,10 +222,10 @@ /** * write_word: - copy memory to flash - * + * * @param info: * @param dest: - * @param data: + * @param data: * @return: */ @@ -301,8 +301,8 @@ /** * write_buf: - Copy memory to flash. - * - * @param info: + * + * @param info: * @param src: source of copy transaction * @param addr: where to copy to * @param cnt: number of bytes to copy @@ -372,4 +372,3 @@ return write_word(info, wp, data); } - diff --git a/board/csb226/memsetup.S b/board/csb226/memsetup.S index 60f9d50..68577ca 100644 --- a/board/csb226/memsetup.S +++ b/board/csb226/memsetup.S @@ -159,7 +159,7 @@ mem_init: - ldr r1, =MEMC_BASE /* get memory controller base addr. */ + ldr r1, =MEMC_BASE /* get memory controller base addr. */ /* ---------------------------------------------------------------- */ /* Step 2a: Initialize Asynchronous static memory controller */ @@ -167,65 +167,65 @@ /* MSC registers: timing, bus width, mem type */ - /* MSC0: nCS(0,1) */ - ldr r2, =CFG_MSC0_VAL - str r2, [r1, #MSC0_OFFSET] - ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ + /* MSC0: nCS(0,1) */ + ldr r2, =CFG_MSC0_VAL + str r2, [r1, #MSC0_OFFSET] + ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ /* that data latches */ - /* MSC1: nCS(2,3) */ - ldr r2, =CFG_MSC1_VAL - str r2, [r1, #MSC1_OFFSET] - ldr r2, [r1, #MSC1_OFFSET] + /* MSC1: nCS(2,3) */ + ldr r2, =CFG_MSC1_VAL + str r2, [r1, #MSC1_OFFSET] + ldr r2, [r1, #MSC1_OFFSET] /* MSC2: nCS(4,5) */ - ldr r2, =CFG_MSC2_VAL - str r2, [r1, #MSC2_OFFSET] - ldr r2, [r1, #MSC2_OFFSET] + ldr r2, =CFG_MSC2_VAL + str r2, [r1, #MSC2_OFFSET] + ldr r2, [r1, #MSC2_OFFSET] /* ---------------------------------------------------------------- */ /* Step 2b: Initialize Card Interface */ /* ---------------------------------------------------------------- */ /* MECR: Memory Expansion Card Register */ - ldr r2, =CFG_MECR_VAL - str r2, [r1, #MECR_OFFSET] + ldr r2, =CFG_MECR_VAL + str r2, [r1, #MECR_OFFSET] ldr r2, [r1, #MECR_OFFSET] /* MCMEM0: Card Interface slot 0 timing */ - ldr r2, =CFG_MCMEM0_VAL - str r2, [r1, #MCMEM0_OFFSET] + ldr r2, =CFG_MCMEM0_VAL + str r2, [r1, #MCMEM0_OFFSET] ldr r2, [r1, #MCMEM0_OFFSET] - /* MCMEM1: Card Interface slot 1 timing */ - ldr r2, =CFG_MCMEM1_VAL - str r2, [r1, #MCMEM1_OFFSET] + /* MCMEM1: Card Interface slot 1 timing */ + ldr r2, =CFG_MCMEM1_VAL + str r2, [r1, #MCMEM1_OFFSET] ldr r2, [r1, #MCMEM1_OFFSET] /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ - ldr r2, =CFG_MCATT0_VAL - str r2, [r1, #MCATT0_OFFSET] + ldr r2, =CFG_MCATT0_VAL + str r2, [r1, #MCATT0_OFFSET] ldr r2, [r1, #MCATT0_OFFSET] /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ - ldr r2, =CFG_MCATT1_VAL - str r2, [r1, #MCATT1_OFFSET] + ldr r2, =CFG_MCATT1_VAL + str r2, [r1, #MCATT1_OFFSET] ldr r2, [r1, #MCATT1_OFFSET] /* MCIO0: Card Interface I/O Space Timing, slot 0 */ - ldr r2, =CFG_MCIO0_VAL - str r2, [r1, #MCIO0_OFFSET] + ldr r2, =CFG_MCIO0_VAL + str r2, [r1, #MCIO0_OFFSET] ldr r2, [r1, #MCIO0_OFFSET] /* MCIO1: Card Interface I/O Space Timing, slot 1 */ - ldr r2, =CFG_MCIO1_VAL - str r2, [r1, #MCIO1_OFFSET] + ldr r2, =CFG_MCIO1_VAL + str r2, [r1, #MCIO1_OFFSET] ldr r2, [r1, #MCIO1_OFFSET] /* ---------------------------------------------------------------- */ - /* Step 2c: Write FLYCNFG FIXME: what's that??? */ - /* ---------------------------------------------------------------- */ + /* Step 2c: Write FLYCNFG FIXME: what's that??? */ + /* ---------------------------------------------------------------- */ - /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */ + /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */ adr r3, mem_init /* r0 <- current position of code */ ldr r2, =mem_init cmp r3, r2 /* skip init if in place */ @@ -233,8 +233,8 @@ /* ---------------------------------------------------------------- */ - /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ - /* ---------------------------------------------------------------- */ + /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ + /* ---------------------------------------------------------------- */ /* Before accessing MDREFR we need a valid DRI field, so we set */ /* this to power on defaults + DRI field. */ @@ -246,7 +246,7 @@ orr r4, r4, r3 str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + ldr r4, [r1, #MDREFR_OFFSET] /* ---------------------------------------------------------------- */ @@ -262,9 +262,9 @@ /* FIXME: we use async mode for now */ - /* ---------------------------------------------------------------- */ - /* Step 4: Initialize SDRAM */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ + /* Step 4: Initialize SDRAM */ + /* ---------------------------------------------------------------- */ /* Step 4a: assert MDREFR:K?RUN and configure */ /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */ @@ -277,16 +277,16 @@ bic r4, r4, #(MDREFR_SLFRSH) - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4c: assert MDREFR:E1PIN and E0PIO */ orr r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN) - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */ @@ -295,8 +295,8 @@ ldr r4, =CFG_MDCNFG_VAL bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1) - str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ - ldr r4, [r1, #MDCNFG_OFFSET] + str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ + ldr r4, [r1, #MDCNFG_OFFSET] /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */ @@ -345,8 +345,8 @@ /* Step 4h: Write MDMRS. */ - ldr r2, =CFG_MDMRS_VAL - str r2, [r1, #MDMRS_OFFSET] + ldr r2, =CFG_MDMRS_VAL + str r2, [r1, #MDMRS_OFFSET] /* We are finished with Intel's memory controller initialisation */ @@ -357,17 +357,17 @@ initirqs: - mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ - ldr r2, =ICLR - str r1, [r2] + mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ + ldr r2, =ICLR + str r1, [r2] - ldr r2, =ICMR /* mask all interrupts at the controller */ - str r1, [r2] + ldr r2, =ICMR /* mask all interrupts at the controller */ + str r1, [r2] - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* Clock initialisation */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ initclks: @@ -376,34 +376,34 @@ /* Turn Off ALL on-chip peripheral clocks for re-configuration */ /* Note: See label 'ENABLECLKS' for the re-enabling */ - ldr r1, =CKEN - mov r2, #0 - str r2, [r1] + ldr r1, =CKEN + mov r2, #0 + str r2, [r1] - /* default value in case no valid rotary switch setting is found */ - ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ + /* default value in case no valid rotary switch setting is found */ + ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ - /* ... and write the core clock config register */ - ldr r1, =CCCR - str r2, [r1] + /* ... and write the core clock config register */ + ldr r1, =CCCR + str r2, [r1] /* enable the 32Khz oscillator for RTC and PowerManager */ /* - ldr r1, =OSCC - mov r2, #OSCC_OON - str r2, [r1] + ldr r1, =OSCC + mov r2, #OSCC_OON + str r2, [r1] */ /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ /* has settled. */ 60: - ldr r2, [r1] - ands r2, r2, #1 - beq 60b + ldr r2, [r1] + ands r2, r2, #1 + beq 60b /* ---------------------------------------------------------------- */ /* */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* Save SDRAM size */ ldr r1, =DRAM_SIZE @@ -428,11 +428,10 @@ mcr p14,0,r0,c10,c0,0 /* dcsr */ #endif - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* End memsetup */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ endmemsetup: mov pc, lr - diff --git a/board/csb226/u-boot.lds b/board/csb226/u-boot.lds index 46beb15..4c4cabf 100644 --- a/board/csb226/u-boot.lds +++ b/board/csb226/u-boot.lds @@ -26,29 +26,33 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/pxa/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); + . = ALIGN(4); bss_start = .; - .bss : { *(.bss) } + .bss : { *(.bss) } bss_end = .; armboot_end = .; diff --git a/board/cu824/Makefile b/board/cu824/Makefile index 35b8428..7a2014d 100644 --- a/board/cu824/Makefile +++ b/board/cu824/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/cu824/README b/board/cu824/README index d38c48e..cc0d207 100644 --- a/board/cu824/README +++ b/board/cu824/README @@ -38,7 +38,7 @@ bootm - boot application image from memory bootp - boot image via network using BootP/TFTP protocol tftpboot- boot image via network using TFTP protocol - and env variables ipaddr and serverip + and env variables ipaddr and serverip rarpboot- boot image via network using RARP/TFTP protocol bootd - boot default, i.e., run 'bootcmd' loads - load S-Record file over serial line diff --git a/board/cu824/flash.c b/board/cu824/flash.c index 61b759e..7368176 100644 --- a/board/cu824/flash.c +++ b/board/cu824/flash.c @@ -76,7 +76,7 @@ DEBUGF("Write protect is: 0x%02X\n", *bcr); for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { - vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE); + vu_long *addr = (vu_long *)(CFG_FLASH_BASE + i * FLASH_BANK_SIZE); addr[0] = 0x00900090; @@ -91,7 +91,7 @@ (addr[2] == addr[3]) && (addr[2] == INTEL_ID_28F160F3B)) { flash_info[i].flash_id = (FLASH_MAN_INTEL & FLASH_VENDMASK) | - (INTEL_ID_28F160F3B & FLASH_TYPEMASK); + (INTEL_ID_28F160F3B & FLASH_TYPEMASK); } else { flash_info[i].flash_id = FLASH_UNKNOWN; addr[0] = 0xFFFFFFFF; @@ -108,12 +108,12 @@ for (j = 0; j < flash_info[i].sector_count; j++) { if (j <= 7) { flash_info[i].start[j] = CFG_FLASH_BASE + - i * FLASH_BANK_SIZE + - j * PARAM_SECT_SIZE; + i * FLASH_BANK_SIZE + + j * PARAM_SECT_SIZE; } else { flash_info[i].start[j] = CFG_FLASH_BASE + - i * FLASH_BANK_SIZE + - (j - 7)*MAIN_SECT_SIZE; + i * FLASH_BANK_SIZE + + (j - 7)*MAIN_SECT_SIZE; } } size += flash_info[i].size; @@ -124,28 +124,28 @@ #if CFG_MONITOR_BASE >= CFG_FLASH_BASE #if CFG_MONITOR_BASE >= CFG_FLASH_BASE + FLASH_BANK_SIZE flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[1]); + CFG_MONITOR_BASE, + CFG_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[1]); #else flash_protect(FLAG_PROTECT_SET, - CFG_MONITOR_BASE, - CFG_MONITOR_BASE + monitor_flash_len - 1, - &flash_info[0]); + CFG_MONITOR_BASE, + CFG_MONITOR_BASE + monitor_flash_len - 1, + &flash_info[0]); #endif #endif #if (CFG_ENV_IS_IN_FLASH == 1) && defined(CFG_ENV_ADDR) #if CFG_ENV_ADDR >= CFG_FLASH_BASE + FLASH_BANK_SIZE flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[1]); + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[1]); #else flash_protect(FLAG_PROTECT_SET, - CFG_ENV_ADDR, - CFG_ENV_ADDR + CFG_ENV_SIZE - 1, - &flash_info[0]); + CFG_ENV_ADDR, + CFG_ENV_ADDR + CFG_ENV_SIZE - 1, + &flash_info[0]); #endif #endif @@ -268,7 +268,7 @@ while (((addr[0] & 0x00800080) != 0x00800080) || ((addr[1] & 0x00800080) != 0x00800080) ) { if ((now=get_timer(start)) > - CFG_FLASH_ERASE_TOUT) { + CFG_FLASH_ERASE_TOUT) { printf ("Timeout\n"); addr[0] = 0x00B000B0; /* suspend erase */ addr[0] = 0x00FF00FF; /* to read mode */ @@ -328,7 +328,7 @@ for (i = 0, cp = wp; i < l; i++, cp++) { if (i >= 4) { *datah = (*datah << 8) | - ((*datal & 0xFF000000) >> 24); + ((*datal & 0xFF000000) >> 24); } *datal = (*datal << 8) | (*(uchar *)cp); @@ -342,7 +342,7 @@ if (i >= 4) { *datah = (*datah << 8) | - ((*datal & 0xFF000000) >> 24); + ((*datal & 0xFF000000) >> 24); } *datal = (*datal << 8) | tmp; @@ -353,7 +353,7 @@ for (; cnt == 0 && i < FLASH_WIDTH; ++i, ++cp) { if (i >= 4) { *datah = (*datah << 8) | - ((*datal & 0xFF000000) >> 24); + ((*datal & 0xFF000000) >> 24); } *datal = (*datah << 8) | (*(uchar *)cp); @@ -394,7 +394,7 @@ for (i = 0, cp = wp; i < FLASH_WIDTH && cnt > 0; ++i, ++cp) { char tmp; - tmp = *src; + tmp = *src; src++; diff --git a/board/cu824/u-boot.lds b/board/cu824/u-boot.lds index 401a9aa..7e6053a 100644 --- a/board/cu824/u-boot.lds +++ b/board/cu824/u-boot.lds @@ -103,6 +103,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -126,4 +131,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/dnp1110/Makefile b/board/dnp1110/Makefile index 2437b22..31ef695 100644 --- a/board/dnp1110/Makefile +++ b/board/dnp1110/Makefile @@ -29,7 +29,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/dnp1110/flash.c b/board/dnp1110/flash.c index f4a8b99..4416393 100644 --- a/board/dnp1110/flash.c +++ b/board/dnp1110/flash.c @@ -67,16 +67,16 @@ for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { - switch (i) - { - case 0: - flash_get_size((FPW *)PHYS_FLASH_1, &flash_info[i]); - flash_get_offsets(PHYS_FLASH_1, &flash_info[i]); - break; - default: - panic("configured to many flash banks!\n"); - break; - } + switch (i) + { + case 0: + flash_get_size((FPW *)PHYS_FLASH_1, &flash_info[i]); + flash_get_offsets(PHYS_FLASH_1, &flash_info[i]); + break; + default: + panic("configured to many flash banks!\n"); + break; + } size += flash_info[i].size; } @@ -122,7 +122,7 @@ if (info->flash_id == FLASH_UNKNOWN) { printf ("missing or unknown FLASH type\n"); return; - } + } switch (info->flash_id & FLASH_VENDMASK) { case FLASH_MAN_INTEL: printf ("INTEL "); break; @@ -133,21 +133,21 @@ case FLASH_28F128J3A: printf ("28F128J3A\n"); break; default: printf ("Unknown Chip Type\n"); break; - } + } printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); + info->size >> 20, info->sector_count); printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); + if ((i % 5) == 0) + printf ("\n "); printf (" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " " ); - } - printf ("\n"); + } + printf ("\n"); return; } @@ -164,7 +164,7 @@ mb(); value = addr[0]; - + switch (value) { case (FPW)INTEL_MANUFACT: @@ -280,8 +280,8 @@ *addr = (FPW)0x00FF00FF; /* resest to read mode */ printf (" done\n"); - } - } + } + } return rcode; } @@ -350,7 +350,7 @@ cnt -= port_width; if (count++ > 0x800) { - spin_wheel(); + spin_wheel(); count = 0; } } @@ -422,4 +422,3 @@ printf("\010%c", w[p]); (++p == 3) ? (p = 0) : 0; } - diff --git a/board/dnp1110/memsetup.S b/board/dnp1110/memsetup.S index 6539c20..1622aea 100644 --- a/board/dnp1110/memsetup.S +++ b/board/dnp1110/memsetup.S @@ -24,7 +24,6 @@ */ - #include "config.h" #include "version.h" @@ -39,7 +38,7 @@ #define MDCAS01 0x08 /* CAS waveform rotate reg 1 bank */ #define MDCAS02 0x0C /* CAS waveform rotate reg 2 bank */ #define MDREFR 0x1C /* DRAM refresh control reg */ -#define MDCAS20 0x20 /* CAS waveform rotate reg 0 bank */ +#define MDCAS20 0x20 /* CAS waveform rotate reg 0 bank */ #define MDCAS21 0x24 /* CAS waveform rotate reg 1 bank */ #define MDCAS22 0x28 /* CAS waveform rotate reg 2 bank */ #define MECR 0x18 /* Expansion memory (PCMCIA) bus configuration register */ diff --git a/board/dnp1110/u-boot.lds b/board/dnp1110/u-boot.lds index f4b0ade..7ac165e 100644 --- a/board/dnp1110/u-boot.lds +++ b/board/dnp1110/u-boot.lds @@ -26,28 +26,34 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/sa1100/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } armboot_end = .; } diff --git a/board/ebony/Makefile b/board/ebony/Makefile index 61aee68..4a3927b 100644 --- a/board/ebony/Makefile +++ b/board/ebony/Makefile @@ -29,7 +29,7 @@ SOBJS = init.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/ebony/ebony.c b/board/ebony/ebony.c index b36d542..bb284ae 100644 --- a/board/ebony/ebony.c +++ b/board/ebony/ebony.c @@ -92,7 +92,6 @@ } - int checkboard (void) { sys_info_t sysinfo; @@ -225,8 +224,8 @@ *--------------------------------------------------------------------------*/ strap = mfdcr(cpc0_strp1); if( (strap & 0x00100000) == 0 ){ - printf("PCI: CPC0_STRP1[PAE] not set.\n"); - return 0; + printf("PCI: CPC0_STRP1[PAE] not set.\n"); + return 0; } return 1; diff --git a/board/ebony/flash.c b/board/ebony/flash.c index 961c616..d8b4757 100644 --- a/board/ebony/flash.c +++ b/board/ebony/flash.c @@ -55,14 +55,14 @@ flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ static unsigned long flash_addr_table[8][CFG_MAX_FLASH_BANKS] = { - {0xffc00000, 0xffe00000, 0xff880000}, /* 0:000: configuraton 3 */ - {0xffc00000, 0xffe00000, 0xff800000}, /* 1:001: configuraton 4 */ - {0xffc00000, 0xffe00000, 0x00000000}, /* 2:010: configuraton 7 */ - {0xffc00000, 0xffe00000, 0x00000000}, /* 3:011: configuraton 8 */ - {0xff800000, 0xffa00000, 0xfff80000}, /* 4:100: configuraton 1 */ - {0xff800000, 0xffa00000, 0xfff00000}, /* 5:101: configuraton 2 */ - {0xffc00000, 0xffe00000, 0x00000000}, /* 6:110: configuraton 5 */ - {0xffc00000, 0xffe00000, 0x00000000} /* 7:111: configuraton 6 */ + {0xffc00000, 0xffe00000, 0xff880000}, /* 0:000: configuraton 3 */ + {0xffc00000, 0xffe00000, 0xff800000}, /* 1:001: configuraton 4 */ + {0xffc00000, 0xffe00000, 0x00000000}, /* 2:010: configuraton 7 */ + {0xffc00000, 0xffe00000, 0x00000000}, /* 3:011: configuraton 8 */ + {0xff800000, 0xffa00000, 0xfff80000}, /* 4:100: configuraton 1 */ + {0xff800000, 0xffa00000, 0xfff00000}, /* 5:101: configuraton 2 */ + {0xffc00000, 0xffe00000, 0x00000000}, /* 6:110: configuraton 5 */ + {0xffc00000, 0xffe00000, 0x00000000} /* 7:111: configuraton 6 */ }; /*----------------------------------------------------------------------- @@ -156,7 +156,6 @@ } - /*----------------------------------------------------------------------- */ #if 0 @@ -199,10 +198,10 @@ void flash_print_info (flash_info_t *info) { int i; - int k; - int size; - int erased; - volatile unsigned long *flash; + int k; + int size; + int erased; + volatile unsigned long *flash; if (info->flash_id == FLASH_UNKNOWN) { printf ("missing or unknown FLASH type\n"); @@ -250,17 +249,17 @@ printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) + /* + * Check if whole sector is erased + */ + if (i != (info->sector_count-1)) size = info->start[i+1] - info->start[i]; - else + else size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; kstart[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; ksector_count = 32; info->size = 0x00200000; break; /* => 2 MB */ - case (FLASH_WORD_SIZE)STM_ID_F040B: - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x0080000; /* => 512 ko */ - break; + case (FLASH_WORD_SIZE)STM_ID_F040B: + info->flash_id += FLASH_AM040; + info->sector_count = 8; + info->size = 0x0080000; /* => 512 ko */ + break; case (FLASH_WORD_SIZE)AMD_ID_F040B: info->flash_id += FLASH_AM040; info->sector_count = 8; diff --git a/board/ebony/init.S b/board/ebony/init.S index 3ae93d6..cc8f8b4 100644 --- a/board/ebony/init.S +++ b/board/ebony/init.S @@ -94,5 +94,3 @@ tlbentry( CFG_PCI_BASE, SZ_256M, 0x00000000, 2, AC_R|AC_W|SA_G|SA_I ) tlbentry( CFG_PCI_MEMBASE, SZ_256M, 0x00000000, 3, AC_R|AC_W|SA_G|SA_I ) tlbtab_end - - diff --git a/board/ebony/u-boot.lds b/board/ebony/u-boot.lds index ab8af7d..7ea7caf 100644 --- a/board/ebony/u-boot.lds +++ b/board/ebony/u-boot.lds @@ -126,6 +126,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/ebony/u-boot.lds.debug b/board/ebony/u-boot.lds.debug index c290a43..af497b1 100644 --- a/board/ebony/u-boot.lds.debug +++ b/board/ebony/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/eltec/bab7xx/Makefile b/board/eltec/bab7xx/Makefile index 6e412c2..7d8ed26 100644 --- a/board/eltec/bab7xx/Makefile +++ b/board/eltec/bab7xx/Makefile @@ -30,7 +30,7 @@ SOBJS = asm_init.o $(LIB): .depend $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) @@ -46,12 +46,3 @@ sinclude .depend ######################################################################### - - - - - - - - - diff --git a/board/eltec/bab7xx/asm_init.S b/board/eltec/bab7xx/asm_init.S index 934fabe..3f88bc2 100644 --- a/board/eltec/bab7xx/asm_init.S +++ b/board/eltec/bab7xx/asm_init.S @@ -204,7 +204,7 @@ beq SD16MB2B li r3, 0x0011 /* get number of internal banks */ - /* from spd for bank0/1 */ + /* from spd for bank0/1 */ bl spdRead cmpli 0, 0, r3, 0x02 @@ -244,7 +244,7 @@ * set the Memory Configuration Reg. 2 */ li r3, 0x0111 /* get number of internal banks */ - /* from spd for bank2/3 */ + /* from spd for bank2/3 */ bl spdRead cmpli 0, 0, r3, 0x02 @@ -269,13 +269,13 @@ */ S2D64MB4B: lis r21, 0x8630 /* BSTOPRE = 0x80, REFREC = 6, */ - /* RDLAT = 3 */ + /* RDLAT = 3 */ /* * set the Memory Configuration Reg. 4 */ lis r22, 0x2430 /* PRETOACT = 2, ACTOPRE = 4, */ - /* WCBUF = 1, RCBUF = 1 */ + /* WCBUF = 1, RCBUF = 1 */ ori r22, r22, 0x2220 /* SDMODE = 0x022, ACTORW = 2 */ /* @@ -285,10 +285,10 @@ bl spdRead rlwinm r16, r3, 2, 24, 29 /* calculate size in MByte */ - /* (128 MB max.) */ + /* (128 MB max.) */ li r3, 0x0005 /* get number of banks from spd */ - /* for bank0/1 */ + /* for bank0/1 */ bl spdRead cmpi 0, 0, r3, 2 /* 2 banks ? */ @@ -336,10 +336,10 @@ bl spdRead rlwinm r18, r3, 2, 24, 29 /* calculate size in MByte */ - /* (128 MB max.) */ + /* (128 MB max.) */ li r3, 0x0105 /* get number of banks from */ - /* spd bank0/1 */ + /* spd bank0/1 */ bl spdRead cmpi 0, 0, r3, 2 /* 2 banks ? */ @@ -365,7 +365,7 @@ getSpdRowBank01: li r3, 0x0003 /* get number of row bits from */ - /* spd from bank0/1 */ + /* spd from bank0/1 */ bl spdRead ori r20, r20, (MCCR1_BK0_9BITS | MCCR1_BK1_9BITS) cmpli 0, 0, r3, 0x0009 /* bank0 - 9 row bits */ @@ -392,7 +392,7 @@ getSpdRowBank23: li r3, 0x0103 /* get number of row bits from */ - /* spd for bank2/3 */ + /* spd for bank2/3 */ bl spdRead ori r20, r20, (MCCR1_BK2_9BITS | MCCR1_BK3_9BITS) @@ -415,13 +415,13 @@ writeRowBits: lis r21, 0x000a /* CPX = 1, RAS6P = 4 */ ori r21, r21, 0x2293 /* CAS5 = 2, CP4 = 1, */ - /* CAS3 = 2, RCD2 = 2, RP = 3 */ + /* CAS3 = 2, RCD2 = 2, RP = 3 */ /* * set the Memory Configuration Reg. 4 */ lis r22, 0x0010 /* all SDRAM parameter 0, */ - /* WCBUF flow through, */ - /* RCBUF registered */ + /* WCBUF flow through, */ + /* RCBUF registered */ /* * get the size of bank 0-3 */ @@ -429,7 +429,7 @@ bl spdRead li r16, 0 /* bank size is: */ - /* (8*2^row*2^column)/0x100000 MB */ + /* (8*2^row*2^column)/0x100000 MB */ ori r16, r16, 0x8000 rlwnm r16, r16, r3, 0, 31 @@ -439,7 +439,7 @@ rlwnm r16, r16, r3, 0, 31 li r3, 0x0005 /* get number of banks from */ - /* spd for bank0/1 */ + /* spd for bank0/1 */ bl spdRead cmpi 0, 0, r3, 2 /* 2 banks ? */ @@ -487,7 +487,7 @@ bl spdRead li r18, 0 /* bank size is: */ - /* (8*2^row*2^column)/0x100000 MB */ + /* (8*2^row*2^column)/0x100000 MB */ ori r18, r18, 0x8000 rlwnm r18, r18, r3, 0, 31 @@ -497,7 +497,7 @@ rlwnm r18, r18, r3, 0, 31 li r3, 0x0105 /* get number of banks from */ - /* spd for bank2/3 */ + /* spd for bank2/3 */ bl spdRead cmpi 0, 0, r3, 2 /* 2 banks ? */ @@ -701,28 +701,28 @@ common3: li r4, 0x1010 /* refesh cycle 1028 clocks */ - /* left shifted 2 */ + /* left shifted 2 */ cmpli 0, 0, r3, 0x0000 /* 15.6 us ? */ beq writeRefresh li r4, 0x0808 /* refesh cycle 514 clocks */ - /* left shifted 2 */ + /* left shifted 2 */ cmpli 0, 0, r3, 0x0002 /* 7.8 us ? */ beq writeRefresh li r4, 0x2020 /* refesh cycle 2056 clocks */ - /* left shifted 2 */ + /* left shifted 2 */ cmpli 0, 0, r3, 0x0003 /* 31.3 us ? */ beq writeRefresh li r4, 0x4040 /* refesh cycle 4112 clocks */ - /* left shifted 2 */ + /* left shifted 2 */ cmpli 0, 0, r3, 0x0004 /* 62.5 us ? */ beq writeRefresh li r4, 0 ori r4, r4, 0x8080 /* refesh cycle 8224 clocks */ - /* left shifted 2 */ + /* left shifted 2 */ cmpli 0, 0, r3, 0x0005 /* 125 us ? */ beq writeRefresh @@ -916,7 +916,7 @@ eieio li r9, 0x03 stb r9, 3(r8) /* 8 data bits, 1 stop bit, */ - /* no parity */ + /* no parity */ eieio li r9, 0x0b stb r9, 4(r8) /* enable the receiver and transmitter */ @@ -928,7 +928,7 @@ beq waitEmpty li r9, 0x47 stb r9, 3(r8) /* send break, 8 data bits, */ - /* 2 stop bits, no parity */ + /* 2 stop bits, no parity */ eieio lis r0, 0x0001 @@ -944,7 +944,7 @@ beq waitEmpty1 li r9, 0x07 stb r9, 3(r8) /* 8 data bits, 2 stop bits, */ - /* no parity */ + /* no parity */ eieio /* @@ -1473,15 +1473,3 @@ Mmbyte: .ascii " MB .......... \000" .align 4 - - - - - - - - - - - - diff --git a/board/eltec/bab7xx/bab7xx.c b/board/eltec/bab7xx/bab7xx.c index 6f6f977..b74b055 100644 --- a/board/eltec/bab7xx/bab7xx.c +++ b/board/eltec/bab7xx/bab7xx.c @@ -45,7 +45,7 @@ unsigned char data = gpio->dta1; if (data & 0x02) - return 66666666; + return 66666666; return 83333333; } @@ -58,7 +58,7 @@ ulong bab7xx_get_gclk_freq (void) { static const int pllratio_to_factor[] = { - 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, 00, + 00, 75, 70, 00, 20, 65, 100, 45, 30, 55, 40, 50, 80, 60, 35, 00, }; return pllratio_to_factor[get_hid1 () >> 28] * (bab7xx_get_bus_freq() / 10); @@ -72,7 +72,7 @@ printf ("MPC7xx V%d.%d",(pvr >> 8) & 0xFF, pvr & 0xFF); printf (" at %ld / %ld MHz\n", bab7xx_get_gclk_freq()/1000000, - bab7xx_get_bus_freq()/1000000); + bab7xx_get_bus_freq()/1000000); return (0); } @@ -131,8 +131,8 @@ for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4) { - if (*reg != reg) - return -1; + if (*reg != reg) + return -1; } #endif @@ -147,11 +147,11 @@ do { - if (i & 0x01) /* is bank enabled ? */ - memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; - msar1 >>= 8; - mear1 >>= 8; - i >>= 1; + if (i & 0x01) /* is bank enabled ? */ + memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; + msar1 >>= 8; + mear1 >>= 8; + i >>= 1; } while (i); return (memSize * 0x100000); @@ -222,20 +222,20 @@ switch (line_number) { case 1: - sprintf (info," MPC7xx V%d.%d at %ld / %ld MHz", - (get_pvr() >> 8) & 0xFF, - get_pvr() & 0xFF, - bab7xx_get_gclk_freq()/1000000, - bab7xx_get_bus_freq()/1000000); - return; + sprintf (info," MPC7xx V%d.%d at %ld / %ld MHz", + (get_pvr() >> 8) & 0xFF, + get_pvr() & 0xFF, + bab7xx_get_gclk_freq()/1000000, + bab7xx_get_bus_freq()/1000000); + return; case 2: - sprintf (info, " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH", - dram_size(0)/0x100000, - flash_init()/0x100000); - return; + sprintf (info, " ELTEC BAB7xx with %ld MB DRAM and %ld MB FLASH", + dram_size(0)/0x100000, + flash_init()/0x100000); + return; case 3: - sprintf (info, " %s", smi.modeIdent); - return; + sprintf (info, " %s", smi.modeIdent); + return; } /* no more info lines */ diff --git a/board/eltec/bab7xx/dc_srom.c b/board/eltec/bab7xx/dc_srom.c index ef956e6..a44af6e 100644 --- a/board/eltec/bab7xx/dc_srom.c +++ b/board/eltec/bab7xx/dc_srom.c @@ -118,7 +118,7 @@ a = (char)(offset << 2); for (i=0; i<6; i++, a <<= 1) { - srom_latch(command | ((a < 0) ? DT_IN : 0), addr); + srom_latch(command | ((a < 0) ? DT_IN : 0), addr); } udelay(1); @@ -136,11 +136,11 @@ for (i=0; i<16; i++) { - sendto_srom(command | DT_CLK, addr); - tmp = getfrom_srom(addr); - sendto_srom(command, addr); + sendto_srom(command | DT_CLK, addr); + tmp = getfrom_srom(addr); + sendto_srom(command, addr); - word = (word << 1) | ((tmp >> 3) & 0x01); + word = (word << 1) | ((tmp >> 3) & 0x01); } sendto_srom(command & 0x0000ff00, addr); @@ -160,13 +160,13 @@ for (i=0; i<16; i++) { - tmp = (longVal & 0x8000)>>13; + tmp = (longVal & 0x8000)>>13; - sendto_srom (tmp | command, addr); - sendto_srom (tmp | command | DT_CLK, addr); - sendto_srom (tmp | command, addr); + sendto_srom (tmp | command, addr); + sendto_srom (tmp | command | DT_CLK, addr); + sendto_srom (tmp | command, addr); - longVal = longVal<<1; + longVal = longVal<<1; } sendto_srom(command & 0x0000ff00, addr); @@ -175,15 +175,15 @@ tmp = 100; do { - if ((getfrom_srom(dc_srom_iobase) & 0x8) == 0x8) - break; - udelay(1000); + if ((getfrom_srom(dc_srom_iobase) & 0x8) == 0x8) + break; + udelay(1000); } while (--tmp); if (tmp == 0) { - printf("Write DEC21143 SRom timed out !\n"); - return (-1); + printf("Write DEC21143 SRom timed out !\n"); + return (-1); } return 0; @@ -218,7 +218,7 @@ for (i=0; i<6; i++) { - srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr); + srom_latch (SROM_WR | SROM_SR | DT_IN | DT_CS, addr); } } @@ -256,8 +256,8 @@ memset (dest, 0, 128); for (offset=0; offset<64; offset++) { - tmp = srom_rd (dc_srom_iobase, offset); - *dest++ = le16_to_cpu(tmp); + tmp = srom_rd (dc_srom_iobase, offset); + *dest++ = le16_to_cpu(tmp); } return (0); @@ -280,9 +280,9 @@ for (offset=0; offset<64; offset++) { - if (srom_wr (dc_srom_iobase, offset, *src) == -1) - return (-1); - src++; + if (srom_wr (dc_srom_iobase, offset, *src) == -1) + return (-1); + src++; } return (0); diff --git a/board/eltec/bab7xx/el_srom.c b/board/eltec/bab7xx/el_srom.c index 56abdc7..73f8066 100644 --- a/board/eltec/bab7xx/el_srom.c +++ b/board/eltec/bab7xx/el_srom.c @@ -83,14 +83,14 @@ for (i = 0; i < 8; i++) { - out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */ - udelay(10); - out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = high */ - udelay(15); - buf <<= 1; - buf = (in8(I2C_BUS_DAT) & 0x20) ? (buf | 0x01) : (buf & 0xFE); - out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */ - udelay(10); + out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */ + udelay(10); + out8(I2C_BUS_DAT, 0x40); /* SCLK = high SDIO = high */ + udelay(15); + buf <<= 1; + buf = (in8(I2C_BUS_DAT) & 0x20) ? (buf | 0x01) : (buf & 0xFE); + out8(I2C_BUS_DAT, 0x00); /* SCLK = low SDIO = high */ + udelay(10); } return(buf); } @@ -113,13 +113,13 @@ for (i = 7; i >= 0; i--) { - (buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK=low SDIO=data */ - udelay(10); - (buf & 0x80) ? out8(I2C_BUS_DAT, 0x60) : out8(I2C_BUS_DAT, 0x40); /* SCLK=high SDIO=data */ - udelay(15); - (buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK=low SDIO=data */ - udelay(10); - buf <<= 1; + (buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK=low SDIO=data */ + udelay(10); + (buf & 0x80) ? out8(I2C_BUS_DAT, 0x60) : out8(I2C_BUS_DAT, 0x40); /* SCLK=high SDIO=data */ + udelay(15); + (buf & 0x80) ? out8(I2C_BUS_DAT, 0x20) : out8(I2C_BUS_DAT, 0x00); /* SCLK=low SDIO=data */ + udelay(10); + buf <<= 1; } } @@ -184,39 +184,39 @@ for (i=0;i>= 1; accu ^= f; - byte >>= 1; - } + byte = *ptr++; + for (i = 8; i; i--) + { + f = ((byte & 1) ^ (accu & 1)) ? 0x84083001 : 0; + accu >>= 1; accu ^= f; + byte >>= 1; + } } return(accu); } diff --git a/board/eltec/bab7xx/flash.c b/board/eltec/bab7xx/flash.c index 73496a1..442dd00 100644 --- a/board/eltec/bab7xx/flash.c +++ b/board/eltec/bab7xx/flash.c @@ -57,7 +57,7 @@ /* Init: no FLASHes known */ for (i=0; iflash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - flash_init(); + printf ("missing or unknown FLASH type\n"); + flash_init(); } if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; + printf ("missing or unknown FLASH type\n"); + return; } switch (info->flash_id & FLASH_VENDMASK) { case FLASH_MAN_AMD: - printf ("AMD "); - break; + printf ("AMD "); + break; default: - printf ("Unknown Vendor "); - break; + printf ("Unknown Vendor "); + break; } switch (info->flash_id & FLASH_TYPEMASK) { case AMD_ID_F040B: - printf ("AM29F040B (4 Mbit)\n"); - break; + printf ("AM29F040B (4 Mbit)\n"); + break; case AMD_ID_F016D: - printf ("AM29F016D (16 Mbit)\n"); - break; + printf ("AM29F016D (16 Mbit)\n"); + break; case AMD_ID_F032B: - printf ("AM29F032B (32 Mbit)\n"); - break; + printf ("AM29F032B (32 Mbit)\n"); + break; default: - printf ("Unknown Chip Type\n"); - break; + printf ("Unknown Chip Type\n"); + break; } if (info->size >= (1 << 20)) { - printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); + printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); } else { - printf (" Size: %ld kB in %d Sectors\n", info->size >> 10, info->sector_count); + printf (" Size: %ld kB in %d Sectors\n", info->size >> 10, info->sector_count); } printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; + /* + * Check if whole sector is erased + */ + if (i != (info->sector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; kstart[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kstart[i], - erased ? " E" : " ", - info->protect[i] ? "RO " : " "); + printf (" %08lX%s%s", + info->start[i], + erased ? " E" : " ", + info->protect[i] ? "RO " : " "); } printf ("\n"); } @@ -226,37 +226,37 @@ /* We accept only two AMD types */ switch (vendor) { case (FLASH_WORD_SIZE)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; + info->flash_id = FLASH_MAN_AMD; + break; default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ } switch (devid) { case (FLASH_WORD_SIZE)AMD_ID_F040B: - info->flash_id |= AMD_ID_F040B; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 0.5 MB */ + info->flash_id |= AMD_ID_F040B; + info->sector_count = 8; + info->size = 0x00080000; + break; /* => 0.5 MB */ case (FLASH_WORD_SIZE)AMD_ID_F016D: - info->flash_id |= AMD_ID_F016D; - info->sector_count = 32; - info->size = 0x00200000; - break; /* => 2 MB */ + info->flash_id |= AMD_ID_F016D; + info->sector_count = 32; + info->size = 0x00200000; + break; /* => 2 MB */ case (FLASH_WORD_SIZE)AMD_ID_F032B: - info->flash_id |= AMD_ID_F032B; - info->sector_count = 64; - info->size = 0x00400000; - break; /* => 4 MB */ + info->flash_id |= AMD_ID_F032B; + info->sector_count = 64; + info->size = 0x00400000; + break; /* => 4 MB */ default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ } @@ -266,20 +266,20 @@ /* check for protected sectors */ for (i = 0; i < info->sector_count; i++) { - /* sector base address */ - info->start[i] = base + i * (info->size / info->sector_count); - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - caddr = (volatile unsigned char *)(info->start[i]); - info->protect[i] = caddr[2] & 1; + /* sector base address */ + info->start[i] = base + i * (info->size / info->sector_count); + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + caddr = (volatile unsigned char *)(info->start[i]); + info->protect[i] = caddr[2] & 1; } /* * Prevent writes to uninitialized FLASH. */ if (info->flash_id != FLASH_UNKNOWN) { - caddr = (volatile unsigned char *)info->start[0]; - caddr[0] = 0xF0; /* reset bank */ + caddr = (volatile unsigned char *)info->start[0]; + caddr[0] = 0xF0; /* reset bank */ } return (info->size); @@ -295,32 +295,32 @@ int rc = 0; if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; } if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > FLASH_AMD_COMP)) { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; + (info->flash_id > FLASH_AMD_COMP)) { + printf ("Can't erase unknown flash type - aborted\n"); + return 1; } prot = 0; for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } + if (info->protect[sect]) { + prot++; + } } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); } else { - printf ("\n"); + printf ("\n"); } l_sect = -1; @@ -336,26 +336,26 @@ /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (FLASH_WORD_SIZE *)(info->start[sect]); - if (info->flash_id & FLASH_MAN_SST) { - addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; - addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ - udelay(30000); /* wait 30 ms */ - } - else - addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ - l_sect = sect; - } + if (info->protect[sect] == 0) { /* not protected */ + addr = (FLASH_WORD_SIZE *)(info->start[sect]); + if (info->flash_id & FLASH_MAN_SST) { + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ + udelay(30000); /* wait 30 ms */ + } + else + addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ + l_sect = sect; + } } /* re-enable interrupts if necessary */ if (flag) - enable_interrupts(); + enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ udelay (1000); @@ -364,21 +364,21 @@ * We wait for the last triggered sector */ if (l_sect < 0) - goto DONE; + goto DONE; start = get_timer (0); last = start; addr = (FLASH_WORD_SIZE *)(info->start[l_sect]); while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - serial_putc ('.'); - last = now; - } + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + serial_putc ('.'); + last = now; + } } DONE: @@ -408,42 +408,42 @@ * handle unaligned start bytes */ if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } + data = 0; + for (i=0, cp=wp; i0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; } /* * handle word aligned part */ while (cnt >= 4) { - data = 0; - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; } if (cnt == 0) { - return (0); + return (0); } /* @@ -451,11 +451,11 @@ */ data = 0; for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; + data = (data << 8) | *src++; + --cnt; } for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + data = (data << 8) | (*(uchar *)cp); } return (write_word(info, wp, data)); @@ -469,45 +469,44 @@ */ static int write_word (flash_info_t *info, ulong dest, ulong data) { - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); - volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; - volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); + volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; + volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; ulong start; int flag; - int i; + int i; /* Check if Flash is (sufficiently) erased */ if ((*((volatile FLASH_WORD_SIZE *)dest) & - (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { - return (2); + (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { + return (2); } /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) - { - addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; + for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) + { + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; - dest2[i] = data2[i]; + dest2[i] = data2[i]; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - return (1); - } - } - } + /* data polling for D7 */ + start = get_timer (0); + while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != + (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + } return (0); } /*----------------------------------------------------------------------------*/ - diff --git a/board/eltec/bab7xx/l2cache.c b/board/eltec/bab7xx/l2cache.c index 748d515..077f2c9 100644 --- a/board/eltec/bab7xx/l2cache.c +++ b/board/eltec/bab7xx/l2cache.c @@ -51,104 +51,104 @@ { if (l2control) /* BAB750 */ { - mtspr(SPRN_L2CR, l2control); - mtspr(SPRN_L2CR, (l2control | L2CR_I)); - while (mfspr(SPRN_L2CR) & L2CR_IP) - ; - mtspr(SPRN_L2CR, (l2control | L2CR_E)); - return (0); + mtspr(SPRN_L2CR, l2control); + mtspr(SPRN_L2CR, (l2control | L2CR_I)); + while (mfspr(SPRN_L2CR) & L2CR_IP) + ; + mtspr(SPRN_L2CR, (l2control | L2CR_E)); + return (0); } else /* BAB740 */ { - int picr1, picr2, mask; - int picr2CacheSize, cacheSize; - int *d; - int devbusfn; - u32 reg32; + int picr1, picr2, mask; + int picr2CacheSize, cacheSize; + int *d; + int devbusfn; + u32 reg32; - devbusfn = pci_find_device(PCI_VENDOR_ID_MOTOROLA, - PCI_DEVICE_ID_MOTOROLA_MPC106, 0); - if (devbusfn == -1) - return (-1); + devbusfn = pci_find_device(PCI_VENDOR_ID_MOTOROLA, + PCI_DEVICE_ID_MOTOROLA_MPC106, 0); + if (devbusfn == -1) + return (-1); - pci_read_config_dword (devbusfn, PCI_PICR2, ®32); - reg32 &= ~PICR2_L2_EN; - pci_write_config_dword (devbusfn, PCI_PICR2, reg32); + pci_read_config_dword (devbusfn, PCI_PICR2, ®32); + reg32 &= ~PICR2_L2_EN; + pci_write_config_dword (devbusfn, PCI_PICR2, reg32); - /* cache size */ - if (*(volatile unsigned char *) (CFG_ISA_IO + 0x220) & 0x04) - { - /* cache size is 512 KB */ - picr2CacheSize = PICR2_L2_SIZE_512K; - cacheSize = 0x80000; - } - else - { - /* cache size is 256 KB */ - picr2CacheSize = PICR2_L2_SIZE_256K; - cacheSize = 0x40000; - } + /* cache size */ + if (*(volatile unsigned char *) (CFG_ISA_IO + 0x220) & 0x04) + { + /* cache size is 512 KB */ + picr2CacheSize = PICR2_L2_SIZE_512K; + cacheSize = 0x80000; + } + else + { + /* cache size is 256 KB */ + picr2CacheSize = PICR2_L2_SIZE_256K; + cacheSize = 0x40000; + } - /* setup PICR1 */ - mask = - ~(PICR1_CF_BREAD_WS(1) | - PICR1_CF_BREAD_WS(2) | - PICR1_CF_CBA(0xff) | - PICR1_CF_CACHE_1G | - PICR1_CF_DPARK | - PICR1_CF_APARK | - PICR1_CF_L2_CACHE_MASK); + /* setup PICR1 */ + mask = + ~(PICR1_CF_BREAD_WS(1) | + PICR1_CF_BREAD_WS(2) | + PICR1_CF_CBA(0xff) | + PICR1_CF_CACHE_1G | + PICR1_CF_DPARK | + PICR1_CF_APARK | + PICR1_CF_L2_CACHE_MASK); - picr1 = - (PICR1_CF_CBA(0x3f) | - PICR1_CF_CACHE_1G | - PICR1_CF_APARK | - PICR1_CF_DPARK | - PICR1_CF_L2_COPY_BACK); /* PICR1_CF_L2_WRITE_THROUGH */ + picr1 = + (PICR1_CF_CBA(0x3f) | + PICR1_CF_CACHE_1G | + PICR1_CF_APARK | + PICR1_CF_DPARK | + PICR1_CF_L2_COPY_BACK); /* PICR1_CF_L2_WRITE_THROUGH */ - pci_read_config_dword (devbusfn, PCI_PICR1, ®32); - reg32 &= mask; - reg32 |= picr1; - pci_write_config_dword (devbusfn, PCI_PICR1, reg32); + pci_read_config_dword (devbusfn, PCI_PICR1, ®32); + reg32 &= mask; + reg32 |= picr1; + pci_write_config_dword (devbusfn, PCI_PICR1, reg32); - /* - * invalidate all L2 cache - */ - picr2 = - (PICR2_CF_INV_MODE | - PICR2_CF_HIT_HIGH | - PICR2_CF_MOD_HIGH | - PICR2_CF_L2_HIT_DELAY(1) | - PICR2_CF_APHASE_WS(1) | - picr2CacheSize); + /* + * invalidate all L2 cache + */ + picr2 = + (PICR2_CF_INV_MODE | + PICR2_CF_HIT_HIGH | + PICR2_CF_MOD_HIGH | + PICR2_CF_L2_HIT_DELAY(1) | + PICR2_CF_APHASE_WS(1) | + picr2CacheSize); - pci_write_config_dword (devbusfn, PCI_PICR2, picr2); + pci_write_config_dword (devbusfn, PCI_PICR2, picr2); - /* - * dummy transactions - */ - for (d=0; d<(int *)(2*cacheSize); d++) - dummy(*d); + /* + * dummy transactions + */ + for (d=0; d<(int *)(2*cacheSize); d++) + dummy(*d); - pci_write_config_dword (devbusfn, PCI_PICR2, - (picr2 | PICR2_CF_FLUSH_L2)); + pci_write_config_dword (devbusfn, PCI_PICR2, + (picr2 | PICR2_CF_FLUSH_L2)); - /* setup PICR2 */ - picr2 = - (PICR2_CF_FAST_CASTOUT | - PICR2_CF_WDATA | - PICR2_CF_ADDR_ONLY_DISABLE | - PICR2_CF_HIT_HIGH | - PICR2_CF_MOD_HIGH | - PICR2_L2_UPDATE_EN | - PICR2_L2_EN | - PICR2_CF_APHASE_WS(1) | - PICR2_CF_DATA_RAM_PBURST | - PICR2_CF_L2_HIT_DELAY(1) | - PICR2_CF_SNOOP_WS(2) | - picr2CacheSize); + /* setup PICR2 */ + picr2 = + (PICR2_CF_FAST_CASTOUT | + PICR2_CF_WDATA | + PICR2_CF_ADDR_ONLY_DISABLE | + PICR2_CF_HIT_HIGH | + PICR2_CF_MOD_HIGH | + PICR2_L2_UPDATE_EN | + PICR2_L2_EN | + PICR2_CF_APHASE_WS(1) | + PICR2_CF_DATA_RAM_PBURST | + PICR2_CF_L2_HIT_DELAY(1) | + PICR2_CF_SNOOP_WS(2) | + picr2CacheSize); - pci_write_config_dword (devbusfn, PCI_PICR2, picr2); + pci_write_config_dword (devbusfn, PCI_PICR2, picr2); } return (0); } @@ -156,4 +156,3 @@ /*----------------------------------------------------------------------------*/ #endif /* (CFG_L2_BAB7xx) */ - diff --git a/board/eltec/bab7xx/misc.c b/board/eltec/bab7xx/misc.c index 1b4376d..b50d11b 100644 --- a/board/eltec/bab7xx/misc.c +++ b/board/eltec/bab7xx/misc.c @@ -62,7 +62,7 @@ u_int i, l, initSrom, copyNv; char buf[256]; char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0, - 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 }; + 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 }; pci_dev_t bdf; char sromSYM[] = { @@ -131,204 +131,204 @@ /* read out current revision srom contens */ el_srom_load (0x0000, (u_char*)&eerev, sizeof(revinfo), - SECOND_DEVICE, FIRST_BLOCK); + SECOND_DEVICE, FIRST_BLOCK); /* read out current nvram shadow image */ nvram_read (buf, CFG_NV_SROM_COPY_ADDR, CFG_SROM_SIZE); if (strcmp (eerev.magic, "ELTEC") != 0) { - /* srom is not initialized -> create a default revision info */ - for (i = 0, ptr = (u_char *)&eerev; i < sizeof(revinfo); i++) - *ptr++ = 0x00; - strcpy(eerev.magic, "ELTEC"); - eerev.revrev[0] = 1; - eerev.revrev[1] = 0; - eerev.size = 0x00E0; - eerev.category[0] = 0x01; + /* srom is not initialized -> create a default revision info */ + for (i = 0, ptr = (u_char *)&eerev; i < sizeof(revinfo); i++) + *ptr++ = 0x00; + strcpy(eerev.magic, "ELTEC"); + eerev.revrev[0] = 1; + eerev.revrev[1] = 0; + eerev.size = 0x00E0; + eerev.category[0] = 0x01; - /* node id from dead e128 as default */ - eerev.etheraddr[0] = 0x00; - eerev.etheraddr[1] = 0x00; - eerev.etheraddr[2] = 0x5B; - eerev.etheraddr[3] = 0x00; - eerev.etheraddr[4] = 0x2E; - eerev.etheraddr[5] = 0x4D; + /* node id from dead e128 as default */ + eerev.etheraddr[0] = 0x00; + eerev.etheraddr[1] = 0x00; + eerev.etheraddr[2] = 0x5B; + eerev.etheraddr[3] = 0x00; + eerev.etheraddr[4] = 0x2E; + eerev.etheraddr[5] = 0x4D; - /* cache config word for bab750 */ - *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH; + /* cache config word for bab750 */ + *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH; - initSrom = 1; /* force dialog */ - copyNv = 1; /* copy to nvram */ + initSrom = 1; /* force dialog */ + copyNv = 1; /* copy to nvram */ } if ((copyNv == 0) && (el_srom_checksum((u_char*)&eerev, CFG_SROM_SIZE) != - el_srom_checksum((u_char*)buf, CFG_SROM_SIZE))) + el_srom_checksum((u_char*)buf, CFG_SROM_SIZE))) { - printf ("Invalid revision info copy in nvram !\n"); - printf ("Press key:\n to copy current revision info to nvram.\n"); - printf (" to reenter revision info.\n"); - printf ("=> "); - if (0 != readline (NULL)) - { - switch ((char)toupper(console_buffer[0])) - { - case 'C': - copyNv = 1; - break; - case 'R': - copyNv = 1; - initSrom = 1; - break; - } - } + printf ("Invalid revision info copy in nvram !\n"); + printf ("Press key:\n to copy current revision info to nvram.\n"); + printf (" to reenter revision info.\n"); + printf ("=> "); + if (0 != readline (NULL)) + { + switch ((char)toupper(console_buffer[0])) + { + case 'C': + copyNv = 1; + break; + case 'R': + copyNv = 1; + initSrom = 1; + break; + } + } } if (initSrom) { - memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */ - printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]); - if (0 != readline (NULL)) - { - eerev.revision[0][0] = (char)toupper(console_buffer[0]); - memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */ - } + memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */ + printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]); + if (0 != readline (NULL)) + { + eerev.revision[0][0] = (char)toupper(console_buffer[0]); + memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */ + } - printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]); - if (1 == readline (NULL)) - { - eerev.revision[0][1] = (char)toupper(console_buffer[0]); - } + printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]); + if (1 == readline (NULL)) + { + eerev.revision[0][1] = (char)toupper(console_buffer[0]); + } - printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board); - if (11 == readline (NULL)) - { - for (i=0; i<11; i++) - eerev.board[i] = (char)toupper(console_buffer[i]); - eerev.board[11] = '\0'; - } + printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board); + if (11 == readline (NULL)) + { + for (i=0; i<11; i++) + eerev.board[i] = (char)toupper(console_buffer[i]); + eerev.board[11] = '\0'; + } - printf ("Enter serial number: %s ", (char *)&eerev.serial ); - if (6 == readline (NULL)) - { - for (i=0; i<6; i++) - eerev.serial[i] = console_buffer[i]; - eerev.serial[6] = '\0'; - } + printf ("Enter serial number: %s ", (char *)&eerev.serial ); + if (6 == readline (NULL)) + { + for (i=0; i<6; i++) + eerev.serial[i] = console_buffer[i]; + eerev.serial[6] = '\0'; + } - printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", - eerev.etheraddr[0], eerev.etheraddr[1], - eerev.etheraddr[2], eerev.etheraddr[3], - eerev.etheraddr[4], eerev.etheraddr[5]); - if (12 == readline (NULL)) - { - for (i=0; i<12; i+=2) - eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] + - hex[toupper(console_buffer[i+1])-'0']); - } + printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", + eerev.etheraddr[0], eerev.etheraddr[1], + eerev.etheraddr[2], eerev.etheraddr[3], + eerev.etheraddr[4], eerev.etheraddr[5]); + if (12 == readline (NULL)) + { + for (i=0; i<12; i+=2) + eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] + + hex[toupper(console_buffer[i+1])-'0']); + } - l = strlen ((char *)&eerev.text); - printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text ); - if (0 != readline (NULL)) - { - for (i = l; i<63; i++) - eerev.text[i] = console_buffer[i-l]; - eerev.text[63] = '\0'; - } + l = strlen ((char *)&eerev.text); + printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text ); + if (0 != readline (NULL)) + { + for (i = l; i<63; i++) + eerev.text[i] = console_buffer[i-l]; + eerev.text[63] = '\0'; + } - if (strstr ((char *)&eerev.board, "75") != NULL) - eltec_board = 750; - else - eltec_board = 740; + if (strstr ((char *)&eerev.board, "75") != NULL) + eltec_board = 750; + else + eltec_board = 740; - if (eltec_board == 750) - { - if (CPU_TYPE == CPU_TYPE_750) - *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH; - else - *(int*)&eerev.res[0] = CLK2P5TO1_1MB_PB_0P5DH; + if (eltec_board == 750) + { + if (CPU_TYPE == CPU_TYPE_750) + *(int*)&eerev.res[0] = CLK2P0TO1_1MB_PB_0P5DH; + else + *(int*)&eerev.res[0] = CLK2P5TO1_1MB_PB_0P5DH; - printf("Enter L2Cache config word with leading zero (HEX): %08X ", - *(int*)&eerev.res[0] ); - if (0 != readline (NULL)) - { - for (i=0; i<7; i+=2) - { - eerev.res[i>>1] = - (char)(16*hex[toupper(console_buffer[i])-'0'] + - hex[toupper(console_buffer[i+1])-'0']); - } - } + printf("Enter L2Cache config word with leading zero (HEX): %08X ", + *(int*)&eerev.res[0] ); + if (0 != readline (NULL)) + { + for (i=0; i<7; i+=2) + { + eerev.res[i>>1] = + (char)(16*hex[toupper(console_buffer[i])-'0'] + + hex[toupper(console_buffer[i+1])-'0']); + } + } - /* prepare network eeprom */ - sromMII[20] = eerev.etheraddr[0]; - sromMII[21] = eerev.etheraddr[1]; - sromMII[22] = eerev.etheraddr[2]; - sromMII[23] = eerev.etheraddr[3]; - sromMII[24] = eerev.etheraddr[4]; - sromMII[25] = eerev.etheraddr[5]; - printf("\nSRom: Writing DEC21143 MII info .. "); + /* prepare network eeprom */ + sromMII[20] = eerev.etheraddr[0]; + sromMII[21] = eerev.etheraddr[1]; + sromMII[22] = eerev.etheraddr[2]; + sromMII[23] = eerev.etheraddr[3]; + sromMII[24] = eerev.etheraddr[4]; + sromMII[25] = eerev.etheraddr[5]; + printf("\nSRom: Writing DEC21143 MII info .. "); - if (dc_srom_store ((u_short *)sromMII) == -1) - printf("FAILED\n"); - else - printf("OK\n"); - } + if (dc_srom_store ((u_short *)sromMII) == -1) + printf("FAILED\n"); + else + printf("OK\n"); + } - if (eltec_board == 740) - { - *(int *)&eerev.res[0] = 0; - sromSYM[20] = eerev.etheraddr[0]; - sromSYM[21] = eerev.etheraddr[1]; - sromSYM[22] = eerev.etheraddr[2]; - sromSYM[23] = eerev.etheraddr[3]; - sromSYM[24] = eerev.etheraddr[4]; - sromSYM[25] = eerev.etheraddr[5]; - printf("\nSRom: Writing DEC21143 SYM info .. "); + if (eltec_board == 740) + { + *(int *)&eerev.res[0] = 0; + sromSYM[20] = eerev.etheraddr[0]; + sromSYM[21] = eerev.etheraddr[1]; + sromSYM[22] = eerev.etheraddr[2]; + sromSYM[23] = eerev.etheraddr[3]; + sromSYM[24] = eerev.etheraddr[4]; + sromSYM[25] = eerev.etheraddr[5]; + printf("\nSRom: Writing DEC21143 SYM info .. "); - if (dc_srom_store ((u_short *)sromSYM) == -1) - printf("FAILED\n"); - else - printf("OK\n"); - } + if (dc_srom_store ((u_short *)sromSYM) == -1) + printf("FAILED\n"); + else + printf("OK\n"); + } - /* update CRC */ - eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size); + /* update CRC */ + eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size); - /* write new values */ - printf("\nSRom: Writing revision info ...... "); - if (el_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev, - sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1) - printf("FAILED\n\n"); - else - printf("OK\n\n"); + /* write new values */ + printf("\nSRom: Writing revision info ...... "); + if (el_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev, + sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1) + printf("FAILED\n\n"); + else + printf("OK\n\n"); - /* write new values as shadow image to nvram */ - nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); + /* write new values as shadow image to nvram */ + nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); } /*if (initSrom) */ /* copy current values as shadow image to nvram */ if (initSrom == 0 && copyNv == 1) - nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); + nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); /* update environment */ sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x", - eerev.etheraddr[0], eerev.etheraddr[1], - eerev.etheraddr[2], eerev.etheraddr[3], - eerev.etheraddr[4], eerev.etheraddr[5]); + eerev.etheraddr[0], eerev.etheraddr[1], + eerev.etheraddr[2], eerev.etheraddr[3], + eerev.etheraddr[4], eerev.etheraddr[5]); setenv ("ethaddr", buf); /* print actual board identification */ printf("Ident: %s Ser %s Rev %c%c\n", - eerev.board, (char *)&eerev.serial, - eerev.revision[0][0], eerev.revision[0][1]); + eerev.board, (char *)&eerev.serial, + eerev.revision[0][0], eerev.revision[0][1]); /* global board ident */ if (strstr ((char *)&eerev.board, "75") != NULL) - eltec_board = 750; + eltec_board = 750; else - eltec_board = 740; + eltec_board = 740; /* * L2 cache configuration @@ -337,12 +337,12 @@ ptr = getenv("l2cache"); if (*ptr == '0') { - printf ("Cache: L2 NOT activated on BAB%d\n", eltec_board); + printf ("Cache: L2 NOT activated on BAB%d\n", eltec_board); } else { - printf ("Cache: L2 activated on BAB%d\n", eltec_board); - l2_cache_enable(*(int*)&eerev.res[0]); + printf ("Cache: L2 activated on BAB%d\n", eltec_board); + l2_cache_enable(*(int*)&eerev.res[0]); } #endif @@ -351,12 +351,12 @@ */ if ((ptr = getenv ("ata_reset_time")) != NULL) { - ata_reset_time = (int)simple_strtoul (ptr, NULL, 10); + ata_reset_time = (int)simple_strtoul (ptr, NULL, 10); } else { - sprintf (buf, "%d", ata_reset_time); - setenv ("ata_reset_time", buf); + sprintf (buf, "%d", ata_reset_time); + setenv ("ata_reset_time", buf); } /* @@ -364,55 +364,55 @@ */ if ((ptr = getenv ("scsi_reset_time")) != NULL) { - scsi_reset_time = (int)simple_strtoul (ptr, NULL, 10); + scsi_reset_time = (int)simple_strtoul (ptr, NULL, 10); } else { - sprintf (buf, "%d", scsi_reset_time); - setenv ("scsi_reset_time", buf); + sprintf (buf, "%d", scsi_reset_time); + setenv ("scsi_reset_time", buf); } if ((bdf = pci_find_device(PCI_VENDOR_ID_WINBOND, PCI_DEVICE_ID_WINBOND_83C553, 0)) > 0) { - if (pci_find_device(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860, 0) > 0) - { - /* BAB740 with SCSI=IRQ 11; SCC=IRQ 9; no IDE; NCR860 at 80 Mhz */ - scsi_dev_id = PCI_DEVICE_ID_NCR_53C860; - scsi_max_scsi_id = 7; - scsi_sym53c8xx_ccf = 0x15; - pci_write_config_byte (bdf, WINBOND_IDEIRCR, 0xb0); - } + if (pci_find_device(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C860, 0) > 0) + { + /* BAB740 with SCSI=IRQ 11; SCC=IRQ 9; no IDE; NCR860 at 80 Mhz */ + scsi_dev_id = PCI_DEVICE_ID_NCR_53C860; + scsi_max_scsi_id = 7; + scsi_sym53c8xx_ccf = 0x15; + pci_write_config_byte (bdf, WINBOND_IDEIRCR, 0xb0); + } - if ((ptr = getenv ("ide_dma_off")) != NULL) - { - u_long dma_off = simple_strtoul (ptr, NULL, 10); - /* - * setup user defined registers - * s.a. linux/drivers/ide/sl82c105.c - */ - bdf |= PCI_BDF(0,0,1); /* ide user reg at bdf function 1 */ - if (dma_off & 1) - { - pci_write_config_byte (bdf, 0x46, 1); - printf("IDE: DMA off flag set: Bus 0 : Dev 0\n"); - } - if (dma_off & 2) - { - pci_write_config_byte (bdf, 0x4a, 1); - printf("IDE: DMA off flag set: Bus 0 : Dev 1\n"); - } - if (dma_off & 4) - { - pci_write_config_byte (bdf, 0x4e, 1); - printf("IDE: DMA off flag set: Bus 1 : Dev 0\n"); - } - if (dma_off & 8) - { - pci_write_config_byte (bdf, 0x52, 1); - printf("IDE: DMA off flag set: Bus 1 : Dev 1\n"); - } - } + if ((ptr = getenv ("ide_dma_off")) != NULL) + { + u_long dma_off = simple_strtoul (ptr, NULL, 10); + /* + * setup user defined registers + * s.a. linux/drivers/ide/sl82c105.c + */ + bdf |= PCI_BDF(0,0,1); /* ide user reg at bdf function 1 */ + if (dma_off & 1) + { + pci_write_config_byte (bdf, 0x46, 1); + printf("IDE: DMA off flag set: Bus 0 : Dev 0\n"); + } + if (dma_off & 2) + { + pci_write_config_byte (bdf, 0x4a, 1); + printf("IDE: DMA off flag set: Bus 0 : Dev 1\n"); + } + if (dma_off & 4) + { + pci_write_config_byte (bdf, 0x4e, 1); + printf("IDE: DMA off flag set: Bus 1 : Dev 0\n"); + } + if (dma_off & 8) + { + pci_write_config_byte (bdf, 0x52, 1); + printf("IDE: DMA off flag set: Bus 1 : Dev 1\n"); + } + } } return (0); } @@ -498,48 +498,48 @@ if (eltec_board == 740) { - printf("SYM media select "); /* BAB740 */ - /* start autoneg. with 10 mbit */ - media_reg_init (dev, 0x3ffff, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400080); - ext = status = 0; - for (i=0; i<2000+ext; i++) - { - status = INL(dev, DE4X5_SISR); - udelay(1000); - if (status & 0x2000) ext = 2000; - if ((status & 0x7000) == 0x5000) break; - } + printf("SYM media select "); /* BAB740 */ + /* start autoneg. with 10 mbit */ + media_reg_init (dev, 0x3ffff, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400080); + ext = status = 0; + for (i=0; i<2000+ext; i++) + { + status = INL(dev, DE4X5_SISR); + udelay(1000); + if (status & 0x2000) ext = 2000; + if ((status & 0x7000) == 0x5000) break; + } - /* autoneg. ok -> 100MB FD */ - if ((status & 0x0100f000) == 0x0100d000) - { - media_reg_init (dev, 0x37f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40280); - printf("100baseTx-FD\n"); - } - /* autoneg. ok -> 100MB HD */ - else if ((status & 0x0080f000) == 0x0080d000) - { - media_reg_init (dev, 0x17f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40080); - printf("100baseTx\n"); - } - /* autoneg. ok -> 10MB FD */ - else if ((status & 0x0040f000) == 0x0040d000) - { - media_reg_init (dev, 0x07f7f, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400280); - printf("10baseT-FD\n"); - } - /* autoneg. fail -> 10MB HD */ - else - { - media_reg_init (dev, 0x7f7f, 0x08af0008, 0x00a10008, 0x00a50008, - (OMR_SDP | OMR_TTM | OMR_PM)); - printf("10baseT\n"); - } + /* autoneg. ok -> 100MB FD */ + if ((status & 0x0100f000) == 0x0100d000) + { + media_reg_init (dev, 0x37f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40280); + printf("100baseTx-FD\n"); + } + /* autoneg. ok -> 100MB HD */ + else if ((status & 0x0080f000) == 0x0080d000) + { + media_reg_init (dev, 0x17f7f, 0x08270008, 0x00210008, 0x00250008, 0x03c40080); + printf("100baseTx\n"); + } + /* autoneg. ok -> 10MB FD */ + else if ((status & 0x0040f000) == 0x0040d000) + { + media_reg_init (dev, 0x07f7f, 0x08af0008, 0x00a10008, 0x00a50008, 0x02400280); + printf("10baseT-FD\n"); + } + /* autoneg. fail -> 10MB HD */ + else + { + media_reg_init (dev, 0x7f7f, 0x08af0008, 0x00a10008, 0x00a50008, + (OMR_SDP | OMR_TTM | OMR_PM)); + printf("10baseT\n"); + } } else { - printf("MII media selected\n"); /* BAB750 */ - OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR); /* CSR6 */ + printf("MII media selected\n"); /* BAB750 */ + OUTL(dev, OMR_SDP | OMR_PS | OMR_PM, DE4X5_OMR); /* CSR6 */ } } #endif /* CONFIG_TULIP_SELECT_MEDIA */ diff --git a/board/eltec/bab7xx/pci.c b/board/eltec/bab7xx/pci.c index a5fcfef..edbd3dd 100644 --- a/board/eltec/bab7xx/pci.c +++ b/board/eltec/bab7xx/pci.c @@ -43,48 +43,48 @@ hose->last_busno = 0xff; pci_set_region(hose->regions + 0, - CFG_PCI_MEMORY_BUS, - CFG_PCI_MEMORY_PHYS, + CFG_PCI_MEMORY_BUS, + CFG_PCI_MEMORY_PHYS, /* * Attention: pci_hose_phys_to_bus() failes in address compare, * so we need (CFG_PCI_MEMORY_SIZE-1) */ - CFG_PCI_MEMORY_SIZE-1, - PCI_REGION_MEM | PCI_REGION_MEMORY); + CFG_PCI_MEMORY_SIZE-1, + PCI_REGION_MEM | PCI_REGION_MEMORY); /* PCI memory space */ pci_set_region(hose->regions + 1, - CFG_PCI_MEM_BUS, - CFG_PCI_MEM_PHYS, - CFG_PCI_MEM_SIZE, - PCI_REGION_MEM); + CFG_PCI_MEM_BUS, + CFG_PCI_MEM_PHYS, + CFG_PCI_MEM_SIZE, + PCI_REGION_MEM); /* ISA/PCI memory space */ pci_set_region(hose->regions + 2, - CFG_ISA_MEM_BUS, - CFG_ISA_MEM_PHYS, - CFG_ISA_MEM_SIZE, - PCI_REGION_MEM); + CFG_ISA_MEM_BUS, + CFG_ISA_MEM_PHYS, + CFG_ISA_MEM_SIZE, + PCI_REGION_MEM); /* PCI I/O space */ pci_set_region(hose->regions + 3, - CFG_PCI_IO_BUS, - CFG_PCI_IO_PHYS, - CFG_PCI_IO_SIZE, - PCI_REGION_IO); + CFG_PCI_IO_BUS, + CFG_PCI_IO_PHYS, + CFG_PCI_IO_SIZE, + PCI_REGION_IO); /* ISA/PCI I/O space */ pci_set_region(hose->regions + 4, - CFG_ISA_IO_BUS, - CFG_ISA_IO_PHYS, - CFG_ISA_IO_SIZE, - PCI_REGION_IO); + CFG_ISA_IO_BUS, + CFG_ISA_IO_PHYS, + CFG_ISA_IO_SIZE, + PCI_REGION_IO); hose->region_count = 5; pci_setup_indirect(hose, - MPC106_REG_ADDR, - MPC106_REG_DATA); + MPC106_REG_ADDR, + MPC106_REG_DATA); pci_register_hose(hose); @@ -93,9 +93,9 @@ /* Initialises the MPC10x PCI Configuration regs. */ pci_read_config_dword (PCI_BDF(0,0,0), PCI_PICR2, ®32); reg32 |= PICR2_CF_SNOOP_WS(3) | - PICR2_CF_FLUSH_L2 | - PICR2_CF_L2_HIT_DELAY(3) | - PICR2_CF_APHASE_WS(3); + PICR2_CF_FLUSH_L2 | + PICR2_CF_L2_HIT_DELAY(3) | + PICR2_CF_APHASE_WS(3); reg32 &= ~(PICR2_L2_EN | PICR2_L2_UPDATE_EN); pci_write_config_dword (PCI_BDF(0,0,0), PCI_PICR2, reg32); @@ -108,12 +108,12 @@ pci_read_config_dword (PCI_BDF(0,0,0), PCI_PICR1, ®32); reg32 |= PICR1_CF_CBA(63) | - PICR1_CF_BREAD_WS(2) | - PICR1_MCP_EN | - PICR1_CF_DPARK | - PICR1_PROC_TYPE_604 | - PICR1_CF_LOOP_SNOOP | - PICR1_CF_APARK; + PICR1_CF_BREAD_WS(2) | + PICR1_MCP_EN | + PICR1_CF_DPARK | + PICR1_PROC_TYPE_604 | + PICR1_CF_LOOP_SNOOP | + PICR1_CF_APARK; pci_write_config_dword (PCI_BDF(0,0,0), PCI_PICR1, reg32); } diff --git a/board/eltec/bab7xx/srom.h b/board/eltec/bab7xx/srom.h index 7924bcd..c18ab91 100644 --- a/board/eltec/bab7xx/srom.h +++ b/board/eltec/bab7xx/srom.h @@ -81,18 +81,18 @@ unsigned long el_srom_checksum (unsigned char *ptr, unsigned long size); int el_srom_load (unsigned char addr, unsigned char *buf, int cnt, - unsigned char device, unsigned char block); + unsigned char device, unsigned char block); int el_srom_store (unsigned char addr, unsigned char *buf, int cnt, - unsigned char device, unsigned char block); + unsigned char device, unsigned char block); int mpc107_i2c_init (unsigned long eumb_addr, unsigned long divider); int mpc107_i2c_read_byte (unsigned char device, unsigned char block, unsigned char offset); int mpc107_i2c_write_byte (unsigned char device, unsigned char block, - unsigned char offset, unsigned char val); + unsigned char offset, unsigned char val); int mpc107_srom_load (unsigned char addr, unsigned char *pBuf, int cnt, - unsigned char device, unsigned char block); + unsigned char device, unsigned char block); int mpc107_srom_store (unsigned char addr, unsigned char *pBuf, int cnt, - unsigned char device, unsigned char block); + unsigned char device, unsigned char block); int dc_srom_load (unsigned short *dest); int dc_srom_store (unsigned short *src); diff --git a/board/eltec/bab7xx/u-boot.lds b/board/eltec/bab7xx/u-boot.lds index de50bf4..0dfa8c0 100644 --- a/board/eltec/bab7xx/u-boot.lds +++ b/board/eltec/bab7xx/u-boot.lds @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/eltec/elppc/Makefile b/board/eltec/elppc/Makefile index 1ed1a24..76b2cfe 100644 --- a/board/eltec/elppc/Makefile +++ b/board/eltec/elppc/Makefile @@ -30,7 +30,7 @@ SOBJS = asm_init.o $(LIB): .depend $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) @@ -46,12 +46,3 @@ sinclude .depend ######################################################################### - - - - - - - - - diff --git a/board/eltec/elppc/eepro100_srom.c b/board/eltec/elppc/eepro100_srom.c index a5e47cf..9754c1d 100644 --- a/board/eltec/elppc/eepro100_srom.c +++ b/board/eltec/elppc/eepro100_srom.c @@ -32,7 +32,7 @@ #include "srom.h" extern int eepro100_write_eeprom (struct eth_device* dev, - int location, int addr_len, unsigned short data); + int location, int addr_len, unsigned short data); /*----------------------------------------------------------------------------*/ @@ -43,7 +43,7 @@ for (i = 0; i < (EE_SIZE-1); i++) { - sum += sromdata[i]; + sum += sromdata[i]; } return (EE_CHECKSUM - sum); } @@ -57,7 +57,7 @@ /* get onboard network iobase */ pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0, - &onboard_dev.iobase); + &onboard_dev.iobase); onboard_dev.iobase &= ~0xf; source[63] = eepro100_srom_checksum (source); @@ -65,8 +65,8 @@ for (count=0; count < EE_SIZE; count++) { if ( eepro100_write_eeprom ((struct eth_device*)&onboard_dev, - count, EE_ADDR_BITS, SROM_SHORT(source)) == -1 ) - return -1; + count, EE_ADDR_BITS, SROM_SHORT(source)) == -1 ) + return -1; source++; } return 0; @@ -89,22 +89,22 @@ /* get onboard network iobase */ pci_read_config_dword(PCI_BDF(0,0x10,0), PCI_BASE_ADDRESS_0, - &onboard_dev.iobase); + &onboard_dev.iobase); onboard_dev.iobase &= ~0xf; memset (destination, 0x65, 128); for (count=0; count < 0x40; count++) { - *destination++ = read_eeprom (struct eth_device*)&onboard_dev, - count, EE_ADDR_BITS); + *destination++ = read_eeprom (struct eth_device*)&onboard_dev, + count, EE_ADDR_BITS); #ifdef DEBUG - printf ("%04x ", *(destination - 1)); - if (lr++ == 7) - { - printf("\n"); - lr = 0; - } + printf ("%04x ", *(destination - 1)); + if (lr++ == 7) + { + printf("\n"); + lr = 0; + } #endif } } diff --git a/board/eltec/elppc/elppc.c b/board/eltec/elppc/elppc.c index 97b70a4..7b4d7d2 100644 --- a/board/eltec/elppc/elppc.c +++ b/board/eltec/elppc/elppc.c @@ -30,82 +30,81 @@ int checkboard (void) { - puts ("Board: ELTEC PowerPC\n"); - return (0); + puts ("Board: ELTEC PowerPC\n"); + return (0); } /* ------------------------------------------------------------------------- */ int checkflash (void) { - /* TODO */ - printf ("Test not implemented !\n"); - return (0); + /* TODO */ + printf ("Test not implemented !\n"); + return (0); } /* ------------------------------------------------------------------------- */ static unsigned int mpc106_read_cfg_dword (unsigned int reg) { - unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC); + unsigned int reg_addr = MPC106_REG | (reg & 0xFFFFFFFC); - out32r(MPC106_REG_ADDR, reg_addr); + out32r (MPC106_REG_ADDR, reg_addr); - return (in32r(MPC106_REG_DATA | (reg & 0x3))); + return (in32r (MPC106_REG_DATA | (reg & 0x3))); } /* ------------------------------------------------------------------------- */ long int dram_size (int board_type) { - /* - * No actual initialisation to do - done when setting up - * PICRs MCCRs ME/SARs etc in asm_init.S. - */ + /* + * No actual initialisation to do - done when setting up + * PICRs MCCRs ME/SARs etc in asm_init.S. + */ - register unsigned long i, msar1, mear1, memSize; + register unsigned long i, msar1, mear1, memSize; #if defined(CFG_MEMTEST) - register unsigned long reg; + register unsigned long reg; - printf("Testing DRAM\n"); + printf ("Testing DRAM\n"); - /* write each mem addr with it's address */ - for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4) - *reg = reg; + /* write each mem addr with it's address */ + for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) + *reg = reg; - for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg+=4) - { - if (*reg != reg) - return -1; - } + for (reg = CFG_MEMTEST_START; reg < CFG_MEMTEST_END; reg += 4) { + if (*reg != reg) + return -1; + } #endif - /* - * Since MPC107 memory controller chip has already been set to - * control all memory, just read and interpret its memory boundery register. - */ - memSize = 0; - msar1 = mpc106_read_cfg_dword(MPC106_MSAR1); - mear1 = mpc106_read_cfg_dword(MPC106_MEAR1); - i = mpc106_read_cfg_dword(MPC106_MBER) & 0xf; + /* + * Since MPC107 memory controller chip has already been set to + * control all memory, just read and interpret its memory boundery register. + */ + memSize = 0; + msar1 = mpc106_read_cfg_dword (MPC106_MSAR1); + mear1 = mpc106_read_cfg_dword (MPC106_MEAR1); + i = mpc106_read_cfg_dword (MPC106_MBER) & 0xf; - do - { - if (i & 0x01) /* is bank enabled ? */ - memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; - msar1 >>= 8; - mear1 >>= 8; - i >>= 1; - } while (i); + do { + if (i & 0x01) /* is bank enabled ? */ + memSize += (mear1 & 0xff) - (msar1 & 0xff) + 1; + msar1 >>= 8; + mear1 >>= 8; + i >>= 1; + } while (i); - return (memSize * 0x100000); + return (memSize * 0x100000); } + /* ------------------------------------------------------------------------- */ -long int initdram(int board_type) +long int initdram (int board_type) { - return dram_size(board_type); + return dram_size (board_type); } /* ------------------------------------------------------------------------- */ @@ -115,9 +114,10 @@ * Register PI in the MPC 107 (at offset 0x41090 of the Embedded Utilities * Memory Block). */ -void do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { - out8(MPC107_EUMB_PI, 1); + out8 (MPC107_EUMB_PI, 1); + return (0); } /* ------------------------------------------------------------------------- */ @@ -128,21 +128,21 @@ * Since the 7xx CPUs don't have an internal watchdog, this function is * board specific. */ -void watchdog_reset(void) +void watchdog_reset (void) { } -#endif /* CONFIG_WATCHDOG */ +#endif /* CONFIG_WATCHDOG */ /* ------------------------------------------------------------------------- */ void after_reloc (ulong dest_addr) { - DECLARE_GLOBAL_DATA_PTR; + DECLARE_GLOBAL_DATA_PTR; - /* - * Jump to the main U-Boot board init code - */ - board_init_r(gd, dest_addr); + /* + * Jump to the main U-Boot board init code + */ + board_init_r (gd, dest_addr); } /* ------------------------------------------------------------------------- */ @@ -152,38 +152,23 @@ void video_get_info_str (int line_number, char *info) { - /* init video info strings for graphic console */ - switch (line_number) - { - case 1: - sprintf (info," MPC7xx V%d.%d at %d / %d MHz", - (get_pvr() >> 8) & 0xFF, - get_pvr() & 0xFF, - 400, - 100); - return; - case 2: - sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH", - dram_size(0)/0x100000, - flash_init()/0x100000); - return; - case 3: - sprintf (info, " %s", smi.modeIdent); - return; - } + /* init video info strings for graphic console */ + switch (line_number) { + case 1: + sprintf (info, " MPC7xx V%d.%d at %d / %d MHz", + (get_pvr () >> 8) & 0xFF, get_pvr () & 0xFF, 400, 100); + return; + case 2: + sprintf (info, " ELTEC ELPPC with %ld MB DRAM and %ld MB FLASH", + dram_size (0) / 0x100000, flash_init () / 0x100000); + return; + case 3: + sprintf (info, " %s", smi.modeIdent); + return; + } - /* no more info lines */ - *info = 0; - return; + /* no more info lines */ + *info = 0; + return; } #endif - - - - - - - - - - diff --git a/board/eltec/elppc/flash.c b/board/eltec/elppc/flash.c index 73496a1..442dd00 100644 --- a/board/eltec/elppc/flash.c +++ b/board/eltec/elppc/flash.c @@ -57,7 +57,7 @@ /* Init: no FLASHes known */ for (i=0; iflash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - flash_init(); + printf ("missing or unknown FLASH type\n"); + flash_init(); } if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; + printf ("missing or unknown FLASH type\n"); + return; } switch (info->flash_id & FLASH_VENDMASK) { case FLASH_MAN_AMD: - printf ("AMD "); - break; + printf ("AMD "); + break; default: - printf ("Unknown Vendor "); - break; + printf ("Unknown Vendor "); + break; } switch (info->flash_id & FLASH_TYPEMASK) { case AMD_ID_F040B: - printf ("AM29F040B (4 Mbit)\n"); - break; + printf ("AM29F040B (4 Mbit)\n"); + break; case AMD_ID_F016D: - printf ("AM29F016D (16 Mbit)\n"); - break; + printf ("AM29F016D (16 Mbit)\n"); + break; case AMD_ID_F032B: - printf ("AM29F032B (32 Mbit)\n"); - break; + printf ("AM29F032B (32 Mbit)\n"); + break; default: - printf ("Unknown Chip Type\n"); - break; + printf ("Unknown Chip Type\n"); + break; } if (info->size >= (1 << 20)) { - printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); + printf (" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); } else { - printf (" Size: %ld kB in %d Sectors\n", info->size >> 10, info->sector_count); + printf (" Size: %ld kB in %d Sectors\n", info->size >> 10, info->sector_count); } printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; + /* + * Check if whole sector is erased + */ + if (i != (info->sector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; kstart[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kstart[i], - erased ? " E" : " ", - info->protect[i] ? "RO " : " "); + printf (" %08lX%s%s", + info->start[i], + erased ? " E" : " ", + info->protect[i] ? "RO " : " "); } printf ("\n"); } @@ -226,37 +226,37 @@ /* We accept only two AMD types */ switch (vendor) { case (FLASH_WORD_SIZE)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; + info->flash_id = FLASH_MAN_AMD; + break; default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ } switch (devid) { case (FLASH_WORD_SIZE)AMD_ID_F040B: - info->flash_id |= AMD_ID_F040B; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 0.5 MB */ + info->flash_id |= AMD_ID_F040B; + info->sector_count = 8; + info->size = 0x00080000; + break; /* => 0.5 MB */ case (FLASH_WORD_SIZE)AMD_ID_F016D: - info->flash_id |= AMD_ID_F016D; - info->sector_count = 32; - info->size = 0x00200000; - break; /* => 2 MB */ + info->flash_id |= AMD_ID_F016D; + info->sector_count = 32; + info->size = 0x00200000; + break; /* => 2 MB */ case (FLASH_WORD_SIZE)AMD_ID_F032B: - info->flash_id |= AMD_ID_F032B; - info->sector_count = 64; - info->size = 0x00400000; - break; /* => 4 MB */ + info->flash_id |= AMD_ID_F032B; + info->sector_count = 64; + info->size = 0x00400000; + break; /* => 4 MB */ default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ } @@ -266,20 +266,20 @@ /* check for protected sectors */ for (i = 0; i < info->sector_count; i++) { - /* sector base address */ - info->start[i] = base + i * (info->size / info->sector_count); - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - caddr = (volatile unsigned char *)(info->start[i]); - info->protect[i] = caddr[2] & 1; + /* sector base address */ + info->start[i] = base + i * (info->size / info->sector_count); + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + caddr = (volatile unsigned char *)(info->start[i]); + info->protect[i] = caddr[2] & 1; } /* * Prevent writes to uninitialized FLASH. */ if (info->flash_id != FLASH_UNKNOWN) { - caddr = (volatile unsigned char *)info->start[0]; - caddr[0] = 0xF0; /* reset bank */ + caddr = (volatile unsigned char *)info->start[0]; + caddr[0] = 0xF0; /* reset bank */ } return (info->size); @@ -295,32 +295,32 @@ int rc = 0; if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; } if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > FLASH_AMD_COMP)) { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; + (info->flash_id > FLASH_AMD_COMP)) { + printf ("Can't erase unknown flash type - aborted\n"); + return 1; } prot = 0; for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } + if (info->protect[sect]) { + prot++; + } } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); } else { - printf ("\n"); + printf ("\n"); } l_sect = -1; @@ -336,26 +336,26 @@ /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (FLASH_WORD_SIZE *)(info->start[sect]); - if (info->flash_id & FLASH_MAN_SST) { - addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; - addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ - udelay(30000); /* wait 30 ms */ - } - else - addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ - l_sect = sect; - } + if (info->protect[sect] == 0) { /* not protected */ + addr = (FLASH_WORD_SIZE *)(info->start[sect]); + if (info->flash_id & FLASH_MAN_SST) { + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00800080; + addr[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ + udelay(30000); /* wait 30 ms */ + } + else + addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ + l_sect = sect; + } } /* re-enable interrupts if necessary */ if (flag) - enable_interrupts(); + enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ udelay (1000); @@ -364,21 +364,21 @@ * We wait for the last triggered sector */ if (l_sect < 0) - goto DONE; + goto DONE; start = get_timer (0); last = start; addr = (FLASH_WORD_SIZE *)(info->start[l_sect]); while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - serial_putc ('.'); - last = now; - } + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + serial_putc ('.'); + last = now; + } } DONE: @@ -408,42 +408,42 @@ * handle unaligned start bytes */ if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } + data = 0; + for (i=0, cp=wp; i0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; } /* * handle word aligned part */ while (cnt >= 4) { - data = 0; - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; } if (cnt == 0) { - return (0); + return (0); } /* @@ -451,11 +451,11 @@ */ data = 0; for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; + data = (data << 8) | *src++; + --cnt; } for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + data = (data << 8) | (*(uchar *)cp); } return (write_word(info, wp, data)); @@ -469,45 +469,44 @@ */ static int write_word (flash_info_t *info, ulong dest, ulong data) { - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); - volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; - volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); + volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; + volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; ulong start; int flag; - int i; + int i; /* Check if Flash is (sufficiently) erased */ if ((*((volatile FLASH_WORD_SIZE *)dest) & - (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { - return (2); + (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { + return (2); } /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) - { - addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; - addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; - addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; + for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) + { + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00AA00AA; + addr2[ADDR1] = (FLASH_WORD_SIZE)0x00550055; + addr2[ADDR0] = (FLASH_WORD_SIZE)0x00A000A0; - dest2[i] = data2[i]; + dest2[i] = data2[i]; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - return (1); - } - } - } + /* data polling for D7 */ + start = get_timer (0); + while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != + (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + } return (0); } /*----------------------------------------------------------------------------*/ - diff --git a/board/eltec/elppc/misc.c b/board/eltec/elppc/misc.c index 7bfb3a4..f33aef7 100644 --- a/board/eltec/elppc/misc.c +++ b/board/eltec/elppc/misc.c @@ -32,7 +32,7 @@ extern char console_buffer[CFG_CBSIZE]; extern int l2_cache_enable (int l2control); extern int eepro100_write_eeprom (struct eth_device* dev, int location, - int addr_len, unsigned short data); + int addr_len, unsigned short data); extern int read_eeprom (struct eth_device* dev, int location, int addr_len); /*----------------------------------------------------------------------------*/ @@ -45,7 +45,7 @@ uchar *s = (uchar *) (CFG_ENV_MAP_ADRS + src); while (count--) - *d++ = *s++; + *d++ = *s++; return dest; } @@ -56,7 +56,7 @@ uchar *s = (uchar *) src; while (count--) - *d++ = *s++; + *d++ = *s++; } /*----------------------------------------------------------------------------*/ @@ -72,7 +72,7 @@ u_int i, l, initSrom, copyNv; char buf[256]; char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0, - 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 }; + 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 }; /* Clock setting for MPC107 i2c */ mpc107_i2c_init (MPC107_EUMB_ADDR, 0x2b); @@ -91,166 +91,166 @@ /* read out current revision srom contens */ mpc107_srom_load (0x0000, (u_char*)&eerev, sizeof(revinfo), - SECOND_DEVICE, FIRST_BLOCK); + SECOND_DEVICE, FIRST_BLOCK); /* read out current nvram shadow image */ nvram_read (buf, CFG_NV_SROM_COPY_ADDR, CFG_SROM_SIZE); if (strcmp (eerev.magic, "ELTEC") != 0) { - /* srom is not initialized -> create a default revision info */ - for (i = 0, ptr = (u_char *)&eerev; i < sizeof(revinfo); i++) - *ptr++ = 0x00; - strcpy(eerev.magic, "ELTEC"); - eerev.revrev[0] = 1; - eerev.revrev[1] = 0; - eerev.size = 0x00E0; - eerev.category[0] = 0x01; + /* srom is not initialized -> create a default revision info */ + for (i = 0, ptr = (u_char *)&eerev; i < sizeof(revinfo); i++) + *ptr++ = 0x00; + strcpy(eerev.magic, "ELTEC"); + eerev.revrev[0] = 1; + eerev.revrev[1] = 0; + eerev.size = 0x00E0; + eerev.category[0] = 0x01; - /* node id from dead e128 as default */ - eerev.etheraddr[0] = 0x00; - eerev.etheraddr[1] = 0x00; - eerev.etheraddr[2] = 0x5B; - eerev.etheraddr[3] = 0x00; - eerev.etheraddr[4] = 0x2E; - eerev.etheraddr[5] = 0x4D; + /* node id from dead e128 as default */ + eerev.etheraddr[0] = 0x00; + eerev.etheraddr[1] = 0x00; + eerev.etheraddr[2] = 0x5B; + eerev.etheraddr[3] = 0x00; + eerev.etheraddr[4] = 0x2E; + eerev.etheraddr[5] = 0x4D; - /* cache config word for ELPPC */ - *(int*)&eerev.res[0] = 0; + /* cache config word for ELPPC */ + *(int*)&eerev.res[0] = 0; - initSrom = 1; /* force dialog */ - copyNv = 1; /* copy to nvram */ + initSrom = 1; /* force dialog */ + copyNv = 1; /* copy to nvram */ } if ((copyNv == 0) && (el_srom_checksum((u_char*)&eerev, CFG_SROM_SIZE) != - el_srom_checksum((u_char*)buf, CFG_SROM_SIZE))) + el_srom_checksum((u_char*)buf, CFG_SROM_SIZE))) { - printf ("Invalid revision info copy in nvram !\n"); - printf ("Press key:\n to copy current revision info to nvram.\n"); - printf (" to reenter revision info.\n"); - printf ("=> "); - if (0 != readline (NULL)) - { - switch ((char)toupper(console_buffer[0])) - { - case 'C': - copyNv = 1; - break; - case 'R': - copyNv = 1; - initSrom = 1; - break; - } - } + printf ("Invalid revision info copy in nvram !\n"); + printf ("Press key:\n to copy current revision info to nvram.\n"); + printf (" to reenter revision info.\n"); + printf ("=> "); + if (0 != readline (NULL)) + { + switch ((char)toupper(console_buffer[0])) + { + case 'C': + copyNv = 1; + break; + case 'R': + copyNv = 1; + initSrom = 1; + break; + } + } } if (initSrom) { - memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */ - printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]); - if (0 != readline (NULL)) - { - eerev.revision[0][0] = (char)toupper(console_buffer[0]); - memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */ - } + memcpy (buf, &eerev.revision[0][0], 14); /* save all revision info */ + printf ("Enter revision number (0-9): %c ", eerev.revision[0][0]); + if (0 != readline (NULL)) + { + eerev.revision[0][0] = (char)toupper(console_buffer[0]); + memcpy (&eerev.revision[1][0], buf, 12); /* shift rest of rev info */ + } - printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]); - if (1 == readline (NULL)) - { - eerev.revision[0][1] = (char)toupper(console_buffer[0]); - } + printf ("Enter revision character (A-Z): %c ", eerev.revision[0][1]); + if (1 == readline (NULL)) + { + eerev.revision[0][1] = (char)toupper(console_buffer[0]); + } - printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board); - if (11 == readline (NULL)) - { - for (i=0; i<11; i++) - eerev.board[i] = (char)toupper(console_buffer[i]); - eerev.board[11] = '\0'; - } + printf ("Enter board name (V-XXXX-XXXX): %s ", (char *)&eerev.board); + if (11 == readline (NULL)) + { + for (i=0; i<11; i++) + eerev.board[i] = (char)toupper(console_buffer[i]); + eerev.board[11] = '\0'; + } - printf ("Enter serial number: %s ", (char *)&eerev.serial ); - if (6 == readline (NULL)) - { - for (i=0; i<6; i++) - eerev.serial[i] = console_buffer[i]; - eerev.serial[6] = '\0'; - } + printf ("Enter serial number: %s ", (char *)&eerev.serial ); + if (6 == readline (NULL)) + { + for (i=0; i<6; i++) + eerev.serial[i] = console_buffer[i]; + eerev.serial[6] = '\0'; + } - printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", - eerev.etheraddr[0], eerev.etheraddr[1], - eerev.etheraddr[2], eerev.etheraddr[3], - eerev.etheraddr[4], eerev.etheraddr[5]); - if (12 == readline (NULL)) - { - for (i=0; i<12; i+=2) - eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] + - hex[toupper(console_buffer[i+1])-'0']); - } + printf ("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", + eerev.etheraddr[0], eerev.etheraddr[1], + eerev.etheraddr[2], eerev.etheraddr[3], + eerev.etheraddr[4], eerev.etheraddr[5]); + if (12 == readline (NULL)) + { + for (i=0; i<12; i+=2) + eerev.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] + + hex[toupper(console_buffer[i+1])-'0']); + } - l = strlen ((char *)&eerev.text); - printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text ); - if (0 != readline (NULL)) - { - for (i = l; i<63; i++) - eerev.text[i] = console_buffer[i-l]; - eerev.text[63] = '\0'; - } + l = strlen ((char *)&eerev.text); + printf("Add to text section (max 64 chr): %s ", (char *)&eerev.text ); + if (0 != readline (NULL)) + { + for (i = l; i<63; i++) + eerev.text[i] = console_buffer[i-l]; + eerev.text[63] = '\0'; + } - /* prepare network eeprom */ - memset (buf, 0, 128); + /* prepare network eeprom */ + memset (buf, 0, 128); - buf[0] = eerev.etheraddr[1]; - buf[1] = eerev.etheraddr[0]; - buf[2] = eerev.etheraddr[3]; - buf[3] = eerev.etheraddr[2]; - buf[4] = eerev.etheraddr[5]; - buf[5] = eerev.etheraddr[4]; + buf[0] = eerev.etheraddr[1]; + buf[1] = eerev.etheraddr[0]; + buf[2] = eerev.etheraddr[3]; + buf[3] = eerev.etheraddr[2]; + buf[4] = eerev.etheraddr[5]; + buf[5] = eerev.etheraddr[4]; - *(unsigned short *)&buf[20] = 0x48B2; - *(unsigned short *)&buf[22] = 0x0004; - *(unsigned short *)&buf[24] = 0x1433; + *(unsigned short *)&buf[20] = 0x48B2; + *(unsigned short *)&buf[22] = 0x0004; + *(unsigned short *)&buf[24] = 0x1433; - printf("\nSRom: Writing i82559 info ........ "); - if (eepro100_srom_store ((unsigned short *)buf) == -1) - printf("FAILED\n"); - else - printf("OK\n"); + printf("\nSRom: Writing i82559 info ........ "); + if (eepro100_srom_store ((unsigned short *)buf) == -1) + printf("FAILED\n"); + else + printf("OK\n"); - /* update CRC */ - eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size); + /* update CRC */ + eerev.crc = el_srom_checksum((u_char *)eerev.board, eerev.size); - /* write new values */ - printf("\nSRom: Writing revision info ...... "); - if (mpc107_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev, - sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1) - printf("FAILED\n\n"); - else - printf("OK\n\n"); + /* write new values */ + printf("\nSRom: Writing revision info ...... "); + if (mpc107_srom_store((BLOCK_SIZE-sizeof(revinfo)), (u_char *)&eerev, + sizeof(revinfo), SECOND_DEVICE, FIRST_BLOCK) == -1) + printf("FAILED\n\n"); + else + printf("OK\n\n"); - /* write new values as shadow image to nvram */ - nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); + /* write new values as shadow image to nvram */ + nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); } /*if (initSrom) */ /* copy current values as shadow image to nvram */ if (initSrom == 0 && copyNv == 1) - nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); + nvram_write (CFG_NV_SROM_COPY_ADDR, (void *)&eerev, CFG_SROM_SIZE); /* update environment */ sprintf (buf, "%02x:%02x:%02x:%02x:%02x:%02x", - eerev.etheraddr[0], eerev.etheraddr[1], - eerev.etheraddr[2], eerev.etheraddr[3], - eerev.etheraddr[4], eerev.etheraddr[5]); + eerev.etheraddr[0], eerev.etheraddr[1], + eerev.etheraddr[2], eerev.etheraddr[3], + eerev.etheraddr[4], eerev.etheraddr[5]); setenv ("ethaddr", buf); /* set serial console as default */ if ((ptr = getenv ("console")) == NULL) - setenv ("console", "serial"); + setenv ("console", "serial"); /* print actual board identification */ printf("Ident: %s Ser %s Rev %c%c\n", - eerev.board, (char *)&eerev.serial, - eerev.revision[0][0], eerev.revision[0][1]); + eerev.board, (char *)&eerev.serial, + eerev.revision[0][0], eerev.revision[0][1]); return (0); } diff --git a/board/eltec/elppc/mpc107_i2c.c b/board/eltec/elppc/mpc107_i2c.c index a4bf599..ae6642e 100644 --- a/board/eltec/elppc/mpc107_i2c.c +++ b/board/eltec/elppc/mpc107_i2c.c @@ -43,13 +43,13 @@ for (; size; size--) { - byte = *ptr++; - for (i = 8; i; i--) - { - f = ((byte & 1) ^ (accu & 1)) ? 0x84083001 : 0; - accu >>= 1; accu ^= f; - byte >>= 1; - } + byte = *ptr++; + for (i = 8; i; i--) + { + f = ((byte & 1) ^ (accu & 1)) ? 0x84083001 : 0; + accu >>= 1; accu ^= f; + byte >>= 1; + } } return(accu); } @@ -62,13 +62,13 @@ while (((x = in32r(MPC107_I2CSR)) & 0x82) != 0x82) { - if (!timeout--) - return -1; + if (!timeout--) + return -1; } if (x & 0x10) { - return -1; + return -1; } out32r(MPC107_I2CSR, 0); @@ -81,8 +81,8 @@ { while (in32r(MPC107_I2CSR) & 0x20) { - if (!timeout--) - return -1; + if (!timeout--) + return -1; } return 0; } @@ -99,7 +99,7 @@ int data; if (!mpc107_eumb_addr) - return -6; + return -6; mpc107_i2c_wait_idle (timeout); @@ -112,15 +112,15 @@ if (mpc107_i2c_wait(timeout) < 0) { - printf("mpc107_i2c_read Error 1\n"); - return -2; + printf("mpc107_i2c_read Error 1\n"); + return -2; } if (in32r(MPC107_I2CSR)&0x1) { - /* Generate STOP condition; device busy or not existing */ - out32r(MPC107_I2CCR, 0x80); - return -1; + /* Generate STOP condition; device busy or not existing */ + out32r(MPC107_I2CCR, 0x80); + return -1; } /* Data address */ @@ -128,8 +128,8 @@ if (mpc107_i2c_wait(timeout) < 0) { - printf("mpc107_i2c_read Error 2\n"); - return -3; + printf("mpc107_i2c_read Error 2\n"); + return -3; } /* Switch to read - restart */ @@ -138,8 +138,8 @@ if (mpc107_i2c_wait(timeout) < 0) { - printf("mpc107_i2c_read Error 3\n"); - return -4; + printf("mpc107_i2c_read Error 3\n"); + return -4; } out32r(MPC107_I2CCR, 0xA8); /* no ACK */ @@ -147,8 +147,8 @@ if (mpc107_i2c_wait(timeout) < 0) { - printf("mpc107_i2c_read Error 4\n"); - return -5; + printf("mpc107_i2c_read Error 4\n"); + return -5; } /* Generate STOP condition */ out32r(MPC107_I2CCR, 0x88); @@ -171,7 +171,7 @@ unsigned long timeout = MPC107_I2C_TIMEOUT; if (!mpc107_eumb_addr) - return -6; + return -6; mpc107_i2c_wait_idle(timeout); @@ -184,8 +184,8 @@ if (mpc107_i2c_wait(timeout) < 0) { - printf("mpc107_i2c_write Error 1\n"); - return -1; + printf("mpc107_i2c_write Error 1\n"); + return -1; } /* Data address */ @@ -193,16 +193,16 @@ if (mpc107_i2c_wait(timeout) < 0) { - printf("mpc107_i2c_write Error 2\n"); - return -1; + printf("mpc107_i2c_write Error 2\n"); + return -1; } /* Write */ out32r(MPC107_I2CDR, val); if (mpc107_i2c_wait(timeout) < 0) { - printf("mpc107_i2c_write Error 3\n"); - return -1; + printf("mpc107_i2c_write Error 3\n"); + return -1; } /* Generate Stop Condition */ @@ -227,38 +227,38 @@ for (i = 0; i < cnt; i++) { - timeout=100; - do - { - val = mpc107_i2c_read_byte (device, block, addr); - if (val < -1) - { - printf("i2c_read_error %d at dev %x block %x addr %x\n", - val, device, block, addr); - return -1; - } - else if (timeout==0) - { - printf ("i2c_read_error: timeout at dev %x block %x addr %x\n", - device, block, addr); - return -1; - } - timeout--; - } while (val == -1); /* if no ack: try again! */ + timeout=100; + do + { + val = mpc107_i2c_read_byte (device, block, addr); + if (val < -1) + { + printf("i2c_read_error %d at dev %x block %x addr %x\n", + val, device, block, addr); + return -1; + } + else if (timeout==0) + { + printf ("i2c_read_error: timeout at dev %x block %x addr %x\n", + device, block, addr); + return -1; + } + timeout--; + } while (val == -1); /* if no ack: try again! */ - *pBuf++ = (unsigned char)val; - addr++; + *pBuf++ = (unsigned char)val; + addr++; - if ((addr == 0) && (i != cnt-1)) /* is it the same block ? */ - { - if (block == FIRST_BLOCK) - block = SECOND_BLOCK; - else - { - printf ("ic2_read_error: read beyond 2. block !\n"); - return -1; - } - } + if ((addr == 0) && (i != cnt-1)) /* is it the same block ? */ + { + if (block == FIRST_BLOCK) + block = SECOND_BLOCK; + else + { + printf ("ic2_read_error: read beyond 2. block !\n"); + return -1; + } + } } udelay(100000); return (cnt); @@ -277,20 +277,20 @@ for (i = 0; i < cnt; i++) { - while (mpc107_i2c_write_byte (device,block,addr,*pBuf) == 1); - addr++; - pBuf++; + while (mpc107_i2c_write_byte (device,block,addr,*pBuf) == 1); + addr++; + pBuf++; - if ((addr == 0) && (i != cnt-1)) /* is it the same block ? */ - { - if (block == FIRST_BLOCK) - block = SECOND_BLOCK; - else - { - printf ("ic2_write_error: write beyond 2. block !\n"); - return -1; - } - } + if ((addr == 0) && (i != cnt-1)) /* is it the same block ? */ + { + if (block == FIRST_BLOCK) + block = SECOND_BLOCK; + else + { + printf ("ic2_write_error: write beyond 2. block !\n"); + return -1; + } + } } udelay(100000); return(cnt); @@ -303,9 +303,9 @@ unsigned long x; if (eumb_addr) - mpc107_eumb_addr = eumb_addr; + mpc107_eumb_addr = eumb_addr; else - return -1; + return -1; /* Set I2C clock */ x = in32r(MPC107_I2CFDR) & 0xffffff00; diff --git a/board/eltec/elppc/pci.c b/board/eltec/elppc/pci.c index 2bbb5f2..5b115ea 100644 --- a/board/eltec/elppc/pci.c +++ b/board/eltec/elppc/pci.c @@ -42,44 +42,44 @@ hose->last_busno = 0xff; pci_set_region(hose->regions + 0, - CFG_PCI_MEMORY_BUS, - CFG_PCI_MEMORY_PHYS, - CFG_PCI_MEMORY_SIZE, - PCI_REGION_MEM | PCI_REGION_MEMORY); + CFG_PCI_MEMORY_BUS, + CFG_PCI_MEMORY_PHYS, + CFG_PCI_MEMORY_SIZE, + PCI_REGION_MEM | PCI_REGION_MEMORY); /* PCI memory space */ pci_set_region(hose->regions + 1, - CFG_PCI_MEM_BUS, - CFG_PCI_MEM_PHYS, - CFG_PCI_MEM_SIZE, - PCI_REGION_MEM); + CFG_PCI_MEM_BUS, + CFG_PCI_MEM_PHYS, + CFG_PCI_MEM_SIZE, + PCI_REGION_MEM); /* ISA/PCI memory space */ pci_set_region(hose->regions + 2, - CFG_ISA_MEM_BUS, - CFG_ISA_MEM_PHYS, - CFG_ISA_MEM_SIZE, - PCI_REGION_MEM); + CFG_ISA_MEM_BUS, + CFG_ISA_MEM_PHYS, + CFG_ISA_MEM_SIZE, + PCI_REGION_MEM); /* PCI I/O space */ pci_set_region(hose->regions + 3, - CFG_PCI_IO_BUS, - CFG_PCI_IO_PHYS, - CFG_PCI_IO_SIZE, - PCI_REGION_IO); + CFG_PCI_IO_BUS, + CFG_PCI_IO_PHYS, + CFG_PCI_IO_SIZE, + PCI_REGION_IO); /* ISA/PCI I/O space */ pci_set_region(hose->regions + 4, - CFG_ISA_IO_BUS, - CFG_ISA_IO_PHYS, - CFG_ISA_IO_SIZE, - PCI_REGION_IO); + CFG_ISA_IO_BUS, + CFG_ISA_IO_PHYS, + CFG_ISA_IO_SIZE, + PCI_REGION_IO); hose->region_count = 5; pci_setup_indirect(hose, - MPC106_REG_ADDR, - MPC106_REG_DATA); + MPC106_REG_ADDR, + MPC106_REG_DATA); pci_register_hose(hose); diff --git a/board/eltec/elppc/srom.h b/board/eltec/elppc/srom.h index 7924bcd..c18ab91 100644 --- a/board/eltec/elppc/srom.h +++ b/board/eltec/elppc/srom.h @@ -81,18 +81,18 @@ unsigned long el_srom_checksum (unsigned char *ptr, unsigned long size); int el_srom_load (unsigned char addr, unsigned char *buf, int cnt, - unsigned char device, unsigned char block); + unsigned char device, unsigned char block); int el_srom_store (unsigned char addr, unsigned char *buf, int cnt, - unsigned char device, unsigned char block); + unsigned char device, unsigned char block); int mpc107_i2c_init (unsigned long eumb_addr, unsigned long divider); int mpc107_i2c_read_byte (unsigned char device, unsigned char block, unsigned char offset); int mpc107_i2c_write_byte (unsigned char device, unsigned char block, - unsigned char offset, unsigned char val); + unsigned char offset, unsigned char val); int mpc107_srom_load (unsigned char addr, unsigned char *pBuf, int cnt, - unsigned char device, unsigned char block); + unsigned char device, unsigned char block); int mpc107_srom_store (unsigned char addr, unsigned char *pBuf, int cnt, - unsigned char device, unsigned char block); + unsigned char device, unsigned char block); int dc_srom_load (unsigned short *dest); int dc_srom_store (unsigned short *src); diff --git a/board/eltec/elppc/u-boot.lds b/board/eltec/elppc/u-boot.lds index de50bf4..0dfa8c0 100644 --- a/board/eltec/elppc/u-boot.lds +++ b/board/eltec/elppc/u-boot.lds @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/eltec/mhpc/Makefile b/board/eltec/mhpc/Makefile index ef173d0..13ce9fc 100644 --- a/board/eltec/mhpc/Makefile +++ b/board/eltec/mhpc/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/eltec/mhpc/config.mk b/board/eltec/mhpc/config.mk index 607ebbc..03934de 100644 --- a/board/eltec/mhpc/config.mk +++ b/board/eltec/mhpc/config.mk @@ -31,19 +31,3 @@ TEXT_BASE = 0xfe000000 /*TEXT_BASE = 0x00200000 */ - - - - - - - - - - - - - - - - diff --git a/board/eltec/mhpc/flash.c b/board/eltec/mhpc/flash.c index e9c8f98..4cc66a9 100644 --- a/board/eltec/mhpc/flash.c +++ b/board/eltec/mhpc/flash.c @@ -193,13 +193,13 @@ switch (value) { case (FPW)INTEL_ID_28F640J5 : - info->flash_id += FLASH_28F640J5 ; - info->sector_count = 64; - info->size = 0x00800000; - break; /* => 8 MB */ + info->flash_id += FLASH_28F640J5 ; + info->sector_count = 64; + info->size = 0x00800000; + break; /* => 8 MB */ - default: - info->flash_id = FLASH_UNKNOWN; + default: + info->flash_id = FLASH_UNKNOWN; break; } @@ -429,25 +429,3 @@ return (0); } - - - - - - - - - - - - - - - - - - - - - - diff --git a/board/eltec/mhpc/mhpc.c b/board/eltec/mhpc/mhpc.c index 81f820a..83952d8 100644 --- a/board/eltec/mhpc/mhpc.c +++ b/board/eltec/mhpc/mhpc.c @@ -40,17 +40,17 @@ extern void eeprom_init (void); extern int eeprom_read (unsigned dev_addr, unsigned offset, - unsigned char *buffer, unsigned cnt); + unsigned char *buffer, unsigned cnt); extern int eeprom_write (unsigned dev_addr, unsigned offset, - unsigned char *buffer, unsigned cnt); + unsigned char *buffer, unsigned cnt); /* globals */ void *video_hw_init(void); void video_set_lut (unsigned int index, /* color number */ - unsigned char r, /* red */ - unsigned char g, /* green */ - unsigned char b /* blue */ - ); + unsigned char r, /* red */ + unsigned char g, /* green */ + unsigned char b /* blue */ + ); GraphicDevice gdev; @@ -153,9 +153,9 @@ revinfo mhpcRevInfo; char nid[32]; char *mhpcSensorTypes[] = { "OMNIVISON OV7610/7620 color", - "OMNIVISON OV7110 b&w", NULL }; + "OMNIVISON OV7110 b&w", NULL }; char hex[23] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 0, 0, 0, - 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 }; + 0, 0, 0, 0, 10, 11, 12, 13, 14, 15 }; int i; /* check revision data */ @@ -166,62 +166,62 @@ printf ("Enter revision number (0-9): %c ", mhpcRevInfo.revision[0]); if (0 != readline (NULL)) { - mhpcRevInfo.revision[0] = (char)toupper(console_buffer[0]); + mhpcRevInfo.revision[0] = (char)toupper(console_buffer[0]); } printf ("Enter revision character (A-Z): %c ", mhpcRevInfo.revision[1]); if (1 == readline (NULL)) { - mhpcRevInfo.revision[1] = (char)toupper(console_buffer[0]); + mhpcRevInfo.revision[1] = (char)toupper(console_buffer[0]); } printf("Enter board name (V-XXXX-XXXX): %s ", (char *)&mhpcRevInfo.board); if (11 == readline (NULL)) { - for (i=0; i<11; i++) - { - mhpcRevInfo.board[i] = (char)toupper(console_buffer[i]); - mhpcRevInfo.board[11] = '\0'; - } + for (i=0; i<11; i++) + { + mhpcRevInfo.board[i] = (char)toupper(console_buffer[i]); + mhpcRevInfo.board[11] = '\0'; + } } printf("Supported sensor types:\n"); i=0; do { - printf("\n \'%d\' : %s\n", i, mhpcSensorTypes[i]); + printf("\n \'%d\' : %s\n", i, mhpcSensorTypes[i]); } while ( mhpcSensorTypes[++i] != NULL ); do { - printf("\nEnter sensor number (0-255): %d ", (int)mhpcRevInfo.sensor ); - if (0 != readline (NULL)) - { - mhpcRevInfo.sensor = (unsigned char)simple_strtoul(console_buffer, NULL, 10); - } + printf("\nEnter sensor number (0-255): %d ", (int)mhpcRevInfo.sensor ); + if (0 != readline (NULL)) + { + mhpcRevInfo.sensor = (unsigned char)simple_strtoul(console_buffer, NULL, 10); + } } while ( mhpcRevInfo.sensor >= i ); printf("Enter serial number: %s ", (char *)&mhpcRevInfo.serial ); if (6 == readline (NULL)) { - for (i=0; i<6; i++) - { - mhpcRevInfo.serial[i] = console_buffer[i]; - } - mhpcRevInfo.serial[6] = '\0'; + for (i=0; i<6; i++) + { + mhpcRevInfo.serial[i] = console_buffer[i]; + } + mhpcRevInfo.serial[6] = '\0'; } printf("Enter ether node ID with leading zero (HEX): %02x%02x%02x%02x%02x%02x ", - mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], - mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], - mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5] ); + mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], + mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], + mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5] ); if (12 == readline (NULL)) { - for (i=0; i<12; i+=2) - { - mhpcRevInfo.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] + - hex[toupper(console_buffer[i+1])-'0']); - } + for (i=0; i<12; i+=2) + { + mhpcRevInfo.etheraddr[i>>1] = (char)(16*hex[toupper(console_buffer[i])-'0'] + + hex[toupper(console_buffer[i+1])-'0']); + } } /* setup new revision data */ @@ -230,16 +230,16 @@ /* set environment */ sprintf( nid, "%02x:%02x:%02x:%02x:%02x:%02x", - mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], - mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], - mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5]); + mhpcRevInfo.etheraddr[0], mhpcRevInfo.etheraddr[1], + mhpcRevInfo.etheraddr[2], mhpcRevInfo.etheraddr[3], + mhpcRevInfo.etheraddr[4], mhpcRevInfo.etheraddr[5]); setenv("ethaddr", nid); /* print actual board identification */ printf("Ident: %s %s Ser %s Rev %c%c\n", - mhpcRevInfo.board, (mhpcRevInfo.sensor==0?"color":"b&w"), - (char *)&mhpcRevInfo.serial, - mhpcRevInfo.revision[0], mhpcRevInfo.revision[1]); + mhpcRevInfo.board, (mhpcRevInfo.sensor==0?"color":"b&w"), + (char *)&mhpcRevInfo.serial, + mhpcRevInfo.revision[0], mhpcRevInfo.revision[1]); return (0); } @@ -308,29 +308,29 @@ *(center-x+y*pitch) = color; while(y>x) { - if (d<0) - { - d += dE; - dE += 2; - dSE += 2; - x++; - } - else - { - d += dSE; - dE += 2; - dSE += 4; - x++; - y--; - } - *(center+x+y*pitch) = color; - *(center+y+x*pitch) = color; - *(center+y-x*pitch) = color; - *(center+x-y*pitch) = color; - *(center-x-y*pitch) = color; - *(center-y-x*pitch) = color; - *(center-y+x*pitch) = color; - *(center-x+y*pitch) = color; + if (d<0) + { + d += dE; + dE += 2; + dSE += 2; + x++; + } + else + { + d += dSE; + dE += 2; + dSE += 4; + x++; + y--; + } + *(center+x+y*pitch) = color; + *(center+y+x*pitch) = color; + *(center+y-x*pitch) = color; + *(center+x-y*pitch) = color; + *(center-x-y*pitch) = color; + *(center-y-x*pitch) = color; + *(center-y+x*pitch) = color; + *(center-x+y*pitch) = color; } } @@ -344,31 +344,31 @@ /* draw raster */ for (i=0; iim_lcd.lcd_lccr = 0x96000866; @@ -433,7 +433,7 @@ immr->im_lcd.lcd_lcvcr = 0x900f0024; printf ("Video: 640x480 8Bit Index Lut %s\n", - (clut==1?"240/16 (gray/vga)":"256(gray)")); + (clut==1?"240/16 (gray/vga)":"256(gray)")); video_default_lut (clut); @@ -451,11 +451,11 @@ gdev.gdfIndex = GDF__8BIT_INDEX; if (clut > 1) - /* return Graphic Device for console */ - return (void *)&gdev; + /* return Graphic Device for console */ + return (void *)&gdev; else - /* just graphic enabled - draw something beautiful */ - video_test_image(); + /* just graphic enabled - draw something beautiful */ + video_test_image(); return NULL; /* this disabels cfb - console */ } @@ -463,7 +463,7 @@ /* ------------------------------------------------------------------------- */ void video_set_lut (unsigned int index, - unsigned char r, unsigned char g, unsigned char b) + unsigned char r, unsigned char g, unsigned char b) { unsigned int lum; unsigned short *pLut = (unsigned short *)(CFG_IMMR + 0x0e00); diff --git a/board/eltec/mhpc/u-boot.lds b/board/eltec/mhpc/u-boot.lds index 7128155..526198c 100644 --- a/board/eltec/mhpc/u-boot.lds +++ b/board/eltec/mhpc/u-boot.lds @@ -99,6 +99,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -121,4 +126,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/eltec/mhpc/u-boot.lds.debug b/board/eltec/mhpc/u-boot.lds.debug index 8dc6d40..f6f7cf4 100644 --- a/board/eltec/mhpc/u-boot.lds.debug +++ b/board/eltec/mhpc/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/emk/top860/Makefile b/board/emk/top860/Makefile index ef173d0..13ce9fc 100644 --- a/board/emk/top860/Makefile +++ b/board/emk/top860/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/emk/top860/flash.c b/board/emk/top860/flash.c index a9a9771..0f827df 100644 --- a/board/emk/top860/flash.c +++ b/board/emk/top860/flash.c @@ -2,11 +2,11 @@ * (C) Copyright 2003 * EMK Elektronik GmbH * Reinhard Meyer - * - * copied from the BMW Port - seems that its similiar enough - * to be easily adaped ;) --- Well, it turned out to become a - * merger between parts of the EMKstax Flash routines and the - * BMW funtion frames... + * + * copied from the BMW Port - seems that its similiar enough + * to be easily adaped ;) --- Well, it turned out to become a + * merger between parts of the EMKstax Flash routines and the + * BMW funtion frames... * * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -34,457 +34,456 @@ #include #define FLASH_WORD_SIZE unsigned short -#define FLASH_WORD_WIDTH (sizeof (FLASH_WORD_SIZE)) - +#define FLASH_WORD_WIDTH (sizeof (FLASH_WORD_SIZE)) + flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ - + /*----------------------------------------------------------------------- * Functions */ static int write_word (flash_info_t *info, ulong dest, ulong data); -/***************************************************************************** - * software product ID entry/exit - *****************************************************************************/ -static void FlashProductIdMode ( - volatile FLASH_WORD_SIZE *b, - int on_off) -{ - b[0x5555] = 0xaa; - b[0x2aaa] = 0x55; - b[0x5555] = on_off ? 0x90 : 0xf0; -} - -/***************************************************************************** - * sector erase start - *****************************************************************************/ -static void FlashSectorErase ( - volatile FLASH_WORD_SIZE *b, - volatile FLASH_WORD_SIZE *a) -{ - b[0x5555] = 0xaa; - b[0x2aaa] = 0x55; - b[0x5555] = 0x80; - b[0x5555] = 0xaa; - b[0x2aaa] = 0x55; - a[0] = 0x30; -} - -/***************************************************************************** - * program a word - *****************************************************************************/ -static void FlashProgWord ( - volatile FLASH_WORD_SIZE *b, - volatile FLASH_WORD_SIZE *a, - FLASH_WORD_SIZE v) -{ - b[0x5555] = 0xaa; - b[0x2aaa] = 0x55; - b[0x5555] = 0xa0; - a[0] = v; -} - -/***************************************************************************** - * reset bank, back to read mode - *****************************************************************************/ -static void FlashReset (volatile FLASH_WORD_SIZE *b) -{ - b[0] = 0xf0; -} - -/***************************************************************************** - * identify FLASH chip - * this code is a stripped version of the FlashGetType() function in EMKstax - *****************************************************************************/ +/***************************************************************************** + * software product ID entry/exit + *****************************************************************************/ +static void FlashProductIdMode ( + volatile FLASH_WORD_SIZE *b, + int on_off) +{ + b[0x5555] = 0xaa; + b[0x2aaa] = 0x55; + b[0x5555] = on_off ? 0x90 : 0xf0; +} + +/***************************************************************************** + * sector erase start + *****************************************************************************/ +static void FlashSectorErase ( + volatile FLASH_WORD_SIZE *b, + volatile FLASH_WORD_SIZE *a) +{ + b[0x5555] = 0xaa; + b[0x2aaa] = 0x55; + b[0x5555] = 0x80; + b[0x5555] = 0xaa; + b[0x2aaa] = 0x55; + a[0] = 0x30; +} + +/***************************************************************************** + * program a word + *****************************************************************************/ +static void FlashProgWord ( + volatile FLASH_WORD_SIZE *b, + volatile FLASH_WORD_SIZE *a, + FLASH_WORD_SIZE v) +{ + b[0x5555] = 0xaa; + b[0x2aaa] = 0x55; + b[0x5555] = 0xa0; + a[0] = v; +} + +/***************************************************************************** + * reset bank, back to read mode + *****************************************************************************/ +static void FlashReset (volatile FLASH_WORD_SIZE *b) +{ + b[0] = 0xf0; +} + +/***************************************************************************** + * identify FLASH chip + * this code is a stripped version of the FlashGetType() function in EMKstax + *****************************************************************************/ unsigned long flash_init (void) -{ - volatile FLASH_WORD_SIZE * const flash = (volatile FLASH_WORD_SIZE *) CFG_FLASH_BASE; - FLASH_WORD_SIZE manu, dev; - flash_info_t * const pflinfo = &flash_info[0]; - int j; - - /* get Id Bytes */ - FlashProductIdMode (flash, 1); - manu = flash[0]; - dev = flash[1]; - FlashProductIdMode (flash, 0); - - pflinfo->size = 0; - pflinfo->sector_count = 0; - pflinfo->flash_id = 0xffffffff; - pflinfo->portwidth = FLASH_CFI_16BIT; - pflinfo->chipwidth = FLASH_CFI_BY16; - - switch (manu&0xff) - { - case 0x01: /* AMD */ - pflinfo->flash_id = FLASH_MAN_AMD; - switch (dev&0xff) - { - case 0x49: - pflinfo->size = 0x00200000; - pflinfo->sector_count = 35; - pflinfo->flash_id |= FLASH_AM160B; - pflinfo->start[0] = CFG_FLASH_BASE; - pflinfo->start[1] = CFG_FLASH_BASE + 0x4000; - pflinfo->start[2] = CFG_FLASH_BASE + 0x6000; - pflinfo->start[3] = CFG_FLASH_BASE + 0x8000; - for (j = 4; j < 35; j++) - { - pflinfo->start[j] = CFG_FLASH_BASE + 0x00010000 * (j-3); - } - break; - - case 0xf9: - pflinfo->size = 0x00400000; - pflinfo->sector_count = 71; - pflinfo->flash_id |= FLASH_AM320B; - pflinfo->start[0] = CFG_FLASH_BASE; - pflinfo->start[1] = CFG_FLASH_BASE + 0x4000; - pflinfo->start[2] = CFG_FLASH_BASE + 0x6000; - pflinfo->start[3] = CFG_FLASH_BASE + 0x8000; - for (j = 0; j < 8; j++) - { - pflinfo->start[j] = CFG_FLASH_BASE + 0x00002000 * (j); - } - for (j = 8; j < 71; j++) - { - pflinfo->start[j] = CFG_FLASH_BASE + 0x00010000 * (j-7); - } - break; - - default: - printf ("unknown AMD dev=%x ", dev); - pflinfo->flash_id |= FLASH_UNKNOWN; - } - break; - - default: - printf ("unknown manu=%x ", manu); - } - return pflinfo->size; +{ + volatile FLASH_WORD_SIZE * const flash = (volatile FLASH_WORD_SIZE *) CFG_FLASH_BASE; + FLASH_WORD_SIZE manu, dev; + flash_info_t * const pflinfo = &flash_info[0]; + int j; + + /* get Id Bytes */ + FlashProductIdMode (flash, 1); + manu = flash[0]; + dev = flash[1]; + FlashProductIdMode (flash, 0); + + pflinfo->size = 0; + pflinfo->sector_count = 0; + pflinfo->flash_id = 0xffffffff; + pflinfo->portwidth = FLASH_CFI_16BIT; + pflinfo->chipwidth = FLASH_CFI_BY16; + + switch (manu&0xff) + { + case 0x01: /* AMD */ + pflinfo->flash_id = FLASH_MAN_AMD; + switch (dev&0xff) + { + case 0x49: + pflinfo->size = 0x00200000; + pflinfo->sector_count = 35; + pflinfo->flash_id |= FLASH_AM160B; + pflinfo->start[0] = CFG_FLASH_BASE; + pflinfo->start[1] = CFG_FLASH_BASE + 0x4000; + pflinfo->start[2] = CFG_FLASH_BASE + 0x6000; + pflinfo->start[3] = CFG_FLASH_BASE + 0x8000; + for (j = 4; j < 35; j++) + { + pflinfo->start[j] = CFG_FLASH_BASE + 0x00010000 * (j-3); + } + break; + + case 0xf9: + pflinfo->size = 0x00400000; + pflinfo->sector_count = 71; + pflinfo->flash_id |= FLASH_AM320B; + pflinfo->start[0] = CFG_FLASH_BASE; + pflinfo->start[1] = CFG_FLASH_BASE + 0x4000; + pflinfo->start[2] = CFG_FLASH_BASE + 0x6000; + pflinfo->start[3] = CFG_FLASH_BASE + 0x8000; + for (j = 0; j < 8; j++) + { + pflinfo->start[j] = CFG_FLASH_BASE + 0x00002000 * (j); + } + for (j = 8; j < 71; j++) + { + pflinfo->start[j] = CFG_FLASH_BASE + 0x00010000 * (j-7); + } + break; + + default: + printf ("unknown AMD dev=%x ", dev); + pflinfo->flash_id |= FLASH_UNKNOWN; + } + break; + + default: + printf ("unknown manu=%x ", manu); + } + return pflinfo->size; } -/***************************************************************************** - * print info about a FLASH - *****************************************************************************/ +/***************************************************************************** + * print info about a FLASH + *****************************************************************************/ void flash_print_info (flash_info_t *info) -{ - static const char unk[] = "Unknown"; - unsigned int i; - const char *mfct=unk, - *type=unk; - - if(info->flash_id != FLASH_UNKNOWN) - { - switch (info->flash_id & FLASH_VENDMASK) - { - case FLASH_MAN_AMD: - mfct = "AMD"; - break; - } - - switch (info->flash_id & FLASH_TYPEMASK) - { - case FLASH_AM160B: - type = "AM29LV160B (16 Mbit, bottom boot sect)"; - break; - case FLASH_AM320B: - type = "AM29LV320B (32 Mbit, bottom boot sect)"; - break; - } - } - - printf ( - "\n Brand: %s Type: %s\n" - " Size: %lu KB in %d Sectors\n", - mfct, - type, - info->size >> 10, - info->sector_count - ); - - printf (" Sector Start Addresses:"); - - for (i = 0; i < info->sector_count; i++) - { - unsigned long size; - unsigned int erased; - unsigned long *flash = (unsigned long *) info->start[i]; - - /* - * Check if whole sector is erased - */ - size = - (i != (info->sector_count - 1)) ? - (info->start[i + 1] - info->start[i]) >> 2 : - (info->start[0] + info->size - info->start[i]) >> 2; - - for ( - flash = (unsigned long *) info->start[i], erased = 1; - (flash != (unsigned long *) info->start[i] + size) && erased; - flash++ - ) - erased = *flash == ~0x0UL; - - printf ( - "%s %08lX %s %s", - (i % 5) ? "" : "\n ", - info->start[i], - erased ? "E" : " ", - info->protect[i] ? "RO" : " " - ); - } - - puts ("\n"); - return; +{ + static const char unk[] = "Unknown"; + unsigned int i; + const char *mfct=unk, + *type=unk; + + if(info->flash_id != FLASH_UNKNOWN) + { + switch (info->flash_id & FLASH_VENDMASK) + { + case FLASH_MAN_AMD: + mfct = "AMD"; + break; + } + + switch (info->flash_id & FLASH_TYPEMASK) + { + case FLASH_AM160B: + type = "AM29LV160B (16 Mbit, bottom boot sect)"; + break; + case FLASH_AM320B: + type = "AM29LV320B (32 Mbit, bottom boot sect)"; + break; + } + } + + printf ( + "\n Brand: %s Type: %s\n" + " Size: %lu KB in %d Sectors\n", + mfct, + type, + info->size >> 10, + info->sector_count + ); + + printf (" Sector Start Addresses:"); + + for (i = 0; i < info->sector_count; i++) + { + unsigned long size; + unsigned int erased; + unsigned long *flash = (unsigned long *) info->start[i]; + + /* + * Check if whole sector is erased + */ + size = + (i != (info->sector_count - 1)) ? + (info->start[i + 1] - info->start[i]) >> 2 : + (info->start[0] + info->size - info->start[i]) >> 2; + + for ( + flash = (unsigned long *) info->start[i], erased = 1; + (flash != (unsigned long *) info->start[i] + size) && erased; + flash++ + ) + erased = *flash == ~0x0UL; + + printf ( + "%s %08lX %s %s", + (i % 5) ? "" : "\n ", + info->start[i], + erased ? "E" : " ", + info->protect[i] ? "RO" : " " + ); + } + + puts ("\n"); + return; } -/***************************************************************************** - * erase one or more sectors - *****************************************************************************/ +/***************************************************************************** + * erase one or more sectors + *****************************************************************************/ int flash_erase (flash_info_t *info, int s_first, int s_last) -{ - volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); - int flag, - prot, - sect, - l_sect; - ulong start, - now, - last; - - if ((s_first < 0) || (s_first > s_last)) - { - if (info->flash_id == FLASH_UNKNOWN) - { - printf ("- missing\n"); - } - else - { - printf ("- no sectors to erase\n"); - } - return 1; - } - - if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) - { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; - } - - prot = 0; - for (sect=s_first; sect<=s_last; ++sect) - { - if (info->protect[sect]) - { - prot++; - } - } - - if (prot) - { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } - else - { - printf ("\n"); - } - - l_sect = -1; - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); - - /* Start erase on unprotected sectors */ - for (sect = s_first; sect<=s_last; sect++) - { - if (info->protect[sect] == 0) - { /* not protected */ - FlashSectorErase ((FLASH_WORD_SIZE *)info->start[0], (FLASH_WORD_SIZE *)info->start[sect]); - l_sect = sect; - } - } - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); - - /* wait at least 80us - let's wait 1 ms */ - udelay (1000); - - /* - * We wait for the last triggered sector - */ - if (l_sect < 0) - goto DONE; - - start = get_timer (0); - last = start; - addr = (FLASH_WORD_SIZE *)info->start[l_sect]; - while ((addr[0] & 0x0080) != 0x0080) - { - if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) - { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) - { /* every second */ - serial_putc ('.'); - last = now; - } - } - - DONE: - /* reset to read mode */ - FlashReset ((FLASH_WORD_SIZE *)info->start[0]); - - printf (" done\n"); - return 0; +{ + volatile FLASH_WORD_SIZE *addr = (FLASH_WORD_SIZE *)(info->start[0]); + int flag, + prot, + sect, + l_sect; + ulong start, + now, + last; + + if ((s_first < 0) || (s_first > s_last)) + { + if (info->flash_id == FLASH_UNKNOWN) + { + printf ("- missing\n"); + } + else + { + printf ("- no sectors to erase\n"); + } + return 1; + } + + if ((info->flash_id == FLASH_UNKNOWN) || + (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) + { + printf ("Can't erase unknown flash type - aborted\n"); + return 1; + } + + prot = 0; + for (sect=s_first; sect<=s_last; ++sect) + { + if (info->protect[sect]) + { + prot++; + } + } + + if (prot) + { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); + } + else + { + printf ("\n"); + } + + l_sect = -1; + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); + + /* Start erase on unprotected sectors */ + for (sect = s_first; sect<=s_last; sect++) + { + if (info->protect[sect] == 0) + { /* not protected */ + FlashSectorErase ((FLASH_WORD_SIZE *)info->start[0], (FLASH_WORD_SIZE *)info->start[sect]); + l_sect = sect; + } + } + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); + + /* wait at least 80us - let's wait 1 ms */ + udelay (1000); + + /* + * We wait for the last triggered sector + */ + if (l_sect < 0) + goto DONE; + + start = get_timer (0); + last = start; + addr = (FLASH_WORD_SIZE *)info->start[l_sect]; + while ((addr[0] & 0x0080) != 0x0080) + { + if ((now = get_timer (start)) > CFG_FLASH_ERASE_TOUT) + { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) + { /* every second */ + serial_putc ('.'); + last = now; + } + } + + DONE: + /* reset to read mode */ + FlashReset ((FLASH_WORD_SIZE *)info->start[0]); + + printf (" done\n"); + return 0; } -/***************************************************************************** +/***************************************************************************** * Copy memory to flash, returns: * 0 - OK * 1 - write timeout * 2 - Flash not erased - *****************************************************************************/ + *****************************************************************************/ int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) -{ - ulong cp, - wp, - data; - int i, - l, - rc; - - wp = (addr & ~(FLASH_WORD_WIDTH-1)); /* get lower word aligned address */ - - /* - * handle unaligned start bytes, if there are... - */ - if ((l = addr - wp) != 0) - { - data = 0; - - /* get the current before the new data into our data word */ - for (i=0, cp=wp; i0; ++i, ++cp, --cnt) - { - data = (data << 8) | *src++; - } - - /* get the current after the new data into our data word */ - for (; cnt==0 && i= FLASH_WORD_WIDTH) - { - data = 0; - for (i=0; i0; ++i, ++cp) - { - data = (data << 8) | *src++; - --cnt; - } - - /* get the current after the new data into our data word */ - for (; i0; ++i, ++cp, --cnt) + { + data = (data << 8) | *src++; + } + + /* get the current after the new data into our data word */ + for (; cnt==0 && i= FLASH_WORD_WIDTH) + { + data = 0; + for (i=0; i0; ++i, ++cp) + { + data = (data << 8) | *src++; + --cnt; + } + + /* get the current after the new data into our data word */ + for (; istart[0]; - volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; - FLASH_WORD_SIZE data2 = data; - ulong start; - int flag; - - /* Check if Flash is (sufficiently) erased */ - if ((*dest2 & data2) != data2) - { - return (2); - } - - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts (); - - FlashProgWord (addr2, dest2, data2); - - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts (); - - /* data polling for D7 */ - start = get_timer (0); - while ((*dest2 & 0x0080) != (data2 & 0x0080)) - { - if (get_timer (start) > CFG_FLASH_WRITE_TOUT) - { - return (1); - } - } - - return (0); +{ + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0]; + volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; + FLASH_WORD_SIZE data2 = data; + ulong start; + int flag; + + /* Check if Flash is (sufficiently) erased */ + if ((*dest2 & data2) != data2) + { + return (2); + } + + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts (); + + FlashProgWord (addr2, dest2, data2); + + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts (); + + /* data polling for D7 */ + start = get_timer (0); + while ((*dest2 & 0x0080) != (data2 & 0x0080)) + { + if (get_timer (start) > CFG_FLASH_WRITE_TOUT) + { + return (1); + } + } + + return (0); } /*----------------------------------------------------------------------- */ - diff --git a/board/emk/top860/top860.c b/board/emk/top860/top860.c index b99bf0e..d13be98 100644 --- a/board/emk/top860/top860.c +++ b/board/emk/top860/top860.c @@ -35,47 +35,47 @@ #include #include -/***************************************************************************** - * UPM table for 60ns EDO RAM at 25 MHz bus/external clock - *****************************************************************************/ +/***************************************************************************** + * UPM table for 60ns EDO RAM at 25 MHz bus/external clock + *****************************************************************************/ static const uint edo_60ns_25MHz_tbl[] = { - -/* single read (offset 0x00 in upm ram) */ - 0x0ff3fc04,0x08f3fc04,0x00f3fc04,0x00f3fc00, - 0x33f7fc07,0xfffffc05,0xfffffc05,0xfffffc05, -/* burst read (offset 0x08 in upm ram) */ - 0x0ff3fc04,0x08f3fc04,0x00f3fc0c,0x0ff3fc40, - 0x0cf3fc04,0x03f3fc48,0x0cf3fc04,0x03f3fc48, - 0x0cf3fc04,0x03f3fc00,0x3ff7fc07,0xfffffc05, - 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, -/* single write (offset 0x18 in upm ram) */ - 0x0ffffc04,0x08fffc04,0x30fffc00,0xf1fffc07, - 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, -/* burst write (offset 0x20 in upm ram) */ - 0x0ffffc04,0x08fffc00,0x00fffc04,0x03fffc4c, - 0x00fffc00,0x07fffc4c,0x00fffc00,0x0ffffc4c, - 0x00fffc00,0x3ffffc07,0xfffffc05,0xfffffc05, - 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, -/* refresh (offset 0x30 in upm ram) */ - 0xc0fffc04,0x07fffc04,0x0ffffc04,0x0ffffc04, - 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, - 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, -/* exception (offset 0x3C in upm ram) */ - 0xfffffc07,0xfffffc03,0xfffffc05,0xfffffc05, + +/* single read (offset 0x00 in upm ram) */ + 0x0ff3fc04,0x08f3fc04,0x00f3fc04,0x00f3fc00, + 0x33f7fc07,0xfffffc05,0xfffffc05,0xfffffc05, +/* burst read (offset 0x08 in upm ram) */ + 0x0ff3fc04,0x08f3fc04,0x00f3fc0c,0x0ff3fc40, + 0x0cf3fc04,0x03f3fc48,0x0cf3fc04,0x03f3fc48, + 0x0cf3fc04,0x03f3fc00,0x3ff7fc07,0xfffffc05, + 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, +/* single write (offset 0x18 in upm ram) */ + 0x0ffffc04,0x08fffc04,0x30fffc00,0xf1fffc07, + 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, +/* burst write (offset 0x20 in upm ram) */ + 0x0ffffc04,0x08fffc00,0x00fffc04,0x03fffc4c, + 0x00fffc00,0x07fffc4c,0x00fffc00,0x0ffffc4c, + 0x00fffc00,0x3ffffc07,0xfffffc05,0xfffffc05, + 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, +/* refresh (offset 0x30 in upm ram) */ + 0xc0fffc04,0x07fffc04,0x0ffffc04,0x0ffffc04, + 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, + 0xfffffc05,0xfffffc05,0xfffffc05,0xfffffc05, +/* exception (offset 0x3C in upm ram) */ + 0xfffffc07,0xfffffc03,0xfffffc05,0xfffffc05, }; -/***************************************************************************** - * Print Board Identity - *****************************************************************************/ +/***************************************************************************** + * Print Board Identity + *****************************************************************************/ int checkboard (void) { puts ("Board:"CONFIG_IDENT_STRING"\n"); return (0); } -/***************************************************************************** - * Initialize DRAM controller - *****************************************************************************/ +/***************************************************************************** + * Initialize DRAM controller + *****************************************************************************/ long int initdram (int board_type) { volatile immap_t *immap = (immap_t *) CFG_IMMR; @@ -85,103 +85,93 @@ * Only initialize memory controller when running from FLASH. * When running from RAM, don't touch it. */ - if ((ulong) initdram & 0xff000000) - { - volatile uint *addr1, *addr2; - uint i, j; + if ((ulong) initdram & 0xff000000) { + volatile uint *addr1, *addr2; + uint i, j; - upmconfig (UPMA, (uint *) edo_60ns_25MHz_tbl, - sizeof (edo_60ns_25MHz_tbl) / sizeof (uint)); + upmconfig (UPMA, (uint *) edo_60ns_25MHz_tbl, + sizeof (edo_60ns_25MHz_tbl) / sizeof (uint)); memctl->memc_mptpr = 0x0200; memctl->memc_mamr = 0x0ca20330; memctl->memc_or2 = -CFG_DRAM_MAX | OR_CSNT_SAM; memctl->memc_br2 = CFG_DRAM_BASE | BR_MS_UPMA | BR_V; - /* - * Do 8 read accesses to DRAM - */ - addr1 = (volatile uint*) 0; - addr2 = (volatile uint*) 0x00400000; - for (i=0, j=0; i<8; i++) - j = addr1[0]; - - /* - * Now check whether we got 4MB or 16MB populated - */ - addr1[0] = 0x12345678; - addr1[1] = 0x9abcdef0; - addr2[0] = 0xfeedc0de; - addr2[1] = 0x47110815; - if (addr1[0] == 0xfeedc0de && addr1[1] == 0x47110815) - { - /* only 4MB populated */ - memctl->memc_or2 = -(CFG_DRAM_MAX/4) | OR_CSNT_SAM; - } - } - + /* + * Do 8 read accesses to DRAM + */ + addr1 = (volatile uint *) 0; + addr2 = (volatile uint *) 0x00400000; + for (i = 0, j = 0; i < 8; i++) + j = addr1[0]; + + /* + * Now check whether we got 4MB or 16MB populated + */ + addr1[0] = 0x12345678; + addr1[1] = 0x9abcdef0; + addr2[0] = 0xfeedc0de; + addr2[1] = 0x47110815; + if (addr1[0] == 0xfeedc0de && addr1[1] == 0x47110815) { + /* only 4MB populated */ + memctl->memc_or2 = -(CFG_DRAM_MAX / 4) | OR_CSNT_SAM; + } + } + return -(memctl->memc_or2 & 0xffff0000); } - -/***************************************************************************** - * otherinits after RAM is there and we are relocated to RAM - * note: though this is an int function, nobody cares for the result! - *****************************************************************************/ + +/***************************************************************************** + * otherinits after RAM is there and we are relocated to RAM + * note: though this is an int function, nobody cares for the result! + *****************************************************************************/ int misc_init_r (void) -{ - /* read 'factory' part of EEPROM */ - uchar buf[81]; - uchar *p; - uint length; - uint addr; - uint len; - - /* get length first */ - addr = CFG_FACT_OFFSET; - if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) - { -bailout: - printf ("cannot read factory configuration\n"); - printf ("be sure to set ethaddr yourself!\n"); - return 0; +{ + /* read 'factory' part of EEPROM */ + uchar buf[81]; + uchar *p; + uint length; + uint addr; + uint len; + + /* get length first */ + addr = CFG_FACT_OFFSET; + if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, 2)) { + bailout: + printf ("cannot read factory configuration\n"); + printf ("be sure to set ethaddr yourself!\n"); + return 0; } - length = buf[0] + (buf[1]<<8); - addr += 2; - - /* sanity check */ - if (length < 20 || length > CFG_FACT_SIZE-2) - goto bailout; - - /* read lines */ - while (length > 0) - { - /* read one line */ - len = length > 80 ? 80 : length; - if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len)) - goto bailout; - /* mark end of buffer */ - buf[len] = 0; - /* search end of line */ - for (p=buf; *p && *p != 0x0a; p++) ; - if (!*p) - goto bailout; - *p++ = 0; - /* advance to next line start */ - length -= p-buf; - addr += p-buf; - /*printf ("%s\n", buf);*/ - /* search for our specific entry */ - if (!strncmp ((char *)buf, "[RLA/lan/Ethernet] ", 19)) - { - setenv ("ethaddr", buf+19); - } - else if (!strncmp ((char *)buf, "[BOARD/SERIAL] ", 15)) - { - setenv ("serial#", buf+15); - } - else if (!strncmp ((char *)buf, "[BOARD/TYPE] ", 13)) - { - setenv ("board_id", buf+13); - } - } + length = buf[0] + (buf[1] << 8); + addr += 2; + + /* sanity check */ + if (length < 20 || length > CFG_FACT_SIZE - 2) + goto bailout; + + /* read lines */ + while (length > 0) { + /* read one line */ + len = length > 80 ? 80 : length; + if (eeprom_read (CFG_I2C_FACT_ADDR, addr, buf, len)) + goto bailout; + /* mark end of buffer */ + buf[len] = 0; + /* search end of line */ + for (p = buf; *p && *p != 0x0a; p++); + if (!*p) + goto bailout; + *p++ = 0; + /* advance to next line start */ + length -= p - buf; + addr += p - buf; + /*printf ("%s\n", buf); */ + /* search for our specific entry */ + if (!strncmp ((char *) buf, "[RLA/lan/Ethernet] ", 19)) { + setenv ("ethaddr", buf + 19); + } else if (!strncmp ((char *) buf, "[BOARD/SERIAL] ", 15)) { + setenv ("serial#", buf + 15); + } else if (!strncmp ((char *) buf, "[BOARD/TYPE] ", 13)) { + setenv ("board_id", buf + 13); + } + } return (0); } - diff --git a/board/emk/top860/u-boot.lds b/board/emk/top860/u-boot.lds index 6371110..f6f5485 100644 --- a/board/emk/top860/u-boot.lds +++ b/board/emk/top860/u-boot.lds @@ -98,6 +98,12 @@ _edata = .; PROVIDE (edata = .); + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +126,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/emk/top860/u-boot.lds.debug b/board/emk/top860/u-boot.lds.debug index bd13b7b..8d91be5 100644 --- a/board/emk/top860/u-boot.lds.debug +++ b/board/emk/top860/u-boot.lds.debug @@ -129,4 +129,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/ep7312/Makefile b/board/ep7312/Makefile index 60b3363..2b4c975 100644 --- a/board/ep7312/Makefile +++ b/board/ep7312/Makefile @@ -30,7 +30,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/ep7312/memsetup.S b/board/ep7312/memsetup.S index dca1ed4..6078937 100644 --- a/board/ep7312/memsetup.S +++ b/board/ep7312/memsetup.S @@ -21,7 +21,6 @@ */ - #include #include @@ -94,4 +93,3 @@ /* everything is fine now */ mov pc, lr - diff --git a/board/ep7312/u-boot.lds b/board/ep7312/u-boot.lds index 0849648..915e7c4 100644 --- a/board/ep7312/u-boot.lds +++ b/board/ep7312/u-boot.lds @@ -26,28 +26,32 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/arm720t/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } armboot_end = .; } diff --git a/board/ep8260/Makefile b/board/ep8260/Makefile index 1c631dc..477e5ee 100644 --- a/board/ep8260/Makefile +++ b/board/ep8260/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o mii_phy.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/ep8260/ep8260.c b/board/ep8260/ep8260.c index dc33edb..a49c53e 100644 --- a/board/ep8260/ep8260.c +++ b/board/ep8260/ep8260.c @@ -307,4 +307,3 @@ #endif /* CFG_RAMBOOT */ return (size * 1024 * 1024); } - diff --git a/board/ep8260/flash.c b/board/ep8260/flash.c index d9dbdbe..cdfdcf2 100644 --- a/board/ep8260/flash.c +++ b/board/ep8260/flash.c @@ -67,7 +67,7 @@ flashtest_l = V_ULONG(baseaddr + 4); if ((int)flashtest_h == AMD_MANUFACT) { - info->flash_id = FLASH_MAN_AMD; + info->flash_id = FLASH_MAN_AMD; } else { info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; @@ -102,10 +102,10 @@ for (i = 0; i < info->sector_count; i++) { /* read sector protection at sector address, (A7 .. A0) = 0x02 */ if ((V_ULONG( info->start[i] + 16 ) & 0x00010001) || - (V_ULONG( info->start[i] + 20 ) & 0x00010001)) { + (V_ULONG( info->start[i] + 20 ) & 0x00010001)) { info->protect[i] = 1; /* D0 = 1 if protected */ } else { - info->protect[i] = 0; + info->protect[i] = 0; } } @@ -387,7 +387,7 @@ /* data polling for D7 */ start = get_timer (0); while (((V_ULONG( dest ) & 0x00800080) != (ch & 0x00800080)) || - ((V_ULONG( dest + 4 ) & 0x00800080) != (cl & 0x00800080))) { + ((V_ULONG( dest + 4 ) & 0x00800080) != (cl & 0x00800080))) { if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { return (1); } diff --git a/board/ep8260/mii_phy.c b/board/ep8260/mii_phy.c index e3b7878..813f020 100644 --- a/board/ep8260/mii_phy.c +++ b/board/ep8260/mii_phy.c @@ -38,7 +38,7 @@ if (phy_reg & 0x0400) printf("Phy operating at %d MBit/s in %s-duplex mode\n", phy_reg & 0x4000 ? 100 : 10, - phy_reg & 0x0200 ? "full" : "half"); + phy_reg & 0x0200 ? "full" : "half"); else printf("bad link!!\n"); /* @@ -59,7 +59,7 @@ tmp = 0x6002 | (adr << 7) | (reg << 2); regs->bcsr4 = 0xC3; for (i = 0; i < 64; i++) { - regs->bcsr4 ^= MII_MDCK; + regs->bcsr4 ^= MII_MDCK; } for (i = 0; i < 16; i++) { regs->bcsr4 &= ~MII_MDCK; @@ -92,7 +92,7 @@ } for (i = 0; i < 16; i++) { regs->bcsr4 &= ~MII_MDCK; - if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO; + if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO; else regs->bcsr4 &= ~MII_MDIO; regs->bcsr4 |= MII_MDCK; tmp <<= 1; @@ -105,4 +105,3 @@ val <<= 1; } } - diff --git a/board/ep8260/u-boot.lds b/board/ep8260/u-boot.lds index a6c2ef5..4ea3c86 100644 --- a/board/ep8260/u-boot.lds +++ b/board/ep8260/u-boot.lds @@ -95,6 +95,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -117,4 +122,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/eric/Makefile b/board/eric/Makefile index 7a9d25a..f55e7e2 100644 --- a/board/eric/Makefile +++ b/board/eric/Makefile @@ -29,7 +29,7 @@ SOBJS = init.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/eric/flash.c b/board/eric/flash.c index 5dfb620..c08a760 100644 --- a/board/eric/flash.c +++ b/board/eric/flash.c @@ -57,8 +57,8 @@ { unsigned long size_b0, size_b1; int i; - uint pbcr; - unsigned long base_b0, base_b1; + uint pbcr; + unsigned long base_b0, base_b1; /* Init: no FLASHes known */ for (i=0; istart[i] = base + (i * info->size/info->sector_count); } } else if (info->flash_id & FLASH_BTYPE) { - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { #ifndef CFG_FLASH_16BIT /* set sector offsets for bottom boot block type */ @@ -200,9 +199,9 @@ info->start[7] = base + 0x0001C000; for (i = 8; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00020000) - 0x000E0000; - } - } - else { + } + } + else { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; info->start[1] = base + 0x00008000; @@ -224,9 +223,9 @@ info->start[7] = base + 0x0000E000; for (i = 8; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00010000) - 0x00070000; - } + } } - else { + else { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; info->start[1] = base + 0x00004000; @@ -240,7 +239,7 @@ } else { /* set sector offsets for top boot block type */ i = info->sector_count - 1; - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { #ifndef CFG_FLASH_16BIT info->start[i--] = base + info->size - 0x00004000; @@ -254,7 +253,7 @@ info->start[i] = base + i * 0x00020000; } - } else { + } else { info->start[i--] = base + info->size - 0x00008000; info->start[i--] = base + info->size - 0x0000C000; @@ -275,7 +274,7 @@ info->start[i] = base + i * 0x00010000; } - } else { + } else { info->start[i--] = base + info->size - 0x00004000; info->start[i--] = base + info->size - 0x00006000; @@ -408,8 +407,8 @@ /* * Note: if it is an AMD flash and the word at addr[0000] - * is 0x00890089 this routine will think it is an Intel - * flash device and may(most likely) cause trouble. + * is 0x00890089 this routine will think it is an Intel + * flash device and may(most likely) cause trouble. */ addr[0x0000] = 0x00900090; @@ -421,8 +420,8 @@ /* * Note: if it is an AMD flash and the word at addr[0000] - * is 0x0089 this routine will think it is an Intel - * flash device and may(most likely) cause trouble. + * is 0x0089 this routine will think it is an Intel + * flash device and may(most likely) cause trouble. */ addr[0x0000] = 0x0090; @@ -631,7 +630,7 @@ if ((info->flash_id == FLASH_UNKNOWN) || ((info->flash_id > FLASH_AMD_COMP) && - ( (info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL ) ) ){ + ( (info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL ) ) ){ printf ("Can't erase unknown flash type - aborted\n"); return 1; } @@ -1035,13 +1034,13 @@ if( barf ) { barf >>=16; } else { - barf = addr[0] & 0x0000003A; + barf = addr[0] & 0x0000003A; } printf("\nFlash write error at address %lx\n",(unsigned long)dest); if(barf & 0x0002) printf("Block locked, not erased.\n"); if(barf & 0x0010) printf("Programming error.\n"); if(barf & 0x0008) printf("Vpp Low error.\n"); - return(2); + return(2); } @@ -1074,7 +1073,7 @@ addr[0x0555] = 0x00A0; } else { /* intel stuff */ - *addr = 0x00D0; + *addr = 0x00D0; *addr = 0x0040; } *((vu_short *)dest) = data; @@ -1087,7 +1086,7 @@ start = get_timer (0); if(info->flash_id < FLASH_AMD_COMP) { - /* AMD stuff */ + /* AMD stuff */ while ((*((vu_short *)dest) & 0x0080) != (data & 0x0080)) { if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { return (1); @@ -1106,7 +1105,7 @@ if(barf & 0x0002) printf("Block locked, not erased.\n"); if(barf & 0x0010) printf("Programming error.\n"); if(barf & 0x0008) printf("Vpp Low error.\n"); - return(2); + return(2); } *addr = 0x00B0; *addr = 0x0070; @@ -1127,4 +1126,3 @@ /*----------------------------------------------------------------------- */ - diff --git a/board/eric/init.S b/board/eric/init.S index bdf90a5..9d4e7ff 100644 --- a/board/eric/init.S +++ b/board/eric/init.S @@ -42,169 +42,169 @@ #include - .globl ext_bus_cntlr_init + .globl ext_bus_cntlr_init ext_bus_cntlr_init: - mflr r4 /* save link register */ - bl ..getAddr + mflr r4 /* save link register */ + bl ..getAddr ..getAddr: - mflr r3 /* get address of ..getAddr */ - mtlr r4 /* restore link register */ - addi r4,0,14 /* set ctr to 10; used to prefetch */ - mtctr r4 /* 10 cache lines to fit this function */ - /* in cache (gives us 8x10=80 instrctns) */ + mflr r3 /* get address of ..getAddr */ + mtlr r4 /* restore link register */ + addi r4,0,14 /* set ctr to 10; used to prefetch */ + mtctr r4 /* 10 cache lines to fit this function */ + /* in cache (gives us 8x10=80 instrctns) */ ..ebcloop: - icbt r0,r3 /* prefetch cache line for addr in r3 */ - addi r3,r3,32 /* move to next cache line */ - bdnz ..ebcloop /* continue for 10 cache lines */ + icbt r0,r3 /* prefetch cache line for addr in r3 */ + addi r3,r3,32 /* move to next cache line */ + bdnz ..ebcloop /* continue for 10 cache lines */ - /*------------------------------------------------------------------- */ - /* Delay to ensure all accesses to ROM are complete before changing */ + /*------------------------------------------------------------------- */ + /* Delay to ensure all accesses to ROM are complete before changing */ /* bank 0 timings. 200usec should be enough. */ - /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ - /*------------------------------------------------------------------- */ + /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ + /*------------------------------------------------------------------- */ addis r3,0,0x0 - ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ - mtctr r3 + ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ + mtctr r3 ..spinlp: - bdnz ..spinlp /* spin loop */ + bdnz ..spinlp /* spin loop */ - /*----------------------------------------------------------------------- */ - /* Memory Bank 0 (Flash) initialization (from openbios) */ - /*----------------------------------------------------------------------- */ + /*----------------------------------------------------------------------- */ + /* Memory Bank 0 (Flash) initialization (from openbios) */ + /*----------------------------------------------------------------------- */ - addi r4,0,pb0ap - mtdcr ebccfga,r4 - addis r4,0,CS0_AP@h - ori r4,r4,CS0_AP@l - mtdcr ebccfgd,r4 + addi r4,0,pb0ap + mtdcr ebccfga,r4 + addis r4,0,CS0_AP@h + ori r4,r4,CS0_AP@l + mtdcr ebccfgd,r4 - addi r4,0,pb0cr - mtdcr ebccfga,r4 - addis r4,0,CS0_CR@h - ori r4,r4,CS0_CR@l - mtdcr ebccfgd,r4 + addi r4,0,pb0cr + mtdcr ebccfga,r4 + addis r4,0,CS0_CR@h + ori r4,r4,CS0_CR@l + mtdcr ebccfgd,r4 - /*----------------------------------------------------------------------- */ - /* Memory Bank 1 (NVRAM/RTC) initialization */ - /*----------------------------------------------------------------------- */ + /*----------------------------------------------------------------------- */ + /* Memory Bank 1 (NVRAM/RTC) initialization */ + /*----------------------------------------------------------------------- */ - addi r4,0,pb1ap - mtdcr ebccfga,r4 - addis r4,0,CS1_AP@h - ori r4,r4,CS1_AP@l - mtdcr ebccfgd,r4 + addi r4,0,pb1ap + mtdcr ebccfga,r4 + addis r4,0,CS1_AP@h + ori r4,r4,CS1_AP@l + mtdcr ebccfgd,r4 - addi r4,0,pb1cr - mtdcr ebccfga,r4 - addis r4,0,CS1_CR@h - ori r4,r4,CS1_CR@l - mtdcr ebccfgd,r4 + addi r4,0,pb1cr + mtdcr ebccfga,r4 + addis r4,0,CS1_CR@h + ori r4,r4,CS1_CR@l + mtdcr ebccfgd,r4 - /*----------------------------------------------------------------------- */ - /* Memory Bank 2 (A/D converter) initialization */ - /*----------------------------------------------------------------------- */ + /*----------------------------------------------------------------------- */ + /* Memory Bank 2 (A/D converter) initialization */ + /*----------------------------------------------------------------------- */ - addi r4,0,pb2ap - mtdcr ebccfga,r4 - addis r4,0,CS2_AP@h - ori r4,r4,CS2_AP@l - mtdcr ebccfgd,r4 + addi r4,0,pb2ap + mtdcr ebccfga,r4 + addis r4,0,CS2_AP@h + ori r4,r4,CS2_AP@l + mtdcr ebccfgd,r4 - addi r4,0,pb2cr - mtdcr ebccfga,r4 - addis r4,0,CS2_CR@h - ori r4,r4,CS2_CR@l - mtdcr ebccfgd,r4 + addi r4,0,pb2cr + mtdcr ebccfga,r4 + addis r4,0,CS2_CR@h + ori r4,r4,CS2_CR@l + mtdcr ebccfgd,r4 - /*----------------------------------------------------------------------- */ - /* Memory Bank 3 (Ethernet PHY Reset) initialization */ - /*----------------------------------------------------------------------- */ + /*----------------------------------------------------------------------- */ + /* Memory Bank 3 (Ethernet PHY Reset) initialization */ + /*----------------------------------------------------------------------- */ - addi r4,0,pb3ap - mtdcr ebccfga,r4 - addis r4,0,CS3_AP@h - ori r4,r4,CS3_AP@l - mtdcr ebccfgd,r4 + addi r4,0,pb3ap + mtdcr ebccfga,r4 + addis r4,0,CS3_AP@h + ori r4,r4,CS3_AP@l + mtdcr ebccfgd,r4 - addi r4,0,pb3cr - mtdcr ebccfga,r4 - addis r4,0,CS3_CR@h - ori r4,r4,CS3_CR@l - mtdcr ebccfgd,r4 + addi r4,0,pb3cr + mtdcr ebccfga,r4 + addis r4,0,CS3_CR@h + ori r4,r4,CS3_CR@l + mtdcr ebccfgd,r4 - /*----------------------------------------------------------------------- */ - /* Memory Bank 4 (PC-MIP PRSNT1#) initialization */ - /*----------------------------------------------------------------------- */ + /*----------------------------------------------------------------------- */ + /* Memory Bank 4 (PC-MIP PRSNT1#) initialization */ + /*----------------------------------------------------------------------- */ - addi r4,0,pb4ap - mtdcr ebccfga,r4 - addis r4,0,CS4_AP@h - ori r4,r4,CS4_AP@l - mtdcr ebccfgd,r4 + addi r4,0,pb4ap + mtdcr ebccfga,r4 + addis r4,0,CS4_AP@h + ori r4,r4,CS4_AP@l + mtdcr ebccfgd,r4 - addi r4,0,pb4cr - mtdcr ebccfga,r4 - addis r4,0,CS4_CR@h - ori r4,r4,CS4_CR@l - mtdcr ebccfgd,r4 + addi r4,0,pb4cr + mtdcr ebccfga,r4 + addis r4,0,CS4_CR@h + ori r4,r4,CS4_CR@l + mtdcr ebccfgd,r4 - /*----------------------------------------------------------------------- */ - /* Memory Bank 5 (PC-MIP PRSNT2#) initialization */ - /*----------------------------------------------------------------------- */ + /*----------------------------------------------------------------------- */ + /* Memory Bank 5 (PC-MIP PRSNT2#) initialization */ + /*----------------------------------------------------------------------- */ - addi r4,0,pb5ap - mtdcr ebccfga,r4 - addis r4,0,CS5_AP@h - ori r4,r4,CS5_AP@l - mtdcr ebccfgd,r4 + addi r4,0,pb5ap + mtdcr ebccfga,r4 + addis r4,0,CS5_AP@h + ori r4,r4,CS5_AP@l + mtdcr ebccfgd,r4 - addi r4,0,pb5cr - mtdcr ebccfga,r4 - addis r4,0,CS5_CR@h - ori r4,r4,CS5_CR@l - mtdcr ebccfgd,r4 + addi r4,0,pb5cr + mtdcr ebccfga,r4 + addis r4,0,CS5_CR@h + ori r4,r4,CS5_CR@l + mtdcr ebccfgd,r4 - /*----------------------------------------------------------------------- */ - /* Memory Bank 6 (CPU LED0) initialization */ - /*----------------------------------------------------------------------- */ + /*----------------------------------------------------------------------- */ + /* Memory Bank 6 (CPU LED0) initialization */ + /*----------------------------------------------------------------------- */ - addi r4,0,pb6ap - mtdcr ebccfga,r4 - addis r4,0,CS6_AP@h - ori r4,r4,CS6_AP@l - mtdcr ebccfgd,r4 + addi r4,0,pb6ap + mtdcr ebccfga,r4 + addis r4,0,CS6_AP@h + ori r4,r4,CS6_AP@l + mtdcr ebccfgd,r4 - addi r4,0,pb6cr - mtdcr ebccfga,r4 - addis r4,0,CS6_CR@h - ori r4,r4,CS5_CR@l - mtdcr ebccfgd,r4 + addi r4,0,pb6cr + mtdcr ebccfga,r4 + addis r4,0,CS6_CR@h + ori r4,r4,CS5_CR@l + mtdcr ebccfgd,r4 - /*----------------------------------------------------------------------- */ - /* Memory Bank 7 (CPU LED1) initialization */ - /*----------------------------------------------------------------------- */ + /*----------------------------------------------------------------------- */ + /* Memory Bank 7 (CPU LED1) initialization */ + /*----------------------------------------------------------------------- */ - addi r4,0,pb7ap - mtdcr ebccfga,r4 - addis r4,0,CS7_AP@h - ori r4,r4,CS7_AP@l - mtdcr ebccfgd,r4 + addi r4,0,pb7ap + mtdcr ebccfga,r4 + addis r4,0,CS7_AP@h + ori r4,r4,CS7_AP@l + mtdcr ebccfgd,r4 - addi r4,0,pb7cr - mtdcr ebccfga,r4 - addis r4,0,CS7_CR@h - ori r4,r4,CS7_CR@l - mtdcr ebccfgd,r4 + addi r4,0,pb7cr + mtdcr ebccfga,r4 + addis r4,0,CS7_CR@h + ori r4,r4,CS7_CR@l + mtdcr ebccfgd,r4 /* addis r4,r0,FPGA_BRDC@h */ -/* ori r4,r4,FPGA_BRDC@l */ -/* lbz r3,0(r4) //get FPGA board control reg */ -/* eieio */ -/* ori r3,r3,0x01 //set UART1 control to select CTS/RTS */ +/* ori r4,r4,FPGA_BRDC@l */ +/* lbz r3,0(r4) /###*get FPGA board control reg */ +/* eieio */ +/* ori r3,r3,0x01 /###*set UART1 control to select CTS/RTS */ /* stb r3,0(r4) */ nop /* pass2 DCR errata #8 */ - blr + blr /*----------------------------------------------------------------------------- */ /* Function: sdram_init */ @@ -213,56 +213,56 @@ /* If we have two SDRAM banks, simply undef SINGLE_BANK (ROLF :-) */ /* It is assumed that a 32MB 12x8(2) SDRAM is used. */ /*----------------------------------------------------------------------------- */ - .globl sdram_init + .globl sdram_init sdram_init: mflr r31 #ifdef CFG_SDRAM_MANUALLY - /*------------------------------------------------------------------- */ - /* Set MB0CF for bank 0. (0-32MB) Address Mode 4 since 12x8(2) */ - /*------------------------------------------------------------------- */ + /*------------------------------------------------------------------- */ + /* Set MB0CF for bank 0. (0-32MB) Address Mode 4 since 12x8(2) */ + /*------------------------------------------------------------------- */ - addi r4,0,mem_mb0cf - mtdcr memcfga,r4 - addis r4,0,MB0CF@h - ori r4,r4,MB0CF@l - mtdcr memcfgd,r4 + addi r4,0,mem_mb0cf + mtdcr memcfga,r4 + addis r4,0,MB0CF@h + ori r4,r4,MB0CF@l + mtdcr memcfgd,r4 - /*------------------------------------------------------------------- */ - /* Set MB1CF for bank 1. (32MB-64MB) Address Mode 4 since 12x8(2) */ - /*------------------------------------------------------------------- */ + /*------------------------------------------------------------------- */ + /* Set MB1CF for bank 1. (32MB-64MB) Address Mode 4 since 12x8(2) */ + /*------------------------------------------------------------------- */ - addi r4,0,mem_mb1cf - mtdcr memcfga,r4 - addis r4,0,MB1CF@h - ori r4,r4,MB1CF@l - mtdcr memcfgd,r4 + addi r4,0,mem_mb1cf + mtdcr memcfga,r4 + addis r4,0,MB1CF@h + ori r4,r4,MB1CF@l + mtdcr memcfgd,r4 - /*------------------------------------------------------------------- */ - /* Set MB2CF for bank 2. off */ - /*------------------------------------------------------------------- */ + /*------------------------------------------------------------------- */ + /* Set MB2CF for bank 2. off */ + /*------------------------------------------------------------------- */ - addi r4,0,mem_mb2cf - mtdcr memcfga,r4 - addis r4,0,MB2CF@h - ori r4,r4,MB2CF@l - mtdcr memcfgd,r4 + addi r4,0,mem_mb2cf + mtdcr memcfga,r4 + addis r4,0,MB2CF@h + ori r4,r4,MB2CF@l + mtdcr memcfgd,r4 - /*------------------------------------------------------------------- */ - /* Set MB3CF for bank 3. off */ - /*------------------------------------------------------------------- */ + /*------------------------------------------------------------------- */ + /* Set MB3CF for bank 3. off */ + /*------------------------------------------------------------------- */ - addi r4,0,mem_mb3cf - mtdcr memcfga,r4 - addis r4,0,MB3CF@h - ori r4,r4,MB3CF@l - mtdcr memcfgd,r4 + addi r4,0,mem_mb3cf + mtdcr memcfga,r4 + addis r4,0,MB3CF@h + ori r4,r4,MB3CF@l + mtdcr memcfgd,r4 - /*------------------------------------------------------------------- */ - /* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */ - /* To set the appropriate timings, we need to know the SDRAM speed. */ + /*------------------------------------------------------------------- */ + /* Set the SDRAM Timing reg, SDTR1 and the refresh timer reg, RTR. */ + /* To set the appropriate timings, we need to know the SDRAM speed. */ /* We can use the PLB speed since the SDRAM speed is the same as */ /* the PLB speed. The PLB speed is the FBK divider times the */ /* 405GP reference clock, which on the Walnut board is 33Mhz. */ @@ -270,86 +270,86 @@ /* 100Mhz; if FBK is 3, SDRAM is 133Mhz. */ /* NOTE: The Walnut board supports SDRAM speeds of 66Mhz, 100Mhz, and */ /* maybe 133Mhz. */ - /*------------------------------------------------------------------- */ + /*------------------------------------------------------------------- */ - mfdcr r5,strap /* determine FBK divider */ - /* via STRAP reg to calc PLB speed. */ - /* SDRAM speed is the same as the PLB */ - /* speed. */ - rlwinm r4,r5,4,0x3 /* get FBK divide bits */ + mfdcr r5,strap /* determine FBK divider */ + /* via STRAP reg to calc PLB speed. */ + /* SDRAM speed is the same as the PLB */ + /* speed. */ + rlwinm r4,r5,4,0x3 /* get FBK divide bits */ ..chk_66: - cmpi %cr0,0,r4,0x1 - bne ..chk_100 + cmpi %cr0,0,r4,0x1 + bne ..chk_100 addis r6,0,SDTR_66@h /* SDTR1 value for 66Mhz */ ori r6,r6,SDTR_66@l addis r7,0,RTR_66 /* RTR value for 66Mhz */ - b ..sdram_ok + b ..sdram_ok ..chk_100: - cmpi %cr0,0,r4,0x2 - bne ..chk_133 - addis r6,0,SDTR_100@h /* SDTR1 value for 100Mhz */ - ori r6,r6,SDTR_100@l - addis r7,0,RTR_100 /* RTR value for 100Mhz */ - b ..sdram_ok + cmpi %cr0,0,r4,0x2 + bne ..chk_133 + addis r6,0,SDTR_100@h /* SDTR1 value for 100Mhz */ + ori r6,r6,SDTR_100@l + addis r7,0,RTR_100 /* RTR value for 100Mhz */ + b ..sdram_ok ..chk_133: - addis r6,0,0x0107 /* SDTR1 value for 133Mhz */ - ori r6,r6,0x4015 - addis r7,0,0x07F0 /* RTR value for 133Mhz */ + addis r6,0,0x0107 /* SDTR1 value for 133Mhz */ + ori r6,r6,0x4015 + addis r7,0,0x07F0 /* RTR value for 133Mhz */ ..sdram_ok: - /*------------------------------------------------------------------- */ - /* Set SDTR1 */ - /*------------------------------------------------------------------- */ - addi r4,0,mem_sdtr1 - mtdcr memcfga,r4 - mtdcr memcfgd,r6 + /*------------------------------------------------------------------- */ + /* Set SDTR1 */ + /*------------------------------------------------------------------- */ + addi r4,0,mem_sdtr1 + mtdcr memcfga,r4 + mtdcr memcfgd,r6 - /*------------------------------------------------------------------- */ - /* Set RTR */ - /*------------------------------------------------------------------- */ - addi r4,0,mem_rtr - mtdcr memcfga,r4 - mtdcr memcfgd,r7 + /*------------------------------------------------------------------- */ + /* Set RTR */ + /*------------------------------------------------------------------- */ + addi r4,0,mem_rtr + mtdcr memcfga,r4 + mtdcr memcfgd,r7 - /*------------------------------------------------------------------- */ - /* Delay to ensure 200usec have elapsed since reset. Assume worst */ - /* case that the core is running 200Mhz: */ - /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ - /*------------------------------------------------------------------- */ - addis r3,0,0x0000 - ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ - mtctr r3 + /*------------------------------------------------------------------- */ + /* Delay to ensure 200usec have elapsed since reset. Assume worst */ + /* case that the core is running 200Mhz: */ + /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ + /*------------------------------------------------------------------- */ + addis r3,0,0x0000 + ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ + mtctr r3 ..spinlp2: - bdnz ..spinlp2 /* spin loop */ + bdnz ..spinlp2 /* spin loop */ - /*------------------------------------------------------------------- */ - /* Set memory controller options reg, MCOPT1. */ + /*------------------------------------------------------------------- */ + /* Set memory controller options reg, MCOPT1. */ /* Set DC_EN to '1' and BRD_PRF to '01' for 16 byte PLB Burst */ /* read/prefetch. */ - /*------------------------------------------------------------------- */ - addi r4,0,mem_mcopt1 - mtdcr memcfga,r4 - addis r4,0,0x8080 /* set DC_EN=1 */ - ori r4,r4,0x0000 - mtdcr memcfgd,r4 + /*------------------------------------------------------------------- */ + addi r4,0,mem_mcopt1 + mtdcr memcfga,r4 + addis r4,0,0x8080 /* set DC_EN=1 */ + ori r4,r4,0x0000 + mtdcr memcfgd,r4 - /*------------------------------------------------------------------- */ - /* Delay to ensure 10msec have elapsed since reset. This is */ - /* required for the MPC952 to stabalize. Assume worst */ - /* case that the core is running 200Mhz: */ - /* 200,000,000 (cycles/sec) X .010 (sec) = 0x1E8480 cycles */ - /* This delay should occur before accessing SDRAM. */ - /*------------------------------------------------------------------- */ - addis r3,0,0x001E - ori r3,r3,0x8480 /* ensure 10msec have passed since reset */ - mtctr r3 + /*------------------------------------------------------------------- */ + /* Delay to ensure 10msec have elapsed since reset. This is */ + /* required for the MPC952 to stabalize. Assume worst */ + /* case that the core is running 200Mhz: */ + /* 200,000,000 (cycles/sec) X .010 (sec) = 0x1E8480 cycles */ + /* This delay should occur before accessing SDRAM. */ + /*------------------------------------------------------------------- */ + addis r3,0,0x001E + ori r3,r3,0x8480 /* ensure 10msec have passed since reset */ + mtctr r3 ..spinlp3: - bdnz ..spinlp3 /* spin loop */ + bdnz ..spinlp3 /* spin loop */ #else /*fixme: do SDRAM Autoconfig from EEPROM here */ #endif - mtlr r31 /* restore lr */ - blr + mtlr r31 /* restore lr */ + blr diff --git a/board/eric/u-boot.lds b/board/eric/u-boot.lds index e1373fd..10f57d8 100644 --- a/board/eric/u-boot.lds +++ b/board/eric/u-boot.lds @@ -121,6 +121,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/esd/adciop/Makefile b/board/esd/adciop/Makefile index d4a4e65..474c936 100644 --- a/board/esd/adciop/Makefile +++ b/board/esd/adciop/Makefile @@ -1,3 +1,4 @@ + # # (C) Copyright 2000 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -28,7 +29,7 @@ OBJS = $(BOARD).o flash.o ../common/pci.o $(LIB): $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/esd/adciop/flash.c b/board/esd/adciop/flash.c index 69618de..d9eccba 100644 --- a/board/esd/adciop/flash.c +++ b/board/esd/adciop/flash.c @@ -96,8 +96,8 @@ FLASH_BASE0_PRELIM+size_b0+size_b1-monitor_flash_len, FLASH_BASE0_PRELIM+size_b0+size_b1-1, &flash_info[1]); - /* monitor protection OFF by default (one is enough) */ - flash_protect(FLAG_PROTECT_CLEAR, + /* monitor protection OFF by default (one is enough) */ + flash_protect(FLAG_PROTECT_CLEAR, FLASH_BASE0_PRELIM+size_b0-monitor_flash_len, FLASH_BASE0_PRELIM+size_b0-1, &flash_info[0]); diff --git a/board/esd/adciop/u-boot.lds b/board/esd/adciop/u-boot.lds index ddf1307..b07d117 100644 --- a/board/esd/adciop/u-boot.lds +++ b/board/esd/adciop/u-boot.lds @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/esd/ar405/Makefile b/board/esd/ar405/Makefile index 39d2fec..f5bda55 100644 --- a/board/esd/ar405/Makefile +++ b/board/esd/ar405/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/esd/ar405/ar405.c b/board/esd/ar405/ar405.c index f23b822..d0b06e6 100644 --- a/board/esd/ar405/ar405.c +++ b/board/esd/ar405/ar405.c @@ -25,8 +25,9 @@ #include "ar405.h" #include #include -#include +/*cmd_boot.c*/ +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* ------------------------------------------------------------------------- */ diff --git a/board/esd/ar405/flash.c b/board/esd/ar405/flash.c index 3a644f9..a651b6f 100644 --- a/board/esd/ar405/flash.c +++ b/board/esd/ar405/flash.c @@ -43,8 +43,8 @@ { unsigned long size_b0, size_b1; int i; - uint pbcr; - unsigned long base_b0, base_b1; + uint pbcr; + unsigned long base_b0, base_b1; /* Init: no FLASHes known */ for (i=0; i #include #include -#include #include /* ------------------------------------------------------------------------- */ @@ -33,6 +32,8 @@ #define FPGA_DEBUG #endif +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + /* fpga configuration data - gzip compressed and generated by bin2c */ const unsigned char fpgadata[] = { diff --git a/board/esd/ash405/flash.c b/board/esd/ash405/flash.c index f904aff..89af119 100644 --- a/board/esd/ash405/flash.c +++ b/board/esd/ash405/flash.c @@ -43,8 +43,8 @@ { unsigned long size_b0; int i; - uint pbcr; - unsigned long base_b0; + uint pbcr; + unsigned long base_b0; int size_val = 0; /* Init: no FLASHes known */ @@ -61,14 +61,14 @@ size_b0, size_b0<<20); } - /* Setup offsets */ - flash_get_offsets (-size_b0, &flash_info[0]); + /* Setup offsets */ + flash_get_offsets (-size_b0, &flash_info[0]); - /* Re-do sizing to get full correct info */ - mtdcr(ebccfga, pb0cr); - pbcr = mfdcr(ebccfgd); - mtdcr(ebccfga, pb0cr); - base_b0 = -size_b0; + /* Re-do sizing to get full correct info */ + mtdcr(ebccfga, pb0cr); + pbcr = mfdcr(ebccfgd); + mtdcr(ebccfga, pb0cr); + base_b0 = -size_b0; switch (size_b0) { case 1 << 20: size_val = 0; @@ -87,15 +87,15 @@ break; } pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17); - mtdcr(ebccfgd, pbcr); + mtdcr(ebccfgd, pbcr); - /* Monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - -CFG_MONITOR_LEN, - 0xffffffff, - &flash_info[0]); + /* Monitor protection ON by default */ + (void)flash_protect(FLAG_PROTECT_SET, + -CFG_MONITOR_LEN, + 0xffffffff, + &flash_info[0]); - flash_info[0].size = size_b0; + flash_info[0].size = size_b0; return (size_b0); } diff --git a/board/esd/ash405/u-boot.lds b/board/esd/ash405/u-boot.lds index 97851f1..ba55550 100644 --- a/board/esd/ash405/u-boot.lds +++ b/board/esd/ash405/u-boot.lds @@ -119,6 +119,10 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/esd/canbt/Makefile b/board/esd/canbt/Makefile index 39d2fec..f5bda55 100644 --- a/board/esd/canbt/Makefile +++ b/board/esd/canbt/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/esd/canbt/canbt.c b/board/esd/canbt/canbt.c index 708101e..ae0e880 100644 --- a/board/esd/canbt/canbt.c +++ b/board/esd/canbt/canbt.c @@ -25,7 +25,11 @@ #include "canbt.h" #include #include -#include + + +/*cmd_boot.c*/ +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + /* ------------------------------------------------------------------------- */ diff --git a/board/esd/canbt/flash.c b/board/esd/canbt/flash.c index 685850e..de847f9 100644 --- a/board/esd/canbt/flash.c +++ b/board/esd/canbt/flash.c @@ -43,8 +43,8 @@ { unsigned long size_b0; int i; - uint pbcr; - unsigned long base_b0; + uint pbcr; + unsigned long base_b0; /* Init: no FLASHes known */ for (i=0; iflash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || + if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) { for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000); - } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) || + } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) { @@ -58,7 +58,7 @@ base += 64 << 10; ++i; } - } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) || + } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) { @@ -75,7 +75,7 @@ --i; info->start[i] = base; } - } else { + } else { if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -103,10 +103,10 @@ void flash_print_info (flash_info_t *info) { int i; - int k; - int size; - int erased; - volatile unsigned long *flash; + int k; + int size; + int erased; + volatile unsigned long *flash; if (info->flash_id == FLASH_UNKNOWN) { printf ("missing or unknown FLASH type\n"); @@ -161,28 +161,28 @@ printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { #ifdef CFG_FLASH_EMPTY_INFO - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; ksector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; + erased = 1; + flash = (volatile unsigned long *)info->start[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kstart[i], erased ? " E" : " ", @@ -216,7 +216,7 @@ short n; CFG_FLASH_WORD_SIZE value; ulong base = (ulong)addr; - volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)addr; + volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)addr; /* Write auto select command: read Manufacturer ID */ addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; @@ -282,37 +282,37 @@ break; /* => 2 MB */ case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320T: - info->flash_id += FLASH_AM320T; - info->sector_count = 71; + info->flash_id += FLASH_AM320T; + info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ case (CFG_FLASH_WORD_SIZE)AMD_ID_LV320B: - info->flash_id += FLASH_AM320B; + info->flash_id += FLASH_AM320B; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322T: - info->flash_id += FLASH_AMDL322T; - info->sector_count = 71; + info->flash_id += FLASH_AMDL322T; + info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ case (CFG_FLASH_WORD_SIZE)AMD_ID_DL322B: - info->flash_id += FLASH_AMDL322B; + info->flash_id += FLASH_AMDL322B; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323T: - info->flash_id += FLASH_AMDL323T; + info->flash_id += FLASH_AMDL323T; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ case (CFG_FLASH_WORD_SIZE)AMD_ID_DL323B: - info->flash_id += FLASH_AMDL323B; + info->flash_id += FLASH_AMDL323B; info->sector_count = 71; info->size = 0x00400000; break; /* => 4 MB */ case (CFG_FLASH_WORD_SIZE)AMD_ID_LV640U: - info->flash_id += FLASH_AM640U; + info->flash_id += FLASH_AM640U; info->sector_count = 128; info->size = 0x00800000; break; /* => 8 MB */ @@ -335,11 +335,11 @@ } /* set up sector start address table */ - if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || + if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM640U)) { for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000); - } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) || + } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322B) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323B) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320B) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324B)) { @@ -353,7 +353,7 @@ base += 64 << 10; ++i; } - } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) || + } else if (((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL322T) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL323T) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM320T) || ((info->flash_id & FLASH_TYPEMASK) == FLASH_AMDL324T)) { @@ -370,7 +370,7 @@ --i; info->start[i] = base; } - } else { + } else { if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -397,10 +397,10 @@ /* read sector protection at sector address, (A7 .. A0) = 0x02 */ /* D0 = 1 if protected */ addr2 = (volatile CFG_FLASH_WORD_SIZE *)(info->start[i]); - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) - info->protect[i] = 0; - else - info->protect[i] = addr2[CFG_FLASH_READ2] & 1; + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) + info->protect[i] = 0; + else + info->protect[i] = addr2[CFG_FLASH_READ2] & 1; } /* @@ -424,7 +424,7 @@ volatile CFG_FLASH_WORD_SIZE *addr2; int flag, prot, sect, l_sect; ulong start, now, last; - int i; + int i; if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { @@ -463,25 +463,25 @@ for (sect = s_first; sect<=s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[sect]); - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080; - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - addr2[0] = (CFG_FLASH_WORD_SIZE)0x00500050; /* block erase */ - for (i=0; i<50; i++) - udelay(1000); /* wait 1 ms */ - } else { - if (sect == s_first) { - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080; - addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - } - addr2[0] = (CFG_FLASH_WORD_SIZE)0x00300030; /* sector erase */ - } + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) { + addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; + addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; + addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080; + addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; + addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; + addr2[0] = (CFG_FLASH_WORD_SIZE)0x00500050; /* block erase */ + for (i=0; i<50; i++) + udelay(1000); /* wait 1 ms */ + } else { + if (sect == s_first) { + addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; + addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; + addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00800080; + addr[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; + addr[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; + } + addr2[0] = (CFG_FLASH_WORD_SIZE)0x00300030; /* sector erase */ + } l_sect = sect; } } @@ -602,42 +602,42 @@ */ static int write_word (flash_info_t *info, ulong dest, ulong data) { - volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[0]); - volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *)dest; - volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *)&data; + volatile CFG_FLASH_WORD_SIZE *addr2 = (CFG_FLASH_WORD_SIZE *)(info->start[0]); + volatile CFG_FLASH_WORD_SIZE *dest2 = (CFG_FLASH_WORD_SIZE *)dest; + volatile CFG_FLASH_WORD_SIZE *data2 = (CFG_FLASH_WORD_SIZE *)&data; ulong start; int flag; - int i; + int i; /* Check if Flash is (sufficiently) erased */ if ((*((volatile CFG_FLASH_WORD_SIZE *)dest) & - (CFG_FLASH_WORD_SIZE)data) != (CFG_FLASH_WORD_SIZE)data) { + (CFG_FLASH_WORD_SIZE)data) != (CFG_FLASH_WORD_SIZE)data) { return (2); } /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - for (i=0; i<4/sizeof(CFG_FLASH_WORD_SIZE); i++) - { - addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; - addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; - addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00A000A0; + for (i=0; i<4/sizeof(CFG_FLASH_WORD_SIZE); i++) + { + addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00AA00AA; + addr2[CFG_FLASH_ADDR1] = (CFG_FLASH_WORD_SIZE)0x00550055; + addr2[CFG_FLASH_ADDR0] = (CFG_FLASH_WORD_SIZE)0x00A000A0; - dest2[i] = data2[i]; + dest2[i] = data2[i]; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - return (1); - } - } - } + /* data polling for D7 */ + start = get_timer (0); + while ((dest2[i] & (CFG_FLASH_WORD_SIZE)0x00800080) != + (data2[i] & (CFG_FLASH_WORD_SIZE)0x00800080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + } return (0); } diff --git a/board/esd/common/fpga.c b/board/esd/common/fpga.c index 50bce2e..f27943f 100644 --- a/board/esd/common/fpga.c +++ b/board/esd/common/fpga.c @@ -57,16 +57,16 @@ #define SET_FPGA(data) out32(GPIO0_OR, data) #define FPGA_WRITE_1 { \ - SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \ - SET_FPGA(FPGA_PRG | FPGA_DATA); /* set data to 1 */ \ - SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set clock to 1 */ \ - SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ + SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \ + SET_FPGA(FPGA_PRG | FPGA_DATA); /* set data to 1 */ \ + SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA); /* set clock to 1 */ \ + SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ #define FPGA_WRITE_0 { \ - SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \ - SET_FPGA(FPGA_PRG); /* set data to 0 */ \ - SET_FPGA(FPGA_PRG | FPGA_CLK); /* set clock to 1 */ \ - SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ + SET_FPGA(FPGA_PRG | FPGA_DATA); /* set clock to 0 */ \ + SET_FPGA(FPGA_PRG); /* set data to 0 */ \ + SET_FPGA(FPGA_PRG | FPGA_CLK); /* set clock to 1 */ \ + SET_FPGA(FPGA_PRG | FPGA_CLK | FPGA_DATA);} /* set data to 1 */ static int fpga_boot(unsigned char *fpgadata, int size) @@ -94,10 +94,10 @@ while (1) { if ((fpgadata[index] == 0xff) && (fpgadata[index+1] == 0xff) && - (fpgadata[index+2] == 0xff) && (fpgadata[index+3] == 0xff)) - break; /* preamble found */ + (fpgadata[index+2] == 0xff) && (fpgadata[index+3] == 0xff)) + break; /* preamble found */ else - index++; + index++; } #else /* search for preamble 0xFF2X */ @@ -134,10 +134,10 @@ udelay(1000); /* wait 1ms */ /* Check for timeout - 100us max, so use 3ms */ if (count++ > 3) - { - DBG("FPGA: Booting failed!\n"); - return ERROR_FPGA_PRG_INIT_LOW; - } + { + DBG("FPGA: Booting failed!\n"); + return ERROR_FPGA_PRG_INIT_LOW; + } } DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" ); @@ -153,10 +153,10 @@ udelay(1000); /* wait 1ms */ /* Check for timeout */ if (count++ > 3) - { - DBG("FPGA: Booting failed!\n"); - return ERROR_FPGA_PRG_INIT_HIGH; - } + { + DBG("FPGA: Booting failed!\n"); + return ERROR_FPGA_PRG_INIT_HIGH; + } } DBG("%s, ",((in32(GPIO0_IR) & FPGA_DONE) == 0) ? "NOT DONE" : "DONE" ); @@ -172,17 +172,17 @@ for (i=index; i= 1) && (b <= MAX_ONES)) { for(bit=0; bit= (MAX_ONES+2)) && (b <= 254)) { for(bit=0; bit<(b-(MAX_ONES+2)); bit++) - { - FPGA_WRITE_0; - } - FPGA_WRITE_1; + { + FPGA_WRITE_0; + } + FPGA_WRITE_1; } else if (b == 255) - { - FPGA_WRITE_1; - } + { + FPGA_WRITE_1; + } } #endif @@ -246,10 +246,10 @@ udelay(1000); /* wait 1ms */ /* Check for timeout */ if (count++ > 3) - { - DBG("FPGA: Booting failed!\n"); - return ERROR_FPGA_PRG_DONE; - } + { + DBG("FPGA: Booting failed!\n"); + return ERROR_FPGA_PRG_DONE; + } } DBG("FPGA: Booting successful!\n"); diff --git a/board/esd/cpci405/Makefile b/board/esd/cpci405/Makefile index 39d2fec..f5bda55 100644 --- a/board/esd/cpci405/Makefile +++ b/board/esd/cpci405/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/esd/cpci405/cpci405.c b/board/esd/cpci405/cpci405.c index 5a6a27c..3f0ef1e 100644 --- a/board/esd/cpci405/cpci405.c +++ b/board/esd/cpci405/cpci405.c @@ -24,11 +24,10 @@ #include #include #include -#include #include /* ------------------------------------------------------------------------- */ - +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /*cmd_boot.c*/ #if 0 #define FPGA_DEBUG #endif diff --git a/board/esd/cpci405/u-boot.lds b/board/esd/cpci405/u-boot.lds index 97851f1..311a5fe 100644 --- a/board/esd/cpci405/u-boot.lds +++ b/board/esd/cpci405/u-boot.lds @@ -119,6 +119,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/esd/cpci440/Makefile b/board/esd/cpci440/Makefile index 4e1f701..f706ebc 100644 --- a/board/esd/cpci440/Makefile +++ b/board/esd/cpci440/Makefile @@ -29,7 +29,7 @@ SOBJS = init.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/esd/cpci440/cpci440.c b/board/esd/cpci440/cpci440.c index 51a5edd..66cfe06 100644 --- a/board/esd/cpci440/cpci440.c +++ b/board/esd/cpci440/cpci440.c @@ -66,7 +66,6 @@ } - int checkboard (void) { sys_info_t sysinfo; diff --git a/board/esd/cpci440/init.S b/board/esd/cpci440/init.S index 2dab9f9..82f37fd 100644 --- a/board/esd/cpci440/init.S +++ b/board/esd/cpci440/init.S @@ -92,5 +92,3 @@ tlbentry( CFG_ISRAM_BASE + 0x1000, SZ_4K, 0x80001000, 0, AC_R|AC_W|AC_X ) tlbentry( CFG_SDRAM_BASE, SZ_256M, 0x00000000, 0, AC_R|AC_W|AC_X ) tlbtab_end - - diff --git a/board/esd/cpci440/strataflash.c b/board/esd/cpci440/strataflash.c index de57318..2f055c2 100644 --- a/board/esd/cpci440/strataflash.c +++ b/board/esd/cpci440/strataflash.c @@ -89,8 +89,6 @@ #define FLASH_MAN_CFI 0x01000000 - - typedef union { unsigned char c; unsigned short w; @@ -113,7 +111,6 @@ */ - static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c); static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf); static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd); diff --git a/board/esd/cpci440/u-boot.lds b/board/esd/cpci440/u-boot.lds index 35d9931..46ccf31 100644 --- a/board/esd/cpci440/u-boot.lds +++ b/board/esd/cpci440/u-boot.lds @@ -126,6 +126,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/esd/cpciiser4/Makefile b/board/esd/cpciiser4/Makefile index 39d2fec..f5bda55 100644 --- a/board/esd/cpciiser4/Makefile +++ b/board/esd/cpciiser4/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/esd/cpciiser4/cpciiser4.c b/board/esd/cpciiser4/cpciiser4.c index 2e10412..725abe9 100644 --- a/board/esd/cpciiser4/cpciiser4.c +++ b/board/esd/cpciiser4/cpciiser4.c @@ -25,7 +25,11 @@ #include "cpciiser4.h" #include #include -#include + +/*cmd_boot.c*/ + +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + /* ------------------------------------------------------------------------- */ diff --git a/board/esd/cpciiser4/flash.c b/board/esd/cpciiser4/flash.c index 685850e..de847f9 100644 --- a/board/esd/cpciiser4/flash.c +++ b/board/esd/cpciiser4/flash.c @@ -43,8 +43,8 @@ { unsigned long size_b0; int i; - uint pbcr; - unsigned long base_b0; + uint pbcr; + unsigned long base_b0; /* Init: no FLASHes known */ for (i=0; i 10) - { - printf("\nTimeout: ret=%08x - Please try again!\n", ret); - break; - } - } - } + for (;;) { + udelay (10 * 1000); + pci_read_config_dword (CFG_PCI9054_DEV_FN, 0x4c, &ret); + if ((ret & 0x80000000) != 0) { + break; + } else { + count++; + if (count > 10) { + printf ("\nTimeout: ret=%08x - Please try again!\n", ret); + break; + } + } + } - pci_read_config_dword(CFG_PCI9054_DEV_FN, 0x50, &value); + pci_read_config_dword (CFG_PCI9054_DEV_FN, 0x50, &value); - return value; + return value; } -static int PciEepromWriteLongVPD(int offs, unsigned int value) +static int PciEepromWriteLongVPD (int offs, unsigned int value) { - unsigned int ret; - int count; + unsigned int ret; + int count; - pci_write_config_dword(CFG_PCI9054_DEV_FN, 0x50, value); - pci_write_config_dword(CFG_PCI9054_DEV_FN, 0x4c, (offs<<16) | 0x80000003); - count = 0; + pci_write_config_dword (CFG_PCI9054_DEV_FN, 0x50, value); + pci_write_config_dword (CFG_PCI9054_DEV_FN, 0x4c, + (offs << 16) | 0x80000003); + count = 0; - for (;;) - { - udelay(10 * 1000); - pci_read_config_dword(CFG_PCI9054_DEV_FN, 0x4c, &ret); - if ((ret & 0x80000000) == 0) - { - break; - } - else - { - count++; - if (count > 10) - { - printf("\nTimeout: ret=%08x - Please try again!\n", ret); - break; - } - } - } + for (;;) { + udelay (10 * 1000); + pci_read_config_dword (CFG_PCI9054_DEV_FN, 0x4c, &ret); + if ((ret & 0x80000000) == 0) { + break; + } else { + count++; + if (count > 10) { + printf ("\nTimeout: ret=%08x - Please try again!\n", ret); + break; + } + } + } - return TRUE; + return TRUE; } -static void showPci9054(void) +static void showPci9054 (void) { - int val; - int l, i; + int val; + int l, i; - /* read 9054-values */ - for (l=0; l<6; l++) - { - printf("%02x: ", l*0x10); - for (i=0; i<4; i++) - { - pci_read_config_dword(CFG_PCI9054_DEV_FN, l*16+i*4, &val); - printf("%08x ", val); - } - printf("\n"); - } - printf("\n"); + /* read 9054-values */ + for (l = 0; l < 6; l++) { + printf ("%02x: ", l * 0x10); + for (i = 0; i < 4; i++) { + pci_read_config_dword (CFG_PCI9054_DEV_FN, + l * 16 + i * 4, + &val); + printf ("%08x ", val); + } + printf ("\n"); + } + printf ("\n"); - for (l=0; l<7; l++) - { - printf("%02x: ", l*0x10); - for (i=0; i<4; i++) - printf("%08x ", PciEepromReadLongVPD((i+l*4)*4)); - printf("\n"); - } - printf("\n"); + for (l = 0; l < 7; l++) { + printf ("%02x: ", l * 0x10); + for (i = 0; i < 4; i++) + printf ("%08x ", + PciEepromReadLongVPD ((i + l * 4) * 4)); + printf ("\n"); + } + printf ("\n"); } -static void updatePci9054(void) +static void updatePci9054 (void) { - int val; + int val; - /* - * Set EEPROM write-protect register to 0 - */ - out32(pci9054_iobase+0x0c, in32(pci9054_iobase+0x0c) & 0xffff00ff); + /* + * Set EEPROM write-protect register to 0 + */ + out32 (pci9054_iobase + 0x0c, + in32 (pci9054_iobase + 0x0c) & 0xffff00ff); - /* Long Serial EEPROM Load Registers... */ - val = PciEepromWriteLongVPD(0x00, 0x905410b5); - val = PciEepromWriteLongVPD(0x04, 0x09800001); /* other input controller */ - val = PciEepromWriteLongVPD(0x08, 0x28140100); + /* Long Serial EEPROM Load Registers... */ + val = PciEepromWriteLongVPD (0x00, 0x905410b5); + val = PciEepromWriteLongVPD (0x04, 0x09800001); /* other input controller */ + val = PciEepromWriteLongVPD (0x08, 0x28140100); - val = PciEepromWriteLongVPD(0x0c, 0x00000000); /* MBOX0... */ - val = PciEepromWriteLongVPD(0x10, 0x00000000); + val = PciEepromWriteLongVPD (0x0c, 0x00000000); /* MBOX0... */ + val = PciEepromWriteLongVPD (0x10, 0x00000000); - /* las0: fpga access (0x0000.0000 ... 0x0003.ffff) */ - val = PciEepromWriteLongVPD(0x14, 0xfffc0000); /* LAS0RR... */ - val = PciEepromWriteLongVPD(0x18, 0x00000001); /* LAS0BA */ + /* las0: fpga access (0x0000.0000 ... 0x0003.ffff) */ + val = PciEepromWriteLongVPD (0x14, 0xfffc0000); /* LAS0RR... */ + val = PciEepromWriteLongVPD (0x18, 0x00000001); /* LAS0BA */ - val = PciEepromWriteLongVPD(0x1c, 0x00200000); /* MARBR... */ - val = PciEepromWriteLongVPD(0x20, 0x00300500); /* LMISC/BIGEND */ + val = PciEepromWriteLongVPD (0x1c, 0x00200000); /* MARBR... */ + val = PciEepromWriteLongVPD (0x20, 0x00300500); /* LMISC/BIGEND */ - val = PciEepromWriteLongVPD(0x24, 0x00000000); /* EROMRR... */ - val = PciEepromWriteLongVPD(0x28, 0x00000000); /* EROMBA */ + val = PciEepromWriteLongVPD (0x24, 0x00000000); /* EROMRR... */ + val = PciEepromWriteLongVPD (0x28, 0x00000000); /* EROMBA */ - val = PciEepromWriteLongVPD(0x2c, 0x43030000); /* LBRD0... */ + val = PciEepromWriteLongVPD (0x2c, 0x43030000); /* LBRD0... */ - val = PciEepromWriteLongVPD(0x30, 0x00000000); /* DMRR... */ - val = PciEepromWriteLongVPD(0x34, 0x00000000); - val = PciEepromWriteLongVPD(0x38, 0x00000000); + val = PciEepromWriteLongVPD (0x30, 0x00000000); /* DMRR... */ + val = PciEepromWriteLongVPD (0x34, 0x00000000); + val = PciEepromWriteLongVPD (0x38, 0x00000000); - val = PciEepromWriteLongVPD(0x3c, 0x00000000); /* DMPBAM... */ - val = PciEepromWriteLongVPD(0x40, 0x00000000); + val = PciEepromWriteLongVPD (0x3c, 0x00000000); /* DMPBAM... */ + val = PciEepromWriteLongVPD (0x40, 0x00000000); - /* Extra Long Serial EEPROM Load Registers... */ - val = PciEepromWriteLongVPD(0x44, 0x010212fe); /* PCISID... */ + /* Extra Long Serial EEPROM Load Registers... */ + val = PciEepromWriteLongVPD (0x44, 0x010212fe); /* PCISID... */ - /* las1: 505-sram access (0x0004.0000 ... 0x001f.ffff) */ - /* Offset to LAS1: Group 1: 0x00040000 */ - /* Group 2: 0x00080000 */ - /* Group 3: 0x000c0000 */ - val = PciEepromWriteLongVPD(0x48, 0xffe00000); /* LAS1RR */ - val = PciEepromWriteLongVPD(0x4c, 0x00040001); /* LAS1BA */ - val = PciEepromWriteLongVPD(0x50, 0x00000208); /* LBRD1 */ /* so wars bisher */ + /* las1: 505-sram access (0x0004.0000 ... 0x001f.ffff) */ + /* Offset to LAS1: Group 1: 0x00040000 */ + /* Group 2: 0x00080000 */ + /* Group 3: 0x000c0000 */ + val = PciEepromWriteLongVPD (0x48, 0xffe00000); /* LAS1RR */ + val = PciEepromWriteLongVPD (0x4c, 0x00040001); /* LAS1BA */ + val = PciEepromWriteLongVPD (0x50, 0x00000208); /* LBRD1 */ /* so wars bisher */ - val = PciEepromWriteLongVPD(0x54, 0x00004c06); /* HotSwap... */ + val = PciEepromWriteLongVPD (0x54, 0x00004c06); /* HotSwap... */ - printf("Finished writing defaults into PLX PCI9054 EEPROM!\n"); + printf ("Finished writing defaults into PLX PCI9054 EEPROM!\n"); } -static void clearPci9054(void) +static void clearPci9054 (void) { - int val; + int val; - /* - * Set EEPROM write-protect register to 0 - */ - out32(pci9054_iobase+0x0c, in32(pci9054_iobase+0x0c) & 0xffff00ff); + /* + * Set EEPROM write-protect register to 0 + */ + out32 (pci9054_iobase + 0x0c, + in32 (pci9054_iobase + 0x0c) & 0xffff00ff); - /* Long Serial EEPROM Load Registers... */ - val = PciEepromWriteLongVPD(0x00, 0xffffffff); - val = PciEepromWriteLongVPD(0x04, 0xffffffff); /* other input controller */ + /* Long Serial EEPROM Load Registers... */ + val = PciEepromWriteLongVPD (0x00, 0xffffffff); + val = PciEepromWriteLongVPD (0x04, 0xffffffff); /* other input controller */ - printf("Finished clearing PLX PCI9054 EEPROM!\n"); + printf ("Finished clearing PLX PCI9054 EEPROM!\n"); } /* ------------------------------------------------------------------------- */ -int do_pci9054(cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +int do_pci9054 (cmd_tbl_t * cmdtp, int flag, int argc, + char *argv[]) { - if (strcmp(argv[1], "info") == 0) - { - showPci9054(); - return 0; - } + if (strcmp (argv[1], "info") == 0) { + showPci9054 (); + return 0; + } - if (strcmp(argv[1], "update") == 0) - { - updatePci9054(); - return 0; - } + if (strcmp (argv[1], "update") == 0) { + updatePci9054 (); + return 0; + } - if (strcmp(argv[1], "clear") == 0) - { - clearPci9054(); - return 0; - } + if (strcmp (argv[1], "clear") == 0) { + clearPci9054 (); + return 0; + } - printf("Usage:\n%s\n", cmdtp->usage); - return 1; + printf ("Usage:\n%s\n", cmdtp->usage); + return 1; } +cmd_tbl_t U_BOOT_CMD (pci9054) = MK_CMD_ENTRY( + "pci9054", 3, 1, do_pci9054, + "pci9054 - PLX PCI9054 EEPROM access\n", + "pci9054 info - print EEPROM values\n" + "pci9054 update - updates EEPROM with default values\n" +); + /* ------------------------------------------------------------------------- */ diff --git a/board/esd/dasa_sim/eeprom.c b/board/esd/dasa_sim/eeprom.c index 59ef1d6..1b4c7b3 100644 --- a/board/esd/dasa_sim/eeprom.c +++ b/board/esd/dasa_sim/eeprom.c @@ -46,7 +46,7 @@ ret = *(unsigned short *)EEPROM_CAP; if ((ret & 0x8000) != 0) - break; + break; } value = *(unsigned long *)EEPROM_DATA; @@ -83,7 +83,7 @@ ret = *(unsigned short *)EEPROM_CAP; if ((ret & 0x8000) == 0) - break; + break; } } @@ -107,7 +107,7 @@ int i; int len2, ptr; - /* printf("\naddr=%x alen=%x buffer=%x len=%x", addr[0], addr[1], *(short *)addr, alen, buffer, len); // test-only */ + /* printf("\naddr=%x alen=%x buffer=%x len=%x", addr[0], addr[1], *(short *)addr, alen, buffer, len); /###* test-only */ ptr = *(short *)addr; @@ -146,7 +146,7 @@ int i; int len2, ptr; - /* printf("\naddr=%x alen=%x buffer=%x len=%x", addr[0], addr[1], *(short *)addr, alen, buffer, len); // test-only */ + /* printf("\naddr=%x alen=%x buffer=%x len=%x", addr[0], addr[1], *(short *)addr, alen, buffer, len); /###* test-only */ ptr = *(short *)addr; diff --git a/board/esd/dasa_sim/flash.c b/board/esd/dasa_sim/flash.c index 32cd64c..d2ac13f 100644 --- a/board/esd/dasa_sim/flash.c +++ b/board/esd/dasa_sim/flash.c @@ -43,8 +43,8 @@ unsigned long flash_init (void) { unsigned long size_b0; - int i; - unsigned long base_b0; + int i; + unsigned long base_b0; /* Init: no FLASHes known */ for (i=0; i #include <405gp_i2c.h> #include -#include + +/*cmd_boot.c*/ + +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* ------------------------------------------------------------------------- */ diff --git a/board/esd/du405/u-boot.lds b/board/esd/du405/u-boot.lds index 463e388..b1793a2 100644 --- a/board/esd/du405/u-boot.lds +++ b/board/esd/du405/u-boot.lds @@ -119,6 +119,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/esd/ocrtc/Makefile b/board/esd/ocrtc/Makefile index 45d3d8d..b059f73 100644 --- a/board/esd/ocrtc/Makefile +++ b/board/esd/ocrtc/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/esd/ocrtc/ocrtc.c b/board/esd/ocrtc/ocrtc.c index 3c3d56e..0600273 100644 --- a/board/esd/ocrtc/ocrtc.c +++ b/board/esd/ocrtc/ocrtc.c @@ -26,7 +26,6 @@ #include #include #include -#include /* ------------------------------------------------------------------------- */ diff --git a/board/esd/ocrtc/u-boot.lds b/board/esd/ocrtc/u-boot.lds index 8e940a8..251a4cc 100644 --- a/board/esd/ocrtc/u-boot.lds +++ b/board/esd/ocrtc/u-boot.lds @@ -119,6 +119,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/esd/pci405/Makefile b/board/esd/pci405/Makefile index 62d7bf9..fd72b18 100644 --- a/board/esd/pci405/Makefile +++ b/board/esd/pci405/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o cmd_pci405.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/esd/pci405/cmd_pci405.c b/board/esd/pci405/cmd_pci405.c index 555dc0c..df91cd4 100644 --- a/board/esd/pci405/cmd_pci405.c +++ b/board/esd/pci405/cmd_pci405.c @@ -22,12 +22,12 @@ */ #include +#include #include #include #include #include #include <405gp_pci.h> -#include #include "pci405.h" diff --git a/board/esd/pci405/flash.c b/board/esd/pci405/flash.c index 1707dcf..3b21781 100644 --- a/board/esd/pci405/flash.c +++ b/board/esd/pci405/flash.c @@ -43,8 +43,8 @@ { unsigned long size_b0; int i; - uint pbcr; - unsigned long base_b0; + uint pbcr; + unsigned long base_b0; int size_val = 0; /* Init: no FLASHes known */ @@ -61,14 +61,14 @@ size_b0, size_b0<<20); } - /* Setup offsets */ - flash_get_offsets (-size_b0, &flash_info[0]); + /* Setup offsets */ + flash_get_offsets (-size_b0, &flash_info[0]); - /* Re-do sizing to get full correct info */ - mtdcr(ebccfga, pb0cr); - pbcr = mfdcr(ebccfgd); - mtdcr(ebccfga, pb0cr); - base_b0 = -size_b0; + /* Re-do sizing to get full correct info */ + mtdcr(ebccfga, pb0cr); + pbcr = mfdcr(ebccfgd); + mtdcr(ebccfga, pb0cr); + base_b0 = -size_b0; switch (size_b0) { case 1 << 20: size_val = 0; @@ -87,15 +87,15 @@ break; } pbcr = (pbcr & 0x0001ffff) | base_b0 | (size_val << 17); - mtdcr(ebccfgd, pbcr); + mtdcr(ebccfgd, pbcr); - /* Monitor protection ON by default */ - (void)flash_protect(FLAG_PROTECT_SET, - -monitor_flash_len, - 0xffffffff, - &flash_info[0]); + /* Monitor protection ON by default */ + (void)flash_protect(FLAG_PROTECT_SET, + -monitor_flash_len, + 0xffffffff, + &flash_info[0]); - flash_info[0].size = size_b0; + flash_info[0].size = size_b0; return (size_b0); } diff --git a/board/esd/pci405/pci405.c b/board/esd/pci405/pci405.c index 18d24a8..cc45fa9 100644 --- a/board/esd/pci405/pci405.c +++ b/board/esd/pci405/pci405.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include <405gp_pci.h> @@ -33,7 +32,7 @@ /* ------------------------------------------------------------------------- */ - +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]);/*cmd_boot.c*/ #if 0 #define FPGA_DEBUG #endif diff --git a/board/esd/pci405/u-boot.lds b/board/esd/pci405/u-boot.lds index 97851f1..311a5fe 100644 --- a/board/esd/pci405/u-boot.lds +++ b/board/esd/pci405/u-boot.lds @@ -119,6 +119,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/esd/pmc405/Makefile b/board/esd/pmc405/Makefile index 2fa097a..c4198c4 100644 --- a/board/esd/pmc405/Makefile +++ b/board/esd/pmc405/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o strataflash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/esd/pmc405/pmc405.c b/board/esd/pmc405/pmc405.c index 78eed9f..5c2e98c 100644 --- a/board/esd/pmc405/pmc405.c +++ b/board/esd/pmc405/pmc405.c @@ -24,7 +24,6 @@ #include #include #include -#include #include /* ------------------------------------------------------------------------- */ diff --git a/board/esd/pmc405/strataflash.c b/board/esd/pmc405/strataflash.c index 6578ed9..d21d885 100644 --- a/board/esd/pmc405/strataflash.c +++ b/board/esd/pmc405/strataflash.c @@ -24,7 +24,7 @@ #include #include -#undef DEBUG_FLASH +#undef DEBUG_FLASH /* * This file implements a Common Flash Interface (CFI) driver for ppcboot. * The width of the port and the width of the chips are determined at initialization. @@ -89,8 +89,6 @@ #define FLASH_MAN_CFI 0x01000000 - - typedef union { unsigned char c; unsigned short w; @@ -113,7 +111,6 @@ */ - static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c); static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf); static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd); @@ -249,7 +246,7 @@ flash_write_cmd(info, sect, 0, FLASH_CMD_CLEAR_STATUS); flash_write_cmd(info, sect, 0, FLASH_CMD_BLOCK_ERASE); flash_write_cmd(info, sect, 0, FLASH_CMD_ERASE_CONFIRM); - + if(flash_full_status_check(info, sect, info->erase_blk_tout, "erase")) { rcode = 1; } else @@ -277,7 +274,7 @@ info->size >> 20, info->sector_count); printf(" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n", info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size); - + printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { #ifdef CFG_FLASH_EMPTY_INFO @@ -286,28 +283,28 @@ int erased; volatile unsigned long *flash; - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; ksector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; + erased = 1; + flash = (volatile unsigned long *)info->start[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kstart[i], erased ? " E" : " ", @@ -414,7 +411,7 @@ else flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR); - if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout, + if((retcode = flash_full_status_check(info, sector, info->erase_blk_tout, prot?"protect":"unprotect")) == 0) { info->protect[sector] = prot; @@ -464,7 +461,7 @@ printf("Command Sequence Error.\n"); } else if(flash_isset(info, sector, 0, FLASH_STATUS_ECLBS)){ printf("Block Erase Error.\n"); - retcode = ERR_NOT_ERASED; + retcode = ERR_NOT_ERASED; } else if (flash_isset(info, sector, 0, FLASH_STATUS_PSLBS)) { printf("Locking Error\n"); } @@ -733,7 +730,7 @@ { int sector; for(sector = info->sector_count - 1; sector >= 0; sector--) { - if(addr >= info->start[sector]) + if(addr >= info->start[sector]) break; } return sector; @@ -741,7 +738,7 @@ static int flash_write_cfibuffer(flash_info_t * info, ulong dest, uchar * cp, int len) { - + int sector; int cnt; int retcode; @@ -789,8 +786,8 @@ flash_write_cmd(info, sector, 0, FLASH_CMD_WRITE_BUFFER_CONFIRM); retcode = flash_full_status_check(info, sector, info->buffer_write_tout, "buffer write"); - } + } flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS); return retcode; -} +} #endif /* CFG_USE_FLASH_BUFFER_WRITE */ diff --git a/board/esd/pmc405/u-boot.lds b/board/esd/pmc405/u-boot.lds index 463e388..bfd71db 100644 --- a/board/esd/pmc405/u-boot.lds +++ b/board/esd/pmc405/u-boot.lds @@ -119,6 +119,10 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/esteem192e/Makefile b/board/esteem192e/Makefile index ef173d0..13ce9fc 100644 --- a/board/esteem192e/Makefile +++ b/board/esteem192e/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/esteem192e/esteem192e.c b/board/esteem192e/esteem192e.c index 792a61c..986964b 100644 --- a/board/esteem192e/esteem192e.c +++ b/board/esteem192e/esteem192e.c @@ -47,14 +47,14 @@ /* * SDRAM Initialization (offset 5 in UPMA RAM) * - * This is no UPM entry point. The following definition uses - * the remaining space to establish an initialization - * sequence, which is executed by a RUN command. + * This is no UPM entry point. The following definition uses + * the remaining space to establish an initialization + * sequence, which is executed by a RUN command. * NOP, Program */ - 0x0F0A8C34, 0x1F354C37, /* last */ + 0x0F0A8C34, 0x1F354C37, /* last */ - _NOT_USED_, /* Not used */ + _NOT_USED_, /* Not used */ /* * Burst Read. (Offset 8 in UPMA RAM) @@ -87,7 +87,7 @@ * Exception. (Offset 3c in UPMA RAM) */ 0x0FFB8C00, 0x1FF74C03, /* last */ - _NOT_USED_, _NOT_USED_ + _NOT_USED_, _NOT_USED_ }; /* ------------------------------------------------------------------------- */ @@ -186,38 +186,38 @@ else { if(size_b0 < size_b1) { - memctl->memc_br2 &= 0x00007FFE; - memctl->memc_br3 &= 0x00007FFF; + memctl->memc_br2 &= 0x00007FFE; + memctl->memc_br3 &= 0x00007FFF; - /* - * Adjust OR3 for size of bank 1 - */ - memctl->memc_or3 |= 15 * size_b1; + /* + * Adjust OR3 for size of bank 1 + */ + memctl->memc_or3 |= 15 * size_b1; - /* - * Adjust OR2 for size of bank 0 - */ - memctl->memc_or2 |= 15 * size_b0; + /* + * Adjust OR2 for size of bank 0 + */ + memctl->memc_or2 |= 15 * size_b0; - memctl->memc_br2 += (size_b1 + 1); + memctl->memc_br2 += (size_b1 + 1); } else { - memctl->memc_br3 &= 0x00007FFE; + memctl->memc_br3 &= 0x00007FFE; - /* - * Adjust OR2 for size of bank 0 - */ - memctl->memc_or2 |= 15 * size_b0; + /* + * Adjust OR2 for size of bank 0 + */ + memctl->memc_or2 |= 15 * size_b0; - /* - * Adjust OR3 for size of bank 1 - */ - memctl->memc_or3 |= 15 * size_b1; + /* + * Adjust OR3 for size of bank 1 + */ + memctl->memc_or3 |= 15 * size_b1; - memctl->memc_br3 += (size_b0 + 1); + memctl->memc_br3 += (size_b0 + 1); } @@ -269,8 +269,6 @@ immap->im_ioport.iop_pddat = 0x0055; /* set alternating pattern on test port */ - - return (size_b0 + size_b1); } diff --git a/board/esteem192e/flash.c b/board/esteem192e/flash.c index 5322430..5465dea 100644 --- a/board/esteem192e/flash.c +++ b/board/esteem192e/flash.c @@ -111,7 +111,7 @@ if (size_b1) { memctl->memc_or1 = CFG_OR_TIMING_FLASH | (-size_b1 & 0xFFFF8000); memctl->memc_br1 = (CFG_FLASH_BASE | 0x00000801) + (size_b0 & BR_BA_MSK); - /*((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) | + /*((CFG_FLASH_BASE + size_b0) & BR_BA_MSK) | BR_MS_GPCM | BR_V;*/ /* Re-do sizing to get full correct info */ @@ -148,7 +148,7 @@ /* set up sector start adress table */ if (info->flash_id & FLASH_BTYPE) { - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { #ifndef CONFIG_FLASH_16BIT /* set sector offsets for bottom boot block type */ @@ -162,9 +162,9 @@ info->start[7] = base + 0x0001C000; for (i = 8; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00020000) - 0x000E0000; - } - } - else { + } + } + else { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; info->start[1] = base + 0x00008000; @@ -186,9 +186,9 @@ info->start[7] = base + 0x0000E000; for (i = 8; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00010000) - 0x00070000; - } + } } - else { + else { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; info->start[1] = base + 0x00004000; @@ -202,7 +202,7 @@ } else { /* set sector offsets for top boot block type */ i = info->sector_count - 1; - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { #ifndef CONFIG_FLASH_16BIT info->start[i--] = base + info->size - 0x00004000; @@ -216,7 +216,7 @@ info->start[i] = base + i * 0x00020000; } - } else { + } else { info->start[i--] = base + info->size - 0x00008000; info->start[i--] = base + info->size - 0x0000C000; @@ -237,7 +237,7 @@ info->start[i] = base + i * 0x00010000; } - } else { + } else { info->start[i--] = base + info->size - 0x00004000; info->start[i--] = base + info->size - 0x00006000; @@ -362,8 +362,8 @@ /* * Note: if it is an AMD flash and the word at addr[0000] - * is 0x00890089 this routine will think it is an Intel - * flash device and may(most likely) cause trouble. + * is 0x00890089 this routine will think it is an Intel + * flash device and may(most likely) cause trouble. */ addr[0x0000] = 0x00900090; @@ -375,8 +375,8 @@ /* * Note: if it is an AMD flash and the word at addr[0000] - * is 0x0089 this routine will think it is an Intel - * flash device and may(most likely) cause trouble. + * is 0x0089 this routine will think it is an Intel + * flash device and may(most likely) cause trouble. */ addr[0x0000] = 0x0090; @@ -523,7 +523,7 @@ /* set up sector start adress table */ if (info->flash_id & FLASH_BTYPE) { - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { #ifndef CONFIG_FLASH_16BIT /* set sector offsets for bottom boot block type */ @@ -537,9 +537,9 @@ info->start[7] = base + 0x0001C000; for (i = 8; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00020000) - 0x000E0000; - } - } - else { + } + } + else { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; info->start[1] = base + 0x00008000; @@ -561,9 +561,9 @@ info->start[7] = base + 0x0000E000; for (i = 8; i < info->sector_count; i++) { info->start[i] = base + (i * 0x00010000) - 0x00070000; - } + } } - else { + else { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; info->start[1] = base + 0x00004000; @@ -577,7 +577,7 @@ } else { /* set sector offsets for top boot block type */ i = info->sector_count - 1; - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { #ifndef CONFIG_FLASH_16BIT info->start[i--] = base + info->size - 0x00004000; @@ -591,7 +591,7 @@ info->start[i] = base + i * 0x00020000; } - } else { + } else { info->start[i--] = base + info->size - 0x00008000; info->start[i--] = base + info->size - 0x0000C000; @@ -612,7 +612,7 @@ info->start[i] = base + i * 0x00010000; } - } else { + } else { info->start[i--] = base + info->size - 0x00004000; info->start[i--] = base + info->size - 0x00006000; @@ -670,7 +670,7 @@ if ((info->flash_id == FLASH_UNKNOWN) || ((info->flash_id > FLASH_AMD_COMP) && - ( (info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL ) ) ){ + ( (info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL ) ) ){ printf ("Can't erase unknown flash type - aborted\n"); return 1; } @@ -1001,13 +1001,13 @@ if( barf ) { barf >>=16; } else { - barf = addr[0] & 0x0000003A; + barf = addr[0] & 0x0000003A; } printf("\nFlash write error at address %lx\n",(unsigned long)dest); if(barf & 0x0002) printf("Block locked, not erased.\n"); if(barf & 0x0010) printf("Programming error.\n"); if(barf & 0x0008) printf("Vpp Low error.\n"); - return(2); + return(2); } @@ -1040,7 +1040,7 @@ addr[0x0555] = 0x00A0; } else { /* intel stuff */ - *addr = 0x00D0; + *addr = 0x00D0; *addr = 0x0040; } *((vu_short *)dest) = data; @@ -1053,7 +1053,7 @@ start = get_timer (0); if(info->flash_id < FLASH_AMD_COMP) { - /* AMD stuff */ + /* AMD stuff */ while ((*((vu_short *)dest) & 0x0080) != (data & 0x0080)) { if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { return (1); @@ -1072,7 +1072,7 @@ if(barf & 0x0002) printf("Block locked, not erased.\n"); if(barf & 0x0010) printf("Programming error.\n"); if(barf & 0x0008) printf("Vpp Low error.\n"); - return(2); + return(2); } *addr = 0x00B0; *addr = 0x0070; @@ -1093,4 +1093,3 @@ /*----------------------------------------------------------------------- */ - diff --git a/board/esteem192e/u-boot.lds b/board/esteem192e/u-boot.lds index ffe7495..717c895 100644 --- a/board/esteem192e/u-boot.lds +++ b/board/esteem192e/u-boot.lds @@ -109,6 +109,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -131,4 +136,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/etx094/Makefile b/board/etx094/Makefile index ef173d0..13ce9fc 100644 --- a/board/etx094/Makefile +++ b/board/etx094/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/etx094/u-boot.lds b/board/etx094/u-boot.lds index 2fd15c9..3d202e3 100644 --- a/board/etx094/u-boot.lds +++ b/board/etx094/u-boot.lds @@ -111,6 +111,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -133,4 +138,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/etx094/u-boot.lds.debug b/board/etx094/u-boot.lds.debug index 17ec374..7cd6809 100644 --- a/board/etx094/u-boot.lds.debug +++ b/board/etx094/u-boot.lds.debug @@ -113,6 +113,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -135,4 +140,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/evb64260/Makefile b/board/evb64260/Makefile index 31e24df..c493d6c 100644 --- a/board/evb64260/Makefile +++ b/board/evb64260/Makefile @@ -32,7 +32,7 @@ $(LIB): .depend $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) ######################################################################### diff --git a/board/evb64260/eth.c b/board/evb64260/eth.c index 76cf38a..8b3a359 100644 --- a/board/evb64260/eth.c +++ b/board/evb64260/eth.c @@ -117,12 +117,12 @@ printf("SMI interrupt: "); if(icr&0x20000000) { - printf("SMI done\n"); + printf("SMI done\n"); } #endif if(icr&0x10000000) { - unsigned int psr; + unsigned int psr; psr=GTREGREAD(ETHERNET0_PORT_STATUS_REGISTER + p->reg_base); #ifdef DEBUG printf("PHY state change:\n" @@ -134,7 +134,7 @@ #ifdef CONFIG_INTEL_LXT97X /* non-standard mii reg (intel lxt972a) */ { - unsigned short mii_11; + unsigned short mii_11; mii_11=miiphy_read_ret(ether_port_phy_addr[p->dev],0x11); printf(" mii:%s:%s:%s:%s %s:%s %s\n", @@ -381,7 +381,7 @@ gt6426x_dump_mii(bd_t *bis, unsigned short phy) { printf("mii reg 0 - 3: %04x %04x %04x %04x\n", - miiphy_read_ret(phy, 0x0), + miiphy_read_ret(phy, 0x0), miiphy_read_ret(phy, 0x1), miiphy_read_ret(phy, 0x2), miiphy_read_ret(phy, 0x3) diff --git a/board/evb64260/eth_addrtbl.c b/board/evb64260/eth_addrtbl.c index ea4925a..ef463c3 100644 --- a/board/evb64260/eth_addrtbl.c +++ b/board/evb64260/eth_addrtbl.c @@ -52,7 +52,7 @@ tableBase = (unsigned int)addressTableBase[port]; /* we get called for every probe, so only do this once */ if ( !tableBase ) { - int bytes = hashLength[hashSizeSelector] * sizeof(addrTblEntry); + int bytes = hashLength[hashSizeSelector] * sizeof(addrTblEntry); tableBase = (unsigned int)realAddrTableBase[port] = malloc(bytes+64); @@ -62,12 +62,12 @@ return 0; } - /* align to octal byte */ + /* align to octal byte */ if(tableBase&63) tableBase=(tableBase+63) & ~63; - addressTableHashMode[port] = hashMode; + addressTableHashMode[port] = hashMode; addressTableHashSize[port] = hashSizeSelector; - addressTableBase[port] = (addrTblEntry *)tableBase; + addressTableBase[port] = (addrTblEntry *)tableBase; memset((void *)tableBase,0,bytes); } @@ -105,40 +105,40 @@ addrL = NIBBLE_SWAPPING_32_BIT( macL ); addrHSwapped = FLIP_4_BITS( addrH & 0xf ) - + ((FLIP_4_BITS( (addrH >> 4) & 0xf)) << 4) - + ((FLIP_4_BITS( (addrH >> 8) & 0xf)) << 8) - + ((FLIP_4_BITS( (addrH >> 12) & 0xf)) << 12); + + ((FLIP_4_BITS( (addrH >> 4) & 0xf)) << 4) + + ((FLIP_4_BITS( (addrH >> 8) & 0xf)) << 8) + + ((FLIP_4_BITS( (addrH >> 12) & 0xf)) << 12); addrLSwapped = FLIP_4_BITS( addrL & 0xf ) - + ((FLIP_4_BITS( (addrL >> 4) & 0xf)) << 4) - + ((FLIP_4_BITS( (addrL >> 8) & 0xf)) << 8) - + ((FLIP_4_BITS( (addrL >> 12) & 0xf)) << 12) - + ((FLIP_4_BITS( (addrL >> 16) & 0xf)) << 16) - + ((FLIP_4_BITS( (addrL >> 20) & 0xf)) << 20) - + ((FLIP_4_BITS( (addrL >> 24) & 0xf)) << 24) - + ((FLIP_4_BITS( (addrL >> 28) & 0xf)) << 28); + + ((FLIP_4_BITS( (addrL >> 4) & 0xf)) << 4) + + ((FLIP_4_BITS( (addrL >> 8) & 0xf)) << 8) + + ((FLIP_4_BITS( (addrL >> 12) & 0xf)) << 12) + + ((FLIP_4_BITS( (addrL >> 16) & 0xf)) << 16) + + ((FLIP_4_BITS( (addrL >> 20) & 0xf)) << 20) + + ((FLIP_4_BITS( (addrL >> 24) & 0xf)) << 24) + + ((FLIP_4_BITS( (addrL >> 28) & 0xf)) << 28); addrH = addrHSwapped; addrL = addrLSwapped; if( hash_mode == 0 ) { - addr0 = (addrL >> 2) & 0x03f; - addr1 = (addrL & 0x003) | ((addrL >> 8) & 0x7f) << 2; - addr2 = (addrL >> 15) & 0x1ff; - addr3 = ((addrL >> 24) & 0x0ff) | ((addrH & 1) << 8); + addr0 = (addrL >> 2) & 0x03f; + addr1 = (addrL & 0x003) | ((addrL >> 8) & 0x7f) << 2; + addr2 = (addrL >> 15) & 0x1ff; + addr3 = ((addrL >> 24) & 0x0ff) | ((addrH & 1) << 8); } else { - addr0 = FLIP_6_BITS( addrL & 0x03f ); - addr1 = FLIP_9_BITS( ((addrL >> 6) & 0x1ff)); - addr2 = FLIP_9_BITS( (addrL >> 15) & 0x1ff); - addr3 = FLIP_9_BITS( (((addrL >> 24) & 0x0ff) | ((addrH & 0x1) << 8))); + addr0 = FLIP_6_BITS( addrL & 0x03f ); + addr1 = FLIP_9_BITS( ((addrL >> 6) & 0x1ff)); + addr2 = FLIP_9_BITS( (addrL >> 15) & 0x1ff); + addr3 = FLIP_9_BITS( (((addrL >> 24) & 0x0ff) | ((addrH & 0x1) << 8))); } hashResult = (addr0 << 9) | (addr1 ^ addr2 ^ addr3); if( HashSize == _8K_TABLE ) { - hashResult = hashResult & 0xffff; + hashResult = hashResult & 0xffff; } else { - hashResult = hashResult & 0x07ff; + hashResult = hashResult & 0x07ff; } return( hashResult ); @@ -174,20 +174,20 @@ u32 i; newLo = (((macH >> 4) & 0xf) << 15) - | (((macH >> 0) & 0xf) << 11) - | (((macH >> 12) & 0xf) << 7) - | (((macH >> 8) & 0xf) << 3) - | (((macL >> 20) & 0x1) << 31) - | (((macL >> 16) & 0xf) << 27) - | (((macL >> 28) & 0xf) << 23) - | (((macL >> 24) & 0xf) << 19) - | (skip << SKIP_BIT) | (rd << 2) | VALID; + | (((macH >> 0) & 0xf) << 11) + | (((macH >> 12) & 0xf) << 7) + | (((macH >> 8) & 0xf) << 3) + | (((macL >> 20) & 0x1) << 31) + | (((macL >> 16) & 0xf) << 27) + | (((macL >> 28) & 0xf) << 23) + | (((macL >> 24) & 0xf) << 19) + | (skip << SKIP_BIT) | (rd << 2) | VALID; newHi = (((macL >> 4) & 0xf) << 15) - | (((macL >> 0) & 0xf) << 11) - | (((macL >> 12) & 0xf) << 7) - | (((macL >> 8) & 0xf) << 3) - | (((macL >> 21) & 0x7) << 0); + | (((macL >> 0) & 0xf) << 11) + | (((macL >> 12) & 0xf) << 7) + | (((macL >> 8) & 0xf) << 3) + | (((macL >> 21) & 0x7) << 0); /* * Pick the appropriate table, start scanning for free/reusable @@ -195,22 +195,22 @@ */ entry = addressTableBase[port]; entry += hashTableFunction( macH, macL, addressTableHashSize[port], - addressTableHashMode[port] ); + addressTableHashMode[port] ); for( i = 0; i < HOP_NUMBER; i++, entry++ ) { - if( !(entry->lo & VALID) /*|| (entry->lo & SKIP)*/ ) { - break; - } else { /* if same address put in same position */ - if( ((entry->lo & 0xfffffff8) == (newLo & 0xfffffff8)) - && (entry->hi == newHi) ) - { - break; - } - } + if( !(entry->lo & VALID) /*|| (entry->lo & SKIP)*/ ) { + break; + } else { /* if same address put in same position */ + if( ((entry->lo & 0xfffffff8) == (newLo & 0xfffffff8)) + && (entry->hi == newHi) ) + { + break; + } + } } if( i == HOP_NUMBER ) { - PRINTF( "addGT64260addressTableEntry: table section is full\n" ); - return( FALSE ); + PRINTF( "addGT64260addressTableEntry: table section is full\n" ); + return( FALSE ); } /* diff --git a/board/evb64260/eth_addrtbl.h b/board/evb64260/eth_addrtbl.h index 60380c6..5a62c67 100644 --- a/board/evb64260/eth_addrtbl.h +++ b/board/evb64260/eth_addrtbl.h @@ -25,22 +25,22 @@ * XXX_MIKE - potential sign-extension bugs lurk here... */ #define NIBBLE_SWAPPING_32_BIT(X) ( (((X) & 0xf0f0f0f0) >> 4) \ - | (((X) & 0x0f0f0f0f) << 4) ) + | (((X) & 0x0f0f0f0f) << 4) ) #define NIBBLE_SWAPPING_16_BIT(X) ( (((X) & 0x0000f0f0) >> 4) \ - | (((X) & 0x00000f0f) << 4) ) + | (((X) & 0x00000f0f) << 4) ) #define FLIP_4_BITS(X) ( (((X) & 0x01) << 3) | (((X) & 0x002) << 1) \ - | (((X) & 0x04) >> 1) | (((X) & 0x008) >> 3) ) + | (((X) & 0x04) >> 1) | (((X) & 0x008) >> 3) ) #define FLIP_6_BITS(X) ( (((X) & 0x01) << 5) | (((X) & 0x020) >> 5) \ - | (((X) & 0x02) << 3) | (((X) & 0x010) >> 3) \ - | (((X) & 0x04) << 1) | (((X) & 0x008) >> 1) ) + | (((X) & 0x02) << 3) | (((X) & 0x010) >> 3) \ + | (((X) & 0x04) << 1) | (((X) & 0x008) >> 1) ) #define FLIP_9_BITS(X) ( (((X) & 0x01) << 8) | (((X) & 0x100) >> 8) \ - | (((X) & 0x02) << 6) | (((X) & 0x080) >> 6) \ - | (((X) & 0x04) << 4) | (((X) & 0x040) >> 4) \ - | ((X) & 0x10) | (((X) & 0x08) << 2) | (((X) & 0x020) >> 2) ) + | (((X) & 0x02) << 6) | (((X) & 0x080) >> 6) \ + | (((X) & 0x04) << 4) | (((X) & 0x040) >> 4) \ + | ((X) & 0x10) | (((X) & 0x08) << 2) | (((X) & 0x020) >> 2) ) /* * V: value we're operating on @@ -64,7 +64,6 @@ #define DCACHE_FLUSH_N_SYNC( A, N ) flush_dcache_range( (A), ((A)+(N)) ) - typedef struct addressTableEntryStruct { u32 hi; u32 lo; diff --git a/board/evb64260/evb64260.c b/board/evb64260/evb64260.c index 02431da..fd09690 100644 --- a/board/evb64260/evb64260.c +++ b/board/evb64260/evb64260.c @@ -218,18 +218,18 @@ /* ----- DEVICE BUS SETTINGS ------ */ - /* + /* * EVB - * 0 - SRAM - * 1 - RTC - * 2 - UART - * 3 - Flash - * boot - BootCS + * 0 - SRAM + * 1 - RTC + * 2 - UART + * 3 - Flash + * boot - BootCS * * Zuma * 0 - Flash * boot - BootCS - */ + */ /* * the dual 7450 module requires burst access to the boot @@ -352,40 +352,40 @@ debug_led(int led, int mode) { #ifndef CONFIG_ZUMA_V2 - volatile int *addr = NULL; - int dummy; + volatile int *addr = NULL; + int dummy; - if (mode == 1) { - switch (led) { - case 0: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x08000); - break; + if (mode == 1) { + switch (led) { + case 0: + addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x08000); + break; - case 1: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x0c000); - break; + case 1: + addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x0c000); + break; - case 2: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x10000); - break; - } - } else if (mode == 0) { - switch (led) { - case 0: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x14000); - break; + case 2: + addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x10000); + break; + } + } else if (mode == 0) { + switch (led) { + case 0: + addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x14000); + break; - case 1: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x18000); - break; + case 1: + addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x18000); + break; - case 2: - addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x1c000); - break; - } - } + case 2: + addr = (int *)((unsigned int)CFG_DEV1_SPACE | 0x1c000); + break; + } + } WRITE_CHAR(addr, 0); - dummy = *addr; + dummy = *addr; #endif /* CONFIG_ZUMA_V2 */ } @@ -436,4 +436,3 @@ printf(" BOOT: base - 0x%08x\tsize - %dM bytes\twidth - %d bits\n", base, size>>20, width); } - diff --git a/board/evb64260/flash.c b/board/evb64260/flash.c index 2d2bf1c..c897393 100644 --- a/board/evb64260/flash.c +++ b/board/evb64260/flash.c @@ -240,8 +240,8 @@ static inline void flash_cmd(int width, volatile unsigned char *addr, int offset, unsigned char cmd) { - /* supports 1x8, 1x16, and 2x16 */ - /* 2x8 and 4x8 are not supported */ + /* supports 1x8, 1x16, and 2x16 */ + /* 2x8 and 4x8 are not supported */ if(width==4) { /* assuming chips are in 16 bit mode */ /* 2x16 */ diff --git a/board/evb64260/memory.c b/board/evb64260/memory.c index 9d301f8..e339854 100644 --- a/board/evb64260/memory.c +++ b/board/evb64260/memory.c @@ -103,9 +103,9 @@ GT_REG_READ(highAddress,&highValue); highValue = (highValue + 1) << 20; if(base > highValue) - size=0; + size=0; else - size = highValue - base; + size = highValue - base; return size; } @@ -127,16 +127,16 @@ GT_REG_READ(highAddress,&highValue); if (highValue == 0xfff) { - size = (~base) + 1; /* what the heck is this? */ - return size; + size = (~base) + 1; /* what the heck is this? */ + return size; } else - highValue = (highValue + 1) << 20; + highValue = (highValue + 1) << 20; if(base > highValue) - size=0; + size=0; else - size = highValue - base; + size = highValue - base; return size; } @@ -159,16 +159,16 @@ width = (regValue & 0x00300000) >> 20; switch (width) { - case 0: - return 1; - case 1: - return 2; - case 2: - return 4; - case 3: - return 8; - default: - return 0; + case 0: + return 1; + case 1: + return 2; + case 2: + return 4; + case 3: + return 8; + default: + return 0; } } @@ -265,23 +265,23 @@ * Returns: false if one of the parameters is wrong and true else *********************************************************************/ bool memorySetProtectRegion(MEMORY_PROTECT_REGION region, - MEMORY_ACCESS memAccess, - MEMORY_ACCESS_WRITE memWrite, - MEMORY_CACHE_PROTECT cacheProtection, - unsigned int baseAddress, - unsigned int regionLength) + MEMORY_ACCESS memAccess, + MEMORY_ACCESS_WRITE memWrite, + MEMORY_CACHE_PROTECT cacheProtection, + unsigned int baseAddress, + unsigned int regionLength) { unsigned int protectHigh = baseAddress + regionLength; if(regionLength == 0) /* closing the region */ { - GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,0x0000ffff); - GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,0); - return true; + GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,0x0000ffff); + GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,0); + return true; } baseAddress = (baseAddress & 0xfff00000) >> 20; baseAddress = baseAddress | memAccess << 16 | memWrite << 17 - | cacheProtection << 18; + | cacheProtection << 18; GT_REG_WRITE(CPU_LOW_PROTECT_ADDRESS_0 + 0x10*region,baseAddress); protectHigh = (protectHigh & 0xfff00000) >> 20; GT_REG_WRITE(CPU_HIGH_PROTECT_ADDRESS_0 + 0x10*region,protectHigh - 1); @@ -304,9 +304,9 @@ * Returns: false if one of the parameters is wrong and true else *********************************************************************/ bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region, - MEMORY_SNOOP_TYPE snoopType, - unsigned int baseAddress, - unsigned int regionLength) + MEMORY_SNOOP_TYPE snoopType, + unsigned int baseAddress, + unsigned int regionLength) { unsigned int snoopXbaseAddress; unsigned int snoopXtopAddress; @@ -314,14 +314,14 @@ unsigned int snoopHigh = baseAddress + regionLength; if( (region > MEM_SNOOP_REGION3) || (snoopType > MEM_SNOOP_WB) ) - return false; + return false; snoopXbaseAddress = SNOOP_BASE_ADDRESS_0 + 0x10 * region; snoopXtopAddress = SNOOP_TOP_ADDRESS_0 + 0x10 * region; if(regionLength == 0) /* closing the region */ { - GT_REG_WRITE(snoopXbaseAddress,0x0000ffff); - GT_REG_WRITE(snoopXtopAddress,0); - return true; + GT_REG_WRITE(snoopXbaseAddress,0x0000ffff); + GT_REG_WRITE(snoopXtopAddress,0); + return true; } baseAddress = baseAddress & 0xffff0000; data = (baseAddress >> 16) | snoopType << 16; @@ -385,20 +385,20 @@ switch (calcData) { case 0: - deviceParam -> deviceWidth = 1; /* one Byte - 8-bit */ - break; + deviceParam -> deviceWidth = 1; /* one Byte - 8-bit */ + break; case 1: - deviceParam -> deviceWidth = 2; /* two Bytes - 16-bit */ - break; + deviceParam -> deviceWidth = 2; /* two Bytes - 16-bit */ + break; case 2: - deviceParam -> deviceWidth = 4; /* four Bytes - 32-bit */ - break; + deviceParam -> deviceWidth = 4; /* four Bytes - 32-bit */ + break; case 3: - deviceParam -> deviceWidth = 8; /* eight Bytes - 64-bit */ - break; + deviceParam -> deviceWidth = 8; /* eight Bytes - 64-bit */ + break; default: - deviceParam -> deviceWidth = 1; - break; + deviceParam -> deviceWidth = 1; + break; } return true; } @@ -419,38 +419,38 @@ if((deviceParam -> turnOff >= 0xf) || (deviceParam -> acc2First >= 0x1f) || (deviceParam -> acc2Next >= 0x1f) || (deviceParam -> ale2Wr >= 0xf) || - (deviceParam -> wrLow >= 0xf) || (deviceParam -> wrHigh >= 0xf)) - return false; + (deviceParam -> wrLow >= 0xf) || (deviceParam -> wrHigh >= 0xf)) + return false; valueForReg = (((deviceParam -> turnOff) & 0x7) | - (((deviceParam -> turnOff) & 0x8) << 19) | - (((deviceParam -> acc2First) & 0xf) << 3) | - (((deviceParam -> acc2First) & 0x10) << 19) | - (((deviceParam -> acc2Next) & 0xf) << 7) | - (((deviceParam -> acc2Next) & 0x10) << 20) | - (((deviceParam -> ale2Wr) & 0x7) << 11) | - (((deviceParam -> ale2Wr) & 0xf) << 22) | - (((deviceParam -> wrLow) & 0x7) << 14) | - (((deviceParam -> wrLow) & 0xf) << 23) | - (((deviceParam -> wrHigh) & 0x7) << 17) | - (((deviceParam -> wrHigh) & 0xf) << 24)); + (((deviceParam -> turnOff) & 0x8) << 19) | + (((deviceParam -> acc2First) & 0xf) << 3) | + (((deviceParam -> acc2First) & 0x10) << 19) | + (((deviceParam -> acc2Next) & 0xf) << 7) | + (((deviceParam -> acc2Next) & 0x10) << 20) | + (((deviceParam -> ale2Wr) & 0x7) << 11) | + (((deviceParam -> ale2Wr) & 0xf) << 22) | + (((deviceParam -> wrLow) & 0x7) << 14) | + (((deviceParam -> wrLow) & 0xf) << 23) | + (((deviceParam -> wrHigh) & 0x7) << 17) | + (((deviceParam -> wrHigh) & 0xf) << 24)); /* insert the device width: */ switch(deviceParam->deviceWidth) { case 1: - valueForReg = valueForReg | _8BIT; - break; + valueForReg = valueForReg | _8BIT; + break; case 2: - valueForReg = valueForReg | _16BIT; - break; + valueForReg = valueForReg | _16BIT; + break; case 4: - valueForReg = valueForReg | _32BIT; - break; + valueForReg = valueForReg | _32BIT; + break; case 8: - valueForReg = valueForReg | _64BIT; - break; + valueForReg = valueForReg | _64BIT; + break; default: - valueForReg = valueForReg | _8BIT; - break; + valueForReg = valueForReg | _8BIT; + break; } GT_REG_WRITE(DEVICE_BANK0PARAMETERS + 4 * deviceNum, valueForReg); return true; diff --git a/board/evb64260/misc.S b/board/evb64260/misc.S index 4bbf6ef..438dea6 100644 --- a/board/evb64260/misc.S +++ b/board/evb64260/misc.S @@ -154,29 +154,29 @@ #endif /* For use of the debug LEDs */ - .global led_on0 + .global led_on0 led_on0: - xor r18, r18, r18 - lis r18, 0x1c80 - ori r18, r18, 0x8000 - stw r18, 0x0(r18) - sync - blr + xor r18, r18, r18 + lis r18, 0x1c80 + ori r18, r18, 0x8000 + stw r18, 0x0(r18) + sync + blr - .global led_on1 + .global led_on1 led_on1: - xor r18, r18, r18 - lis r18, 0x1c80 - ori r18, r18, 0xc000 - stw r18, 0x0(r18) - sync - blr + xor r18, r18, r18 + lis r18, 0x1c80 + ori r18, r18, 0xc000 + stw r18, 0x0(r18) + sync + blr - .global led_on2 + .global led_on2 led_on2: - xor r18, r18, r18 - lis r18, 0x1c81 - ori r18, r18, 0x0000 - stw r18, 0x0(r18) - sync - blr + xor r18, r18, r18 + lis r18, 0x1c81 + ori r18, r18, 0x0000 + stw r18, 0x0(r18) + sync + blr diff --git a/board/evb64260/mpsc.c b/board/evb64260/mpsc.c index 31a6a0d..718fe05 100644 --- a/board/evb64260/mpsc.c +++ b/board/evb64260/mpsc.c @@ -131,7 +131,7 @@ static int mpsc_putchar_sdma(char ch) { - volatile unsigned int *p; + volatile unsigned int *p; unsigned int temp; @@ -237,7 +237,7 @@ } if (done == len) { - /* nothing left in this descriptor. + /* nothing left in this descriptor. * go to next one */ p[1] = DESC_OWNER | DESC_FIRST | DESC_LAST; @@ -488,7 +488,7 @@ { unsigned int temp; - temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF)); + temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF)); temp |= 0x00000001; GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp); @@ -500,7 +500,7 @@ { unsigned int temp; - temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF)); + temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF)); temp |= 0x00000002; GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp); @@ -512,7 +512,7 @@ { unsigned int temp; - temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF)); + temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF)); temp |= 0x00000040; GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp); @@ -524,7 +524,7 @@ { unsigned int temp; - temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF)); + temp = GTREGREAD(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF)); temp |= 0x00000080; GT_REG_WRITE(GALSDMA_0_CONF_REG+(channel*GALSDMA_REG_DIFF), temp); diff --git a/board/evb64260/pci.c b/board/evb64260/pci.c index 5f3b154..22da746 100644 --- a/board/evb64260/pci.c +++ b/board/evb64260/pci.c @@ -79,11 +79,11 @@ unsigned int addr; if(pciDevNum > 32) /* illegal device Number */ - return; + return; if(pciDevNum == SELF) /* configure our configuration space. */ { - pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f; - busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000; + pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f; + busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000; } functionNum = regOffset & 0x00000700; pciDevNum = pciDevNum << 11; @@ -116,16 +116,16 @@ unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset,unsigned int pciDevNum) { volatile unsigned int DataForAddrReg; - unsigned int data; + unsigned int data; unsigned int functionNum; unsigned int busNum = PCI_BUS(pciDevNum); if(pciDevNum > 32) /* illegal device Number */ - return 0xffffffff; + return 0xffffffff; if(pciDevNum == SELF) /* configure our configuration space. */ { - pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f; - busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000; + pciDevNum = (GTREGREAD(pci_p2p_configuration_reg[host]) >> 24) & 0x1f; + busNum = GTREGREAD(pci_p2p_configuration_reg[host]) & 0xff0000; } functionNum = regOffset & 0x00000700; pciDevNum = pciDevNum << 11; @@ -134,7 +134,7 @@ GT_REG_WRITE(pci_configuration_address[host],DataForAddrReg); GT_REG_READ(pci_configuration_address[host], &data); if (data != DataForAddrReg) - return 0xffffffff; + return 0xffffffff; GT_REG_READ(pci_configuration_data[host], &data); return data; } @@ -163,34 +163,34 @@ *********************************************************************/ void pciOverBridgeWriteConfigReg(PCI_HOST host, unsigned int regOffset, - unsigned int pciDevNum, - unsigned int busNum,unsigned int data) + unsigned int pciDevNum, + unsigned int busNum,unsigned int data) { - unsigned int DataForReg; + unsigned int DataForReg; unsigned int functionNum; - functionNum = regOffset & 0x00000700; + functionNum = regOffset & 0x00000700; pciDevNum = pciDevNum << 11; regOffset = regOffset & 0xff; busNum = busNum << 16; if(pciDevNum == SELF) /* This board */ { - DataForReg = ( regOffset | pciDevNum | functionNum) | BIT0; + DataForReg = ( regOffset | pciDevNum | functionNum) | BIT0; } else { - DataForReg = ( regOffset | pciDevNum | functionNum | busNum) | - BIT31 | BIT0; + DataForReg = ( regOffset | pciDevNum | functionNum | busNum) | + BIT31 | BIT0; } GT_REG_WRITE(pci_configuration_address[host],DataForReg); if(pciDevNum == SELF) /* This board */ { - GT_REG_WRITE(pci_configuration_data[host],data); + GT_REG_WRITE(pci_configuration_data[host],data); } else /* configuration Transaction over the pci. */ { - /* The PCI is working in LE Mode So it swap the Data. */ - GT_REG_WRITE(pci_configuration_data[host],WORD_SWAP(data)); + /* The PCI is working in LE Mode So it swap the Data. */ + GT_REG_WRITE(pci_configuration_data[host],WORD_SWAP(data)); } } @@ -218,8 +218,8 @@ *********************************************************************/ unsigned int pciOverBridgeReadConfigReg(PCI_HOST host, unsigned int regOffset, - unsigned int pciDevNum, - unsigned int busNum) + unsigned int pciDevNum, + unsigned int busNum) { unsigned int DataForReg; unsigned int data; @@ -231,23 +231,23 @@ busNum = busNum << 16; if (pciDevNum == SELF) /* This board */ { - DataForReg = (regOffset | pciDevNum | functionNum) | BIT31 ; + DataForReg = (regOffset | pciDevNum | functionNum) | BIT31 ; } else /* agent on another bus */ { - DataForReg = (regOffset | pciDevNum | functionNum | busNum) | - BIT0 | BIT31 ; + DataForReg = (regOffset | pciDevNum | functionNum | busNum) | + BIT0 | BIT31 ; } GT_REG_WRITE(pci_configuration_address[host],DataForReg); if (pciDevNum == SELF) /* This board */ - { - GT_REG_READ(pci_configuration_data[host], &data); - return data; + { + GT_REG_READ(pci_configuration_data[host], &data); + return data; } else /* The PCI is working in LE Mode So it swap the Data. */ { - GT_REG_READ(pci_configuration_data[host], &data); - return WORD_SWAP(data); + GT_REG_READ(pci_configuration_data[host], &data); + return WORD_SWAP(data); } } @@ -356,12 +356,12 @@ *********************************************************************/ void pciMapMemoryBank(PCI_HOST host, MEMORY_BANK bank, unsigned int pciDramBase,unsigned int pciDramSize) { - pciDramBase = pciDramBase & 0xfffff000; + pciDramBase = pciDramBase & 0xfffff000; pciDramBase = pciDramBase | (pciReadConfigReg(host, - PCI_SCS_0_BASE_ADDRESS + 4*bank,SELF) & 0x00000fff); + PCI_SCS_0_BASE_ADDRESS + 4*bank,SELF) & 0x00000fff); pciWriteConfigReg(host,PCI_SCS_0_BASE_ADDRESS + 4*bank,SELF,pciDramBase); if(pciDramSize == 0) - pciDramSize ++; + pciDramSize ++; GT_REG_WRITE(pci_scs_bank_size[host][bank], pciDramSize-1); } @@ -378,7 +378,7 @@ * Returns: false if one of the parameters is erroneous true otherwise. *********************************************************************/ bool pciSetRegionFeatures(PCI_HOST host, PCI_ACCESS_REGIONS region,unsigned int features, - unsigned int baseAddress,unsigned int regionLength) + unsigned int baseAddress,unsigned int regionLength) { unsigned int accessLow; unsigned int accessHigh; @@ -386,8 +386,8 @@ if(regionLength == 0) /* close the region. */ { - pciDisableAccessRegion(host, region); - return true; + pciDisableAccessRegion(host, region); + return true; } /* base Address is store is bits [11:0] */ accessLow = (baseAddress & 0xfff00000) >> 20; @@ -464,21 +464,21 @@ * Returns: true *********************************************************************/ bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent, - PCI_AGENT_PARK externalAgent0, - PCI_AGENT_PARK externalAgent1, - PCI_AGENT_PARK externalAgent2, - PCI_AGENT_PARK externalAgent3, - PCI_AGENT_PARK externalAgent4, - PCI_AGENT_PARK externalAgent5) + PCI_AGENT_PARK externalAgent0, + PCI_AGENT_PARK externalAgent1, + PCI_AGENT_PARK externalAgent2, + PCI_AGENT_PARK externalAgent3, + PCI_AGENT_PARK externalAgent4, + PCI_AGENT_PARK externalAgent5) { unsigned int regData; unsigned int writeData; GT_REG_READ(pci_arbiter_control[host],®Data); writeData = (internalAgent << 14) + (externalAgent0 << 15) + \ - (externalAgent1 << 16) + (externalAgent2 << 17) + \ - (externalAgent3 << 18) + (externalAgent4 << 19) + \ - (externalAgent5 << 20); + (externalAgent1 << 16) + (externalAgent2 << 17) + \ + (externalAgent3 << 18) + (externalAgent4 << 19) + \ + (externalAgent5 << 20); regData = (regData & ~(0x7f<<14)) | writeData; GT_REG_WRITE(pci_arbiter_control[host],regData); return true; @@ -498,8 +498,8 @@ * Returns: false if one of the parameters is wrong otherwise return true. *********************************************************************/ bool pciSetRegionSnoopMode(PCI_HOST host, PCI_SNOOP_REGION region,PCI_SNOOP_TYPE snoopType, - unsigned int baseAddress, - unsigned int regionLength) + unsigned int baseAddress, + unsigned int regionLength) { unsigned int snoopXbaseAddress; unsigned int snoopXtopAddress; @@ -507,14 +507,14 @@ unsigned int snoopHigh = baseAddress + regionLength; if( (region > PCI_SNOOP_REGION3) || (snoopType > PCI_SNOOP_WB) ) - return false; + return false; snoopXbaseAddress = pci_snoop_control_base_0_low[host] + 0x10 * region; snoopXtopAddress = pci_snoop_control_top_0[host] + 0x10 * region; if(regionLength == 0) /* closing the region */ { - GT_REG_WRITE(snoopXbaseAddress,0x0000ffff); - GT_REG_WRITE(snoopXtopAddress,0); - return true; + GT_REG_WRITE(snoopXbaseAddress,0x0000ffff); + GT_REG_WRITE(snoopXtopAddress,0); + return true; } baseAddress = baseAddress & 0xfff00000; /* Granularity of 1MByte */ data = (baseAddress >> 20) | snoopType << 12; @@ -533,12 +533,12 @@ int offset, u32* value) { int bus = PCI_BUS(dev); - + if ((bus == local_buses[0]) || (bus == local_buses[1])){ - *value = pciReadConfigReg((PCI_HOST) hose->cfg_addr, offset, + *value = pciReadConfigReg((PCI_HOST) hose->cfg_addr, offset, PCI_DEV(dev)); } else { - *value = pciOverBridgeReadConfigReg((PCI_HOST) hose->cfg_addr, + *value = pciOverBridgeReadConfigReg((PCI_HOST) hose->cfg_addr, offset, PCI_DEV(dev), bus); } return 0; @@ -551,10 +551,10 @@ int bus = PCI_BUS(dev); if ((bus == local_buses[0]) || (bus == local_buses[1])){ - pciWriteConfigReg((PCI_HOST)hose->cfg_addr, offset, + pciWriteConfigReg((PCI_HOST)hose->cfg_addr, offset, PCI_DEV(dev), value); } else { - pciOverBridgeWriteConfigReg((PCI_HOST)hose->cfg_addr, offset, + pciOverBridgeWriteConfigReg((PCI_HOST)hose->cfg_addr, offset, PCI_DEV(dev), value, bus); } return 0; diff --git a/board/evb64260/sdram_init.c b/board/evb64260/sdram_init.c index ff98e4d..3616565 100644 --- a/board/evb64260/sdram_init.c +++ b/board/evb64260/sdram_init.c @@ -155,7 +155,7 @@ static int check_dimm(uchar slot, sdram_info_t *info) { - /* assume 2 dimms, 2 banks each 256M - we dont have an + /* assume 2 dimms, 2 banks each 256M - we dont have an * dimm i2c so rely on the detection routines later */ memset(info, 0, sizeof(*info)); @@ -192,7 +192,7 @@ get_clocks (); - tmemclk = 1000000000 / (gd->bus_clk / 100); /* in 10 ps units */ + tmemclk = 1000000000 / (gd->bus_clk / 100); /* in 10 ps units */ #ifdef CONFIG_EVB64260_750CX if (0 != slot) { @@ -284,7 +284,7 @@ #ifdef CFG_BROKEN_CL2 if (info->tpar == 2){ info->tpar = 3; - DP(printf("tpar fixed-up to: %d\n", info->tpar)); + DP(printf("tpar fixed-up to: %d\n", info->tpar)); } #endif /* compute the module DRB size */ @@ -310,7 +310,7 @@ static int setup_sdram_common(sdram_info_t info[2]) { - ulong tmp; + ulong tmp; int tpar=2, tras_clocks=5, registered=1, ecc=2; if(!info[0].banks && !info[1].banks) return 0; @@ -500,7 +500,7 @@ { ulong checkbank[4] = { [0 ... 3] = 0 }; int bank_no; - ulong total; + ulong total; int nhr; sdram_info_t dimm_info[2]; @@ -608,7 +608,7 @@ * chips) */ if (checkbank[2]==0 && checkbank[3]==0) { - dimm_info[0].ecc=2; + dimm_info[0].ecc=2; GT_REG_WRITE(SDRAM_TIMING, GTREGREAD(SDRAM_TIMING) | (1 << 13)); /* TODO: do we have to run MRS cycles again? */ } @@ -624,6 +624,6 @@ dump_dimm_info(&dimm_info[1]); #endif /* TODO: return at MOST 256M? */ - /* return total > GB/4 ? GB/4 : total; */ + /* return total > GB/4 ? GB/4 : total; */ return total; } diff --git a/board/evb64260/u-boot.lds b/board/evb64260/u-boot.lds index de50bf4..0dfa8c0 100644 --- a/board/evb64260/u-boot.lds +++ b/board/evb64260/u-boot.lds @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/evb64260/zuma_pbb.c b/board/evb64260/zuma_pbb.c index 10c4845..531b16b 100644 --- a/board/evb64260/zuma_pbb.c +++ b/board/evb64260/zuma_pbb.c @@ -3,7 +3,6 @@ #if (CONFIG_COMMANDS & CFG_CMD_BSP) #include -#include #endif #include @@ -16,9 +15,11 @@ #define PAT_HI 0x04050607 static PBB_DMA_REG_MAP *zuma_pbb_reg = NULL; - static char test_buf1[2048]; static char test_buf2[2048]; +void zuma_init_pbb(void); +int zuma_mbox_init(void); +int zuma_test_dma(int cmd, int size); int zuma_test_dma (int cmd, int size) { @@ -197,4 +198,23 @@ return 0; } +cmd_tbl_t U_BOOT_CMD(zuma_init_pbb) = MK_CMD_ENTRY( + "zinit", 1, 0, do_zuma_init_pbb, + "zinit - init zuma pbb\n", + "\n" + " - init zuma pbb\n" +); +cmd_tbl_t U_BOOT_CMD(zuma_test_dma) = MK_CMD_ENTRY( + "zdtest", 3, 1, do_zuma_test_dma, + "zdtest - run dma test\n", + "[cmd [count]]\n" + " - run dma cmd (w=0,v=1,cp=2,cmp=3,wi=4,vi=5), count bytes\n" +); +cmd_tbl_t U_BOOT_CMD(zuma_init_mbox) = MK_CMD_ENTRY( + "zminit", 1, 0, do_zuma_init_mbox, + "zminit - init zuma mbox\n", + "\n" + " - init zuma mbox\n" +); + #endif /* CFG_CMD_BSP */ diff --git a/board/evb64260/zuma_pbb.h b/board/evb64260/zuma_pbb.h index 663e10c..300b2fe 100644 --- a/board/evb64260/zuma_pbb.h +++ b/board/evb64260/zuma_pbb.h @@ -178,7 +178,7 @@ V32 res1:8; /* bits 24-31 */ } _le_bits; V8 byte[4]; - V32 word; + V32 word; } desc; V32 pad1; } DMA_DESC_LEVEL; @@ -214,7 +214,7 @@ /* 39/40 (0x138/0x140) */ union { - /* NOTE!! 4 dwords */ + /* NOTE!! 4 dwords */ struct { V32 channel_3:8; V32 channel_2:8; diff --git a/board/fads/Makefile b/board/fads/Makefile index 20a19b9..baa6c2e 100644 --- a/board/fads/Makefile +++ b/board/fads/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o lamp.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/fads/fads.c b/board/fads/fads.c index 8714689..0519771 100644 --- a/board/fads/fads.c +++ b/board/fads/fads.c @@ -272,7 +272,7 @@ switch(k) { case 0x00 : puts ("ENG - this board sucks, check the errata, not supported\n"); - return -1; + return -1; case 0x01 : puts ("PILOT - warning, read errata \n"); break; case 0x02 : puts ("A - warning, read errata \n"); break; case 0x03 : puts ("B \n"); break; diff --git a/board/fads/u-boot.lds b/board/fads/u-boot.lds index a76b0ff..41776d1 100644 --- a/board/fads/u-boot.lds +++ b/board/fads/u-boot.lds @@ -112,6 +112,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -139,4 +144,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/fads/u-boot.lds.dan b/board/fads/u-boot.lds.dan deleted file mode 100644 index e829aa9..0000000 --- a/board/fads/u-boot.lds.dan +++ /dev/null @@ -1,139 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); -/* Do we need any of these for elf? - __DYNAMIC = 0; */ -SECTIONS -{ - /* Read-only sections, merged into text segment: */ - . = + SIZEOF_HEADERS; - .interp : { *(.interp) } - .hash : { *(.hash) } - .dynsym : { *(.dynsym) } - .dynstr : { *(.dynstr) } - .rel.text : { *(.rel.text) } - .rela.text : { *(.rela.text) } - .rel.data : { *(.rel.data) } - .rela.data : { *(.rela.data) } - .rel.rodata : { *(.rel.rodata) } - .rela.rodata : { *(.rela.rodata) } - .rel.got : { *(.rel.got) } - .rela.got : { *(.rela.got) } - .rel.ctors : { *(.rel.ctors) } - .rela.ctors : { *(.rela.ctors) } - .rel.dtors : { *(.rel.dtors) } - .rela.dtors : { *(.rela.dtors) } - .rel.bss : { *(.rel.bss) } - .rela.bss : { *(.rela.bss) } - .rel.plt : { *(.rel.plt) } - .rela.plt : { *(.rela.plt) } - .init : { *(.init) } - .plt : { *(.plt) } - .text : - { - /* WARNING - the following is hand-optimized to fit within */ - /* the sector layout of our flash chips! XXX FIXME XXX */ - - cpu/mpc8xx/start.o (.text) - common/dlmalloc.o (.text) - lib_ppc/ppcstring.o (.text) - lib_generic/vsprintf.o (.text) - lib_generic/crc32.o (.text) - lib_generic/zlib.o (.text) - - - *(.text) - *(.fixup) - *(.got1) - } - _etext = .; - PROVIDE (etext = .); - .rodata : - { - *(.rodata) - *(.rodata1) - } - .fini : { *(.fini) } =0 - .ctors : { *(.ctors) } - .dtors : { *(.dtors) } - - /* Read-write section, merged into data segment: */ - . = (. + 0x0FFF) & 0xFFFFF000; - _erotext = .; - PROVIDE (erotext = .); - .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .data : - { - *(.data) - *(.data1) - *(.sdata) - *(.sdata2) - *(.dynamic) - CONSTRUCTORS - } - _edata = .; - PROVIDE (edata = .); - - __start___ex_table = .; - __ex_table : { *(__ex_table) } - __stop___ex_table = .; - - . = ALIGN(4096); - __init_begin = .; - .text.init : { *(.text.init) } - .data.init : { *(.data.init) } - . = ALIGN(4096); - __init_end = .; - - __bss_start = .; - .bss : - { - *(.sbss) *(.scommon) - *(.dynbss) - *(.bss) - *(COMMON) - } - . = 0x2840000; - .ppcenv : - { -/* - . = env_offset; -*/ - common/environment.o(.ppcenv) - } - _end = . ; - PROVIDE (end = .); -} - diff --git a/board/fads/u-boot.lds.debug b/board/fads/u-boot.lds.debug index bd13b7b..0245f78 100644 --- a/board/fads/u-boot.lds.debug +++ b/board/fads/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -129,4 +134,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/flagadm/Makefile b/board/flagadm/Makefile index 35b8428..7a2014d 100644 --- a/board/flagadm/Makefile +++ b/board/flagadm/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/flagadm/u-boot.lds b/board/flagadm/u-boot.lds index 8348fe7..87e323b 100644 --- a/board/flagadm/u-boot.lds +++ b/board/flagadm/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +125,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/flagadm/u-boot.lds.debug b/board/flagadm/u-boot.lds.debug index 8dc6d40..f6f7cf4 100644 --- a/board/flagadm/u-boot.lds.debug +++ b/board/flagadm/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/gen860t/Makefile b/board/gen860t/Makefile index 21bf040..dd7ecf1 100644 --- a/board/gen860t/Makefile +++ b/board/gen860t/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o beeper.o fpga.o ioport.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/gen860t/README b/board/gen860t/README index 7c03f93..7205afb 100644 --- a/board/gen860t/README +++ b/board/gen860t/README @@ -144,4 +144,3 @@ vim: set ts=4 sw=4 tw=78: - diff --git a/board/gen860t/u-boot-flashenv.lds b/board/gen860t/u-boot-flashenv.lds index e95a6a1..f46c314 100644 --- a/board/gen860t/u-boot-flashenv.lds +++ b/board/gen860t/u-boot-flashenv.lds @@ -121,7 +121,7 @@ *(.bss) *(COMMON) } - + _end = . ; PROVIDE (end = .); diff --git a/board/gen860t/u-boot.lds b/board/gen860t/u-boot.lds index b7b190e..d4c258f 100644 --- a/board/gen860t/u-boot.lds +++ b/board/gen860t/u-boot.lds @@ -101,6 +101,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/genietv/Makefile b/board/genietv/Makefile index ef173d0..13ce9fc 100644 --- a/board/genietv/Makefile +++ b/board/genietv/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/genietv/genietv.c b/board/genietv/genietv.c index 8f32ad7..a5e64b3 100644 --- a/board/genietv/genietv.c +++ b/board/genietv/genietv.c @@ -49,9 +49,9 @@ /* * SDRAM Initialization (offset 5 in UPMB RAM) * - * This is no UPM entry point. The following definition uses - * the remaining space to establish an initialization - * sequence, which is executed by a RUN command. + * This is no UPM entry point. The following definition uses + * the remaining space to establish an initialization + * sequence, which is executed by a RUN command. * */ 0x1FFDDC34, 0xEFEEAC34, 0x1FBD5C35, /* last */ @@ -198,21 +198,21 @@ if (size_b1 > 0) { - /* - * Position Bank 1 immediately above Bank 0 - */ - memctl->memc_or2 = ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM; - memctl->memc_br2 = ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V) + - (size_b0 & BR_BA_MSK); + /* + * Position Bank 1 immediately above Bank 0 + */ + memctl->memc_or2 = ((-size_b1) & 0xFFFF0000) | CFG_OR_TIMING_SDRAM; + memctl->memc_br2 = ((CFG_SDRAM_BASE & BR_BA_MSK) | BR_MS_UPMB | BR_V) + + (size_b0 & BR_BA_MSK); } else { - /* - * No bank 1 - * - * invalidate bank - */ - memctl->memc_br2 = 0; + /* + * No bank 1 + * + * invalidate bank + */ + memctl->memc_br2 = 0; /* adjust refresh rate depending on SDRAM type, one bank */ memctl->memc_mptpr = CFG_MPTPR_1BK_4K; } diff --git a/board/genietv/u-boot.lds b/board/genietv/u-boot.lds index 451d853..276e2b4 100644 --- a/board/genietv/u-boot.lds +++ b/board/genietv/u-boot.lds @@ -108,6 +108,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -135,4 +140,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/genietv/u-boot.lds.debug b/board/genietv/u-boot.lds.debug index aaf58f0..749817d 100644 --- a/board/genietv/u-boot.lds.debug +++ b/board/genietv/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -134,4 +139,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/gth/Makefile b/board/gth/Makefile index 4571a05..e14c12e 100644 --- a/board/gth/Makefile +++ b/board/gth/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o ee_access.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/gth/README b/board/gth/README index 44caf3a..241c70b 100644 --- a/board/gth/README +++ b/board/gth/README @@ -16,5 +16,3 @@ from miniboot that boots the first U-Boot image found in flash. For miniboot code, description, see www.opensource.se - - diff --git a/board/gth/config.mk b/board/gth/config.mk index b74dff3..3c80156 100644 --- a/board/gth/config.mk +++ b/board/gth/config.mk @@ -38,4 +38,3 @@ endif OBJCFLAGS = --set-section-flags=.ppcenv=contents,alloc,load,data - diff --git a/board/gth/u-boot.lds b/board/gth/u-boot.lds index a5d4bed..50f41b5 100644 --- a/board/gth/u-boot.lds +++ b/board/gth/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +125,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/gw8260/Makefile b/board/gw8260/Makefile index fb50b38..827a6ac 100644 --- a/board/gw8260/Makefile +++ b/board/gw8260/Makefile @@ -29,7 +29,7 @@ SOBJS := $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/gw8260/u-boot.lds b/board/gw8260/u-boot.lds index 6db9a67..32e8f39 100644 --- a/board/gw8260/u-boot.lds +++ b/board/gw8260/u-boot.lds @@ -93,6 +93,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -115,4 +120,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/hermes/Makefile b/board/hermes/Makefile index ef173d0..13ce9fc 100644 --- a/board/hermes/Makefile +++ b/board/hermes/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/hermes/u-boot.lds b/board/hermes/u-boot.lds index e713055..4dbf7a6 100644 --- a/board/hermes/u-boot.lds +++ b/board/hermes/u-boot.lds @@ -109,6 +109,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/hermes/u-boot.lds.debug b/board/hermes/u-boot.lds.debug index 1568a47..49e84c0 100644 --- a/board/hermes/u-boot.lds.debug +++ b/board/hermes/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/hymod/Makefile b/board/hymod/Makefile index 4d3097c..b52af9a 100644 --- a/board/hymod/Makefile +++ b/board/hymod/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o bsp.o eeprom.o fetch.o input.o env.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/hymod/bsp.c b/board/hymod/bsp.c index 02b6421..f131e51 100644 --- a/board/hymod/bsp.c +++ b/board/hymod/bsp.c @@ -276,7 +276,30 @@ printf ("Usage:\n%s\n", cmdtp->usage); return 1; } - +cmd_tbl_t U_BOOT_CMD(fpga) = MK_CMD_ENTRY( + "fpga", 6, 1, do_fpga, + "fpga - FPGA sub-system\n", + "load [type] addr size\n" + " - write the configuration data at memory address `addr',\n" + " size `size' bytes, into the FPGA of type `type' (either\n" + " `main' or `mezz', default `main'). e.g.\n" + " `fpga load 100000 7d8f'\n" + " loads the main FPGA with config data at address 100000\n" + " HEX, size 7d8f HEX (32143 DEC) bytes\n" + "fpga tftp file addr\n" + " - transfers `file' from the tftp server into memory at\n" + " address `addr', then writes the entire file contents\n" + " into the main FPGA\n" + "fpga store addr\n" + " - read configuration data from the main FPGA (the mezz\n" + " FPGA is write-only), into address `addr'. There must be\n" + " enough memory available at `addr' to hold all the config\n" + " data - the size of which is determined by VC:???\n" + "fpga info\n" + " - print information about the Hymod FPGA, namely the\n" + " memory addresses at which the four FPGA local bus\n" + " address spaces appear in the physical address space\n" +); /* ------------------------------------------------------------------------- */ int do_eecl (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) @@ -312,15 +335,17 @@ return 0; } +cmd_tbl_t U_BOOT_CMD(eec) = MK_CMD_ENTRY( + "eeclear", 1, 0, do_eecl, + "eeclear - Clear the eeprom on a Hymod board \n", + "[type]\n" + " - write zeroes into the EEPROM on the board of type `type'\n" + " (`type' is either `main' or `mezz' - default `main')\n" + " Note: the EEPROM write enable jumper must be installed\n" +); /* ------------------------------------------------------------------------- */ -#if 0 -static uchar test_bitfile[] = { - /* one day ... */ -}; -#endif - int do_htest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { diff --git a/board/hymod/u-boot.lds b/board/hymod/u-boot.lds index d71859c..1e20425 100644 --- a/board/hymod/u-boot.lds +++ b/board/hymod/u-boot.lds @@ -111,6 +111,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -138,4 +143,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/hymod/u-boot.lds.debug b/board/hymod/u-boot.lds.debug index 22138f8..c0ee849 100644 --- a/board/hymod/u-boot.lds.debug +++ b/board/hymod/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/icu862/Makefile b/board/icu862/Makefile index 35b8428..7a2014d 100644 --- a/board/icu862/Makefile +++ b/board/icu862/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/icu862/u-boot.lds b/board/icu862/u-boot.lds index e14520b..496c598 100644 --- a/board/icu862/u-boot.lds +++ b/board/icu862/u-boot.lds @@ -112,6 +112,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -139,4 +144,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/icu862/u-boot.lds.debug b/board/icu862/u-boot.lds.debug index 2365116..7b84fd3 100644 --- a/board/icu862/u-boot.lds.debug +++ b/board/icu862/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -129,4 +134,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/impa7/Makefile b/board/impa7/Makefile index d936308..f8323e0 100644 --- a/board/impa7/Makefile +++ b/board/impa7/Makefile @@ -29,7 +29,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/impa7/flash.c b/board/impa7/flash.c index 7db0b32..da4d31e 100644 --- a/board/impa7/flash.c +++ b/board/impa7/flash.c @@ -221,7 +221,7 @@ /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) - return ERR_NOT_ERASED; + return ERR_NOT_ERASED; /* * Disable interrupts which might cause a timeout diff --git a/board/impa7/memsetup.S b/board/impa7/memsetup.S index d1d1a57..5cb5fa8 100644 --- a/board/impa7/memsetup.S +++ b/board/impa7/memsetup.S @@ -21,7 +21,6 @@ */ - #include #include @@ -84,4 +83,3 @@ /* everything is fine now */ mov pc, lr - diff --git a/board/impa7/u-boot.lds b/board/impa7/u-boot.lds index 0849648..36521b8 100644 --- a/board/impa7/u-boot.lds +++ b/board/impa7/u-boot.lds @@ -26,28 +26,33 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/arm720t/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } armboot_end = .; + } diff --git a/board/incaip/Makefile b/board/incaip/Makefile index ad59bf0..d1cdc6b 100644 --- a/board/incaip/Makefile +++ b/board/incaip/Makefile @@ -29,7 +29,7 @@ SOBJS = memsetup.o $(LIB): .depend $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) ######################################################################### diff --git a/board/incaip/flash.c b/board/incaip/flash.c index e7fd540..686f2e9 100644 --- a/board/incaip/flash.c +++ b/board/incaip/flash.c @@ -85,14 +85,14 @@ memset(&flash_info[i], 0, sizeof(flash_info_t)); #endif - flash_info[i].size = + flash_info[i].size = flash_get_size((FPW *)flashbase, &flash_info[i]); if (flash_info[i].flash_id == FLASH_UNKNOWN) { printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx\n", i, flash_info[i].size); } - + size += flash_info[i].size; } @@ -172,13 +172,13 @@ { int i; flash_info_t * info; - + for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) { info = & flash_info[i]; if (info->start[0] <= base && base < info->start[0] + info->size) break; } - + return i == CFG_MAX_FLASH_BANKS ? 0 : info; } @@ -225,32 +225,32 @@ case FLASH_AM640U: fmt = "29LV641D (64 Mbit, uniform sectors)\n"; break; - case FLASH_28F800C3B: - case FLASH_28F800C3T: + case FLASH_28F800C3B: + case FLASH_28F800C3T: fmt = "28F800C3%s (8 Mbit, %s)\n"; break; case FLASH_INTEL800B: case FLASH_INTEL800T: fmt = "28F800B3%s (8 Mbit, %s)\n"; break; - case FLASH_28F160C3B: - case FLASH_28F160C3T: + case FLASH_28F160C3B: + case FLASH_28F160C3T: fmt = "28F160C3%s (16 Mbit, %s)\n"; break; case FLASH_INTEL160B: case FLASH_INTEL160T: fmt = "28F160B3%s (16 Mbit, %s)\n"; break; - case FLASH_28F320C3B: - case FLASH_28F320C3T: + case FLASH_28F320C3B: + case FLASH_28F320C3T: fmt = "28F320C3%s (32 Mbit, %s)\n"; break; case FLASH_INTEL320B: case FLASH_INTEL320T: fmt = "28F320B3%s (32 Mbit, %s)\n"; break; - case FLASH_28F640C3B: - case FLASH_28F640C3T: + case FLASH_28F640C3B: + case FLASH_28F640C3T: fmt = "28F640C3%s (64 Mbit, %s)\n"; break; case FLASH_INTEL640B: @@ -534,15 +534,15 @@ left > 0 && res == 0; addr += sizeof(data), left -= sizeof(data) - bytes) { - bytes = addr & (sizeof(data) - 1); - addr &= ~(sizeof(data) - 1); + bytes = addr & (sizeof(data) - 1); + addr &= ~(sizeof(data) - 1); /* combine source and destination data so can program * an entire word of 16 or 32 bits */ - for (i = 0; i < sizeof(data); i++) { - data <<= 8; - if (i < bytes || i - bytes >= left ) + for (i = 0; i < sizeof(data); i++) { + data <<= 8; + if (i < bytes || i - bytes >= left ) data += *((uchar *)addr + i); else data += *src++; diff --git a/board/incaip/memsetup.S b/board/incaip/memsetup.S index f1afb5c..245ab72 100644 --- a/board/incaip/memsetup.S +++ b/board/incaip/memsetup.S @@ -133,7 +133,7 @@ sw t1, MC_MRSCODE(t0) /* Set word width to 16 bit */ - li t1, 0x2 + li t1, 0x2 sw t1, MC_CFGDW(t0) /* Set CS0 to SDRAM parameters */ @@ -154,4 +154,3 @@ j ra nop - diff --git a/board/incaip/u-boot.lds b/board/incaip/u-boot.lds index 3c9ca89..a2d19a8 100644 --- a/board/incaip/u-boot.lds +++ b/board/incaip/u-boot.lds @@ -29,19 +29,19 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } . = ALIGN(4); .sdata : { *(.sdata) } @@ -54,11 +54,15 @@ .sdata : { *(.sdata) } + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + uboot_end_data = .; num_got_entries = (__got_end - __got_start) >> 2; - . = ALIGN(4); + . = ALIGN(4); .sbss : { *(.sbss) } - .bss : { *(.bss) } + .bss : { *(.bss) } uboot_end = .; } diff --git a/board/innokom/Makefile b/board/innokom/Makefile index 7fbe76b..59eaee5 100644 --- a/board/innokom/Makefile +++ b/board/innokom/Makefile @@ -29,7 +29,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/innokom/config.mk b/board/innokom/config.mk index 939ffff..2354392 100644 --- a/board/innokom/config.mk +++ b/board/innokom/config.mk @@ -13,4 +13,3 @@ # for the addresses _after_ relocation to RAM!! Otherwhise the # .bss segment is assumed in flash... TEXT_BASE = 0xa1fe0000 - diff --git a/board/innokom/flash.c b/board/innokom/flash.c index b7c2072..3caf43d 100644 --- a/board/innokom/flash.c +++ b/board/innokom/flash.c @@ -10,7 +10,7 @@ * Robert Schwebel, Pengutronix, * * (C) Copyright 2002 - * Auerswald GmbH & Co KG, Germany + * Auerswald GmbH & Co KG, Germany * Kai-Uwe Bloem * * See file CREDITS for list of people who contributed to this @@ -42,7 +42,6 @@ /* Debugging macros ------------------------------------------------------ */ #undef FLASH_DEBUG -//#define FLASH_DEBUG 1 /* Some debug macros */ #if (FLASH_DEBUG > 2 ) @@ -107,10 +106,10 @@ /* u-boot partition */ if(part_num==0){ memset(&part, 0, sizeof(part)); - + part.offset=(char*)0x00000000; part.size=256*1024; - + /* Mark the struct as ready */ current_part = part_num; @@ -121,24 +120,24 @@ /* primary OS+firmware partition */ if(part_num==1){ memset(&part, 0, sizeof(part)); - + part.offset=(char*)0x00040000; part.size=768*1024; - + /* Mark the struct as ready */ current_part = part_num; PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); } - + /* secondary OS+firmware partition */ if(part_num==2){ memset(&part, 0, sizeof(part)); - + part.offset=(char*)0x00100000; part.size=8*1024*1024; - + /* Mark the struct as ready */ current_part = part_num; @@ -149,17 +148,17 @@ /* data partition */ if(part_num==3){ memset(&part, 0, sizeof(part)); - + part.offset=(char*)0x00900000; part.size=7*1024*1024; - + /* Mark the struct as ready */ current_part = part_num; PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); } - + if (current_part == part_num) { part.usr_priv = ¤t_part; part.jffs2_priv = jffs2_priv_saved; @@ -186,10 +185,10 @@ /* u-boot partition */ if(part_num==0){ memset(&part, 0, sizeof(part)); - + part.offset=(char*)0x00000000; part.size=256*1024; - + /* Mark the struct as ready */ current_part = part_num; @@ -200,24 +199,24 @@ /* primary OS+firmware partition */ if(part_num==1){ memset(&part, 0, sizeof(part)); - + part.offset=(char*)0x00040000; part.size=16*1024*1024-128*1024; - + /* Mark the struct as ready */ current_part = part_num; PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); } - + /* secondary OS+firmware partition */ if(part_num==2){ memset(&part, 0, sizeof(part)); - + part.offset=(char*)0x01020000; part.size=16*1024*1024-128*1024; - + /* Mark the struct as ready */ current_part = part_num; @@ -228,17 +227,17 @@ /* data partition */ if(part_num==3){ memset(&part, 0, sizeof(part)); - + part.offset=(char*)0x02000000; part.size=32*1024*1024; - + /* Mark the struct as ready */ current_part = part_num; PRINTK("part.offset = 0x%08x\n",(unsigned int)part.offset); PRINTK("part.size = 0x%08x\n",(unsigned int)part.size); } - + if (current_part == part_num) { part.usr_priv = ¤t_part; part.jffs2_priv = jffs2_priv_saved; @@ -335,13 +334,13 @@ return; } - printf(" Size: %ld MB in %d Sectors\n", + printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); printf(" Sector Start Addresses:"); for (i = 0; i < info->sector_count; i++) { if ((i % 5) == 0) printf ("\n "); - + printf (" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " "); } @@ -370,7 +369,7 @@ if ((info->flash_id & FLASH_VENDMASK) != (INTEL_MANUFACT & FLASH_VENDMASK)) return ERR_UNKNOWN_FLASH_VENDOR; - + prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) prot++; @@ -420,13 +419,13 @@ goto outahere; } } - + PRINTK("clearing status register\n"); - *addr = 0x0050; + *addr = 0x0050; PRINTK("resetting to read mode"); - *addr = 0x00FF; + *addr = 0x00FF; } - + printf("ok.\n"); } @@ -595,4 +594,3 @@ return write_word(info, wp, data); } - diff --git a/board/innokom/innokom.c b/board/innokom/innokom.c index da238da..ae5402e 100644 --- a/board/innokom/innokom.c +++ b/board/innokom/innokom.c @@ -46,10 +46,10 @@ /* disable I2C controller first, otherwhise it thinks we want to */ /* talk to the slave port... */ icr = ICR; ICR &= ~(ICR_SCLE | ICR_IUE); - + /* set gpio pin low _before_ we change direction to output */ GPCR(70) = GPIO_bit(70); - + /* now toggle between output=low and high-impedance */ for (i = 0; i < 20; i++) { GPDR(70) |= GPIO_bit(70); /* output */ @@ -144,18 +144,18 @@ break; case 1: if (state==1) { - GPCR0 |= CSB226_USER_LED1; - } else if (state==0) { - GPSR0 |= CSB226_USER_LED1; - } - break; + GPCR0 |= CSB226_USER_LED1; + } else if (state==0) { + GPSR0 |= CSB226_USER_LED1; + } + break; case 2: if (state==1) { - GPCR0 |= CSB226_USER_LED2; - } else if (state==0) { - GPSR0 |= CSB226_USER_LED2; - } - break; + GPCR0 |= CSB226_USER_LED2; + } else if (state==0) { + GPSR0 |= CSB226_USER_LED2; + } + break; */ } @@ -184,4 +184,3 @@ return; } - diff --git a/board/innokom/memsetup.S b/board/innokom/memsetup.S index 60f9d50..68577ca 100644 --- a/board/innokom/memsetup.S +++ b/board/innokom/memsetup.S @@ -159,7 +159,7 @@ mem_init: - ldr r1, =MEMC_BASE /* get memory controller base addr. */ + ldr r1, =MEMC_BASE /* get memory controller base addr. */ /* ---------------------------------------------------------------- */ /* Step 2a: Initialize Asynchronous static memory controller */ @@ -167,65 +167,65 @@ /* MSC registers: timing, bus width, mem type */ - /* MSC0: nCS(0,1) */ - ldr r2, =CFG_MSC0_VAL - str r2, [r1, #MSC0_OFFSET] - ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ + /* MSC0: nCS(0,1) */ + ldr r2, =CFG_MSC0_VAL + str r2, [r1, #MSC0_OFFSET] + ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ /* that data latches */ - /* MSC1: nCS(2,3) */ - ldr r2, =CFG_MSC1_VAL - str r2, [r1, #MSC1_OFFSET] - ldr r2, [r1, #MSC1_OFFSET] + /* MSC1: nCS(2,3) */ + ldr r2, =CFG_MSC1_VAL + str r2, [r1, #MSC1_OFFSET] + ldr r2, [r1, #MSC1_OFFSET] /* MSC2: nCS(4,5) */ - ldr r2, =CFG_MSC2_VAL - str r2, [r1, #MSC2_OFFSET] - ldr r2, [r1, #MSC2_OFFSET] + ldr r2, =CFG_MSC2_VAL + str r2, [r1, #MSC2_OFFSET] + ldr r2, [r1, #MSC2_OFFSET] /* ---------------------------------------------------------------- */ /* Step 2b: Initialize Card Interface */ /* ---------------------------------------------------------------- */ /* MECR: Memory Expansion Card Register */ - ldr r2, =CFG_MECR_VAL - str r2, [r1, #MECR_OFFSET] + ldr r2, =CFG_MECR_VAL + str r2, [r1, #MECR_OFFSET] ldr r2, [r1, #MECR_OFFSET] /* MCMEM0: Card Interface slot 0 timing */ - ldr r2, =CFG_MCMEM0_VAL - str r2, [r1, #MCMEM0_OFFSET] + ldr r2, =CFG_MCMEM0_VAL + str r2, [r1, #MCMEM0_OFFSET] ldr r2, [r1, #MCMEM0_OFFSET] - /* MCMEM1: Card Interface slot 1 timing */ - ldr r2, =CFG_MCMEM1_VAL - str r2, [r1, #MCMEM1_OFFSET] + /* MCMEM1: Card Interface slot 1 timing */ + ldr r2, =CFG_MCMEM1_VAL + str r2, [r1, #MCMEM1_OFFSET] ldr r2, [r1, #MCMEM1_OFFSET] /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ - ldr r2, =CFG_MCATT0_VAL - str r2, [r1, #MCATT0_OFFSET] + ldr r2, =CFG_MCATT0_VAL + str r2, [r1, #MCATT0_OFFSET] ldr r2, [r1, #MCATT0_OFFSET] /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ - ldr r2, =CFG_MCATT1_VAL - str r2, [r1, #MCATT1_OFFSET] + ldr r2, =CFG_MCATT1_VAL + str r2, [r1, #MCATT1_OFFSET] ldr r2, [r1, #MCATT1_OFFSET] /* MCIO0: Card Interface I/O Space Timing, slot 0 */ - ldr r2, =CFG_MCIO0_VAL - str r2, [r1, #MCIO0_OFFSET] + ldr r2, =CFG_MCIO0_VAL + str r2, [r1, #MCIO0_OFFSET] ldr r2, [r1, #MCIO0_OFFSET] /* MCIO1: Card Interface I/O Space Timing, slot 1 */ - ldr r2, =CFG_MCIO1_VAL - str r2, [r1, #MCIO1_OFFSET] + ldr r2, =CFG_MCIO1_VAL + str r2, [r1, #MCIO1_OFFSET] ldr r2, [r1, #MCIO1_OFFSET] /* ---------------------------------------------------------------- */ - /* Step 2c: Write FLYCNFG FIXME: what's that??? */ - /* ---------------------------------------------------------------- */ + /* Step 2c: Write FLYCNFG FIXME: what's that??? */ + /* ---------------------------------------------------------------- */ - /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */ + /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */ adr r3, mem_init /* r0 <- current position of code */ ldr r2, =mem_init cmp r3, r2 /* skip init if in place */ @@ -233,8 +233,8 @@ /* ---------------------------------------------------------------- */ - /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ - /* ---------------------------------------------------------------- */ + /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ + /* ---------------------------------------------------------------- */ /* Before accessing MDREFR we need a valid DRI field, so we set */ /* this to power on defaults + DRI field. */ @@ -246,7 +246,7 @@ orr r4, r4, r3 str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + ldr r4, [r1, #MDREFR_OFFSET] /* ---------------------------------------------------------------- */ @@ -262,9 +262,9 @@ /* FIXME: we use async mode for now */ - /* ---------------------------------------------------------------- */ - /* Step 4: Initialize SDRAM */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ + /* Step 4: Initialize SDRAM */ + /* ---------------------------------------------------------------- */ /* Step 4a: assert MDREFR:K?RUN and configure */ /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */ @@ -277,16 +277,16 @@ bic r4, r4, #(MDREFR_SLFRSH) - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4c: assert MDREFR:E1PIN and E0PIO */ orr r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN) - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */ @@ -295,8 +295,8 @@ ldr r4, =CFG_MDCNFG_VAL bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1) - str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ - ldr r4, [r1, #MDCNFG_OFFSET] + str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ + ldr r4, [r1, #MDCNFG_OFFSET] /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */ @@ -345,8 +345,8 @@ /* Step 4h: Write MDMRS. */ - ldr r2, =CFG_MDMRS_VAL - str r2, [r1, #MDMRS_OFFSET] + ldr r2, =CFG_MDMRS_VAL + str r2, [r1, #MDMRS_OFFSET] /* We are finished with Intel's memory controller initialisation */ @@ -357,17 +357,17 @@ initirqs: - mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ - ldr r2, =ICLR - str r1, [r2] + mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ + ldr r2, =ICLR + str r1, [r2] - ldr r2, =ICMR /* mask all interrupts at the controller */ - str r1, [r2] + ldr r2, =ICMR /* mask all interrupts at the controller */ + str r1, [r2] - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* Clock initialisation */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ initclks: @@ -376,34 +376,34 @@ /* Turn Off ALL on-chip peripheral clocks for re-configuration */ /* Note: See label 'ENABLECLKS' for the re-enabling */ - ldr r1, =CKEN - mov r2, #0 - str r2, [r1] + ldr r1, =CKEN + mov r2, #0 + str r2, [r1] - /* default value in case no valid rotary switch setting is found */ - ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ + /* default value in case no valid rotary switch setting is found */ + ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ - /* ... and write the core clock config register */ - ldr r1, =CCCR - str r2, [r1] + /* ... and write the core clock config register */ + ldr r1, =CCCR + str r2, [r1] /* enable the 32Khz oscillator for RTC and PowerManager */ /* - ldr r1, =OSCC - mov r2, #OSCC_OON - str r2, [r1] + ldr r1, =OSCC + mov r2, #OSCC_OON + str r2, [r1] */ /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ /* has settled. */ 60: - ldr r2, [r1] - ands r2, r2, #1 - beq 60b + ldr r2, [r1] + ands r2, r2, #1 + beq 60b /* ---------------------------------------------------------------- */ /* */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* Save SDRAM size */ ldr r1, =DRAM_SIZE @@ -428,11 +428,10 @@ mcr p14,0,r0,c10,c0,0 /* dcsr */ #endif - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* End memsetup */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ endmemsetup: mov pc, lr - diff --git a/board/innokom/u-boot.lds b/board/innokom/u-boot.lds index 46beb15..1130013 100644 --- a/board/innokom/u-boot.lds +++ b/board/innokom/u-boot.lds @@ -26,29 +26,33 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/pxa/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); + . = ALIGN(4); bss_start = .; - .bss : { *(.bss) } + .bss : { *(.bss) } bss_end = .; armboot_end = .; diff --git a/board/ip860/Makefile b/board/ip860/Makefile index ef173d0..13ce9fc 100644 --- a/board/ip860/Makefile +++ b/board/ip860/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/ip860/u-boot.lds b/board/ip860/u-boot.lds index 7bc74f3..d196731 100644 --- a/board/ip860/u-boot.lds +++ b/board/ip860/u-boot.lds @@ -109,6 +109,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/ip860/u-boot.lds.debug b/board/ip860/u-boot.lds.debug index cb36ad3..b4d6579 100644 --- a/board/ip860/u-boot.lds.debug +++ b/board/ip860/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -129,4 +134,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/iphase4539/Makefile b/board/iphase4539/Makefile index 5fcce6f..19da5d0 100644 --- a/board/iphase4539/Makefile +++ b/board/iphase4539/Makefile @@ -27,7 +27,7 @@ OBJS := $(BOARD).o flash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/iphase4539/u-boot.lds b/board/iphase4539/u-boot.lds index 5d78d4a..61fb15c 100644 --- a/board/iphase4539/u-boot.lds +++ b/board/iphase4539/u-boot.lds @@ -93,6 +93,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -115,4 +120,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/ivm/Makefile b/board/ivm/Makefile index ef173d0..13ce9fc 100644 --- a/board/ivm/Makefile +++ b/board/ivm/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/ivm/ivm.c b/board/ivm/ivm.c index 117dbe6..73a3987 100644 --- a/board/ivm/ivm.c +++ b/board/ivm/ivm.c @@ -48,7 +48,7 @@ */ 0x0FF3FC04, 0x0FF3EC00, 0x7FFFEC04, 0xFFFFEC04, 0xFFFFEC05, /* last */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, /* * Burst Read. (Offset 8 in UPM RAM) */ @@ -62,7 +62,7 @@ */ 0x0FAFFC04, 0x0FAFEC00, 0x7FFFEC04, 0xFFFFEC04, 0xFFFFEC05, /* last */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, /* * Burst Write. (Offset 20 in UPM RAM) */ @@ -99,9 +99,9 @@ /* * SDRAM Initialization (offset 5 in UPM RAM) * - * This is no UPM entry point. The following definition uses - * the remaining space to establish an initialization - * sequence, which is executed by a RUN command. + * This is no UPM entry point. The following definition uses + * the remaining space to establish an initialization + * sequence, which is executed by a RUN command. * */ 0x1FF77C35, 0xEFEABC34, 0x1FB57C35, /* last */ @@ -324,8 +324,8 @@ udelay(1000); /* - * RESET is implemented by a positive pulse of at least 1 us - * at the reset pin. + * RESET is implemented by a positive pulse of at least 1 us + * at the reset pin. * * Configure RESET pins for NS DP83843 PHY, and RESET chip. * diff --git a/board/ivm/u-boot.lds b/board/ivm/u-boot.lds index d1e121e..ea4fc8f 100644 --- a/board/ivm/u-boot.lds +++ b/board/ivm/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +125,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/ivm/u-boot.lds.debug b/board/ivm/u-boot.lds.debug index e62152a..7b53217 100644 --- a/board/ivm/u-boot.lds.debug +++ b/board/ivm/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -129,4 +134,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/kup4k/Makefile b/board/kup4k/Makefile index c748d35..fdc6fd5 100644 --- a/board/kup4k/Makefile +++ b/board/kup4k/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/kup4k/kup4k.c b/board/kup4k/kup4k.c index 7981df3..3c08214 100644 --- a/board/kup4k/kup4k.c +++ b/board/kup4k/kup4k.c @@ -329,9 +329,6 @@ memctl->memc_br5 = 0x80080801; /* Start at 0x80080000 */ - - - fb_info.VmemAddr = (unsigned char *) (S1D_PHYSICAL_VMEM_ADDR); fb_info.RegAddr = (unsigned char *) (S1D_PHYSICAL_REG_ADDR); diff --git a/board/kup4k/u-boot.lds b/board/kup4k/u-boot.lds index b2d8090..f81a10e 100644 --- a/board/kup4k/u-boot.lds +++ b/board/kup4k/u-boot.lds @@ -112,6 +112,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -134,4 +139,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/kup4k/u-boot.lds.debug b/board/kup4k/u-boot.lds.debug index fdd836e..87f704a 100644 --- a/board/kup4k/u-boot.lds.debug +++ b/board/kup4k/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/lantec/Makefile b/board/lantec/Makefile index 35b8428..7a2014d 100644 --- a/board/lantec/Makefile +++ b/board/lantec/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/lantec/u-boot.lds b/board/lantec/u-boot.lds index ab3beb7..1f8581c 100644 --- a/board/lantec/u-boot.lds +++ b/board/lantec/u-boot.lds @@ -109,6 +109,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -131,4 +136,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/lantec/u-boot.lds.debug b/board/lantec/u-boot.lds.debug index fd3a1c6..c64087d 100644 --- a/board/lantec/u-boot.lds.debug +++ b/board/lantec/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/lart/Makefile b/board/lart/Makefile index 12a0367..42ceb03 100644 --- a/board/lart/Makefile +++ b/board/lart/Makefile @@ -29,7 +29,7 @@ SOBJS := flashasm.o memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/lart/flash.c b/board/lart/flash.c index 89ab62c..ad6134b 100644 --- a/board/lart/flash.c +++ b/board/lart/flash.c @@ -317,7 +317,7 @@ *addr = PUZZLE_TO_FLASH(CMD_READ_ARRAY); if ((rc = flash_error(result)) != ERR_OK) - goto outahere; + goto outahere; printf("ok.\n"); } @@ -358,7 +358,7 @@ */ result = PUZZLE_FROM_FLASH(*addr); if ((result & data) != data) - return ERR_NOT_ERASED; + return ERR_NOT_ERASED; /* * Disable interrupts which might cause a timeout diff --git a/board/lart/memsetup.S b/board/lart/memsetup.S index bebd697..635f2a0 100644 --- a/board/lart/memsetup.S +++ b/board/lart/memsetup.S @@ -24,7 +24,6 @@ */ - #include #include @@ -93,4 +92,3 @@ /* everything is fine now */ mov pc, lr - diff --git a/board/lart/u-boot.lds b/board/lart/u-boot.lds index f4b0ade..b3f34ca 100644 --- a/board/lart/u-boot.lds +++ b/board/lart/u-boot.lds @@ -26,28 +26,32 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/sa1100/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } armboot_end = .; } diff --git a/board/logodl/config.mk b/board/logodl/config.mk index 4166357..76c382d 100644 --- a/board/logodl/config.mk +++ b/board/logodl/config.mk @@ -11,5 +11,5 @@ # FIXME: armboot does only work correctly when being compiled # # for the addresses _after_ relocation to RAM!! Otherwhise the # # .bss segment is assumed in flash... -# +# TEXT_BASE = 0x083E0000 diff --git a/board/logodl/flash.c b/board/logodl/flash.c index 3837401..cef0b4d 100644 --- a/board/logodl/flash.c +++ b/board/logodl/flash.c @@ -82,18 +82,18 @@ flash_info[i].size = FLASH_BANK_SIZE; flash_info[i].sector_count = CFG_MAX_FLASH_SECT; memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); - switch (i) - { - case 0: - flashbase = PHYS_FLASH_1; - break; - case 1: - flashbase = PHYS_FLASH_2; - break; - default: - panic("configured to many flash banks!\n"); - break; - } + switch (i) + { + case 0: + flashbase = PHYS_FLASH_1; + break; + case 1: + flashbase = PHYS_FLASH_2; + break; + default: + panic("configured to many flash banks!\n"); + break; + } for (j = 0; j < flash_info[i].sector_count; j++) { flash_info[i].start[j] = flashbase + j*MAIN_SECT_SIZE; @@ -208,32 +208,32 @@ case FLASH_AM640U: fmt = "29LV641D (64 Mbit, uniform sectors)\n"; break; - case FLASH_28F800C3B: - case FLASH_28F800C3T: + case FLASH_28F800C3B: + case FLASH_28F800C3T: fmt = "28F800C3%s (8 Mbit, %s)\n"; break; case FLASH_INTEL800B: case FLASH_INTEL800T: fmt = "28F800B3%s (8 Mbit, %s)\n"; break; - case FLASH_28F160C3B: - case FLASH_28F160C3T: + case FLASH_28F160C3B: + case FLASH_28F160C3T: fmt = "28F160C3%s (16 Mbit, %s)\n"; break; case FLASH_INTEL160B: case FLASH_INTEL160T: fmt = "28F160B3%s (16 Mbit, %s)\n"; break; - case FLASH_28F320C3B: - case FLASH_28F320C3T: + case FLASH_28F320C3B: + case FLASH_28F320C3T: fmt = "28F320C3%s (32 Mbit, %s)\n"; break; case FLASH_INTEL320B: case FLASH_INTEL320T: fmt = "28F320B3%s (32 Mbit, %s)\n"; break; - case FLASH_28F640C3B: - case FLASH_28F640C3T: + case FLASH_28F640C3B: + case FLASH_28F640C3T: fmt = "28F640C3%s (64 Mbit, %s)\n"; break; case FLASH_INTEL640B: @@ -554,15 +554,15 @@ left > 0 && res == 0; addr += sizeof(data), left -= sizeof(data) - bytes) { - bytes = addr & (sizeof(data) - 1); - addr &= ~(sizeof(data) - 1); + bytes = addr & (sizeof(data) - 1); + addr &= ~(sizeof(data) - 1); /* combine source and destination data so can program * an entire word of 16 or 32 bits */ - for (i = 0; i < sizeof(data); i++) { - data <<= 8; - if (i < bytes || i - bytes >= left ) + for (i = 0; i < sizeof(data); i++) { + data <<= 8; + if (i < bytes || i - bytes >= left ) data += *((uchar *)addr + i); else data += *src++; @@ -662,7 +662,6 @@ } - /*----------------------------------------------------------------------- * Write a word to Flash for AMD FLASH * A word is 16 or 32 bits, whichever the bus width of the flash bank diff --git a/board/logodl/logodl.c b/board/logodl/logodl.c index f16c05b..95634ac 100644 --- a/board/logodl/logodl.c +++ b/board/logodl/logodl.c @@ -62,7 +62,7 @@ gd->bd->bi_dram[0].start = PHYS_SDRAM_1; gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE; - return 0; + return 0; } diff --git a/board/logodl/memsetup.S b/board/logodl/memsetup.S index 60f9d50..68577ca 100644 --- a/board/logodl/memsetup.S +++ b/board/logodl/memsetup.S @@ -159,7 +159,7 @@ mem_init: - ldr r1, =MEMC_BASE /* get memory controller base addr. */ + ldr r1, =MEMC_BASE /* get memory controller base addr. */ /* ---------------------------------------------------------------- */ /* Step 2a: Initialize Asynchronous static memory controller */ @@ -167,65 +167,65 @@ /* MSC registers: timing, bus width, mem type */ - /* MSC0: nCS(0,1) */ - ldr r2, =CFG_MSC0_VAL - str r2, [r1, #MSC0_OFFSET] - ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ + /* MSC0: nCS(0,1) */ + ldr r2, =CFG_MSC0_VAL + str r2, [r1, #MSC0_OFFSET] + ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ /* that data latches */ - /* MSC1: nCS(2,3) */ - ldr r2, =CFG_MSC1_VAL - str r2, [r1, #MSC1_OFFSET] - ldr r2, [r1, #MSC1_OFFSET] + /* MSC1: nCS(2,3) */ + ldr r2, =CFG_MSC1_VAL + str r2, [r1, #MSC1_OFFSET] + ldr r2, [r1, #MSC1_OFFSET] /* MSC2: nCS(4,5) */ - ldr r2, =CFG_MSC2_VAL - str r2, [r1, #MSC2_OFFSET] - ldr r2, [r1, #MSC2_OFFSET] + ldr r2, =CFG_MSC2_VAL + str r2, [r1, #MSC2_OFFSET] + ldr r2, [r1, #MSC2_OFFSET] /* ---------------------------------------------------------------- */ /* Step 2b: Initialize Card Interface */ /* ---------------------------------------------------------------- */ /* MECR: Memory Expansion Card Register */ - ldr r2, =CFG_MECR_VAL - str r2, [r1, #MECR_OFFSET] + ldr r2, =CFG_MECR_VAL + str r2, [r1, #MECR_OFFSET] ldr r2, [r1, #MECR_OFFSET] /* MCMEM0: Card Interface slot 0 timing */ - ldr r2, =CFG_MCMEM0_VAL - str r2, [r1, #MCMEM0_OFFSET] + ldr r2, =CFG_MCMEM0_VAL + str r2, [r1, #MCMEM0_OFFSET] ldr r2, [r1, #MCMEM0_OFFSET] - /* MCMEM1: Card Interface slot 1 timing */ - ldr r2, =CFG_MCMEM1_VAL - str r2, [r1, #MCMEM1_OFFSET] + /* MCMEM1: Card Interface slot 1 timing */ + ldr r2, =CFG_MCMEM1_VAL + str r2, [r1, #MCMEM1_OFFSET] ldr r2, [r1, #MCMEM1_OFFSET] /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ - ldr r2, =CFG_MCATT0_VAL - str r2, [r1, #MCATT0_OFFSET] + ldr r2, =CFG_MCATT0_VAL + str r2, [r1, #MCATT0_OFFSET] ldr r2, [r1, #MCATT0_OFFSET] /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ - ldr r2, =CFG_MCATT1_VAL - str r2, [r1, #MCATT1_OFFSET] + ldr r2, =CFG_MCATT1_VAL + str r2, [r1, #MCATT1_OFFSET] ldr r2, [r1, #MCATT1_OFFSET] /* MCIO0: Card Interface I/O Space Timing, slot 0 */ - ldr r2, =CFG_MCIO0_VAL - str r2, [r1, #MCIO0_OFFSET] + ldr r2, =CFG_MCIO0_VAL + str r2, [r1, #MCIO0_OFFSET] ldr r2, [r1, #MCIO0_OFFSET] /* MCIO1: Card Interface I/O Space Timing, slot 1 */ - ldr r2, =CFG_MCIO1_VAL - str r2, [r1, #MCIO1_OFFSET] + ldr r2, =CFG_MCIO1_VAL + str r2, [r1, #MCIO1_OFFSET] ldr r2, [r1, #MCIO1_OFFSET] /* ---------------------------------------------------------------- */ - /* Step 2c: Write FLYCNFG FIXME: what's that??? */ - /* ---------------------------------------------------------------- */ + /* Step 2c: Write FLYCNFG FIXME: what's that??? */ + /* ---------------------------------------------------------------- */ - /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */ + /* test if we run from flash or RAM - RAM/BDI: don't setup RAM */ adr r3, mem_init /* r0 <- current position of code */ ldr r2, =mem_init cmp r3, r2 /* skip init if in place */ @@ -233,8 +233,8 @@ /* ---------------------------------------------------------------- */ - /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ - /* ---------------------------------------------------------------- */ + /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ + /* ---------------------------------------------------------------- */ /* Before accessing MDREFR we need a valid DRI field, so we set */ /* this to power on defaults + DRI field. */ @@ -246,7 +246,7 @@ orr r4, r4, r3 str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + ldr r4, [r1, #MDREFR_OFFSET] /* ---------------------------------------------------------------- */ @@ -262,9 +262,9 @@ /* FIXME: we use async mode for now */ - /* ---------------------------------------------------------------- */ - /* Step 4: Initialize SDRAM */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ + /* Step 4: Initialize SDRAM */ + /* ---------------------------------------------------------------- */ /* Step 4a: assert MDREFR:K?RUN and configure */ /* MDREFR:K1DB2 and MDREFR:K2DB2 as desired. */ @@ -277,16 +277,16 @@ bic r4, r4, #(MDREFR_SLFRSH) - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4c: assert MDREFR:E1PIN and E0PIO */ orr r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN) - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */ @@ -295,8 +295,8 @@ ldr r4, =CFG_MDCNFG_VAL bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1) - str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ - ldr r4, [r1, #MDCNFG_OFFSET] + str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ + ldr r4, [r1, #MDCNFG_OFFSET] /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */ @@ -345,8 +345,8 @@ /* Step 4h: Write MDMRS. */ - ldr r2, =CFG_MDMRS_VAL - str r2, [r1, #MDMRS_OFFSET] + ldr r2, =CFG_MDMRS_VAL + str r2, [r1, #MDMRS_OFFSET] /* We are finished with Intel's memory controller initialisation */ @@ -357,17 +357,17 @@ initirqs: - mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ - ldr r2, =ICLR - str r1, [r2] + mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ + ldr r2, =ICLR + str r1, [r2] - ldr r2, =ICMR /* mask all interrupts at the controller */ - str r1, [r2] + ldr r2, =ICMR /* mask all interrupts at the controller */ + str r1, [r2] - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* Clock initialisation */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ initclks: @@ -376,34 +376,34 @@ /* Turn Off ALL on-chip peripheral clocks for re-configuration */ /* Note: See label 'ENABLECLKS' for the re-enabling */ - ldr r1, =CKEN - mov r2, #0 - str r2, [r1] + ldr r1, =CKEN + mov r2, #0 + str r2, [r1] - /* default value in case no valid rotary switch setting is found */ - ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ + /* default value in case no valid rotary switch setting is found */ + ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ - /* ... and write the core clock config register */ - ldr r1, =CCCR - str r2, [r1] + /* ... and write the core clock config register */ + ldr r1, =CCCR + str r2, [r1] /* enable the 32Khz oscillator for RTC and PowerManager */ /* - ldr r1, =OSCC - mov r2, #OSCC_OON - str r2, [r1] + ldr r1, =OSCC + mov r2, #OSCC_OON + str r2, [r1] */ /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ /* has settled. */ 60: - ldr r2, [r1] - ands r2, r2, #1 - beq 60b + ldr r2, [r1] + ands r2, r2, #1 + beq 60b /* ---------------------------------------------------------------- */ /* */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* Save SDRAM size */ ldr r1, =DRAM_SIZE @@ -428,11 +428,10 @@ mcr p14,0,r0,c10,c0,0 /* dcsr */ #endif - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* End memsetup */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ endmemsetup: mov pc, lr - diff --git a/board/logodl/u-boot.lds b/board/logodl/u-boot.lds index 46beb15..5aef127 100644 --- a/board/logodl/u-boot.lds +++ b/board/logodl/u-boot.lds @@ -26,29 +26,29 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/pxa/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } armboot_end_data = .; - . = ALIGN(4); + . = ALIGN(4); bss_start = .; - .bss : { *(.bss) } + .bss : { *(.bss) } bss_end = .; armboot_end = .; diff --git a/board/lubbock/Makefile b/board/lubbock/Makefile index 6ddd72e..0e29e7b 100644 --- a/board/lubbock/Makefile +++ b/board/lubbock/Makefile @@ -1,3 +1,4 @@ + # # (C) Copyright 2000 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -29,7 +30,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/lubbock/config.mk b/board/lubbock/config.mk index 0ffe1ba..d2a2040 100644 --- a/board/lubbock/config.mk +++ b/board/lubbock/config.mk @@ -1,4 +1,3 @@ #TEXT_BASE = 0xa1700000 TEXT_BASE = 0xa3000000 #TEXT_BASE = 0 - diff --git a/board/lubbock/memsetup.S b/board/lubbock/memsetup.S index 5bbd859..dc0b7be 100644 --- a/board/lubbock/memsetup.S +++ b/board/lubbock/memsetup.S @@ -140,7 +140,7 @@ mem_init: - ldr r1, =MEMC_BASE /* get memory controller base addr. */ + ldr r1, =MEMC_BASE /* get memory controller base addr. */ /* ---------------------------------------------------------------- */ /* Step 2a: Initialize Asynchronous static memory controller */ @@ -148,81 +148,81 @@ /* MSC registers: timing, bus width, mem type */ - /* MSC0: nCS(0,1) */ - ldr r2, =CFG_MSC0_VAL - str r2, [r1, #MSC0_OFFSET] - ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ + /* MSC0: nCS(0,1) */ + ldr r2, =CFG_MSC0_VAL + str r2, [r1, #MSC0_OFFSET] + ldr r2, [r1, #MSC0_OFFSET] /* read back to ensure */ /* that data latches */ - /* MSC1: nCS(2,3) */ - ldr r2, =CFG_MSC1_VAL - str r2, [r1, #MSC1_OFFSET] - ldr r2, [r1, #MSC1_OFFSET] + /* MSC1: nCS(2,3) */ + ldr r2, =CFG_MSC1_VAL + str r2, [r1, #MSC1_OFFSET] + ldr r2, [r1, #MSC1_OFFSET] /* MSC2: nCS(4,5) */ - ldr r2, =CFG_MSC2_VAL - str r2, [r1, #MSC2_OFFSET] - ldr r2, [r1, #MSC2_OFFSET] + ldr r2, =CFG_MSC2_VAL + str r2, [r1, #MSC2_OFFSET] + ldr r2, [r1, #MSC2_OFFSET] /* ---------------------------------------------------------------- */ /* Step 2b: Initialize Card Interface */ /* ---------------------------------------------------------------- */ /* MECR: Memory Expansion Card Register */ - ldr r2, =CFG_MECR_VAL - str r2, [r1, #MECR_OFFSET] + ldr r2, =CFG_MECR_VAL + str r2, [r1, #MECR_OFFSET] ldr r2, [r1, #MECR_OFFSET] /* MCMEM0: Card Interface slot 0 timing */ - ldr r2, =CFG_MCMEM0_VAL - str r2, [r1, #MCMEM0_OFFSET] + ldr r2, =CFG_MCMEM0_VAL + str r2, [r1, #MCMEM0_OFFSET] ldr r2, [r1, #MCMEM0_OFFSET] - /* MCMEM1: Card Interface slot 1 timing */ - ldr r2, =CFG_MCMEM1_VAL - str r2, [r1, #MCMEM1_OFFSET] + /* MCMEM1: Card Interface slot 1 timing */ + ldr r2, =CFG_MCMEM1_VAL + str r2, [r1, #MCMEM1_OFFSET] ldr r2, [r1, #MCMEM1_OFFSET] /* MCATT0: Card Interface Attribute Space Timing, slot 0 */ - ldr r2, =CFG_MCATT0_VAL - str r2, [r1, #MCATT0_OFFSET] + ldr r2, =CFG_MCATT0_VAL + str r2, [r1, #MCATT0_OFFSET] ldr r2, [r1, #MCATT0_OFFSET] /* MCATT1: Card Interface Attribute Space Timing, slot 1 */ - ldr r2, =CFG_MCATT1_VAL - str r2, [r1, #MCATT1_OFFSET] + ldr r2, =CFG_MCATT1_VAL + str r2, [r1, #MCATT1_OFFSET] ldr r2, [r1, #MCATT1_OFFSET] /* MCIO0: Card Interface I/O Space Timing, slot 0 */ - ldr r2, =CFG_MCIO0_VAL - str r2, [r1, #MCIO0_OFFSET] + ldr r2, =CFG_MCIO0_VAL + str r2, [r1, #MCIO0_OFFSET] ldr r2, [r1, #MCIO0_OFFSET] /* MCIO1: Card Interface I/O Space Timing, slot 1 */ - ldr r2, =CFG_MCIO1_VAL - str r2, [r1, #MCIO1_OFFSET] + ldr r2, =CFG_MCIO1_VAL + str r2, [r1, #MCIO1_OFFSET] ldr r2, [r1, #MCIO1_OFFSET] /* ---------------------------------------------------------------- */ - /* Step 2c: Write FLYCNFG FIXME: what's that??? */ - /* ---------------------------------------------------------------- */ + /* Step 2c: Write FLYCNFG FIXME: what's that??? */ + /* ---------------------------------------------------------------- */ /* ---------------------------------------------------------------- */ - /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ - /* ---------------------------------------------------------------- */ + /* Step 2d: Initialize Timing for Sync Memory (SDCLK0) */ + /* ---------------------------------------------------------------- */ /* Before accessing MDREFR we need a valid DRI field, so we set */ /* this to power on defaults + DRI field. */ - ldr r3, =CFG_MDREFR_VAL - ldr r2, =0xFFF - and r3, r3, r2 + ldr r3, =CFG_MDREFR_VAL + ldr r2, =0xFFF + and r3, r3, r2 ldr r4, =0x03ca4000 - orr r4, r4, r3 + orr r4, r4, r3 str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + ldr r4, [r1, #MDREFR_OFFSET] - /* Note: preserve the mdrefr value in r4 */ + /* Note: preserve the mdrefr value in r4 */ /* ---------------------------------------------------------------- */ @@ -238,30 +238,30 @@ /* FIXME: we use async mode for now */ - /* ---------------------------------------------------------------- */ - /* Step 4: Initialize SDRAM */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ + /* Step 4: Initialize SDRAM */ + /* ---------------------------------------------------------------- */ - /* set MDREFR according to user define with exception of a few bits */ + /* set MDREFR according to user define with exception of a few bits */ - ldr r4, =CFG_MDREFR_VAL + ldr r4, =CFG_MDREFR_VAL orr r4, r4, #(MDREFR_SLFRSH) bic r4, r4, #(MDREFR_E1PIN|MDREFR_E0PIN) str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4b: de-assert MDREFR:SLFRSH. */ bic r4, r4, #(MDREFR_SLFRSH) - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4c: assert MDREFR:E1PIN and E0PIO as desired */ - ldr r4, =CFG_MDREFR_VAL - str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ - ldr r4, [r1, #MDREFR_OFFSET] + ldr r4, =CFG_MDREFR_VAL + str r4, [r1, #MDREFR_OFFSET] /* write back MDREFR */ + ldr r4, [r1, #MDREFR_OFFSET] /* Step 4d: write MDCNFG with MDCNFG:DEx deasserted (set to 0), to */ @@ -270,15 +270,15 @@ ldr r4, =CFG_MDCNFG_VAL bic r4, r4, #(MDCNFG_DE0|MDCNFG_DE1) - str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ - ldr r4, [r1, #MDCNFG_OFFSET] + str r4, [r1, #MDCNFG_OFFSET] /* write back MDCNFG */ + ldr r4, [r1, #MDCNFG_OFFSET] /* Step 4e: Wait for the clock to the SDRAMs to stabilize, */ /* 100..200 �sec. */ ldr r3, =OSCR /* reset the OS Timer Count to zero */ - mov r2, #0 + mov r2, #0 str r2, [r3] ldr r4, =0x300 /* really 0x2E1 is about 200usec, */ /* so 0x300 should be plenty */ @@ -308,14 +308,14 @@ /* Step 4g: Write MDCNFG with enable bits asserted */ /* (MDCNFG:DEx set to 1). */ - ldr r3, [r1, #MDCNFG_OFFSET] + ldr r3, [r1, #MDCNFG_OFFSET] orr r3, r3, #(MDCNFG_DE0|MDCNFG_DE1) - str r3, [r1, #MDCNFG_OFFSET] + str r3, [r1, #MDCNFG_OFFSET] /* Step 4h: Write MDMRS. */ - ldr r2, =CFG_MDMRS_VAL - str r2, [r1, #MDMRS_OFFSET] + ldr r2, =CFG_MDMRS_VAL + str r2, [r1, #MDMRS_OFFSET] /* We are finished with Intel's memory controller initialisation */ @@ -327,17 +327,17 @@ initirqs: - mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ - ldr r2, =ICLR - str r1, [r2] + mov r1, #0 /* clear int. level register (IRQ, not FIQ) */ + ldr r2, =ICLR + str r1, [r2] - ldr r2, =ICMR /* mask all interrupts at the controller */ - str r1, [r2] + ldr r2, =ICMR /* mask all interrupts at the controller */ + str r1, [r2] - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* Clock initialisation */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ initclks: @@ -346,36 +346,36 @@ /* Turn Off ALL on-chip peripheral clocks for re-configuration */ /* Note: See label 'ENABLECLKS' for the re-enabling */ - ldr r1, =CKEN - mov r2, #0 - str r2, [r1] + ldr r1, =CKEN + mov r2, #0 + str r2, [r1] - /* default value in case no valid rotary switch setting is found */ - ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ + /* default value in case no valid rotary switch setting is found */ + ldr r2, =(CCCR_L27|CCCR_M2|CCCR_N10) /* DEFAULT: {200/200/100} */ - /* ... and write the core clock config register */ - ldr r1, =CCCR - str r2, [r1] + /* ... and write the core clock config register */ + ldr r1, =CCCR + str r2, [r1] #ifdef RTC /* enable the 32Khz oscillator for RTC and PowerManager */ - ldr r1, =OSCC - mov r2, #OSCC_OON - str r2, [r1] + ldr r1, =OSCC + mov r2, #OSCC_OON + str r2, [r1] /* NOTE: spin here until OSCC.OOK get set, meaning the PLL */ /* has settled. */ 60: - ldr r2, [r1] - ands r2, r2, #1 - beq 60b + ldr r2, [r1] + ands r2, r2, #1 + beq 60b #endif /* ---------------------------------------------------------------- */ /* */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* Save SDRAM size */ ldr r1, =DRAM_SIZE @@ -402,11 +402,10 @@ #endif - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ /* End memsetup */ - /* ---------------------------------------------------------------- */ + /* ---------------------------------------------------------------- */ endmemsetup: mov pc, lr - diff --git a/board/lubbock/u-boot.lds b/board/lubbock/u-boot.lds index 46beb15..4c4cabf 100644 --- a/board/lubbock/u-boot.lds +++ b/board/lubbock/u-boot.lds @@ -26,29 +26,33 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/pxa/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); + . = ALIGN(4); bss_start = .; - .bss : { *(.bss) } + .bss : { *(.bss) } bss_end = .; armboot_end = .; diff --git a/board/lwmon/Makefile b/board/lwmon/Makefile index 35b8428..7a2014d 100644 --- a/board/lwmon/Makefile +++ b/board/lwmon/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/lwmon/README.keybd b/board/lwmon/README.keybd index bf759c6..788c864 100644 --- a/board/lwmon/README.keybd +++ b/board/lwmon/README.keybd @@ -15,7 +15,6 @@ einer Applikation ausgewertet werden. - Sonderfunktionen beim Booten: Es lassen sich eine oder mehrere (beliebig viele) Tasten oder Tasten- diff --git a/board/lwmon/lwmon.c b/board/lwmon/lwmon.c index d5a637f..b359ec7 100644 --- a/board/lwmon/lwmon.c +++ b/board/lwmon/lwmon.c @@ -38,7 +38,6 @@ #include #include #include -#include #include #include @@ -73,9 +72,9 @@ /* * SDRAM Initialization (offset 5 in UPM RAM) * - * This is no UPM entry point. The following definition uses - * the remaining space to establish an initialization - * sequence, which is executed by a RUN command. + * This is no UPM entry point. The following definition uses + * the remaining space to establish an initialization + * sequence, which is executed by a RUN command. * */ 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */ @@ -121,9 +120,9 @@ /* * SDRAM Initialization (offset 5 in UPM RAM) * - * This is no UPM entry point. The following definition uses - * the remaining space to establish an initialization - * sequence, which is executed by a RUN command. + * This is no UPM entry point. The following definition uses + * the remaining space to establish an initialization + * sequence, which is executed by a RUN command. * */ 0x1FF5FC34, 0xEFEABC34, 0x1FB57C35, /* last */ @@ -132,7 +131,7 @@ */ 0x0E2DBC04, 0x10AF7C04, 0xF0AFFC00, 0xF0AFFC00, 0xF1AFFC00, 0xEFBAFC00, 0x1FF5FC47, /* last */ - _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, /* @@ -146,7 +145,7 @@ */ 0x0E29BC04, 0x10A77C00, 0xF0AFFC00, 0xF0AFFC00, 0xE1BAFC04, 0x1FF5FC47, /* last */ - _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, /* @@ -511,7 +510,7 @@ int i; i2c_init (CFG_I2C_SPEED, CFG_I2C_SLAVE); - + gd->kbd_status = 0; /* Read initial keyboard error code */ @@ -543,13 +542,13 @@ /* * Read current keyboard state. * - * After the error reset it may take some time before the - * keyboard PIC picks up a valid keyboard scan - the total - * scan time is approx. 1.6 ms (information by Martin Rajek, - * 28 Sep 2002). We read a couple of times for the keyboard - * to stabilize, using a big enough delay. - * 10 times should be enough. If the data is still changing, - * we use what we get :-( + * After the error reset it may take some time before the + * keyboard PIC picks up a valid keyboard scan - the total + * scan time is approx. 1.6 ms (information by Martin Rajek, + * 28 Sep 2002). We read a couple of times for the keyboard + * to stabilize, using a big enough delay. + * 10 times should be enough. If the data is still changing, + * we use what we get :-( */ memset (tmp_data, 0xFF, KEYBD_DATALEN); /* impossible value */ @@ -849,6 +848,12 @@ printf ("Usage:\n%s\n", cmdtp->usage); return 1; } +cmd_tbl_t U_BOOT_CMD(pic) = MK_CMD_ENTRY( + "pic", 4, 1, do_pic, + "pic - read and write PIC registers\n", + "read reg - read PIC register `reg'\n" + "pic write reg val - write value `val' to PIC register `reg'\n" +); /*********************************************************************** F* Function: int do_kbd (cmd_tbl_t *cmdtp, int flag, @@ -902,6 +907,12 @@ return 0; } +cmd_tbl_t U_BOOT_CMD(kdb) = MK_CMD_ENTRY( + "kbd", 1, 1, do_kbd, + "kbd - read keyboard status\n", + NULL +); + /* Read and set LSB switch */ #define CFG_PC_TXD1_ENA 0x0008 /* PC.12 */ @@ -968,6 +979,14 @@ return 1; } +cmd_tbl_t U_BOOT_CMD(lsb) = MK_CMD_ENTRY( + "lsb", 2, 1, do_lsb, + "lsb - check and set LSB switch\n", + "on - switch LSB on\n" + "lsb off - switch LSB off\n" + "lsb - print current setting\n" +); + #endif /* CFG_CMD_BSP */ /*----------------------------- Utilities -----------------------------*/ diff --git a/board/lwmon/u-boot.lds b/board/lwmon/u-boot.lds index 3764878..fffa79e 100644 --- a/board/lwmon/u-boot.lds +++ b/board/lwmon/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +125,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/lwmon/u-boot.lds.debug b/board/lwmon/u-boot.lds.debug index 9183016..153286b 100644 --- a/board/lwmon/u-boot.lds.debug +++ b/board/lwmon/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -129,4 +134,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mbx8xx/Makefile b/board/mbx8xx/Makefile index f8fb581..3e8376c 100644 --- a/board/mbx8xx/Makefile +++ b/board/mbx8xx/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o vpd.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/mbx8xx/u-boot.lds b/board/mbx8xx/u-boot.lds index 6371110..c1ee544 100644 --- a/board/mbx8xx/u-boot.lds +++ b/board/mbx8xx/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +125,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mbx8xx/u-boot.lds.debug b/board/mbx8xx/u-boot.lds.debug index bd13b7b..0245f78 100644 --- a/board/mbx8xx/u-boot.lds.debug +++ b/board/mbx8xx/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -129,4 +134,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/ml2/Makefile b/board/ml2/Makefile index dd93ded..40c60b1 100644 --- a/board/ml2/Makefile +++ b/board/ml2/Makefile @@ -29,7 +29,7 @@ SOBJS = init.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/ml2/flash.c b/board/ml2/flash.c index 77e0931..090725d 100644 --- a/board/ml2/flash.c +++ b/board/ml2/flash.c @@ -298,4 +298,3 @@ return write_word(info, wp, data); } - diff --git a/board/ml2/init.S b/board/ml2/init.S index 2386c2a..80f98c5 100644 --- a/board/ml2/init.S +++ b/board/ml2/init.S @@ -25,10 +25,10 @@ #include - .globl ext_bus_cntlr_init + .globl ext_bus_cntlr_init ext_bus_cntlr_init: - blr + blr - .globl sdram_init + .globl sdram_init sdram_init: - blr + blr diff --git a/board/ml2/ml2.c b/board/ml2/ml2.c index a89a8f9..6cc1bec 100644 --- a/board/ml2/ml2.c +++ b/board/ml2/ml2.c @@ -22,7 +22,6 @@ #include - int board_pre_init (void) { return 0; diff --git a/board/ml2/serial.c b/board/ml2/serial.c index dc9a8ea..92baba9 100644 --- a/board/ml2/serial.c +++ b/board/ml2/serial.c @@ -35,7 +35,7 @@ #if (defined CFG_INIT_CHAN1) || (defined CFG_INIT_CHAN2) const NS16550_t COM_PORTS[] = { (NS16550_t) CFG_NS16550_COM1, - (NS16550_t) CFG_NS16550_COM2 }; + (NS16550_t) CFG_NS16550_COM2 }; #endif int @@ -59,7 +59,7 @@ serial_putc(const char c) { if (c == '\n') - NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r'); + NS16550_putc(COM_PORTS[CFG_DUART_CHAN], '\r'); NS16550_putc(COM_PORTS[CFG_DUART_CHAN], c); } diff --git a/board/ml2/u-boot.lds b/board/ml2/u-boot.lds index 9685f89..07275d3 100644 --- a/board/ml2/u-boot.lds +++ b/board/ml2/u-boot.lds @@ -116,6 +116,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/ml2/u-boot.lds.debug b/board/ml2/u-boot.lds.debug index f4f9743..d483424 100644 --- a/board/ml2/u-boot.lds.debug +++ b/board/ml2/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mousse/Makefile b/board/mousse/Makefile index 6d9df89..ddc5546 100644 --- a/board/mousse/Makefile +++ b/board/mousse/Makefile @@ -1,3 +1,4 @@ + # # (C) Copyright 2001 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -28,7 +29,7 @@ OBJS = $(BOARD).o m48t59y.o pci.o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/mousse/README b/board/mousse/README index ef072bd..61aacce 100644 --- a/board/mousse/README +++ b/board/mousse/README @@ -20,7 +20,6 @@ U-Boot Loading... - U-Boot 1.0.5 (Sep 10 2001 - 00:22:25) CPU: MPC8240 Revision 1.1 at 198 MHz: 16 kB I-Cache 16 kB D-Cache @@ -70,7 +69,6 @@ type "saveenv" to write to NVRAM. - II. To boot from a hard drive: setenv root /dev/hda1 @@ -174,7 +172,6 @@ cp.b 100000 FFF80000 \$(filesize)\ - C. FLASH KERNEL REGION (960KB) FLASH support is provided for the 960KB onboard FLASH1 segment. @@ -215,7 +212,6 @@ => - When finished, use the command: bootm ffe10000 diff --git a/board/mousse/flash.c b/board/mousse/flash.c index 3c4a802..2c32b8f 100644 --- a/board/mousse/flash.c +++ b/board/mousse/flash.c @@ -120,140 +120,141 @@ #define FLASH0_READ(dev, addr) \ (*FLASH0_ADDR(dev, addr)) -PRIVATE int flashCheck(flash_dev_t *dev) +PRIVATE int flashCheck (flash_dev_t * dev) { - if (! flashLibInited) { - printf("flashCheck: flashLib not initialized\n"); - return ERROR; - } - - if (dev < &flashDev[0] || dev >= &flashDev[flashDevCount]) { - printf("flashCheck: Bad dev parameter\n"); - return ERROR; - } - - if (! dev->found) { - printf("flashCheck: Device %d not available\n", DEV_NO(dev)); - return ERROR; - } - - return OK; -} - -PRIVATE void flashReset(flash_dev_t *dev) -{ - PRINTF("flashReset: dev=%d\n", DEV_NO(dev)); - - if (dev->bank == FLASH0_BANK) { - FLASH0_WRITE(dev, 0x555, 0xaa); - FLASH0_WRITE(dev, 0xaaa, 0x55); - FLASH0_WRITE(dev, 0x555, 0xf0); - } - - udelay(SLEEP_DELAY); - - PRINTF("flashReset: done\n"); -} - -PRIVATE int flashProbe(flash_dev_t *dev) -{ - int rv, deviceID, vendorID; - - PRINTF("flashProbe: dev=%d\n", DEV_NO(dev)); - - if (dev->bank != FLASH0_BANK) { - rv = ERROR; - goto DONE; - } - - FLASH0_WRITE(dev, 0xaaa, 0xaa); - FLASH0_WRITE(dev, 0x555, 0x55); - FLASH0_WRITE(dev, 0xaaa, 0x90); - - udelay(SLEEP_DELAY); - - vendorID = FLASH0_READ(dev, 0); - deviceID = FLASH0_READ(dev, 2); - - FLASH0_WRITE(dev, 0, 0xf0); - - PRINTF("flashProbe: vendor=0x%x device=0x%x\n", vendorID, deviceID); - - if (vendorID == dev->vendorID && deviceID == dev->deviceID) - rv = OK; - else - rv = ERROR; - -DONE: - PRINTF("flashProbe: rv=%d\n", rv); - - return rv; -} - -PRIVATE int flashWait(flash_dev_t *dev, int addr, int expect, int erase) -{ - int rv = ERROR; - int i, data; - int polls; -#if 0 - PRINTF("flashWait: dev=%d addr=0x%x expect=0x%x erase=%d\n", - DEV_NO(dev), addr, expect, erase); -#endif - - if (dev->bank != FLASH0_BANK) { - rv = ERROR; - goto done; - } - - if (erase) - polls = FLASH_ERASE_SECTOR_TIMEOUT; /* Ticks */ - else - polls = FLASH_PROGRAM_POLLS; /* Loops */ - - for (i = 0; i < polls; i++) { - if (erase) - udelay(SLEEP_DELAY); - - data = FLASH0_READ(dev, addr); - - if (((data ^ expect) & 0x80) == 0) { - rv = OK; - goto done; + if (!flashLibInited) { + printf ("flashCheck: flashLib not initialized\n"); + return ERROR; } - if (data & 0x20) { - /* - * If the 0x20 bit has come on, it could actually be because - * the operation succeeded, so check the done bit again. - */ + if (dev < &flashDev[0] || dev >= &flashDev[flashDevCount]) { + printf ("flashCheck: Bad dev parameter\n"); + return ERROR; + } - data = FLASH0_READ(dev, addr); + if (!dev->found) { + printf ("flashCheck: Device %d not available\n", DEV_NO (dev)); + return ERROR; + } - if (((data ^ expect) & 0x80) == 0) { + return OK; +} + +PRIVATE void flashReset (flash_dev_t * dev) +{ + PRINTF ("flashReset: dev=%d\n", DEV_NO (dev)); + + if (dev->bank == FLASH0_BANK) { + FLASH0_WRITE (dev, 0x555, 0xaa); + FLASH0_WRITE (dev, 0xaaa, 0x55); + FLASH0_WRITE (dev, 0x555, 0xf0); + } + + udelay (SLEEP_DELAY); + + PRINTF ("flashReset: done\n"); +} + +PRIVATE int flashProbe (flash_dev_t * dev) +{ + int rv, deviceID, vendorID; + + PRINTF ("flashProbe: dev=%d\n", DEV_NO (dev)); + + if (dev->bank != FLASH0_BANK) { + rv = ERROR; + goto DONE; + } + + FLASH0_WRITE (dev, 0xaaa, 0xaa); + FLASH0_WRITE (dev, 0x555, 0x55); + FLASH0_WRITE (dev, 0xaaa, 0x90); + + udelay (SLEEP_DELAY); + + vendorID = FLASH0_READ (dev, 0); + deviceID = FLASH0_READ (dev, 2); + + FLASH0_WRITE (dev, 0, 0xf0); + + PRINTF ("flashProbe: vendor=0x%x device=0x%x\n", vendorID, deviceID); + + if (vendorID == dev->vendorID && deviceID == dev->deviceID) rv = OK; - goto done; - } + else + rv = ERROR; - printf("flashWait: Program error (dev: %d, addr: 0x%x)\n", - DEV_NO(dev), addr); + DONE: + PRINTF ("flashProbe: rv=%d\n", rv); - flashReset(dev); - rv = ERROR; - goto done; - } - } + return rv; +} - printf("flashWait: Timeout %s (dev: %d, addr: 0x%x)\n", - erase ? "erasing sector" : "programming byte", - DEV_NO(dev), addr); - -done: +PRIVATE int flashWait (flash_dev_t * dev, int addr, int expect, int erase) +{ + int rv = ERROR; + int i, data; + int polls; #if 0 - PRINTF("flashWait: rv=%d\n", rv); + PRINTF ("flashWait: dev=%d addr=0x%x expect=0x%x erase=%d\n", + DEV_NO (dev), addr, expect, erase); #endif - return rv; + if (dev->bank != FLASH0_BANK) { + rv = ERROR; + goto done; + } + + if (erase) + polls = FLASH_ERASE_SECTOR_TIMEOUT; /* Ticks */ + else + polls = FLASH_PROGRAM_POLLS; /* Loops */ + + for (i = 0; i < polls; i++) { + if (erase) + udelay (SLEEP_DELAY); + + data = FLASH0_READ (dev, addr); + + if (((data ^ expect) & 0x80) == 0) { + rv = OK; + goto done; + } + + if (data & 0x20) { + /* + * If the 0x20 bit has come on, it could actually be because + * the operation succeeded, so check the done bit again. + */ + + data = FLASH0_READ (dev, addr); + + if (((data ^ expect) & 0x80) == 0) { + rv = OK; + goto done; + } + + printf ("flashWait: Program error (dev: %d, addr: 0x%x)\n", + DEV_NO (dev), addr); + + flashReset (dev); + rv = ERROR; + goto done; + } + } + + printf ("flashWait: Timeout %s (dev: %d, addr: 0x%x)\n", + erase ? "erasing sector" : "programming byte", + DEV_NO (dev), addr); + + done: + +#if 0 + PRINTF ("flashWait: rv=%d\n", rv); +#endif + + return rv; } /*********************************************************************** @@ -262,77 +263,78 @@ * ***********************************************************************/ -STATUS flashLibInit(void) +STATUS flashLibInit (void) { - int i; + int i; - PRINTF("flashLibInit: devices=%d\n", flashDevCount); + PRINTF ("flashLibInit: devices=%d\n", flashDevCount); - for (i = 0; i < flashDevCount; i++) { - flash_dev_t *dev = &flashDev[i]; - /* - * For bank 1, probe both without and with byte swappage, - * so that this module works on both old and new Mousse boards. - */ + for (i = 0; i < flashDevCount; i++) { + flash_dev_t *dev = &flashDev[i]; - flashReset(dev); + /* + * For bank 1, probe both without and with byte swappage, + * so that this module works on both old and new Mousse boards. + */ - if (flashProbe(dev) != ERROR) - dev->found = 1; + flashReset (dev); - flashReset(dev); + if (flashProbe (dev) != ERROR) + dev->found = 1; - if (flashProbe(dev) != ERROR) - dev->found = 1; + flashReset (dev); - dev->swap = 0; + if (flashProbe (dev) != ERROR) + dev->found = 1; - if(dev->found){ - PRINTF("\n FLASH %s[%d]: iobase=0x%x - %d sectors %d KB", - flashDev[i].name,i,flashDev[i].base, flashDev[i].sectors, - (flashDev[i].sectors * FLASH_SECTOR_SIZE)/1024); + dev->swap = 0; - } - } + if (dev->found) { + PRINTF ("\n FLASH %s[%d]: iobase=0x%x - %d sectors %d KB", + flashDev[i].name, i, flashDev[i].base, + flashDev[i].sectors, + (flashDev[i].sectors * FLASH_SECTOR_SIZE) / 1024); - flashLibInited = 1; + } + } - PRINTF("flashLibInit: done\n"); + flashLibInited = 1; - return OK; + PRINTF ("flashLibInit: done\n"); + + return OK; } -STATUS flashEraseSector(flash_dev_t *dev, int sector) +STATUS flashEraseSector (flash_dev_t * dev, int sector) { - int pos, addr; + int pos, addr; - PRINTF("flashErasesector: dev=%d sector=%d\n", DEV_NO(dev), sector); + PRINTF ("flashErasesector: dev=%d sector=%d\n", DEV_NO (dev), sector); - if (flashCheck(dev) == ERROR) - return ERROR; + if (flashCheck (dev) == ERROR) + return ERROR; - if (sector < 0 || sector >= dev->sectors) { - printf("flashEraseSector: Sector out of range (dev: %d, sector: %d)\n", - DEV_NO(dev), sector); - return ERROR; - } + if (sector < 0 || sector >= dev->sectors) { + printf ("flashEraseSector: Sector out of range (dev: %d, sector: %d)\n", DEV_NO (dev), sector); + return ERROR; + } - pos = FLASH_SECTOR_POS(dev, sector); + pos = FLASH_SECTOR_POS (dev, sector); - if (dev->bank != FLASH0_BANK) { - return ERROR; - } + if (dev->bank != FLASH0_BANK) { + return ERROR; + } - addr = pos; + addr = pos; - FLASH0_WRITE(dev, 0xaaa, 0xaa); - FLASH0_WRITE(dev, 0x555, 0x55); - FLASH0_WRITE(dev, 0xaaa, 0x80); - FLASH0_WRITE(dev, 0xaaa, 0xaa); - FLASH0_WRITE(dev, 0x555, 0x55); - FLASH0_WRITE(dev, addr, 0x30); + FLASH0_WRITE (dev, 0xaaa, 0xaa); + FLASH0_WRITE (dev, 0x555, 0x55); + FLASH0_WRITE (dev, 0xaaa, 0x80); + FLASH0_WRITE (dev, 0xaaa, 0xaa); + FLASH0_WRITE (dev, 0x555, 0x55); + FLASH0_WRITE (dev, addr, 0x30); - return flashWait(dev, addr, 0xff, 1); + return flashWait (dev, addr, 0xff, 1); } /* @@ -342,156 +344,156 @@ * they were complete devices, we don't use Chip Erase. */ -STATUS flashErase(flash_dev_t *dev) +STATUS flashErase (flash_dev_t * dev) { - int sector; + int sector; - PRINTF("flashErase: dev=%d sectors=%d\n", DEV_NO(dev), dev->sectors); + PRINTF ("flashErase: dev=%d sectors=%d\n", DEV_NO (dev), dev->sectors); - if (flashCheck(dev) == ERROR) - return ERROR; + if (flashCheck (dev) == ERROR) + return ERROR; - for (sector = 0; sector < dev->sectors; sector++) { - if (flashEraseSector(dev, sector) == ERROR) - return ERROR; - } - return OK; + for (sector = 0; sector < dev->sectors; sector++) { + if (flashEraseSector (dev, sector) == ERROR) + return ERROR; + } + return OK; } /* * Read and write bytes */ -STATUS flashRead(flash_dev_t *dev, int pos, char *buf, int len) +STATUS flashRead (flash_dev_t * dev, int pos, char *buf, int len) { - int addr, words; + int addr, words; - PRINTF("flashRead: dev=%d pos=0x%x buf=0x%x len=0x%x\n", - DEV_NO(dev), pos, (int) buf, len); + PRINTF ("flashRead: dev=%d pos=0x%x buf=0x%x len=0x%x\n", + DEV_NO (dev), pos, (int) buf, len); - if (flashCheck(dev) == ERROR) - return ERROR; + if (flashCheck (dev) == ERROR) + return ERROR; - if (pos < 0 || len < 0 || pos + len > FLASH_MAX_POS(dev)) { - printf("flashRead: Position out of range " - "(dev: %d, pos: 0x%x, len: 0x%x)\n", - DEV_NO(dev), pos, len); - return ERROR; - } + if (pos < 0 || len < 0 || pos + len > FLASH_MAX_POS (dev)) { + printf ("flashRead: Position out of range " + "(dev: %d, pos: 0x%x, len: 0x%x)\n", + DEV_NO (dev), pos, len); + return ERROR; + } - if (len == 0) + if (len == 0) + return OK; + + if (dev->bank == FLASH0_BANK) { + addr = pos; + words = len; + + PRINTF ("flashRead: memcpy(0x%x, 0x%x, 0x%x)\n", + (int) buf, (int) FLASH0_ADDR (dev, pos), len); + + memcpy (buf, FLASH0_ADDR (dev, addr), words); + + } + PRINTF ("flashRead: rv=OK\n"); + return OK; - - if (dev->bank == FLASH0_BANK) { - addr = pos; - words = len; - - PRINTF("flashRead: memcpy(0x%x, 0x%x, 0x%x)\n", - (int) buf, (int) FLASH0_ADDR(dev, pos), len); - - memcpy(buf, FLASH0_ADDR(dev, addr), words); - - } - PRINTF("flashRead: rv=OK\n"); - - return OK; } -STATUS flashWrite(flash_dev_t *dev, int pos, char *buf, int len) +STATUS flashWrite (flash_dev_t * dev, int pos, char *buf, int len) { - int addr, words; + int addr, words; - PRINTF("flashWrite: dev=%d pos=0x%x buf=0x%x len=0x%x\n", - DEV_NO(dev), pos, (int) buf, len); + PRINTF ("flashWrite: dev=%d pos=0x%x buf=0x%x len=0x%x\n", + DEV_NO (dev), pos, (int) buf, len); - if (flashCheck(dev) == ERROR) - return ERROR; - - if (pos < 0 || len < 0 || pos + len > FLASH_MAX_POS(dev)) { - printf("flashWrite: Position out of range " - "(dev: %d, pos: 0x%x, len: 0x%x)\n", - DEV_NO(dev), pos, len); - return ERROR; - } - - if (len == 0) - return OK; - - if (dev->bank == FLASH0_BANK) { - unsigned char tmp; - - addr = pos; - words = len; - - while (words--) { - tmp = *buf; - if (~FLASH0_READ(dev, addr) & tmp) { - printf("flashWrite: Attempt to program 0 to 1 " - "(dev: %d, addr: 0x%x, data: 0x%x)\n", - DEV_NO(dev), addr, tmp); + if (flashCheck (dev) == ERROR) return ERROR; - } - FLASH0_WRITE(dev, 0xaaa, 0xaa); - FLASH0_WRITE(dev, 0x555, 0x55); - FLASH0_WRITE(dev, 0xaaa, 0xa0); - FLASH0_WRITE(dev, addr, tmp); - if (flashWait(dev, addr, tmp, 0) < 0) + + if (pos < 0 || len < 0 || pos + len > FLASH_MAX_POS (dev)) { + printf ("flashWrite: Position out of range " + "(dev: %d, pos: 0x%x, len: 0x%x)\n", + DEV_NO (dev), pos, len); return ERROR; - buf++; - addr++; } - } - PRINTF("flashWrite: rv=OK\n"); + if (len == 0) + return OK; - return OK; + if (dev->bank == FLASH0_BANK) { + unsigned char tmp; + + addr = pos; + words = len; + + while (words--) { + tmp = *buf; + if (~FLASH0_READ (dev, addr) & tmp) { + printf ("flashWrite: Attempt to program 0 to 1 " + "(dev: %d, addr: 0x%x, data: 0x%x)\n", + DEV_NO (dev), addr, tmp); + return ERROR; + } + FLASH0_WRITE (dev, 0xaaa, 0xaa); + FLASH0_WRITE (dev, 0x555, 0x55); + FLASH0_WRITE (dev, 0xaaa, 0xa0); + FLASH0_WRITE (dev, addr, tmp); + if (flashWait (dev, addr, tmp, 0) < 0) + return ERROR; + buf++; + addr++; + } + } + + PRINTF ("flashWrite: rv=OK\n"); + + return OK; } /* * flashWritable returns TRUE if a range contains all F's. */ -STATUS flashWritable(flash_dev_t *dev, int pos, int len) +STATUS flashWritable (flash_dev_t * dev, int pos, int len) { - int addr, words; - int rv = ERROR; + int addr, words; + int rv = ERROR; - PRINTF("flashWritable: dev=%d pos=0x%x len=0x%x\n", - DEV_NO(dev), pos, len); + PRINTF ("flashWritable: dev=%d pos=0x%x len=0x%x\n", + DEV_NO (dev), pos, len); - if (flashCheck(dev) == ERROR) - goto done; - - if (pos < 0 || len < 0 || pos + len > FLASH_MAX_POS(dev)) { - printf("flashWritable: Position out of range " - "(dev: %d, pos: 0x%x, len: 0x%x)\n", - DEV_NO(dev), pos, len); - goto done; - } - - if (len == 0) { - rv = 1; - goto done; - } - - if (dev->bank == FLASH0_BANK) { - addr = pos; - words = len; - - while (words--) { - if (FLASH0_READ(dev, addr) != 0xff) { - rv = 0; + if (flashCheck (dev) == ERROR) goto done; - } - addr++; + + if (pos < 0 || len < 0 || pos + len > FLASH_MAX_POS (dev)) { + printf ("flashWritable: Position out of range " + "(dev: %d, pos: 0x%x, len: 0x%x)\n", + DEV_NO (dev), pos, len); + goto done; } - } - rv = 1; + if (len == 0) { + rv = 1; + goto done; + } - done: - PRINTF("flashWrite: rv=%d\n", rv); - return rv; + if (dev->bank == FLASH0_BANK) { + addr = pos; + words = len; + + while (words--) { + if (FLASH0_READ (dev, addr) != 0xff) { + rv = 0; + goto done; + } + addr++; + } + } + + rv = 1; + + done: + PRINTF ("flashWrite: rv=%d\n", rv); + return rv; } @@ -504,128 +506,126 @@ * ***********************************************************************/ -STATUS flashDiag(flash_dev_t *dev) +STATUS flashDiag (flash_dev_t * dev) { - unsigned int *buf = 0; - int i, len, sector; - int rv = ERROR; + unsigned int *buf = 0; + int i, len, sector; + int rv = ERROR; - if (flashCheck(dev) == ERROR) - return ERROR; + if (flashCheck (dev) == ERROR) + return ERROR; - printf("flashDiag: Testing device %d, " - "base: 0x%x, %d sectors @ %d kB = %d kB\n", - DEV_NO(dev), dev->base, - dev->sectors, - 1 << (dev->lgSectorSize - 10), - dev->sectors << (dev->lgSectorSize - 10)); + printf ("flashDiag: Testing device %d, " + "base: 0x%x, %d sectors @ %d kB = %d kB\n", + DEV_NO (dev), dev->base, + dev->sectors, + 1 << (dev->lgSectorSize - 10), + dev->sectors << (dev->lgSectorSize - 10)); - len = 1 << dev->lgSectorSize; + len = 1 << dev->lgSectorSize; - printf("flashDiag: Erasing\n"); + printf ("flashDiag: Erasing\n"); - if (flashErase(dev) == ERROR) { - printf("flashDiag: Erase failed\n"); - goto done; - } - printf("%d bytes requested ...\n", len); - buf = malloc(len); - printf("allocated %d bytes ...\n", len); - if (buf == 0) { - printf("flashDiag: Out of memory\n"); - goto done; - } - - /* - * Write unique counting pattern to each sector - */ - - for (sector = 0; sector < dev->sectors; sector++) { - printf("flashDiag: Write sector %d\n", sector); - - for (i = 0; i < len / 4; i++) - buf[i] = sector << 24 | i; - - if (flashWrite(dev, - sector << dev->lgSectorSize, - (char *) buf, - len) == ERROR) { - printf("flashDiag: Write failed (dev: %d, sector: %d)\n", - DEV_NO(dev), sector); - goto done; - } - } - - /* - * Verify - */ - - for (sector = 0; sector < dev->sectors; sector++) { - printf("flashDiag: Verify sector %d\n", sector); - - if (flashRead(dev, - sector << dev->lgSectorSize, - (char *) buf, - len) == ERROR) { - printf("flashDiag: Read failed (dev: %d, sector: %d)\n", - DEV_NO(dev), sector); - goto done; - } - - for (i = 0; i < len / 4; i++) { - if (buf[i] != (sector << 24 | i)) { - printf("flashDiag: Verify error " - "(dev: %d, sector: %d, offset: 0x%x)\n", - DEV_NO(dev), sector, i); - printf("flashDiag: Expected 0x%08x, got 0x%08x\n", - sector << 24 | i, buf[i]); - + if (flashErase (dev) == ERROR) { + printf ("flashDiag: Erase failed\n"); goto done; - } } - } + printf ("%d bytes requested ...\n", len); + buf = malloc (len); + printf ("allocated %d bytes ...\n", len); + if (buf == 0) { + printf ("flashDiag: Out of memory\n"); + goto done; + } - printf("flashDiag: Erasing\n"); + /* + * Write unique counting pattern to each sector + */ - if (flashErase(dev) == ERROR) { - printf("flashDiag: Final erase failed\n"); - goto done; - } + for (sector = 0; sector < dev->sectors; sector++) { + printf ("flashDiag: Write sector %d\n", sector); - rv = OK; + for (i = 0; i < len / 4; i++) + buf[i] = sector << 24 | i; - done: - if (buf) - free(buf); + if (flashWrite (dev, + sector << dev->lgSectorSize, + (char *) buf, len) == ERROR) { + printf ("flashDiag: Write failed (dev: %d, sector: %d)\n", + DEV_NO (dev), sector); + goto done; + } + } - if (rv == OK) - printf("flashDiag: Device %d passed\n", DEV_NO(dev)); - else - printf("flashDiag: Device %d failed\n", DEV_NO(dev)); + /* + * Verify + */ - return rv; + for (sector = 0; sector < dev->sectors; sector++) { + printf ("flashDiag: Verify sector %d\n", sector); + + if (flashRead (dev, + sector << dev->lgSectorSize, + (char *) buf, len) == ERROR) { + printf ("flashDiag: Read failed (dev: %d, sector: %d)\n", + DEV_NO (dev), sector); + goto done; + } + + for (i = 0; i < len / 4; i++) { + if (buf[i] != (sector << 24 | i)) { + printf ("flashDiag: Verify error " + "(dev: %d, sector: %d, offset: 0x%x)\n", + DEV_NO (dev), sector, i); + printf ("flashDiag: Expected 0x%08x, got 0x%08x\n", + sector << 24 | i, buf[i]); + + goto done; + } + } + } + + printf ("flashDiag: Erasing\n"); + + if (flashErase (dev) == ERROR) { + printf ("flashDiag: Final erase failed\n"); + goto done; + } + + rv = OK; + + done: + if (buf) + free (buf); + + if (rv == OK) + printf ("flashDiag: Device %d passed\n", DEV_NO (dev)); + else + printf ("flashDiag: Device %d failed\n", DEV_NO (dev)); + + return rv; } -STATUS flashDiagAll(void) +STATUS flashDiagAll (void) { - int i; - int rv = OK; + int i; + int rv = OK; - PRINTF("flashDiagAll: devices=%d\n", flashDevCount); + PRINTF ("flashDiagAll: devices=%d\n", flashDevCount); - for (i = 0; i < flashDevCount; i++) { - flash_dev_t *dev = &flashDev[i]; + for (i = 0; i < flashDevCount; i++) { + flash_dev_t *dev = &flashDev[i]; - if (dev->found && flashDiag(dev) == ERROR) - rv = ERROR; - } + if (dev->found && flashDiag (dev) == ERROR) + rv = ERROR; + } - if (rv == OK) - printf("flashDiagAll: Passed\n"); - else - printf("flashDiagAll: Failed because of earlier errors\n"); + if (rv == OK) + printf ("flashDiagAll: Passed\n"); + else + printf ("flashDiagAll: Failed because of earlier errors\n"); - return OK; + return OK; } @@ -633,198 +633,197 @@ */ unsigned long flash_init (void) { - unsigned long size = 0; - flash_dev_t *dev = NULL; - flashLibInit(); + unsigned long size = 0; + flash_dev_t *dev = NULL; - /* - * Provide info for FLASH (up to 960K) of Kernel Image data. - */ - dev = FLASH_DEV_BANK0_LOW; - flash_info[FLASH_BANK_KERNEL].flash_id = - (dev->vendorID << 16) | dev->deviceID; - flash_info[FLASH_BANK_KERNEL].sector_count = dev->sectors; - flash_info[FLASH_BANK_KERNEL].size = - flash_info[FLASH_BANK_KERNEL].sector_count * FLASH_SECTOR_SIZE; - flash_info[FLASH_BANK_KERNEL].start[FIRST_SECTOR] = dev->base; - size += flash_info[FLASH_BANK_KERNEL].size; + flashLibInit (); - /* - * Provide info for 512K PLCC FLASH ROM (U-Boot) - */ - dev = FLASH_DEV_BANK0_BOOT; - flash_info[FLASH_BANK_BOOT].flash_id = - (dev->vendorID << 16) | dev->deviceID; - flash_info[FLASH_BANK_BOOT].sector_count = dev->sectors; - flash_info[FLASH_BANK_BOOT].size = - flash_info[FLASH_BANK_BOOT].sector_count * FLASH_SECTOR_SIZE; - flash_info[FLASH_BANK_BOOT].start[FIRST_SECTOR] = dev->base; - size += flash_info[FLASH_BANK_BOOT].size; + /* + * Provide info for FLASH (up to 960K) of Kernel Image data. + */ + dev = FLASH_DEV_BANK0_LOW; + flash_info[FLASH_BANK_KERNEL].flash_id = + (dev->vendorID << 16) | dev->deviceID; + flash_info[FLASH_BANK_KERNEL].sector_count = dev->sectors; + flash_info[FLASH_BANK_KERNEL].size = + flash_info[FLASH_BANK_KERNEL].sector_count * FLASH_SECTOR_SIZE; + flash_info[FLASH_BANK_KERNEL].start[FIRST_SECTOR] = dev->base; + size += flash_info[FLASH_BANK_KERNEL].size; + + /* + * Provide info for 512K PLCC FLASH ROM (U-Boot) + */ + dev = FLASH_DEV_BANK0_BOOT; + flash_info[FLASH_BANK_BOOT].flash_id = + (dev->vendorID << 16) | dev->deviceID; + flash_info[FLASH_BANK_BOOT].sector_count = dev->sectors; + flash_info[FLASH_BANK_BOOT].size = + flash_info[FLASH_BANK_BOOT].sector_count * FLASH_SECTOR_SIZE; + flash_info[FLASH_BANK_BOOT].start[FIRST_SECTOR] = dev->base; + size += flash_info[FLASH_BANK_BOOT].size; - /* - * Provide info for 512K FLASH0 segment (U-Boot) - */ - dev = FLASH_DEV_BANK0_HIGH; - flash_info[FLASH_BANK_AUX].flash_id = - (dev->vendorID << 16) | dev->deviceID; - flash_info[FLASH_BANK_AUX].sector_count = dev->sectors; - flash_info[FLASH_BANK_AUX].size = - flash_info[FLASH_BANK_AUX].sector_count * FLASH_SECTOR_SIZE; - flash_info[FLASH_BANK_AUX].start[FIRST_SECTOR] = dev->base; - size += flash_info[FLASH_BANK_AUX].size; + /* + * Provide info for 512K FLASH0 segment (U-Boot) + */ + dev = FLASH_DEV_BANK0_HIGH; + flash_info[FLASH_BANK_AUX].flash_id = + (dev->vendorID << 16) | dev->deviceID; + flash_info[FLASH_BANK_AUX].sector_count = dev->sectors; + flash_info[FLASH_BANK_AUX].size = + flash_info[FLASH_BANK_AUX].sector_count * FLASH_SECTOR_SIZE; + flash_info[FLASH_BANK_AUX].start[FIRST_SECTOR] = dev->base; + size += flash_info[FLASH_BANK_AUX].size; - return size; + return size; } /* * Get flash device from U-Boot flash info. */ -flash_dev_t* -getFlashDevFromInfo(flash_info_t* info) +flash_dev_t *getFlashDevFromInfo (flash_info_t * info) { - int i; + int i; - if(!info) - return NULL; + if (!info) + return NULL; - for (i = 0; i < flashDevCount; i++) { - flash_dev_t *dev = &flashDev[i]; - if(dev->found && (dev->base == info->start[0])) - return dev; - } - printf("ERROR: notice, no FLASH mapped at address 0x%x\n", - (unsigned int)info->start[0]); - return NULL; -} + for (i = 0; i < flashDevCount; i++) { + flash_dev_t *dev = &flashDev[i]; -ulong -flash_get_size (vu_long *addr, flash_info_t *info) -{ - int i; - for(i = 0; i < flashDevCount; i++) { - flash_dev_t *dev = &flashDev[i]; - if(dev->found){ - if(dev->base == (unsigned int)addr){ - info->flash_id = (dev->vendorID << 16) | dev->deviceID; - info->sector_count = dev->sectors; - info->size = info->sector_count * FLASH_SECTOR_SIZE; - return dev->sectors * FLASH_SECTOR_SIZE; + if (dev->found && (dev->base == info->start[0])) + return dev; } - } - } - return 0; + printf ("ERROR: notice, no FLASH mapped at address 0x%x\n", + (unsigned int) info->start[0]); + return NULL; } -void -flash_print_info (flash_info_t *info) +ulong flash_get_size (vu_long * addr, flash_info_t * info) { - int i; - unsigned int chip; + int i; - if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; - } + for (i = 0; i < flashDevCount; i++) { + flash_dev_t *dev = &flashDev[i]; - switch ((info->flash_id >> 16) & 0xff) { - case 0x1: - printf ("AMD "); - break; - default: - printf ("Unknown Vendor "); - break; - } - chip = (unsigned int) info->flash_id & 0x000000ff; + if (dev->found) { + if (dev->base == (unsigned int) addr) { + info->flash_id = (dev->vendorID << 16) | dev->deviceID; + info->sector_count = dev->sectors; + info->size = info->sector_count * FLASH_SECTOR_SIZE; + return dev->sectors * FLASH_SECTOR_SIZE; + } + } + } + return 0; +} - switch (chip) { +void flash_print_info (flash_info_t * info) +{ + int i; + unsigned int chip; - case AMD_ID_F040B: - printf ("AM29F040B (4 Mbit)\n"); - break; + if (info->flash_id == FLASH_UNKNOWN) { + printf ("missing or unknown FLASH type\n"); + return; + } - case AMD_ID_LV160B: - case FLASH_AM160LV: - case 0x49: - printf ("AM29LV160B (16 Mbit / 2M x 8bit)\n"); - break; + switch ((info->flash_id >> 16) & 0xff) { + case 0x1: + printf ("AMD "); + break; + default: + printf ("Unknown Vendor "); + break; + } + chip = (unsigned int) info->flash_id & 0x000000ff; - default: - printf ("Unknown Chip Type:0x%x\n", chip); - break; - } + switch (chip) { - printf (" Size: %ld bytes in %d Sectors\n", - info->size, info->sector_count); + case AMD_ID_F040B: + printf ("AM29F040B (4 Mbit)\n"); + break; - printf (" Sector Start Addresses:"); - for (i=0; isector_count; ++i) { - if ((i % 5) == 0) - printf ("\n "); - printf (" %08lX%s", - info->start[FIRST_SECTOR] + i*FLASH_SECTOR_SIZE, - info->protect[i] ? " (RO)" : " " - ); - } - printf ("\n"); + case AMD_ID_LV160B: + case FLASH_AM160LV: + case 0x49: + printf ("AM29LV160B (16 Mbit / 2M x 8bit)\n"); + break; + + default: + printf ("Unknown Chip Type:0x%x\n", chip); + break; + } + + printf (" Size: %ld bytes in %d Sectors\n", + info->size, info->sector_count); + + printf (" Sector Start Addresses:"); + for (i = 0; i < info->sector_count; ++i) { + if ((i % 5) == 0) + printf ("\n "); + printf (" %08lX%s", + info->start[FIRST_SECTOR] + i * FLASH_SECTOR_SIZE, + info->protect[i] ? " (RO)" : " "); + } + printf ("\n"); } /* * Erase a range of flash sectors. */ -int flash_erase (flash_info_t *info, int s_first, int s_last) +int flash_erase (flash_info_t * info, int s_first, int s_last) { - vu_long *addr = (vu_long*)(info->start[0]); - int prot, sect, l_sect; - flash_dev_t* dev = NULL; + vu_long *addr = (vu_long *) (info->start[0]); + int prot, sect, l_sect; + flash_dev_t *dev = NULL; - if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); + if ((s_first < 0) || (s_first > s_last)) { + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; + } + + prot = 0; + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect]) { + prot++; + } + } + + if (prot) { + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); } else { - printf ("- no sectors to erase\n"); + printf ("\n"); } - return 1; - } - prot = 0; - for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect]) { - prot++; + l_sect = -1; + + /* Start erase on unprotected sectors */ + dev = getFlashDevFromInfo (info); + if (dev) { + printf ("Erase FLASH[%s] -%d sectors:", dev->name, dev->sectors); + for (sect = s_first; sect <= s_last; sect++) { + if (info->protect[sect] == 0) { /* not protected */ + addr = (vu_long *) (dev->base); + /* printf("erase_sector: sector=%d, addr=0x%x\n", + sect, addr); */ + printf ("."); + if (ERROR == flashEraseSector (dev, sect)) { + printf ("ERROR: could not erase sector %d on FLASH[%s]\n", sect, dev->name); + return 1; + } + } + } } - } - - if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); - } else { - printf ("\n"); - } - - l_sect = -1; - - /* Start erase on unprotected sectors */ - dev = getFlashDevFromInfo(info); - if(dev){ - printf("Erase FLASH[%s] -%d sectors:", dev->name, dev->sectors); - for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (vu_long*)(dev->base); - /* printf("erase_sector: sector=%d, addr=0x%x\n", - sect, addr); */ - printf("."); - if(ERROR == flashEraseSector(dev, sect)){ - printf("ERROR: could not erase sector %d on FLASH[%s]\n", - sect, dev->name); - return 1; - } - } - } - } - printf (" done\n"); - return 0; + printf (" done\n"); + return 0; } /*----------------------------------------------------------------------- @@ -833,35 +832,31 @@ * 1 - write timeout * 2 - Flash not erased */ -static int -write_word (flash_info_t *info, ulong dest, ulong data) +static int write_word (flash_info_t * info, ulong dest, ulong data) { - flash_dev_t* dev = getFlashDevFromInfo(info); - int addr = dest - info->start[0]; + flash_dev_t *dev = getFlashDevFromInfo (info); + int addr = dest - info->start[0]; - if (! dev) - return 1; + if (!dev) + return 1; - if(OK != flashWrite(dev, addr, (char*)&data, sizeof(ulong))){ - printf("ERROR: could not write to addr=0x%x, data=0x%x\n", - (unsigned int)addr, (unsigned)data); - return 1; - } + if (OK != flashWrite (dev, addr, (char *) &data, sizeof (ulong))) { + printf ("ERROR: could not write to addr=0x%x, data=0x%x\n", + (unsigned int) addr, (unsigned) data); + return 1; + } - if((addr % FLASH_SECTOR_SIZE) == 0) - printf("."); + if ((addr % FLASH_SECTOR_SIZE) == 0) + printf ("."); - PRINTF("write_word:0x%x, base=0x%x, addr=0x%x, data=0x%x\n", - (unsigned)info->start[0], - (unsigned)dest, - (unsigned)(dest - info->start[0]), - (unsigned)data); + PRINTF ("write_word:0x%x, base=0x%x, addr=0x%x, data=0x%x\n", + (unsigned) info->start[0], + (unsigned) dest, + (unsigned) (dest - info->start[0]), (unsigned) data); - - - return (0); + return (0); } @@ -872,72 +867,72 @@ * 2 - Flash not erased */ -int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt) +int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) { - ulong cp, wp, data; - int i, l, rc; - flash_dev_t* dev = getFlashDevFromInfo(info); + ulong cp, wp, data; + int i, l, rc; + flash_dev_t *dev = getFlashDevFromInfo (info); - if( dev ) { - printf("FLASH[%s]:", dev->name); - wp = (addr & ~3); /* get lower word aligned address */ + if (dev) { + printf ("FLASH[%s]:", dev->name); + wp = (addr & ~3); /* get lower word aligned address */ - /* - * handle unaligned start bytes - */ - if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - } + /* + * handle unaligned start bytes + */ + if ((l = addr - wp) != 0) { + data = 0; + for (i = 0, cp = wp; i < l; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + for (; i < 4 && cnt > 0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt == 0 && i < 4; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + wp += 4; + } - /* - * handle word aligned part - */ - while (cnt >= 4) { - data = 0; - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; + /* + * handle word aligned part + */ + while (cnt >= 4) { + data = 0; + for (i = 0; i < 4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word (info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; + } + + if (cnt == 0) { + return (0); + } + + /* + * handle unaligned tail bytes + */ + data = 0; + for (i = 0, cp = wp; i < 4 && cnt > 0; ++i, ++cp) { + data = (data << 8) | *src++; + --cnt; + } + for (; i < 4; ++i, ++cp) { + data = (data << 8) | (*(uchar *) cp); + } + + return (write_word (info, wp, data)); } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; - } - - if (cnt == 0) { - return (0); - } - - /* - * handle unaligned tail bytes - */ - data = 0; - for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; - } - for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } - - return (write_word(info, wp, data)); - } - return 1; + return 1; } /*----------------------------------------------------------------------- diff --git a/board/mousse/m48t59y.c b/board/mousse/m48t59y.c index 7205a96..37a6244 100644 --- a/board/mousse/m48t59y.c +++ b/board/mousse/m48t59y.c @@ -320,4 +320,3 @@ { m48_tod_init(); } - diff --git a/board/mousse/u-boot.lds b/board/mousse/u-boot.lds index 8eca414..82ef5fe 100644 --- a/board/mousse/u-boot.lds +++ b/board/mousse/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -121,4 +126,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mousse/u-boot.lds.ram b/board/mousse/u-boot.lds.ram index 9166c9c..eb47ae6 100644 --- a/board/mousse/u-boot.lds.ram +++ b/board/mousse/u-boot.lds.ram @@ -85,6 +85,11 @@ *(.fixup) } > ram */ + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } > ram __stop___ex_table = .; @@ -98,4 +103,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mousse/u-boot.lds.rom b/board/mousse/u-boot.lds.rom index a2059db..9b46554 100644 --- a/board/mousse/u-boot.lds.rom +++ b/board/mousse/u-boot.lds.rom @@ -102,6 +102,10 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -125,4 +129,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mpc8260ads/Makefile b/board/mpc8260ads/Makefile index 9280bf7..cc519d1 100644 --- a/board/mpc8260ads/Makefile +++ b/board/mpc8260ads/Makefile @@ -1,3 +1,4 @@ + # # (C) Copyright 2001 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -28,7 +29,7 @@ OBJS := $(BOARD).o flash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/mpc8260ads/mpc8260ads.c b/board/mpc8260ads/mpc8260ads.c index 0aa7550..6d1764a 100644 --- a/board/mpc8260ads/mpc8260ads.c +++ b/board/mpc8260ads/mpc8260ads.c @@ -50,7 +50,7 @@ /* Port A configuration */ { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */ + /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */ /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */ /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */ /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */ diff --git a/board/mpc8260ads/u-boot.lds b/board/mpc8260ads/u-boot.lds index 5d78d4a..61fb15c 100644 --- a/board/mpc8260ads/u-boot.lds +++ b/board/mpc8260ads/u-boot.lds @@ -93,6 +93,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -115,4 +120,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mpc8266ads/Makefile b/board/mpc8266ads/Makefile index 9280bf7..cd0f40b 100644 --- a/board/mpc8266ads/Makefile +++ b/board/mpc8266ads/Makefile @@ -28,7 +28,7 @@ OBJS := $(BOARD).o flash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/mpc8266ads/mpc8266ads.c b/board/mpc8266ads/mpc8266ads.c index c6c8d76..d97b5c1 100644 --- a/board/mpc8266ads/mpc8266ads.c +++ b/board/mpc8266ads/mpc8266ads.c @@ -63,7 +63,7 @@ /* Port A configuration */ { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */ + /* PA31 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxENB */ /* PA30 */ { 0, 1, 0, 0, 0, 0 }, /* FCC1 TxClav */ /* PA29 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 TxSOC */ /* PA28 */ { 0, 1, 0, 1, 0, 0 }, /* FCC1 RxENB */ @@ -241,7 +241,7 @@ /* mask all PCI interrupts */ pci_ic->pci_int_mask |= 0xfff00000; - + return 0; } @@ -291,7 +291,7 @@ i2c_read(SDRAM_SPD_ADDR, 0, 1, &data, 1); spd_size = data; cksum = data; - for(j = 1; j < 64; j++) + for(j = 1; j < 64; j++) { /* read only the checksummed bytes */ /* note: the I2C address autoincrements when alen == 0 */ i2c_read(SDRAM_SPD_ADDR, 0, 0, &data, 1); @@ -301,14 +301,14 @@ else if(j == 7) data_width |= data << 8; else if(j == 3) rows = data & 0x0F; else if(j == 4) cols = data & 0x0F; - else if(j == 12) + else if(j == 12) { /* * Refresh rate: this assumes the prescaler is set to - * approximately 0.39uSec per tick and the target refresh period + * approximately 0.39uSec per tick and the target refresh period * is about 85% of maximum. */ - switch(data & 0x7F) + switch(data & 0x7F) { default: case 0: psrt = 0x21; /* 15.625uS */ break; @@ -320,7 +320,7 @@ } } else if(j == 17) banks = data; - else if(j == 18) + else if(j == 18) { caslatency = 3; /* default CL */ # if(PESSIMISTIC_SDRAM) @@ -332,15 +332,15 @@ else if((data & 0x02) != 0) caslatency = 2; else if((data & 0x04) != 0) caslatency = 3; # endif - else + else { printf ("WARNING: Unknown CAS latency 0x%02X, using 3\n", data); } } - else if(j == 63) + else if(j == 63) { - if(data != cksum) + if(data != cksum) { printf ("WARNING: Configuration data checksum failure:" " is 0x%02x, calculated 0x%02x\n", @@ -381,17 +381,17 @@ sdram_size = 1 << (rows + cols + banks + width); /* hack for high density memory (512MB per CS) */ /* !!!!! Will ONLY work with Page Based Interleave !!!!! - ( PSDMR[PBI] = 1 ) + ( PSDMR[PBI] = 1 ) */ - /* mamory actually has 11 column addresses, but the memory controller - doesn't really care. - the calculations that follow will however move the rows so that - they are muxed one bit off if you use 11 bit columns. + /* mamory actually has 11 column addresses, but the memory controller + doesn't really care. + the calculations that follow will however move the rows so that + they are muxed one bit off if you use 11 bit columns. The solution is to tell the memory controller the correct size of the memory but change the number of columns to 10 afterwards. The 11th column addre will still be mucxed correctly onto the bus. - Also be aware that the MPC8266ADS board Rev B has not connected + Also be aware that the MPC8266ADS board Rev B has not connected Row addres 13 to anything. The fix is to connect ADD16 (from U37-47) to SADDR12 (U28-126) @@ -439,7 +439,7 @@ PSDMR_ACTTORW_8W |\ PSDMR_WRC_4C |\ PSDMR_EAMUX |\ - PSDMR_BUFCMD) |\ + PSDMR_BUFCMD) |\ caslatency |\ ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \ (sdam << 24) |\ @@ -453,7 +453,7 @@ PSDMR_ACTTORW_2W | /* 1 for 7E parts (fast PC-133) */ \ PSDMR_WRC_1C | /* 1 clock + 7nSec */ EAMUX |\ - BUFCMD) |\ + BUFCMD) |\ caslatency |\ ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \ (sdam << 24) |\ @@ -514,7 +514,7 @@ memctl->memc_br2 = CFG_BR2_PRELIM; memctl->memc_or2 = or; - + memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; *ramaddr = c; @@ -532,9 +532,9 @@ * Do it a second time for the second set of chips if the DIMM has * two chip selects (double sided). */ - if(chipselects > 1) + if(chipselects > 1) { - ramaddr += sdram_size; + ramaddr += sdram_size; memctl->memc_br3 = CFG_BR3_PRELIM + sdram_size; memctl->memc_or3 = or; diff --git a/board/mpc8266ads/u-boot.lds b/board/mpc8266ads/u-boot.lds index 5d78d4a..d0b1e04 100644 --- a/board/mpc8266ads/u-boot.lds +++ b/board/mpc8266ads/u-boot.lds @@ -93,6 +93,10 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -115,4 +119,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mpl/common/common_util.c b/board/mpl/common/common_util.c index 503654e..e2672f7 100644 --- a/board/mpl/common/common_util.c +++ b/board/mpl/common/common_util.c @@ -56,7 +56,6 @@ static image_header_t header; - int mpl_prg(unsigned long src,unsigned long size) { unsigned long start; @@ -348,7 +347,6 @@ } - extern device_t *stdio_devices[]; extern char *stdio_names[]; @@ -454,10 +452,10 @@ unsigned long pbcr; int res = 0; pbcr = mfdcr (strap); - if ((pbcr & PSR_ROM_WIDTH_MASK) == 0) + if ((pbcr & PSR_ROM_WIDTH_MASK) == 0) /* boot via MPS or MPS mapping */ res = BOOT_MPS; - if(pbcr & PSR_ROM_LOC) + if(pbcr & PSR_ROM_LOC) /* boot via PCI.. */ res |= BOOT_PCI; return res; diff --git a/board/mpl/common/common_util.h b/board/mpl/common/common_util.h index caf7f9b..bcc7922 100644 --- a/board/mpl/common/common_util.h +++ b/board/mpl/common/common_util.h @@ -46,4 +46,3 @@ #endif #endif /* _COMMON_UTIL_H_ */ - diff --git a/board/mpl/common/flash.c b/board/mpl/common/flash.c index 563039b..28f6f0a 100644 --- a/board/mpl/common/flash.c +++ b/board/mpl/common/flash.c @@ -251,7 +251,7 @@ /* printf("Device value %x\n",value); */ switch (value) { case (FLASH_WORD_SIZE)AMD_ID_F040B: - info->flash_id += FLASH_AM040; + info->flash_id += FLASH_AM040; info->sector_count = 8; info->size = 0x0080000; /* => 512 ko */ break; @@ -494,7 +494,7 @@ wait_for_DQ7(info, sect); } else { - if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){ + if((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL){ addr2[0] = (FLASH_WORD_SIZE)0x00600060; /* unlock sector */ addr2[0] = (FLASH_WORD_SIZE)0x00D000D0; /* sector erase */ intel_wait_for_DQ7(info, sect); @@ -659,7 +659,7 @@ { volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)(info->start[0]); volatile FLASH_WORD_SIZE *dest2 = (FLASH_WORD_SIZE *)dest; - volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; + volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; ulong start; int flag; int i; @@ -708,7 +708,7 @@ while ((dest2[i] & (FLASH_WORD_SIZE)0x00800080) != (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - return (1); + return (1); } } } diff --git a/board/mpl/common/isa.c b/board/mpl/common/isa.c index 40731fc..1788d51 100644 --- a/board/mpl/common/isa.c +++ b/board/mpl/common/isa.c @@ -50,7 +50,6 @@ #endif - /* fdc (logical device 0) */ const SIO_LOGDEV_TABLE sio_fdc[] = { {0x60, 3}, /* set IO to FDPort (3F0) */ @@ -186,7 +185,6 @@ } - /****************************************************************************** * IRQ Controller * we use the Vector mode @@ -396,12 +394,12 @@ /* we should handle cascaded interrupts here also */ /* printf("ISA Irq %d\n",irq); */ isa_irqs[irq].count++; - if (isa_irqs[irq].handler != NULL) - (*isa_irqs[irq].handler)(isa_irqs[irq].arg); /* call isr */ - else - { - PRINTF ("bogus interrupt vector 0x%x\n", irq); - } + if (isa_irqs[irq].handler != NULL) + (*isa_irqs[irq].handler)(isa_irqs[irq].arg); /* call isr */ + else + { + PRINTF ("bogus interrupt vector 0x%x\n", irq); + } } /* issue EOI instruction to clear the IRQ */ mask_and_ack_8259A(irq); @@ -409,7 +407,6 @@ } - /****************************************************************** * Install and free an ISA interrupt handler. */ @@ -418,12 +415,12 @@ { if (isa_irqs[vec].handler != NULL) { printf ("ISA Interrupt vector %d: handler 0x%x replacing 0x%x\n", - vec, (uint)handler, (uint)isa_irqs[vec].handler); + vec, (uint)handler, (uint)isa_irqs[vec].handler); } isa_irqs[vec].handler = handler; isa_irqs[vec].arg = arg; enable_8259A_irq(vec); - PRINTF ("Install ISA IRQ %d ==> %p, @ %p mask=%04x\n", vec, handler, &isa_irqs[vec].handler,cached_irq_mask); + PRINTF ("Install ISA IRQ %d ==> %p, @ %p mask=%04x\n", vec, handler, &isa_irqs[vec].handler,cached_irq_mask); } @@ -432,7 +429,7 @@ disable_8259A_irq(vec); isa_irqs[vec].handler = NULL; isa_irqs[vec].arg = NULL; - printf ("Free ISA IRQ %d mask=%04x\n", vec, cached_irq_mask); + printf ("Free ISA IRQ %d mask=%04x\n", vec, cached_irq_mask); } @@ -464,6 +461,3 @@ drv_isa_kbd_init(); return 0; } - - - diff --git a/board/mpl/common/isa.h b/board/mpl/common/isa.h index 66dd2c9..578222d 100644 --- a/board/mpl/common/isa.h +++ b/board/mpl/common/isa.h @@ -27,7 +27,6 @@ #define SIO_CFG_PORT 0x3F0 /* Config Port Address */ - /* table fore SIO initialization */ typedef struct { const uchar index; @@ -40,8 +39,6 @@ } SIO_TABLE; - - unsigned char open_cfg_super_IO(int address); unsigned char read_cfg_super_IO(int address, unsigned char function, unsigned char regaddr); void write_cfg_super_IO(int address, unsigned char function, unsigned char regaddr, unsigned char data); diff --git a/board/mpl/common/kbd.c b/board/mpl/common/kbd.c index 5b87cdb..9bd1ff9 100644 --- a/board/mpl/common/kbd.c +++ b/board/mpl/common/kbd.c @@ -137,8 +137,6 @@ #define KBD_BUFFER_LEN 0x20 /* size of the keyboardbuffer */ - - static volatile char kbd_buffer[KBD_BUFFER_LEN]; static volatile int in_pointer = 0; static volatile int out_pointer = 0; @@ -450,7 +448,6 @@ } - /****************************************************************************** * Lowlevel Part of keyboard section */ @@ -648,8 +645,3 @@ { handle_kbd_event(); } - - - -/* eof */ - diff --git a/board/mpl/common/memtst.c b/board/mpl/common/memtst.c index 122ba2e..c994a8b 100644 --- a/board/mpl/common/memtst.c +++ b/board/mpl/common/memtst.c @@ -65,9 +65,6 @@ #define MEGABYTE (1024*1024) - - - typedef struct { volatile unsigned long pat1; volatile unsigned long pat2; @@ -444,7 +441,6 @@ } - typedef struct { void (*test_write) (unsigned long startaddr, unsigned long size, unsigned long *pat); diff --git a/board/mpl/common/pci_parts.h b/board/mpl/common/pci_parts.h index a8e3232..82426f3 100644 --- a/board/mpl/common/pci_parts.h +++ b/board/mpl/common/pci_parts.h @@ -59,7 +59,6 @@ #define PCI_IRQ_VECTOR(x) ((PCI_DEV(x) + 10) % 4) + 28 - /* PCI Device List for PIP405 */ /* Mapping: @@ -191,8 +190,3 @@ { } }; #endif /* _PCI_PARTS_H_ */ - - - - - diff --git a/board/mpl/common/piix4_pci.h b/board/mpl/common/piix4_pci.h index 5a0fd5e..3c0523f 100644 --- a/board/mpl/common/piix4_pci.h +++ b/board/mpl/common/piix4_pci.h @@ -22,7 +22,6 @@ */ - #ifndef _PIIX4_PCI_H #define _PIIX4_PCI_H @@ -163,5 +162,4 @@ #define PCI_CFG_PIIX4_SMBBA 0x90 - #endif diff --git a/board/mpl/common/usb_uhci.c b/board/mpl/common/usb_uhci.c index 83624a9..4a10b79 100644 --- a/board/mpl/common/usb_uhci.c +++ b/board/mpl/common/usb_uhci.c @@ -1088,7 +1088,6 @@ #endif - #ifdef USB_UHCI_DEBUG static int usb_display_td(uhci_td_t *td) diff --git a/board/mpl/common/usb_uhci.h b/board/mpl/common/usb_uhci.h index 8c8f161..af80837 100644 --- a/board/mpl/common/usb_uhci.h +++ b/board/mpl/common/usb_uhci.h @@ -186,5 +186,3 @@ #endif /* _USB_UHCI_H_ */ - - diff --git a/board/mpl/mip405/Makefile b/board/mpl/mip405/Makefile index 839cafe..9276f64 100644 --- a/board/mpl/mip405/Makefile +++ b/board/mpl/mip405/Makefile @@ -31,7 +31,7 @@ SOBJS = init.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/mpl/mip405/cmd_mip405.c b/board/mpl/mip405/cmd_mip405.c index 6ec128f..2075fbd 100644 --- a/board/mpl/mip405/cmd_mip405.c +++ b/board/mpl/mip405/cmd_mip405.c @@ -53,5 +53,11 @@ } return (do_mplcommon(cmdtp, flag, argc, argv)); } +cmd_tbl_t U_BOOT_CMD(mip405) = MK_CMD_ENTRY( + "mip405", 6, 1, do_mip405, + "mip405 - MIP405 specific Cmds\n", + "flash mem [SrcAddr] - updates U-Boot with image in memory\n" + "mip405 flash mps - updates U-Boot with image from MPS\n" +); /* ------------------------------------------------------------------------- */ diff --git a/board/mpl/mip405/init.S b/board/mpl/mip405/init.S index ad3f78d..00bf739 100644 --- a/board/mpl/mip405/init.S +++ b/board/mpl/mip405/init.S @@ -63,7 +63,7 @@ mtlr r4 /* restore link register */ addi r4,0,14 /* set ctr to 14; used to prefetch */ mtctr r4 /* 14 cache lines to fit this function */ - /* in cache (gives us 8x14=112 instrctns) */ + /* in cache (gives us 8x14=112 instrctns) */ ..ebcloop: icbt r0,r3 /* prefetch cache line for addr in r3 */ addi r3,r3,32 /* move to next cache line */ @@ -116,10 +116,10 @@ 0: - /* 8Bit boot mode: */ + /* 8Bit boot mode: */ /*----------------------------------------------------------------------- - * Memory Bank 0 Multi Purpose Socket initialization - *----------------------------------------------------------------------- */ + * Memory Bank 0 Multi Purpose Socket initialization + *----------------------------------------------------------------------- */ /* 0x7F8FFE80 slowest boot */ addi r4,0,pb0ap mtdcr ebccfga,r4 @@ -133,7 +133,7 @@ mtdcr ebccfgd,r4 addi r4,0,pb0cr - mtdcr ebccfga,r4 + mtdcr ebccfga,r4 /* BS=0x010(4MB),BU=0x3(R/W), */ /* addis r4,0,((FLASH_BASE0_PRELIM & 0xFFF00000) | 0x00050000)@h */ /* ori r4,r4,0x8000 / * BW=0x0( 8 bits) */ @@ -197,7 +197,7 @@ * Description: Configures the internal SRAM memory. and setup the * Stackpointer in it. *----------------------------------------------------------------------------- */ - .globl sdram_init + .globl sdram_init sdram_init: @@ -245,4 +245,3 @@ nop b _start /* normal start */ #endif - diff --git a/board/mpl/mip405/mip405.c b/board/mpl/mip405/mip405.c index 93d8679..07922bc 100644 --- a/board/mpl/mip405/mip405.c +++ b/board/mpl/mip405/mip405.c @@ -511,7 +511,6 @@ } - void user_led0 (unsigned char on) { if (on) @@ -762,5 +761,3 @@ printf (" PIIX INIT: %s\n", (irq_reg & 0x8) ? "inactive" : "active"); printf (" PIIX NMI: %s\n", (irq_reg & 0x4) ? "inactive" : "active"); } - - diff --git a/board/mpl/mip405/mip405.h b/board/mpl/mip405/mip405.h index 101b173..f1e37ff 100644 --- a/board/mpl/mip405/mip405.h +++ b/board/mpl/mip405/mip405.h @@ -32,7 +32,6 @@ void user_led0(unsigned char on); - #endif /* timings */ /* PLD (CS7) */ @@ -114,7 +113,6 @@ #define UART1_CR ((PER_UART1_ADDR & 0xfff00000) + (UART0_BS << 17) + (UART0_BU << 15) + (UART0_BW << 13)) - /* Flash CS0 or CS 1 */ /* 0x7F8FFE80 slowest timing at all... */ #define FLASH_BME_B 1 /* Burst enable */ @@ -182,6 +180,3 @@ #define MPS_CR_B ((FLASH_BASE0_PRELIM & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13)) /* CR register for non Boot */ #define MPS_CR ((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13)) - - - diff --git a/board/mpl/mip405/u-boot.lds b/board/mpl/mip405/u-boot.lds index 710a139..bb0f122 100644 --- a/board/mpl/mip405/u-boot.lds +++ b/board/mpl/mip405/u-boot.lds @@ -125,6 +125,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/mpl/pip405/Makefile b/board/mpl/pip405/Makefile index b6cc531..a818d08 100644 --- a/board/mpl/pip405/Makefile +++ b/board/mpl/pip405/Makefile @@ -34,7 +34,7 @@ SOBJS = init.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/mpl/pip405/cmd_pip405.c b/board/mpl/pip405/cmd_pip405.c index 0d1ce11..4cc3776 100644 --- a/board/mpl/pip405/cmd_pip405.c +++ b/board/mpl/pip405/cmd_pip405.c @@ -33,7 +33,6 @@ extern int do_mplcommon(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - /* ------------------------------------------------------------------------- */ int do_pip405(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) @@ -59,5 +58,12 @@ return (do_mplcommon(cmdtp, flag, argc, argv)); } +cmd_tbl_t U_BOOT_CMD(pip405) = MK_CMD_ENTRY( + "pip405", 6, 1, do_pip405, + "pip405 - PIP405 specific Cmds\n", + "flash mem [SrcAddr] - updates U-Boot with image in memory\n" + "pip405 flash floppy [SrcAddr] - updates U-Boot with image from floppy\n" + "pip405 flash mps - updates U-Boot with image from MPS\n" +); /* ------------------------------------------------------------------------- */ diff --git a/board/mpl/pip405/init.S b/board/mpl/pip405/init.S index 4a70ec9..a0c76dd 100644 --- a/board/mpl/pip405/init.S +++ b/board/mpl/pip405/init.S @@ -49,7 +49,7 @@ #include - .globl ext_bus_cntlr_init + .globl ext_bus_cntlr_init ext_bus_cntlr_init: mflr r4 /* save link register */ bl ..getAddr @@ -58,7 +58,7 @@ mtlr r4 /* restore link register */ addi r4,0,14 /* set ctr to 14; used to prefetch */ mtctr r4 /* 14 cache lines to fit this function */ - /* in cache (gives us 8x14=112 instrctns) */ + /* in cache (gives us 8x14=112 instrctns) */ ..ebcloop: icbt r0,r3 /* prefetch cache line for addr in r3 */ addi r3,r3,32 /* move to next cache line */ @@ -211,10 +211,9 @@ * Description: Configures the internal SRAM memory. and setup the * Stackpointer in it. *----------------------------------------------------------------------------- */ - .globl sdram_init + .globl sdram_init sdram_init: blr - diff --git a/board/mpl/pip405/pip405.c b/board/mpl/pip405/pip405.c index 87ca6ef..a77e2c9 100644 --- a/board/mpl/pip405/pip405.c +++ b/board/mpl/pip405/pip405.c @@ -530,7 +530,6 @@ mtdcr (memcfgd, tmp); - /*-------------------------------------------------------------------------+ | Interrupt controller setup for the PIP405 board. | Note: IRQ 0-15 405GP internally generated; active high; level sensitive @@ -673,7 +672,6 @@ } - extern int isa_init (void); @@ -943,5 +941,3 @@ } out8 (PLD_SCSI_RST_REG, resreg); } - - diff --git a/board/mpl/pip405/pip405.h b/board/mpl/pip405/pip405.h index 10f6479..c2411a3 100644 --- a/board/mpl/pip405/pip405.h +++ b/board/mpl/pip405/pip405.h @@ -131,7 +131,6 @@ #define UART1_CR ((PER_UART1_ADDR & 0xfff00000) + (UART0_BS << 17) + (UART0_BU << 15) + (UART0_BW << 13)) - /* Flash CS0 or CS 1 */ /* 0x7F8FFE80 slowest timing at all... */ #define FLASH_BME_B 1 /* Burst enable */ @@ -199,14 +198,3 @@ #define MPS_CR_B ((FLASH_BASE0_PRELIM & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13)) /* CR register for non Boot */ #define MPS_CR ((MULTI_PURPOSE_SOCKET_ADDR & 0xfff00000) + (MPS_BS << 17) + (MPS_BU << 15) + (MPS_BW << 13)) - - - - - - - - - - - diff --git a/board/mpl/pip405/u-boot.lds b/board/mpl/pip405/u-boot.lds index f221343..9b83ded 100644 --- a/board/mpl/pip405/u-boot.lds +++ b/board/mpl/pip405/u-boot.lds @@ -121,6 +121,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/mpl/pip405/u-boot.lds.debug b/board/mpl/pip405/u-boot.lds.debug index f4f9743..d483424 100644 --- a/board/mpl/pip405/u-boot.lds.debug +++ b/board/mpl/pip405/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mpl/vcma9/Makefile b/board/mpl/vcma9/Makefile index 428eea2..f9b78f9 100644 --- a/board/mpl/vcma9/Makefile +++ b/board/mpl/vcma9/Makefile @@ -31,7 +31,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/mpl/vcma9/cmd_vcma9.c b/board/mpl/vcma9/cmd_vcma9.c index 80bb61b..32fa334 100644 --- a/board/mpl/vcma9/cmd_vcma9.c +++ b/board/mpl/vcma9/cmd_vcma9.c @@ -141,4 +141,3 @@ return (do_mplcommon(cmdtp, flag, argc, argv)); } - diff --git a/board/mpl/vcma9/flash.c b/board/mpl/vcma9/flash.c index b442c9d..91517c4 100644 --- a/board/mpl/vcma9/flash.c +++ b/board/mpl/vcma9/flash.c @@ -313,7 +313,7 @@ */ result = *addr; if ((result & data) != data) - return ERR_NOT_ERASED; + return ERR_NOT_ERASED; /* @@ -365,7 +365,7 @@ *addr = CMD_READ_ARRAY; if (chip == ERR || *addr != data) - rc = ERR_PROG_ERROR; + rc = ERR_PROG_ERROR; if (iflag) enable_interrupts(); diff --git a/board/mpl/vcma9/memsetup.S b/board/mpl/vcma9/memsetup.S index 557e554..7b4193d 100644 --- a/board/mpl/vcma9/memsetup.S +++ b/board/mpl/vcma9/memsetup.S @@ -28,7 +28,6 @@ */ - #include #include diff --git a/board/mpl/vcma9/u-boot.lds b/board/mpl/vcma9/u-boot.lds index 8c9c218..3a7c4d4 100644 --- a/board/mpl/vcma9/u-boot.lds +++ b/board/mpl/vcma9/u-boot.lds @@ -27,28 +27,32 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/arm920t/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } armboot_end = .; } diff --git a/board/mpl/vcma9/vcma9.c b/board/mpl/vcma9/vcma9.c index b051bfe..1df5c38 100644 --- a/board/mpl/vcma9/vcma9.c +++ b/board/mpl/vcma9/vcma9.c @@ -166,9 +166,9 @@ #define TWRPH0 3 #define TWRPH1 0 NF_Conf((1<<15)|(0<<14)|(0<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0)); - //nand->NFCONF = (1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0); - // 1 1 1 1, 1 xxx, r xxx, r xxx - // En 512B 4step ECCR nFCE=H tACLS tWRPH0 tWRPH1 + /*nand->NFCONF = (1<<15)|(1<<14)|(1<<13)|(1<<12)|(1<<11)|(TACLS<<8)|(TWRPH0<<4)|(TWRPH1<<0); */ + /* 1 1 1 1, 1 xxx, r xxx, r xxx */ + /* En 512B 4step ECCR nFCE=H tACLS tWRPH0 tWRPH1 */ NF_Reset(); } @@ -257,7 +257,6 @@ } - void print_vcma9_rev(void) { printf("Board: VCMA9-%d PCB Rev: %c (PLD Ver: %d, Rev: %d)\n", diff --git a/board/mpl/vcma9/vcma9.h b/board/mpl/vcma9/vcma9.h index 4299d4e..068eb21 100644 --- a/board/mpl/vcma9/vcma9.h +++ b/board/mpl/vcma9/vcma9.h @@ -124,4 +124,3 @@ #define PLD_MISC_REG (PLD_BASE_ADDRESS + 3) #define PLD_GPCD_REG (PLD_BASE_ADDRESS + 4) #define PLD_BOARD_REG (PLD_BASE_ADDRESS + 5) - diff --git a/board/musenki/Makefile b/board/musenki/Makefile index 2613292..24dc026 100644 --- a/board/musenki/Makefile +++ b/board/musenki/Makefile @@ -29,7 +29,7 @@ SOBJS = $(LIB): .depend $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/musenki/README b/board/musenki/README index 4a1955d..135a01a 100644 --- a/board/musenki/README +++ b/board/musenki/README @@ -68,12 +68,11 @@ saveenv - save environment variables to persistent storage setenv - set environment variables tftpboot- boot image via network using TFTP protocol - and env variables ipaddr and serverip + and env variables ipaddr and serverip version - print monitor version ? - alias for 'help' - x.x.x CONFIG_CONS_INDEX 2 **** NOT TESTED **** @@ -167,7 +166,6 @@ => - x.x.x Flash Programming @@ -298,4 +296,3 @@ x.x Image download and run over ethernet interface untested (not working yet, actually) - diff --git a/board/musenki/flash.c b/board/musenki/flash.c index 1e8bfff..cd33d8e 100644 --- a/board/musenki/flash.c +++ b/board/musenki/flash.c @@ -56,7 +56,6 @@ static void flash_get_offsets (ulong base, flash_info_t *info); - /* * don't ask. its stupid, but more than one soul has had to live with this mistake * "swaptab[i]" is the value of "i" with the bits reversed. diff --git a/board/musenki/u-boot.lds b/board/musenki/u-boot.lds index cf23407..9d949b5 100644 --- a/board/musenki/u-boot.lds +++ b/board/musenki/u-boot.lds @@ -103,6 +103,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -126,4 +131,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mvs1/Makefile b/board/mvs1/Makefile index ef173d0..13ce9fc 100644 --- a/board/mvs1/Makefile +++ b/board/mvs1/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/mvs1/README b/board/mvs1/README index 6c66d67..69520bd 100644 --- a/board/mvs1/README +++ b/board/mvs1/README @@ -12,4 +12,3 @@ D-71570 Oppenweiler Germany - diff --git a/board/mvs1/mvs1.c b/board/mvs1/mvs1.c index da98de5..cd5a01c 100644 --- a/board/mvs1/mvs1.c +++ b/board/mvs1/mvs1.c @@ -99,7 +99,6 @@ } - #ifdef DO_RAM_TEST /* ------------------------------------------------------------------------- */ diff --git a/board/mvs1/u-boot.lds b/board/mvs1/u-boot.lds index 15a1963..7fe24df 100644 --- a/board/mvs1/u-boot.lds +++ b/board/mvs1/u-boot.lds @@ -115,6 +115,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -137,4 +142,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/mvs1/u-boot.lds.debug b/board/mvs1/u-boot.lds.debug index 22138f8..c0ee849 100644 --- a/board/mvs1/u-boot.lds.debug +++ b/board/mvs1/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/netvia/Makefile b/board/netvia/Makefile index ef173d0..13ce9fc 100644 --- a/board/netvia/Makefile +++ b/board/netvia/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/netvia/u-boot.lds b/board/netvia/u-boot.lds index 5ac88da..14d4ba0 100644 --- a/board/netvia/u-boot.lds +++ b/board/netvia/u-boot.lds @@ -109,6 +109,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/netvia/u-boot.lds.debug b/board/netvia/u-boot.lds.debug index fa494fb..44eb2b6 100644 --- a/board/netvia/u-boot.lds.debug +++ b/board/netvia/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/nx823/Makefile b/board/nx823/Makefile index 35b8428..7a2014d 100644 --- a/board/nx823/Makefile +++ b/board/nx823/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/nx823/flash.c b/board/nx823/flash.c index 05ec687..581925e 100644 --- a/board/nx823/flash.c +++ b/board/nx823/flash.c @@ -462,4 +462,3 @@ return (0); } - diff --git a/board/nx823/nx823.c b/board/nx823/nx823.c index 35cc9b0..07d173b 100644 --- a/board/nx823/nx823.c +++ b/board/nx823/nx823.c @@ -482,4 +482,3 @@ bd->bi_enetaddr[4] = bd->bi_sernum[5]; bd->bi_enetaddr[5] = bd->bi_sernum[6]; } - diff --git a/board/nx823/u-boot.lds b/board/nx823/u-boot.lds index 7128155..526198c 100644 --- a/board/nx823/u-boot.lds +++ b/board/nx823/u-boot.lds @@ -99,6 +99,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -121,4 +126,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/nx823/u-boot.lds.debug b/board/nx823/u-boot.lds.debug index 8dc6d40..f6f7cf4 100644 --- a/board/nx823/u-boot.lds.debug +++ b/board/nx823/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/oxc/Makefile b/board/oxc/Makefile index 8639e17..ae7a932 100644 --- a/board/oxc/Makefile +++ b/board/oxc/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/oxc/u-boot.lds b/board/oxc/u-boot.lds index 0e0b0e6..db89a78 100644 --- a/board/oxc/u-boot.lds +++ b/board/oxc/u-boot.lds @@ -100,6 +100,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -123,4 +128,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/pcippc2/Makefile b/board/pcippc2/Makefile index d771100..2998f23 100644 --- a/board/pcippc2/Makefile +++ b/board/pcippc2/Makefile @@ -33,7 +33,7 @@ OBJS = $(COBJS) $(AOBJS) $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/pcippc2/cpc710_pci.c b/board/pcippc2/cpc710_pci.c index 9975cda..bed8aea 100644 --- a/board/pcippc2/cpc710_pci.c +++ b/board/pcippc2/cpc710_pci.c @@ -53,7 +53,7 @@ u32 sdram_size = pcippc2_sdram_size(); cpc710_mapped_ram = sdram_size < PCI_MEMORY_MAXSIZE ? - sdram_size : PCI_MEMORY_MAXSIZE; + sdram_size : PCI_MEMORY_MAXSIZE; /* Select the local PCI */ diff --git a/board/pcippc2/pcippc2.c b/board/pcippc2/pcippc2.c index bab3c20..fd3d479 100644 --- a/board/pcippc2/pcippc2.c +++ b/board/pcippc2/pcippc2.c @@ -66,11 +66,13 @@ return cpc710_ram_init (); } -void do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { out32 (REG (CPC0, SPOR), 0); iobarrier_rw (); while (1); + /* notreached */ + return (-1); } int board_pre_init (void) @@ -201,7 +203,7 @@ } #if (CONFIG_COMMANDS & CFG_CMD_BSP) -int do_wd (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +int do_wd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { switch (argc) { case 1: @@ -231,5 +233,13 @@ return 1; } +cmd_tbl_t U_BOOT_CMD(wd) = MK_CMD_ENTRY( + "wd", 2, 1, do_wd, + "wd - check and set watchdog\n", + "on - switch watchDog on\n" + "wd off - switch watchdog off\n" + "wd - print current status\n" +); + #endif /* CFG_CMD_BSP */ #endif /* CONFIG_WATCHDOG */ diff --git a/board/pcippc2/u-boot.lds b/board/pcippc2/u-boot.lds index 8f48068..6ead7f2 100644 --- a/board/pcippc2/u-boot.lds +++ b/board/pcippc2/u-boot.lds @@ -109,6 +109,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/pm826/Makefile b/board/pm826/Makefile index 35b8428..7a2014d 100644 --- a/board/pm826/Makefile +++ b/board/pm826/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/pm826/u-boot.lds b/board/pm826/u-boot.lds index 013a8d1..ce6c454 100644 --- a/board/pm826/u-boot.lds +++ b/board/pm826/u-boot.lds @@ -94,6 +94,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/pn62/Makefile b/board/pn62/Makefile index 77e216b..e85d4fd 100644 --- a/board/pn62/Makefile +++ b/board/pn62/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o cmd_pn62.o misc.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/pn62/cmd_pn62.c b/board/pn62/cmd_pn62.c index 928f6c0..421829a 100644 --- a/board/pn62/cmd_pn62.c +++ b/board/pn62/cmd_pn62.c @@ -26,9 +26,7 @@ #include #include #include -#include -#include - +#include #include "pn62.h" #if (CONFIG_COMMANDS & CFG_CMD_BSP) @@ -53,6 +51,12 @@ set_led (number, function); return 0; } +cmd_tbl_t U_BOOT_CMD(led) = MK_CMD_ENTRY( + "led" , 3, 1, do_led, + "led - set LED 0..11 on the PN62 board\n", + "i fun\n" + " - set 'i'th LED to function 'fun'\n" +); /* * Command loadpci: loads a image over PCI. @@ -161,4 +165,11 @@ return rcode; } +cmd_tbl_t U_BOOT_CMD(loadpci) = MK_CMD_ENTRY( + "loadpci", 2, 1, do_loadpci, + "loadpci - load binary file over PCI\n", + "[addr]\n" + " - load binary file over PCI to address 'addr'\n" +); + #endif diff --git a/board/pn62/misc.c b/board/pn62/misc.c index 4f71950..dcb2db5 100644 --- a/board/pn62/misc.c +++ b/board/pn62/misc.c @@ -154,8 +154,8 @@ } static struct pci_device_id am79c95x_ids [] = { - { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE }, - { } + { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_LANCE }, + { } }; diff --git a/board/pn62/u-boot.lds b/board/pn62/u-boot.lds index 5ba99b1..98584dc 100644 --- a/board/pn62/u-boot.lds +++ b/board/pn62/u-boot.lds @@ -103,6 +103,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -126,4 +131,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/ppmc8260/Makefile b/board/ppmc8260/Makefile index 63083a4..420ee9c 100644 --- a/board/ppmc8260/Makefile +++ b/board/ppmc8260/Makefile @@ -28,7 +28,7 @@ OBJS := ppmc8260.o strataflash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/ppmc8260/ppmc8260.c b/board/ppmc8260/ppmc8260.c index ab32622..e92ad8f 100644 --- a/board/ppmc8260/ppmc8260.c +++ b/board/ppmc8260/ppmc8260.c @@ -42,7 +42,7 @@ /* Port A configuration */ { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 *ATMTXEN */ + /* PA31 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 *ATMTXEN */ /* PA30 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTCA */ /* PA29 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 ATMTSOC */ /* PA28 */ { 0, 0, 0, 0, 0, 0 }, /* FCC1 *ATMRXEN */ diff --git a/board/ppmc8260/strataflash.c b/board/ppmc8260/strataflash.c index 6d5a853..f9abfac 100644 --- a/board/ppmc8260/strataflash.c +++ b/board/ppmc8260/strataflash.c @@ -90,8 +90,6 @@ #define FLASH_MAN_CFI 0x01000000 - - typedef union { unsigned char c; unsigned short w; @@ -114,7 +112,6 @@ */ - static void flash_add_byte(flash_info_t *info, cfiword_t * cword, uchar c); static void flash_make_cmd(flash_info_t * info, uchar cmd, void * cmdbuf); static void flash_write_cmd(flash_info_t * info, int sect, uchar offset, uchar cmd); diff --git a/board/ppmc8260/u-boot.lds b/board/ppmc8260/u-boot.lds index 2eac397..492033e 100644 --- a/board/ppmc8260/u-boot.lds +++ b/board/ppmc8260/u-boot.lds @@ -94,6 +94,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -116,4 +121,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/purple/Makefile b/board/purple/Makefile index d1b0056..a9463b6 100644 --- a/board/purple/Makefile +++ b/board/purple/Makefile @@ -1,3 +1,4 @@ + # # (C) Copyright 2003 # Wolfgang Denk, DENX Software Engineering, wd@denx.de. @@ -29,7 +30,7 @@ SOBJS = memsetup.o $(LIB): .depend $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/purple/flash.c b/board/purple/flash.c index 34f1b91..7522580 100644 --- a/board/purple/flash.c +++ b/board/purple/flash.c @@ -42,7 +42,7 @@ #define FLASH29_REG_FIRST_CYCLE FLASH29_REG_ADRS (0x1555) #define FLASH29_REG_SECOND_CYCLE FLASH29_REG_ADRS (0x2aaa) -#define FLASH29_REG_THIRD_CYCLE FLASH29_REG_ADRS (0x3555) +#define FLASH29_REG_THIRD_CYCLE FLASH29_REG_ADRS (0x3555) #define FLASH29_REG_FOURTH_CYCLE FLASH29_REG_ADRS (0x4555) #define FLASH29_REG_FIFTH_CYCLE FLASH29_REG_ADRS (0x5aaa) #define FLASH29_REG_SIXTH_CYCLE FLASH29_REG_ADRS (0x6555) @@ -60,7 +60,7 @@ #define FLASH29_CMD_CHIP_ERASE 0x80808080 #define FLASH29_CMD_READ_RESET 0xf0f0f0f0 #define FLASH29_CMD_AUTOSELECT 0x90909090 -#define FLASH29_CMD_READ 0x70707070 +#define FLASH29_CMD_READ 0x70707070 #define IN_RAM_CMD_READ 0x1 #define IN_RAM_CMD_WRITE 0x2 @@ -88,43 +88,43 @@ * can be relocated to scratch ram */ static void flash_read_cmd(int cmd, FPWV * pFA, char * string, int strLen) -{ +{ int i,j; - FPW temp,temp1; + FPW temp,temp1; FPWV *str; str = (FPWV *)string; j= strLen/4; - + if(cmd == FLASH29_CMD_AUTOSELECT) { - *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; - *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; - *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_AUTOSELECT; - } + *(FLASH29_REG_FIRST_CYCLE) = FLASH29_CMD_FIRST; + *(FLASH29_REG_SECOND_CYCLE) = FLASH29_CMD_SECOND; + *(FLASH29_REG_THIRD_CYCLE) = FLASH29_CMD_AUTOSELECT; + } - if(cmd == FLASH29_CMD_READ) - { - i = 0; - while(istart[0] <= base && base < info->start[0] + info->size) break; } - + return i == CFG_MAX_FLASH_BANKS ? 0 : info; } @@ -334,32 +334,32 @@ case FLASH_AM160B: fmt = "29LV160B%s (16 Mbit, %s)\n"; break; - case FLASH_28F800C3B: - case FLASH_28F800C3T: + case FLASH_28F800C3B: + case FLASH_28F800C3T: fmt = "28F800C3%s (8 Mbit, %s)\n"; break; case FLASH_INTEL800B: case FLASH_INTEL800T: fmt = "28F800B3%s (8 Mbit, %s)\n"; break; - case FLASH_28F160C3B: - case FLASH_28F160C3T: + case FLASH_28F160C3B: + case FLASH_28F160C3T: fmt = "28F160C3%s (16 Mbit, %s)\n"; break; case FLASH_INTEL160B: case FLASH_INTEL160T: fmt = "28F160B3%s (16 Mbit, %s)\n"; break; - case FLASH_28F320C3B: - case FLASH_28F320C3T: + case FLASH_28F320C3B: + case FLASH_28F320C3T: fmt = "28F320C3%s (32 Mbit, %s)\n"; break; case FLASH_INTEL320B: case FLASH_INTEL320T: fmt = "28F320B3%s (32 Mbit, %s)\n"; break; - case FLASH_28F640C3B: - case FLASH_28F640C3T: + case FLASH_28F640C3B: + case FLASH_28F640C3T: fmt = "28F640C3%s (64 Mbit, %s)\n"; break; case FLASH_INTEL640B: @@ -401,16 +401,16 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info) { FUNCPTR_RD absEntry; - FPW retValue; + FPW retValue; int flag; - load_cmd(IN_RAM_CMD_READ); + load_cmd(IN_RAM_CMD_READ); absEntry = (FUNCPTR_RD)FLASH_READ_CMD; flag = disable_interrupts(); absEntry(FLASH29_CMD_AUTOSELECT,0,0,0); if (flag) enable_interrupts(); - + udelay(100); flag = disable_interrupts(); @@ -451,7 +451,7 @@ int rcode = 0; FUNCPTR_WR absEntry; - load_cmd(IN_RAM_CMD_WRITE); + load_cmd(IN_RAM_CMD_WRITE); absEntry = (FUNCPTR_WR)FLASH_WRITE_CMD; if ((s_first < 0) || (s_first > s_last)) { @@ -543,15 +543,15 @@ left > 0 && res == 0; addr += sizeof(data), left -= sizeof(data) - bytes) { - bytes = addr & (sizeof(data) - 1); - addr &= ~(sizeof(data) - 1); + bytes = addr & (sizeof(data) - 1); + addr &= ~(sizeof(data) - 1); /* combine source and destination data so can program * an entire word of 16 or 32 bits */ - for (i = 0; i < sizeof(data); i++) { - data <<= 8; - if (i < bytes || i - bytes >= left ) + for (i = 0; i < sizeof(data); i++) { + data <<= 8; + if (i < bytes || i - bytes >= left ) data += *((uchar *)addr + i); else data += *src++; diff --git a/board/purple/memsetup.S b/board/purple/memsetup.S index 9c983c9..d532ceb 100644 --- a/board/purple/memsetup.S +++ b/board/purple/memsetup.S @@ -35,4 +35,3 @@ sw t1, 0(t0) j ra nop - diff --git a/board/purple/purple.c b/board/purple/purple.c index b1eb78f..4c3e5b4 100644 --- a/board/purple/purple.c +++ b/board/purple/purple.c @@ -35,7 +35,7 @@ __asm__ __volatile__(" \ .set noreorder; \ .set mips3; \ - cache %1, (%0); \ + cache %1, (%0); \ .set mips0; \ .set reorder" \ : \ @@ -182,7 +182,7 @@ *(ulong *)0xbf0081f8 = temp1 + temp; *destination++ = temp; - } + } } /******************************************************************************* @@ -214,8 +214,8 @@ src = (ulong *)(TEXT_BASE + 0x428); dst = (ulong *)0xbf0081d0; - absEntry = (FUNCPTR)(TEXT_BASE + 0x400); - absEntry(src,dst,0x6); + absEntry = (FUNCPTR)(TEXT_BASE + 0x400); + absEntry(src,dst,0x6); src = (ulong *)((ulong)copydwords & 0xfffffff8); dst = (ulong *)0xbf008000; diff --git a/board/purple/u-boot.lds b/board/purple/u-boot.lds index 7508865..270fbe8 100644 --- a/board/purple/u-boot.lds +++ b/board/purple/u-boot.lds @@ -29,9 +29,9 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/mips/start.o (.text) @@ -47,11 +47,11 @@ *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } . = ALIGN(4); .sdata : { *(.sdata) } @@ -64,11 +64,15 @@ .sdata : { *(.sdata) } + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + uboot_end_data = .; num_got_entries = (__got_end - __got_start) >> 2; - . = ALIGN(4); + . = ALIGN(4); .sbss : { *(.sbss) } - .bss : { *(.bss) } + .bss : { *(.bss) } uboot_end = .; } diff --git a/board/r360mpi/Makefile b/board/r360mpi/Makefile index ef173d0..13ce9fc 100644 --- a/board/r360mpi/Makefile +++ b/board/r360mpi/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/r360mpi/r360mpi.c b/board/r360mpi/r360mpi.c index 91e3234..ca556be 100644 --- a/board/r360mpi/r360mpi.c +++ b/board/r360mpi/r360mpi.c @@ -28,7 +28,6 @@ #include #include -#include #include #include @@ -54,37 +53,37 @@ const uint sdram_table[]= { - /* single read. (offset 0 in upm RAM) */ - 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00, - 0x1ff77c47, + /* single read. (offset 0 in upm RAM) */ + 0x1f07fc04, 0xeeaefc04, 0x11adfc04, 0xefbbbc00, + 0x1ff77c47, - /* MRS initialization (offset 5) */ + /* MRS initialization (offset 5) */ - 0x1ff77c34, 0xefeabc34, 0x1fb57c35, + 0x1ff77c34, 0xefeabc34, 0x1fb57c35, - /* burst read. (offset 8 in upm RAM) */ - 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00, - 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47, - _not_used_, _not_used_, _not_used_, _not_used_, - _not_used_, _not_used_, _not_used_, _not_used_, + /* burst read. (offset 8 in upm RAM) */ + 0x1f07fc04, 0xeeaefc04, 0x10adfc04, 0xf0affc00, + 0xf0affc00, 0xf1affc00, 0xefbbbc00, 0x1ff77c47, + _not_used_, _not_used_, _not_used_, _not_used_, + _not_used_, _not_used_, _not_used_, _not_used_, - /* single write. (offset 18 in upm RAM) */ - 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47, - _not_used_, _not_used_, _not_used_, _not_used_, + /* single write. (offset 18 in upm RAM) */ + 0x1f27fc04, 0xeeaebc00, 0x01b93c04, 0x1ff77c47, + _not_used_, _not_used_, _not_used_, _not_used_, - /* burst write. (offset 20 in upm RAM) */ - 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00, - 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _not_used_, - _not_used_, _not_used_, _not_used_, _not_used_, - _not_used_, _not_used_, _not_used_, _not_used_, + /* burst write. (offset 20 in upm RAM) */ + 0x1f07fc04, 0xeeaebc00, 0x10ad7c00, 0xf0affc00, + 0xf0affc00, 0xe1bbbc04, 0x1ff77c47, _not_used_, + _not_used_, _not_used_, _not_used_, _not_used_, + _not_used_, _not_used_, _not_used_, _not_used_, - /* refresh. (offset 30 in upm RAM) */ - 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04, - 0xfffffc84, 0xfffffc07, _not_used_, _not_used_, - _not_used_, _not_used_, _not_used_, _not_used_, + /* refresh. (offset 30 in upm RAM) */ + 0x1ff5fc84, 0xfffffc04, 0xfffffc04, 0xfffffc04, + 0xfffffc84, 0xfffffc07, _not_used_, _not_used_, + _not_used_, _not_used_, _not_used_, _not_used_, - /* exception. (offset 3c in upm RAM) */ - 0x7ffffc07, _not_used_, _not_used_, _not_used_ }; + /* exception. (offset 3c in upm RAM) */ + 0x7ffffc07, _not_used_, _not_used_, _not_used_ }; /* ------------------------------------------------------------------------- */ @@ -443,3 +442,9 @@ setenv ("keybd", keybd_env); return 0; } + +cmd_tbl_t U_BOOT_CMD(kbd) = MK_CMD_ENTRY( + "kbd", 1, 1, do_kbd, + "kbd - read keyboard status\n", + NULL +); diff --git a/board/r360mpi/u-boot.lds b/board/r360mpi/u-boot.lds index 5e4eedf..f64b32f 100644 --- a/board/r360mpi/u-boot.lds +++ b/board/r360mpi/u-boot.lds @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -134,4 +139,3 @@ common/environment.o (.ppcenv) } } - diff --git a/board/rbc823/Makefile b/board/rbc823/Makefile index f912451..0121ddc 100644 --- a/board/rbc823/Makefile +++ b/board/rbc823/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o kbd.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/rbc823/kbd.c b/board/rbc823/kbd.c index f1424e4..c27929d 100644 --- a/board/rbc823/kbd.c +++ b/board/rbc823/kbd.c @@ -48,7 +48,7 @@ { DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); /* Set up the baud rate generator. @@ -65,7 +65,7 @@ int smc1_init (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile smc_t *sp; volatile smc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -182,7 +182,7 @@ volatile cbd_t *tbdf; volatile char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC]; @@ -210,7 +210,7 @@ volatile cbd_t *rbdf; volatile unsigned char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); unsigned char c; @@ -235,7 +235,7 @@ { volatile cbd_t *rbdf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC]; diff --git a/board/rbc823/rbc823.c b/board/rbc823/rbc823.c index 24ed501..9bb1c1d 100644 --- a/board/rbc823/rbc823.c +++ b/board/rbc823/rbc823.c @@ -151,7 +151,7 @@ upmconfig(UPMA, (uint *)sdram_table, sizeof(sdram_table)/sizeof(uint)); /* - * 1 Bank of 64Mbit x 2 devices + * 1 Bank of 64Mbit x 2 devices */ memctl->memc_mptpr = CFG_MPTPR_1BK_4K; memctl->memc_mar = 0x00000088; @@ -164,8 +164,8 @@ memctl->memc_mamr = CFG_MAMR_8COL & (~(MAMR_PTAE)); /* no refresh yet */ udelay(200); - /* - * Perform SDRAM initializsation sequence + /* + * Perform SDRAM initializsation sequence */ memctl->memc_mcr = 0x80008105; /* SDRAM bank 0 */ udelay(1); @@ -174,7 +174,7 @@ memctl->memc_mcr = 0x80008130; /* SDRAM bank 0 - execute twice */ udelay(1); memctl->memc_mamr = (CFG_MAMR_8COL & ~(MAMR_TLFA_MSK)) | MAMR_TLFA_4X; - udelay(200); + udelay(200); memctl->memc_mamr |= MAMR_PTAE; /* enable refresh */ udelay (1000); @@ -185,7 +185,7 @@ * with two SDRAM banks or four cycles every 31.2 us with one * bank. It will be adjusted after memory sizing. */ - memctl->memc_mptpr = CFG_MPTPR_2BK_4K; // 16: but should be: CFG_MPTPR_1BK_4K + memctl->memc_mptpr = CFG_MPTPR_2BK_4K; /* 16: but should be: CFG_MPTPR_1BK_4K */ /* * Check Bank 0 Memory Size for re-configuration @@ -289,4 +289,3 @@ doc_probe(FLASH_BASE1_PRELIM); } - diff --git a/board/rbc823/u-boot.lds b/board/rbc823/u-boot.lds index ffe7495..05f6555 100644 --- a/board/rbc823/u-boot.lds +++ b/board/rbc823/u-boot.lds @@ -109,6 +109,10 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -131,4 +135,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/rmu/Makefile b/board/rmu/Makefile index ef173d0..13ce9fc 100644 --- a/board/rmu/Makefile +++ b/board/rmu/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/rmu/u-boot.lds b/board/rmu/u-boot.lds index a31c362..082d8b0 100644 --- a/board/rmu/u-boot.lds +++ b/board/rmu/u-boot.lds @@ -110,6 +110,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -132,4 +137,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/rmu/u-boot.lds.debug b/board/rmu/u-boot.lds.debug index 22138f8..f34c2a4 100644 --- a/board/rmu/u-boot.lds.debug +++ b/board/rmu/u-boot.lds.debug @@ -128,4 +128,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/rpxsuper/Makefile b/board/rpxsuper/Makefile index 85ea1fc..4535106 100644 --- a/board/rpxsuper/Makefile +++ b/board/rpxsuper/Makefile @@ -28,7 +28,7 @@ OBJS := rpxsuper.o flash.o mii_phy.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/rpxsuper/flash.c b/board/rpxsuper/flash.c index 73281bd..d80e778 100644 --- a/board/rpxsuper/flash.c +++ b/board/rpxsuper/flash.c @@ -172,7 +172,7 @@ * Bank 2 (48 Sectors): 23-70=64kbyte */ info->flash_id = (AMD_MANUFACT & FLASH_VENDMASK) | - (AMD_ID_DL323B & FLASH_TYPEMASK); + (AMD_ID_DL323B & FLASH_TYPEMASK); info->sector_count = 71; info->size = 4 * (8 * 8 + 63 * 64) * 1024; } @@ -183,24 +183,24 @@ /* set up sector start address table */ for (i = 0; i < 8; i++) { - info->start[i] = base + (i * 0x8000); + info->start[i] = base + (i * 0x8000); } for (i = 8; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x40000) + 8 * 0x8000 - 8 * 0x40000; + info->start[i] = base + (i * 0x40000) + 8 * 0x8000 - 8 * 0x40000; } /* check for protected sectors */ for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address */ + /* read sector protection at sector address */ addr = (volatile unsigned long *)(info->start[i]); - addr[2 * 0x0555] = 0xAAAAAAAA; + addr[2 * 0x0555] = 0xAAAAAAAA; addr[2 * 0x02AA] = 0x55555555; addr[2 * 0x0555] = 0x90909090; addr[2 * 0x0555 + 1] = 0xAAAAAAAA; addr[2 * 0x02AA + 1] = 0x55555555; addr[2 * 0x0555 + 1] = 0x90909090; udelay (1000); - base = RD_SWP32(&addr[4]); + base = RD_SWP32(&addr[4]); base |= RD_SWP32(&addr[5]); info->protect[i] = base & 0x00010001 ? 1 : 0; } @@ -404,14 +404,14 @@ flag = disable_interrupts(); if ((dest & 0x00000004) == 0) { - addr[2 * 0x0555] = 0xAAAAAAAA; + addr[2 * 0x0555] = 0xAAAAAAAA; addr[2 * 0x02AA] = 0x55555555; - addr[2 * 0x0555] = 0xA0A0A0A0; + addr[2 * 0x0555] = 0xA0A0A0A0; } else { - addr[2 * 0x0555 + 1] = 0xAAAAAAAA; + addr[2 * 0x0555 + 1] = 0xAAAAAAAA; addr[2 * 0x02AA + 1] = 0x55555555; - addr[2 * 0x0555 + 1] = 0xA0A0A0A0; + addr[2 * 0x0555 + 1] = 0xA0A0A0A0; } *((vu_long *)dest) = data; diff --git a/board/rpxsuper/mii_phy.c b/board/rpxsuper/mii_phy.c index 319f959..ef99aff 100644 --- a/board/rpxsuper/mii_phy.c +++ b/board/rpxsuper/mii_phy.c @@ -38,7 +38,7 @@ if (phy_reg & 0x0400) printf("Phy operating at %d MBit/s in %s-duplex mode\n", phy_reg & 0x4000 ? 100 : 10, - phy_reg & 0x0200 ? "full" : "half"); + phy_reg & 0x0200 ? "full" : "half"); else printf("bad link!!\n"); /* @@ -59,7 +59,7 @@ tmp = 0x6002 | (adr << 7) | (reg << 2); regs->bcsr4 = 0xC3; for (i = 0; i < 64; i++) { - regs->bcsr4 ^= MII_MDCK; + regs->bcsr4 ^= MII_MDCK; } for (i = 0; i < 16; i++) { regs->bcsr4 &= ~MII_MDCK; @@ -92,7 +92,7 @@ } for (i = 0; i < 16; i++) { regs->bcsr4 &= ~MII_MDCK; - if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO; + if (tmp & 0x8000) regs->bcsr4 |= MII_MDIO; else regs->bcsr4 &= ~MII_MDIO; regs->bcsr4 |= MII_MDCK; tmp <<= 1; @@ -105,4 +105,3 @@ val <<= 1; } } - diff --git a/board/rpxsuper/rpxsuper.c b/board/rpxsuper/rpxsuper.c index 2c0717e..50b3c5c 100644 --- a/board/rpxsuper/rpxsuper.c +++ b/board/rpxsuper/rpxsuper.c @@ -42,7 +42,7 @@ /* Port A configuration */ { /* conf ppar psor pdir podr pdat */ - /* PA31 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 *ATMTXEN */ + /* PA31 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 *ATMTXEN */ /* PA30 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTCA */ /* PA29 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 ATMTSOC */ /* PA28 */ { 1, 0, 0, 0, 0, 0 }, /* FCC1 *ATMRXEN */ @@ -271,7 +271,7 @@ memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; for (i = 0; i < 8; i++) - *ramaddr = c; + *ramaddr = c; memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; *ramaddr = c; diff --git a/board/rpxsuper/u-boot.lds b/board/rpxsuper/u-boot.lds index b4e502b..44224cb 100644 --- a/board/rpxsuper/u-boot.lds +++ b/board/rpxsuper/u-boot.lds @@ -93,6 +93,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -115,4 +120,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/rsdproto/flash.c b/board/rsdproto/flash.c index d90e7db..5ad3218 100644 --- a/board/rsdproto/flash.c +++ b/board/rsdproto/flash.c @@ -59,9 +59,9 @@ /* from flash_asm.S */ extern void ull_write(unsigned long long volatile *address, - unsigned long long volatile *data); + unsigned long long volatile *data); extern void ull_read(unsigned long long volatile *address, - unsigned long long volatile *data); + unsigned long long volatile *data); /*----------------------------------------------------------------------- */ @@ -268,7 +268,7 @@ ull_write(f_addr, &f_command); printf (" timeout\n"); return 1; - } + } } while(*f_addr != 0xFFFFFFFFFFFFFFFFULL); printf (" done\n"); diff --git a/board/rsdproto/u-boot.lds b/board/rsdproto/u-boot.lds index 7d3886d..bdc75c1 100644 --- a/board/rsdproto/u-boot.lds +++ b/board/rsdproto/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +125,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/sacsng/Makefile b/board/sacsng/Makefile index e593f27..baefa4a 100644 --- a/board/sacsng/Makefile +++ b/board/sacsng/Makefile @@ -28,7 +28,7 @@ OBJS := sacsng.o flash.o clkinit.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/sacsng/clkinit.c b/board/sacsng/clkinit.c index 634c1e0..ea4c65d 100644 --- a/board/sacsng/clkinit.c +++ b/board/sacsng/clkinit.c @@ -41,8 +41,8 @@ brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; *brg_ptr |= CPM_BRG_RST; @@ -57,8 +57,8 @@ brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; *brg_ptr &= ~CPM_BRG_EN; @@ -71,8 +71,8 @@ brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; *brg_ptr |= CPM_BRG_EN; @@ -85,18 +85,18 @@ brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; if (*brg_ptr & CPM_BRG_DIV16) { - /* DIV16 active */ - return (TRUE); + /* DIV16 active */ + return (TRUE); } else { - /* DIV16 inactive */ - return (FALSE); + /* DIV16 inactive */ + return (FALSE); } } @@ -107,18 +107,18 @@ brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; if (div16) { - /* DIV16 active */ - *brg_ptr |= CPM_BRG_DIV16; + /* DIV16 active */ + *brg_ptr |= CPM_BRG_DIV16; } else { - /* DIV16 inactive */ - *brg_ptr &= ~CPM_BRG_DIV16; + /* DIV16 inactive */ + *brg_ptr &= ~CPM_BRG_DIV16; } } @@ -130,8 +130,8 @@ brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; @@ -143,7 +143,7 @@ brg_cnt = (*brg_ptr & CPM_BRG_CD_MASK) >> CPM_BRG_DIV16_SHIFT; brg_cnt++; if (*brg_ptr & CPM_BRG_DIV16) { - brg_cnt *= 16; + brg_cnt *= 16; } return (brg_cnt); @@ -156,8 +156,8 @@ brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; @@ -166,14 +166,14 @@ * therefore we need to subtract 1 from the count. */ if (brg_cnt > 4096) { - /* Prescale = Divide by 16 */ - *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) | + /* Prescale = Divide by 16 */ + *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) | (((brg_cnt / 16) - 1) << CPM_BRG_DIV16_SHIFT); *brg_ptr |= CPM_BRG_DIV16; } else { - /* Prescale = Divide by 1 */ - *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) | + /* Prescale = Divide by 1 */ + *brg_ptr = (*brg_ptr & ~CPM_BRG_CD_MASK) | ((brg_cnt - 1) << CPM_BRG_DIV16_SHIFT); *brg_ptr &= ~CPM_BRG_DIV16; } @@ -186,8 +186,8 @@ brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; @@ -201,40 +201,40 @@ extc = Daq_BRG_Get_ExtClk(brg); switch (brg + 1) { - case 1: - case 2: - case 5: - case 6: { - switch (extc) { - case 0: { - return ("BRG_INT"); - } - case 1: { - return ("CLK3"); - } - case 2: { - return ("CLK5"); - } - } - return ("??1245??"); - } - case 3: - case 4: - case 7: - case 8: { - switch (extc) { - case 0: { - return ("BRG_INT"); - } - case 1: { - return ("CLK9"); - } - case 2: { - return ("CLK15"); - } - } - return ("??3478??"); - } + case 1: + case 2: + case 5: + case 6: { + switch (extc) { + case 0: { + return ("BRG_INT"); + } + case 1: { + return ("CLK3"); + } + case 2: { + return ("CLK5"); + } + } + return ("??1245??"); + } + case 3: + case 4: + case 7: + case 8: { + switch (extc) { + case 0: { + return ("BRG_INT"); + } + case 1: { + return ("CLK9"); + } + case 2: { + return ("CLK15"); + } + } + return ("??3478??"); + } } return ("??9876??"); } @@ -246,13 +246,13 @@ brg_ptr = (uint *)&immr->im_brgc1; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg -= 4; + brg_ptr = (uint *)&immr->im_brgc5; + brg -= 4; } brg_ptr += brg; *brg_ptr = (*brg_ptr & ~CPM_BRG_EXTC_MASK) | - ((extc << CPM_BRG_EXTC_SHIFT) & CPM_BRG_EXTC_MASK); + ((extc << CPM_BRG_EXTC_SHIFT) & CPM_BRG_EXTC_MASK); } uint Daq_BRG_Rate(uint brg) @@ -266,15 +266,15 @@ brg_ptr = (uint *)&immr->im_brgc1; brg_ptr += brg; if (brg >= 5) { - brg_ptr = (uint *)&immr->im_brgc5; - brg_ptr += (brg - 4); + brg_ptr = (uint *)&immr->im_brgc5; + brg_ptr += (brg - 4); } brg_cnt = Daq_BRG_Get_Count(brg); switch (Daq_BRG_Get_ExtClk(brg)) { - case CPM_BRG_EXTC_CLK3: - case CPM_BRG_EXTC_CLK5: { + case CPM_BRG_EXTC_CLK3: + case CPM_BRG_EXTC_CLK5: { brg_freq = brg_cnt; break; } @@ -298,7 +298,7 @@ DECLARE_GLOBAL_DATA_PTR; volatile ioport_t *iopa = ioport_addr((immap_t *)CFG_IMMR, 0 /* port A */); uint mclk_divisor; /* MCLK divisor */ - int flag; /* Interrupt state */ + int flag; /* Interrupt state */ /* Save off the clocking data */ Daq64xSampling = sample_64x; @@ -307,10 +307,10 @@ * Limit the sample rate to some sensible values. */ if (sample_rate > MAX_64x_SAMPLE_RATE) { - sample_rate = MAX_64x_SAMPLE_RATE; + sample_rate = MAX_64x_SAMPLE_RATE; } if (sample_rate < MIN_SAMPLE_RATE) { - sample_rate = MIN_SAMPLE_RATE; + sample_rate = MIN_SAMPLE_RATE; } /* @@ -322,16 +322,16 @@ /* Setup SCLK */ # ifdef RUN_SCLK_ON_BRG_INT - Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_BRGCLK); + Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_BRGCLK); # else - Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_CLK9); + Daq_BRG_Set_ExtClk(SCLK_BRG, CPM_BRG_EXTC_CLK9); # endif /* Setup LRCLK */ # ifdef RUN_LRCLK_ON_BRG_INT - Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_BRGCLK); + Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_BRGCLK); # else - Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_CLK5); + Daq_BRG_Set_ExtClk(LRCLK_BRG, CPM_BRG_EXTC_CLK5); # endif /* @@ -357,7 +357,7 @@ # endif # ifdef RUN_LRCLK_ON_BRG_INT - Daq_BRG_Set_Count(LRCLK_BRG, + Daq_BRG_Set_Count(LRCLK_BRG, mclk_divisor * MCLK_DIVISOR * SCLK_DIVISOR); # else Daq_BRG_Set_Count(LRCLK_BRG, SCLK_DIVISOR); @@ -367,7 +367,7 @@ * Restore the Interrupt state */ if (flag) { - enable_interrupts(); + enable_interrupts(); } /* Enable the clock drivers */ @@ -386,276 +386,276 @@ #endif # ifdef TIGHTEN_UP_BRG_TIMING - /* - * Obtain MCLK BRG reset/disabled value - */ + /* + * Obtain MCLK BRG reset/disabled value + */ # if (MCLK_BRG == 0) - mclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 1) - mclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 2) - mclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 3) - mclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 4) - mclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 5) - mclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 6) - mclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (MCLK_BRG == 7) - mclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; + mclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif - /* - * Obtain SCLK BRG reset/disabled value - */ + /* + * Obtain SCLK BRG reset/disabled value + */ # if (SCLK_BRG == 0) - sclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 1) - sclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 2) - sclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 3) - sclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 4) - sclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 5) - sclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 6) - sclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (SCLK_BRG == 7) - sclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; + sclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif - /* - * Obtain LRCLK BRG reset/disabled value - */ + /* + * Obtain LRCLK BRG reset/disabled value + */ # if (LRCLK_BRG == 0) - lrclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC1 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 1) - lrclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC2 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 2) - lrclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC3 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 3) - lrclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC4 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 4) - lrclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC5 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 5) - lrclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC6 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 6) - lrclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC7 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif # if (LRCLK_BRG == 7) - lrclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; + lrclk_brg = (*IM_BRGC8 | CPM_BRG_RST) & ~CPM_BRG_EN; # endif - + /* * Disable interrupt and save the current state */ flag = disable_interrupts(); - /* - * Set reset on MCLK BRG - */ + /* + * Set reset on MCLK BRG + */ # if (MCLK_BRG == 0) - *IM_BRGC1 = mclk_brg; + *IM_BRGC1 = mclk_brg; # endif # if (MCLK_BRG == 1) - *IM_BRGC2 = mclk_brg; + *IM_BRGC2 = mclk_brg; # endif # if (MCLK_BRG == 2) - *IM_BRGC3 = mclk_brg; + *IM_BRGC3 = mclk_brg; # endif # if (MCLK_BRG == 3) - *IM_BRGC4 = mclk_brg; + *IM_BRGC4 = mclk_brg; # endif # if (MCLK_BRG == 4) - *IM_BRGC5 = mclk_brg; + *IM_BRGC5 = mclk_brg; # endif # if (MCLK_BRG == 5) - *IM_BRGC6 = mclk_brg; + *IM_BRGC6 = mclk_brg; # endif # if (MCLK_BRG == 6) - *IM_BRGC7 = mclk_brg; + *IM_BRGC7 = mclk_brg; # endif # if (MCLK_BRG == 7) - *IM_BRGC8 = mclk_brg; + *IM_BRGC8 = mclk_brg; # endif - /* - * Set reset on SCLK BRG - */ + /* + * Set reset on SCLK BRG + */ # if (SCLK_BRG == 0) - *IM_BRGC1 = sclk_brg; + *IM_BRGC1 = sclk_brg; # endif # if (SCLK_BRG == 1) - *IM_BRGC2 = sclk_brg; + *IM_BRGC2 = sclk_brg; # endif # if (SCLK_BRG == 2) - *IM_BRGC3 = sclk_brg; + *IM_BRGC3 = sclk_brg; # endif # if (SCLK_BRG == 3) - *IM_BRGC4 = sclk_brg; + *IM_BRGC4 = sclk_brg; # endif # if (SCLK_BRG == 4) - *IM_BRGC5 = sclk_brg; + *IM_BRGC5 = sclk_brg; # endif # if (SCLK_BRG == 5) - *IM_BRGC6 = sclk_brg; + *IM_BRGC6 = sclk_brg; # endif # if (SCLK_BRG == 6) - *IM_BRGC7 = sclk_brg; + *IM_BRGC7 = sclk_brg; # endif # if (SCLK_BRG == 7) - *IM_BRGC8 = sclk_brg; + *IM_BRGC8 = sclk_brg; # endif - /* - * Set reset on LRCLK BRG - */ + /* + * Set reset on LRCLK BRG + */ # if (LRCLK_BRG == 0) - *IM_BRGC1 = lrclk_brg; + *IM_BRGC1 = lrclk_brg; # endif # if (LRCLK_BRG == 1) - *IM_BRGC2 = lrclk_brg; + *IM_BRGC2 = lrclk_brg; # endif # if (LRCLK_BRG == 2) - *IM_BRGC3 = lrclk_brg; + *IM_BRGC3 = lrclk_brg; # endif # if (LRCLK_BRG == 3) - *IM_BRGC4 = lrclk_brg; + *IM_BRGC4 = lrclk_brg; # endif # if (LRCLK_BRG == 4) - *IM_BRGC5 = lrclk_brg; + *IM_BRGC5 = lrclk_brg; # endif # if (LRCLK_BRG == 5) - *IM_BRGC6 = lrclk_brg; + *IM_BRGC6 = lrclk_brg; # endif # if (LRCLK_BRG == 6) - *IM_BRGC7 = lrclk_brg; + *IM_BRGC7 = lrclk_brg; # endif # if (LRCLK_BRG == 7) - *IM_BRGC8 = lrclk_brg; + *IM_BRGC8 = lrclk_brg; # endif - - /* - * Clear reset on MCLK BRG - */ + + /* + * Clear reset on MCLK BRG + */ # if (MCLK_BRG == 0) - *IM_BRGC1 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC1 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 1) - *IM_BRGC2 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC2 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 2) - *IM_BRGC3 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC3 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 3) - *IM_BRGC4 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC4 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 4) - *IM_BRGC5 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC5 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 5) - *IM_BRGC6 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC6 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 6) - *IM_BRGC7 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC7 = mclk_brg & ~CPM_BRG_RST; # endif # if (MCLK_BRG == 7) - *IM_BRGC8 = mclk_brg & ~CPM_BRG_RST; + *IM_BRGC8 = mclk_brg & ~CPM_BRG_RST; # endif - /* - * Clear reset on SCLK BRG - */ + /* + * Clear reset on SCLK BRG + */ # if (SCLK_BRG == 0) - *IM_BRGC1 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC1 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 1) - *IM_BRGC2 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC2 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 2) - *IM_BRGC3 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC3 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 3) - *IM_BRGC4 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC4 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 4) - *IM_BRGC5 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC5 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 5) - *IM_BRGC6 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC6 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 6) - *IM_BRGC7 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC7 = sclk_brg & ~CPM_BRG_RST; # endif # if (SCLK_BRG == 7) - *IM_BRGC8 = sclk_brg & ~CPM_BRG_RST; + *IM_BRGC8 = sclk_brg & ~CPM_BRG_RST; # endif - /* - * Clear reset on LRCLK BRG - */ + /* + * Clear reset on LRCLK BRG + */ # if (LRCLK_BRG == 0) - *IM_BRGC1 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC1 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 1) - *IM_BRGC2 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC2 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 2) - *IM_BRGC3 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC3 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 3) - *IM_BRGC4 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC4 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 4) - *IM_BRGC5 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC5 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 5) - *IM_BRGC6 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC6 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 6) - *IM_BRGC7 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC7 = lrclk_brg & ~CPM_BRG_RST; # endif # if (LRCLK_BRG == 7) - *IM_BRGC8 = lrclk_brg & ~CPM_BRG_RST; + *IM_BRGC8 = lrclk_brg & ~CPM_BRG_RST; # endif - + /* * Restore the Interrupt state */ if (flag) { - enable_interrupts(); + enable_interrupts(); } # else - /* - * Reset the clocks - */ - Daq_BRG_Reset(MCLK_BRG); - Daq_BRG_Reset(SCLK_BRG); - Daq_BRG_Reset(LRCLK_BRG); + /* + * Reset the clocks + */ + Daq_BRG_Reset(MCLK_BRG); + Daq_BRG_Reset(SCLK_BRG); + Daq_BRG_Reset(LRCLK_BRG); # endif } @@ -676,88 +676,88 @@ #endif # ifdef TIGHTEN_UP_BRG_TIMING - /* - * Obtain the enabled MCLK BRG value - */ + /* + * Obtain the enabled MCLK BRG value + */ # if (MCLK_BRG == 0) - mclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 1) - mclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 2) - mclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 3) - mclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 4) - mclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 5) - mclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 6) - mclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (MCLK_BRG == 7) - mclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; + mclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif - /* - * Obtain the enabled SCLK BRG value - */ + /* + * Obtain the enabled SCLK BRG value + */ # if (SCLK_BRG == 0) - sclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 1) - sclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 2) - sclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 3) - sclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 4) - sclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 5) - sclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 6) - sclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (SCLK_BRG == 7) - sclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; + sclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif - /* - * Obtain the enabled LRCLK BRG value - */ + /* + * Obtain the enabled LRCLK BRG value + */ # if (LRCLK_BRG == 0) - lrclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC1 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 1) - lrclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC2 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 2) - lrclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC3 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 3) - lrclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC4 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 4) - lrclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC5 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 5) - lrclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC6 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 6) - lrclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC7 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif # if (LRCLK_BRG == 7) - lrclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; + lrclk_brg = (*IM_BRGC8 & ~CPM_BRG_RST) | CPM_BRG_EN; # endif /* Save off the real LRCLK value */ @@ -767,15 +767,15 @@ sclk_cnt = ((sclk_brg & 0x00001FFE) >> 1) + 1; /* Compute the delay as a function of SCLK count */ - delay_cnt = ((sclk_cnt / 4) - 2) * 10 + 6; + delay_cnt = ((sclk_cnt / 4) - 2) * 10 + 6; if (DaqSampleRate == 43402) { delay_cnt++; } - /* Clear out the count */ + /* Clear out the count */ temp_lrclk_brg = sclk_brg & ~0x00001FFE; - /* Insert the count */ + /* Insert the count */ temp_lrclk_brg |= ((delay_cnt + (sclk_cnt / 2) - 1) << 1) & 0x00001FFE; /* @@ -783,116 +783,116 @@ */ flag = disable_interrupts(); - /* - * Enable MCLK BRG - */ + /* + * Enable MCLK BRG + */ # if (MCLK_BRG == 0) - *IM_BRGC1 = mclk_brg; + *IM_BRGC1 = mclk_brg; # endif # if (MCLK_BRG == 1) - *IM_BRGC2 = mclk_brg; + *IM_BRGC2 = mclk_brg; # endif # if (MCLK_BRG == 2) - *IM_BRGC3 = mclk_brg; + *IM_BRGC3 = mclk_brg; # endif # if (MCLK_BRG == 3) - *IM_BRGC4 = mclk_brg; + *IM_BRGC4 = mclk_brg; # endif # if (MCLK_BRG == 4) - *IM_BRGC5 = mclk_brg; + *IM_BRGC5 = mclk_brg; # endif # if (MCLK_BRG == 5) - *IM_BRGC6 = mclk_brg; + *IM_BRGC6 = mclk_brg; # endif # if (MCLK_BRG == 6) - *IM_BRGC7 = mclk_brg; + *IM_BRGC7 = mclk_brg; # endif # if (MCLK_BRG == 7) - *IM_BRGC8 = mclk_brg; + *IM_BRGC8 = mclk_brg; # endif - /* - * Enable SCLK BRG - */ + /* + * Enable SCLK BRG + */ # if (SCLK_BRG == 0) - *IM_BRGC1 = sclk_brg; + *IM_BRGC1 = sclk_brg; # endif # if (SCLK_BRG == 1) - *IM_BRGC2 = sclk_brg; + *IM_BRGC2 = sclk_brg; # endif # if (SCLK_BRG == 2) - *IM_BRGC3 = sclk_brg; + *IM_BRGC3 = sclk_brg; # endif # if (SCLK_BRG == 3) - *IM_BRGC4 = sclk_brg; + *IM_BRGC4 = sclk_brg; # endif # if (SCLK_BRG == 4) - *IM_BRGC5 = sclk_brg; + *IM_BRGC5 = sclk_brg; # endif # if (SCLK_BRG == 5) - *IM_BRGC6 = sclk_brg; + *IM_BRGC6 = sclk_brg; # endif # if (SCLK_BRG == 6) - *IM_BRGC7 = sclk_brg; + *IM_BRGC7 = sclk_brg; # endif # if (SCLK_BRG == 7) - *IM_BRGC8 = sclk_brg; + *IM_BRGC8 = sclk_brg; # endif - /* - * Enable LRCLK BRG (1st time - temporary) - */ + /* + * Enable LRCLK BRG (1st time - temporary) + */ # if (LRCLK_BRG == 0) - *IM_BRGC1 = temp_lrclk_brg; + *IM_BRGC1 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 1) - *IM_BRGC2 = temp_lrclk_brg; + *IM_BRGC2 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 2) - *IM_BRGC3 = temp_lrclk_brg; + *IM_BRGC3 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 3) - *IM_BRGC4 = temp_lrclk_brg; + *IM_BRGC4 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 4) - *IM_BRGC5 = temp_lrclk_brg; + *IM_BRGC5 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 5) - *IM_BRGC6 = temp_lrclk_brg; + *IM_BRGC6 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 6) - *IM_BRGC7 = temp_lrclk_brg; + *IM_BRGC7 = temp_lrclk_brg; # endif # if (LRCLK_BRG == 7) - *IM_BRGC8 = temp_lrclk_brg; + *IM_BRGC8 = temp_lrclk_brg; # endif - - /* - * Enable LRCLK BRG (2nd time - permanent) - */ + + /* + * Enable LRCLK BRG (2nd time - permanent) + */ # if (LRCLK_BRG == 0) - *IM_BRGC1 = real_lrclk_brg; + *IM_BRGC1 = real_lrclk_brg; # endif # if (LRCLK_BRG == 1) - *IM_BRGC2 = real_lrclk_brg; + *IM_BRGC2 = real_lrclk_brg; # endif # if (LRCLK_BRG == 2) - *IM_BRGC3 = real_lrclk_brg; + *IM_BRGC3 = real_lrclk_brg; # endif # if (LRCLK_BRG == 3) - *IM_BRGC4 = real_lrclk_brg; + *IM_BRGC4 = real_lrclk_brg; # endif # if (LRCLK_BRG == 4) - *IM_BRGC5 = real_lrclk_brg; + *IM_BRGC5 = real_lrclk_brg; # endif # if (LRCLK_BRG == 5) - *IM_BRGC6 = real_lrclk_brg; + *IM_BRGC6 = real_lrclk_brg; # endif # if (LRCLK_BRG == 6) - *IM_BRGC7 = real_lrclk_brg; + *IM_BRGC7 = real_lrclk_brg; # endif # if (LRCLK_BRG == 7) - *IM_BRGC8 = real_lrclk_brg; + *IM_BRGC8 = real_lrclk_brg; # endif /* @@ -900,14 +900,14 @@ */ if (flag) { enable_interrupts(); - } + } # else - /* - * Enable the clocks - */ - Daq_BRG_Enable(LRCLK_BRG); - Daq_BRG_Enable(SCLK_BRG); - Daq_BRG_Enable(MCLK_BRG); + /* + * Enable the clocks + */ + Daq_BRG_Enable(LRCLK_BRG); + Daq_BRG_Enable(SCLK_BRG); + Daq_BRG_Enable(MCLK_BRG); # endif } @@ -920,7 +920,7 @@ printf("\nBRG:\n"); if (immr->im_brgc4 != 0) { - printf("\tbrgc4\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, MCLK\n", + printf("\tbrgc4\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, MCLK\n", immr->im_brgc4, (uint)&(immr->im_brgc4), Daq_BRG_Get_Count(3), @@ -928,7 +928,7 @@ Daq_BRG_Get_ExtClk_Description(3)); } if (immr->im_brgc8 != 0) { - printf("\tbrgc8\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCLK\n", + printf("\tbrgc8\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCLK\n", immr->im_brgc8, (uint)&(immr->im_brgc8), Daq_BRG_Get_Count(7), @@ -936,7 +936,7 @@ Daq_BRG_Get_ExtClk_Description(7)); } if (immr->im_brgc6 != 0) { - printf("\tbrgc6\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, LRCLK\n", + printf("\tbrgc6\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, LRCLK\n", immr->im_brgc6, (uint)&(immr->im_brgc6), Daq_BRG_Get_Count(5), @@ -944,7 +944,7 @@ Daq_BRG_Get_ExtClk_Description(5)); } if (immr->im_brgc1 != 0) { - printf("\tbrgc1\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC1\n", + printf("\tbrgc1\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC1\n", immr->im_brgc1, (uint)&(immr->im_brgc1), Daq_BRG_Get_Count(0), @@ -952,7 +952,7 @@ Daq_BRG_Get_ExtClk_Description(0)); } if (immr->im_brgc2 != 0) { - printf("\tbrgc2\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC2\n", + printf("\tbrgc2\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SMC2\n", immr->im_brgc2, (uint)&(immr->im_brgc2), Daq_BRG_Get_Count(1), @@ -960,7 +960,7 @@ Daq_BRG_Get_ExtClk_Description(1)); } if (immr->im_brgc3 != 0) { - printf("\tbrgc3\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCC1\n", + printf("\tbrgc3\t0x%08x @ 0x%08x, %5d count, %d extc, %8s, SCC1\n", immr->im_brgc3, (uint)&(immr->im_brgc3), Daq_BRG_Get_Count(2), @@ -968,7 +968,7 @@ Daq_BRG_Get_ExtClk_Description(2)); } if (immr->im_brgc5 != 0) { - printf("\tbrgc5\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n", + printf("\tbrgc5\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n", immr->im_brgc5, (uint)&(immr->im_brgc5), Daq_BRG_Get_Count(4), @@ -976,7 +976,7 @@ Daq_BRG_Get_ExtClk_Description(4)); } if (immr->im_brgc7 != 0) { - printf("\tbrgc7\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n", + printf("\tbrgc7\t0x%08x @ 0x%08x, %5d count, %d extc, %8s\n", immr->im_brgc7, (uint)&(immr->im_brgc7), Daq_BRG_Get_Count(6), @@ -985,14 +985,14 @@ } # ifdef RUN_SCLK_ON_BRG_INT - mclk_divisor = Daq_BRG_Rate(MCLK_BRG) / Daq_BRG_Rate(SCLK_BRG); + mclk_divisor = Daq_BRG_Rate(MCLK_BRG) / Daq_BRG_Rate(SCLK_BRG); # else - mclk_divisor = Daq_BRG_Get_Count(SCLK_BRG); + mclk_divisor = Daq_BRG_Get_Count(SCLK_BRG); # endif # ifdef RUN_LRCLK_ON_BRG_INT - sclk_divisor = Daq_BRG_Rate(SCLK_BRG) / Daq_BRG_Rate(LRCLK_BRG); + sclk_divisor = Daq_BRG_Rate(SCLK_BRG) / Daq_BRG_Rate(LRCLK_BRG); # else - sclk_divisor = Daq_BRG_Get_Count(LRCLK_BRG); + sclk_divisor = Daq_BRG_Get_Count(LRCLK_BRG); # endif printf("\nADC/DAC Clocking (%d/%d):\n", sclk_divisor, mclk_divisor); @@ -1001,23 +1001,23 @@ mclk_divisor, mclk_divisor * sclk_divisor); # ifdef RUN_SCLK_ON_BRG_INT - printf("\tSCLK %8d Hz, or %3dx LRCLK\n", + printf("\tSCLK %8d Hz, or %3dx LRCLK\n", Daq_BRG_Rate(SCLK_BRG), sclk_divisor); # else - printf("\tSCLK %8d Hz, or %3dx LRCLK\n", + printf("\tSCLK %8d Hz, or %3dx LRCLK\n", Daq_BRG_Rate(MCLK_BRG) / mclk_divisor, sclk_divisor); # endif # ifdef RUN_LRCLK_ON_BRG_INT - printf("\tLRCLK %8d Hz\n", + printf("\tLRCLK %8d Hz\n", Daq_BRG_Rate(LRCLK_BRG)); # else # ifdef RUN_SCLK_ON_BRG_INT - printf("\tLRCLK %8d Hz\n", + printf("\tLRCLK %8d Hz\n", Daq_BRG_Rate(SCLK_BRG) / sclk_divisor); # else - printf("\tLRCLK %8d Hz\n", + printf("\tLRCLK %8d Hz\n", Daq_BRG_Rate(MCLK_BRG) / (mclk_divisor * sclk_divisor)); # endif # endif diff --git a/board/sacsng/clkinit.h b/board/sacsng/clkinit.h index 2731f2e..011638f 100644 --- a/board/sacsng/clkinit.h +++ b/board/sacsng/clkinit.h @@ -50,16 +50,16 @@ #define MCLK_DIVISOR 4 /* SCLK = MCLK / MCLK_DIVISOR */ #define SCLK_DIVISOR (Daq64xSampling ? 64 : 128) - /* LRCLK = SCLK / SCLK_DIVISOR */ + /* LRCLK = SCLK / SCLK_DIVISOR */ #define TIGHTEN_UP_BRG_EN_TIMING /* Tighten up the BRG enable timing */ #define RUN_SCLK_ON_BRG_INT /* Run SCLK on BRG_INT instead of MCLK */ - /* The 8260 (Mask B.3) seems to have */ - /* problems generating SCLK from MCLK */ + /* The 8260 (Mask B.3) seems to have */ + /* problems generating SCLK from MCLK */ /* via CLK9. */ #define RUN_LRCLK_ON_BRG_INT /* Run LRCLK on BRG_INT instead of SCLK */ - /* The 8260 (Mask B.3) seems to have */ - /* problems generating LRCLK from SCLK */ + /* The 8260 (Mask B.3) seems to have */ + /* problems generating LRCLK from SCLK */ #define NUM_LRCLKS_TO_STABILIZE 1 /* Number of LRCLK period (sample) */ /* to wait for the clock to stabilize */ @@ -67,9 +67,9 @@ #define CPM_CLK (gd->bd->bi_cpmfreq) #define DFBRG 4 #define BRG_INT_CLK (CPM_CLK * 2 / DFBRG) - /* BRG = CPM * 2 / DFBRG (Sect 9.8) */ - /* BRG = CPM * 2 / 4 */ - /* BRG = CPM / 2 */ + /* BRG = CPM * 2 / DFBRG (Sect 9.8) */ + /* BRG = CPM * 2 / 4 */ + /* BRG = CPM / 2 */ #define CPM_BRG_EXTC_MASK ((uint)0x0000C000) #define CPM_BRG_EXTC_SHIFT 14 diff --git a/board/sacsng/ioconfig.h b/board/sacsng/ioconfig.h index 6857f99..be1ce7c 100644 --- a/board/sacsng/ioconfig.h +++ b/board/sacsng/ioconfig.h @@ -45,7 +45,7 @@ #define GPIO 0 /* PPARx 0: General Purpose I/O */ #define SPEC 1 /* PPARx 1: dedicated to a peripheral function, */ - /* i.e. the port has a SPECial use. */ + /* i.e. the port has a SPECial use. */ #define ACTV 0 /* PODRx 0: ACTiVely driven as an output */ #define OPEN 1 /* PODRx 1: OPEN-drain driver */ @@ -67,12 +67,12 @@ /* PA21 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* STLED1_EN* */ /* PA20 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* PLED3_EN* */ /* PA19 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* PLED2_EN* */ - /* PA18 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* PLED1_EN* */ + /* PA18 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* PLED1_EN* */ /* PA17 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */ /* PA16 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* DAC_RST* */ /* PA15 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* CH34SDATA_PU */ - /* PA14 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* CH12SDATA_PU */ - /* PA13 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* SLRCLK_EN* */ + /* PA14 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* CH12SDATA_PU */ + /* PA13 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* SLRCLK_EN* */ /* PA12 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_4ACDC* */ /* PA11 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_4TEDS* */ /* PA10 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* MTRX_4XTDS* */ @@ -143,7 +143,7 @@ /* PC20 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */ /* PC19 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* CLK13, MII_RXCLK */ /* PC18 */ { CONF, SPEC, 0, DIN, ACTV, 0 }, /* CLK14, MII_TXCLK */ - /* PC17 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* BRGO8 (SCLK) */ + /* PC17 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* BRGO8 (SCLK) */ /* PC16 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */ /* PC15 */ { CONF, SPEC, 0, DOUT, ACTV, 0 }, /* SMC2_TX */ /* PC14 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */ @@ -156,11 +156,11 @@ /* PC7 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* BPDIS_IN1 */ /* PC6 */ { CONF, GPIO, 0, DOUT, ACTV, 0 }, /* N/C */ /* PC5 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* BTST_IN2* */ - /* PC4 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* BTST_IN1* */ + /* PC4 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* BTST_IN1* */ /* PC3 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* MUSH_STAT */ /* PC2 */ { CONF, GPIO, 0, DIN, ACTV, 0 }, /* OUTDRV_STAT */ /* PC1 */ { CONF, GPIO, 0, DOUT, OPEN, 1 }, /* PHY_MDIO */ - /* PC0 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* PHY_MDC */ + /* PC0 */ { CONF, GPIO, 0, DOUT, ACTV, 1 }, /* PHY_MDC */ }, /* Port D */ @@ -215,4 +215,3 @@ /* PD0 */ { SKIP, GPIO, 0, DIN, ACTV, 0 } /* pin doesn't exist */ } }; - diff --git a/board/sacsng/sacsng.c b/board/sacsng/sacsng.c index 19dbb97..086e42a 100644 --- a/board/sacsng/sacsng.c +++ b/board/sacsng/sacsng.c @@ -75,7 +75,7 @@ #define ADC_INITIAL_DELAY (10 * ADC_VREF_CAP) /* 10 usec per uF, in usec */ #define ADC_SDATA_DELAY 100 /* ADC SDATA release delay in usec */ #define ADC_CAL_DELAY (1000000 / INITIAL_SAMPLE_RATE * 4500) - /* Wait at least 4100 LRCLK's */ + /* Wait at least 4100 LRCLK's */ #define ADC_REG1_FRAME_START 0x80 /* Frame start */ #define ADC_REG1_GROUND_CAL 0x40 /* Ground calibration enable */ @@ -201,17 +201,17 @@ else if(j == 4) cols = data & 0x0F; else if(j == 12) { /* - * Refresh rate: this assumes the prescaler is set to + * Refresh rate: this assumes the prescaler is set to * approximately 1uSec per tick. */ switch(data & 0x7F) { - default: - case 0: psrt = 14 ; /* 15.625uS */ break; - case 1: psrt = 2; /* 3.9uS */ break; - case 2: psrt = 6; /* 7.8uS */ break; - case 3: psrt = 29; /* 31.3uS */ break; - case 4: psrt = 60; /* 62.5uS */ break; - case 5: psrt = 120; /* 125uS */ break; + default: + case 0: psrt = 14 ; /* 15.625uS */ break; + case 1: psrt = 2; /* 3.9uS */ break; + case 2: psrt = 6; /* 7.8uS */ break; + case 3: psrt = 29; /* 31.3uS */ break; + case 4: psrt = 60; /* 62.5uS */ break; + case 5: psrt = 120; /* 125uS */ break; } } else if(j == 17) banks = data; @@ -228,13 +228,13 @@ #endif else { printf ("WARNING: Unknown CAS latency 0x%02X, using 3\n", - data); + data); } } else if(j == 63) { if(data != cksum) { printf ("WARNING: Configuration data checksum failure:" - " is 0x%02x, calculated 0x%02x\n", + " is 0x%02x, calculated 0x%02x\n", data, cksum); } } @@ -309,7 +309,7 @@ PSDMR_ACTTORW_8W |\ PSDMR_WRC_4C |\ PSDMR_EAMUX |\ - PSDMR_BUFCMD) |\ + PSDMR_BUFCMD) |\ caslatency |\ ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \ (sdam << 24) |\ @@ -323,7 +323,7 @@ PSDMR_ACTTORW_2W | /* 1 for 7E parts (fast PC-133) */ \ PSDMR_WRC_1C | /* 1 clock + 7nSec */ EAMUX |\ - BUFCMD) |\ + BUFCMD) |\ caslatency |\ ((caslatency - 1) << 6) | /* LDOTOPRE is CL - 1 */ \ (sdam << 24) |\ @@ -400,7 +400,7 @@ * two chip selects (double sided). */ if(chipselects > 1) { - ramaddr += sdram_size; + ramaddr += sdram_size; memctl->memc_br3 = CFG_BR3_PRELIM + sdram_size; memctl->memc_or3 = or; @@ -459,13 +459,13 @@ sample_rate = INITIAL_SAMPLE_RATE; if ((ep = getenv("DaqSampleRate")) != NULL) { - sample_rate = simple_strtol(ep, NULL, 10); + sample_rate = simple_strtol(ep, NULL, 10); } sample_64x = INITIAL_SAMPLE_64X; sample_128x = INITIAL_SAMPLE_128X; if ((ep = getenv("Daq64xSampling")) != NULL) { - sample_64x = simple_strtol(ep, NULL, 10); + sample_64x = simple_strtol(ep, NULL, 10); if (sample_64x) { sample_128x = 0; } @@ -474,18 +474,18 @@ } } else { - if ((ep = getenv("Daq128xSampling")) != NULL) { + if ((ep = getenv("Daq128xSampling")) != NULL) { sample_128x = simple_strtol(ep, NULL, 10); if (sample_128x) { - sample_64x = 0; + sample_64x = 0; } else { - sample_64x = 1; + sample_64x = 1; } } } - /* + /* * Stop the clocks and wait for at least 1 LRCLK period * to make sure the clocking has really stopped. */ @@ -509,12 +509,12 @@ setenv("DaqSampleRate", str_buf); if (sample_64x) { - setenv("Daq64xSampling", "1"); - setenv("Daq128xSampling", NULL); + setenv("Daq64xSampling", "1"); + setenv("Daq128xSampling", NULL); } else { - setenv("Daq64xSampling", NULL); - setenv("Daq128xSampling", "1"); + setenv("Daq64xSampling", NULL); + setenv("Daq128xSampling", "1"); } /* Display the ADC/DAC clocking information */ @@ -526,7 +526,7 @@ right_just = INITIAL_RIGHT_JUST; if ((ep = getenv("DaqDACRightJustified")) != NULL) { - right_just = simple_strtol(ep, NULL, 10); + right_just = simple_strtol(ep, NULL, 10); } sprintf(str_buf, "%d", right_just); @@ -538,7 +538,7 @@ mclk_divide = INITIAL_MCLK_DIVIDE; if ((ep = getenv("DaqDACMClockDivide")) != NULL) { - mclk_divide = simple_strtol(ep, NULL, 10); + mclk_divide = simple_strtol(ep, NULL, 10); } sprintf(str_buf, "%d", mclk_divide); @@ -666,7 +666,7 @@ */ i2c_reg_write(I2C_DAC_ADDR, 0x01, (right_just ? DAC_REG1_RIGHT_JUST_24BIT : - DAC_REG1_LEFT_JUST_24_BIT) | + DAC_REG1_LEFT_JUST_24_BIT) | DAC_REG1_DEM_NO | (sample_rate >= 50000 ? DAC_REG1_DOUBLE : DAC_REG1_SINGLE)); @@ -724,7 +724,7 @@ * Recursively do upper digits. */ if(digits > 1) { - flash_code(number / modulo, modulo, digits - 1); + flash_code(number / modulo, modulo, digits - 1); } number = number % modulo; @@ -733,20 +733,20 @@ * Zero is indicated by one long flash (dash). */ if(number == 0) { - status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); - udelay(1000000); - status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); - udelay(200000); + status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); + udelay(1000000); + status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); + udelay(200000); } else { - /* - * Non-zero is indicated by short flashes, one per count. - */ - for(j = 0; j < number; j++) { - status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); - udelay(100000); - status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); - udelay(200000); - } + /* + * Non-zero is indicated by short flashes, one per count. + */ + for(j = 0; j < number; j++) { + status_led_set(STATUS_LED_BOOT, STATUS_LED_ON); + udelay(100000); + status_led_set(STATUS_LED_BOOT, STATUS_LED_OFF); + udelay(200000); + } } /* * Inter-digit pause: we've already waited 200 mSec, wait 1 sec total @@ -759,16 +759,16 @@ void show_boot_progress (int status) { if(status != -1) { - last_boot_progress = status; + last_boot_progress = status; } else { - /* - * Houston, we have a problem. Blink the last OK status which - * indicates where things failed. - */ - status_led_set(STATUS_LED_RED, STATUS_LED_ON); - flash_code(last_boot_progress, 5, 3); - udelay(1000000); - status_led_set(STATUS_LED_RED, STATUS_LED_BLINKING); + /* + * Houston, we have a problem. Blink the last OK status which + * indicates where things failed. + */ + status_led_set(STATUS_LED_RED, STATUS_LED_ON); + flash_code(last_boot_progress, 5, 3); + udelay(1000000); + status_led_set(STATUS_LED_RED, STATUS_LED_BLINKING); } } #endif /* CONFIG_SHOW_BOOT_PROGRESS */ diff --git a/board/sacsng/u-boot.lds b/board/sacsng/u-boot.lds index b4e502b..44224cb 100644 --- a/board/sacsng/u-boot.lds +++ b/board/sacsng/u-boot.lds @@ -93,6 +93,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -115,4 +120,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/sandpoint/Makefile b/board/sandpoint/Makefile index 0a4bf0d..d6bbf2f 100644 --- a/board/sandpoint/Makefile +++ b/board/sandpoint/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/sandpoint/early_init.S b/board/sandpoint/early_init.S index 127bd37..07dafb7 100644 --- a/board/sandpoint/early_init.S +++ b/board/sandpoint/early_init.S @@ -47,15 +47,15 @@ (CFG_REFREC << MCCR3_REFREC_SHIFT) | \ (CFG_RDLAT << MCCR3_RDLAT_SHIFT) .long MCCR4 - .long (CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \ + .long (CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | \ (CFG_REGISTERD_TYPE_BUFFER << 20) | \ - (((CFG_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \ - ((CFG_SDMODE_CAS_LAT << 4) | (CFG_SDMODE_WRAP << 3) | \ + (((CFG_BSTOPRE & 0x00000300) >> 8) << MCCR4_BSTOPRE0TO1_SHIFT ) | \ + ((CFG_SDMODE_CAS_LAT << 4) | (CFG_SDMODE_WRAP << 3) | \ (CFG_SDMODE_BURSTLEN) << MCCR4_SDMODE_SHIFT) | \ (CFG_ACTTORW << MCCR4_ACTTORW_SHIFT) | \ - ((CFG_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT ) + ((CFG_BSTOPRE & 0x0000000f) << MCCR4_BSTOPRE6TO9_SHIFT ) .long MSAR1 - .long (((CFG_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \ + .long (((CFG_BANK0_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \ (((CFG_BANK1_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \ (((CFG_BANK2_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \ (((CFG_BANK3_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24) @@ -65,7 +65,7 @@ (((CFG_BANK2_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \ (((CFG_BANK3_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24) .long MSAR2 - .long (((CFG_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \ + .long (((CFG_BANK4_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \ (((CFG_BANK5_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \ (((CFG_BANK6_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \ (((CFG_BANK7_START & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24) @@ -75,7 +75,7 @@ (((CFG_BANK6_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \ (((CFG_BANK7_START & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24) .long MEAR1 - .long (((CFG_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \ + .long (((CFG_BANK0_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \ (((CFG_BANK1_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \ (((CFG_BANK2_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \ (((CFG_BANK3_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24) @@ -85,7 +85,7 @@ (((CFG_BANK2_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 16) | \ (((CFG_BANK3_END & MICR_EADDR_MASK) >> MICR_EADDR_SHIFT) << 24) .long MEAR2 - .long (((CFG_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \ + .long (((CFG_BANK4_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 0) | \ (((CFG_BANK5_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 8) | \ (((CFG_BANK6_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 16) | \ (((CFG_BANK7_END & MICR_ADDR_MASK) >> MICR_ADDR_SHIFT) << 24) @@ -97,7 +97,6 @@ .long 0 - /* * Early CPU initialization. Set up memory controller, so we can access any RAM at all. This * must be done in assembly, since we have no stack at this point. @@ -151,4 +150,3 @@ mtlr r10 blr - diff --git a/board/sandpoint/flash.c b/board/sandpoint/flash.c index 4b6f2d0..a9f73ff 100644 --- a/board/sandpoint/flash.c +++ b/board/sandpoint/flash.c @@ -92,7 +92,6 @@ #endif /* 0 */ - static unsigned long flash_id(unsigned char mfct, unsigned char chip) { @@ -136,7 +135,6 @@ } - unsigned long flash_init(void) { @@ -190,9 +188,9 @@ switch(pflinfo->flash_id & FLASH_TYPEMASK) { case FLASH_AM040: - pflinfo->size = 0x00080000; + pflinfo->size = 0x00080000; pflinfo->sector_count = 8; - for(j = 0; j < 8; j++) + for(j = 0; j < 8; j++) { pflinfo->start[j] = base_address + 0x00010000 * j; pflinfo->protect[j] = flash[(j << 16) | 0x2]; @@ -210,16 +208,16 @@ pflinfo->start[j+3] = base_address + 0x00010000 * j; } #if 0 - /* check for protected sectors */ - for (j = 0; j < pflinfo->sector_count; j++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile FLASH_WORD_SIZE *)(pflinfo->start[j]); - if (pflinfo->flash_id & FLASH_MAN_SST) - pflinfo->protect[j] = 0; - else - pflinfo->protect[j] = addr2[2] & 1; - } + /* check for protected sectors */ + for (j = 0; j < pflinfo->sector_count; j++) { + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr2 = (volatile FLASH_WORD_SIZE *)(pflinfo->start[j]); + if (pflinfo->flash_id & FLASH_MAN_SST) + pflinfo->protect[j] = 0; + else + pflinfo->protect[j] = addr2[2] & 1; + } #endif break; } @@ -254,30 +252,30 @@ int i; /* set up sector start address table */ - if (info->flash_id & FLASH_MAN_SST) - { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } - else + if (info->flash_id & FLASH_MAN_SST) + { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } + else if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } } } @@ -376,7 +374,7 @@ short i; FLASH_WORD_SIZE value; ulong base = (ulong)addr; - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)addr; printf("flash_get_size: \n"); /* Write auto select command: read Manufacturer ID */ @@ -388,123 +386,123 @@ switch (value) { case (FLASH_WORD_SIZE)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; + info->flash_id = FLASH_MAN_AMD; + break; case (FLASH_WORD_SIZE)FUJ_MANUFACT: - info->flash_id = FLASH_MAN_FUJ; - break; + info->flash_id = FLASH_MAN_FUJ; + break; case (FLASH_WORD_SIZE)SST_MANUFACT: - info->flash_id = FLASH_MAN_SST; - break; + info->flash_id = FLASH_MAN_SST; + break; default: - info->flash_id = FLASH_UNKNOWN; - info->sector_count = 0; - info->size = 0; - return (0); /* no or unknown flash */ + info->flash_id = FLASH_UNKNOWN; + info->sector_count = 0; + info->size = 0; + return (0); /* no or unknown flash */ } printf("recognised manufacturer"); value = addr2[ADDR3]; /* device ID */ - debug ("\ndev_code=%x\n", value); + debug ("\ndev_code=%x\n", value); switch (value) { case (FLASH_WORD_SIZE)AMD_ID_LV400T: - info->flash_id += FLASH_AM400T; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ + info->flash_id += FLASH_AM400T; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV400B: - info->flash_id += FLASH_AM400B; - info->sector_count = 11; - info->size = 0x00080000; - break; /* => 0.5 MB */ + info->flash_id += FLASH_AM400B; + info->sector_count = 11; + info->size = 0x00080000; + break; /* => 0.5 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV800T: - info->flash_id += FLASH_AM800T; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ + info->flash_id += FLASH_AM800T; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV800B: - info->flash_id += FLASH_AM800B; - info->sector_count = 19; - info->size = 0x00100000; - break; /* => 1 MB */ + info->flash_id += FLASH_AM800B; + info->sector_count = 19; + info->size = 0x00100000; + break; /* => 1 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV160T: - info->flash_id += FLASH_AM160T; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ + info->flash_id += FLASH_AM160T; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ case (FLASH_WORD_SIZE)AMD_ID_LV160B: - info->flash_id += FLASH_AM160B; - info->sector_count = 35; - info->size = 0x00200000; - break; /* => 2 MB */ + info->flash_id += FLASH_AM160B; + info->sector_count = 35; + info->size = 0x00200000; + break; /* => 2 MB */ case (FLASH_WORD_SIZE)SST_ID_xF800A: - info->flash_id += FLASH_SST800A; - info->sector_count = 16; - info->size = 0x00100000; - break; /* => 1 MB */ + info->flash_id += FLASH_SST800A; + info->sector_count = 16; + info->size = 0x00100000; + break; /* => 1 MB */ case (FLASH_WORD_SIZE)SST_ID_xF160A: - info->flash_id += FLASH_SST160A; - info->sector_count = 32; - info->size = 0x00200000; - break; /* => 2 MB */ + info->flash_id += FLASH_SST160A; + info->sector_count = 32; + info->size = 0x00200000; + break; /* => 2 MB */ case (FLASH_WORD_SIZE)AMD_ID_F040B: - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 0.5 MB */ + info->flash_id += FLASH_AM040; + info->sector_count = 8; + info->size = 0x00080000; + break; /* => 0.5 MB */ default: - info->flash_id = FLASH_UNKNOWN; - return (0); /* => no or unknown flash */ + info->flash_id = FLASH_UNKNOWN; + return (0); /* => no or unknown flash */ } printf("flash id %lx; sector count %x, size %lx\n", info->flash_id,info->sector_count,info->size); /* set up sector start address table */ - if (info->flash_id & FLASH_MAN_SST) - { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - } - else + if (info->flash_id & FLASH_MAN_SST) + { + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + } + else if (info->flash_id & FLASH_BTYPE) { - /* set sector offsets for bottom boot block type */ - info->start[0] = base + 0x00000000; - info->start[1] = base + 0x00004000; - info->start[2] = base + 0x00006000; - info->start[3] = base + 0x00008000; - for (i = 4; i < info->sector_count; i++) { - info->start[i] = base + (i * 0x00010000) - 0x00030000; - } + /* set sector offsets for bottom boot block type */ + info->start[0] = base + 0x00000000; + info->start[1] = base + 0x00004000; + info->start[2] = base + 0x00006000; + info->start[3] = base + 0x00008000; + for (i = 4; i < info->sector_count; i++) { + info->start[i] = base + (i * 0x00010000) - 0x00030000; + } } else { - /* set sector offsets for top boot block type */ - i = info->sector_count - 1; - info->start[i--] = base + info->size - 0x00004000; - info->start[i--] = base + info->size - 0x00006000; - info->start[i--] = base + info->size - 0x00008000; - for (; i >= 0; i--) { - info->start[i] = base + i * 0x00010000; - } + /* set sector offsets for top boot block type */ + i = info->sector_count - 1; + info->start[i--] = base + info->size - 0x00004000; + info->start[i--] = base + info->size - 0x00006000; + info->start[i--] = base + info->size - 0x00008000; + for (; i >= 0; i--) { + info->start[i] = base + i * 0x00010000; + } } /* check for protected sectors */ for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (A7 .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); - if (info->flash_id & FLASH_MAN_SST) - info->protect[i] = 0; - else - info->protect[i] = addr2[2] & 1; + /* read sector protection at sector address, (A7 .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); + if (info->flash_id & FLASH_MAN_SST) + info->protect[i] = 0; + else + info->protect[i] = addr2[2] & 1; } /* @@ -512,7 +510,7 @@ */ if (info->flash_id != FLASH_UNKNOWN) { addr2 = (FLASH_WORD_SIZE *)info->start[0]; - *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ + *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ } return (info->size); @@ -530,32 +528,32 @@ unsigned char sh8b; if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) { - printf ("- missing\n"); - } else { - printf ("- no sectors to erase\n"); - } - return 1; + if (info->flash_id == FLASH_UNKNOWN) { + printf ("- missing\n"); + } else { + printf ("- no sectors to erase\n"); + } + return 1; } if ((info->flash_id == FLASH_UNKNOWN) || - (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; + (info->flash_id > (FLASH_MAN_STM | FLASH_AMD_COMP))) { + printf ("Can't erase unknown flash type - aborted\n"); + return 1; } prot = 0; for (sect=s_first; sect<=s_last; ++sect) { - if (info->protect[sect]) { - prot++; - } + if (info->protect[sect]) { + prot++; + } } if (prot) { - printf ("- Warning: %d protected sectors will not be erased!\n", - prot); + printf ("- Warning: %d protected sectors will not be erased!\n", + prot); } else { - printf ("\n"); + printf ("\n"); } l_sect = -1; @@ -577,28 +575,28 @@ /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - addr = (FLASH_WORD_SIZE *)(info->start[0] + ( + if (info->protect[sect] == 0) { /* not protected */ + addr = (FLASH_WORD_SIZE *)(info->start[0] + ( (info->start[sect] - info->start[0]) << sh8b)); - if (info->flash_id & FLASH_MAN_SST) - { - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080; - addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ - udelay(30000); /* wait 30 ms */ - } - else - addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ - l_sect = sect; - } + if (info->flash_id & FLASH_MAN_SST) + { + addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; + addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00800080; + addr[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; + addr[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; + addr[0] = (FLASH_WORD_SIZE)0x00500050; /* block erase */ + udelay(30000); /* wait 30 ms */ + } + else + addr[0] = (FLASH_WORD_SIZE)0x00300030; /* sector erase */ + l_sect = sect; + } } /* re-enable interrupts if necessary */ if (flag) - enable_interrupts(); + enable_interrupts(); /* wait at least 80us - let's wait 1 ms */ udelay (1000); @@ -607,22 +605,22 @@ * We wait for the last triggered sector */ if (l_sect < 0) - goto DONE; + goto DONE; start = get_timer (0); last = start; addr = (FLASH_WORD_SIZE *)(info->start[0] + ( (info->start[l_sect] - info->start[0]) << sh8b)); while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return 1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - serial_putc ('.'); - last = now; - } + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return 1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + serial_putc ('.'); + last = now; + } } DONE: @@ -652,42 +650,42 @@ * handle unaligned start bytes */ if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } + data = 0; + for (i=0, cp=wp; i0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; } /* * handle word aligned part */ while (cnt >= 4) { - data = 0; - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_word(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; } if (cnt == 0) { - return (0); + return (0); } /* @@ -695,11 +693,11 @@ */ data = 0; for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; + data = (data << 8) | *src++; + --cnt; } for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + data = (data << 8) | (*(uchar *)cp); } return (write_word(info, wp, data)); @@ -713,12 +711,12 @@ */ static int write_word (flash_info_t *info, ulong dest, ulong data) { - volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0]; - volatile FLASH_WORD_SIZE *dest2; - volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; + volatile FLASH_WORD_SIZE *addr2 = (FLASH_WORD_SIZE *)info->start[0]; + volatile FLASH_WORD_SIZE *dest2; + volatile FLASH_WORD_SIZE *data2 = (FLASH_WORD_SIZE *)&data; ulong start; int flag; - int i; + int i; unsigned char sh8b; /* Check the ROM CS */ @@ -732,32 +730,32 @@ /* Check if Flash is (sufficiently) erased */ if ((*dest2 & (FLASH_WORD_SIZE)data) != (FLASH_WORD_SIZE)data) { - return (2); + return (2); } /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) - { - addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; - addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; - addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00A000A0; + for (i=0; i<4/sizeof(FLASH_WORD_SIZE); i++) + { + addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00AA00AA; + addr2[ADDR1 << sh8b] = (FLASH_WORD_SIZE)0x00550055; + addr2[ADDR0 << sh8b] = (FLASH_WORD_SIZE)0x00A000A0; - dest2[i << sh8b] = data2[i]; + dest2[i << sh8b] = data2[i]; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* data polling for D7 */ - start = get_timer (0); - while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) != - (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - return (1); - } - } - } + /* data polling for D7 */ + start = get_timer (0); + while ((dest2[i << sh8b] & (FLASH_WORD_SIZE)0x00800080) != + (data2[i] & (FLASH_WORD_SIZE)0x00800080)) { + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + return (1); + } + } + } return (0); } diff --git a/board/sandpoint/u-boot.lds b/board/sandpoint/u-boot.lds index 0e0b0e6..db89a78 100644 --- a/board/sandpoint/u-boot.lds +++ b/board/sandpoint/u-boot.lds @@ -100,6 +100,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -123,4 +128,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/sandpoint/u-boot.lds.mw.debug b/board/sandpoint/u-boot.lds.mw.debug deleted file mode 100644 index a0378cb..0000000 --- a/board/sandpoint/u-boot.lds.mw.debug +++ /dev/null @@ -1,101 +0,0 @@ -/* - * (C) Copyright 2000 - * Rob Taylor, Flying Pig Systems Ltd. robt@flyingpig.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -OUTPUT_ARCH(powerpc) -SEARCH_DIR(/lib); SEARCH_DIR(/usr/lib); SEARCH_DIR(/usr/local/lib); SEARCH_DIR(/usr/local/powerpc-any-elf/lib); - -MEMORY { - ram (!rx) : org = 0x00000000 , LENGTH = 8M - code (!rx) : org = 0x00002000 , LENGTH = (4M - 0x2000) - rom (rx) : org = 0xfe000000 , LENGTH = (0x100000000 - 0xfe000000) -} - -SECTIONS -{ - _f_init = .; - PROVIDE(_f_init = .); - _f_init_rom = .; - PROVIDE(_f_init_rom = .); - - .init : { - cpu/mpc824x/start.o (.text) - *(.init) - } > ram - _init_size = SIZEOF(.init); - PROVIDE(_init_size = SIZEOF(.init)); - - ENTRY(_start) - -/* _ftext = .; - _ftext_rom = .; - _text_size = SIZEOF(.text); - */ - .text : { - *(.text) - *(.got1) - } > ram - .rodata : { *(.rodata) } > ram - .dtors : { *(.dtors) } > ram - .data : { *(.data) } > ram - .sdata : { *(.sdata) } > ram - .sdata2 : { *(.sdata2) - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } > ram - __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2; - __fixup_entries = (. - _FIXUP_TABLE_)>>2; - - .sbss : { *(.sbss) } > ram - .sbss2 : { *(.sbss2) } > ram - .bss : { *(.bss) } > ram - .debug : { *(.debug) } > ram - .line : { *(.line) } > ram - .symtab : { *(.symtab) } > ram - .shrstrtab : { *(.shstrtab) } > ram - .strtab : { *(.strtab) } > ram - /* .reloc : - { - *(.got) - _GOT2_TABLE_ = .; - *(.got2) - _FIXUP_TABLE_ = .; - *(.fixup) - } > ram - */ - __start___ex_table = .; - __ex_table : { *(__ex_table) } > ram - __stop___ex_table = .; - - - .ppcenv : - { - common/environment.o (.ppcenv) - } > ram - - _end = . ; - PROVIDE (end = .); -} - diff --git a/board/sbc8260/Makefile b/board/sbc8260/Makefile index 25c3bc1..14ed457 100644 --- a/board/sbc8260/Makefile +++ b/board/sbc8260/Makefile @@ -28,7 +28,7 @@ OBJS := sbc8260.o flash.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/sbc8260/u-boot.lds b/board/sbc8260/u-boot.lds index b4e502b..44224cb 100644 --- a/board/sbc8260/u-boot.lds +++ b/board/sbc8260/u-boot.lds @@ -93,6 +93,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -115,4 +120,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/sc520_cdp/Makefile b/board/sc520_cdp/Makefile index 0f50393..f9a36f9 100644 --- a/board/sc520_cdp/Makefile +++ b/board/sc520_cdp/Makefile @@ -25,11 +25,11 @@ LIB = lib$(BOARD).a -OBJS := sc520_cdp.o flash.o +OBJS := sc520_cdp.o flash.o SOBJS := sc520_cdp_asm.o sc520_cdp_asm16.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/sc520_cdp/flash.c b/board/sc520_cdp/flash.c index 1ebb32e..a4d37e5 100644 --- a/board/sc520_cdp/flash.c +++ b/board/sc520_cdp/flash.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2002, 2003 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Alex Zuepke @@ -55,122 +55,121 @@ static u32 _probe_flash(u32 addr, u32 bw, int il) { u32 result=0; - + /* First do an unlock cycle for the benefit of * devices that need it */ - + switch (bw) { - + case 1: *(volatile u8*)(addr+0x5555) = 0xaa; *(volatile u8*)(addr+0x2aaa) = 0x55; *(volatile u8*)(addr+0x5555) = 0x90; - + /* Read vendor */ result = *(volatile u8*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u8*)(addr+2); - + /* Return device to data mode */ *(volatile u8*)addr = 0xff; - *(volatile u8*)(addr+0x5555), 0xf0; + *(volatile u8*)(addr+0x5555), 0xf0; break; - + case 2: *(volatile u16*)(addr+0xaaaa) = 0xaaaa; *(volatile u16*)(addr+0x5554) = 0x5555; - + /* Issue identification command */ if (il == 2) { *(volatile u16*)(addr+0xaaaa) = 0x9090; - + /* Read vendor */ result = *(volatile u8*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u8*)(addr+2); - + /* Return device to data mode */ *(volatile u16*)addr = 0xffff; - *(volatile u16*)(addr+0xaaaa), 0xf0f0; - + *(volatile u16*)(addr+0xaaaa), 0xf0f0; + } else { *(volatile u8*)(addr+0xaaaa) = 0x90; /* Read vendor */ result = *(volatile u16*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u16*)(addr+2); - + /* Return device to data mode */ *(volatile u8*)addr = 0xff; - *(volatile u8*)(addr+0xaaaa), 0xf0; + *(volatile u8*)(addr+0xaaaa), 0xf0; } - + break; - + case 4: *(volatile u32*)(addr+0x5554) = 0xaaaaaaaa; *(volatile u32*)(addr+0xaaa8) = 0x55555555; - + switch (il) { case 1: /* Issue identification command */ *(volatile u8*)(addr+0x5554) = 0x90; - + /* Read vendor */ result = *(volatile u16*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u16*)(addr+4); - + /* Return device to data mode */ *(volatile u8*)addr = 0xff; - *(volatile u8*)(addr+0x5554), 0xf0; + *(volatile u8*)(addr+0x5554), 0xf0; break; - + case 2: /* Issue identification command */ *(volatile u32*)(addr + 0x5554) = 0x00900090; - + /* Read vendor */ result = *(volatile u16*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u16*)(addr+4); - + /* Return device to data mode */ *(volatile u32*)addr = 0x00ff00ff; - *(volatile u32*)(addr+0x5554), 0x00f000f0; + *(volatile u32*)(addr+0x5554), 0x00f000f0; break; - + case 4: /* Issue identification command */ *(volatile u32*)(addr+0x5554) = 0x90909090; - + /* Read vendor */ result = *(volatile u8*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u8*)(addr+4); - + /* Return device to data mode */ *(volatile u32*)addr = 0xffffffff; - *(volatile u32*)(addr+0x5554), 0xf0f0f0f0; + *(volatile u32*)(addr+0x5554), 0xf0f0f0f0; break; } break; } - - - + + return result; } @@ -180,36 +179,36 @@ static int identify_flash(unsigned address, int width) { - int is; + int is; int device; - int vendor; + int vendor; int size; unsigned res; - + u32 (*_probe_flash_ptr)(u32 a, u32 bw, int il); - - size = (unsigned)&_probe_flash_end - (unsigned)_probe_flash; - + + size = (unsigned)&_probe_flash_end - (unsigned)_probe_flash; + if (size > PROBE_BUFFER_SIZE) { printf("_probe_flash() routine too large (%d) %p - %p\n", size, &_probe_flash_end, _probe_flash); return 0; } - + memcpy(buffer, _probe_flash, size); _probe_flash_ptr = (void*)buffer; - + is = disable_interrupts(); res = _probe_flash_ptr(address, width, 1); if (is) { enable_interrupts(); } - - - vendor = res >> 16; + + + vendor = res >> 16; device = res & 0xffff; - - + + return res; } @@ -217,12 +216,12 @@ { int i, j; ulong size = 0; - + for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) { unsigned id; ulong flashbase = 0; - int sectsize = 0; - + int sectsize = 0; + memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); switch (i) { case 0: @@ -237,7 +236,7 @@ default: panic("configured to many flash banks!\n"); } - + id = identify_flash(flashbase, 4); switch (id & 0x00ff00ff) { case 0x000100c8: @@ -245,31 +244,31 @@ flash_info[i].flash_id = (AMD_MANUFACT & FLASH_VENDMASK) | (AMD_ID_LV016B & FLASH_TYPEMASK); - + flash_info[i].size = AMD29LV016B_SIZE*4; flash_info[i].sector_count = AMD29LV016B_SECTORS; sectsize = (AMD29LV016B_SIZE*4)/AMD29LV016B_SECTORS; printf("Bank %d: 4 x AMD 29LV017B\n", i); break; - - + + default: printf("Bank %d have unknown flash %08x\n", i, id); flash_info[i].flash_id = FLASH_UNKNOWN; continue; } - + for (j = 0; j < flash_info[i].sector_count; j++) { flash_info[i].start[j] = flashbase + j * sectsize; } size += flash_info[i].size; - + flash_protect(FLAG_PROTECT_CLEAR, flash_info[i].start[0], flash_info[i].start[0] + flash_info[i].size - 1, &flash_info[i]); } - + /* * Protect monitor and environment sectors */ @@ -282,7 +281,7 @@ CFG_ENV_ADDR, CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); -#endif +#endif return size; } @@ -291,9 +290,9 @@ void flash_print_info(flash_info_t *info) { int i; - + switch (info->flash_id & FLASH_VENDMASK) { - + case (AMD_MANUFACT & FLASH_VENDMASK): printf("AMD: "); switch (info->flash_id & FLASH_TYPEMASK) { @@ -305,17 +304,17 @@ goto done; break; } - + break; default: printf("Unknown Vendor "); break; } - - + + printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); - + printf(" Sector Start Addresses:"); for (i = 0; i < info->sector_count; i++) { if ((i % 5) == 0) { @@ -325,7 +324,7 @@ info->protect[i] ? " (RO)" : " "); } printf ("\n"); - + done: } @@ -339,7 +338,7 @@ unsigned milli=0; \ \ micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \ - \ + \ for (;;) { \ \ milli += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \ @@ -349,12 +348,12 @@ break; \ } \ } \ -} while (0) +} while (0) static u32 _amd_erase_flash(u32 addr, u32 sector) { unsigned elapsed; - + /* Issue erase */ *(volatile u32*)(addr + 0x5554) = 0xAAAAAAAA; *(volatile u32*)(addr + 0xaaa8) = 0x55555555; @@ -364,21 +363,21 @@ *(volatile u32*)(addr + 0xaaa8) = 0x55555555; /* Sector erase command comes last */ *(volatile u32*)(addr + sector) = 0x30303030; - + elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */ elapsed = 0; __udelay(50); while (((*(volatile u32*)(addr + sector)) & 0x80808080) != 0x80808080) { - + elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); if (elapsed > ((CFG_FLASH_ERASE_TOUT/CFG_HZ) * 1000)) { *(volatile u32*)(addr) = 0xf0f0f0f0; - return 1; + return 1; } } - + *(volatile u32*)(addr) = 0xf0f0f0f0; - + return 0; } @@ -392,7 +391,7 @@ int prot; int sect; unsigned size; - + if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { printf("- missing\n"); @@ -401,66 +400,66 @@ } return 1; } - + if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) { - size = (unsigned)&_amd_erase_flash_end - (unsigned)_amd_erase_flash; - + size = (unsigned)&_amd_erase_flash_end - (unsigned)_amd_erase_flash; + if (size > PROBE_BUFFER_SIZE) { printf("_amd_erase_flash() routine too large (%d) %p - %p\n", size, &_amd_erase_flash_end, _amd_erase_flash); return 0; } - + memcpy(buffer, _amd_erase_flash, size); _erase_flash_ptr = (void*)buffer; - + } else { printf ("Can't erase unknown flash type - aborted\n"); return 1; } - + prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { prot++; } } - + if (prot) { printf ("- Warning: %d protected sectors will not be erased!\n", prot); } else { printf ("\n"); } - - + + /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { - + if (info->protect[sect] == 0) { /* not protected */ int res; int flag; - + /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - + res = _erase_flash_ptr(info->start[0], info->start[sect]-info->start[0]); - + /* re-enable interrupts if necessary */ if (flag) { enable_interrupts(); } - - + + if (res) { printf("Erase timed out, sector %d\n", sect); return res; } - - putc('.'); - } + + putc('.'); + } } - + return 0; } @@ -476,33 +475,33 @@ volatile u32 *dest2 = (u32*)dest; volatile u32 *data2 = (u32*)&data; unsigned elapsed; - + /* Check if Flash is (sufficiently) erased */ if ((*((volatile u32*)dest) & (u32)data) != (u32)data) { return 2; } - + addr2[0x5554] = 0xAAAAAAAA; addr2[0xaaa8] = 0x55555555; addr2[0x5554] = 0xA0A0A0A0; - + dest2[0] = data; - + elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */ elapsed = 0; - + /* data polling for D7 */ while ((dest2[0] & 0x80808080) != (data2[0] & 0x80808080)) { elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); if (elapsed > ((CFG_FLASH_WRITE_TOUT/CFG_HZ) * 1000)) { addr2[0] = 0xf0f0f0f0; - return 1; + return 1; } } - + addr2[0] = 0xf0f0f0f0; - + return 0; } @@ -511,8 +510,6 @@ ".long 0\n"); - - /*----------------------------------------------------------------------- * Copy memory to flash, returns: * 0 - OK @@ -528,19 +525,19 @@ int flag; u32 (*_write_word_ptr)(unsigned start, unsigned dest, unsigned data); unsigned size; - + if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) { - size = (unsigned)&_amd_write_word_end - (unsigned)_amd_write_word; - + size = (unsigned)&_amd_write_word_end - (unsigned)_amd_write_word; + if (size > PROBE_BUFFER_SIZE) { printf("_amd_write_word() routine too large (%d) %p - %p\n", size, &_amd_write_word_end, _amd_write_word); return 0; } - + memcpy(buffer, _amd_write_word, size); _write_word_ptr = (void*)buffer; - + } else { printf ("Can't program unknown flash type - aborted\n"); return 3; @@ -548,7 +545,7 @@ wp = (addr & ~3); /* get lower word aligned address */ - + /* * handle unaligned start bytes @@ -566,12 +563,12 @@ for (; cnt==0 && i<4; ++i, ++cp) { data |= (*(uchar *)cp) << (8*i); } - + /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - + rc = _write_word_ptr(info->start[0], wp, data); - + /* re-enable interrupts if necessary */ if (flag) { enable_interrupts(); @@ -581,22 +578,22 @@ } wp += 4; } - + /* * handle word aligned part */ while (cnt >= 4) { data = 0; - + for (i=0; i<4; ++i) { data |= *src++ << (8*i); } - + /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); rc = _write_word_ptr(info->start[0], wp, data); - + /* re-enable interrupts if necessary */ if (flag) { enable_interrupts(); @@ -607,11 +604,11 @@ wp += 4; cnt -= 4; } - + if (cnt == 0) { return 0; } - + /* * handle unaligned tail bytes */ @@ -620,7 +617,7 @@ data |= *src++ << (8*i); --cnt; } - + for (; i<4; ++i, ++cp) { data |= (*(uchar *)cp) << (8*i); } @@ -629,14 +626,12 @@ flag = disable_interrupts(); rc = _write_word_ptr(info->start[0], wp, data); - + /* re-enable interrupts if necessary */ if (flag) { enable_interrupts(); } - + return rc; - + } - - diff --git a/board/sc520_cdp/flash_old.c b/board/sc520_cdp/flash_old.c index d4204a8..416b01d 100644 --- a/board/sc520_cdp/flash_old.c +++ b/board/sc520_cdp/flash_old.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Alex Zuepke @@ -67,22 +67,22 @@ { int i, j; ulong size = 0; - + for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) { ulong flashbase = 0; - int sectsize = 0; + int sectsize = 0; if (i==0 || i==2) { - /* FixMe: this assumes that bank 0 and 2 + /* FixMe: this assumes that bank 0 and 2 * are mapped to the two 8Mb banks */ flash_info[i].flash_id = (AMD_MANUFACT & FLASH_VENDMASK) | (AMD_ID_LV016B & FLASH_TYPEMASK); - + flash_info[i].size = AMD29LV016_SIZE*4; flash_info[i].sector_count = AMD29LV016_SECTORS; sectsize = (AMD29LV016_SIZE*4)/AMD29LV016_SECTORS; } else { - /* FixMe: this assumes that bank1 is unmapped + /* FixMe: this assumes that bank1 is unmapped * (or mapped to the same flash bank as BOOTCS) */ flash_info[i].flash_id = 0; flash_info[i].size = 0; @@ -103,14 +103,14 @@ default: panic("configured to many flash banks!\n"); } - + for (j = 0; j < flash_info[i].sector_count; j++) { flash_info[i].start[j] = sectsize; flash_info[i].start[j] = flashbase + j * sectsize; } size += flash_info[i].size; } - + /* * Protect monitor and environment sectors */ @@ -118,7 +118,7 @@ i386boot_start-SC520_FLASH_BANK0_BASE, i386boot_end-SC520_FLASH_BANK0_BASE, &flash_info[0]); - + #ifdef CFG_ENV_ADDR flash_protect(FLAG_PROTECT_SET, CFG_ENV_ADDR, @@ -142,7 +142,7 @@ printf("Unknown Vendor "); break; } - + switch (info->flash_id & FLASH_TYPEMASK) { case (AMD_ID_LV016B & FLASH_TYPEMASK): printf("4x Amd29LV016B (16Mbit)\n"); @@ -152,10 +152,10 @@ goto done; break; } - + printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); - + printf(" Sector Start Addresses:"); for (i = 0; i < info->sector_count; i++) { if ((i % 5) == 0) { @@ -165,7 +165,7 @@ info->protect[i] ? " (RO)" : " "); } printf ("\n"); - + done: } @@ -180,20 +180,20 @@ int chip1, chip2; /* first look for protection bits */ - + if (info->flash_id == FLASH_UNKNOWN) { return ERR_UNKNOWN_FLASH_TYPE; } - + if ((s_first < 0) || (s_first > s_last)) { return ERR_INVAL; } - + if ((info->flash_id & FLASH_VENDMASK) != (AMD_MANUFACT & FLASH_VENDMASK)) { return ERR_UNKNOWN_FLASH_VENDOR; } - + prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { @@ -203,7 +203,7 @@ if (prot) { return ERR_PROTECTED; } - + /* * Disable interrupts which might cause a timeout * here. Remember that our exception vectors are @@ -212,77 +212,77 @@ * chip is in programming mode. */ iflag = disable_interrupts(); - + /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last && !ctrlc(); sect++) { printf("Erasing sector %2d ... ", sect); - + /* arm simple, non interrupt dependent timer */ reset_timer(); - - if (info->protect[sect] == 0) { + + if (info->protect[sect] == 0) { /* not protected */ ulong addr = info->start[sect]; - + writel(CMD_UNLOCK1, addr + 1); writel(CMD_UNLOCK2, addr + 2); writel(CMD_ERASE_SETUP, addr + 1); - + writel(CMD_UNLOCK1, addr + 1); writel(CMD_UNLOCK2, addr + 2); writel(CMD_ERASE_CONFIRM, addr); - + /* wait until flash is ready */ chip1 = chip2 = 0; - + do { result = readl(addr); - + /* check timeout */ if (get_timer(0) > CFG_FLASH_ERASE_TOUT) { writel(CMD_READ_ARRAY, addr + 1); chip1 = TMO; break; } - + if (!chip1 && (result & 0xFFFF) & BIT_ERASE_DONE) { chip1 = READY; } - + if (!chip1 && (result & 0xFFFF) & BIT_PROGRAM_ERROR) { chip1 = ERR; } - + if (!chip2 && (result >> 16) & BIT_ERASE_DONE) { chip2 = READY; } - + if (!chip2 && (result >> 16) & BIT_PROGRAM_ERROR) { chip2 = ERR; } - + } while (!chip1 || !chip2); - + writel(CMD_READ_ARRAY, addr + 1); - + if (chip1 == ERR || chip2 == ERR) { rc = ERR_PROG_ERROR; goto outahere; } - + if (chip1 == TMO) { rc = ERR_TIMOUT; goto outahere; } - + printf("ok.\n"); } else { /* it was protected */ - + printf("protected!\n"); } } - + if (ctrlc()) { printf("User Interrupt!\n"); } @@ -290,11 +290,11 @@ outahere: /* allow flash to settle - wait 10 ms */ udelay(10000); - + if (iflag) { enable_interrupts(); } - + return rc; } @@ -309,7 +309,7 @@ int rc = ERR_OK; int iflag; int chip1, chip2; - + /* * Check if Flash is (sufficiently) erased */ @@ -317,7 +317,7 @@ if ((result & data) != data) { return ERR_NOT_ERASED; } - + /* * Disable interrupts which might cause a timeout * here. Remember that our exception vectors are @@ -332,61 +332,61 @@ writel(CMD_UNLOCK_BYPASS, addr + 1); writel(addr, CMD_PROGRAM); writel(addr, data); - + /* arm simple, non interrupt dependent timer */ reset_timer(); - + /* wait until flash is ready */ chip1 = chip2 = 0; do { result = readl(addr); - + /* check timeout */ if (get_timer(0) > CFG_FLASH_ERASE_TOUT) { chip1 = ERR | TMO; break; } - + if (!chip1 && ((result & 0x80) == (data & 0x80))) { chip1 = READY; } - + if (!chip1 && ((result & 0xFFFF) & BIT_PROGRAM_ERROR)) { result = readl(addr); - + if ((result & 0x80) == (data & 0x80)) { chip1 = READY; } else { chip1 = ERR; } } - + if (!chip2 && ((result & (0x80 << 16)) == (data & (0x80 << 16)))) { chip2 = READY; } - + if (!chip2 && ((result >> 16) & BIT_PROGRAM_ERROR)) { result = readl(addr); - + if ((result & (0x80 << 16)) == (data & (0x80 << 16))) { chip2 = READY; } else { chip2 = ERR; } } - + } while (!chip1 || !chip2); - + writel(CMD_READ_ARRAY, addr); - + if (chip1 == ERR || chip2 == ERR || readl(addr) != data) { rc = ERR_PROG_ERROR; } - + if (iflag) { enable_interrupts(); } - + return rc; } @@ -399,9 +399,9 @@ ulong cp, wp, data; int l; int i, rc; - + wp = (addr & ~3); /* get lower word aligned address */ - + /* * handle unaligned start bytes */ @@ -418,13 +418,13 @@ for (; cnt==0 && i<4; ++i, ++cp) { data = (data >> 8) | (*(uchar *)cp << 24); } - + if ((rc = write_word(info, wp, data)) != 0) { return rc; } wp += 4; } - + /* * handle word aligned part */ @@ -437,11 +437,11 @@ wp += 4; cnt -= 4; } - + if (cnt == 0) { return ERR_OK; } - + /* * handle unaligned tail bytes */ @@ -453,6 +453,6 @@ for (; i<4; ++i, ++cp) { data = (data >> 8) | (*(uchar *)cp << 24); } - + return write_word(info, wp, data); } diff --git a/board/sc520_cdp/sc520_cdp.c b/board/sc520_cdp/sc520_cdp.c index 50a49e6..0fc836c 100644 --- a/board/sc520_cdp/sc520_cdp.c +++ b/board/sc520_cdp/sc520_cdp.c @@ -1,5 +1,5 @@ /* - * + * * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB . * @@ -40,11 +40,11 @@ /* ------------------------------------------------------------------------- */ - -/* + +/* * Theory: * We first set up all IRQs to be non-pci, edge triggered, - * when we later enumerate the pci bus and pci_sc520_fixup_irq() gets + * when we later enumerate the pci bus and pci_sc520_fixup_irq() gets * called we reallocate irqs to the pci bus with sc520_pci_set_irq() * as needed. Whe choose the irqs to gram from a configurable list * inside pci_sc520_fixup_irq() (If this list contains stupid irq's @@ -54,48 +54,48 @@ static void irq_init(void) { /* disable global interrupt mode */ - write_mmcr_byte(SC520_PICICR, 0x40); - + write_mmcr_byte(SC520_PICICR, 0x40); + /* set all irqs to edge */ write_mmcr_byte(SC520_MPICMODE, 0x00); write_mmcr_byte(SC520_SL1PICMODE, 0x00); write_mmcr_byte(SC520_SL2PICMODE, 0x00); - - /* active low polarity on PIC interrupt pins, + + /* active low polarity on PIC interrupt pins, * active high polarity on all other irq pins */ write_mmcr_word(SC520_INTPINPOL, 0x0000); /* set irq number mapping */ - write_mmcr_byte(SC520_GPTMR0MAP, SC520_IRQ_DISABLED); /* disable GP timer 0 INT */ + write_mmcr_byte(SC520_GPTMR0MAP, SC520_IRQ_DISABLED); /* disable GP timer 0 INT */ write_mmcr_byte(SC520_GPTMR1MAP, SC520_IRQ_DISABLED); /* disable GP timer 1 INT */ write_mmcr_byte(SC520_GPTMR2MAP, SC520_IRQ_DISABLED); /* disable GP timer 2 INT */ - write_mmcr_byte(SC520_PIT0MAP, SC520_IRQ0); /* Set PIT timer 0 INT to IRQ0 */ + write_mmcr_byte(SC520_PIT0MAP, SC520_IRQ0); /* Set PIT timer 0 INT to IRQ0 */ write_mmcr_byte(SC520_PIT1MAP, SC520_IRQ_DISABLED); /* disable PIT timer 1 INT */ write_mmcr_byte(SC520_PIT2MAP, SC520_IRQ_DISABLED); /* disable PIT timer 2 INT */ write_mmcr_byte(SC520_PCIINTAMAP, SC520_IRQ_DISABLED); /* disable PCI INT A */ write_mmcr_byte(SC520_PCIINTBMAP, SC520_IRQ_DISABLED); /* disable PCI INT B */ write_mmcr_byte(SC520_PCIINTCMAP, SC520_IRQ_DISABLED); /* disable PCI INT C */ write_mmcr_byte(SC520_PCIINTDMAP, SC520_IRQ_DISABLED); /* disable PCI INT D */ - write_mmcr_byte(SC520_DMABCINTMAP, SC520_IRQ_DISABLED); /* disable DMA INT */ + write_mmcr_byte(SC520_DMABCINTMAP, SC520_IRQ_DISABLED); /* disable DMA INT */ write_mmcr_byte(SC520_SSIMAP, SC520_IRQ_DISABLED); /* disable Synchronius serial INT */ write_mmcr_byte(SC520_WDTMAP, SC520_IRQ_DISABLED); /* disable Watchdog INT */ write_mmcr_byte(SC520_RTCMAP, SC520_IRQ8); /* Set RTC int to 8 */ write_mmcr_byte(SC520_WPVMAP, SC520_IRQ_DISABLED); /* disable write protect INT */ write_mmcr_byte(SC520_ICEMAP, SC520_IRQ1); /* Set ICE Debug Serielport INT to IRQ1 */ write_mmcr_byte(SC520_FERRMAP,SC520_IRQ13); /* Set FP error INT to IRQ13 */ - + if (CFG_USE_SIO_UART) { write_mmcr_byte(SC520_UART1MAP, SC520_IRQ_DISABLED); /* disable internal UART1 INT */ write_mmcr_byte(SC520_UART2MAP, SC520_IRQ_DISABLED); /* disable internal UART2 INT */ - write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ3); /* Set GPIRQ3 (ISA IRQ3) to IRQ3 */ + write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ3); /* Set GPIRQ3 (ISA IRQ3) to IRQ3 */ write_mmcr_byte(SC520_GP4IMAP, SC520_IRQ4); /* Set GPIRQ4 (ISA IRQ4) to IRQ4 */ } else { write_mmcr_byte(SC520_UART1MAP, SC520_IRQ4); /* Set internal UART2 INT to IRQ4 */ write_mmcr_byte(SC520_UART2MAP, SC520_IRQ3); /* Set internal UART2 INT to IRQ3 */ - write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ3 (ISA IRQ3) */ + write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ3 (ISA IRQ3) */ write_mmcr_byte(SC520_GP4IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ4 (ISA IRQ4) */ } - + write_mmcr_byte(SC520_GP1IMAP, SC520_IRQ1); /* Set GPIRQ1 (SIO IRQ1) to IRQ1 */ write_mmcr_byte(SC520_GP5IMAP, SC520_IRQ5); /* Set GPIRQ5 (ISA IRQ5) to IRQ5 */ write_mmcr_byte(SC520_GP6IMAP, SC520_IRQ6); /* Set GPIRQ6 (ISA IRQ6) to IRQ6 */ @@ -104,14 +104,14 @@ write_mmcr_byte(SC520_GP9IMAP, SC520_IRQ9); /* Set GPIRQ9 (ISA IRQ2) to IRQ9 */ write_mmcr_byte(SC520_GP0IMAP, SC520_IRQ11); /* Set GPIRQ0 (ISA IRQ11) to IRQ10 */ write_mmcr_byte(SC520_GP2IMAP, SC520_IRQ12); /* Set GPIRQ2 (ISA IRQ12) to IRQ12 */ - write_mmcr_byte(SC520_GP10IMAP,SC520_IRQ14); /* Set GPIRQ10 (ISA IRQ14) to IRQ14 */ - + write_mmcr_byte(SC520_GP10IMAP,SC520_IRQ14); /* Set GPIRQ10 (ISA IRQ14) to IRQ14 */ + write_mmcr_word(SC520_PCIHOSTMAP, 0x11f); /* Map PCI hostbridge INT to NMI */ write_mmcr_word(SC520_ECCMAP, 0x100); /* Map SDRAM ECC failure INT to NMI */ - + } - + /* PCI stuff */ static void pci_sc520_cdp_fixup_irq(struct pci_controller *hose, pci_dev_t dev) { @@ -125,64 +125,63 @@ CFG_FORTH_PCI_IRQ }; static int next_irq_index=0; - - char tmp_pin; + + char tmp_pin; int pin; - + pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin); pin = tmp_pin; - + pin-=1; /* pci config space use 1-based numbering */ if (-1 == pin) { return; /* device use no irq */ } - - - + + /* map device number + pin to a pin on the sc520 */ switch (PCI_DEV(dev)) { case 20: pin+=SC520_PCI_INTA; break; - + case 19: pin+=SC520_PCI_INTB; break; - + case 18: pin+=SC520_PCI_INTC; break; - + case 17: pin+=SC520_PCI_INTD; break; - - default: + + default: return; } - + pin&=3; /* wrap around */ - + if (sc520_pci_ints[pin] == -1) { - /* re-route one interrupt for us */ + /* re-route one interrupt for us */ if (next_irq_index > 3) { return; } - if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) { + if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) { return; } next_irq_index++; } - + if (-1 != sc520_pci_ints[pin]) { - pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, + pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, sc520_pci_ints[pin]); } - PRINTF("fixup_irq: device %d pin %c irq %d\n", + PRINTF("fixup_irq: device %d pin %c irq %d\n", PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]); } - + static struct pci_controller sc520_cdp_hose = { fixup_irq: pci_sc520_cdp_fixup_irq, }; @@ -201,7 +200,7 @@ void setup_ali_sio(int uart_primary) { ali512x_init(); - + ali512x_set_fdc(ALI_ENABLED, 0x3f2, 6, 0); ali512x_set_pp(ALI_ENABLED, 0x278, 7, 3); ali512x_set_uart(ALI_ENABLED, ALI_UART1, uart_primary?0x3f8:0x3e8, 4); @@ -209,21 +208,21 @@ ali512x_set_rtc(ALI_DISABLED, 0, 0); ali512x_set_kbc(ALI_ENABLED, 1, 12); ali512x_set_cio(ALI_ENABLED); - + /* IrDa pins */ ali512x_cio_function(12, 1, 0, 0); ali512x_cio_function(13, 1, 0, 0); - + /* SSI chip select pins */ ali512x_cio_function(14, 0, 0, 0); /* SSI_CS */ - ali512x_cio_function(15, 0, 0, 0); /* SSI_MV */ + ali512x_cio_function(15, 0, 0, 0); /* SSI_MV */ ali512x_cio_function(16, 0, 0, 0); /* SSI_SPI# */ /* Board REV pins */ ali512x_cio_function(20, 0, 0, 1); ali512x_cio_function(21, 0, 0, 1); ali512x_cio_function(22, 0, 0, 1); - ali512x_cio_function(23, 0, 0, 1); + ali512x_cio_function(23, 0, 0, 1); } @@ -232,54 +231,53 @@ { /* set up the GP IO pins */ - write_mmcr_word(SC520_PIOPFS31_16, 0xf7ff); /* set the GPIO pin function 31-16 reg */ + write_mmcr_word(SC520_PIOPFS31_16, 0xf7ff); /* set the GPIO pin function 31-16 reg */ write_mmcr_word(SC520_PIOPFS15_0, 0xffff); /* set the GPIO pin function 15-0 reg */ - write_mmcr_byte(SC520_CSPFS, 0xf8); /* set the CS pin function reg */ + write_mmcr_byte(SC520_CSPFS, 0xf8); /* set the CS pin function reg */ write_mmcr_byte(SC520_CLKSEL, 0x70); - - write_mmcr_byte(SC520_GPCSRT, 1); /* set the GP CS offset */ + + write_mmcr_byte(SC520_GPCSRT, 1); /* set the GP CS offset */ write_mmcr_byte(SC520_GPCSPW, 3); /* set the GP CS pulse width */ write_mmcr_byte(SC520_GPCSOFF, 1); /* set the GP CS offset */ write_mmcr_byte(SC520_GPRDW, 3); /* set the RD pulse width */ write_mmcr_byte(SC520_GPRDOFF, 1); /* set the GP RD offset */ - write_mmcr_byte(SC520_GPWRW, 3); /* set the GP WR pulse width */ + write_mmcr_byte(SC520_GPWRW, 3); /* set the GP WR pulse width */ write_mmcr_byte(SC520_GPWROFF, 1); /* set the GP WR offset */ - write_mmcr_word(SC520_BOOTCSCTL, 0x1823); /* set up timing of BOOTCS */ + write_mmcr_word(SC520_BOOTCSCTL, 0x1823); /* set up timing of BOOTCS */ write_mmcr_word(SC520_ROMCS1CTL, 0x1823); /* set up timing of ROMCS1 */ - write_mmcr_word(SC520_ROMCS2CTL, 0x1823); /* set up timing of ROMCS2 */ - + write_mmcr_word(SC520_ROMCS2CTL, 0x1823); /* set up timing of ROMCS2 */ + /* adjust the memory map: * by default the first 256MB (0x00000000 - 0x0fffffff) is mapped to SDRAM * and 256MB to 1G-128k (0x1000000 - 0x37ffffff) is mapped to PCI mmio - * we need to map 1G-128k - 1G (0x38000000 - 0x3fffffff) to CS1 */ - - - + * we need to map 1G-128k - 1G (0x38000000 - 0x3fffffff) to CS1 */ + + /* SRAM = GPCS3 128k @ d0000-effff*/ - write_mmcr_long(SC520_PAR2, 0x4e00400d); - + write_mmcr_long(SC520_PAR2, 0x4e00400d); + /* IDE0 = GPCS6 1f0-1f7 */ - write_mmcr_long(SC520_PAR3, 0x380801f0); + write_mmcr_long(SC520_PAR3, 0x380801f0); /* IDE1 = GPCS7 3f6 */ - write_mmcr_long(SC520_PAR4, 0x3c0003f6); + write_mmcr_long(SC520_PAR4, 0x3c0003f6); /* bootcs */ - write_mmcr_long(SC520_PAR12, 0x8bffe800); + write_mmcr_long(SC520_PAR12, 0x8bffe800); /* romcs2 */ - write_mmcr_long(SC520_PAR13, 0xcbfff000); + write_mmcr_long(SC520_PAR13, 0xcbfff000); /* romcs1 */ - write_mmcr_long(SC520_PAR14, 0xabfff800); + write_mmcr_long(SC520_PAR14, 0xabfff800); /* 680 LEDS */ - write_mmcr_long(SC520_PAR15, 0x30000640); - + write_mmcr_long(SC520_PAR15, 0x30000640); + write_mmcr_byte(SC520_ADDDECCTL, 0); - - asm ("wbinvd\n"); /* Flush cache, req. after setting the unchached attribute ona PAR */ + + asm ("wbinvd\n"); /* Flush cache, req. after setting the unchached attribute ona PAR */ if (CFG_USE_SIO_UART) { - write_mmcr_byte(SC520_ADDDECCTL, read_mmcr_byte(SC520_ADDDECCTL) | UART2_DIS|UART1_DIS); + write_mmcr_byte(SC520_ADDDECCTL, read_mmcr_byte(SC520_ADDDECCTL) | UART2_DIS|UART1_DIS); setup_ali_sio(1); } else { write_mmcr_byte(SC520_ADDDECCTL, read_mmcr_byte(SC520_ADDDECCTL) & ~(UART2_DIS|UART1_DIS)); @@ -321,21 +319,21 @@ * PAR15 Port 0x680 LED display */ -/* +/* * This function should map a chunk of size bytes * of the system address space to the ISA bus - * + * * The function will return the memory address * as seen by the host (which may very will be the * same as the bus address) */ -u32 isa_map_rom(u32 bus_addr, int size) +u32 isa_map_rom(u32 bus_addr, int size) { u32 par; - - PRINTF("isa_map_rom asked to map %d bytes at %x\n", + + PRINTF("isa_map_rom asked to map %d bytes at %x\n", size, bus_addr); - + par = size; if (par < 0x80000) { par = 0x80000; @@ -346,12 +344,12 @@ par <<= 18; par |= (bus_addr>>12); par |= 0x50000000; - + PRINTF ("setting PAR11 to %x\n", par); - + /* Map rom 0x10000 with PAR1 */ write_mmcr_long(SC520_PAR11, par); - + return bus_addr; } @@ -372,19 +370,19 @@ #ifdef CONFIG_PCI #define PCI_ROM_TEMP_SPACE 0x10000 -/* +/* * This function should map a chunk of size bytes * of the system address space to the PCI bus, * suitable to map PCI ROMS (bus address < 16M) * the function will return the host memory address * which should be converted into a bus address - * before used to configure the PCI rom address + * before used to configure the PCI rom address * decoder */ -u32 pci_get_rom_window(struct pci_controller *hose, int size) +u32 pci_get_rom_window(struct pci_controller *hose, int size) { u32 par; - + par = size; if (par < 0x80000) { par = 0x80000; @@ -395,12 +393,12 @@ par <<= 14; par |= (PCI_ROM_TEMP_SPACE>>16); par |= 0x72000000; - + PRINTF ("setting PAR1 to %x\n", par); - + /* Map rom 0x10000 with PAR1 */ write_mmcr_long(SC520_PAR1, par); - + return PCI_ROM_TEMP_SPACE; } @@ -417,61 +415,61 @@ return; } PRINTF(" not ours\n"); - + } /* * This function is called in order to provide acces to the - * legacy video I/O ports on the PCI bus. - * After this function accesses to I/O ports 0x3b0-0x3bb and + * legacy video I/O ports on the PCI bus. + * After this function accesses to I/O ports 0x3b0-0x3bb and * 0x3c0-0x3df shuld result in transactions on the PCI bus. - * + * */ int pci_enable_legacy_video_ports(struct pci_controller *hose) { /* Map video memory to 0xa0000*/ write_mmcr_long(SC520_PAR0, 0x7200400a); - + /* forward all I/O accesses to PCI */ - write_mmcr_byte(SC520_ADDDECCTL, - read_mmcr_byte(SC520_ADDDECCTL) | IO_HOLE_DEST_PCI); - - + write_mmcr_byte(SC520_ADDDECCTL, + read_mmcr_byte(SC520_ADDDECCTL) | IO_HOLE_DEST_PCI); + + /* so we map away all io ports to pci (only way to access pci io * below 0x400. But then we have to map back the portions that we dont * use so that the generate cycles on the GPIO bus where the sio and - * ISA slots are connected, this requre the use of several PAR registers + * ISA slots are connected, this requre the use of several PAR registers */ - + /* bring 0x100 - 0x1ef back to ISA using PAR5 */ - write_mmcr_long(SC520_PAR5, 0x30ef0100); - + write_mmcr_long(SC520_PAR5, 0x30ef0100); + /* IDE use 1f0-1f7 */ - + /* bring 0x1f8 - 0x2f7 back to ISA using PAR6 */ - write_mmcr_long(SC520_PAR6, 0x30ff01f8); - + write_mmcr_long(SC520_PAR6, 0x30ff01f8); + /* com2 use 2f8-2ff */ - + /* bring 0x300 - 0x3af back to ISA using PAR7 */ - write_mmcr_long(SC520_PAR7, 0x30af0300); - + write_mmcr_long(SC520_PAR7, 0x30af0300); + /* vga use 3b0-3bb */ - + /* bring 0x3bc - 0x3bf back to ISA using PAR8 */ - write_mmcr_long(SC520_PAR8, 0x300303bc); - + write_mmcr_long(SC520_PAR8, 0x300303bc); + /* vga use 3c0-3df */ - + /* bring 0x3e0 - 0x3f5 back to ISA using PAR9 */ - write_mmcr_long(SC520_PAR9, 0x301503e0); - + write_mmcr_long(SC520_PAR9, 0x301503e0); + /* ide use 3f6 */ - + /* bring 0x3f7 back to ISA using PAR10 */ - write_mmcr_long(SC520_PAR10, 0x300003f7); - - /* com1 use 3f8-3ff */ + write_mmcr_long(SC520_PAR10, 0x300003f7); + + /* com1 use 3f8-3ff */ return 0; } @@ -484,20 +482,20 @@ int board_init(void) { DECLARE_GLOBAL_DATA_PTR; - - init_sc520(); + + init_sc520(); bus_init(); irq_init(); - + /* max drive current on SDRAM */ write_mmcr_word(SC520_DSCTL, 0x0100); - + /* enter debug mode after next reset (only if jumper is also set) */ write_mmcr_byte(SC520_RESCFG, 0x08); /* configure the software timer to 33.333MHz */ write_mmcr_byte(SC520_SWTMRCFG, 0); gd->bus_clk = 33333000; - + return 0; } @@ -518,98 +516,96 @@ { int minor; int major; - + major = minor = 0; major |= ali512x_cio_in(23)?2:0; major |= ali512x_cio_in(22)?1:0; minor |= ali512x_cio_in(21)?2:0; minor |= ali512x_cio_in(20)?1:0; - + printf("AMD SC520 CDP revision %d.%d\n", major, minor); - + return 0; } - -void ssi_chip_select(int dev) +void ssi_chip_select(int dev) { - + /* Spunk board: SPI EEPROM is active-low, MW EEPROM and AUX are active high */ switch (dev) { case 1: /* SPI EEPROM */ ali512x_cio_out(16, 0); break; - + case 2: /* MW EEPROM */ ali512x_cio_out(15, 1); break; - - case 3: /* AUX */ + + case 3: /* AUX */ ali512x_cio_out(14, 1); break; - + case 0: ali512x_cio_out(16, 1); ali512x_cio_out(15, 0); ali512x_cio_out(14, 0); break; - + default: printf("Illegal SSI device requested: %d\n", dev); } } -void spi_init_f(void) +void spi_init_f(void) { #ifdef CONFIG_SC520_CDP_USE_SPI - spi_eeprom_probe(1); -#endif + spi_eeprom_probe(1); +#endif #ifdef CONFIG_SC520_CDP_USE_MW mw_eeprom_probe(2); -#endif +#endif } -ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len) +ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len) { int offset; int i; ssize_t res; - + offset = 0; for (i=0;i * Alex Zuepke @@ -66,122 +66,121 @@ static u32 _probe_flash(u32 addr, u32 bw, int il) { u32 result=0; - + /* First do an unlock cycle for the benefit of * devices that need it */ - + switch (bw) { - + case 1: *(volatile u8*)(addr+0x5555) = 0xaa; *(volatile u8*)(addr+0x2aaa) = 0x55; *(volatile u8*)(addr+0x5555) = 0x90; - + /* Read vendor */ result = *(volatile u8*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u8*)(addr+2); - + /* Return device to data mode */ *(volatile u8*)addr = 0xff; - *(volatile u8*)(addr+0x5555), 0xf0; + *(volatile u8*)(addr+0x5555), 0xf0; break; - + case 2: *(volatile u16*)(addr+0xaaaa) = 0xaaaa; *(volatile u16*)(addr+0x5554) = 0x5555; - + /* Issue identification command */ if (il == 2) { *(volatile u16*)(addr+0xaaaa) = 0x9090; - + /* Read vendor */ result = *(volatile u8*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u8*)(addr+2); - + /* Return device to data mode */ *(volatile u16*)addr = 0xffff; - *(volatile u16*)(addr+0xaaaa), 0xf0f0; - + *(volatile u16*)(addr+0xaaaa), 0xf0f0; + } else { *(volatile u8*)(addr+0xaaaa) = 0x90; /* Read vendor */ result = *(volatile u16*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u16*)(addr+2); - + /* Return device to data mode */ *(volatile u8*)addr = 0xff; - *(volatile u8*)(addr+0xaaaa), 0xf0; + *(volatile u8*)(addr+0xaaaa), 0xf0; } - + break; - + case 4: *(volatile u32*)(addr+0x5554) = 0xaaaaaaaa; *(volatile u32*)(addr+0xaaa8) = 0x55555555; - + switch (il) { case 1: /* Issue identification command */ *(volatile u8*)(addr+0x5554) = 0x90; - + /* Read vendor */ result = *(volatile u16*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u16*)(addr+4); - + /* Return device to data mode */ *(volatile u8*)addr = 0xff; - *(volatile u8*)(addr+0x5554), 0xf0; + *(volatile u8*)(addr+0x5554), 0xf0; break; - + case 2: /* Issue identification command */ *(volatile u32*)(addr + 0x5554) = 0x00900090; - + /* Read vendor */ result = *(volatile u16*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u16*)(addr+4); - + /* Return device to data mode */ *(volatile u32*)addr = 0x00ff00ff; - *(volatile u32*)(addr+0x5554), 0x00f000f0; + *(volatile u32*)(addr+0x5554), 0x00f000f0; break; - + case 4: /* Issue identification command */ *(volatile u32*)(addr+0x5554) = 0x90909090; - + /* Read vendor */ result = *(volatile u8*)addr; result <<= 16; - + /* Read device */ result |= *(volatile u8*)(addr+4); - + /* Return device to data mode */ *(volatile u32*)addr = 0xffffffff; - *(volatile u32*)(addr+0x5554), 0xf0f0f0f0; + *(volatile u32*)(addr+0x5554), 0xf0f0f0f0; break; } break; } - - - + + return result; } @@ -191,36 +190,36 @@ static int identify_flash(unsigned address, int width) { - int is; + int is; int device; - int vendor; + int vendor; int size; unsigned res; - + u32 (*_probe_flash_ptr)(u32 a, u32 bw, int il); - - size = (unsigned)&_probe_flash_end - (unsigned)_probe_flash; - + + size = (unsigned)&_probe_flash_end - (unsigned)_probe_flash; + if (size > PROBE_BUFFER_SIZE) { printf("_probe_flash() routine too large (%d) %p - %p\n", size, &_probe_flash_end, _probe_flash); return 0; } - + memcpy(buffer, _probe_flash, size); _probe_flash_ptr = (void*)buffer; - + is = disable_interrupts(); res = _probe_flash_ptr(address, width, 1); if (is) { enable_interrupts(); } - - - vendor = res >> 16; + + + vendor = res >> 16; device = res & 0xffff; - - + + return res; } @@ -228,12 +227,12 @@ { int i, j; ulong size = 0; - + for (i = 0; i < SC520_MAX_FLASH_BANKS; i++) { unsigned id; ulong flashbase = 0; - int sectsize = 0; - + int sectsize = 0; + memset(flash_info[i].protect, 0, CFG_MAX_FLASH_SECT); switch (i) { case 0: @@ -242,7 +241,7 @@ default: panic("configured to many flash banks!\n"); } - + id = identify_flash(flashbase, 2); switch (id) { case 0x000122d7: @@ -250,78 +249,78 @@ flash_info[i].flash_id = (AMD_MANUFACT & FLASH_VENDMASK) | (AMD_ID_LV640U & FLASH_TYPEMASK); - + flash_info[i].size = A29LV641DH_SIZE; flash_info[i].sector_count = A29LV641DH_SECTORS; sectsize = A29LV641DH_SIZE/A29LV641DH_SECTORS; printf("Bank %d: AMD 29LV641DH\n", i); break; - + case 0x0001227E: /* 29LV641MH */ flash_info[i].flash_id = (AMD_MANUFACT & FLASH_VENDMASK) | (AMD_ID_DL640 & FLASH_TYPEMASK); - + flash_info[i].size = A29LV641MH_SIZE; flash_info[i].sector_count = A29LV641MH_SECTORS; sectsize = A29LV641MH_SIZE/A29LV641MH_SECTORS; printf("Bank %d: AMD 29LV641MH\n", i); break; - + case 0x00890016: /* 28F320J3A */ flash_info[i].flash_id = (INTEL_MANUFACT & FLASH_VENDMASK) | (INTEL_ID_28F320J3A & FLASH_TYPEMASK); - + flash_info[i].size = I28F320J3A_SIZE; flash_info[i].sector_count = I28F320J3A_SECTORS; sectsize = I28F320J3A_SIZE/I28F320J3A_SECTORS; printf("Bank %d: Intel 28F320J3A\n", i); break; - + case 0x00890017: /* 28F640J3A */ flash_info[i].flash_id = (INTEL_MANUFACT & FLASH_VENDMASK) | (INTEL_ID_28F640J3A & FLASH_TYPEMASK); - + flash_info[i].size = I28F640J3A_SIZE; flash_info[i].sector_count = I28F640J3A_SECTORS; sectsize = I28F640J3A_SIZE/I28F640J3A_SECTORS; printf("Bank %d: Intel 28F640J3A\n", i); break; - + case 0x00890018: /* 28F128J3A */ flash_info[i].flash_id = (INTEL_MANUFACT & FLASH_VENDMASK) | (INTEL_ID_28F128J3A & FLASH_TYPEMASK); - + flash_info[i].size = I28F128J3A_SIZE; flash_info[i].sector_count = I28F128J3A_SECTORS; sectsize = I28F128J3A_SIZE/I28F128J3A_SECTORS; printf("Bank %d: Intel 28F128J3A\n", i); break; - + default: printf("Bank %d have unknown flash %08x\n", i, id); flash_info[i].flash_id = FLASH_UNKNOWN; continue; } - + for (j = 0; j < flash_info[i].sector_count; j++) { flash_info[i].start[j] = flashbase + j * sectsize; } size += flash_info[i].size; - + flash_protect(FLAG_PROTECT_CLEAR, flash_info[i].start[0], flash_info[i].start[0] + flash_info[i].size - 1, &flash_info[i]); } - + /* * Protect monitor and environment sectors */ @@ -334,7 +333,7 @@ CFG_ENV_ADDR, CFG_ENV_ADDR + CFG_ENV_SIZE - 1, &flash_info[0]); -#endif +#endif return size; } @@ -343,7 +342,7 @@ void flash_print_info(flash_info_t *info) { int i; - + switch (info->flash_id & FLASH_VENDMASK) { case (INTEL_MANUFACT & FLASH_VENDMASK): printf("INTEL: "); @@ -362,9 +361,9 @@ goto done; break; } - + break; - + case (AMD_MANUFACT & FLASH_VENDMASK): printf("AMD: "); switch (info->flash_id & FLASH_TYPEMASK) { @@ -379,17 +378,17 @@ goto done; break; } - + break; default: printf("Unknown Vendor "); break; } - - + + printf(" Size: %ld MB in %d Sectors\n", info->size >> 20, info->sector_count); - + printf(" Sector Start Addresses:"); for (i = 0; i < info->sector_count; i++) { if ((i % 5) == 0) { @@ -399,7 +398,7 @@ info->protect[i] ? " (RO)" : " "); } printf ("\n"); - + done: } @@ -410,7 +409,7 @@ static u32 _amd_erase_flash(u32 addr, u32 sector) { unsigned elapsed; - + /* Issue erase */ *(volatile u16*)(addr + 0xaaaa) = 0x00AA; *(volatile u16*)(addr + 0x5554) = 0x0055; @@ -420,20 +419,20 @@ *(volatile u16*)(addr + 0x5554) = 0x0055; /* Sector erase command comes last */ *(volatile u16*)(addr + sector) = 0x0030; - + elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */ elapsed = 0; while (((*(volatile u16*)(addr + sector)) & 0x0080) != 0x0080) { - + elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); if (elapsed > ((CFG_FLASH_ERASE_TOUT/CFG_HZ) * 1000)) { *(volatile u16*)(addr) = 0x00f0; - return 1; + return 1; } } - + *(volatile u16*)(addr) = 0x00f0; - + return 0; } @@ -448,7 +447,7 @@ unsigned milli=0; \ \ micro = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \ - \ + \ for (;;) { \ \ milli += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); \ @@ -458,32 +457,32 @@ break; \ } \ } \ -} while (0) +} while (0) static u32 _intel_erase_flash(u32 addr, u32 sector) -{ +{ unsigned elapsed; - + *(volatile u16*)(addr + sector) = 0x0050; /* clear status register */ *(volatile u16*)(addr + sector) = 0x0020; /* erase setup */ *(volatile u16*)(addr + sector) = 0x00D0; /* erase confirm */ - + /* Wait at least 80us - let's wait 1 ms */ __udelay(1000); - + elapsed = 0; while (((*(volatile u16*)(addr + sector)) & 0x0080) != 0x0080) { elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); if (elapsed > ((CFG_FLASH_ERASE_TOUT/CFG_HZ) * 1000)) { *(volatile u16*)(addr + sector) = 0x00B0; /* suspend erase */ *(volatile u16*)(addr + sector) = 0x00FF; /* reset to read mode */ - return 1; + return 1; } } - + *(volatile u16*)(addr + sector) = 0x00FF; /* reset to read mode */ - + return 0; } @@ -498,7 +497,7 @@ int prot; int sect; unsigned size; - + if ((s_first < 0) || (s_first > s_last)) { if (info->flash_id == FLASH_UNKNOWN) { printf("- missing\n"); @@ -507,77 +506,77 @@ } return 1; } - + if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) { - size = (unsigned)&_amd_erase_flash_end - (unsigned)_amd_erase_flash; - + size = (unsigned)&_amd_erase_flash_end - (unsigned)_amd_erase_flash; + if (size > PROBE_BUFFER_SIZE) { printf("_amd_erase_flash() routine too large (%d) %p - %p\n", size, &_amd_erase_flash_end, _amd_erase_flash); return 0; } - + memcpy(buffer, _amd_erase_flash, size); _erase_flash_ptr = (void*)buffer; - + } else if ((info->flash_id & FLASH_VENDMASK) == (INTEL_MANUFACT & FLASH_VENDMASK)) { - size = (unsigned)&_intel_erase_flash_end - (unsigned)_intel_erase_flash; - + size = (unsigned)&_intel_erase_flash_end - (unsigned)_intel_erase_flash; + if (size > PROBE_BUFFER_SIZE) { printf("_intel_erase_flash() routine too large (%d) %p - %p\n", size, &_intel_erase_flash_end, _intel_erase_flash); return 0; } - + memcpy(buffer, _intel_erase_flash, size); _erase_flash_ptr = (void*)buffer; } else { printf ("Can't erase unknown flash type - aborted\n"); return 1; } - + prot = 0; for (sect=s_first; sect<=s_last; ++sect) { if (info->protect[sect]) { prot++; } } - + if (prot) { printf ("- Warning: %d protected sectors will not be erased!\n", prot); } else { printf ("\n"); } - - + + /* Start erase on unprotected sectors */ for (sect = s_first; sect<=s_last; sect++) { - + if (info->protect[sect] == 0) { /* not protected */ int res; int flag; - + /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - + res = _erase_flash_ptr(info->start[0], info->start[sect]-info->start[0]); - + /* re-enable interrupts if necessary */ if (flag) { enable_interrupts(); } - - + + if (res) { printf("Erase timed out, sector %d\n", sect); return res; } - - putc('.'); - } + + putc('.'); + } } - + return 0; } @@ -594,36 +593,36 @@ volatile u16 *data2 = (u16*)&data; int i; unsigned elapsed; - + /* Check if Flash is (sufficiently) erased */ if ((*((volatile u16*)dest) & (u16)data) != (u16)data) { return 2; } - + for (i = 0; i < 2; i++) { - - + + addr2[0x5555] = 0x00AA; addr2[0x2aaa] = 0x0055; addr2[0x5555] = 0x00A0; - + dest2[i] = (data >> (i*16)) & 0xffff; - + elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */ elapsed = 0; - + /* data polling for D7 */ while ((dest2[i] & 0x0080) != (data2[i] & 0x0080)) { elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); if (elapsed > ((CFG_FLASH_WRITE_TOUT/CFG_HZ) * 1000)) { addr2[i] = 0x00f0; - return 1; + return 1; } } } - + addr2[i] = 0x00f0; - + return 0; } @@ -632,38 +631,37 @@ ".long 0\n"); - static int _intel_write_word(unsigned start, unsigned dest, unsigned data) { int i; unsigned elapsed; - + /* Check if Flash is (sufficiently) erased */ if ((*((volatile u16*)dest) & (u16)data) != (u16)data) { return 2; } - + for (i = 0; i < 2; i++) { - - *(volatile u16*)(dest+2*i) = 0x0040; /* write setup */ + + *(volatile u16*)(dest+2*i) = 0x0040; /* write setup */ *(volatile u16*)(dest+2*i) = (data >> (i*16)) & 0xffff; - + elapsed = *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); /* dummy read */ elapsed = 0; - + /* data polling for D7 */ while ((*(volatile u16*)dest & 0x0080) != 0x0080) { elapsed += *(volatile u16*)(0xfffef000+SC520_SWTMRMILLI); if (elapsed > ((CFG_FLASH_WRITE_TOUT/CFG_HZ) * 1000)) { *(volatile u16*)dest = 0x00ff; - return 1; + return 1; } } } - + *(volatile u16*)dest = 0x00ff; - - + + return 0; } @@ -688,28 +686,28 @@ int flag; u32 (*_write_word_ptr)(unsigned start, unsigned dest, unsigned data); unsigned size; - + if ((info->flash_id & FLASH_VENDMASK) == (AMD_MANUFACT & FLASH_VENDMASK)) { - size = (unsigned)&_amd_write_word_end - (unsigned)_amd_write_word; - + size = (unsigned)&_amd_write_word_end - (unsigned)_amd_write_word; + if (size > PROBE_BUFFER_SIZE) { printf("_amd_write_word() routine too large (%d) %p - %p\n", size, &_amd_write_word_end, _amd_write_word); return 0; } - + memcpy(buffer, _amd_write_word, size); _write_word_ptr = (void*)buffer; - + } else if ((info->flash_id & FLASH_VENDMASK) == (INTEL_MANUFACT & FLASH_VENDMASK)) { - size = (unsigned)&_intel_write_word_end - (unsigned)_intel_write_word; - + size = (unsigned)&_intel_write_word_end - (unsigned)_intel_write_word; + if (size > PROBE_BUFFER_SIZE) { printf("_intel_write_word() routine too large (%d) %p - %p\n", size, &_intel_write_word_end, _intel_write_word); return 0; } - + memcpy(buffer, _intel_write_word, size); _write_word_ptr = (void*)buffer; } else { @@ -719,7 +717,7 @@ wp = (addr & ~3); /* get lower word aligned address */ - + /* * handle unaligned start bytes @@ -737,12 +735,12 @@ for (; cnt==0 && i<4; ++i, ++cp) { data |= (*(uchar *)cp) << (8*i); } - + /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); - + rc = _write_word_ptr(info->start[0], wp, data); - + /* re-enable interrupts if necessary */ if (flag) { enable_interrupts(); @@ -752,22 +750,22 @@ } wp += 4; } - + /* * handle word aligned part */ while (cnt >= 4) { data = 0; - + for (i=0; i<4; ++i) { data |= *src++ << (8*i); } - + /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); rc = _write_word_ptr(info->start[0], wp, data); - + /* re-enable interrupts if necessary */ if (flag) { enable_interrupts(); @@ -778,11 +776,11 @@ wp += 4; cnt -= 4; } - + if (cnt == 0) { return 0; } - + /* * handle unaligned tail bytes */ @@ -791,7 +789,7 @@ data |= *src++ << (8*i); --cnt; } - + for (; i<4; ++i, ++cp) { data |= (*(uchar *)cp) << (8*i); } @@ -800,14 +798,12 @@ flag = disable_interrupts(); rc = _write_word_ptr(info->start[0], wp, data); - + /* re-enable interrupts if necessary */ if (flag) { enable_interrupts(); } - + return rc; - + } - - diff --git a/board/sc520_spunk/sc520_spunk.c b/board/sc520_spunk/sc520_spunk.c index 962e04e..e7a7d51 100644 --- a/board/sc520_spunk/sc520_spunk.c +++ b/board/sc520_spunk/sc520_spunk.c @@ -1,5 +1,5 @@ /* - * + * * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB . * @@ -32,11 +32,11 @@ /* ------------------------------------------------------------------------- */ - -/* + +/* * Theory: * We first set up all IRQs to be non-pci, edge triggered, - * when we later enumerate the pci bus and pci_sc520_fixup_irq() gets + * when we later enumerate the pci bus and pci_sc520_fixup_irq() gets * called we reallocate irqs to the pci bus with sc520_pci_set_irq() * as needed. Whe choose the irqs to gram from a configurable list * inside pci_sc520_fixup_irq() (If this list contains stupid irq's @@ -46,42 +46,42 @@ static void irq_init(void) { /* disable global interrupt mode */ - write_mmcr_byte(SC520_PICICR, 0x40); - + write_mmcr_byte(SC520_PICICR, 0x40); + /* set all irqs to edge */ write_mmcr_byte(SC520_MPICMODE, 0x00); write_mmcr_byte(SC520_SL1PICMODE, 0x00); write_mmcr_byte(SC520_SL2PICMODE, 0x00); - - /* active low polarity on PIC interrupt pins, + + /* active low polarity on PIC interrupt pins, * active high polarity on all other irq pins */ write_mmcr_word(SC520_INTPINPOL, 0x0000); /* set irq number mapping */ - write_mmcr_byte(SC520_GPTMR0MAP, SC520_IRQ_DISABLED); /* disable GP timer 0 INT */ + write_mmcr_byte(SC520_GPTMR0MAP, SC520_IRQ_DISABLED); /* disable GP timer 0 INT */ write_mmcr_byte(SC520_GPTMR1MAP, SC520_IRQ_DISABLED); /* disable GP timer 1 INT */ write_mmcr_byte(SC520_GPTMR2MAP, SC520_IRQ_DISABLED); /* disable GP timer 2 INT */ - write_mmcr_byte(SC520_PIT0MAP, SC520_IRQ0); /* Set PIT timer 0 INT to IRQ0 */ + write_mmcr_byte(SC520_PIT0MAP, SC520_IRQ0); /* Set PIT timer 0 INT to IRQ0 */ write_mmcr_byte(SC520_PIT1MAP, SC520_IRQ_DISABLED); /* disable PIT timer 1 INT */ write_mmcr_byte(SC520_PIT2MAP, SC520_IRQ_DISABLED); /* disable PIT timer 2 INT */ write_mmcr_byte(SC520_PCIINTAMAP, SC520_IRQ_DISABLED); /* disable PCI INT A */ write_mmcr_byte(SC520_PCIINTBMAP, SC520_IRQ_DISABLED); /* disable PCI INT B */ write_mmcr_byte(SC520_PCIINTCMAP, SC520_IRQ_DISABLED); /* disable PCI INT C */ write_mmcr_byte(SC520_PCIINTDMAP, SC520_IRQ_DISABLED); /* disable PCI INT D */ - write_mmcr_byte(SC520_DMABCINTMAP, SC520_IRQ_DISABLED); /* disable DMA INT */ + write_mmcr_byte(SC520_DMABCINTMAP, SC520_IRQ_DISABLED); /* disable DMA INT */ write_mmcr_byte(SC520_SSIMAP, SC520_IRQ6); /* Set Synchronius serial INT to IRQ6*/ write_mmcr_byte(SC520_WDTMAP, SC520_IRQ_DISABLED); /* disable Watchdog INT */ write_mmcr_byte(SC520_RTCMAP, SC520_IRQ8); /* Set RTC int to 8 */ write_mmcr_byte(SC520_WPVMAP, SC520_IRQ_DISABLED); /* disable write protect INT */ write_mmcr_byte(SC520_ICEMAP, SC520_IRQ1); /* Set ICE Debug Serielport INT to IRQ1 */ write_mmcr_byte(SC520_FERRMAP,SC520_IRQ13); /* Set FP error INT to IRQ13 */ - + write_mmcr_byte(SC520_UART1MAP, SC520_IRQ4); /* Set internal UART2 INT to IRQ4 */ write_mmcr_byte(SC520_UART2MAP, SC520_IRQ3); /* Set internal UART2 INT to IRQ3 */ - + write_mmcr_byte(SC520_GP0IMAP, SC520_IRQ7); /* Set GPIRQ0 (PC-Card AUX IRQ) to IRQ7 */ write_mmcr_byte(SC520_GP1IMAP, SC520_IRQ14); /* Set GPIRQ1 (CF IRQ) to IRQ14 */ - write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ5); /* Set GPIRQ3 ( CAN IRQ ) ti IRQ5 */ + write_mmcr_byte(SC520_GP3IMAP, SC520_IRQ5); /* Set GPIRQ3 ( CAN IRQ ) ti IRQ5 */ write_mmcr_byte(SC520_GP4IMAP, SC520_IRQ_DISABLED); /* disbale GIRQ4 ( IRR IRQ ) */ write_mmcr_byte(SC520_GP5IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ5 */ write_mmcr_byte(SC520_GP6IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ6 */ @@ -89,19 +89,19 @@ write_mmcr_byte(SC520_GP8IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ8 */ write_mmcr_byte(SC520_GP9IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ9 */ write_mmcr_byte(SC520_GP2IMAP, SC520_IRQ_DISABLED); /* disable GPIRQ2 */ - write_mmcr_byte(SC520_GP10IMAP,SC520_IRQ_DISABLED); /* disable GPIRQ10 */ - + write_mmcr_byte(SC520_GP10IMAP,SC520_IRQ_DISABLED); /* disable GPIRQ10 */ + write_mmcr_word(SC520_PCIHOSTMAP, 0x11f); /* Map PCI hostbridge INT to NMI */ write_mmcr_word(SC520_ECCMAP, 0x100); /* Map SDRAM ECC failure INT to NMI */ - + } - + /* PCI stuff */ static void pci_sc520_spunk_fixup_irq(struct pci_controller *hose, pci_dev_t dev) { int version = read_mmcr_byte(SC520_SYSINFO); - + /* a configurable lists of irqs to steal * when we need one (a board with more pci interrupt pins * would use a larger table */ @@ -112,84 +112,83 @@ CFG_FORTH_PCI_IRQ }; static int next_irq_index=0; - - char tmp_pin; + + char tmp_pin; int pin; - + pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &tmp_pin); pin = tmp_pin; - + pin-=1; /* pci config space use 1-based numbering */ if (-1 == pin) { return; /* device use no irq */ } - - - + + /* map device number + pin to a pin on the sc520 */ switch (PCI_DEV(dev)) { - case 6: /* ETH0 */ + case 6: /* ETH0 */ pin+=SC520_PCI_INTA; break; - + case 7: /* ETH1 */ pin+=SC520_PCI_INTB; break; - + case 8: /* Crypto */ pin+=SC520_PCI_INTC; break; - + case 9: /* PMC slot */ pin+=SC520_PCI_INTD; break; - + case 10: /* PC-Card */ - - if (version < 10) { + + if (version < 10) { pin+=SC520_PCI_INTD; } else { pin+=SC520_PCI_INTC; } break; - - default: + + default: return; } - + pin&=3; /* wrap around */ - + if (sc520_pci_ints[pin] == -1) { - /* re-route one interrupt for us */ + /* re-route one interrupt for us */ if (next_irq_index > 3) { return; } - if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) { + if (pci_sc520_set_irq(pin, irq_list[next_irq_index])) { return; } next_irq_index++; } - + if (-1 != sc520_pci_ints[pin]) { - pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, + pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, sc520_pci_ints[pin]); } -#if 0 - printf("fixup_irq: device %d pin %c irq %d\n", +#if 0 + printf("fixup_irq: device %d pin %c irq %d\n", PCI_DEV(dev), 'A' + pin, sc520_pci_ints[pin]); #endif } -static void pci_sc520_spunk_configure_cardbus(struct pci_controller *hose, +static void pci_sc520_spunk_configure_cardbus(struct pci_controller *hose, pci_dev_t dev, struct pci_config_table *te) { u32 io_base; u32 temp; - + pciauto_config_device(hose, dev); - + pci_hose_write_config_word(hose, dev, PCI_COMMAND, 0x07); /* enable device */ pci_hose_write_config_byte(hose, dev, 0x0c, 0x10); /* cacheline size */ pci_hose_write_config_byte(hose, dev, 0x0d, 0x40); /* latency timer */ @@ -197,15 +196,15 @@ pci_hose_write_config_word(hose, dev, PCI_BRIDGE_CONTROL, 0x0040); /* reset cardbus */ pci_hose_write_config_word(hose, dev, PCI_BRIDGE_CONTROL, 0x0080); /* route interrupts though ExCA */ pci_hose_write_config_word(hose, dev, 0x44, 0x3e0); /* map legacy I/O port to 0x3e0 */ - - pci_hose_read_config_dword(hose, dev, 0x80, &temp); /* System control */ - pci_hose_write_config_dword(hose, dev, 0x80, temp | 0x60); /* System control: disable clockrun */ - /* route MF0 to ~INT and MF3 to IRQ7 + + pci_hose_read_config_dword(hose, dev, 0x80, &temp); /* System control */ + pci_hose_write_config_dword(hose, dev, 0x80, temp | 0x60); /* System control: disable clockrun */ + /* route MF0 to ~INT and MF3 to IRQ7 * reserve all others */ - pci_hose_write_config_dword(hose, dev, 0x8c, 0x00007002); + pci_hose_write_config_dword(hose, dev, 0x8c, 0x00007002); pci_hose_write_config_byte(hose, dev, 0x91, 0x00); /* card control */ pci_hose_write_config_byte(hose, dev, 0x92, 0x62); /* device control */ - + if (te->device != 0xac56) { pci_hose_write_config_byte(hose, dev, 0x93, 0x21); /* async interrupt enable */ pci_hose_write_config_word(hose, dev, 0xa8, 0x0000); /* reset GPIO */ @@ -216,22 +215,21 @@ pci_hose_write_config_byte(hose, dev, 0x93, 0x20); /* */ } pci_hose_write_config_word(hose, dev, 0xa4, 0x8000); /* reset power management */ - - + + pci_hose_read_config_dword(hose, dev, PCI_BASE_ADDRESS_0, &io_base); io_base &= ~0xfL; - + writeb(0x07, io_base+0x803); /* route CSC irq though ExCA and enable IRQ7 */ writel(0, io_base+0x10); /* CLKRUN default */ writel(0, io_base+0x20); /* CLKRUN default */ - + } - static struct pci_config_table pci_sc520_spunk_config_table[] = { - { 0x104c, 0xac50, PCI_ANY_ID, 0, 0x0a, 0, pci_sc520_spunk_configure_cardbus, { 0, 0, 0} }, - { 0x104c, 0xac56, PCI_ANY_ID, 0, 0x0a, 0, pci_sc520_spunk_configure_cardbus, { 0, 0, 0} }, + { 0x104c, 0xac50, PCI_ANY_ID, 0, 0x0a, 0, pci_sc520_spunk_configure_cardbus, { 0, 0, 0} }, + { 0x104c, 0xac56, PCI_ANY_ID, 0, 0x0a, 0, pci_sc520_spunk_configure_cardbus, { 0, 0, 0} }, { 0, 0, 0, 0, 0, 0, NULL, {0,0,0}} }; @@ -251,22 +249,22 @@ /* set up the ISA bus timing and system address mappings */ static void bus_init(void) { - /* versions + /* versions * 0 Hyglo versions 0.95 and 0.96 (large baords) * ?? Hyglo version 0.97 (small board) * 10 Spunk board */ int version = read_mmcr_byte(SC520_SYSINFO); - + if (version) { /* set up the GP IO pins (for the Spunk board) */ write_mmcr_word(SC520_PIOPFS31_16, 0xfff0); /* set the GPIO pin function 31-16 reg */ write_mmcr_word(SC520_PIOPFS15_0, 0x000f); /* set the GPIO pin function 15-0 reg */ write_mmcr_word(SC520_PIODIR31_16, 0x000f); /* set the GPIO direction 31-16 reg */ write_mmcr_word(SC520_PIODIR15_0, 0x1ff0); /* set the GPIO direction 15-0 reg */ - write_mmcr_byte(SC520_CSPFS, 0xc0); /* set the CS pin function reg */ + write_mmcr_byte(SC520_CSPFS, 0xc0); /* set the CS pin function reg */ write_mmcr_byte(SC520_CLKSEL, 0x70); - + write_mmcr_word(SC520_PIOCLR31_16, 0x0003); /* reset SSI chip-selects */ write_mmcr_word(SC520_PIOSET31_16, 0x000c); @@ -276,54 +274,52 @@ write_mmcr_word(SC520_PIOPFS15_0, 0x1e7f); /* set the GPIO pin function 15-0 reg */ write_mmcr_word(SC520_PIODIR31_16, 0x003f); /* set the GPIO direction 31-16 reg */ write_mmcr_word(SC520_PIODIR15_0, 0xe180); /* set the GPIO direction 15-0 reg */ - write_mmcr_byte(SC520_CSPFS, 0x00); /* set the CS pin function reg */ + write_mmcr_byte(SC520_CSPFS, 0x00); /* set the CS pin function reg */ write_mmcr_byte(SC520_CLKSEL, 0x70); - + write_mmcr_word(SC520_PIOCLR15_0, 0x0180); /* reset SSI chip-selects */ } - - write_mmcr_byte(SC520_GPCSRT, 1); /* set the GP CS offset */ + + write_mmcr_byte(SC520_GPCSRT, 1); /* set the GP CS offset */ write_mmcr_byte(SC520_GPCSPW, 3); /* set the GP CS pulse width */ write_mmcr_byte(SC520_GPCSOFF, 1); /* set the GP CS offset */ write_mmcr_byte(SC520_GPRDW, 3); /* set the RD pulse width */ write_mmcr_byte(SC520_GPRDOFF, 1); /* set the GP RD offset */ - write_mmcr_byte(SC520_GPWRW, 3); /* set the GP WR pulse width */ + write_mmcr_byte(SC520_GPWRW, 3); /* set the GP WR pulse width */ write_mmcr_byte(SC520_GPWROFF, 1); /* set the GP WR offset */ - write_mmcr_word(SC520_BOOTCSCTL, 0x0407); /* set up timing of BOOTCS */ - + write_mmcr_word(SC520_BOOTCSCTL, 0x0407); /* set up timing of BOOTCS */ + /* adjust the memory map: * by default the first 256MB (0x00000000 - 0x0fffffff) is mapped to SDRAM * and 256MB to 1G-128k (0x1000000 - 0x37ffffff) is mapped to PCI mmio - * we need to map 1G-128k - 1G (0x38000000 - 0x3fffffff) to CS1 */ - - - + * we need to map 1G-128k - 1G (0x38000000 - 0x3fffffff) to CS1 */ + + /* bootcs */ - write_mmcr_long(SC520_PAR12, 0x8bffe800); - + write_mmcr_long(SC520_PAR12, 0x8bffe800); + /* IDE0 = GPCS6 1f0-1f7 */ - write_mmcr_long(SC520_PAR3, 0x380801f0); + write_mmcr_long(SC520_PAR3, 0x380801f0); /* IDE1 = GPCS7 3f6 */ - write_mmcr_long(SC520_PAR4, 0x3c0003f6); + write_mmcr_long(SC520_PAR4, 0x3c0003f6); - asm ("wbinvd\n"); /* Flush cache, req. after setting the unchached attribute ona PAR */ + asm ("wbinvd\n"); /* Flush cache, req. after setting the unchached attribute ona PAR */ - write_mmcr_byte(SC520_ADDDECCTL, read_mmcr_byte(SC520_ADDDECCTL) & ~(UART2_DIS|UART1_DIS)); + write_mmcr_byte(SC520_ADDDECCTL, read_mmcr_byte(SC520_ADDDECCTL) & ~(UART2_DIS|UART1_DIS)); } - /* par usage: * PAR0 (legacy_video) * PAR1 (PCI ROM mapping) - * PAR2 - * PAR3 IDE + * PAR2 + * PAR3 IDE * PAR4 IDE * PAR5 (legacy_video) - * PAR6 + * PAR6 * PAR7 (legacy_video) * PAR8 (legacy_video) * PAR9 (legacy_video) @@ -335,21 +331,21 @@ * PAR15 */ -/* +/* * This function should map a chunk of size bytes * of the system address space to the ISA bus - * + * * The function will return the memory address * as seen by the host (which may very will be the * same as the bus address) */ -u32 isa_map_rom(u32 bus_addr, int size) +u32 isa_map_rom(u32 bus_addr, int size) { u32 par; - - printf("isa_map_rom asked to map %d bytes at %x\n", + + printf("isa_map_rom asked to map %d bytes at %x\n", size, bus_addr); - + par = size; if (par < 0x80000) { par = 0x80000; @@ -360,12 +356,12 @@ par <<= 18; par |= (bus_addr>>12); par |= 0x50000000; - + printf ("setting PAR11 to %x\n", par); - + /* Map rom 0x10000 with PAR1 */ write_mmcr_long(SC520_PAR11, par); - + return bus_addr; } @@ -386,19 +382,19 @@ #ifdef CONFIG_PCI #define PCI_ROM_TEMP_SPACE 0x10000 -/* +/* * This function should map a chunk of size bytes * of the system address space to the PCI bus, * suitable to map PCI ROMS (bus address < 16M) * the function will return the host memory address * which should be converted into a bus address - * before used to configure the PCI rom address + * before used to configure the PCI rom address * decoder */ -u32 pci_get_rom_window(struct pci_controller *hose, int size) +u32 pci_get_rom_window(struct pci_controller *hose, int size) { u32 par; - + par = size; if (par < 0x80000) { par = 0x80000; @@ -409,12 +405,12 @@ par <<= 14; par |= (PCI_ROM_TEMP_SPACE>>16); par |= 0x72000000; - + printf ("setting PAR1 to %x\n", par); - + /* Map rom 0x10000 with PAR1 */ write_mmcr_long(SC520_PAR1, par); - + return PCI_ROM_TEMP_SPACE; } @@ -431,51 +427,51 @@ return; } printf(" not ours\n"); - + } /* * This function is called in order to provide acces to the - * legacy video I/O ports on the PCI bus. - * After this function accesses to I/O ports 0x3b0-0x3bb and + * legacy video I/O ports on the PCI bus. + * After this function accesses to I/O ports 0x3b0-0x3bb and * 0x3c0-0x3df shuld result in transactions on the PCI bus. - * + * */ int pci_enable_legacy_video_ports(struct pci_controller *hose) { /* Map video memory to 0xa0000*/ write_mmcr_long(SC520_PAR0, 0x7200400a); - + /* forward all I/O accesses to PCI */ - write_mmcr_byte(SC520_ADDDECCTL, - read_mmcr_byte(SC520_ADDDECCTL) | IO_HOLE_DEST_PCI); - - + write_mmcr_byte(SC520_ADDDECCTL, + read_mmcr_byte(SC520_ADDDECCTL) | IO_HOLE_DEST_PCI); + + /* so we map away all io ports to pci (only way to access pci io * below 0x400. But then we have to map back the portions that we dont * use so that the generate cycles on the GPIO bus where the sio and - * ISA slots are connected, this requre the use of several PAR registers + * ISA slots are connected, this requre the use of several PAR registers */ - + /* bring 0x100 - 0x2f7 back to ISA using PAR5 */ - write_mmcr_long(SC520_PAR5, 0x31f70100); - + write_mmcr_long(SC520_PAR5, 0x31f70100); + /* com2 use 2f8-2ff */ - + /* bring 0x300 - 0x3af back to ISA using PAR7 */ - write_mmcr_long(SC520_PAR7, 0x30af0300); - + write_mmcr_long(SC520_PAR7, 0x30af0300); + /* vga use 3b0-3bb */ - + /* bring 0x3bc - 0x3bf back to ISA using PAR8 */ - write_mmcr_long(SC520_PAR8, 0x300303bc); - + write_mmcr_long(SC520_PAR8, 0x300303bc); + /* vga use 3c0-3df */ - + /* bring 0x3e0 - 0x3f7 back to ISA using PAR9 */ - write_mmcr_long(SC520_PAR9, 0x301703e0); - - /* com1 use 3f8-3ff */ + write_mmcr_long(SC520_PAR9, 0x301703e0); + + /* com1 use 3f8-3ff */ return 0; } @@ -488,20 +484,20 @@ int board_init(void) { DECLARE_GLOBAL_DATA_PTR; - - init_sc520(); + + init_sc520(); bus_init(); irq_init(); - + /* max drive current on SDRAM */ write_mmcr_word(SC520_DSCTL, 0x0100); - + /* enter debug mode after next reset (only if jumper is also set) */ write_mmcr_byte(SC520_RESCFG, 0x08); /* configure the software timer to 33.000MHz */ write_mmcr_byte(SC520_SWTMRCFG, 1); gd->bus_clk = 33000000; - + return 0; } @@ -513,25 +509,25 @@ void show_boot_progress(int val) { - int version = read_mmcr_byte(SC520_SYSINFO); - + int version = read_mmcr_byte(SC520_SYSINFO); + if (version == 0) { /* PIO31-PIO16 Data */ - write_mmcr_word(SC520_PIODATA31_16, + write_mmcr_word(SC520_PIODATA31_16, (read_mmcr_word(SC520_PIODATA31_16) & 0xffc0)| ((val&0x7e)>>1)); /* 0x1f8 >> 3 */ - + /* PIO0-PIO15 Data */ - write_mmcr_word(SC520_PIODATA15_0, + write_mmcr_word(SC520_PIODATA15_0, (read_mmcr_word(SC520_PIODATA15_0) & 0x1fff)| ((val&0x7)<<13)); } else { /* newer boards use PIO4-PIO12 */ /* PIO0-PIO15 Data */ -#if 0 - val = (val & 0x007) | ((val & 0x038) << 3) | ((val & 0x1c0) >> 3); +#if 0 + val = (val & 0x007) | ((val & 0x038) << 3) | ((val & 0x1c0) >> 3); #else - val = (val & 0x007) | ((val & 0x07e) << 2); + val = (val & 0x007) | ((val & 0x07e) << 2); #endif - write_mmcr_word(SC520_PIODATA15_0, + write_mmcr_word(SC520_PIODATA15_0, (read_mmcr_word(SC520_PIODATA15_0) & 0xe00f) | ((val&0x01ff)<<4)); } } @@ -539,17 +535,17 @@ int last_stage_init(void) { - + int version = read_mmcr_byte(SC520_SYSINFO); - + printf("Omicron Ceti SC520 Spunk revision %x\n", version); - + #if 0 if (version) { int x, y; - + printf("eeprom probe %d\n", spi_eeprom_probe(1)); - + spi_eeprom_read(1, 0, (u8*)&x, 2); spi_eeprom_read(1, 1, (u8*)&y, 2); printf("eeprom bytes %04x%04x\n", x, y); @@ -557,130 +553,129 @@ y ^= 0xffff; spi_eeprom_write(1, 0, (u8*)&x, 2); spi_eeprom_write(1, 1, (u8*)&y, 2); - + spi_eeprom_read(1, 0, (u8*)&x, 2); spi_eeprom_read(1, 1, (u8*)&y, 2); printf("eeprom bytes %04x%04x\n", x, y); - + } else { int x, y; - + printf("eeprom probe %d\n", mw_eeprom_probe(1)); - + mw_eeprom_read(1, 0, (u8*)&x, 2); mw_eeprom_read(1, 1, (u8*)&y, 2); printf("eeprom bytes %04x%04x\n", x, y); - + x ^= 0xffff; y ^= 0xffff; mw_eeprom_write(1, 0, (u8*)&x, 2); mw_eeprom_write(1, 1, (u8*)&y, 2); - + mw_eeprom_read(1, 0, (u8*)&x, 2); mw_eeprom_read(1, 1, (u8*)&y, 2); printf("eeprom bytes %04x%04x\n", x, y); - - + + } #endif ds1722_probe(2); - + return 0; } -void ssi_chip_select(int dev) +void ssi_chip_select(int dev) { int version = read_mmcr_byte(SC520_SYSINFO); - + if (version) { /* Spunk board: EEPROM and CAN are actove-low, TEMP and AUX are active high */ switch (dev) { case 1: /* EEPROM */ write_mmcr_word(SC520_PIOCLR31_16, 0x0004); break; - + case 2: /* Temp Probe */ write_mmcr_word(SC520_PIOSET31_16, 0x0002); break; - + case 3: /* CAN */ write_mmcr_word(SC520_PIOCLR31_16, 0x0008); break; - - case 4: /* AUX */ + + case 4: /* AUX */ write_mmcr_word(SC520_PIOSET31_16, 0x0001); break; - + case 0: write_mmcr_word(SC520_PIOCLR31_16, 0x0003); write_mmcr_word(SC520_PIOSET31_16, 0x000c); break; - + default: printf("Illegal SSI device requested: %d\n", dev); } } else { - + /* Globox board: Both EEPROM and TEMP are active-high */ switch (dev) { case 1: /* EEPROM */ write_mmcr_word(SC520_PIOSET15_0, 0x0100); break; - + case 2: /* Temp Probe */ write_mmcr_word(SC520_PIOSET15_0, 0x0080); break; - + case 0: write_mmcr_word(SC520_PIOCLR15_0, 0x0180); break; - + default: printf("Illegal SSI device requested: %d\n", dev); } - } + } } -void spi_init_f(void) +void spi_init_f(void) { read_mmcr_byte(SC520_SYSINFO) ? - spi_eeprom_probe(1) : + spi_eeprom_probe(1) : mw_eeprom_probe(1); - + } -ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len) +ssize_t spi_read(uchar *addr, int alen, uchar *buffer, int len) { int offset; int i; - + offset = 0; for (i=0;i #include @@ -91,4 +90,3 @@ /* everything is fine now */ mov pc, lr - diff --git a/board/shannon/shannon.c b/board/shannon/shannon.c index a55626d..1876e3e 100644 --- a/board/shannon/shannon.c +++ b/board/shannon/shannon.c @@ -40,24 +40,24 @@ #ifdef CONFIG_INFERNO { - unsigned long temp; - __asm__ __volatile__(/* disable MMU, enable icache */ - "mrc p15, 0, %0, c1, c0\n" - "bic %0, %0, #0x00002000\n" - "bic %0, %0, #0x0000000f\n" - "orr %0, %0, #0x00001000\n" - "orr %0, %0, #0x00000002\n" - "mcr p15, 0, %0, c1, c0\n" - /* flush caches */ - "mov %0, #0\n" - "mcr p15, 0, %0, c7, c7, 0\n" - "mcr p15, 0, %0, c8, c7, 0\n" - : "=r" (temp) - : - : "memory"); - /* setup PCMCIA timing */ - temp = 0xa0000018; - *(unsigned long *)temp = 0x00060006; + unsigned long temp; + __asm__ __volatile__(/* disable MMU, enable icache */ + "mrc p15, 0, %0, c1, c0\n" + "bic %0, %0, #0x00002000\n" + "bic %0, %0, #0x0000000f\n" + "orr %0, %0, #0x00001000\n" + "orr %0, %0, #0x00000002\n" + "mcr p15, 0, %0, c1, c0\n" + /* flush caches */ + "mov %0, #0\n" + "mcr p15, 0, %0, c7, c7, 0\n" + "mcr p15, 0, %0, c8, c7, 0\n" + : "=r" (temp) + : + : "memory"); + /* setup PCMCIA timing */ + temp = 0xa0000018; + *(unsigned long *)temp = 0x00060006; } #endif /* CONFIG_INIT_CRITICAL */ diff --git a/board/shannon/u-boot.lds b/board/shannon/u-boot.lds index f4b0ade..d1fe8aa 100644 --- a/board/shannon/u-boot.lds +++ b/board/shannon/u-boot.lds @@ -26,28 +26,33 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/sa1100/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } armboot_end = .; + } diff --git a/board/siemens/CCM/Makefile b/board/siemens/CCM/Makefile index 548647a..ee2fc53 100644 --- a/board/siemens/CCM/Makefile +++ b/board/siemens/CCM/Makefile @@ -29,7 +29,7 @@ ../../tqm8xx/load_sernum_ethaddr.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/siemens/CCM/fpga_ccm.c b/board/siemens/CCM/fpga_ccm.c index 292387b..11b97bc 100644 --- a/board/siemens/CCM/fpga_ccm.c +++ b/board/siemens/CCM/fpga_ccm.c @@ -167,4 +167,3 @@ } return 0; } - diff --git a/board/siemens/CCM/u-boot.lds b/board/siemens/CCM/u-boot.lds index 4b0129f..86e587f 100644 --- a/board/siemens/CCM/u-boot.lds +++ b/board/siemens/CCM/u-boot.lds @@ -109,6 +109,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -131,4 +136,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/siemens/CCM/u-boot.lds.debug b/board/siemens/CCM/u-boot.lds.debug index 84c4248..4e67721 100644 --- a/board/siemens/CCM/u-boot.lds.debug +++ b/board/siemens/CCM/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/siemens/IAD210/IAD210.c b/board/siemens/IAD210/IAD210.c index 4897046..30adbfc 100644 --- a/board/siemens/IAD210/IAD210.c +++ b/board/siemens/IAD210/IAD210.c @@ -57,27 +57,27 @@ * */ 0xFFFAF834, 0xFFE5B435, /* last */ - _NOT_USED_, + _NOT_USED_, /* * Burst Read. (Offset 8 in UPMA RAM) */ 0xFE2DB004, 0xF0AF7404, 0xF0AFFC00, 0xF0AFFC00, 0xF0AFFC00, 0xF0AAF800, 0xF1A5E447, /* last */ - _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, /* * Single Write. (Offset 18 in UPMA RAM) */ 0xFE29B300, 0xF1A27304, 0xFFA5F747, /* last */ - _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, /* * Burst Write. (Offset 20 in UPMA RAM) */ 0x1F0DFC04, 0xEEABBC00, 0x10A77C00, 0xF0AFFC00, 0xF1AAF804, 0xFFA5F447, /* last */ - _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, _NOT_USED_, /* @@ -90,18 +90,17 @@ * MRS sequence (Offset 38 in UPMA RAM) */ 0xFFAAB834, 0xFFA57434, 0xFFAFFC05, /* last */ - _NOT_USED_, + _NOT_USED_, /* * Exception. (Offset 3c in UPMA RAM) */ 0xFFAFFC04, 0xFFAFFC05, /* last */ - _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, }; /* ------------------------------------------------------------------------- */ - long int initdram (int board_type) { volatile immap_t *immap = (immap_t *)CFG_IMMR; diff --git a/board/siemens/IAD210/Makefile b/board/siemens/IAD210/Makefile index 0982e7c..87a6893 100644 --- a/board/siemens/IAD210/Makefile +++ b/board/siemens/IAD210/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o atm.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/siemens/IAD210/flash.c b/board/siemens/IAD210/flash.c index 1ed5262..110858d 100644 --- a/board/siemens/IAD210/flash.c +++ b/board/siemens/IAD210/flash.c @@ -140,7 +140,7 @@ } printf (" Size: %ld MB in %d Sectors\n", - info->size >> 20, info->sector_count); + info->size >> 20, info->sector_count); printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { @@ -149,7 +149,7 @@ printf (" %08lX%s", info->start[i], info->protect[i] ? " (RO)" : " " - ); + ); } printf ("\n"); } diff --git a/board/siemens/IAD210/u-boot.lds b/board/siemens/IAD210/u-boot.lds index 15366d5..d2f2848 100644 --- a/board/siemens/IAD210/u-boot.lds +++ b/board/siemens/IAD210/u-boot.lds @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/siemens/SCM/Makefile b/board/siemens/SCM/Makefile index b7e26ff..af646e4 100644 --- a/board/siemens/SCM/Makefile +++ b/board/siemens/SCM/Makefile @@ -30,7 +30,7 @@ $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/siemens/SCM/scm.c b/board/siemens/SCM/scm.c index aa6181d..9467b1f 100644 --- a/board/siemens/SCM/scm.c +++ b/board/siemens/SCM/scm.c @@ -97,20 +97,20 @@ /* PB20 */ { 1, 1, 1, 0, 0, 0 }, /* TDM_D2 L1RSYNC */ /* PB19 */ { 1, 0, 0, 0, 0, 0 }, /* UID */ /* PB18 */ { 0, 1, 0, 0, 0, 0 }, - /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_DV */ - /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_ER */ - /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_ER */ - /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_EN */ - /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII COL */ - /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII CRS */ - /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[3] */ - /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[2] */ - /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[1] */ - /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[0] */ - /* PB7 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[3] */ - /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[2] */ - /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[1] */ - /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[0] */ + /* PB17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_DV */ + /* PB16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_ER */ + /* PB15 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_ER */ + /* PB14 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TX_EN */ + /* PB13 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII COL */ + /* PB12 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII CRS */ + /* PB11 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[3] */ + /* PB10 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[2] */ + /* PB9 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[1] */ + /* PB8 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RxD[0] */ + /* PB7 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[3] */ + /* PB6 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[2] */ + /* PB5 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[1] */ + /* PB4 */ { 1, 1, 0, 1, 0, 0 }, /* FCC3 MII TxD[0] */ /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* pin doesn't exist */ @@ -133,8 +133,8 @@ /* PC20 */ { 1, 1, 0, 0, 0, 0 }, /* FCC1 MII RX_CLK */ /* PC19 */ { 0, 1, 0, 0, 0, 0 }, /* PC18 */ { 0, 1, 0, 0, 0, 0 }, - /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_CLK */ - /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII TX_CLK */ + /* PC17 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII RX_CLK */ + /* PC16 */ { 1, 1, 0, 0, 0, 0 }, /* FCC3 MII TX_CLK */ /* PC15 */ { 0, 0, 0, 1, 0, 0 }, /* PC14 */ { 0, 1, 0, 0, 0, 0 }, /* PC13 */ { 0, 0, 0, 1, 0, 0 }, /* RES_PHY_L */ @@ -360,7 +360,7 @@ ulong start = memctl->memc_ ## brX & 0xFFFF8000; \ ulong sizem = ~memctl->memc_ ## orX | 0x00007FFF; \ printf ("\n" \ - #brX " 0x%08x " #orX " 0x%08x " \ + #brX " 0x%08x " #orX " 0x%08x " \ "==> 0x%08lx ... 0x%08lx = %ld MB\n", \ memctl->memc_ ## brX, memctl->memc_ ## orX, \ start, start+sizem, (sizem+1)>>20); \ diff --git a/board/siemens/SCM/u-boot.lds b/board/siemens/SCM/u-boot.lds index 9d56f13..ce6c454 100644 --- a/board/siemens/SCM/u-boot.lds +++ b/board/siemens/SCM/u-boot.lds @@ -94,6 +94,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -116,4 +121,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/siemens/common/fpga.c b/board/siemens/common/fpga.c index a17de5a..7edeb0a 100644 --- a/board/siemens/common/fpga.c +++ b/board/siemens/common/fpga.c @@ -26,8 +26,6 @@ #include #include #include -#include -#include #include "fpga.h" @@ -146,7 +144,7 @@ if (hdr.ih_magic != IH_MAGIC) { strcpy (msg, "Bad Image Magic Number"); - goto failure; + goto failure; } len = sizeof(image_header_t); @@ -293,6 +291,14 @@ return 1; } +cmd_tbl_t U_BOOT_CMD(fpga) = MK_CMD_ENTRY( + "fpga", 4, 1, do_fpga, + "fpga - access FPGA(s)\n", + "fpga status [name] - print FPGA status\n" + "fpga reset [name] - reset FPGA\n" + "fpga load [name] addr - load FPGA configuration data\n" +); + #endif /* CONFIG_COMMANDS & CFG_CMD_BSP */ /* . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . */ diff --git a/board/siemens/pcu_e/Makefile b/board/siemens/pcu_e/Makefile index 35b8428..7a2014d 100644 --- a/board/siemens/pcu_e/Makefile +++ b/board/siemens/pcu_e/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/siemens/pcu_e/pcu_e.c b/board/siemens/pcu_e/pcu_e.c index 6c0b5eb..a8d73cc 100644 --- a/board/siemens/pcu_e/pcu_e.c +++ b/board/siemens/pcu_e/pcu_e.c @@ -53,9 +53,9 @@ /* * SDRAM Initialization (offset 5 in UPM RAM) * - * This is no UPM entry point. The following definition uses - * the remaining space to establish an initialization - * sequence, which is executed by a RUN command. + * This is no UPM entry point. The following definition uses + * the remaining space to establish an initialization + * sequence, which is executed by a RUN command. * */ 0x1ffddc35, 0xefceac34, 0x1f3d5c35, /* last */ @@ -433,6 +433,12 @@ printf ("Usage:\n%s\n", cmdtp->usage); return 1; } +cmd_tbl_t U_BOOT_CMD(puma) = MK_CMD_ENTRY( + "puma", 4, 1, do_puma, + "puma - access PUMA FPGA\n", + "status - print PUMA status\n" + "puma load addr len - load PUMA configuration data\n" +); #endif /* CFG_CMD_BSP */ diff --git a/board/siemens/pcu_e/u-boot.lds b/board/siemens/pcu_e/u-boot.lds index 3764878..fffa79e 100644 --- a/board/siemens/pcu_e/u-boot.lds +++ b/board/siemens/pcu_e/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +125,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/siemens/pcu_e/u-boot.lds.debug b/board/siemens/pcu_e/u-boot.lds.debug index 9183016..153286b 100644 --- a/board/siemens/pcu_e/u-boot.lds.debug +++ b/board/siemens/pcu_e/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -129,4 +134,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/sixnet/Makefile b/board/sixnet/Makefile index ef173d0..13ce9fc 100644 --- a/board/sixnet/Makefile +++ b/board/sixnet/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/sixnet/flash.c b/board/sixnet/flash.c index 3bf2ff8..225513a 100644 --- a/board/sixnet/flash.c +++ b/board/sixnet/flash.c @@ -199,32 +199,32 @@ case FLASH_AM640U: fmt = "29LV641D (64 Mbit, uniform sectors)\n"; break; - case FLASH_28F800C3B: - case FLASH_28F800C3T: + case FLASH_28F800C3B: + case FLASH_28F800C3T: fmt = "28F800C3%s (8 Mbit, %s)\n"; break; case FLASH_INTEL800B: case FLASH_INTEL800T: fmt = "28F800B3%s (8 Mbit, %s)\n"; break; - case FLASH_28F160C3B: - case FLASH_28F160C3T: + case FLASH_28F160C3B: + case FLASH_28F160C3T: fmt = "28F160C3%s (16 Mbit, %s)\n"; break; case FLASH_INTEL160B: case FLASH_INTEL160T: fmt = "28F160B3%s (16 Mbit, %s)\n"; break; - case FLASH_28F320C3B: - case FLASH_28F320C3T: + case FLASH_28F320C3B: + case FLASH_28F320C3T: fmt = "28F320C3%s (32 Mbit, %s)\n"; break; case FLASH_INTEL320B: case FLASH_INTEL320T: fmt = "28F320B3%s (32 Mbit, %s)\n"; break; - case FLASH_28F640C3B: - case FLASH_28F640C3T: + case FLASH_28F640C3B: + case FLASH_28F640C3T: fmt = "28F640C3%s (64 Mbit, %s)\n"; break; case FLASH_INTEL640B: @@ -545,15 +545,15 @@ left > 0 && res == 0; addr += sizeof(data), left -= sizeof(data) - bytes) { - bytes = addr & (sizeof(data) - 1); - addr &= ~(sizeof(data) - 1); + bytes = addr & (sizeof(data) - 1); + addr &= ~(sizeof(data) - 1); /* combine source and destination data so can program * an entire word of 16 or 32 bits */ - for (i = 0; i < sizeof(data); i++) { - data <<= 8; - if (i < bytes || i - bytes >= left ) + for (i = 0; i < sizeof(data); i++) { + data <<= 8; + if (i < bytes || i - bytes >= left ) data += *((uchar *)addr + i); else data += *src++; diff --git a/board/sixnet/fpgadata.c b/board/sixnet/fpgadata.c index b756a65..2d3a7b3 100644 --- a/board/sixnet/fpgadata.c +++ b/board/sixnet/fpgadata.c @@ -1,1719 +1,1719 @@ - 0xff, 0x87, 0xff, 0x88, 0x7f, 0xff, 0xf9, 0xff, - 0xff, 0xf5, 0xff, 0x8f, 0xff, 0xf0, 0x8f, 0xf9, - 0xff, 0xef, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xf0, - 0xff, 0xff, 0xff, 0xff, 0x8f, 0x7f, 0xf1, 0xcf, - 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef, - 0x7f, 0x7b, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x77, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x86, 0xf6, 0xf0, 0xff, - 0xf0, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x0f, 0x7f, - 0xc1, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xf8, 0xff, 0xff, 0xf6, 0xf0, 0xff, 0xff, - 0x7f, 0x8f, 0x7f, 0xf0, 0xff, 0x0f, 0x7f, 0xff, - 0xff, 0xff, 0xff, 0x8f, 0x7f, - 0xff, 0xf8, 0xf7, 0x8f, 0xcf, 0xf0, 0xf6, 0xff, - 0xff, 0xef, 0xff, 0xfb, 0x7f, 0x2f, 0x1f, 0x71, - 0xf5, 0xff, 0xff, 0xef, 0x7f, - 0xff, 0x7f, 0xff, 0xf7, 0xf6, 0xfe, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xf7, 0x7f, 0x77, 0xf7, 0xff, 0xfb, - 0x0f, 0xff, 0xf0, 0xff, 0xff, 0x7f, 0xff, 0xff, - 0xfe, 0xff, 0x8f, 0x7f, 0xf1, - 0xff, 0xff, 0xfa, 0xce, 0xff, 0xfd, 0xff, 0xff, - 0x9f, 0xff, 0x8e, 0xff, 0xf0, 0xbf, 0x7f, 0xf5, - 0xff, 0xef, 0x9f, 0xfd, 0x81, - 0xff, 0xf9, 0xff, 0xff, 0xff, 0xfe, 0xff, 0xff, - 0xff, 0xef, 0x9f, 0xfb, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x7f, - 0xff, 0x77, 0xfa, 0xb6, 0xff, 0x78, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xbf, 0xfd, 0x0f, 0x7f, 0xf1, - 0xff, 0xff, 0xff, 0xff, 0x8f, - 0xff, 0xf6, 0xf7, 0xf6, 0x7f, 0xbf, 0xff, 0xff, - 0xff, 0xff, 0xef, 0xbf, 0xf2, 0x7f, 0xef, 0xff, - 0xfe, 0xfb, 0xff, 0xef, 0xff, - 0xff, 0xf7, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xbf, - 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x7f, 0xff, 0xff, - 0xff, 0xf7, 0xff, 0xf7, 0xcf, 0x8f, 0xff, 0xf0, - 0xef, 0xf9, 0xfb, 0xff, 0xff, 0xff, 0x9f, 0x0f, - 0x65, 0xe1, 0xfb, 0x7b, 0xf3, - 0xff, 0xf7, 0xf6, 0xfe, 0xff, 0x8f, 0xf6, 0xe8, - 0xf6, 0xf1, 0xff, 0xff, 0xff, 0xf9, 0xff, 0xff, - 0x6f, 0x61, 0xf1, 0xfb, 0xff, - 0xff, 0xde, 0x8f, 0x8f, 0xf0, 0xf0, 0xff, 0xff, - 0xf7, 0xbf, 0xff, 0xd4, 0x8f, 0x0f, 0x71, 0xc1, - 0x6f, 0xd1, 0xeb, 0x5f, 0xfd, - 0xff, 0x9f, 0xff, 0xfb, 0xff, 0x8f, 0x9f, 0xf7, - 0x9f, 0xff, 0xf4, 0xb7, 0xfd, 0xff, 0xfe, 0x8f, - 0xbf, 0x71, 0x1f, 0xff, 0x7f, - 0xff, 0xfd, 0x87, 0x87, 0xf0, 0x70, 0x1f, 0xf7, - 0xbf, 0xff, 0xff, 0xff, 0x8f, 0x0f, 0x71, 0x81, - 0xbf, 0x3e, 0x7f, 0x7f, 0xff, - 0xff, 0xff, 0xff, 0xff, 0x8f, 0xff, 0x7f, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xf1, 0xff, 0xff, 0xff, 0xff, - 0xbf, 0xff, 0x07, 0xff, 0xf0, 0xff, 0xff, 0xff, - 0xfe, 0xff, 0xff, 0xf7, 0x8d, 0x7f, 0xf1, 0xff, - 0xff, 0x9f, 0x6f, 0xf1, 0xff, - 0xbf, 0x71, 0x87, 0xfe, 0xf0, 0x8f, 0x8f, 0xf0, - 0xfb, 0xcb, 0xff, 0xf0, 0x8f, 0x7f, 0xf1, 0x8f, - 0x1e, 0xe1, 0x7e, 0x91, 0x7f, - 0xbf, 0x1a, 0xff, 0x71, 0xff, 0x9f, 0x8f, 0xf6, - 0xf8, 0xdf, 0xf7, 0xf4, 0xff, 0xff, 0xff, 0x8f, - 0x1f, 0xf0, 0x7f, 0x97, 0xff, - 0xbf, 0x97, 0xff, 0xfb, 0xbf, 0xdf, 0xff, 0xf7, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xaf, 0xdf, - 0xf9, 0xff, 0xff, 0xff, 0xff, - 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xdf, 0xff, 0xf1, 0xff, - 0xff, 0x9f, 0xfc, 0xfb, 0xff, 0xf0, 0xfe, 0xff, - 0xff, 0xff, 0x9d, 0xff, 0xf4, 0xcf, 0xff, 0x7f, - 0xf7, 0xff, 0xff, 0xff, 0xcf, - 0xff, 0x97, 0xff, 0xfa, 0xff, 0x8f, 0xf8, 0xf0, - 0xff, 0xff, 0xff, 0xdf, 0xff, 0xfd, 0xff, 0x0f, - 0x7f, 0xe1, 0xff, 0xf1, 0xff, - 0xff, 0x83, 0x7f, 0xf8, 0xff, 0xff, 0xff, 0xff, - 0x7f, 0x6f, 0x7f, 0x77, 0x7d, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x8f, 0x6f, 0xf1, - 0xff, 0xd7, 0xff, 0xfe, 0xff, 0xff, 0x9f, 0xfd, - 0x78, 0xef, 0xff, 0xbf, 0xff, 0xf5, 0xff, 0xff, - 0xbf, 0x0f, 0x79, 0xd1, 0xff, - 0xff, 0xd2, 0xff, 0x72, 0xff, 0xff, 0xff, 0xff, - 0x8f, 0xfe, 0x70, 0x9d, 0xff, 0xf4, 0xff, 0xfe, - 0xff, 0xff, 0xff, 0xbf, 0x7f, - 0xff, 0x07, 0xff, 0x78, 0xff, 0x9f, 0xff, 0xfe, - 0xff, 0x77, 0x7f, 0x8f, 0x7f, 0xf0, 0xff, 0x8f, - 0x7f, 0xe1, 0x0f, 0x71, 0xf1, - 0xff, 0xfe, 0xff, 0xfd, 0xff, 0xff, 0xff, 0xff, - 0x7f, 0xfd, 0xff, 0xba, 0x7f, 0xff, 0xff, 0xff, - 0xff, 0xef, 0x7f, 0xa1, 0x7f, - 0xff, 0xbd, 0x7f, 0xf7, 0xf9, 0xfd, 0xfb, 0xff, - 0xff, 0x8f, 0xbf, 0xb7, 0x8f, 0xaf, 0xdf, 0xff, - 0xff, 0xff, 0xff, 0x5f, 0xeb, - 0xbf, 0xfd, 0xf8, 0xff, 0xff, 0xfb, 0xff, 0xfb, - 0xff, 0xf7, 0xcf, 0xfb, 0xf0, 0xff, 0xff, 0xdf, - 0xff, 0xff, 0xef, 0x7f, 0xab, - 0xff, 0xfd, 0xfa, 0xbf, 0x8f, 0xbf, 0xca, 0xfe, - 0xff, 0xff, 0xdf, 0x6f, 0xd4, 0xf6, 0x0f, 0x3f, - 0x11, 0xf9, 0xff, 0x7f, 0x8b, - 0xbf, 0xff, 0x8f, 0xff, 0xc0, 0xfb, 0xf5, 0xef, - 0xf7, 0x7f, 0xff, 0xff, 0xfb, 0x7f, 0xff, 0x7f, - 0xff, 0x6f, 0xff, 0xff, 0xff, - 0xbf, 0x87, 0xbb, 0xf8, 0xfb, 0xcf, 0xfe, 0xfe, - 0xff, 0xef, 0xff, 0xfb, 0x7f, 0xff, 0xff, 0x8f, - 0xff, 0xe1, 0x7f, 0x7b, 0xff, - 0xbf, 0x80, 0x89, 0x88, 0xb0, 0xf5, 0xf0, 0xff, - 0xf7, 0xdf, 0xfe, 0x7c, 0x8f, 0x0f, 0x71, 0xe1, - 0xff, 0xf1, 0xe5, 0x0e, 0x2b, - 0xff, 0xff, 0xff, 0xbf, 0xff, 0xcf, 0xf5, 0x9f, - 0xff, 0xff, 0xfe, 0xff, 0x8f, 0x7f, 0x71, 0x8f, - 0xff, 0x91, 0x7f, 0xfb, 0xff, - 0xff, 0x7f, 0x7f, 0xcf, 0x8a, 0xff, 0xf0, 0xff, - 0x57, 0xfe, 0xfb, 0x8f, 0xff, 0xf0, 0xff, 0x7e, - 0xff, 0xff, 0x9a, 0xff, 0xf1, - 0xff, 0xff, 0xcf, 0xb7, 0xce, 0xff, 0xf4, 0xff, - 0xff, 0x7f, 0xf7, 0xfb, 0xff, 0xfe, 0xff, 0x7f, - 0xff, 0xfd, 0xfe, 0x75, 0xfd, - 0xff, 0xef, 0xcf, 0xff, 0xf5, 0xff, 0xf5, 0xff, - 0xf7, 0xff, 0xff, 0xff, 0xff, 0x7f, 0x7f, 0xff, - 0xcf, 0x7f, 0x31, 0x7f, 0xff, - 0x3f, 0x78, 0xf8, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0x0f, 0x0f, 0xf1, 0xf1, 0xdf, 0xff, 0xff, - 0xff, 0x9f, 0xff, 0x84, 0x0e, - 0xff, 0xf8, 0x7f, 0xf7, 0x7f, 0xff, 0xff, 0x8f, - 0x8f, 0x80, 0xf1, 0xf1, 0xff, 0xff, 0xff, 0xff, - 0xfe, 0x9f, 0x8e, 0x05, 0x71, - 0xbf, 0xf8, 0xf8, 0xff, 0x7f, 0xff, 0xff, 0xff, - 0xff, 0x8f, 0x8f, 0xf1, 0xf1, 0xff, 0xff, 0xff, - 0xfe, 0xff, 0xff, 0x8f, 0x0f, - 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, - 0x8f, 0x8f, 0xf1, 0xf1, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x8e, 0x0f, 0x71, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x7f, 0xf7, 0xff, 0xff, 0x8f, 0xff, - 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0x8f, 0x7f, 0xf0, 0xff, 0xff, - 0x7f, 0xf8, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, - 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff, - 0xff, 0x9f, 0xff, 0x8f, 0x7e, - 0xbf, 0xff, 0x78, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xfe, 0xff, 0x8f, - 0xff, 0x87, 0x7f, 0xf8, 0xff, 0xff, 0xff, 0xff, - 0x8f, 0xff, 0xf0, 0x8f, 0xff, 0xf0, 0xff, 0xff, - 0xff, 0xff, 0x8e, 0x7f, 0xf1, - 0xff, 0xf8, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0x8f, 0x7f, - 0x3f, 0xff, 0xf8, 0xff, 0x8f, 0x7f, 0xf0, 0x8f, - 0xff, 0xf0, 0x0f, 0xff, 0x70, 0xff, 0x8f, 0x7e, - 0xf1, 0xdf, 0xff, 0xfb, 0x8e, - 0xff, 0x80, 0x7f, 0xf0, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xaf, 0x7f, 0x84, 0xff, 0xf1, 0xff, 0xfe, - 0xff, 0xff, 0xfe, 0x8f, 0x7f, - 0xff, 0x80, 0xff, 0xf8, 0xff, 0x7f, 0xff, 0xff, - 0x7f, 0x8f, 0xff, 0x81, 0x7f, 0xf0, 0xff, 0xff, - 0xff, 0xff, 0xff, 0x8f, 0x7f, - 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0x8f, 0x7f, 0xf0, 0xdf, 0xdf, 0xff, 0xdf, 0xff, - 0xff, 0xff, 0x8f, 0x7f, 0xf1, - 0xff, 0xfd, 0xff, 0xff, 0xff, 0x0f, 0xff, 0x80, - 0xff, 0xf0, 0xff, 0xff, 0xdf, 0xff, 0xdf, 0x8e, - 0x0f, 0x01, 0x71, 0xf1, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xdf, 0xff, 0xdf, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xfe, - 0xbf, 0x87, 0xf8, 0xf8, 0xff, 0xff, 0xff, 0xff, - 0x7f, 0xff, 0x8f, 0x8f, 0xd0, 0xf0, 0xdf, 0xfe, - 0xff, 0xff, 0xff, 0xff, 0x8f, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfd, - 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0x7f, 0xff, 0xff, - 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfe, - 0xff, 0xff, 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xfd, - 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xfe, - 0xff, 0xdf, 0xff, 0xfb, 0xff, - 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xfd, - 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, - 0xaf, 0xfe, 0xf5, 0xff, 0xff, - 0xff, 0xff, 0x0f, 0x8f, 0xf0, 0x80, 0xff, 0xf0, - 0xff, 0xff, 0xff, 0xff, 0x1f, 0xaf, 0x71, 0xa7, - 0x6f, 0xf5, 0xfe, 0xff, 0xff, - 0xff, 0x77, 0x79, 0x8f, 0xff, 0xf0, 0x8f, 0xff, - 0x00, 0xff, 0xd0, 0x4f, 0x3d, 0xf0, 0xf7, 0xfd, - 0x8f, 0x7f, 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0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7f, + 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7e, + 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7e, + 0xff, 0xff, 0x7f, 0xff, 0xff, + 0xff, 0xff, 0x7f, 0xff, 0x7f, 0xff, 0xff, 0xff, + 0x7f, 0x7f, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7f, + 0x8f, 0xfe, 0xf0, 0xff, 0xff, + 0xbf, 0xff, 0x0e, 0x8f, 0x70, 0x80, 0xff, 0xf0, + 0xff, 0xff, 0xff, 0xff, 0x0f, 0x7f, 0xf1, 0x0f, + 0x7f, 0xf1, 0xfe, 0xff, 0x9f, + 0xbf, 0x1f, 0xfb, 0x0c, 0xff, 0xf0, 0x8f, 0xff, + 0x00, 0xff, 0xb0, 0x3f, 0x71, 0x80, 0xff, 0xf1, + 0x8f, 0x7f, 0x81, 0x7e, 0xc1, + 0xff, 0xff, 0xff, 0x7f, 0x8f, 0x0f, 0x70, 0xf0, + 0x8f, 0x7f, 0x70, 0xcf, 0x8f, 0xff, 0x71, 0x0f, + 0x7e, 0xf1, 0x8f, 0x7f, 0xf1, + 0x7f, 0xff, 0x7f, 0x0f, 0xff, 0x78, 0x8f, 0x8f, + 0x70, 0x70, 0x7f, 0xfe, 0xff, 0x8f, 0xff, 0x70, + 0xff, 0xfe, 0xff, 0xff, 0xbe, + 0xff, 0xf8, 0xf7, 0x0b, 0xf7, 0x88, 0xf7, 0xf0, + 0x8f, 0x8f, 0x70, 0xf0, 0x7e, 0x73, 0xff, 0x8f, + 0x7e, 0xf0, 0xff, 0x8f, 0x7f, + 0xff, 0x78, 0x77, 0xff, 0x8f, 0x8f, 0xf0, 0xf0, + 0xff, 0x8f, 0x77, 0x70, 0x77, 0x7f, 0xff, 0x7f, + 0xff, 0xff, 0xfe, 0x8f, 0x7f, + 0xff, 0xff, 0x77, 0x8f, 0xff, 0xf0, 0xff, 0xff, + 0x77, 0x7f, 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xef, 0x7f, 0xff, 0xbf, + 0xbf, 0xff, 0x74, 0xff, 0xff, 0x8f, 0xff, 0xfc, + 0x0f, 0xf3, 0x8c, 0xff, 0xfd, 0xff, 0xff, 0x8f, + 0x7f, 0xf1, 0x8f, 0x7d, 0x83, + 0xff, 0x7f, 0x77, 0xff, 0xff, 0xff, 0xff, 0xfb, + 0xf7, 0x7f, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x78, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, + 0x0f, 0x8f, 0x70, 0x70, 0xf7, 0xff, 0xff, 0xff, + 0xff, 0xff, 0x8e, 0x0f, 0x71, + 0xff, 0xf8, 0xf7, 0x7f, 0xff, 0x8f, 0x8f, 0x80, + 0x80, 0x81, 0x70, 0x70, 0x7f, 0xff, 0xff, 0xff, + 0xff, 0x6f, 0x8f, 0x0f, 0x71, + 0xbf, 0x7f, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, + 0x7b, 0xff, 0x9f, 0xff, 0x70, 0xff, 0xff, 0xff, + 0xff, 0x7f, 0xff, 0xfe, 0x8f, + 0xff, 0x87, 0x7f, 0x78, 0xfe, 0xff, 0x9e, 0xff, + 0xf2, 0x7f, 0xff, 0x0f, 0xff, 0xf0, 0xff, 0xef, + 0xff, 0x7f, 0xff, 0xff, 0xff, + 0x7f, 0x7f, 0xff, 0x7f, 0xff, 0xff, 0xfe, 0x8f, + 0xff, 0x70, 0xff, 0x7f, 0xff, 0xff, 0xdf, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xfe, + 0xff, 0xff, 0x7f, 0xf7, 0xff, 0xfe, 0xff, 0xff, + 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xdf, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0x7f, 0x7f, 0x8f, 0x8f, 0xf0, 0xf0, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xfd, 0xaf, 0x0f, + 0x70, 0xd1, 0xff, 0xf8, 0xfe, + 0xff, 0xff, 0xff, 0xf7, 0xaf, 0x8f, 0xfa, 0xf0, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x9f, 0x8f, 0x0f, + 0x79, 0xe1, 0xff, 0xfe, 0xff, + 0xbf, 0xff, 0xff, 0x7a, 0x8f, 0xff, 0xf0, 0xef, + 0xff, 0xfb, 0xff, 0xaf, 0xff, 0xfb, 0x8f, 0x7f, + 0xf1, 0xdf, 0xff, 0xf9, 0xff, + 0xbf, 0xff, 0xff, 0xf7, 0xff, 0xaf, 0xff, 0xba, + 0xaf, 0xff, 0xfb, 0xff, 0xff, 0xff, 0xef, 0xdf, + 0xff, 0xfd, 0xbe, 0xf7, 0xf5, + 0xff, 0xf8, 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xff, + 0xff, 0x8f, 0xf7, 0xf0, 0xff, 0xff, 0x8f, 0x3f, + 0x11, 0xeb, 0xdb, 0xcf, 0x7f, + 0xbf, 0xf0, 0x8f, 0x87, 0xf0, 0xf0, 0xff, 0xbf, + 0xff, 0x8f, 0xff, 0xf1, 0x8f, 0x0f, 0x31, 0xf1, + 0x9f, 0xdf, 0xf9, 0x85, 0x7f, + 0xbf, 0xff, 0x8f, 0x7f, 0xf0, 0xff, 0xff, 0xff, + 0xee, 0xff, 0xfb, 0xf7, 0x8f, 0x7f, 0xb1, 0xff, + 0xff, 0xff, 0xff, 0xdf, 0xfd, + 0xff, 0xff, 0xff, 0x8f, 0x8f, 0xf0, 0x80, 0xff, + 0xf0, 0xff, 0xff, 0xff, 0xff, 0x8f, 0x2f, 0x71, + 0xc1, 0x7f, 0xf1, 0xff, 0xff, + 0xff, 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xff, 0xbf, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f, 0x7f, 0xd1, + 0x9f, 0xff, 0x7b, 0xb7, 0xff, + 0xbf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xfe, 0x8f, 0xff, 0xf1, 0xff, 0xff, + 0xff, 0xff, 0xbf, 0xb7, 0xff, + 0xff, 0xa4, 0xf7, 0x88, 0xff, 0xf0, 0xaf, 0xbf, + 0xfb, 0xef, 0xff, 0xf7, 0xff, 0x8f, 0x7f, 0xf1, + 0xff, 0xdd, 0xf7, 0x97, 0x7f, + 0xff, 0xff, 0xf7, 0xff, 0x8f, 0xff, 0xf0, 0xff, + 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f, 0x7f, + 0xf1, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xf7, 0xaf, 0x0f, 0xa0, 0xf0, + 0xfb, 0xff, 0xff, 0xff, 0xff, 0xff, 0x8f, 0x0f, + 0x71, 0xb1, 0x37, 0xf7, 0xff, + 0xff, 0xb8, 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, + 0xff, 0x8f, 0xff, 0xf0, 0xfe, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0x8f, 0x7f, + 0xbf, 0xff, 0xf8, 0xf7, 0xff, 0xa7, 0xff, 0xf0, + 0xff, 0xff, 0x8f, 0xfe, 0xf0, 0xff, 0xff, 0x8f, + 0x7f, 0xf1, 0xff, 0xff, 0xcf, + 0xff, 0xff, 0xf7, 0x9f, 0xf7, 0xf3, 0xff, 0xff, + 0xff, 0xff, 0x7f, 0xff, 0xff, 0xbf, 0x7f, 0xf9, + 0xff, 0xfe, 0xff, 0xff, 0xdf, + 0xff, 0xff, 0xff, 0xff, 0xff, 0x7f, 0xff, 0x7f, + 0xff, 0xff, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xbf, 0xbf, + 0xff, 0xff, 0xff, 0xaf, 0xff, 0xf0, 0xff, 0xff, + 0x9f, 0xfe, 0xf1, 0xff, 0xff, 0xcf, 0x7f, 0xf1, + 0xff, 0xff, 0xdf, 0xff, 0xf1, + 0xbf, 0xff, 0xf0, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0x8f, 0xff, 0xf0, 0xbf, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0x6f, + 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, 0x7f, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xbf, + 0xff, 0xf8, 0xff, 0xff, 0xdf, 0xff, 0xff, 0xff, + 0xff, 0x8f, 0xff, 0xf1, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xcf, 0xff, + 0xff, 0xd8, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0x8f, 0xef, 0xe0, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0x8f, 0x3f, + 0xff, 0xdf, 0xf7, 0xff, 0x0f, 0xfe, 0xf0, 0xff, + 0xff, 0xff, 0xff, 0xef, 0xff, 0xdf, 0x8e, 0x7f, + 0xf1, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xf7, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xff, 0xfe, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, + 0xbf, 0xbf, 0xff, 0xff, 0xff, + 0xff, 0xff, 0x8f, 0xff, 0xf1, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xef, 0xff, 0xbf, 0x7f, 0xe1, 0xff, + 0xdf, 0xff, 0x7f, 0xff, 0xbf, + 0xff, 0xa7, 0xff, 0x88, 0xff, 0xf1, 0xfe, 0xff, + 0xff, 0xff, 0xff, 0x1f, 0xff, 0xf0, 0xcf, 0xb1, + 0xff, 0xef, 0xff, 0x7f, 0xff, diff --git a/board/sixnet/sixnet.c b/board/sixnet/sixnet.c index ec1cb8b..e33925c 100644 --- a/board/sixnet/sixnet.c +++ b/board/sixnet/sixnet.c @@ -174,7 +174,7 @@ /* write program data to FPGA at the programming address * so extra /CS1 strobes at end of configuration don't actually - * write to any registers. + * write to any registers. */ fpga = 0xff; /* first write is ignored */ fpga = 0xff; /* fill byte */ @@ -378,7 +378,7 @@ ramsize = 0; /* no RAM present, or defective */ else { *base_addr = 0xaaaa5555; - *(base_addr + 1) = 0x5555aaaa; /* use write to modify data bus */ + *(base_addr + 1) = 0x5555aaaa; /* use write to modify data bus */ if (*base_addr != 0xaaaa5555) ramsize = 0; /* no RAM present, or defective */ } @@ -422,7 +422,7 @@ _not_used_, _not_used_, _not_used_, _not_used_, /* single write. (offset 18 in upm RAM) */ - /* FADS had 0x1f27fc04, ... + /* FADS had 0x1f27fc04, ... * but most other boards have 0x1f07fc04, which * sets GPL0 from A11MPC to 0 1/4 clock earlier, * like the single read. @@ -518,7 +518,7 @@ * This may be too fast, but works for any memory. * It is adjusted to 4096 cycles in 64 milliseconds if * possible once we know what memory we have. - * + * * We have to be careful changing UPM registers after we * ask it to run these commands. * @@ -532,7 +532,7 @@ * SCCR[DFBRG] 0 * PTP divide by 8 * 1 chip select - */ + */ memctl->memc_mptpr = MPTPR_PTP_DIV8; /* 0x0800 */ memctl->memc_mamr = SDRAM_MAMR_8COL & (~MAMR_PTAE); /* no refresh yet */ @@ -602,4 +602,3 @@ return (size_sdram); } - diff --git a/board/sixnet/u-boot.lds b/board/sixnet/u-boot.lds index 64d5391..f35328a 100644 --- a/board/sixnet/u-boot.lds +++ b/board/sixnet/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +125,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/smdk2400/Makefile b/board/smdk2400/Makefile index 6dbd4e7..367eabd 100644 --- a/board/smdk2400/Makefile +++ b/board/smdk2400/Makefile @@ -29,7 +29,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/smdk2400/memsetup.S b/board/smdk2400/memsetup.S index b53e996..b507d81 100644 --- a/board/smdk2400/memsetup.S +++ b/board/smdk2400/memsetup.S @@ -28,7 +28,6 @@ */ - #include #include @@ -162,4 +161,3 @@ .word 0x10 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 32M/32M */ .word 0x30 /* MRSR6, CL=3clk */ .word 0x30 /* MRSR7 */ - diff --git a/board/smdk2400/u-boot.lds b/board/smdk2400/u-boot.lds index 8c9c218..af3cd19 100644 --- a/board/smdk2400/u-boot.lds +++ b/board/smdk2400/u-boot.lds @@ -27,28 +27,33 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/arm920t/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } armboot_end = .; + } diff --git a/board/smdk2410/Makefile b/board/smdk2410/Makefile index 79ab33a..af1e6e6 100644 --- a/board/smdk2410/Makefile +++ b/board/smdk2410/Makefile @@ -29,7 +29,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/smdk2410/flash.c b/board/smdk2410/flash.c index 5d04ed4..d7479f0 100644 --- a/board/smdk2410/flash.c +++ b/board/smdk2410/flash.c @@ -313,7 +313,7 @@ */ result = *addr; if ((result & data) != data) - return ERR_NOT_ERASED; + return ERR_NOT_ERASED; /* @@ -366,7 +366,7 @@ *addr = CMD_READ_ARRAY; if (chip == ERR || *addr != data) - rc = ERR_PROG_ERROR; + rc = ERR_PROG_ERROR; if (iflag) enable_interrupts(); diff --git a/board/smdk2410/memsetup.S b/board/smdk2410/memsetup.S index 3a84be5..c00e772 100644 --- a/board/smdk2410/memsetup.S +++ b/board/smdk2410/memsetup.S @@ -28,7 +28,6 @@ */ - #include #include diff --git a/board/smdk2410/u-boot.lds b/board/smdk2410/u-boot.lds index 8c9c218..0cf076a 100644 --- a/board/smdk2410/u-boot.lds +++ b/board/smdk2410/u-boot.lds @@ -27,28 +27,34 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/arm920t/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } armboot_end = .; + } diff --git a/board/spd8xx/Makefile b/board/spd8xx/Makefile index ef173d0..13ce9fc 100644 --- a/board/spd8xx/Makefile +++ b/board/spd8xx/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/spd8xx/spd8xx.c b/board/spd8xx/spd8xx.c index 6428896..61201d7 100644 --- a/board/spd8xx/spd8xx.c +++ b/board/spd8xx/spd8xx.c @@ -41,7 +41,7 @@ */ 0x0FF3FC04, 0x0FF3EC00, 0x7FFFEC04, 0xFFFFEC04, 0xFFFFEC05, /* last */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, /* * Burst Read. (Offset 8 in UPM RAM) */ @@ -55,7 +55,7 @@ */ 0x0FAFFC04, 0x0FAFEC00, 0x7FFFEC04, 0xFFFFEC04, 0xFFFFEC05, /* last */ - _NOT_USED_, _NOT_USED_, _NOT_USED_, + _NOT_USED_, _NOT_USED_, _NOT_USED_, /* * Burst Write. (Offset 20 in UPM RAM) */ @@ -89,9 +89,9 @@ /* * SDRAM Initialization (offset 5 in UPM RAM) * - * This is no UPM entry point. The following definition uses - * the remaining space to establish an initialization - * sequence, which is executed by a RUN command. + * This is no UPM entry point. The following definition uses + * the remaining space to establish an initialization + * sequence, which is executed by a RUN command. * */ 0x1FF77C35, 0xEFEABC34, 0x1FB57C35, /* last */ @@ -282,8 +282,8 @@ immr->im_ioport.iop_padat &= ~(PA_ENET_MDC); /* set MDC = 0 */ /* - * RESET in implemented by a positive pulse of at least 1 us - * at the reset pin. + * RESET in implemented by a positive pulse of at least 1 us + * at the reset pin. * * Configure RESET pins for NS DP83843 PHY, and RESET chip. * diff --git a/board/spd8xx/u-boot.lds b/board/spd8xx/u-boot.lds index debcd49..f801d3b 100644 --- a/board/spd8xx/u-boot.lds +++ b/board/spd8xx/u-boot.lds @@ -98,6 +98,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -120,4 +125,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/spd8xx/u-boot.lds.debug b/board/spd8xx/u-boot.lds.debug index bd13b7b..0245f78 100644 --- a/board/spd8xx/u-boot.lds.debug +++ b/board/spd8xx/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -129,4 +134,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/svm_sc8xx/Makefile b/board/svm_sc8xx/Makefile index ef173d0..13ce9fc 100644 --- a/board/svm_sc8xx/Makefile +++ b/board/svm_sc8xx/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/svm_sc8xx/flash.c b/board/svm_sc8xx/flash.c index b50f77b..25e61dd 100644 --- a/board/svm_sc8xx/flash.c +++ b/board/svm_sc8xx/flash.c @@ -1,5 +1,4 @@ /* - * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -68,44 +67,44 @@ } #ifdef CFG_DOC_BASE #ifndef CONFIG_FEL8xx_AT - memctl->memc_or5 = (0xffff8000 | CFG_OR_TIMING_DOC ); /* 32k bytes */ - memctl->memc_br5 = CFG_DOC_BASE | 0x401; + memctl->memc_or5 = (0xffff8000 | CFG_OR_TIMING_DOC ); /* 32k bytes */ + memctl->memc_br5 = CFG_DOC_BASE | 0x401; #else - memctl->memc_or3 = (0xffff8000 | CFG_OR_TIMING_DOC ); /* 32k bytes */ - memctl->memc_br3 = CFG_DOC_BASE | 0x401; + memctl->memc_or3 = (0xffff8000 | CFG_OR_TIMING_DOC ); /* 32k bytes */ + memctl->memc_br3 = CFG_DOC_BASE | 0x401; #endif #endif #if defined( CONFIG_BOOT_8B) -// memctl->memc_or0 = 0xfff80ff4; /* 4MB bytes */ -// memctl->memc_br0 = 0x40000401; - size_b0 = 0x80000; /* 512 K */ - flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM040; - flash_info[0].sector_count = 8; - flash_info[0].size = 0x00080000; - /* set up sector start address table */ - for (i = 0; i < flash_info[0].sector_count; i++) - flash_info[0].start[i] = 0x40000000 + (i * 0x10000); - /* protect all sectors */ - for (i = 0; i < flash_info[0].sector_count; i++) - flash_info[0].protect[i] = 0x1; +/* memctl->memc_or0 = 0xfff80ff4; /###* 4MB bytes */ +/* memctl->memc_br0 = 0x40000401; */ + size_b0 = 0x80000; /* 512 K */ + flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM040; + flash_info[0].sector_count = 8; + flash_info[0].size = 0x00080000; + /* set up sector start address table */ + for (i = 0; i < flash_info[0].sector_count; i++) + flash_info[0].start[i] = 0x40000000 + (i * 0x10000); + /* protect all sectors */ + for (i = 0; i < flash_info[0].sector_count; i++) + flash_info[0].protect[i] = 0x1; #elif defined (CONFIG_BOOT_16B) -// memctl->memc_or0 = 0xfff80ff4; /* 4MB bytes */ -// memctl->memc_br0 = 0x40000401; - size_b0 = 0x400000; /* 4MB , assume AMD29LV320B */ - flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM320B; - flash_info[0].sector_count = 67; - flash_info[0].size = 0x00400000; - /* set up sector start address table */ - flash_info[0].start[0] = 0x40000000 ; - flash_info[0].start[1] = 0x40000000 + 0x4000; - flash_info[0].start[2] = 0x40000000 + 0x6000; - flash_info[0].start[3] = 0x40000000 + 0x8000; - for (i = 4; i < flash_info[0].sector_count; i++) - flash_info[0].start[i] = 0x40000000 + 0x10000 + ((i-4) * 0x10000); - /* protect all sectors */ - for (i = 0; i < flash_info[0].sector_count; i++) - flash_info[0].protect[i] = 0x1; -#endif +/* memctl->memc_or0 = 0xfff80ff4; /###* 4MB bytes */ +/* memctl->memc_br0 = 0x40000401; */ + size_b0 = 0x400000; /* 4MB , assume AMD29LV320B */ + flash_info[0].flash_id = FLASH_MAN_AMD | FLASH_AM320B; + flash_info[0].sector_count = 67; + flash_info[0].size = 0x00400000; + /* set up sector start address table */ + flash_info[0].start[0] = 0x40000000 ; + flash_info[0].start[1] = 0x40000000 + 0x4000; + flash_info[0].start[2] = 0x40000000 + 0x6000; + flash_info[0].start[3] = 0x40000000 + 0x8000; + for (i = 4; i < flash_info[0].sector_count; i++) + flash_info[0].start[i] = 0x40000000 + 0x10000 + ((i-4) * 0x10000); + /* protect all sectors */ + for (i = 0; i < flash_info[0].sector_count; i++) + flash_info[0].protect[i] = 0x1; +#endif #ifdef CONFIG_BOOT_32B @@ -482,7 +481,7 @@ for (sect = s_first; sect<=s_last; sect++) { if (info->protect[sect] == 0) { /* not protected */ addr = (vu_long*)(info->start[sect]); - //addr[0] = 0x00300030; + /*addr[0] = 0x00300030; */ my_out_8( (unsigned char *) ((ulong)addr),0x30 ); l_sect = sect; } @@ -553,11 +552,11 @@ last = start; addr = (vu_long*)(info->start[l_sect]); #if defined (CONFIG_BOOT_8B) - while ( (my_in_8((unsigned char *)addr) & 0x80) != 0x80 ) + while ( (my_in_8((unsigned char *)addr) & 0x80) != 0x80 ) #elif defined(CONFIG_BOOT_16B ) - while ( (my_in_be16((unsigned short *)addr) & 0x0080) != 0x0080 ) + while ( (my_in_be16((unsigned short *)addr) & 0x0080) != 0x0080 ) #elif defined(CONFIG_BOOT_32B) - while ( (my_in_be32((unsigned *)addr) & 0x00800080) != 0x00800080 ) + while ( (my_in_be32((unsigned *)addr) & 0x00800080) != 0x00800080 ) #else # error CONFIG_BOOT_(size)B missing. #endif @@ -688,7 +687,7 @@ my_out_8( (unsigned char * ) (addr+0x555) , 0x90 ); in_mid=my_in_8( (unsigned char * ) addr ); in_did=my_in_8( (unsigned char * ) (addr+1) ); - printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did ); + printf(" man ID=0x%x, dev ID=0x%x.\n",in_mid,in_did ); my_out_8( (unsigned char *)addr, 0xf0); udelay(1); } @@ -696,7 +695,7 @@ { int data_ch[4]; data_ch[0]=(int ) ((data>>24) & 0xff); - data_ch[1]=(int ) ((data>>16) &0xff ); + data_ch[1]=(int ) ((data>>16) &0xff ); data_ch[2]=(int ) ((data >>8) & 0xff); data_ch[3]=(int ) (data & 0xff); for (i=0;i<4;i++ ){ @@ -708,7 +707,7 @@ if (flag) enable_interrupts(); - start = get_timer (0); + start = get_timer (0); last = start; while( ( my_in_8((unsigned char *) (dest+i)) ) != ( data_ch[i] ) ) { if (get_timer(start) > CFG_FLASH_WRITE_TOUT ) { @@ -719,7 +718,7 @@ } #elif defined( CONFIG_BOOT_16B) data_short[0]=(int) (data>>16) & 0xffff; - data_short[1]=(int ) data & 0xffff ; + data_short[1]=(int ) data & 0xffff ; for (i=0;i<2;i++ ){ my_out_be16( (unsigned short *) ((ulong)addr+ 0xaaa),0xaa ); my_out_be16( (unsigned short *) ((ulong)addr+ 0x554),0x55 ); @@ -728,7 +727,7 @@ /* re-enable interrupts if necessary */ if (flag) enable_interrupts(); - start = get_timer (0); + start = get_timer (0); last = start; while( ( my_in_be16((unsigned short *) (dest+(i*2))) ) != ( data_short[i] ) ) { if (get_timer(start) > CFG_FLASH_WRITE_TOUT ) { @@ -755,8 +754,8 @@ } } #endif - - + + return (0); } #ifdef CONFIG_BOOT_8B @@ -776,8 +775,8 @@ static int my_in_be16( unsigned short *addr) { int ret; - __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); - return ret; + __asm__ __volatile__("lhz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); + return ret; } static void my_out_be16( unsigned short *addr, int val) { @@ -787,15 +786,12 @@ #ifdef CONFIG_BOOT_32B static unsigned my_in_be32( unsigned *addr) { - unsigned ret; - __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); - return ret; + unsigned ret; + __asm__ __volatile__("lwz%U1%X1 %0,%1; eieio" : "=r" (ret) : "m" (*addr)); + return ret; } static void my_out_be32( unsigned *addr, int val) { __asm__ __volatile__("stw%U0%X0 %1,%0; eieio" : "=m" (*addr) : "r" (val)); } #endif - - - diff --git a/board/svm_sc8xx/svm_sc8xx.c b/board/svm_sc8xx/svm_sc8xx.c index db3162a..1311ea9 100644 --- a/board/svm_sc8xx/svm_sc8xx.c +++ b/board/svm_sc8xx/svm_sc8xx.c @@ -101,7 +101,7 @@ /* ------------------------------------------------------------------------- */ long int initdram (int board_type) -{ +{ volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; long int size_b0 = 0; @@ -145,7 +145,7 @@ udelay(1); memctl->memc_or1 = 0xfc000a00; size_b0 = 0x04000000; -#else +#else #error SDRAM size configuration missing. #endif memctl->memc_br1 = 0x00000081; @@ -160,4 +160,3 @@ doc_probe (CFG_DOC_BASE); } #endif - diff --git a/board/svm_sc8xx/u-boot.lds b/board/svm_sc8xx/u-boot.lds index 0225f0b..36e4836 100644 --- a/board/svm_sc8xx/u-boot.lds +++ b/board/svm_sc8xx/u-boot.lds @@ -112,6 +112,12 @@ _edata = .; PROVIDE (edata = .); + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -134,4 +140,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/svm_sc8xx/u-boot.lds.debug b/board/svm_sc8xx/u-boot.lds.debug index 22138f8..f34c2a4 100644 --- a/board/svm_sc8xx/u-boot.lds.debug +++ b/board/svm_sc8xx/u-boot.lds.debug @@ -128,4 +128,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/tqm8260/Makefile b/board/tqm8260/Makefile index 2a150a1..c10b9fe 100644 --- a/board/tqm8260/Makefile +++ b/board/tqm8260/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o ../tqm8xx/load_sernum_ethaddr.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/tqm8260/u-boot.lds b/board/tqm8260/u-boot.lds index 9d56f13..ce6c454 100644 --- a/board/tqm8260/u-boot.lds +++ b/board/tqm8260/u-boot.lds @@ -94,6 +94,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -116,4 +121,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/tqm8xx/Makefile b/board/tqm8xx/Makefile index 99c0f85..a01fd86 100644 --- a/board/tqm8xx/Makefile +++ b/board/tqm8xx/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o load_sernum_ethaddr.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/tqm8xx/u-boot.lds b/board/tqm8xx/u-boot.lds index 71e8f7f..10dc7d2 100644 --- a/board/tqm8xx/u-boot.lds +++ b/board/tqm8xx/u-boot.lds @@ -112,6 +112,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -134,4 +139,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/tqm8xx/u-boot.lds.debug b/board/tqm8xx/u-boot.lds.debug index 22138f8..c0ee849 100644 --- a/board/tqm8xx/u-boot.lds.debug +++ b/board/tqm8xx/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/trab/Makefile b/board/trab/Makefile index bb6930d..d58ac91 100644 --- a/board/trab/Makefile +++ b/board/trab/Makefile @@ -29,7 +29,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/trab/flash.c b/board/trab/flash.c index a2a21c6..aba0631 100644 --- a/board/trab/flash.c +++ b/board/trab/flash.c @@ -439,7 +439,7 @@ else { data = *((vu_long *) src); } - + if ((rc = write_word (info, wp, data)) != 0) { return (rc); } diff --git a/board/trab/memsetup.S b/board/trab/memsetup.S index ea4bccc..7914513 100644 --- a/board/trab/memsetup.S +++ b/board/trab/memsetup.S @@ -28,7 +28,6 @@ */ - #include #include @@ -165,4 +164,3 @@ .word 0x17 /* BUSWIDTH=32, SCLK power saving mode, BANKSIZE 16M/16M */ .word 0x30 /* MRSR6, CL=3clk */ .word 0x30 /* MRSR7 */ - diff --git a/board/trab/trab.c b/board/trab/trab.c index dd4105d..1a4f5c5 100644 --- a/board/trab/trab.c +++ b/board/trab/trab.c @@ -24,9 +24,9 @@ /* #define DEBUG */ #include -#include #include #include +#include /* ------------------------------------------------------------------------- */ @@ -298,6 +298,12 @@ return 0; } +cmd_tbl_t U_BOOT_CMD(kbd) = MK_CMD_ENTRY( + "kbd", 1, 1, do_kbd, + "kbd - read keyboard status\n", + NULL +); + #ifdef CONFIG_MODEM_SUPPORT static int key_pressed(void) { diff --git a/board/trab/u-boot.lds b/board/trab/u-boot.lds index 5ea1829..ccffb19 100644 --- a/board/trab/u-boot.lds +++ b/board/trab/u-boot.lds @@ -27,9 +27,9 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/arm920t/start.o (.text) @@ -44,19 +44,24 @@ *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); - .bss : { *(.bss) } + . = ALIGN(4); + .bss : { *(.bss) } + armboot_end = .; } diff --git a/board/utx8245/Makefile b/board/utx8245/Makefile index d040e00..e698afc 100644 --- a/board/utx8245/Makefile +++ b/board/utx8245/Makefile @@ -35,7 +35,7 @@ SOBJS = $(LIB): .depend $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/utx8245/u-boot.lds b/board/utx8245/u-boot.lds index b45f8fa..ae62484 100644 --- a/board/utx8245/u-boot.lds +++ b/board/utx8245/u-boot.lds @@ -108,6 +108,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -131,4 +136,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/utx8245/utx8245.c b/board/utx8245/utx8245.c index a8c82e4..38c427a 100644 --- a/board/utx8245/utx8245.c +++ b/board/utx8245/utx8245.c @@ -162,4 +162,3 @@ icache_enable(); } - diff --git a/board/v37/Makefile b/board/v37/Makefile index baecac9..7a17067 100644 --- a/board/v37/Makefile +++ b/board/v37/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/v37/flash.c b/board/v37/flash.c index b42f335..6a31972 100644 --- a/board/v37/flash.c +++ b/board/v37/flash.c @@ -57,8 +57,8 @@ volatile immap_t *immap = (immap_t *)CFG_IMMR; volatile memctl8xx_t *memctl = &immap->im_memctl; unsigned long size_b0, size_b1; - short manu, dev_id; - int i; + short manu, dev_id; + int i; /* Init: no FLASHes known */ for (i=0; imemc_or0 = CFG_OR_TIMING_FLASH | (0 - size_b0); @@ -83,32 +83,32 @@ &flash_info[0]); #endif - flash_get_id_long((void*)CFG_FLASH_BASE1,&manu,&dev_id); + flash_get_id_long((void*)CFG_FLASH_BASE1,&manu,&dev_id); - size_b1 = 2 * flash_get_size(manu, dev_id, &flash_info[1]); + size_b1 = 2 * flash_get_size(manu, dev_id, &flash_info[1]); - flash_get_offsets(CFG_FLASH_BASE1, &flash_info[1],1); + flash_get_offsets(CFG_FLASH_BASE1, &flash_info[1],1); memctl->memc_or1 = CFG_OR_TIMING_FLASH | (0 - size_b1); flash_info[0].size = size_b0; flash_info[1].size = size_b1; - return (size_b0+size_b1); + return (size_b0+size_b1); } /*----------------------------------------------------------------------- */ static void flash_get_offsets (ulong base, flash_info_t *info, int two_chips) { - int i, addr_shift; - vu_short *addr = (vu_short*)base; + int i, addr_shift; + vu_short *addr = (vu_short*)base; addr[0x555] = 0x00AA ; addr[0xAAA] = 0x0055 ; addr[0x555] = 0x0090 ; - addr_shift = (two_chips ? 2 : 1 ); + addr_shift = (two_chips ? 2 : 1 ); /* set up sector start address table */ if (info->flash_id & FLASH_BTYPE) { @@ -210,7 +210,7 @@ static void flash_get_id_word( void *ptr, short *ptr_manuf, short *ptr_dev_id) { - vu_short *addr = (vu_short*)ptr; + vu_short *addr = (vu_short*)ptr; addr[0x555] = 0x00AA ; addr[0xAAA] = 0x0055 ; @@ -219,26 +219,26 @@ *ptr_manuf = addr[0]; *ptr_dev_id = addr[1]; - addr[0] = 0xf0f0; /* return to normal */ + addr[0] = 0xf0f0; /* return to normal */ } static void flash_get_id_long( void *ptr, short *ptr_manuf, short *ptr_dev_id) { - vu_short *addr = (vu_short*)ptr; - vu_short *addr1, *addr2, *addr3; + vu_short *addr = (vu_short*)ptr; + vu_short *addr1, *addr2, *addr3; - addr1 = (vu_short*) ( ((int)ptr) + (0x5555<<2) ); - addr2 = (vu_short*) ( ((int)ptr) + (0x2AAA<<2) ); - addr3 = (vu_short*) ( ((int)ptr) + (0x5555<<2) ); + addr1 = (vu_short*) ( ((int)ptr) + (0x5555<<2) ); + addr2 = (vu_short*) ( ((int)ptr) + (0x2AAA<<2) ); + addr3 = (vu_short*) ( ((int)ptr) + (0x5555<<2) ); - *addr1 = 0xAAAA; - *addr2 = 0x5555; - *addr3 = 0x9090; + *addr1 = 0xAAAA; + *addr2 = 0x5555; + *addr3 = 0x9090; *ptr_manuf = addr[0]; *ptr_dev_id = addr[2]; - addr[0] = 0xf0f0; /* return to normal */ + addr[0] = 0xf0f0; /* return to normal */ } static ulong flash_get_size ( short manu, short dev_id, flash_info_t *info) @@ -295,7 +295,7 @@ case ((short)AMD_ID_LV800B): info->flash_id += FLASH_AM800B; info->sector_count = 19; - info->size = 0x00400000; //%%% Size doubled by yooth + info->size = 0x00400000; /*%%% Size doubled by yooth */ break; /* => 4 MB */ case ((short)AMD_ID_LV160T): @@ -315,7 +315,7 @@ } - return(info->size); + return(info->size); } diff --git a/board/v37/u-boot.lds b/board/v37/u-boot.lds index 303425a..ab1bbc9 100644 --- a/board/v37/u-boot.lds +++ b/board/v37/u-boot.lds @@ -114,6 +114,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -136,8 +141,3 @@ _end = . ; PROVIDE (end = .); } - - - - - diff --git a/board/v37/v37.c b/board/v37/v37.c index f463af8..3b786ef 100644 --- a/board/v37/v37.c +++ b/board/v37/v37.c @@ -44,33 +44,33 @@ const uint sdram_table[] = { - /* single read. (offset 0 in upm RAM) */ - 0x1F07D004, 0xEEAEE004, 0x11ADD004, 0xEFBBA000, - 0x1FF75447, 0x1FF77C34, 0xEFEABC34, 0x1FB57C35, + /* single read. (offset 0 in upm RAM) */ + 0x1F07D004, 0xEEAEE004, 0x11ADD004, 0xEFBBA000, + 0x1FF75447, 0x1FF77C34, 0xEFEABC34, 0x1FB57C35, - /* burst read. (Offset 8 in upm RAM) */ - 0x1F07D004, 0xEEAEE004, 0x00ADC004, 0x00AFC000, - 0x00AFC000, 0x01AFC000, 0x0FBB8000, 0x1FF75447, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + /* burst read. (Offset 8 in upm RAM) */ + 0x1F07D004, 0xEEAEE004, 0x00ADC004, 0x00AFC000, + 0x00AFC000, 0x01AFC000, 0x0FBB8000, 0x1FF75447, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - /* single write. (Offset 0x18 in upm RAM) */ - 0x1F27D004, 0xEEAEA000, 0x01B90004, 0x1FF75447, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + /* single write. (Offset 0x18 in upm RAM) */ + 0x1F27D004, 0xEEAEA000, 0x01B90004, 0x1FF75447, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - /* burst write. (Offset 0x20 in upm RAM) */ - 0x1F07D004, 0xEEAEA000, 0x00AD4000, 0x00AFC000, - 0x00AFC000, 0x01BB8004, 0x1FF75447, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + /* burst write. (Offset 0x20 in upm RAM) */ + 0x1F07D004, 0xEEAEA000, 0x00AD4000, 0x00AFC000, + 0x00AFC000, 0x01BB8004, 0x1FF75447, 0xFFFFFFFF, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - /* Refresh cycle, offset 0x30 */ - 0x1FF5DC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, - 0xFFFFFC84, 0xFFFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, - 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + /* Refresh cycle, offset 0x30 */ + 0x1FF5DC84, 0xFFFFFC04, 0xFFFFFC04, 0xFFFFFC04, + 0xFFFFFC84, 0xFFFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, + 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, - /* Exception, 0ffset 0x3C */ - 0x7FFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, + /* Exception, 0ffset 0x3C */ + 0x7FFFFC07, 0xFFFFFFFF, 0xFFFFFFFF, 0xFFFFFFFF, }; /* ------------------------------------------------------------------------- */ @@ -121,7 +121,7 @@ delay_cnt = 0; while( delay_cnt++ < DRAM_DELAY ) - ; + ; /* Run MRS command in location 5-8 of UPMB */ @@ -132,7 +132,7 @@ delay_cnt = 0; while( delay_cnt++ < DRAM_DELAY ) - ; + ; #ifdef CONFIG_CAN_DRIVER /* Initialize OR3 / BR3 */ @@ -207,12 +207,12 @@ switch( memory ) { - case 1: - return( 32*MBYTE ); - case 2: - return( 64*MBYTE ); - default: - break; + case 1: + return( 32*MBYTE ); + case 2: + return( 64*MBYTE ); + default: + break; } return( 16*MBYTE ); } diff --git a/board/w7o/cmd_vpd.c b/board/w7o/cmd_vpd.c index 3025699..2763a53 100644 --- a/board/w7o/cmd_vpd.c +++ b/board/w7o/cmd_vpd.c @@ -57,4 +57,11 @@ return 1; } +cmd_tbl_t U_BOOT_CMD(vpd) = MK_CMD_ENTRY( + "vpd", 2, 1, do_vpd, + "vpd - Read Vital Product Data\n", + "[dev_addr]\n" + " - Read VPD Data from default address, or device address 'dev_addr'.\n" +); + #endif /* (CONFIG_COMMANDS & CFG_CMD_BSP) */ diff --git a/board/w7o/config.mk b/board/w7o/config.mk index c73329e..bc341ca 100644 --- a/board/w7o/config.mk +++ b/board/w7o/config.mk @@ -29,4 +29,3 @@ TEXT_BASE = 0xFFFC0000 #PLATFORM_CPPFLAGS += -I$(TOPDIR)/board/$(BOARD) - diff --git a/board/w7o/errors.h b/board/w7o/errors.h index d1e5caf..05b4eae 100644 --- a/board/w7o/errors.h +++ b/board/w7o/errors.h @@ -95,4 +95,3 @@ (13) SDRAM address shorted or unconnected, check sdram caps */ #endif /* _ERRORS_H_ */ - diff --git a/board/w7o/flash.c b/board/w7o/flash.c index 5651e1c..d6ea635 100644 --- a/board/w7o/flash.c +++ b/board/w7o/flash.c @@ -50,21 +50,21 @@ /* Init: no FLASHes known */ for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) { - flash_info[i].flash_id = FLASH_UNKNOWN; + flash_info[i].flash_id = FLASH_UNKNOWN; } /* Get Size of Boot and Main Flashes */ size_b0 = flash_get_size((vu_long *)FLASH_BASE0_PRELIM, &flash_info[0]); if (flash_info[0].flash_id == FLASH_UNKNOWN) { - printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", - size_b0, size_b0<<20); - return 0; + printf ("## Unknown FLASH on Bank 0 - Size = 0x%08lx = %ld MB\n", + size_b0, size_b0<<20); + return 0; } size_b1 = flash_get_size((vu_long *)FLASH_BASE1_PRELIM, &flash_info[1]); if (flash_info[1].flash_id == FLASH_UNKNOWN) { - printf ("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n", - size_b1, size_b1<<20); - return 0; + printf ("## Unknown FLASH on Bank 1 - Size = 0x%08lx = %ld MB\n", + size_b1, size_b1<<20); + return 0; } /* Calculate base addresses */ @@ -83,21 +83,21 @@ /* Monitor protection ON by default */ (void)flash_protect(FLAG_PROTECT_SET, - base_b0 + size_b0 - monitor_flash_len, - base_b0 + size_b0 - 1, - &flash_info[0]); + base_b0 + size_b0 - monitor_flash_len, + base_b0 + size_b0 - 1, + &flash_info[0]); /* Protect the FPGA image */ (void)flash_protect(FLAG_PROTECT_SET, - FLASH_BASE1_PRELIM, - FLASH_BASE1_PRELIM + CFG_FPGA_IMAGE_LEN - 1, - &flash_info[1]); + FLASH_BASE1_PRELIM, + FLASH_BASE1_PRELIM + CFG_FPGA_IMAGE_LEN - 1, + &flash_info[1]); /* Protect the default boot image */ (void)flash_protect(FLAG_PROTECT_SET, - FLASH_BASE1_PRELIM + CFG_FPGA_IMAGE_LEN, - FLASH_BASE1_PRELIM + CFG_FPGA_IMAGE_LEN + 0x600000 - 1, - &flash_info[1]); + FLASH_BASE1_PRELIM + CFG_FPGA_IMAGE_LEN, + FLASH_BASE1_PRELIM + CFG_FPGA_IMAGE_LEN + 0x600000 - 1, + &flash_info[1]); /* Setup offsets for Main Flash */ flash_get_offsets (FLASH_BASE1_PRELIM, &flash_info[1]); @@ -113,8 +113,8 @@ /* set up sector start address table - FOR BOOT ROM ONLY!!! */ if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) { - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); } } /* end flash_get_offsets() */ @@ -129,75 +129,75 @@ volatile unsigned long *flash; if (info->flash_id == FLASH_UNKNOWN) { - printf ("missing or unknown FLASH type\n"); - return; + printf ("missing or unknown FLASH type\n"); + return; } switch (info->flash_id & FLASH_VENDMASK) { - case FLASH_MAN_AMD: printf ("1 x AMD "); break; + case FLASH_MAN_AMD: printf ("1 x AMD "); break; case FLASH_MAN_STM: printf ("1 x STM "); break; - case FLASH_MAN_INTEL: printf ("2 x Intel "); break; - default: printf ("Unknown Vendor "); + case FLASH_MAN_INTEL: printf ("2 x Intel "); break; + default: printf ("Unknown Vendor "); } switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040: + case FLASH_AM040: if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_AMD) - printf ("AM29LV040 (4096 Kbit, uniform sector size)\n"); + printf ("AM29LV040 (4096 Kbit, uniform sector size)\n"); else if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM) - printf ("M29W040B (4096 Kbit, uniform block size)\n"); + printf ("M29W040B (4096 Kbit, uniform block size)\n"); else - printf ("UNKNOWN 29x040x (4096 Kbit, uniform sector size)\n"); - break; - case FLASH_28F320J3A: - printf ("28F320J3A (32 Mbit = 128K x 32)\n"); - break; - case FLASH_28F640J3A: - printf ("28F640J3A (64 Mbit = 128K x 64)\n"); - break; - case FLASH_28F128J3A: - printf ("28F128J3A (128 Mbit = 128K x 128)\n"); - break; - default: - printf ("Unknown Chip Type\n"); + printf ("UNKNOWN 29x040x (4096 Kbit, uniform sector size)\n"); + break; + case FLASH_28F320J3A: + printf ("28F320J3A (32 Mbit = 128K x 32)\n"); + break; + case FLASH_28F640J3A: + printf ("28F640J3A (64 Mbit = 128K x 64)\n"); + break; + case FLASH_28F128J3A: + printf ("28F128J3A (128 Mbit = 128K x 128)\n"); + break; + default: + printf ("Unknown Chip Type\n"); } if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM) { - printf (" Size: %ld KB in %d Blocks\n", - info->size >> 10, info->sector_count); + printf (" Size: %ld KB in %d Blocks\n", + info->size >> 10, info->sector_count); } else { - printf (" Size: %ld KB in %d Sectors\n", - info->size >> 10, info->sector_count); + printf (" Size: %ld KB in %d Sectors\n", + info->size >> 10, info->sector_count); } printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; ksector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; + erased = 1; + flash = (volatile unsigned long *)info->start[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kstart[i], - erased ? " E" : " ", - info->protect[i] ? "RO " : " " - ); + if ((i % 5) == 0) + printf ("\n "); + printf (" %08lX%s%s", + info->start[i], + erased ? " E" : " ", + info->protect[i] ? "RO " : " " + ); } printf ("\n"); } /* end flash_print_info() */ @@ -217,130 +217,130 @@ /* Test for Boot Flash */ if (base == FLASH_BASE0_PRELIM) { - unsigned char value; - volatile unsigned char * addr2 = (unsigned char *)addr; + unsigned char value; + volatile unsigned char * addr2 = (unsigned char *)addr; - /* Write auto select command: read Manufacturer ID */ - *(addr2 + 0x555) = 0xaa; - *(addr2 + 0x2aa) = 0x55; - *(addr2 + 0x555) = 0x90; + /* Write auto select command: read Manufacturer ID */ + *(addr2 + 0x555) = 0xaa; + *(addr2 + 0x2aa) = 0x55; + *(addr2 + 0x555) = 0x90; - /* Manufacture ID */ - value = *addr2; - switch (value) { - case (unsigned char)AMD_MANUFACT: - info->flash_id = FLASH_MAN_AMD; - break; + /* Manufacture ID */ + value = *addr2; + switch (value) { + case (unsigned char)AMD_MANUFACT: + info->flash_id = FLASH_MAN_AMD; + break; case (unsigned char)STM_MANUFACT: info->flash_id = FLASH_MAN_STM; break; - default: - *addr2 = 0xf0; /* no or unknown flash */ - return 0; - } + default: + *addr2 = 0xf0; /* no or unknown flash */ + return 0; + } - /* Device ID */ - value = *(addr2 + 1); - switch (value) { - case (unsigned char)AMD_ID_LV040B: + /* Device ID */ + value = *(addr2 + 1); + switch (value) { + case (unsigned char)AMD_ID_LV040B: case (unsigned char)STM_ID_29W040B: - info->flash_id += FLASH_AM040; - info->sector_count = 8; - info->size = 0x00080000; - break; /* => 512Kb */ - default: - *addr2 = 0xf0; /* => no or unknown flash */ - return 0; - } + info->flash_id += FLASH_AM040; + info->sector_count = 8; + info->size = 0x00080000; + break; /* => 512Kb */ + default: + *addr2 = 0xf0; /* => no or unknown flash */ + return 0; + } } else { /* MAIN Flash */ - unsigned long value; - volatile unsigned long * addr2 = (unsigned long *)addr; + unsigned long value; + volatile unsigned long * addr2 = (unsigned long *)addr; - /* Write auto select command: read Manufacturer ID */ - *addr2 = 0x90909090; + /* Write auto select command: read Manufacturer ID */ + *addr2 = 0x90909090; - /* Manufacture ID */ - value = *addr2; - switch (value) { - case (unsigned long)INTEL_MANUFACT: - info->flash_id = FLASH_MAN_INTEL; - break; - default: - *addr2 = 0xff; /* no or unknown flash */ - return 0; - } + /* Manufacture ID */ + value = *addr2; + switch (value) { + case (unsigned long)INTEL_MANUFACT: + info->flash_id = FLASH_MAN_INTEL; + break; + default: + *addr2 = 0xff; /* no or unknown flash */ + return 0; + } - /* Device ID - This shit is interleaved... */ - value = *(addr2 + 1); - switch (value) { - case (unsigned long)INTEL_ID_28F320J3A: - info->flash_id += FLASH_28F320J3A; - info->sector_count = 32; - info->size = 0x00400000 * 2; - break; /* => 2 X 4 MB */ - case (unsigned long)INTEL_ID_28F640J3A: - info->flash_id += FLASH_28F640J3A; - info->sector_count = 64; - info->size = 0x00800000 * 2; - break; /* => 2 X 8 MB */ - case (unsigned long)INTEL_ID_28F128J3A: - info->flash_id += FLASH_28F128J3A; - info->sector_count = 128; - info->size = 0x01000000 * 2; - break; /* => 2 X 16 MB */ - default: - *addr2 = 0xff; /* => no or unknown flash */ - } + /* Device ID - This shit is interleaved... */ + value = *(addr2 + 1); + switch (value) { + case (unsigned long)INTEL_ID_28F320J3A: + info->flash_id += FLASH_28F320J3A; + info->sector_count = 32; + info->size = 0x00400000 * 2; + break; /* => 2 X 4 MB */ + case (unsigned long)INTEL_ID_28F640J3A: + info->flash_id += FLASH_28F640J3A; + info->sector_count = 64; + info->size = 0x00800000 * 2; + break; /* => 2 X 8 MB */ + case (unsigned long)INTEL_ID_28F128J3A: + info->flash_id += FLASH_28F128J3A; + info->sector_count = 128; + info->size = 0x01000000 * 2; + break; /* => 2 X 16 MB */ + default: + *addr2 = 0xff; /* => no or unknown flash */ + } } /* Make sure we don't exceed CFG_MAX_FLASH_SECT */ if (info->sector_count > CFG_MAX_FLASH_SECT) { - printf ("** ERROR: sector count %d > max (%d) **\n", - info->sector_count, CFG_MAX_FLASH_SECT); - info->sector_count = CFG_MAX_FLASH_SECT; + printf ("** ERROR: sector count %d > max (%d) **\n", + info->sector_count, CFG_MAX_FLASH_SECT); + info->sector_count = CFG_MAX_FLASH_SECT; } /* set up sector start address table */ switch (info->flash_id & FLASH_TYPEMASK) { - case FLASH_AM040: - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00010000); - break; - case FLASH_28F320J3A: - case FLASH_28F640J3A: - case FLASH_28F128J3A: - for (i = 0; i < info->sector_count; i++) - info->start[i] = base + (i * 0x00020000 * 2); /* 2 Banks */ - break; + case FLASH_AM040: + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00010000); + break; + case FLASH_28F320J3A: + case FLASH_28F640J3A: + case FLASH_28F128J3A: + for (i = 0; i < info->sector_count; i++) + info->start[i] = base + (i * 0x00020000 * 2); /* 2 Banks */ + break; } /* Test for Boot Flash */ if (base == FLASH_BASE0_PRELIM) { - volatile unsigned char *addr2; - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (AX .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile unsigned char *)(info->start[i]); - info->protect[i] = *(addr2 + 2) & 1; - } + volatile unsigned char *addr2; + /* check for protected sectors */ + for (i = 0; i < info->sector_count; i++) { + /* read sector protection at sector address, (AX .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr2 = (volatile unsigned char *)(info->start[i]); + info->protect[i] = *(addr2 + 2) & 1; + } - /* Restore read mode */ - *(unsigned char *)base = 0xF0; /* Reset NORMAL Flash */ + /* Restore read mode */ + *(unsigned char *)base = 0xF0; /* Reset NORMAL Flash */ } else { /* Main Flash */ - volatile unsigned long *addr2; - /* check for protected sectors */ - for (i = 0; i < info->sector_count; i++) { - /* read sector protection at sector address, (AX .. A0) = 0x02 */ - /* D0 = 1 if protected */ - addr2 = (volatile unsigned long *)(info->start[i]); - info->protect[i] = *(addr2 + 2) & 0x1; - } + volatile unsigned long *addr2; + /* check for protected sectors */ + for (i = 0; i < info->sector_count; i++) { + /* read sector protection at sector address, (AX .. A0) = 0x02 */ + /* D0 = 1 if protected */ + addr2 = (volatile unsigned long *)(info->start[i]); + info->protect[i] = *(addr2 + 2) & 0x1; + } - /* Restore read mode */ - *(unsigned long *)base = 0xFFFFFFFF; /* Reset Flash */ + /* Restore read mode */ + *(unsigned long *)base = 0xFFFFFFFF; /* Reset Flash */ } return (info->size); @@ -357,20 +357,20 @@ /* Loop X times */ for (i = 1; i <= (100 * tout); i++) { /* Wait up to tout ms */ - udelay(10); - /* Pause 10 us */ + udelay(10); + /* Pause 10 us */ - /* Check for completion */ - if ((vaddr[0] & 0x80) == (cmp_val & 0x80)) { - return 0; - } + /* Check for completion */ + if ((vaddr[0] & 0x80) == (cmp_val & 0x80)) { + return 0; + } - /* KEEP THE LUSER HAPPY - Print a dot every 1.1 seconds */ - if (!(i % 110000)) - putc('.'); + /* KEEP THE LUSER HAPPY - Print a dot every 1.1 seconds */ + if (!(i % 110000)) + putc('.'); - /* Kick the dog if needed */ - WATCHDOG_RESET(); + /* Kick the dog if needed */ + WATCHDOG_RESET(); } return 1; @@ -388,70 +388,70 @@ /* Validate arguments */ if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) - printf ("- missing\n"); - else - printf ("- no sectors to erase\n"); - return 1; + if (info->flash_id == FLASH_UNKNOWN) + printf ("- missing\n"); + else + printf ("- no sectors to erase\n"); + return 1; } /* Check for KNOWN flash type */ if (info->flash_id == FLASH_UNKNOWN) { - printf ("Can't erase unknown flash type - aborted\n"); - return 1; + printf ("Can't erase unknown flash type - aborted\n"); + return 1; } /* Check for protected sectors */ prot = 0; for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) - prot++; + if (info->protect[sect]) + prot++; } if (prot) - printf ("- Warning: %d protected sectors will not be erased!\n", prot); + printf ("- Warning: %d protected sectors will not be erased!\n", prot); else - printf ("\n"); + printf ("\n"); /* Start erase on unprotected sectors */ for (sect = s_first; sect <= s_last; sect++) { - if (info->protect[sect] == 0) { /* not protected */ - sector_addr = (uchar *)(info->start[sect]); + if (info->protect[sect] == 0) { /* not protected */ + sector_addr = (uchar *)(info->start[sect]); - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM) + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_STM) printf("Erasing block %p\n", sector_addr); else printf("Erasing sector %p\n", sector_addr); - /* Disable interrupts which might cause Flash to timeout */ - flag = disable_interrupts(); + /* Disable interrupts which might cause Flash to timeout */ + flag = disable_interrupts(); - *(addr + 0x555) = (uchar)0xAA; - *(addr + 0x2aa) = (uchar)0x55; - *(addr + 0x555) = (uchar)0x80; - *(addr + 0x555) = (uchar)0xAA; - *(addr + 0x2aa) = (uchar)0x55; - *sector_addr = (uchar)0x30; /* sector erase */ + *(addr + 0x555) = (uchar)0xAA; + *(addr + 0x2aa) = (uchar)0x55; + *(addr + 0x555) = (uchar)0x80; + *(addr + 0x555) = (uchar)0xAA; + *(addr + 0x2aa) = (uchar)0x55; + *sector_addr = (uchar)0x30; /* sector erase */ - /* - * Wait for each sector to complete, it's more - * reliable. According to AMD Spec, you must - * issue all erase commands within a specified - * timeout. This has been seen to fail, especially - * if printf()s are included (for debug)!! - * Takes up to 6 seconds. - */ - tcode = wait_for_DQ7((ulong)sector_addr, 0x80, 6000); + /* + * Wait for each sector to complete, it's more + * reliable. According to AMD Spec, you must + * issue all erase commands within a specified + * timeout. This has been seen to fail, especially + * if printf()s are included (for debug)!! + * Takes up to 6 seconds. + */ + tcode = wait_for_DQ7((ulong)sector_addr, 0x80, 6000); - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* Make sure we didn't timeout */ - if (tcode) { - printf ("Timeout\n"); - rcode = 1; - } - } + /* Make sure we didn't timeout */ + if (tcode) { + printf ("Timeout\n"); + rcode = 1; + } + } } /* wait at least 80us - let's wait 1 ms */ @@ -473,68 +473,68 @@ /* Validate arguments */ if ((s_first < 0) || (s_first > s_last)) { - if (info->flash_id == FLASH_UNKNOWN) - printf ("- missing\n"); - else - printf ("- no sectors to erase\n"); - return 1; + if (info->flash_id == FLASH_UNKNOWN) + printf ("- missing\n"); + else + printf ("- no sectors to erase\n"); + return 1; } /* Check for KNOWN flash type */ if ((info->flash_id & FLASH_VENDMASK) != FLASH_MAN_INTEL) { - printf ("Can erase only Intel flash types - aborted\n"); - return 1; + printf ("Can erase only Intel flash types - aborted\n"); + return 1; } /* Check for protected sectors */ for (sect = s_first; sect <= s_last; ++sect) { - if (info->protect[sect]) - prot++; + if (info->protect[sect]) + prot++; } if (prot) - printf ("- Warning: %d protected sectors will not be erased!\n", prot); + printf ("- Warning: %d protected sectors will not be erased!\n", prot); else - printf ("\n"); + printf ("\n"); start = get_timer (0); last = start; /* Start erase on unprotected sectors */ for (sect = s_first; sect <= s_last; sect++) { - WATCHDOG_RESET(); - if (info->protect[sect] == 0) { /* not protected */ - vu_long *addr = (vu_long *)(info->start[sect]); - unsigned long status; + WATCHDOG_RESET(); + if (info->protect[sect] == 0) { /* not protected */ + vu_long *addr = (vu_long *)(info->start[sect]); + unsigned long status; - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); - *addr = 0x00500050; /* clear status register */ - *addr = 0x00200020; /* erase setup */ - *addr = 0x00D000D0; /* erase confirm */ + *addr = 0x00500050; /* clear status register */ + *addr = 0x00200020; /* erase setup */ + *addr = 0x00D000D0; /* erase confirm */ - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* Wait at least 80us - let's wait 1 ms */ - udelay (1000); + /* Wait at least 80us - let's wait 1 ms */ + udelay (1000); - while (((status = *addr) & 0x00800080) != 0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - *addr = 0x00B000B0; /* suspend erase */ - *addr = 0x00FF00FF; /* reset to read mode */ - return 1; - } + while (((status = *addr) & 0x00800080) != 0x00800080) { + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + *addr = 0x00B000B0; /* suspend erase */ + *addr = 0x00FF00FF; /* reset to read mode */ + return 1; + } - /* show that we're waiting */ - if ((now - last) > 990) { /* every second */ - putc ('.'); - last = now; - } - } - *addr = 0x00FF00FF; /* reset to read mode */ - } + /* show that we're waiting */ + if ((now - last) > 990) { /* every second */ + putc ('.'); + last = now; + } + } + *addr = 0x00FF00FF; /* reset to read mode */ + } } printf (" done\n"); return 0; @@ -543,9 +543,9 @@ int flash_erase(flash_info_t *info, int s_first, int s_last) { if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) - return flash_erase8(info, s_first, s_last); + return flash_erase8(info, s_first, s_last); else - return flash_erase32(info, s_first, s_last); + return flash_erase32(info, s_first, s_last); } /* end flash_erase() */ /*----------------------------------------------------------------------- @@ -563,53 +563,53 @@ start = get_timer (0); wp = (addr & ~3); /* get lower word - aligned address */ + aligned address */ /* * handle unaligned start bytes */ if ((l = addr - wp) != 0) { - data = 0; - for (i=0, cp=wp; i0; ++i) { - data = (data << 8) | *src++; - --cnt; - ++cp; - } - for (; cnt==0 && i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); - } + data = 0; + for (i=0, cp=wp; i0; ++i) { + data = (data << 8) | *src++; + --cnt; + ++cp; + } + for (; cnt==0 && i<4; ++i, ++cp) { + data = (data << 8) | (*(uchar *)cp); + } - if ((rc = write_word8(info, wp, data)) != 0) { - return (rc); - } - wp += 4; + if ((rc = write_word8(info, wp, data)) != 0) { + return (rc); + } + wp += 4; } /* * handle word aligned part */ while (cnt >= 4) { - data = 0; - for (i=0; i<4; ++i) { - data = (data << 8) | *src++; - } - if ((rc = write_word8(info, wp, data)) != 0) { - return (rc); - } - wp += 4; - cnt -= 4; - if (get_timer(start) > 1000) { /* every second */ - WATCHDOG_RESET(); - putc ('.'); - start = get_timer(0); - } + data = 0; + for (i=0; i<4; ++i) { + data = (data << 8) | *src++; + } + if ((rc = write_word8(info, wp, data)) != 0) { + return (rc); + } + wp += 4; + cnt -= 4; + if (get_timer(start) > 1000) { /* every second */ + WATCHDOG_RESET(); + putc ('.'); + start = get_timer(0); + } } if (cnt == 0) { - return (0); + return (0); } /* @@ -617,11 +617,11 @@ */ data = 0; for (i=0, cp=wp; i<4 && cnt>0; ++i, ++cp) { - data = (data << 8) | *src++; - --cnt; + data = (data << 8) | *src++; + --cnt; } for (; i<4; ++i, ++cp) { - data = (data << 8) | (*(uchar *)cp); + data = (data << 8) | (*(uchar *)cp); } return (write_word8(info, wp, data)); @@ -678,7 +678,7 @@ } wp += FLASH_WIDTH; cnt -= FLASH_WIDTH; - if (get_timer(start) > 990) { /* every second */ + if (get_timer(start) > 990) { /* every second */ putc ('.'); start = get_timer(0); } @@ -708,9 +708,9 @@ int retval; if ((info->flash_id & FLASH_TYPEMASK) == FLASH_AM040) - retval = write_buff8(info, src, addr, cnt); + retval = write_buff8(info, src, addr, cnt); else - retval = write_buff32(info, src, addr, cnt); + retval = write_buff32(info, src, addr, cnt); return retval; } /* end write_buff() */ @@ -732,31 +732,31 @@ /* Check if Flash is (sufficently) erased */ if ((*((volatile uchar *)dest) & - (uchar)data) != (uchar)data) { - return (2); + (uchar)data) != (uchar)data) { + return (2); } for (i=0; i < (4 / sizeof(uchar)); i++) { - /* Disable interrupts which might cause a timeout here */ - flag = disable_interrupts(); + /* Disable interrupts which might cause a timeout here */ + flag = disable_interrupts(); - *(addr2 + 0x555) = (uchar)0xAA; - *(addr2 + 0x2aa) = (uchar)0x55; - *(addr2 + 0x555) = (uchar)0xA0; + *(addr2 + 0x555) = (uchar)0xAA; + *(addr2 + 0x2aa) = (uchar)0x55; + *(addr2 + 0x555) = (uchar)0xA0; - dest2[i] = data2[i]; + dest2[i] = data2[i]; - /* Wait for write to complete, up to 1ms */ - tcode = wait_for_DQ7((ulong)&dest2[i], data2[i], 1); + /* Wait for write to complete, up to 1ms */ + tcode = wait_for_DQ7((ulong)&dest2[i], data2[i], 1); - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - /* Make sure we didn't timeout */ - if (tcode) { - rcode = 1; - } + /* Make sure we didn't timeout */ + if (tcode) { + rcode = 1; + } } return rcode; @@ -771,7 +771,7 @@ /* Check if Flash is (sufficiently) erased */ if ((*addr & data) != data) { - return (2); + return (2); } /* Disable interrupts which might cause a timeout here */ flag = disable_interrupts(); @@ -781,16 +781,16 @@ /* re-enable interrupts if necessary */ if (flag) - enable_interrupts(); + enable_interrupts(); start = get_timer (0); while (((status = *addr) & 0x00800080) != 0x00800080) { - WATCHDOG_RESET(); - if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { - *addr = 0x00FF00FF; /* restore read mode */ - return (1); - } + WATCHDOG_RESET(); + if (get_timer(start) > CFG_FLASH_WRITE_TOUT) { + *addr = 0x00FF00FF; /* restore read mode */ + return (1); + } } *addr = 0x00FF00FF; /* restore read mode */ @@ -808,50 +808,50 @@ volatile long *addr = (unsigned long *)sector; switch(info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F320J3A: - case FLASH_28F640J3A: - case FLASH_28F128J3A: - /* Disable interrupts which might cause Flash to timeout */ - flag = disable_interrupts(); + case FLASH_28F320J3A: + case FLASH_28F640J3A: + case FLASH_28F128J3A: + /* Disable interrupts which might cause Flash to timeout */ + flag = disable_interrupts(); - /* Issue command */ - *addr = 0x00500050L; /* Clear the status register */ - *addr = 0x00600060L; /* Set lock bit setup */ - *addr = 0x00010001L; /* Set lock bit confirm */ + /* Issue command */ + *addr = 0x00500050L; /* Clear the status register */ + *addr = 0x00600060L; /* Set lock bit setup */ + *addr = 0x00010001L; /* Set lock bit confirm */ - /* Wait for command completion */ - for (i = 0; i < 10; i++) { /* 75us timeout, wait 100us */ - udelay(10); - if ((*addr & 0x00800080L) == 0x00800080L) - break; - } + /* Wait for command completion */ + for (i = 0; i < 10; i++) { /* 75us timeout, wait 100us */ + udelay(10); + if ((*addr & 0x00800080L) == 0x00800080L) + break; + } - /* Not successful? */ - status = *addr; - if (status != 0x00800080L) { - printf("Protect %x sector failed: %x\n", - (uint)sector, (uint)status); - rcode = 1; - } + /* Not successful? */ + status = *addr; + if (status != 0x00800080L) { + printf("Protect %x sector failed: %x\n", + (uint)sector, (uint)status); + rcode = 1; + } - /* Restore read mode */ - *addr = 0x00ff00ffL; + /* Restore read mode */ + *addr = 0x00ff00ffL; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - break; - case FLASH_AM040: /* No soft sector protection */ - break; + break; + case FLASH_AM040: /* No soft sector protection */ + break; } /* Turn protection on for this sector */ for (i = 0; i < info->sector_count; i++) { - if (info->start[i] == sector) { - info->protect[i] = 1; - break; - } + if (info->start[i] == sector) { + info->protect[i] = 1; + break; + } } return rcode; @@ -866,42 +866,42 @@ volatile long *addr = (unsigned long *)sector; switch(info->flash_id & FLASH_TYPEMASK) { - case FLASH_28F320J3A: - case FLASH_28F640J3A: - case FLASH_28F128J3A: - /* Disable interrupts which might cause Flash to timeout */ - flag = disable_interrupts(); + case FLASH_28F320J3A: + case FLASH_28F640J3A: + case FLASH_28F128J3A: + /* Disable interrupts which might cause Flash to timeout */ + flag = disable_interrupts(); - *addr = 0x00500050L; /* Clear the status register */ - *addr = 0x00600060L; /* Clear lock bit setup */ - *addr = 0x00D000D0L; /* Clear lock bit confirm */ + *addr = 0x00500050L; /* Clear the status register */ + *addr = 0x00600060L; /* Clear lock bit setup */ + *addr = 0x00D000D0L; /* Clear lock bit confirm */ - /* Wait for command completion */ - for (i = 0; i < 80 ; i++) { /* 700ms timeout, wait 800 */ - udelay(10000); /* Delay 10ms */ - if ((*addr & 0x00800080L) == 0x00800080L) - break; - } + /* Wait for command completion */ + for (i = 0; i < 80 ; i++) { /* 700ms timeout, wait 800 */ + udelay(10000); /* Delay 10ms */ + if ((*addr & 0x00800080L) == 0x00800080L) + break; + } - /* Not successful? */ - status = *addr; - if (status != 0x00800080L) { - printf("Un-protect %x sector failed: %x\n", - (uint)sector, (uint)status); - *addr = 0x00ff00ffL; - rcode = 1; - } + /* Not successful? */ + status = *addr; + if (status != 0x00800080L) { + printf("Un-protect %x sector failed: %x\n", + (uint)sector, (uint)status); + *addr = 0x00ff00ffL; + rcode = 1; + } - /* restore read mode */ - *addr = 0x00ff00ffL; + /* restore read mode */ + *addr = 0x00ff00ffL; - /* re-enable interrupts if necessary */ - if (flag) - enable_interrupts(); + /* re-enable interrupts if necessary */ + if (flag) + enable_interrupts(); - break; - case FLASH_AM040: /* No soft sector protection */ - break; + break; + case FLASH_AM040: /* No soft sector protection */ + break; } /* @@ -910,14 +910,14 @@ * protection on a specific sector. */ for (i = 0; i < info->sector_count; i++) { - if (info->start[i] != sector) { - if (info->protect[i]) { - if (_flash_protect(info, info->start[i])) - rcode = 1; + if (info->start[i] != sector) { + if (info->protect[i]) { + if (_flash_protect(info, info->start[i])) + rcode = 1; } - } - else /* Turn protection off for this sector */ - info->protect[i] = 0; + } + else /* Turn protection off for this sector */ + info->protect[i] = 0; } return rcode; @@ -929,13 +929,12 @@ int rcode; if (prot) - rcode = _flash_protect(info, info->start[sector]); + rcode = _flash_protect(info, info->start[sector]); else - rcode = _flash_unprotect(info, info->start[sector]); + rcode = _flash_unprotect(info, info->start[sector]); return rcode; } /* end flash_real_protect() */ /*----------------------------------------------------------------------- */ - diff --git a/board/w7o/fpga.c b/board/w7o/fpga.c index e84123b..97af924 100644 --- a/board/w7o/fpga.c +++ b/board/w7o/fpga.c @@ -36,11 +36,11 @@ volatile unsigned short *dest = daddr; /* volatile-bypass optimizer */ for (i = 0; i < len; i++, src++) { - val = *src; - *dest = (unsigned short)((val & 0xff000000L) >> 16); - *dest = (unsigned short)((val & 0x00ff0000L) >> 8); - *dest = (unsigned short)(val & 0x0000ff00L); - *dest = (unsigned short)((val & 0x000000ffL) << 8); + val = *src; + *dest = (unsigned short)((val & 0xff000000L) >> 16); + *dest = (unsigned short)((val & 0x00ff0000L) >> 8); + *dest = (unsigned short)(val & 0x0000ff00L); + *dest = (unsigned short)((val & 0x000000ffL) << 8); } /* Terminate programming with 4 C clocks */ @@ -88,14 +88,14 @@ /* Wait for FPGA init line */ while(in32(IBM405GP_GPIO0_IR) & GPIO_XCV_INIT) { /* Wait INIT line low */ - /* Check for timeout - 100us max, so use 3ms */ - if (get_timer(start) > 3) { - printf(" failed to start init.\n"); - log_warn(ERR_XINIT0); /* Don't halt */ + /* Check for timeout - 100us max, so use 3ms */ + if (get_timer(start) > 3) { + printf(" failed to start init.\n"); + log_warn(ERR_XINIT0); /* Don't halt */ - /* Reset line stays low */ - goto done; /* I like gotos... */ - } + /* Reset line stays low */ + goto done; /* I like gotos... */ + } } /* Unreset FPGA */ @@ -105,75 +105,75 @@ /* Wait for FPGA end of init period . */ while(!(in32(IBM405GP_GPIO0_IR) & GPIO_XCV_INIT)) { /* Wait for INIT hi */ - /* Check for timeout */ - if (get_timer(start) > 3) { - printf(" failed to exit init.\n"); - log_warn(ERR_XINIT1); + /* Check for timeout */ + if (get_timer(start) > 3) { + printf(" failed to exit init.\n"); + log_warn(ERR_XINIT1); - /* Reset FPGA */ - grego &= ~GPIO_XCV_PROG; /* PROG line low */ - out32(IBM405GP_GPIO0_OR, grego); + /* Reset FPGA */ + grego &= ~GPIO_XCV_PROG; /* PROG line low */ + out32(IBM405GP_GPIO0_OR, grego); - goto done; - } + goto done; + } } /* Now program FPGA ... */ ndest = dest; for (i = 0; i < CONFIG_NUM_FPGAS; i++) { - /* Toggle IRQ/GPIO */ - greg = mfdcr(CPC0_CR0); /* get chip ctrl register */ - greg |= eirq; /* toggle irq/gpio */ - mtdcr(CPC0_CR0, greg); /* ... just do it */ + /* Toggle IRQ/GPIO */ + greg = mfdcr(CPC0_CR0); /* get chip ctrl register */ + greg |= eirq; /* toggle irq/gpio */ + mtdcr(CPC0_CR0, greg); /* ... just do it */ - /* turn on open drain for CNFG */ - greg = in32(IBM405GP_GPIO0_ODR); /* get open drain register */ - greg |= cnfg; /* CNFG open drain */ - out32(IBM405GP_GPIO0_ODR, greg); /* .. just do it */ + /* turn on open drain for CNFG */ + greg = in32(IBM405GP_GPIO0_ODR); /* get open drain register */ + greg |= cnfg; /* CNFG open drain */ + out32(IBM405GP_GPIO0_ODR, greg); /* .. just do it */ - /* Turn output enable on for CNFG */ - greg = in32(IBM405GP_GPIO0_TCR); /* get tristate register */ - greg |= cnfg; /* CNFG tristate inactive */ - out32(IBM405GP_GPIO0_TCR, greg); /* ... just do it */ + /* Turn output enable on for CNFG */ + greg = in32(IBM405GP_GPIO0_TCR); /* get tristate register */ + greg |= cnfg; /* CNFG tristate inactive */ + out32(IBM405GP_GPIO0_TCR, greg); /* ... just do it */ - /* Setup FPGA for programming */ - grego &= ~cnfg; /* CONFIG line low */ - out32(IBM405GP_GPIO0_OR, grego); + /* Setup FPGA for programming */ + grego &= ~cnfg; /* CONFIG line low */ + out32(IBM405GP_GPIO0_OR, grego); - /* - * Program the FPGA - */ - printf("\n destination: 0x%lx ", (unsigned long)ndest); + /* + * Program the FPGA + */ + printf("\n destination: 0x%lx ", (unsigned long)ndest); - fpga_img_write(source, length, (unsigned short *)ndest); + fpga_img_write(source, length, (unsigned short *)ndest); - /* Done programming */ - grego |= cnfg; /* CONFIG line high */ - out32(IBM405GP_GPIO0_OR, grego); + /* Done programming */ + grego |= cnfg; /* CONFIG line high */ + out32(IBM405GP_GPIO0_OR, grego); - /* Turn output enable OFF for CNFG */ - greg = in32(IBM405GP_GPIO0_TCR); /* get tristate register */ - greg &= ~cnfg; /* CNFG tristate inactive */ - out32(IBM405GP_GPIO0_TCR, greg); /* ... just do it */ + /* Turn output enable OFF for CNFG */ + greg = in32(IBM405GP_GPIO0_TCR); /* get tristate register */ + greg &= ~cnfg; /* CNFG tristate inactive */ + out32(IBM405GP_GPIO0_TCR, greg); /* ... just do it */ - /* Toggle IRQ/GPIO */ - greg = mfdcr(CPC0_CR0); /* get chip ctrl register */ - greg &= ~eirq; /* toggle irq/gpio */ - mtdcr(CPC0_CR0, greg); /* ... just do it */ + /* Toggle IRQ/GPIO */ + greg = mfdcr(CPC0_CR0); /* get chip ctrl register */ + greg &= ~eirq; /* toggle irq/gpio */ + mtdcr(CPC0_CR0, greg); /* ... just do it */ - ndest = (unsigned short *)((char *)ndest + 0x00100000L); /* XXX - Next FPGA addr */ - cnfg >>= 1; /* XXX - Next */ - eirq >>= 1; + ndest = (unsigned short *)((char *)ndest + 0x00100000L); /* XXX - Next FPGA addr */ + cnfg >>= 1; /* XXX - Next */ + eirq >>= 1; } /* Terminate programming with 4 C clocks */ ndest = dest; for (i = 0; i < CONFIG_NUM_FPGAS; i++) { - val = *ndest; - val = *ndest; - val = *ndest; - val = *ndest; - ndest = (unsigned short *)((char *)ndest + 0x00100000L); + val = *ndest; + val = *ndest; + val = *ndest; + val = *ndest; + ndest = (unsigned short *)((char *)ndest + 0x00100000L); } /* Setup timer */ @@ -182,17 +182,17 @@ /* Wait for FPGA end of programming period . */ while(!(in32(IBM405GP_GPIO0_IR) & GPIO_XCV_DONE)) { /* Test DONE low */ - /* Check for timeout */ - if (get_timer(start) > 3) { - printf(" done failed to come high.\n"); - log_warn(ERR_XDONE1); + /* Check for timeout */ + if (get_timer(start) > 3) { + printf(" done failed to come high.\n"); + log_warn(ERR_XDONE1); - /* Reset FPGA */ - grego &= ~GPIO_XCV_PROG; /* PROG line low */ - out32(IBM405GP_GPIO0_OR, grego); + /* Reset FPGA */ + grego &= ~GPIO_XCV_PROG; /* PROG line low */ + out32(IBM405GP_GPIO0_OR, grego); - goto done; - } + goto done; + } } printf("\n FPGA load succeeded\n"); @@ -236,7 +236,7 @@ /* Pedantic */ if ((len < 0x133A4) || (len > 0x80000)) - goto bad_image; + goto bad_image; /* * Get the file name pointer and length. @@ -260,16 +260,16 @@ */ calc_crc = crc32(0, xcv_buf, xcv_len); if (crc != calc_crc) { - printf("\nfailed - bad CRC\n"); - goto done; + printf("\nfailed - bad CRC\n"); + goto done; } /* Output the file name */ printf("file name : "); for (i=0;i'~') bufchar = '.'; - putc(bufchar); + bufchar = fn_buf[+i]; + if (bufchar<' ' || bufchar>'~') bufchar = '.'; + putc(bufchar); } /* @@ -326,7 +326,7 @@ * Program the FPGA. */ retval = fpgaDownload((unsigned char*)xcv_buf, xcv_len, - (unsigned short *)0xfd000000L); + (unsigned short *)0xfd000000L); return retval; bad_image: @@ -377,4 +377,3 @@ printf(" FPGA ready\n"); return; } - diff --git a/board/w7o/fsboot.c b/board/w7o/fsboot.c index 800583d..0ef9a61 100644 --- a/board/w7o/fsboot.c +++ b/board/w7o/fsboot.c @@ -24,11 +24,12 @@ #include #include #include -#include /* * FIXME: Add code to test image and it's header. */ +extern int valid_elf_image (unsigned long addr); + static int image_check(ulong addr) { @@ -87,4 +88,3 @@ return; } - diff --git a/board/w7o/init.S b/board/w7o/init.S index 511a1bb..35d7dbc 100644 --- a/board/w7o/init.S +++ b/board/w7o/init.S @@ -262,4 +262,3 @@ blr /* Return to calling function */ .Lfe1: .size sdram_init,.Lfe1-sdram_init /* end sdram_init() */ - diff --git a/board/w7o/post1.S b/board/w7o/post1.S index d510cca..21d206e 100644 --- a/board/w7o/post1.S +++ b/board/w7o/post1.S @@ -282,7 +282,7 @@ addi r31, 0, 0x00ff /* r31 = one byte of set bits */ stb r31,0(r28) /* save ff in referance address */ - /* ghost (inner) loop, now check all posible ghosted addresses */ + /* ghost (inner) loop, now check all posible ghosted addresses */ addi r29, 0, 0 /* start ghosted loop counter at 0 */ inside: /* @@ -323,11 +323,11 @@ addi r3, 0, ERR_ADDF /* get indexed error message */ bl log_err /* log error led error code */ gb_done: /* pack your bags, and go home */ - lmw r25, 8(r1) /* restore r25 - r31 from stack */ - lwz r0, +40(r1) /* Get saved link register */ - addi r1, r1, +36 /* Remove frame from stack */ - mtlr r0 /* Restore link register */ - blr /* Return to calling function */ + lmw r25, 8(r1) /* restore r25 - r31 from stack */ + lwz r0, +40(r1) /* Get saved link register */ + addi r1, r1, +36 /* Remove frame from stack */ + mtlr r0 /* Restore link register */ + blr /* Return to calling function */ /**************************************************** ******** SDRAM data fill tests ********** @@ -373,7 +373,6 @@ blr /* Return to calling function */ - /**************************************************** ******** fill test ******** ***************************************************/ @@ -382,12 +381,12 @@ /* r4 = Value to write */ /* r3 = Error code */ fill_test: - mflr r0 /* Get link register */ - stwu r1, -32(r1) /* Save back chain and move SP */ - stw r0, +36(r1) /* Save link register */ - stmw r27, 8(r1) /* save r27 - r31 on stack */ - /* r31 - scratch register */ - /* r30 - memory address */ + mflr r0 /* Get link register */ + stwu r1, -32(r1) /* Save back chain and move SP */ + stw r0, +36(r1) /* Save link register */ + stmw r27, 8(r1) /* save r27 - r31 on stack */ + /* r31 - scratch register */ + /* r30 - memory address */ mr r27, r3 mr r28, r4 mr r29, r5 @@ -412,8 +411,8 @@ mtctr r31 /* setup counter */ addi r30, 0, 0 /* Make r30 = addr 0 */ ft_1: lwz r31, 0(r30) /* get value from memory */ - xor. r31, r31, r28 /* Writen = Read ? */ - bne ft_err /* If bad, than halt */ + xor. r31, r31, r28 /* Writen = Read ? */ + bne ft_err /* If bad, than halt */ addi r30, r30, 4 /* Increment to next word */ andi. r31, r30, 0xffff /* check for 2^16 loops*/ bne ft_1a /* if not there, then skip */ @@ -431,11 +430,11 @@ bl log_err /* output led err code, halt CPU */ fill_done: - lmw r27, 8(r1) /* restore r27 - r31 from stack */ - lwz r0, +36(r1) /* Get saved link register */ - addi r1, r1, +32 /* Remove frame from stack */ - mtlr r0 /* Restore link register */ - blr /* Return to calling function */ + lmw r27, 8(r1) /* restore r27 - r31 from stack */ + lwz r0, +36(r1) /* Get saved link register */ + addi r1, r1, +32 /* Remove frame from stack */ + mtlr r0 /* Restore link register */ + blr /* Return to calling function */ /**************************************************** @@ -563,7 +562,7 @@ mtctr r3 log_2: WATCHDOG_RESET /* this keeps dog from barking, */ - /* and takes time */ + /* and takes time */ bdnz log_2 /* loop till time expires */ /* restore stack and return */ @@ -585,27 +584,27 @@ stwu r1, -8(r1) /* Save back chain and move SP */ stw r0, +12(r1) /* Save link register */ - addis r3, 0, 0xef60 - ori r3, r3, 0x0303 /* r3 = UART0_LCR */ - addi r4, 0, 0x83 /* n81 format, divisor regs enabled */ - stb r4, 0(r3) + addis r3, 0, 0xef60 + ori r3, r3, 0x0303 /* r3 = UART0_LCR */ + addi r4, 0, 0x83 /* n81 format, divisor regs enabled */ + stb r4, 0(r3) /* set baud rate to use internal clock, baud = (200e6/16)/31/42 = 9600 */ - addis r3, 0, 0xef60 /* Address of baud divisor reg */ - ori r3, r3, 0x0300 /* UART0_DLM */ - addi r4, 0, +42 /* uart baud divisor LSB = 93 */ - stb r4, 0(r3) /* baud = (200 /16)/14/93 */ + addis r3, 0, 0xef60 /* Address of baud divisor reg */ + ori r3, r3, 0x0300 /* UART0_DLM */ + addi r4, 0, +42 /* uart baud divisor LSB = 93 */ + stb r4, 0(r3) /* baud = (200 /16)/14/93 */ - addi r3, r3, 0x0001 /* uart baud divisor addr */ - addi r4, 0, 0 - stb r4, 0(r3) /* Divisor Latch MSB = 0 */ + addi r3, r3, 0x0001 /* uart baud divisor addr */ + addi r4, 0, 0 + stb r4, 0(r3) /* Divisor Latch MSB = 0 */ - addis r3, 0, 0xef60 - ori r3, r3, 0x0303 /* r3 = UART0_LCR */ - addi r4, 0, 0x03 /* n81 format, tx/rx regs enabled */ - stb r4, 0(r3) + addis r3, 0, 0xef60 + ori r3, r3, 0x0303 /* r3 = UART0_LCR */ + addi r4, 0, 0x03 /* n81 format, tx/rx regs enabled */ + stb r4, 0(r3) /* output a few line feeds */ addi r3, 0, '\n' /* load line feed */ @@ -613,7 +612,7 @@ addi r3, 0, '\n' /* load line feed */ bl post_putc /* output the char */ - /* restore stack and return */ + /* restore stack and return */ lwz r0, +12(r1) /* Get saved link register */ mtlr r0 /* Restore link register */ addi r1, r1, +8 /* Remove frame from stack */ @@ -633,7 +632,7 @@ stw r0, +24(r1) /* Save link register */ stmw r29, 8(r1) /* save r29 - r31 on stack r31 - uart base address - r30 - delay counter + r30 - delay counter r29 - scratch reg */ addis r31, 0, 0xef60 /* Point to uart base */ @@ -687,7 +686,7 @@ b pputs_end /* were outa here */ pputs_term: addi r3, 0, 1 /* set success code */ - /* restore stack and return */ + /* restore stack and return */ pputs_end: lwz r31, 8(r1) /* restore r27 - r31 from stack */ lwz r0, +16(r1) /* Get saved link register */ @@ -696,7 +695,6 @@ blr /* Return to calling function */ - /******************************************************************** ***** disp_hex ***** Routine to display a hex value from a register. @@ -736,10 +734,9 @@ pputh_err: addi r3, 0, -1 /* set error code */ pputh_done: - /* restore stack and return */ + /* restore stack and return */ lmw r30, 8(r1) /* restore r30 - r31 from stack */ lwz r0, +20(r1) /* Get saved link register */ addi r1, r1, +16 /* Remove frame from stack */ mtlr r0 /* Restore link register */ blr /* Return to calling function */ - diff --git a/board/w7o/post2.c b/board/w7o/post2.c index 271c197..e590128 100644 --- a/board/w7o/post2.c +++ b/board/w7o/post2.c @@ -106,4 +106,3 @@ if(dtt_test(4) != 0) log_warn(ERR_Ttest1); #endif /* CONFIG_DTT_LM75 */ } /* post2() */ - diff --git a/board/w7o/u-boot.lds b/board/w7o/u-boot.lds index 4c753fc..5576ab9 100644 --- a/board/w7o/u-boot.lds +++ b/board/w7o/u-boot.lds @@ -103,6 +103,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/w7o/u-boot.lds.debug b/board/w7o/u-boot.lds.debug index 6f65aa5..f996db3 100644 --- a/board/w7o/u-boot.lds.debug +++ b/board/w7o/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/w7o/vpd.c b/board/w7o/vpd.c index c24b127..fc2cd98 100644 --- a/board/w7o/vpd.c +++ b/board/w7o/vpd.c @@ -405,4 +405,3 @@ printf(dsfmt, sp, "WE Data Width", vpdInfo->flashCfg.weDataWidth); } } /* vpd_print() */ - diff --git a/board/w7o/vpd.h b/board/w7o/vpd.h index 35bbe3e..1b71c8d 100644 --- a/board/w7o/vpd.h +++ b/board/w7o/vpd.h @@ -93,7 +93,7 @@ #define VPD_DATA_SIZE (VPD_MAX_EEPROM_SIZE - SDRAM_SPD_DATA_SIZE - \ - sizeof(vpd_header_t)) + sizeof(vpd_header_t)) typedef struct vpd_s { vpd_header_t header; unsigned char packets[VPD_DATA_SIZE]; @@ -132,4 +132,3 @@ extern void vpd_print(VPD *vpdInfo); #endif /* _VPD_H_ */ - diff --git a/board/w7o/w7o.c b/board/w7o/w7o.c index b404d61..bb52236 100644 --- a/board/w7o/w7o.c +++ b/board/w7o/w7o.c @@ -22,6 +22,7 @@ */ #include +#include #include "w7o.h" #include @@ -268,4 +269,3 @@ return (0); } - diff --git a/board/w7o/w7o.h b/board/w7o/w7o.h index f0af2d6..8458166 100644 --- a/board/w7o/w7o.h +++ b/board/w7o/w7o.h @@ -90,4 +90,3 @@ extern void init_fsboot(void); #endif /* _W7O_H_ */ - diff --git a/board/w7o/watchdog.c b/board/w7o/watchdog.c index 3fca5d3..4bbd94f 100644 --- a/board/w7o/watchdog.c +++ b/board/w7o/watchdog.c @@ -45,4 +45,3 @@ } /* hw_watchdog_reset() */ #endif /* CONFIG_HW_WATCHDOG */ - diff --git a/board/walnut405/Makefile b/board/walnut405/Makefile index 12b2fa8..97d6a1e 100644 --- a/board/walnut405/Makefile +++ b/board/walnut405/Makefile @@ -29,7 +29,7 @@ SOBJS = init.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/walnut405/flash.c b/board/walnut405/flash.c index c9c7cbf..462c09e 100644 --- a/board/walnut405/flash.c +++ b/board/walnut405/flash.c @@ -66,8 +66,8 @@ { unsigned long size_b0, size_b1; int i; - uint pbcr; - unsigned long base_b0, base_b1; + uint pbcr; + unsigned long base_b0, base_b1; /* Init: no FLASHes known */ for (i=0; iflash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || + if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || (info->flash_id == FLASH_AM040)){ for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000); - } else { + } else { if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -205,10 +204,10 @@ void flash_print_info (flash_info_t *info) { int i; - int k; - int size; - int erased; - volatile unsigned long *flash; + int k; + int size; + int erased; + volatile unsigned long *flash; if (info->flash_id == FLASH_UNKNOWN) { printf ("missing or unknown FLASH type\n"); @@ -254,24 +253,24 @@ printf (" Sector Start Addresses:"); for (i=0; isector_count; ++i) { - /* - * Check if whole sector is erased - */ - if (i != (info->sector_count-1)) - size = info->start[i+1] - info->start[i]; - else - size = info->start[0] + info->size - info->start[i]; - erased = 1; - flash = (volatile unsigned long *)info->start[i]; - size = size >> 2; /* divide by 4 for longword access */ - for (k=0; ksector_count-1)) + size = info->start[i+1] - info->start[i]; + else + size = info->start[0] + info->size - info->start[i]; + erased = 1; + flash = (volatile unsigned long *)info->start[i]; + size = size >> 2; /* divide by 4 for longword access */ + for (k=0; kflash_id += FLASH_AM040; + info->flash_id += FLASH_AM040; info->sector_count = 8; info->size = 0x0080000; /* => 512 ko */ break; @@ -416,11 +415,11 @@ } /* set up sector start address table */ - if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || + if (((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) || (info->flash_id == FLASH_AM040)){ for (i = 0; i < info->sector_count; i++) info->start[i] = base + (i * 0x00010000); - } else { + } else { if (info->flash_id & FLASH_BTYPE) { /* set sector offsets for bottom boot block type */ info->start[0] = base + 0x00000000; @@ -451,10 +450,10 @@ info->protect[i] = addr2[4] & 1; #else addr2 = (volatile FLASH_WORD_SIZE *)(info->start[i]); - if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) - info->protect[i] = 0; - else - info->protect[i] = addr2[2] & 1; + if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_SST) + info->protect[i] = 0; + else + info->protect[i] = addr2[2] & 1; #endif } @@ -465,9 +464,9 @@ #if 0 /* test-only */ #ifdef CONFIG_ADCIOP addr2 = (volatile unsigned char *)info->start[0]; - addr2[ADDR0] = 0xAA; - addr2[ADDR1] = 0x55; - addr2[ADDR0] = 0xF0; /* reset bank */ + addr2[ADDR0] = 0xAA; + addr2[ADDR1] = 0x55; + addr2[ADDR0] = 0xF0; /* reset bank */ #else addr2 = (FLASH_WORD_SIZE *)info->start[0]; *addr2 = (FLASH_WORD_SIZE)0x00F000F0; /* reset bank */ @@ -489,15 +488,15 @@ start = get_timer (0); last = start; while ((addr[0] & (FLASH_WORD_SIZE)0x00800080) != (FLASH_WORD_SIZE)0x00800080) { - if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { - printf ("Timeout\n"); - return -1; - } - /* show that we're waiting */ - if ((now - last) > 1000) { /* every second */ - putc ('.'); - last = now; - } + if ((now = get_timer(start)) > CFG_FLASH_ERASE_TOUT) { + printf ("Timeout\n"); + return -1; + } + /* show that we're waiting */ + if ((now - last) > 1000) { /* every second */ + putc ('.'); + last = now; + } } return 0; } diff --git a/board/walnut405/init.S b/board/walnut405/init.S index d141707..70d029a 100644 --- a/board/walnut405/init.S +++ b/board/walnut405/init.S @@ -46,54 +46,54 @@ #include - .globl ext_bus_cntlr_init + .globl ext_bus_cntlr_init ext_bus_cntlr_init: - mflr r4 /* save link register */ - bl ..getAddr + mflr r4 /* save link register */ + bl ..getAddr ..getAddr: - mflr r3 /* get address of ..getAddr */ - mtlr r4 /* restore link register */ - addi r4,0,14 /* set ctr to 10; used to prefetch */ - mtctr r4 /* 10 cache lines to fit this function */ - /* in cache (gives us 8x10=80 instrctns) */ + mflr r3 /* get address of ..getAddr */ + mtlr r4 /* restore link register */ + addi r4,0,14 /* set ctr to 10; used to prefetch */ + mtctr r4 /* 10 cache lines to fit this function */ + /* in cache (gives us 8x10=80 instrctns) */ ..ebcloop: - icbt r0,r3 /* prefetch cache line for addr in r3 */ - addi r3,r3,32 /* move to next cache line */ - bdnz ..ebcloop /* continue for 10 cache lines */ + icbt r0,r3 /* prefetch cache line for addr in r3 */ + addi r3,r3,32 /* move to next cache line */ + bdnz ..ebcloop /* continue for 10 cache lines */ - /*------------------------------------------------------------------- */ - /* Delay to ensure all accesses to ROM are complete before changing */ + /*------------------------------------------------------------------- */ + /* Delay to ensure all accesses to ROM are complete before changing */ /* bank 0 timings. 200usec should be enough. */ - /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ - /*------------------------------------------------------------------- */ + /* 200,000,000 (cycles/sec) X .000200 (sec) = 0x9C40 cycles */ + /*------------------------------------------------------------------- */ addis r3,0,0x0 - ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ - mtctr r3 + ori r3,r3,0xA000 /* ensure 200usec have passed since reset */ + mtctr r3 ..spinlp: - bdnz ..spinlp /* spin loop */ + bdnz ..spinlp /* spin loop */ - /*----------------------------------------------------------------------- */ - /* Memory Bank 0 (Flash and SRAM) initialization */ - /*----------------------------------------------------------------------- */ - addi r4,0,pb0ap - mtdcr ebccfga,r4 - addis r4,0,0x9B01 - ori r4,r4,0x5480 - mtdcr ebccfgd,r4 + /*----------------------------------------------------------------------- */ + /* Memory Bank 0 (Flash and SRAM) initialization */ + /*----------------------------------------------------------------------- */ + addi r4,0,pb0ap + mtdcr ebccfga,r4 + addis r4,0,0x9B01 + ori r4,r4,0x5480 + mtdcr ebccfgd,r4 - addi r4,0,pb0cr - mtdcr ebccfga,r4 - addis r4,0,0xFFF1 /* BAS=0xFFF,BS=0x0(1MB),BU=0x3(R/W), */ - ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ - mtdcr ebccfgd,r4 + addi r4,0,pb0cr + mtdcr ebccfga,r4 + addis r4,0,0xFFF1 /* BAS=0xFFF,BS=0x0(1MB),BU=0x3(R/W), */ + ori r4,r4,0x8000 /* BW=0x0( 8 bits) */ + mtdcr ebccfgd,r4 - blr + blr /*----------------------------------------------------------------------------- */ /* Function: sdram_init */ /* Description: Dummy implementation here - done in C later */ /*----------------------------------------------------------------------------- */ - .globl sdram_init + .globl sdram_init sdram_init: - blr + blr diff --git a/board/walnut405/u-boot.lds b/board/walnut405/u-boot.lds index 72e99fc..7a75f6a 100644 --- a/board/walnut405/u-boot.lds +++ b/board/walnut405/u-boot.lds @@ -121,6 +121,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; diff --git a/board/walnut405/u-boot.lds.debug b/board/walnut405/u-boot.lds.debug index f4f9743..d483424 100644 --- a/board/walnut405/u-boot.lds.debug +++ b/board/walnut405/u-boot.lds.debug @@ -106,6 +106,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -128,4 +133,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/walnut405/walnut405.c b/board/walnut405/walnut405.c index 598509f..1d02ad4 100644 --- a/board/walnut405/walnut405.c +++ b/board/walnut405/walnut405.c @@ -116,7 +116,7 @@ the necessary info for SDRAM controller configuration ------------------------------------------------------------------------- */ long int initdram (int board_type) -{ +{ return spd_sdram (0); } diff --git a/board/wepep250/Makefile b/board/wepep250/Makefile index d4314d7..802ccb9 100644 --- a/board/wepep250/Makefile +++ b/board/wepep250/Makefile @@ -29,7 +29,7 @@ SOBJS := memsetup.o $(LIB): $(OBJS) $(SOBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) $(SOBJS) clean: rm -f $(SOBJS) $(OBJS) diff --git a/board/wepep250/flash.c b/board/wepep250/flash.c index 5c9d346..2a32290 100644 --- a/board/wepep250/flash.c +++ b/board/wepep250/flash.c @@ -201,7 +201,7 @@ } else { printf ("Erasing sector %2d ... ", sector); } - + address = (FLASH_BUS *) (info->start[sector]); *address = FLASH_CMD (CFI_INTEL_CMD_BLOCK_ERASE); diff --git a/board/wepep250/intel.h b/board/wepep250/intel.h index f622590..77498b6 100644 --- a/board/wepep250/intel.h +++ b/board/wepep250/intel.h @@ -97,4 +97,3 @@ #define CFI_CHIPN_INTEL_28F256K18 "28F256K18" #endif /* FLASH_INTEL_H */ - diff --git a/board/wepep250/memsetup.S b/board/wepep250/memsetup.S index 8a5d42f..26fc0ea 100644 --- a/board/wepep250/memsetup.S +++ b/board/wepep250/memsetup.S @@ -5,17 +5,17 @@ * modify it under the terms of the GNU General Public License * as published by the Free Software Foundation; either version 2 * of the License, or (at your option) any later version. - * + * * This program is distributed in the hope that it will be useful, * but WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. - * + * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA * 02111-1307, USA. - * + * * Written by Marcel Telka , 2001, 2002. * Changes for U-Boot Peter Figuli , 2003. * @@ -28,7 +28,7 @@ * Revision 1.0, February 2002 * [3] Samsung Electronics, "16Mx16 SDRAM 54CSP K4S561633C-RL(N)", * Revision 1.0, February 2002 - * + * */ #include @@ -51,7 +51,6 @@ ldr r0, =0x48000000 /* MC_BASE */ - /* step 1.a - setup MSCx */ ldr r1, =0x000012B3 /* MSC0_RRR0(1) | MSC0_RDN0(2) | MSC0_RDF0(11) | MSC0_RT0(3) */ @@ -144,4 +143,3 @@ /* Step 11 - optional (TODO) */ mov pc,r10 - diff --git a/board/wepep250/u-boot.lds b/board/wepep250/u-boot.lds index 46beb15..38ec25f 100644 --- a/board/wepep250/u-boot.lds +++ b/board/wepep250/u-boot.lds @@ -26,29 +26,33 @@ ENTRY(_start) SECTIONS { - . = 0x00000000; + . = 0x00000000; - . = ALIGN(4); + . = ALIGN(4); .text : { cpu/pxa/start.o (.text) *(.text) } - . = ALIGN(4); - .rodata : { *(.rodata) } + . = ALIGN(4); + .rodata : { *(.rodata) } - . = ALIGN(4); - .data : { *(.data) } + . = ALIGN(4); + .data : { *(.data) } - . = ALIGN(4); - .got : { *(.got) } + . = ALIGN(4); + .got : { *(.got) } + + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; armboot_end_data = .; - . = ALIGN(4); + . = ALIGN(4); bss_start = .; - .bss : { *(.bss) } + .bss : { *(.bss) } bss_end = .; armboot_end = .; diff --git a/board/wepep250/wepep250.c b/board/wepep250/wepep250.c index ebf75d7..08b1bfd 100644 --- a/board/wepep250/wepep250.c +++ b/board/wepep250/wepep250.c @@ -26,7 +26,7 @@ int board_init( void ){ DECLARE_GLOBAL_DATA_PTR; - gd->bd->bi_arch_number = 288; + gd->bd->bi_arch_number = 288; gd->bd->bi_boot_params = 0xa0000000; /* * Setup GPIO stuff to get serial working @@ -59,11 +59,11 @@ gd->bd->bi_dram[0].start = WEP_SDRAM_1; gd->bd->bi_dram[0].size = WEP_SDRAM_1_SIZE; #endif -#if ( CONFIG_NR_DRAM_BANKS > 1 ) +#if ( CONFIG_NR_DRAM_BANKS > 1 ) gd->bd->bi_dram[1].start = WEP_SDRAM_2; gd->bd->bi_dram[1].size = WEP_SDRAM_2_SIZE; #endif -#if ( CONFIG_NR_DRAM_BANKS > 2 ) +#if ( CONFIG_NR_DRAM_BANKS > 2 ) gd->bd->bi_dram[2].start = WEP_SDRAM_3; gd->bd->bi_dram[2].size = WEP_SDRAM_3_SIZE; #endif @@ -71,7 +71,6 @@ gd->bd->bi_dram[3].start = WEP_SDRAM_4; gd->bd->bi_dram[3].size = WEP_SDRAM_4_SIZE; #endif - + return 0; } - diff --git a/board/westel/amx860/Makefile b/board/westel/amx860/Makefile index 35b8428..7a2014d 100644 --- a/board/westel/amx860/Makefile +++ b/board/westel/amx860/Makefile @@ -28,7 +28,7 @@ OBJS = $(BOARD).o flash.o $(LIB): .depend $(OBJS) - $(AR) crv $@ $^ + $(AR) crv $@ $(OBJS) ######################################################################### diff --git a/board/westel/amx860/u-boot.lds b/board/westel/amx860/u-boot.lds index 4b0129f..86e587f 100644 --- a/board/westel/amx860/u-boot.lds +++ b/board/westel/amx860/u-boot.lds @@ -109,6 +109,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -131,4 +136,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/board/westel/amx860/u-boot.lds.debug b/board/westel/amx860/u-boot.lds.debug index 2365116..7b84fd3 100644 --- a/board/westel/amx860/u-boot.lds.debug +++ b/board/westel/amx860/u-boot.lds.debug @@ -107,6 +107,11 @@ _edata = .; PROVIDE (edata = .); + __u_boot_cmd_start = .; + .u_boot_cmd : { *(.u_boot_cmd) } + __u_boot_cmd_end = .; + + __start___ex_table = .; __ex_table : { *(__ex_table) } __stop___ex_table = .; @@ -129,4 +134,3 @@ _end = . ; PROVIDE (end = .); } - diff --git a/common/Makefile b/common/Makefile index d93dbb3..3aa9b65 100644 --- a/common/Makefile +++ b/common/Makefile @@ -28,21 +28,24 @@ AOBJS = COBJS = main.o altera.o bedbug.o \ - cmd_autoscript.o cmd_bedbug.o cmd_bmp.o cmd_boot.o \ - cmd_bootm.o cmd_cache.o cmd_console.o cmd_date.o \ - cmd_dcr.o cmd_diag.o cmd_doc.o cmd_nand.o cmd_dtt.o \ + cmd_autoscript.o \ + cmd_bdinfo.o cmd_bedbug.o cmd_bmp.o cmd_boot.o cmd_bootm.o \ + cmd_cache.o cmd_console.o \ + cmd_date.o cmd_dcr.o cmd_diag.o cmd_doc.o cmd_dtt.o \ cmd_eeprom.o cmd_elf.o \ - cmd_fat.o cmd_fdc.o cmd_fdos.o cmd_flash.o \ - cmd_fpga.o cmd_i2c.o cmd_ide.o cmd_immap.o \ - cmd_jffs2.o cmd_log.o cmd_mem.o cmd_mii.o cmd_misc.o \ - cmd_mmc.o cmd_net.o cmd_nvedit.o env_common.o \ - env_flash.o env_eeprom.o env_nvram.o env_nowhere.o \ + cmd_fat.o cmd_fdc.o cmd_fdos.o cmd_flash.o cmd_fpga.o \ + cmd_i2c.o cmd_ide.o cmd_immap.o cmd_jffs2.o \ + cmd_load.o cmd_log.o \ + cmd_mem.o cmd_mii.o cmd_misc.o cmd_mmc.o \ + cmd_nand.o cmd_net.o cmd_nvedit.o \ cmd_pci.o cmd_pcmcia.o cmd_portio.o \ - cmd_reginfo.o cmd_scsi.o cmd_vfd.o cmd_usb.o \ - command.o console.o devices.o dlmalloc.o \ - docecc.o environment.o flash.o fpga.o \ + cmd_reginfo.o cmd_scsi.o cmd_spi.o cmd_usb.o cmd_vfd.o \ + command.o console.o devices.o dlmalloc.o docecc.o \ + environment.o env_common.o \ + env_flash.o env_eeprom.o env_nvram.o env_nowhere.o \ + flash.o fpga.o \ hush.o kgdb.o lists.o miiphybb.o miiphyutil.o \ - s_record.o soft_i2c.o soft_spi.o cmd_spi.o spartan2.o \ + s_record.o soft_i2c.o soft_spi.o spartan2.o \ usb.o usb_kbd.o usb_storage.o \ virtex2.o xilinx.o diff --git a/common/bedbug.c b/common/bedbug.c index fe54d17..6966de7 100644 --- a/common/bedbug.c +++ b/common/bedbug.c @@ -27,7 +27,7 @@ int print_operands __P ((struct ppc_ctx *)); int get_operand_value __P ((struct opcode *, unsigned long, - enum OP_FIELD, unsigned long *)); + enum OP_FIELD, unsigned long *)); struct opcode *find_opcode __P ((unsigned long)); struct opcode *find_opcode_by_name __P ((char *)); char *spr_name __P ((int)); @@ -35,7 +35,7 @@ char *tbr_name __P ((int)); int tbr_value __P ((char *)); int parse_operand __P ((unsigned long, struct opcode *, - struct operand *, char *, int *)); + struct operand *, char *, int *)); int get_word __P ((char **, char *)); long read_number __P ((char *)); int downstring __P ((char *)); diff --git a/common/cmd_autoscript.c b/common/cmd_autoscript.c index 7e706c9..d3d04c3 100644 --- a/common/cmd_autoscript.c +++ b/common/cmd_autoscript.c @@ -40,8 +40,6 @@ #include #include #include -#include -#include #if defined(CONFIG_8xx) #include #endif @@ -49,8 +47,9 @@ #include #endif +#define AUTOSCRIPT_MAGIC 0x09011962 #if defined(CONFIG_AUTOSCRIPT) || \ - (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) + (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT ) extern image_header_t header; /* from cmd_bootm.c */ int @@ -118,7 +117,7 @@ memmove (cmd, (char *)len_ptr, len); *(cmd + len) = 0; -#ifdef CFG_HUSH_PARSER +#ifdef CFG_HUSH_PARSER /*?? */ rcode = parse_string_outer (cmd, FLAG_PARSE_SEMICOLON); #else { @@ -153,7 +152,7 @@ } #endif /* CONFIG_AUTOSCRIPT || CFG_CMD_AUTOSCRIPT */ - +/**************************************************/ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) int do_autoscript (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) @@ -171,4 +170,14 @@ rcode = autoscript (addr); return rcode; } + +#if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) +cmd_tbl_t U_BOOT_CMD(AUTOSCRIPT) = MK_CMD_ENTRY( + "autoscr", 2, 0, do_autoscript, + "autoscr - run script from memory\n", + "[addr] - run script starting at addr" + " - A valid autoscr header must be present\n" +); #endif /* CFG_CMD_AUTOSCRIPT */ + +#endif /* CONFIG_AUTOSCRIPT || CFG_CMD_AUTOSCRIPT */ diff --git a/common/cmd_bdinfo.c b/common/cmd_bdinfo.c new file mode 100644 index 0000000..3f73cf8 --- /dev/null +++ b/common/cmd_bdinfo.c @@ -0,0 +1,180 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Boot support + */ +#include +#include + + +#if (CONFIG_COMMANDS & CFG_CMD_BDI) +static void print_num(const char *, ulong); + +#ifndef CONFIG_ARM /* PowerPC and other */ + +#ifdef CONFIG_PPC +static void print_str(const char *, const char *); + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + DECLARE_GLOBAL_DATA_PTR; + + int i; + bd_t *bd = gd->bd; + char buf[32]; + +#ifdef DEBUG + print_num ("bd address", (ulong)bd ); +#endif + print_num ("memstart", bd->bi_memstart ); + print_num ("memsize", bd->bi_memsize ); + print_num ("flashstart", bd->bi_flashstart ); + print_num ("flashsize", bd->bi_flashsize ); + print_num ("flashoffset", bd->bi_flashoffset ); + print_num ("sramstart", bd->bi_sramstart ); + print_num ("sramsize", bd->bi_sramsize ); +#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) + print_num ("immr_base", bd->bi_immr_base ); +#endif + print_num ("bootflags", bd->bi_bootflags ); +#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_405EP) + print_str ("procfreq", strmhz(buf, bd->bi_procfreq)); + print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq)); +#if defined(CONFIG_405GP) || defined(CONFIG_405EP) + print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq)); +#endif +#else /* ! CONFIG_405GP, CONFIG_405CR, CONFIG_405EP */ +#if defined(CONFIG_8260) + print_str ("vco", strmhz(buf, bd->bi_vco)); + print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq)); + print_str ("brgfreq", strmhz(buf, bd->bi_brgfreq)); +#endif + print_str ("intfreq", strmhz(buf, bd->bi_intfreq)); +#if defined(CONFIG_8260) + print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq)); +#endif + print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); +#endif /* CONFIG_405GP, CONFIG_405CR, CONFIG_405EP */ + printf ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } +#ifdef CONFIG_PN62 + printf ("\neth1addr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]); + } +#endif /* CONFIG_PN62 */ +#ifdef CONFIG_HERMES + print_str ("ethspeed", strmhz(buf, bd->bi_ethspeed)); +#endif + printf ("\nIP addr = "); print_IPaddr (bd->bi_ip_addr); + printf ("\nbaudrate = %6ld bps\n", bd->bi_baudrate ); + return 0; +} + +#else /* ! PPC, which leaves MIPS */ + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + DECLARE_GLOBAL_DATA_PTR; + + int i; + bd_t *bd = gd->bd; + + print_num ("boot_params", (ulong)bd->bi_boot_params); + print_num ("memstart", (ulong)bd->bi_memstart); + print_num ("memsize", (ulong)bd->bi_memsize); + print_num ("flashstart", (ulong)bd->bi_flashstart); + print_num ("flashsize", (ulong)bd->bi_flashsize); + print_num ("flashoffset", (ulong)bd->bi_flashoffset); + + printf ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + printf ("\nip_addr = "); + print_IPaddr (bd->bi_ip_addr); + printf ("\nbaudrate = %d bps\n", bd->bi_baudrate); + + return 0; +} +#endif /* MIPS */ + +#else /* ARM */ + +int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + DECLARE_GLOBAL_DATA_PTR; + + int i; + bd_t *bd = gd->bd; + + print_num ("arch_number", bd->bi_arch_number); + print_num ("env_t", (ulong)bd->bi_env); + print_num ("boot_params", (ulong)bd->bi_boot_params); + + for (i=0; i start", bd->bi_dram[i].start); + print_num("-> size", bd->bi_dram[i].size); + } + + printf ("ethaddr ="); + for (i=0; i<6; ++i) { + printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); + } + printf ("\n" + "ip_addr = "); + print_IPaddr (bd->bi_ip_addr); + printf ("\n" + "baudrate = %d bps\n", bd->bi_baudrate); + + return 0; +} + +#endif /* CONFIG_ARM XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ + +static void print_num(const char *name, ulong value) +{ + printf ("%-12s= 0x%08lX\n", name, value); +} + +#ifdef CONFIG_PPC +static void print_str(const char *name, const char *str) +{ + printf ("%-12s= %6s MHz\n", name, str); +} +#endif /* CONFIG_PPC */ + + +/* -------------------------------------------------------------------- */ + +cmd_tbl_t U_BOOT_CMD(BDINFO) = MK_CMD_ENTRY( + "bdinfo", 1, 1, do_bdinfo, + "bdinfo - print Board Info structure\n", + NULL +); +#endif /* CFG_CMD_BDI */ + diff --git a/common/cmd_bedbug.c b/common/cmd_bedbug.c index f3b5f88..6ee01d5 100644 --- a/common/cmd_bedbug.c +++ b/common/cmd_bedbug.c @@ -6,12 +6,10 @@ #include #include #include - -#include +#include #include #include #include -#include #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) @@ -110,8 +108,11 @@ dis_last_len = len; return 0; } /* do_bedbug_dis */ - - +cmd_tbl_t U_BOOT_CMD(DIS) = MK_CMD_ENTRY( + "ds", 3, 1, do_bedbug_dis, + "ds - disassemble memory\n", + "ds
[# instructions]\n" +); /* ====================================================================== * Entry point from the interpreter to the assembler. Assembles @@ -154,7 +155,7 @@ else { printf( "*** Error: %s ***\n", asm_error_str( asm_err )); - rcode = 1; + rcode = 1; } } else @@ -164,8 +165,11 @@ } return rcode; } /* do_bedbug_asm */ - - +cmd_tbl_t U_BOOT_CMD(ASM) = MK_CMD_ENTRY( + "as", 2, 0, do_bedbug_asm, + "as - assemble memory\n", + "as
\n" +); /* ====================================================================== * Used to set a break point from the interpreter. Simply calls into the @@ -180,8 +184,14 @@ return 0; } /* do_bedbug_break */ - - +cmd_tbl_t U_BOOT_CMD(BREAK) = MK_CMD_ENTRY( + "break", 3, 0, do_bedbug_break, + "break - set or clear a breakpoint\n", + " - Set or clear a breakpoint\n" + "break
- Break at an address\n" + "break off - Disable breakpoint.\n" + "break show - List breakpoints.\n" +); /* ====================================================================== * Called from the debug interrupt routine. Simply calls the CPU-specific @@ -278,8 +288,11 @@ bug_ctx.stopped = 0; return 0; } /* do_bedbug_continue */ - - +cmd_tbl_t U_BOOT_CMD(CONTINUE) = MK_CMD_ENTRY( + "continue", 1, 0, do_bedbug_continue, + "continue- continue from a breakpoint\n", + " - continue from a breakpoint.\n" +); /* ====================================================================== * Interpreter command to continue to the next instruction, stepping into @@ -307,8 +320,11 @@ bug_ctx.stopped = 0; return 0; } /* do_bedbug_step */ - - +cmd_tbl_t U_BOOT_CMD(STEP) = MK_CMD_ENTRY( + "step", 1, 1, do_bedbug_step, + "step - single step execution.\n", + " - single step execution.\n" +); /* ====================================================================== * Interpreter command to continue to the next instruction, stepping over @@ -336,8 +352,11 @@ bug_ctx.stopped = 0; return 0; } /* do_bedbug_next */ - - +cmd_tbl_t U_BOOT_CMD(NEXT) = MK_CMD_ENTRY( + "next", 1, 1, do_bedbug_next, + "next - single step execution, stepping over subroutines.\n", + " - single step execution, stepping over subroutines.\n" +); /* ====================================================================== * Interpreter command to print the current stack. This assumes an EABI @@ -382,8 +401,11 @@ } return 0; } /* do_bedbug_stack */ - - +cmd_tbl_t U_BOOT_CMD(STACK) = MK_CMD_ENTRY( + "where", 1, 1, do_bedbug_stack, + "where - Print the running stack.\n", + " - Print the running stack.\n" +); /* ====================================================================== * Interpreter command to dump the registers. Calls the CPU-specific @@ -402,8 +424,11 @@ show_regs( bug_ctx.regs ); return 0; } /* do_bedbug_rdump */ - - +cmd_tbl_t U_BOOT_CMD(RDUMP) = MK_CMD_ENTRY( + "rdump", 1, 1, do_bedbug_rdump, + "rdump - Show registers.\n", + " - Show registers.\n" +); /* ====================================================================== */ #endif /* CFG_CMD_BEDBUG */ diff --git a/common/cmd_boot.c b/common/cmd_boot.c index fef8459..a0bc04b 100644 --- a/common/cmd_boot.c +++ b/common/cmd_boot.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000-2002 + * (C) Copyright 2000-2003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -22,170 +22,16 @@ */ /* - * Boot support + * Misc boot support */ #include #include -#include #include -#include #include #include -#if (CONFIG_COMMANDS & CFG_CMD_LOADS) -static ulong load_serial (ulong offset); -static int read_record (char *buf, ulong len); -# if (CONFIG_COMMANDS & CFG_CMD_SAVES) -static int save_serial (ulong offset, ulong size); -static int write_record (char *buf); -# endif /* CFG_CMD_SAVES */ - -static int do_echo = 1; -#endif /* CFG_CMD_LOADS */ - - -#if (CONFIG_COMMANDS & CFG_CMD_BDI) -static void print_num(const char *, ulong); - -#ifndef CONFIG_ARM /* PowerPC and other */ - -#ifdef CONFIG_PPC -static void print_str(const char *, const char *); - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - DECLARE_GLOBAL_DATA_PTR; - - int i; - bd_t *bd = gd->bd; - char buf[32]; - -#ifdef DEBUG - print_num ("bd address", (ulong)bd ); -#endif - print_num ("memstart", bd->bi_memstart ); - print_num ("memsize", bd->bi_memsize ); - print_num ("flashstart", bd->bi_flashstart ); - print_num ("flashsize", bd->bi_flashsize ); - print_num ("flashoffset", bd->bi_flashoffset ); - print_num ("sramstart", bd->bi_sramstart ); - print_num ("sramsize", bd->bi_sramsize ); -#if defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_8260) - print_num ("immr_base", bd->bi_immr_base ); -#endif - print_num ("bootflags", bd->bi_bootflags ); -#if defined(CONFIG_405GP) || defined(CONFIG_405CR) || defined(CONFIG_405EP) - print_str ("procfreq", strmhz(buf, bd->bi_procfreq)); - print_str ("plb_busfreq", strmhz(buf, bd->bi_plb_busfreq)); -#if defined(CONFIG_405GP) || defined(CONFIG_405EP) - print_str ("pci_busfreq", strmhz(buf, bd->bi_pci_busfreq)); -#endif -#else -#if defined(CONFIG_8260) - print_str ("vco", strmhz(buf, bd->bi_vco)); - print_str ("sccfreq", strmhz(buf, bd->bi_sccfreq)); - print_str ("brgfreq", strmhz(buf, bd->bi_brgfreq)); -#endif - print_str ("intfreq", strmhz(buf, bd->bi_intfreq)); -#if defined(CONFIG_8260) - print_str ("cpmfreq", strmhz(buf, bd->bi_cpmfreq)); -#endif - print_str ("busfreq", strmhz(buf, bd->bi_busfreq)); -#endif /* defined(CONFIG_405GP) || defined(CONFIG_405CR) */ - printf ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } -#ifdef CONFIG_PN62 - printf ("\neth1addr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enet1addr[i]); - } -#endif /* CONFIG_PN62 */ -#ifdef CONFIG_HERMES - print_str ("ethspeed", strmhz(buf, bd->bi_ethspeed)); -#endif - printf ("\nIP addr = "); print_IPaddr (bd->bi_ip_addr); - printf ("\nbaudrate = %6ld bps\n", bd->bi_baudrate ); - return 0; -} - -#else /* MIPS */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - DECLARE_GLOBAL_DATA_PTR; - - int i; - bd_t *bd = gd->bd; - - print_num ("boot_params", (ulong)bd->bi_boot_params); - print_num ("memstart", (ulong)bd->bi_memstart); - print_num ("memsize", (ulong)bd->bi_memsize); - print_num ("flashstart", (ulong)bd->bi_flashstart); - print_num ("flashsize", (ulong)bd->bi_flashsize); - print_num ("flashoffset", (ulong)bd->bi_flashoffset); - - printf ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - printf ("\nip_addr = "); - print_IPaddr (bd->bi_ip_addr); - printf ("\nbaudrate = %d bps\n", bd->bi_baudrate); - - return 0; -} -#endif /* MIPS */ - -#else /* ARM */ - -int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - DECLARE_GLOBAL_DATA_PTR; - - int i; - bd_t *bd = gd->bd; - - print_num ("arch_number", bd->bi_arch_number); - print_num ("env_t", (ulong)bd->bi_env); - print_num ("boot_params", (ulong)bd->bi_boot_params); - - for (i=0; i start", bd->bi_dram[i].start); - print_num("-> size", bd->bi_dram[i].size); - } - - printf ("ethaddr ="); - for (i=0; i<6; ++i) { - printf ("%c%02X", i ? ':' : ' ', bd->bi_enetaddr[i]); - } - printf ("\n" - "ip_addr = "); - print_IPaddr (bd->bi_ip_addr); - printf ("\n" - "baudrate = %d bps\n", bd->bi_baudrate); - - return 0; -} - -#endif /* CONFIG_ARM XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ - -static void print_num(const char *name, ulong value) -{ - printf ("%-12s= 0x%08lX\n", name, value); -} - -#ifdef CONFIG_PPC -static void print_str(const char *name, const char *str) -{ - printf ("%-12s= %6s MHz\n", name, str); -} -#endif /* CONFIG_PPC */ - -#endif /* CFG_CMD_BDI */ +/* -------------------------------------------------------------------- */ int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -212,947 +58,19 @@ return rcode; } -#if (CONFIG_COMMANDS & CFG_CMD_LOADS) -int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - ulong offset = 0; - ulong addr; - int i; - char *env_echo; - int rcode = 0; -#ifdef CFG_LOADS_BAUD_CHANGE - DECLARE_GLOBAL_DATA_PTR; - int load_baudrate, current_baudrate; +/* -------------------------------------------------------------------- */ - load_baudrate = current_baudrate = gd->baudrate; -#endif +cmd_tbl_t U_BOOT_CMD(GO) = MK_CMD_ENTRY( + "go", CFG_MAXARGS, 1, do_go, + "go - start application at address 'addr'\n", + "addr [arg ...]\n - start application at address 'addr'\n" + " passing 'arg' as arguments\n" +); - if (((env_echo = getenv("loads_echo")) != NULL) && (*env_echo == '1')) { - do_echo = 1; - } else { - do_echo = 0; - } +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#ifdef CFG_LOADS_BAUD_CHANGE - if (argc >= 2) { - offset = simple_strtoul(argv[1], NULL, 16); - } - if (argc == 3) { - load_baudrate = (int)simple_strtoul(argv[2], NULL, 10); - - /* default to current baudrate */ - if (load_baudrate == 0) - load_baudrate = current_baudrate; - } -#else /* ! CFG_LOADS_BAUD_CHANGE */ - if (argc == 2) { - offset = simple_strtoul(argv[1], NULL, 16); - } -#endif /* CFG_LOADS_BAUD_CHANGE */ - -#ifdef CFG_LOADS_BAUD_CHANGE - if (load_baudrate != current_baudrate) { - printf ("## Switch baudrate to %d bps and press ENTER ...\n", - load_baudrate); - udelay(50000); - gd->baudrate = load_baudrate; - serial_setbrg (); - udelay(50000); - for (;;) { - if (getc() == '\r') - break; - } - } -#endif /* CFG_LOADS_BAUD_CHANGE */ - printf ("## Ready for S-Record download ...\n"); - - addr = load_serial (offset); - - /* - * Gather any trailing characters (for instance, the ^D which - * is sent by 'cu' after sending a file), and give the - * box some time (100 * 1 ms) - */ - for (i=0; i<100; ++i) { - if (serial_tstc()) { - (void) serial_getc(); - } - udelay(1000); - } - - if (addr == ~0) { - printf ("## S-Record download aborted\n"); - rcode = 1; - } else { - printf ("## Start Addr = 0x%08lX\n", addr); - load_addr = addr; - } - -#ifdef CFG_LOADS_BAUD_CHANGE - if (load_baudrate != current_baudrate) { - printf ("## Switch baudrate to %d bps and press ESC ...\n", - current_baudrate); - udelay (50000); - gd->baudrate = current_baudrate; - serial_setbrg (); - udelay (50000); - for (;;) { - if (getc() == 0x1B) /* ESC */ - break; - } - } -#endif - return rcode; -} - -static ulong -load_serial (ulong offset) -{ - char record[SREC_MAXRECLEN + 1]; /* buffer for one S-Record */ - char binbuf[SREC_MAXBINLEN]; /* buffer for binary data */ - int binlen; /* no. of data bytes in S-Rec. */ - int type; /* return code for record type */ - ulong addr; /* load address from S-Record */ - ulong size; /* number of bytes transferred */ - char buf[32]; - ulong store_addr; - ulong start_addr = ~0; - ulong end_addr = 0; - int line_count = 0; - - while (read_record(record, SREC_MAXRECLEN + 1) >= 0) { - type = srec_decode (record, &binlen, &addr, binbuf); - - if (type < 0) { - return (~0); /* Invalid S-Record */ - } - - switch (type) { - case SREC_DATA2: - case SREC_DATA3: - case SREC_DATA4: - store_addr = addr + offset; -#ifndef CFG_NO_FLASH - if (addr2info(store_addr)) { - int rc; - - rc = flash_write((uchar *)binbuf,store_addr,binlen); - if (rc != 0) { - flash_perror (rc); - return (~0); - } - } else -#endif - { - memcpy ((char *)(store_addr), binbuf, binlen); - } - if ((store_addr) < start_addr) - start_addr = store_addr; - if ((store_addr + binlen - 1) > end_addr) - end_addr = store_addr + binlen - 1; - break; - case SREC_END2: - case SREC_END3: - case SREC_END4: - udelay (10000); - size = end_addr - start_addr + 1; - printf ("\n" - "## First Load Addr = 0x%08lX\n" - "## Last Load Addr = 0x%08lX\n" - "## Total Size = 0x%08lX = %ld Bytes\n", - start_addr, end_addr, size, size - ); - flush_cache (addr, size); - sprintf(buf, "%lX", size); - setenv("filesize", buf); - return (addr); - case SREC_START: - break; - default: - break; - } - if (!do_echo) { /* print a '.' every 100 lines */ - if ((++line_count % 100) == 0) - putc ('.'); - } - } - - return (~0); /* Download aborted */ -} - -static int -read_record (char *buf, ulong len) -{ - char *p; - char c; - - --len; /* always leave room for terminating '\0' byte */ - - for (p=buf; p < buf+len; ++p) { - c = serial_getc(); /* read character */ - if (do_echo) - serial_putc (c); /* ... and echo it */ - - switch (c) { - case '\r': - case '\n': - *p = '\0'; - return (p - buf); - case '\0': - case 0x03: /* ^C - Control C */ - return (-1); - default: - *p = c; - } - - /* Check for the console hangup (if any different from serial) */ -#ifdef CONFIG_PPC /* we don't have syscall_tbl anywhere else */ - if (syscall_tbl[SYSCALL_GETC] != serial_getc) { - if (ctrlc()) { - return (-1); - } - } -#endif - } - - /* line too long - truncate */ - *p = '\0'; - return (p - buf); -} - -#if (CONFIG_COMMANDS & CFG_CMD_SAVES) - -int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - ulong offset = 0; - ulong size = 0; -#ifdef CFG_LOADS_BAUD_CHANGE - DECLARE_GLOBAL_DATA_PTR; - int save_baudrate, current_baudrate; - - save_baudrate = current_baudrate = gd->baudrate; -#endif - - if (argc >= 2) { - offset = simple_strtoul(argv[1], NULL, 16); - } -#ifdef CFG_LOADS_BAUD_CHANGE - if (argc >= 3) { - size = simple_strtoul(argv[2], NULL, 16); - } - if (argc == 4) { - save_baudrate = (int)simple_strtoul(argv[3], NULL, 10); - - /* default to current baudrate */ - if (save_baudrate == 0) - save_baudrate = current_baudrate; - } -#else /* ! CFG_LOADS_BAUD_CHANGE */ - if (argc == 3) { - size = simple_strtoul(argv[2], NULL, 16); - } -#endif /* CFG_LOADS_BAUD_CHANGE */ - -#ifdef CFG_LOADS_BAUD_CHANGE - if (save_baudrate != current_baudrate) { - printf ("## Switch baudrate to %d bps and press ENTER ...\n", - save_baudrate); - udelay(50000); - gd->baudrate = save_baudrate; - serial_setbrg (); - udelay(50000); - for (;;) { - if (getc() == '\r') - break; - } - } -#endif /* CFG_LOADS_BAUD_CHANGE */ - printf ("## Ready for S-Record upload, press ENTER to proceed ...\n"); - for (;;) { - if (getc() == '\r') - break; - } - if(save_serial (offset, size)) { - printf ("## S-Record upload aborted\n"); - } else { - printf ("## S-Record upload complete\n"); - } -#ifdef CFG_LOADS_BAUD_CHANGE - if (save_baudrate != current_baudrate) { - printf ("## Switch baudrate to %d bps and press ESC ...\n", - (int)current_baudrate); - udelay (50000); - gd->baudrate = current_baudrate; - serial_setbrg (); - udelay (50000); - for (;;) { - if (getc() == 0x1B) /* ESC */ - break; - } - } -#endif - return 0; -} - -#define SREC3_START "S0030000FC\n" -#define SREC3_FORMAT "S3%02X%08lX%s%02X\n" -#define SREC3_END "S70500000000FA\n" -#define SREC_BYTES_PER_RECORD 16 - -static int save_serial (ulong address, ulong count) -{ - int i, c, reclen, checksum, length; - char *hex = "0123456789ABCDEF"; - char record[2*SREC_BYTES_PER_RECORD+16]; /* buffer for one S-Record */ - char data[2*SREC_BYTES_PER_RECORD+1]; /* buffer for hex data */ - - reclen = 0; - checksum = 0; - - if(write_record(SREC3_START)) /* write the header */ - return (-1); - do { - if(count) { /* collect hex data in the buffer */ - c = *(volatile uchar*)(address + reclen); /* get one byte */ - checksum += c; /* accumulate checksum */ - data[2*reclen] = hex[(c>>4)&0x0f]; - data[2*reclen+1] = hex[c & 0x0f]; - data[2*reclen+2] = '\0'; - ++reclen; - --count; - } - if(reclen == SREC_BYTES_PER_RECORD || count == 0) { - /* enough data collected for one record: dump it */ - if(reclen) { /* build & write a data record: */ - /* address + data + checksum */ - length = 4 + reclen + 1; - - /* accumulate length bytes into checksum */ - for(i = 0; i < 2; i++) - checksum += (length >> (8*i)) & 0xff; - - /* accumulate address bytes into checksum: */ - for(i = 0; i < 4; i++) - checksum += (address >> (8*i)) & 0xff; - - /* make proper checksum byte: */ - checksum = ~checksum & 0xff; - - /* output one record: */ - sprintf(record, SREC3_FORMAT, length, address, data, checksum); - if(write_record(record)) - return (-1); - } - address += reclen; /* increment address */ - checksum = 0; - reclen = 0; - } - } - while(count); - if(write_record(SREC3_END)) /* write the final record */ - return (-1); - return(0); -} - -static int -write_record (char *buf) -{ - char c; - - while((c = *buf++)) - serial_putc(c); - - /* Check for the console hangup (if any different from serial) */ - - if (ctrlc()) { - return (-1); - } - return (0); -} -# endif /* CFG_CMD_SAVES */ - -#endif /* CFG_CMD_LOADS */ - - -#if (CONFIG_COMMANDS & CFG_CMD_LOADB) /* loadb command (load binary) included */ - -#define XON_CHAR 17 -#define XOFF_CHAR 19 -#define START_CHAR 0x01 -#define ETX_CHAR 0x03 -#define END_CHAR 0x0D -#define SPACE 0x20 -#define K_ESCAPE 0x23 -#define SEND_TYPE 'S' -#define DATA_TYPE 'D' -#define ACK_TYPE 'Y' -#define NACK_TYPE 'N' -#define BREAK_TYPE 'B' -#define tochar(x) ((char) (((x) + SPACE) & 0xff)) -#define untochar(x) ((int) (((x) - SPACE) & 0xff)) - -extern int os_data_count; -extern int os_data_header[8]; - -static void set_kerm_bin_mode(unsigned long *); -static int k_recv(void); -static ulong load_serial_bin (ulong offset); - - -char his_eol; /* character he needs at end of packet */ -int his_pad_count; /* number of pad chars he needs */ -char his_pad_char; /* pad chars he needs */ -char his_quote; /* quote chars he'll use */ - -int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - DECLARE_GLOBAL_DATA_PTR; - - ulong offset = 0; - ulong addr; - int load_baudrate, current_baudrate; - int rcode = 0; - char *s; - - /* pre-set offset from CFG_LOAD_ADDR */ - offset = CFG_LOAD_ADDR; - - /* pre-set offset from $loadaddr */ - if ((s = getenv("loadaddr")) != NULL) { - offset = simple_strtoul(s, NULL, 16); - } - - load_baudrate = current_baudrate = gd->baudrate; - - if (argc >= 2) { - offset = simple_strtoul(argv[1], NULL, 16); - } - if (argc == 3) { - load_baudrate = (int)simple_strtoul(argv[2], NULL, 10); - - /* default to current baudrate */ - if (load_baudrate == 0) - load_baudrate = current_baudrate; - } - - if (load_baudrate != current_baudrate) { - printf ("## Switch baudrate to %d bps and press ENTER ...\n", - load_baudrate); - udelay(50000); - gd->baudrate = load_baudrate; - serial_setbrg (); - udelay(50000); - for (;;) { - if (getc() == '\r') - break; - } - } - - printf ("## Ready for binary (kermit) download " - "to 0x%08lX at %d bps...\n", - offset, - current_baudrate); - addr = load_serial_bin (offset); - - if (addr == ~0) { - load_addr = 0; - printf ("## Binary (kermit) download aborted\n"); - rcode = 1; - } else { - printf ("## Start Addr = 0x%08lX\n", addr); - load_addr = addr; - } - - if (load_baudrate != current_baudrate) { - printf ("## Switch baudrate to %d bps and press ESC ...\n", - current_baudrate); - udelay (50000); - gd->baudrate = current_baudrate; - serial_setbrg (); - udelay (50000); - for (;;) { - if (getc() == 0x1B) /* ESC */ - break; - } - } - -#ifdef CONFIG_AUTOSCRIPT - if (load_addr) { - char *s; - - if (((s = getenv("autoscript")) != NULL) && (strcmp(s,"yes") == 0)) { - printf("Running autoscript at addr 0x%08lX ...\n", load_addr); - rcode = autoscript (load_addr); - } - } -#endif - return rcode; -} - - -static ulong load_serial_bin (ulong offset) -{ - int size, i; - char buf[32]; - - set_kerm_bin_mode ((ulong *) offset); - size = k_recv (); - - /* - * Gather any trailing characters (for instance, the ^D which - * is sent by 'cu' after sending a file), and give the - * box some time (100 * 1 ms) - */ - for (i=0; i<100; ++i) { - if (serial_tstc()) { - (void) serial_getc(); - } - udelay(1000); - } - - flush_cache (offset, size); - - printf("## Total Size = 0x%08x = %d Bytes\n", size, size); - sprintf(buf, "%X", size); - setenv("filesize", buf); - - return offset; -} - -void send_pad (void) -{ - int count = his_pad_count; - - while (count-- > 0) - serial_putc (his_pad_char); -} - -/* converts escaped kermit char to binary char */ -char ktrans (char in) -{ - if ((in & 0x60) == 0x40) { - return (char) (in & ~0x40); - } else if ((in & 0x7f) == 0x3f) { - return (char) (in | 0x40); - } else - return in; -} - -int chk1 (char *buffer) -{ - int total = 0; - - while (*buffer) { - total += *buffer++; - } - return (int) ((total + ((total >> 6) & 0x03)) & 0x3f); -} - -void s1_sendpacket (char *packet) -{ - send_pad (); - while (*packet) { - serial_putc (*packet++); - } -} - -static char a_b[24]; -void send_ack (int n) -{ - a_b[0] = START_CHAR; - a_b[1] = tochar (3); - a_b[2] = tochar (n); - a_b[3] = ACK_TYPE; - a_b[4] = '\0'; - a_b[4] = tochar (chk1 (&a_b[1])); - a_b[5] = his_eol; - a_b[6] = '\0'; - s1_sendpacket (a_b); -} - -void send_nack (int n) -{ - a_b[0] = START_CHAR; - a_b[1] = tochar (3); - a_b[2] = tochar (n); - a_b[3] = NACK_TYPE; - a_b[4] = '\0'; - a_b[4] = tochar (chk1 (&a_b[1])); - a_b[5] = his_eol; - a_b[6] = '\0'; - s1_sendpacket (a_b); -} - - - -/* os_data_* takes an OS Open image and puts it into memory, and - puts the boot header in an array named os_data_header - - if image is binary, no header is stored in os_data_header. -*/ -void (*os_data_init) (void); -void (*os_data_char) (char new_char); -static int os_data_state, os_data_state_saved; -int os_data_count; -static int os_data_count_saved; -static char *os_data_addr, *os_data_addr_saved; -static char *bin_start_address; -int os_data_header[8]; -static void bin_data_init (void) -{ - os_data_state = 0; - os_data_count = 0; - os_data_addr = bin_start_address; -} -static void os_data_save (void) -{ - os_data_state_saved = os_data_state; - os_data_count_saved = os_data_count; - os_data_addr_saved = os_data_addr; -} -static void os_data_restore (void) -{ - os_data_state = os_data_state_saved; - os_data_count = os_data_count_saved; - os_data_addr = os_data_addr_saved; -} -static void bin_data_char (char new_char) -{ - switch (os_data_state) { - case 0: /* data */ - *os_data_addr++ = new_char; - --os_data_count; - break; - } -} -static void set_kerm_bin_mode (unsigned long *addr) -{ - bin_start_address = (char *) addr; - os_data_init = bin_data_init; - os_data_char = bin_data_char; -} - - -/* k_data_* simply handles the kermit escape translations */ -static int k_data_escape, k_data_escape_saved; -void k_data_init (void) -{ - k_data_escape = 0; - os_data_init (); -} -void k_data_save (void) -{ - k_data_escape_saved = k_data_escape; - os_data_save (); -} -void k_data_restore (void) -{ - k_data_escape = k_data_escape_saved; - os_data_restore (); -} -void k_data_char (char new_char) -{ - if (k_data_escape) { - /* last char was escape - translate this character */ - os_data_char (ktrans (new_char)); - k_data_escape = 0; - } else { - if (new_char == his_quote) { - /* this char is escape - remember */ - k_data_escape = 1; - } else { - /* otherwise send this char as-is */ - os_data_char (new_char); - } - } -} - -#define SEND_DATA_SIZE 20 -char send_parms[SEND_DATA_SIZE]; -char *send_ptr; - -/* handle_send_packet interprits the protocol info and builds and - sends an appropriate ack for what we can do */ -void handle_send_packet (int n) -{ - int length = 3; - int bytes; - - /* initialize some protocol parameters */ - his_eol = END_CHAR; /* default end of line character */ - his_pad_count = 0; - his_pad_char = '\0'; - his_quote = K_ESCAPE; - - /* ignore last character if it filled the buffer */ - if (send_ptr == &send_parms[SEND_DATA_SIZE - 1]) - --send_ptr; - bytes = send_ptr - send_parms; /* how many bytes we'll process */ - do { - if (bytes-- <= 0) - break; - /* handle MAXL - max length */ - /* ignore what he says - most I'll take (here) is 94 */ - a_b[++length] = tochar (94); - if (bytes-- <= 0) - break; - /* handle TIME - time you should wait for my packets */ - /* ignore what he says - don't wait for my ack longer than 1 second */ - a_b[++length] = tochar (1); - if (bytes-- <= 0) - break; - /* handle NPAD - number of pad chars I need */ - /* remember what he says - I need none */ - his_pad_count = untochar (send_parms[2]); - a_b[++length] = tochar (0); - if (bytes-- <= 0) - break; - /* handle PADC - pad chars I need */ - /* remember what he says - I need none */ - his_pad_char = ktrans (send_parms[3]); - a_b[++length] = 0x40; /* He should ignore this */ - if (bytes-- <= 0) - break; - /* handle EOL - end of line he needs */ - /* remember what he says - I need CR */ - his_eol = untochar (send_parms[4]); - a_b[++length] = tochar (END_CHAR); - if (bytes-- <= 0) - break; - /* handle QCTL - quote control char he'll use */ - /* remember what he says - I'll use '#' */ - his_quote = send_parms[5]; - a_b[++length] = '#'; - if (bytes-- <= 0) - break; - /* handle QBIN - 8-th bit prefixing */ - /* ignore what he says - I refuse */ - a_b[++length] = 'N'; - if (bytes-- <= 0) - break; - /* handle CHKT - the clock check type */ - /* ignore what he says - I do type 1 (for now) */ - a_b[++length] = '1'; - if (bytes-- <= 0) - break; - /* handle REPT - the repeat prefix */ - /* ignore what he says - I refuse (for now) */ - a_b[++length] = 'N'; - if (bytes-- <= 0) - break; - /* handle CAPAS - the capabilities mask */ - /* ignore what he says - I only do long packets - I don't do windows */ - a_b[++length] = tochar (2); /* only long packets */ - a_b[++length] = tochar (0); /* no windows */ - a_b[++length] = tochar (94); /* large packet msb */ - a_b[++length] = tochar (94); /* large packet lsb */ - } while (0); - - a_b[0] = START_CHAR; - a_b[1] = tochar (length); - a_b[2] = tochar (n); - a_b[3] = ACK_TYPE; - a_b[++length] = '\0'; - a_b[length] = tochar (chk1 (&a_b[1])); - a_b[++length] = his_eol; - a_b[++length] = '\0'; - s1_sendpacket (a_b); -} - -/* k_recv receives a OS Open image file over kermit line */ -static int k_recv (void) -{ - char new_char; - char k_state, k_state_saved; - int sum; - int done; - int length; - int n, last_n; - int z = 0; - int len_lo, len_hi; - - /* initialize some protocol parameters */ - his_eol = END_CHAR; /* default end of line character */ - his_pad_count = 0; - his_pad_char = '\0'; - his_quote = K_ESCAPE; - - /* initialize the k_recv and k_data state machine */ - done = 0; - k_state = 0; - k_data_init (); - k_state_saved = k_state; - k_data_save (); - n = 0; /* just to get rid of a warning */ - last_n = -1; - - /* expect this "type" sequence (but don't check): - S: send initiate - F: file header - D: data (multiple) - Z: end of file - B: break transmission - */ - - /* enter main loop */ - while (!done) { - /* set the send packet pointer to begining of send packet parms */ - send_ptr = send_parms; - - /* With each packet, start summing the bytes starting with the length. - Save the current sequence number. - Note the type of the packet. - If a character less than SPACE (0x20) is received - error. - */ - -#if 0 - /* OLD CODE, Prior to checking sequence numbers */ - /* first have all state machines save current states */ - k_state_saved = k_state; - k_data_save (); -#endif - - /* get a packet */ - /* wait for the starting character or ^C */ - for (;;) { - switch (serial_getc ()) { - case START_CHAR: /* start packet */ - goto START; - case ETX_CHAR: /* ^C waiting for packet */ - return (0); - default: - ; - } - } -START: - /* get length of packet */ - sum = 0; - new_char = serial_getc (); - if ((new_char & 0xE0) == 0) - goto packet_error; - sum += new_char & 0xff; - length = untochar (new_char); - /* get sequence number */ - new_char = serial_getc (); - if ((new_char & 0xE0) == 0) - goto packet_error; - sum += new_char & 0xff; - n = untochar (new_char); - --length; - - /* NEW CODE - check sequence numbers for retried packets */ - /* Note - this new code assumes that the sequence number is correctly - * received. Handling an invalid sequence number adds another layer - * of complexity that may not be needed - yet! At this time, I'm hoping - * that I don't need to buffer the incoming data packets and can write - * the data into memory in real time. - */ - if (n == last_n) { - /* same sequence number, restore the previous state */ - k_state = k_state_saved; - k_data_restore (); - } else { - /* new sequence number, checkpoint the download */ - last_n = n; - k_state_saved = k_state; - k_data_save (); - } - /* END NEW CODE */ - - /* get packet type */ - new_char = serial_getc (); - if ((new_char & 0xE0) == 0) - goto packet_error; - sum += new_char & 0xff; - k_state = new_char; - --length; - /* check for extended length */ - if (length == -2) { - /* (length byte was 0, decremented twice) */ - /* get the two length bytes */ - new_char = serial_getc (); - if ((new_char & 0xE0) == 0) - goto packet_error; - sum += new_char & 0xff; - len_hi = untochar (new_char); - new_char = serial_getc (); - if ((new_char & 0xE0) == 0) - goto packet_error; - sum += new_char & 0xff; - len_lo = untochar (new_char); - length = len_hi * 95 + len_lo; - /* check header checksum */ - new_char = serial_getc (); - if ((new_char & 0xE0) == 0) - goto packet_error; - if (new_char != tochar ((sum + ((sum >> 6) & 0x03)) & 0x3f)) - goto packet_error; - sum += new_char & 0xff; -/* --length; */ /* new length includes only data and block check to come */ - } - /* bring in rest of packet */ - while (length > 1) { - new_char = serial_getc (); - if ((new_char & 0xE0) == 0) - goto packet_error; - sum += new_char & 0xff; - --length; - if (k_state == DATA_TYPE) { - /* pass on the data if this is a data packet */ - k_data_char (new_char); - } else if (k_state == SEND_TYPE) { - /* save send pack in buffer as is */ - *send_ptr++ = new_char; - /* if too much data, back off the pointer */ - if (send_ptr >= &send_parms[SEND_DATA_SIZE]) - --send_ptr; - } - } - /* get and validate checksum character */ - new_char = serial_getc (); - if ((new_char & 0xE0) == 0) - goto packet_error; - if (new_char != tochar ((sum + ((sum >> 6) & 0x03)) & 0x3f)) - goto packet_error; - /* get END_CHAR */ - new_char = serial_getc (); - if (new_char != END_CHAR) { - packet_error: - /* restore state machines */ - k_state = k_state_saved; - k_data_restore (); - /* send a negative acknowledge packet in */ - send_nack (n); - } else if (k_state == SEND_TYPE) { - /* crack the protocol parms, build an appropriate ack packet */ - handle_send_packet (n); - } else { - /* send simple acknowledge packet in */ - send_ack (n); - /* quit if end of transmission */ - if (k_state == BREAK_TYPE) - done = 1; - } - ++z; - } - return ((ulong) os_data_addr - (ulong) bin_start_address); -} -#endif /* CFG_CMD_LOADB */ -#if (CONFIG_COMMANDS & CFG_CMD_HWFLOW) -int do_hwflow (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -{ - extern int hwflow_onoff(int); - - if (argc == 2) { - if (strcmp(argv[1], "off") == 0) - hwflow_onoff(-1); - else - if (strcmp(argv[1], "on") == 0) - hwflow_onoff(1); - else - printf("Usage: %s\n", cmdtp->usage); - } - printf("RTS/CTS hardware flow control: %s\n", hwflow_onoff(0) ? "on" : "off"); - return 0; -} -#endif /* CFG_CMD_HWFLOW */ +cmd_tbl_t U_BOOT_CMD(RESET) = MK_CMD_ENTRY( + "reset", 1, 0, do_reset, + "reset - Perform RESET of the CPU\n", + NULL +); diff --git a/common/cmd_bootm.c b/common/cmd_bootm.c index 8af7c7c..7ade068 100644 --- a/common/cmd_bootm.c +++ b/common/cmd_bootm.c @@ -27,12 +27,15 @@ #include #include #include -#include #include #include #include #include #include + + /*cmd_boot.c*/ + extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + #if (CONFIG_COMMANDS & CFG_CMD_DATE) || defined(CONFIG_TIMESTAMP) #include #endif @@ -97,6 +100,10 @@ ulong *len_ptr, /* multi-file image length table */ int verify); /* getenv("verify")[0] != 'n' */ +#ifdef DEBUG +extern int do_bdinfo ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); +#endif + #ifdef CONFIG_PPC static boot_os_Fcn do_bootm_linux; #else @@ -192,7 +199,7 @@ read_dataflash(data, len, (char *)CFG_LOAD_ADDR); data = CFG_LOAD_ADDR; } -#endif +#endif if (verify) { printf (" Verifying Checksum ... "); @@ -214,7 +221,7 @@ #elif defined(__I386__) if (hdr->ih_arch != IH_CPU_I386) #elif defined(__mips__) - if (hdr->ih_arch != IH_CPU_MIPS) + if (hdr->ih_arch != IH_CPU_MIPS) #else # error Unknown CPU type #endif @@ -253,7 +260,7 @@ #ifdef CONFIG_AMIGAONEG3SE /* - * We've possible left the caches enabled during + * We've possible left the caches enabled during * bios emulation, so turn them off again */ icache_disable(); @@ -342,12 +349,12 @@ do_bootm_netbsd (cmdtp, flag, argc, argv, addr, len_ptr, verify); break; - + case IH_OS_RTEMS: do_bootm_rtems (cmdtp, flag, argc, argv, addr, len_ptr, verify); break; - + #if (CONFIG_COMMANDS & CFG_CMD_ELF) case IH_OS_VXWORKS: do_bootm_vxworks (cmdtp, flag, argc, argv, @@ -374,6 +381,14 @@ return 1; } +cmd_tbl_t U_BOOT_CMD(BOOTM) = MK_CMD_ENTRY( + "bootm", CFG_MAXARGS, 1, do_bootm, + "bootm - boot application image from memory\n", + "[addr [arg ...]]\n - boot application image stored in memory\n" + " passing arguments 'arg ...'; when booting a Linux kernel,\n" + " 'arg' can be the address of an initrd image\n" +); + #ifdef CONFIG_PPC static void do_bootm_linux (cmd_tbl_t *cmdtp, int flag, @@ -856,6 +871,13 @@ #endif return rcode; } + +cmd_tbl_t U_BOOT_CMD(BOOTD) = MK_CMD_ENTRY( + "bootd", 1, 1, do_bootd, + "bootd - boot default, i.e., run 'bootcmd'\n", + NULL +); + #endif #if (CONFIG_COMMANDS & CFG_CMD_IMI) @@ -916,6 +938,15 @@ printf ("OK\n"); return 0; } +cmd_tbl_t U_BOOT_CMD(IMINFO) = MK_CMD_ENTRY( + "iminfo", CFG_MAXARGS, 1, do_iminfo, + "iminfo - print header information for application image\n", + "addr [addr ...]\n" + " - print header information for application image starting at\n" + " address 'addr' in memory; this includes verification of the\n" + " image contents (magic number, header and payload checksums)\n" +); + #endif /* CFG_CMD_IMI */ void diff --git a/common/cmd_cache.c b/common/cmd_cache.c index f2015b3..0016b72 100644 --- a/common/cmd_cache.c +++ b/common/cmd_cache.c @@ -26,7 +26,6 @@ */ #include #include -#include #if (CONFIG_COMMANDS & CFG_CMD_CACHE) @@ -95,4 +94,19 @@ return (-1); } + +cmd_tbl_t U_BOOT_CMD(ICACHE) = MK_CMD_ENTRY( + "icache", 2, 1, do_icache, + "icache - enable or disable instruction cache\n", + "[on, off]\n" + " - enable or disable instruction cache\n" +); + +cmd_tbl_t U_BOOT_CMD(DCACHE) = MK_CMD_ENTRY( + "dcache", 2, 1, do_dcache, + "dcache - enable or disable data cache\n", + "[on, off]\n" + " - enable or disable data (writethrough) cache\n" +); + #endif /* CFG_CMD_CACHE */ diff --git a/common/cmd_console.c b/common/cmd_console.c index a5f792b..e6b001a 100644 --- a/common/cmd_console.c +++ b/common/cmd_console.c @@ -58,4 +58,14 @@ } return 0; } + + +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(CONINFO) = MK_CMD_ENTRY( + "coninfo", 3, 1, do_coninfo, + "coninfo - print console devices and informations\n", + "" +); + #endif /* CFG_CMD_CONSOLE */ diff --git a/common/cmd_date.c b/common/cmd_date.c index 2139ceb..6b75210 100644 --- a/common/cmd_date.c +++ b/common/cmd_date.c @@ -189,4 +189,15 @@ return (-1); } +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(DATE) = MK_CMD_ENTRY( + "date", 2, 1, do_date, + "date - get/set/reset date & time\n", + "[MMDDhhmm[[CC]YY][.ss]]\ndate reset\n" + " - without arguments: print date & time\n" + " - with numeric argument: set the system date & time\n" + " - with 'reset' argument: reset the RTC\n" +); + #endif /* CFG_CMD_DATE */ diff --git a/common/cmd_dcr.c b/common/cmd_dcr.c index 072685e..3ec11b0 100644 --- a/common/cmd_dcr.c +++ b/common/cmd_dcr.c @@ -28,7 +28,6 @@ #include #include #include -#include #if defined(CONFIG_4xx) && defined(CFG_CMD_SETGETDCR) @@ -41,10 +40,12 @@ unsigned short dcrn; /* Device Control Register Num */ unsigned long value; /* DCR's value */ + unsigned long get_dcr(unsigned short); + /* Validate arguments */ if (argc < 2) { - printf("Usage:\n%s\n", cmdtp->usage); - return 1; + printf("Usage:\n%s\n", cmdtp->usage); + return 1; } /* Get a DCR */ @@ -63,41 +64,57 @@ */ int do_setdcr ( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { + unsigned long get_dcr(unsigned short ); + unsigned long set_dcr(unsigned short , unsigned long ); unsigned short dcrn; /* Device Control Register Num */ - unsigned long value; /* DCR's value */ + unsigned long value; + /* DCR's value */ int nbytes; extern char console_buffer[]; /* Validate arguments */ if (argc < 2) { - printf("Usage:\n%s\n", cmdtp->usage); - return 1; + printf("Usage:\n%s\n", cmdtp->usage); + return 1; } /* Set a DCR */ dcrn = (unsigned short)simple_strtoul(argv[1], NULL, 16); do { - value = get_dcr(dcrn); - printf("%04x: %08lx", dcrn, value); - nbytes = readline(" ? "); - if (nbytes == 0) { - /* - * pressed as only input, don't modify current - * location and exit command. - */ - nbytes = 1; - return 0; - } else { - unsigned long i; - char *endp; - i = simple_strtoul(console_buffer, &endp, 16); - nbytes = endp - console_buffer; - if (nbytes) - set_dcr(dcrn, i); - } + value = get_dcr(dcrn); + printf("%04x: %08lx", dcrn, value); + nbytes = readline(" ? "); + if (nbytes == 0) { + /* + * pressed as only input, don't modify current + * location and exit command. + */ + nbytes = 1; + return 0; + } else { + unsigned long i; + char *endp; + i = simple_strtoul(console_buffer, &endp, 16); + nbytes = endp - console_buffer; + if (nbytes) + set_dcr(dcrn, i); + } } while (nbytes); return 0; } /* do_setdcr */ +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(GETDCR) = MK_CMD_ENTRY( + "getdcr", 2, 1, do_getdcr, + "getdcr - Get an IBM PPC 4xx DCR's value\n", + "dcrn - return a DCR's value.\n" +); +cmd_tbl_t U_BOOT_CMD(SETDCR) = MK_CMD_ENTRY( + "setdcr", 2, 1, do_setdcr, + "setdcr - Set an IBM PPC 4xx DCR's value\n", + "dcrn - set a DCR's value.\n" +); + #endif /* CONFIG_4xx & CFG_CMD_SETGETDCR */ diff --git a/common/cmd_diag.c b/common/cmd_diag.c index 31471ba..0bb6c7f 100644 --- a/common/cmd_diag.c +++ b/common/cmd_diag.c @@ -26,7 +26,6 @@ */ #include #include -#include #include #if (CONFIG_COMMANDS & CFG_CMD_DIAG) && defined(CONFIG_POST) @@ -65,5 +64,17 @@ return 0; } +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(DIAG) = MK_CMD_ENTRY( + "diag", CFG_MAXARGS, 0, do_diag, + "diag - perform board diagnostics\n", + " - print list of available tests\n" + "diag [test1 [test2]]\n" + " - print information about specified tests\n" + "diag run - run all available tests\n" + "diag run [test1 [test2]]\n" + " - run specified tests\n" +); #endif /* CFG_CMD_DIAG */ diff --git a/common/cmd_doc.c b/common/cmd_doc.c index 612a6d5..17c9d0d 100644 --- a/common/cmd_doc.c +++ b/common/cmd_doc.c @@ -80,7 +80,7 @@ printf ("Usage:\n%s\n", cmdtp->usage); return 1; case 2: - if (strcmp(argv[1],"info") == 0) { + if (strcmp(argv[1],"info") == 0) { int i; putc ('\n'); @@ -170,6 +170,17 @@ return rcode; } } +cmd_tbl_t U_BOOT_CMD(DOC) = MK_CMD_ENTRY( + "doc", 5, 1, do_doc, + "doc - Disk-On-Chip sub-system\n", + "info - show available DOC devices\n" + "doc device [dev] - show or set current device\n" + "doc read addr off size\n" + "doc write addr off size - read/write `size'" + " bytes starting at offset `off'\n" + " to/from memory address `addr'\n" + "doc erase off size - erase `size' bytes of DOC from offset `off'\n" +); int do_docboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { @@ -273,6 +284,12 @@ return rcode; } +cmd_tbl_t U_BOOT_CMD(DOCBOOT) = MK_CMD_ENTRY( + "docboot", 4, 1, do_docboot, + "docboot - boot from DOC device\n", + "loadAddr dev\n" +); + int doc_rw (struct DiskOnChip* this, int cmd, loff_t from, size_t len, size_t * retlen, u_char * buf) @@ -385,7 +402,7 @@ } #endif udelay(1); - } + } return 0; } @@ -938,7 +955,7 @@ /* Get physical parameters */ nftl->EraseSize = this->erasesize; - nftl->nb_blocks = this->totlen / this->erasesize; + nftl->nb_blocks = this->totlen / this->erasesize; nftl->mtd = this; if (find_boot_record(nftl) != 0) @@ -1054,18 +1071,18 @@ syndrome[i] = ReadDOC(docptr, ECCSyndrome0 + i); } - nb_errors = doc_decode_ecc(buf, syndrome); + nb_errors = doc_decode_ecc(buf, syndrome); #ifdef ECC_DEBUG printf("Errors corrected: %x\n", nb_errors); #endif - if (nb_errors < 0) { + if (nb_errors < 0) { /* We return error, but have actually done the read. Not that this can be told to user-space, via sys_read(), but at least MTD-aware stuff can know about it by checking *retlen */ printf("ECC Errors at %lx\n", (long)from); ret = DOC_EECC; - } + } } #ifdef PSYCHO_DEBUG @@ -1079,7 +1096,7 @@ } /* according to 11.4.1, we need to wait for the busy line - * drop if we read to the end of the page. */ + * drop if we read to the end of the page. */ if(0 == ((from + *retlen) & 0x1ff)) { DoC_WaitReady(this); @@ -1291,8 +1308,8 @@ *retlen = len; /* Reading the full OOB data drops us off of the end of the page, - * causing the flash device to go into busy mode, so we need - * to wait until ready 11.4.1 and Toshiba TC58256FT docs */ + * causing the flash device to go into busy mode, so we need + * to wait until ready 11.4.1 and Toshiba TC58256FT docs */ ret = DoC_WaitReady(this); diff --git a/common/cmd_dtt.c b/common/cmd_dtt.c index 943b0c7..447076c 100644 --- a/common/cmd_dtt.c +++ b/common/cmd_dtt.c @@ -24,7 +24,6 @@ #include #include #include -#include #if (CONFIG_COMMANDS & CFG_CMD_DTT) @@ -46,4 +45,12 @@ return 0; } /* do_dtt() */ +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(DTT) = MK_CMD_ENTRY( + "dtt", 1, 1, do_dtt, + "dtt - Digital Thermometer and Themostat\n", + " - Read temperature from digital thermometer and thermostat.\n" +); + #endif /* CONFIG_COMMANDS & CFG_CMD_DTT */ diff --git a/common/cmd_eeprom.c b/common/cmd_eeprom.c index 3db0bca..0a78319 100644 --- a/common/cmd_eeprom.c +++ b/common/cmd_eeprom.c @@ -371,3 +371,26 @@ /*----------------------------------------------------------------------- */ #endif /* CFG_CMD_EEPROM */ +/***************************************************/ + +#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) + +#ifdef CFG_I2C_MULTI_EEPROMS +cmd_tbl_t U_BOOT_CMD(EEPROM) = MK_CMD_ENTRY( + "eeprom", 6, 1, do_eeprom, + "eeprom - EEPROM sub-system\n", + "read devaddr addr off cnt\n" + "eeprom write devaddr addr off cnt\n" + " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'\n" +); +#else /* One EEPROM */ +cmd_tbl_t U_BOOT_CMD(EEPROM) = MK_CMD_ENTRY( + "eeprom", 5, 1, do_eeprom, + "eeprom - EEPROM sub-system\n", + "read addr off cnt\n" + "eeprom write addr off cnt\n" + " - read/write `cnt' bytes at EEPROM offset `off'\n" +); +#endif /* CFG_I2C_MULTI_EEPROMS */ + +#endif /* CFG_CMD_EEPROM */ diff --git a/common/cmd_elf.c b/common/cmd_elf.c index 7495762..c068c10 100644 --- a/common/cmd_elf.c +++ b/common/cmd_elf.c @@ -17,8 +17,6 @@ #include #include #include - -#include #include @@ -28,6 +26,8 @@ #define MAX(a,b) ((a) > (b) ? (a) : (b)) #endif +int valid_elf_image (unsigned long addr); +unsigned long load_elf_image (unsigned long addr); /* ====================================================================== * Interpreter command to boot an arbitrary ELF image from memory. @@ -136,11 +136,11 @@ printf ("## Ethernet MAC address not copied to NV RAM\n"); #endif - /* - * Use bootaddr to find the location in memory that VxWorks - * will look for the bootline string. The default value for - * PowerPC is LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET which - * defaults to 0x4200 + /* + * Use bootaddr to find the location in memory that VxWorks + * will look for the bootline string. The default value for + * PowerPC is LOCAL_MEM_LOCAL_ADRS + BOOT_LINE_OFFSET which + * defaults to 0x4200 */ if ((tmp = getenv ("bootaddr")) == NULL) @@ -148,10 +148,10 @@ else bootaddr = simple_strtoul (tmp, NULL, 16); - /* - * Check to see if the bootline is defined in the 'bootargs' - * parameter. If it is not defined, we may be able to - * construct the info + /* + * Check to see if the bootline is defined in the 'bootargs' + * parameter. If it is not defined, we may be able to + * construct the info */ if ((bootline = getenv ("bootargs")) != NULL) { @@ -194,10 +194,10 @@ flush_cache (bootaddr, MAX(strlen(build_buf), 255)); #else - /* - * I'm not sure what the device should be for other - * PPC flavors, the hostname and ipaddr should be ok - * to just copy + /* + * I'm not sure what the device should be for other + * PPC flavors, the hostname and ipaddr should be ok + * to just copy */ printf ("No bootargs defined\n"); @@ -205,10 +205,10 @@ #endif } - /* - * If the data at the load address is an elf image, then - * treat it like an elf image. Otherwise, assume that it is a - * binary image + /* + * If the data at the load address is an elf image, then + * treat it like an elf image. Otherwise, assume that it is a + * binary image */ if (valid_elf_image (addr)) { @@ -321,4 +321,16 @@ } /* ====================================================================== */ +cmd_tbl_t U_BOOT_CMD(BOOTELF) = MK_CMD_ENTRY( + "bootelf", 2, 0, do_bootelf, + "bootelf - Boot from an ELF image in memory\n", + " [address] - load address of ELF image.\n" +); + +cmd_tbl_t U_BOOT_CMD(BOOTVX) = MK_CMD_ENTRY( + "bootvx", 2, 0, do_bootvx, + "bootvx - Boot vxWorks from an ELF image\n", + " [address] - load address of vxWorks ELF image.\n" +); + #endif /* CFG_CMD_ELF */ diff --git a/common/cmd_fat.c b/common/cmd_fat.c index 4db70e1..12eb764 100644 --- a/common/cmd_fat.c +++ b/common/cmd_fat.c @@ -26,7 +26,6 @@ */ #include #include -#include #include #include #include diff --git a/common/cmd_fdc.c b/common/cmd_fdc.c index 3ee342f..3030750 100644 --- a/common/cmd_fdc.c +++ b/common/cmd_fdc.c @@ -47,9 +47,9 @@ #endif -#if (CONFIG_COMMANDS & CFG_CMD_DATE) -#include -#endif +/*#if (CONFIG_COMMANDS & CFG_CMD_DATE) */ +/*#include */ +/*#endif */ #if ((CONFIG_COMMANDS & CFG_CMD_FDC) || (CONFIG_COMMANDS & CFG_CMD_FDOS)) @@ -211,7 +211,7 @@ return TRUE; } #endif - + /* Supporting Functions */ /* reads a Register of the FDC */ unsigned char read_fdc_reg(unsigned int addr) @@ -220,14 +220,14 @@ (volatile unsigned char *)(CFG_ISA_IO_BASE_ADDRESS + (addr * CFG_ISA_IO_STRIDE) + CFG_ISA_IO_OFFSET); - + return val [0]; } /* writes a Register of the FDC */ void write_fdc_reg(unsigned int addr, unsigned char val) { - volatile unsigned char *tmp = + volatile unsigned char *tmp = (volatile unsigned char *)(CFG_ISA_IO_BASE_ADDRESS + (addr * CFG_ISA_IO_STRIDE) + CFG_ISA_IO_OFFSET); @@ -642,7 +642,6 @@ } - /************************************************************************** * int fdc_setup * setup the fdc according the datasheet @@ -658,7 +657,7 @@ #endif #ifdef CFG_FDC_HW_INIT - fdc_hw_init (); + fdc_hw_init (); #endif /* first, we reset the FDC via the DOR */ write_fdc_reg(FDC_DOR,0x00); @@ -716,14 +715,14 @@ /************************************************************************** * int fdc_fdos_init -* initialize the FDC layer -* +* initialize the FDC layer +* */ int fdc_fdos_init (int drive) { FD_GEO_STRUCT *pFG = (FD_GEO_STRUCT *)floppy_type; FDC_COMMAND_STRUCT *pCMD = &cmd; - + /* setup FDC and scan for drives */ if(fdc_setup(drive,pCMD,pFG)==FALSE) { printf("\n** Error in setup FDC **\n"); @@ -748,19 +747,19 @@ /* read first block */ pCMD->blnr=0; - return TRUE; + return TRUE; } /************************************************************************** * int fdc_fdos_seek -* parameter is a block number +* parameter is a block number */ int fdc_fdos_seek (int where) { FD_GEO_STRUCT *pFG = (FD_GEO_STRUCT *)floppy_type; FDC_COMMAND_STRUCT *pCMD = &cmd; - pCMD -> blnr = where ; - return (fdc_seek (pCMD, pFG)); + pCMD -> blnr = where ; + return (fdc_seek (pCMD, pFG)); } /************************************************************************** * int fdc_fdos_read @@ -771,7 +770,7 @@ FD_GEO_STRUCT *pFG = (FD_GEO_STRUCT *)floppy_type; FDC_COMMAND_STRUCT *pCMD = &cmd; - return (fdc_read_data (buffer, len, pCMD, pFG)); + return (fdc_read_data (buffer, len, pCMD, pFG)); } #endif /* (CONFIG_COMMANDS & CFG_CMD_FDOS) */ @@ -783,7 +782,7 @@ { FD_GEO_STRUCT *pFG = (FD_GEO_STRUCT *)floppy_type; FDC_COMMAND_STRUCT *pCMD = &cmd; - unsigned long addr,imsize; + unsigned long addr,imsize; image_header_t *hdr; /* used for fdc boot */ unsigned char boot_drive; int i,nrofblk; @@ -793,7 +792,7 @@ switch (argc) { case 1: addr = CFG_LOAD_ADDR; - boot_drive=CFG_FDC_DRIVE_NUMBER; + boot_drive=CFG_FDC_DRIVE_NUMBER; break; case 2: addr = simple_strtoul(argv[1], NULL, 16); @@ -881,7 +880,17 @@ } - #endif /* CONFIG_COMMANDS & CFG_CMD_FDC */ +/***************************************************/ + + +#if (CONFIG_COMMANDS & CFG_CMD_FDC) + +cmd_tbl_t U_BOOT_CMD(FDC) = MK_CMD_ENTRY( + "fdcboot", 3, 1, do_fdcboot, + "fdcboot - boot from floppy device\n", + "loadAddr drive\n" +); +#endif diff --git a/common/cmd_fdos.c b/common/cmd_fdos.c index 4b411b3..8257e70 100644 --- a/common/cmd_fdos.c +++ b/common/cmd_fdos.c @@ -34,7 +34,7 @@ #if (CONFIG_COMMANDS & CFG_CMD_FDOS) /*----------------------------------------------------------------------------- - * do_fdosboot -- + * do_fdosboot -- *----------------------------------------------------------------------------- */ int do_fdosboot(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) @@ -45,53 +45,53 @@ int rcode = 0; char buf [10]; int drive = CFG_FDC_DRIVE_NUMBER; - + /* pre-set load_addr */ if ((ep = getenv("loadaddr")) != NULL) { - load_addr = simple_strtoul(ep, NULL, 16); + load_addr = simple_strtoul(ep, NULL, 16); } /* pre-set Boot file name */ if ((name = getenv("bootfile")) == NULL) { - name = "uImage"; + name = "uImage"; } switch (argc) { case 1: - break; + break; case 2: /* only one arg - accept two forms: - * just load address, or just boot file name. - * The latter form must be written "filename" here. - */ - if (argv[1][0] == '"') { /* just boot filename */ - name = argv [1]; - } else { /* load address */ - load_addr = simple_strtoul(argv[1], NULL, 16); - } - break; + * just load address, or just boot file name. + * The latter form must be written "filename" here. + */ + if (argv[1][0] == '"') { /* just boot filename */ + name = argv [1]; + } else { /* load address */ + load_addr = simple_strtoul(argv[1], NULL, 16); + } + break; case 3: - load_addr = simple_strtoul(argv[1], NULL, 16); - name = argv [2]; - break; + load_addr = simple_strtoul(argv[1], NULL, 16); + name = argv [2]; + break; default: - printf ("Usage:\n%s\n", cmdtp->usage); - break; + printf ("Usage:\n%s\n", cmdtp->usage); + break; } /* Init physical layer */ if (!fdc_fdos_init (drive)) { - return (-1); + return (-1); } - + /* Open file */ if (dos_open (name) < 0) { - printf ("Unable to open %s\n", name); - return 1; + printf ("Unable to open %s\n", name); + return 1; } if ((size = dos_read (load_addr)) < 0) { - printf ("boot error\n"); - return 1; + printf ("boot error\n"); + return 1; } flush_cache (load_addr, size); @@ -99,47 +99,59 @@ setenv("filesize", buf); printf("Floppy DOS load complete: %d bytes loaded to 0x%lx\n", - size, load_addr); - + size, load_addr); + /* Check if we should attempt an auto-start */ if (((ep = getenv("autostart")) != NULL) && (strcmp(ep,"yes") == 0)) { - char *local_args[2]; - extern int do_bootm (cmd_tbl_t *, int, int, char *[]); - local_args[0] = argv[0]; - local_args[1] = NULL; - printf ("Automatic boot of image at addr 0x%08lX ...\n", load_addr); - rcode = do_bootm (cmdtp, 0, 1, local_args); + char *local_args[2]; + extern int do_bootm (cmd_tbl_t *, int, int, char *[]); + local_args[0] = argv[0]; + local_args[1] = NULL; + printf ("Automatic boot of image at addr 0x%08lX ...\n", load_addr); + rcode = do_bootm (cmdtp, 0, 1, local_args); } return rcode; } /*----------------------------------------------------------------------------- - * do_fdosls -- + * do_fdosls -- *----------------------------------------------------------------------------- */ int do_fdosls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { char *path = ""; int drive = CFG_FDC_DRIVE_NUMBER; - + switch (argc) { case 1: - break; + break; case 2: - path = argv [1]; - break; + path = argv [1]; + break; } /* Init physical layer */ if (!fdc_fdos_init (drive)) { - return (-1); + return (-1); } /* Open directory */ if (dos_open (path) < 0) { - printf ("Unable to open %s\n", path); - return 1; + printf ("Unable to open %s\n", path); + return 1; } return (dos_dir ()); } -#endif +cmd_tbl_t U_BOOT_CMD(FDOS_BOOT) = MK_CMD_ENTRY( + "fdosboot", 3, 0, do_fdosboot, + "fdosboot- boot from a dos floppy file\n", + "[loadAddr] [filename]\n" +); + +cmd_tbl_t U_BOOT_CMD(FDOS_LS) = MK_CMD_ENTRY( + "fdosls", 2, 0, do_fdosls, + "fdosls - list files in a directory\n", + "[directory]\n" +); + +#endif /* CONFIG_COMMANDS & CFG_CMD_FDOS */ diff --git a/common/cmd_flash.c b/common/cmd_flash.c index efc89dc..6914f59 100644 --- a/common/cmd_flash.c +++ b/common/cmd_flash.c @@ -26,8 +26,7 @@ */ #include #include -#include -#include + #ifdef CONFIG_HAS_DATAFLASH #include @@ -438,4 +437,41 @@ return rcode; } + +/**************************************************/ + +cmd_tbl_t U_BOOT_CMD(FLINFO) = MK_CMD_ENTRY( + "flinfo", 2, 1, do_flinfo, + "flinfo - print FLASH memory information\n", + "\n - print information for all FLASH memory banks\n" + "flinfo N\n - print information for FLASH memory bank # N\n" +); + +cmd_tbl_t U_BOOT_CMD(ERASE) = MK_CMD_ENTRY( + "erase", 3, 1, do_flerase, + "erase - erase FLASH memory\n", + "start end\n" + " - erase FLASH from addr 'start' to addr 'end'\n" + "erase N:SF[-SL]\n - erase sectors SF-SL in FLASH bank # N\n" + "erase bank N\n - erase FLASH bank # N\n" + "erase all\n - erase all FLASH banks\n" +); + +cmd_tbl_t U_BOOT_CMD(PROTECT) = MK_CMD_ENTRY( + "protect", 4, 1, do_protect, + "protect - enable or disable FLASH write protection\n", + "on start end\n" + " - protect FLASH from addr 'start' to addr 'end'\n" + "protect on N:SF[-SL]\n" + " - protect sectors SF-SL in FLASH bank # N\n" + "protect on bank N\n - protect FLASH bank # N\n" + "protect on all\n - protect all FLASH banks\n" + "protect off start end\n" + " - make FLASH from addr 'start' to addr 'end' writable\n" + "protect off N:SF[-SL]\n" + " - make sectors SF-SL writable in FLASH bank # N\n" + "protect off bank N\n - make FLASH bank # N writable\n" + "protect off all\n - make all FLASH banks writable\n" +); + #endif /* CFG_CMD_FLASH */ diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c index 4e4c4ab..f8ae52a 100644 --- a/common/cmd_fpga.c +++ b/common/cmd_fpga.c @@ -27,11 +27,11 @@ */ #include #include -#include -#include +#include #if (CONFIG_COMMANDS & CFG_CMD_NET) #include #endif +#include #if 0 #define FPGA_DEBUG @@ -155,4 +155,13 @@ return op; } +cmd_tbl_t U_BOOT_CMD(FPGA) = MK_CMD_ENTRY( + "fpga", 6, 1, do_fpga, + "fpga - loadable FPGA image support\n", + "fpga [operation type] [device number] [image address] [image size]\n" + "fpga operations:\n" + "\tinfo\tlist known device information.\n" + "\tload\tLoad device from memory buffer.\n" + "\tdump\tLoad device to memory buffer.\n" +); #endif /* CONFIG_FPGA && CONFIG_COMMANDS & CFG_CMD_FPGA */ diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c index fe5841e..203e803 100644 --- a/common/cmd_i2c.c +++ b/common/cmd_i2c.c @@ -83,7 +83,6 @@ #include #include -#include #include #include @@ -865,4 +864,61 @@ } #endif /* CFG_CMD_SDRAM */ + +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(IMD) = MK_CMD_ENTRY( + "imd", 4, 1, do_i2c_md, \ + "imd - i2c memory display\n", \ + "chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \ +); + +cmd_tbl_t U_BOOT_CMD(IMM) = MK_CMD_ENTRY( + "imm", 3, 1, do_i2c_mm, + "imm - i2c memory modify (auto-incrementing)\n", + "chip address[.0, .1, .2]\n" + " - memory modify, auto increment address\n" +); +cmd_tbl_t U_BOOT_CMD(INM) = MK_CMD_ENTRY( + "inm", 3, 1, do_i2c_nm, + "inm - memory modify (constant address)\n", + "chip address[.0, .1, .2]\n - memory modify, read and keep address\n" +); + +cmd_tbl_t U_BOOT_CMD(IMW) = MK_CMD_ENTRY( + "imw", 5, 1, do_i2c_mw, + "imw - memory write (fill)\n", + "chip address[.0, .1, .2] value [count]\n - memory write (fill)\n" +); + +cmd_tbl_t U_BOOT_CMD(ICRC) = MK_CMD_ENTRY( + "icrc32", 5, 1, do_i2c_crc, + "icrc32 - checksum calculation\n", + "chip address[.0, .1, .2] count\n - compute CRC32 checksum\n" +); + +cmd_tbl_t U_BOOT_CMD(IPROBE) = MK_CMD_ENTRY( + "iprobe", 1, 1, do_i2c_probe, + "iprobe - probe to discover valid I2C chip addresses\n", + "\n -discover valid I2C chip addresses\n" +); + +/* + * Require full name for "iloop" because it is an infinite loop! + */ +cmd_tbl_t U_BOOT_CMD(ILOOP) = MK_CMD_ENTRY( + "iloop", 5, 1, do_i2c_loop, + "iloop - infinite loop on address range\n", + "chip address[.0, .1, .2] [# of objects]\n" + " - loop, reading a set of addresses\n" +); + +#if (CONFIG_COMMANDS & CFG_CMD_SDRAM) +cmd_tbl_t U_BOOT_CMD(ISDRAM) = MK_CMD_ENTRY( + "isdram", 2, 1, do_sdram, + "isdram - print SDRAM configuration information\n", + "chip\n - print SDRAM configuration information\n" + " (valid chip values 50..57)\n" +); +#endif #endif /* CFG_CMD_I2C */ diff --git a/common/cmd_ide.c b/common/cmd_ide.c index f1b24be..c1e610a 100644 --- a/common/cmd_ide.c +++ b/common/cmd_ide.c @@ -39,7 +39,6 @@ #endif #include #include -#include #include #ifdef CONFIG_STATUS_LED # include @@ -798,7 +797,7 @@ { ushort *dbuf; volatile ushort *pbuf; - + pbuf = (ushort *)(ATA_CURR_BASE(dev)+ATA_DATA_REG); dbuf = (ushort *)sect_buf; while (words--) { @@ -828,8 +827,6 @@ #endif /* __PPC__ */ - - #ifdef __PPC__ static void output_data(int dev, ulong *sect_buf, int words) @@ -1381,7 +1378,6 @@ */ - #undef ATAPI_DEBUG #ifdef ATAPI_DEBUG @@ -1681,7 +1677,6 @@ } - static void atapi_inquiry(block_dev_desc_t * dev_desc) { unsigned char ccb[12]; /* Command descriptor block */ @@ -1816,4 +1811,23 @@ #endif /* CONFIG_ATAPI */ +cmd_tbl_t U_BOOT_CMD(IDE) = MK_CMD_ENTRY( + "ide", 5, 1, do_ide, + "ide - IDE sub-system\n", + "reset - reset IDE controller\n" + "ide info - show available IDE devices\n" + "ide device [dev] - show or set current device\n" + "ide part [dev] - print partition table of one or all IDE devices\n" + "ide read addr blk# cnt\n" + "ide write addr blk# cnt - read/write `cnt'" + " blocks starting at block `blk#'\n" + " to/from memory address `addr'\n" +); + +cmd_tbl_t U_BOOT_CMD(DISK) = MK_CMD_ENTRY( + "diskboot", 3, 1, do_diskboot, + "diskboot- boot from IDE device\n", + "loadAddr dev:part\n" +); + #endif /* CONFIG_COMMANDS & CFG_CMD_IDE */ diff --git a/common/cmd_immap.c b/common/cmd_immap.c index 3eb5895..fbb4a7d 100644 --- a/common/cmd_immap.c +++ b/common/cmd_immap.c @@ -27,7 +27,6 @@ #include #include -#include #if (CONFIG_COMMANDS & CFG_CMD_IMMAP) && \ (defined(CONFIG_8xx) || defined(CONFIG_8260)) @@ -592,4 +591,112 @@ unimplemented (cmdtp, flag, argc, argv); return 0; } + +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(SIUINFO) = MK_CMD_ENTRY( + "siuinfo", 1, 1, do_siuinfo, + "siuinfo - print System Interface Unit (SIU) registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(MEMCINFO) = MK_CMD_ENTRY( + "memcinfo", 1, 1, do_memcinfo, + "memcinfo- print Memory Controller registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(SITINFO) = MK_CMD_ENTRY( + "sitinfo", 1, 1, do_sitinfo, + "sitinfo - print System Integration Timers (SIT) registers\n", + NULL +); + +#ifdef CONFIG_8260 +cmd_tbl_t U_BOOT_CMD(ICINFO) = MK_CMD_ENTRY( + "icinfo", 1, 1, do_icinfo, + "icinfo - print Interrupt Controller registers\n", + NULL +); +#endif + +cmd_tbl_t U_BOOT_CMD(CARINFO) = MK_CMD_ENTRY( + "carinfo", 1, 1, do_carinfo, + "carinfo - print Clocks and Reset registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(IOPINFO) = MK_CMD_ENTRY( + "iopinfo", 1, 1, do_iopinfo, + "iopinfo - print I/O Port registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(IOPSET) = MK_CMD_ENTRY( + "iopset", 5, 0, do_iopset, + "iopset - set I/O Port registers\n", + "PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1" +); + +cmd_tbl_t U_BOOT_CMD(DMAINFO) = MK_CMD_ENTRY( + "dmainfo", 1, 1, do_dmainfo, + "dmainfo - print SDMA/IDMA registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(FCCINFO) = MK_CMD_ENTRY( + "fccinfo", 1, 1, do_fccinfo, + "fccinfo - print FCC registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(BRGINFO) = MK_CMD_ENTRY( + "brginfo", 1, 1, do_brginfo, + "brginfo - print Baud Rate Generator (BRG) registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(I2CINFO) = MK_CMD_ENTRY( + "i2cinfo", 1, 1, do_i2cinfo, + "i2cinfo - print I2C registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(SCCINFO) = MK_CMD_ENTRY( + "sccinfo", 1, 1, do_sccinfo, + "sccinfo - print SCC registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(SMCINFO) = MK_CMD_ENTRY( + "smcinfo", 1, 1, do_smcinfo, + "smcinfo - print SMC registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(SPIINFO) = MK_CMD_ENTRY( + "spiinfo", 1, 1, do_spiinfo, + "spiinfo - print Serial Peripheral Interface (SPI) registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(MUXINFO) = MK_CMD_ENTRY( + "muxinfo", 1, 1, do_muxinfo, + "muxinfo - print CPM Multiplexing registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(SIINFO) = MK_CMD_ENTRY( + "siinfo", 1, 1, do_siinfo, + "siinfo - print Serial Interface (SI) registers\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(MCCINFO) = MK_CMD_ENTRY( + "mccinfo", 1, 1, do_mccinfo, + "mccinfo - print MCC registers\n", + NULL +); + + #endif /* CFG_CMD_IMMAP && (CONFIG_8xx || CONFIG_8260) */ diff --git a/common/cmd_jffs2.c b/common/cmd_jffs2.c index 8df8061..e45a2ce 100644 --- a/common/cmd_jffs2.c +++ b/common/cmd_jffs2.c @@ -26,14 +26,11 @@ */ #include #include -#include -#include #include +#include #include #if (CONFIG_COMMANDS & CFG_CMD_JFFS2) - -#include static int part_num=0; #ifndef CFG_JFFS_CUSTOM_PART @@ -83,6 +80,9 @@ int do_jffs2_fsload(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { + struct part_info* jffs2_part_info(int); + int jffs2_1pass_load(char *, struct part_info *,const char *); + char *filename = "uImage"; ulong offset = CFG_LOAD_ADDR; int size; @@ -120,7 +120,10 @@ int do_jffs2_ls(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - char *filename = "/"; + struct part_info* jffs2_part_info(int); + int jffs2_1pass_ls(struct part_info *,char *); + + char *filename = "/"; int ret; struct part_info *part; @@ -140,6 +143,9 @@ int do_jffs2_fsinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { + struct part_info* jffs2_part_info(int); + int jffs2_1pass_info(struct part_info *); + int ret; struct part_info *part; @@ -157,8 +163,9 @@ do_jffs2_chpart(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { int tmp_part; + struct part_info* jffs2_part_info(int); - if (argc >= 2) { + if (argc >= 2) { tmp_part = simple_strtoul(argv[1], NULL, 16); }else{ printf("Need partition number in argument list\n"); @@ -176,4 +183,34 @@ return 0; } + +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(JFFS2_FSLOAD) = MK_CMD_ENTRY( + "fsload", 3, 0, do_jffs2_fsload, + "fsload - load binary file from a filesystem image\n", + "[ off ] [ filename ]\n" + " - load binary file from flash bank\n" + " with offset 'off'\n" +); + +cmd_tbl_t U_BOOT_CMD(JFFS2_FSINFO) = MK_CMD_ENTRY( + "fsinfo", 1, 1, do_jffs2_fsinfo, + "fsinfo - print information about filesystems\n", + " - print information about filesystems\n" +); + +cmd_tbl_t U_BOOT_CMD(JFFS2_LS) = MK_CMD_ENTRY( + "ls", 2, 1, do_jffs2_ls, + "ls - list files in a directory (default /)\n", + "[ directory ]\n" + " - list files in a directory.\n" +); + +cmd_tbl_t U_BOOT_CMD(JFFS2_CHPART) = MK_CMD_ENTRY( + "chpart", 2, 0, do_jffs2_chpart, + "chpart - change active partition\n", + " - change active partition\n" +); + #endif /* CFG_CMD_JFFS2 */ diff --git a/common/cmd_load.c b/common/cmd_load.c new file mode 100644 index 0000000..d784e83 --- /dev/null +++ b/common/cmd_load.c @@ -0,0 +1,1057 @@ +/* + * (C) Copyright 2000-2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * Serial up- and download support + */ +#include +#include +#include +#include +#include +#include + + +#if (CONFIG_COMMANDS & CFG_CMD_LOADS) +static ulong load_serial (ulong offset); +static int read_record (char *buf, ulong len); +# if (CONFIG_COMMANDS & CFG_CMD_SAVES) +static int save_serial (ulong offset, ulong size); +static int write_record (char *buf); +# endif /* CFG_CMD_SAVES */ + +static int do_echo = 1; +#endif /* CFG_CMD_LOADS */ + +/* -------------------------------------------------------------------- */ + +#if (CONFIG_COMMANDS & CFG_CMD_LOADS) +int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + ulong offset = 0; + ulong addr; + int i; + char *env_echo; + int rcode = 0; +#ifdef CFG_LOADS_BAUD_CHANGE + DECLARE_GLOBAL_DATA_PTR; + int load_baudrate, current_baudrate; + + load_baudrate = current_baudrate = gd->baudrate; +#endif + + if (((env_echo = getenv("loads_echo")) != NULL) && (*env_echo == '1')) { + do_echo = 1; + } else { + do_echo = 0; + } + +#ifdef CFG_LOADS_BAUD_CHANGE + if (argc >= 2) { + offset = simple_strtoul(argv[1], NULL, 16); + } + if (argc == 3) { + load_baudrate = (int)simple_strtoul(argv[2], NULL, 10); + + /* default to current baudrate */ + if (load_baudrate == 0) + load_baudrate = current_baudrate; + } + if (load_baudrate != current_baudrate) { + printf ("## Switch baudrate to %d bps and press ENTER ...\n", + load_baudrate); + udelay(50000); + gd->baudrate = load_baudrate; + serial_setbrg (); + udelay(50000); + for (;;) { + if (getc() == '\r') + break; + } + } +#else /* ! CFG_LOADS_BAUD_CHANGE */ + if (argc == 2) { + offset = simple_strtoul(argv[1], NULL, 16); + } +#endif /* CFG_LOADS_BAUD_CHANGE */ + + printf ("## Ready for S-Record download ...\n"); + + addr = load_serial (offset); + + /* + * Gather any trailing characters (for instance, the ^D which + * is sent by 'cu' after sending a file), and give the + * box some time (100 * 1 ms) + */ + for (i=0; i<100; ++i) { + if (serial_tstc()) { + (void) serial_getc(); + } + udelay(1000); + } + + if (addr == ~0) { + printf ("## S-Record download aborted\n"); + rcode = 1; + } else { + printf ("## Start Addr = 0x%08lX\n", addr); + load_addr = addr; + } + +#ifdef CFG_LOADS_BAUD_CHANGE + if (load_baudrate != current_baudrate) { + printf ("## Switch baudrate to %d bps and press ESC ...\n", + current_baudrate); + udelay (50000); + gd->baudrate = current_baudrate; + serial_setbrg (); + udelay (50000); + for (;;) { + if (getc() == 0x1B) /* ESC */ + break; + } + } +#endif + return rcode; +} + +static ulong +load_serial (ulong offset) +{ + char record[SREC_MAXRECLEN + 1]; /* buffer for one S-Record */ + char binbuf[SREC_MAXBINLEN]; /* buffer for binary data */ + int binlen; /* no. of data bytes in S-Rec. */ + int type; /* return code for record type */ + ulong addr; /* load address from S-Record */ + ulong size; /* number of bytes transferred */ + char buf[32]; + ulong store_addr; + ulong start_addr = ~0; + ulong end_addr = 0; + int line_count = 0; + + while (read_record(record, SREC_MAXRECLEN + 1) >= 0) { + type = srec_decode (record, &binlen, &addr, binbuf); + + if (type < 0) { + return (~0); /* Invalid S-Record */ + } + + switch (type) { + case SREC_DATA2: + case SREC_DATA3: + case SREC_DATA4: + store_addr = addr + offset; +#ifndef CFG_NO_FLASH + if (addr2info(store_addr)) { + int rc; + + rc = flash_write((uchar *)binbuf,store_addr,binlen); + if (rc != 0) { + flash_perror (rc); + return (~0); + } + } else +#endif + { + memcpy ((char *)(store_addr), binbuf, binlen); + } + if ((store_addr) < start_addr) + start_addr = store_addr; + if ((store_addr + binlen - 1) > end_addr) + end_addr = store_addr + binlen - 1; + break; + case SREC_END2: + case SREC_END3: + case SREC_END4: + udelay (10000); + size = end_addr - start_addr + 1; + printf ("\n" + "## First Load Addr = 0x%08lX\n" + "## Last Load Addr = 0x%08lX\n" + "## Total Size = 0x%08lX = %ld Bytes\n", + start_addr, end_addr, size, size + ); + flush_cache (addr, size); + sprintf(buf, "%lX", size); + setenv("filesize", buf); + return (addr); + case SREC_START: + break; + default: + break; + } + if (!do_echo) { /* print a '.' every 100 lines */ + if ((++line_count % 100) == 0) + putc ('.'); + } + } + + return (~0); /* Download aborted */ +} + +static int +read_record (char *buf, ulong len) +{ + char *p; + char c; + + --len; /* always leave room for terminating '\0' byte */ + + for (p=buf; p < buf+len; ++p) { + c = serial_getc(); /* read character */ + if (do_echo) + serial_putc (c); /* ... and echo it */ + + switch (c) { + case '\r': + case '\n': + *p = '\0'; + return (p - buf); + case '\0': + case 0x03: /* ^C - Control C */ + return (-1); + default: + *p = c; + } + + /* Check for the console hangup (if any different from serial) */ +#ifdef CONFIG_PPC /* we don't have syscall_tbl anywhere else */ + if (syscall_tbl[SYSCALL_GETC] != serial_getc) { + if (ctrlc()) { + return (-1); + } + } +#endif + } + + /* line too long - truncate */ + *p = '\0'; + return (p - buf); +} + +#if (CONFIG_COMMANDS & CFG_CMD_SAVES) + +int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + ulong offset = 0; + ulong size = 0; +#ifdef CFG_LOADS_BAUD_CHANGE + DECLARE_GLOBAL_DATA_PTR; + int save_baudrate, current_baudrate; + + save_baudrate = current_baudrate = gd->baudrate; +#endif + + if (argc >= 2) { + offset = simple_strtoul(argv[1], NULL, 16); + } +#ifdef CFG_LOADS_BAUD_CHANGE + if (argc >= 3) { + size = simple_strtoul(argv[2], NULL, 16); + } + if (argc == 4) { + save_baudrate = (int)simple_strtoul(argv[3], NULL, 10); + + /* default to current baudrate */ + if (save_baudrate == 0) + save_baudrate = current_baudrate; + } + if (save_baudrate != current_baudrate) { + printf ("## Switch baudrate to %d bps and press ENTER ...\n", + save_baudrate); + udelay(50000); + gd->baudrate = save_baudrate; + serial_setbrg (); + udelay(50000); + for (;;) { + if (getc() == '\r') + break; + } + } +#else /* ! CFG_LOADS_BAUD_CHANGE */ + if (argc == 3) { + size = simple_strtoul(argv[2], NULL, 16); + } +#endif /* CFG_LOADS_BAUD_CHANGE */ + + printf ("## Ready for S-Record upload, press ENTER to proceed ...\n"); + for (;;) { + if (getc() == '\r') + break; + } + if(save_serial (offset, size)) { + printf ("## S-Record upload aborted\n"); + } else { + printf ("## S-Record upload complete\n"); + } +#ifdef CFG_LOADS_BAUD_CHANGE + if (save_baudrate != current_baudrate) { + printf ("## Switch baudrate to %d bps and press ESC ...\n", + (int)current_baudrate); + udelay (50000); + gd->baudrate = current_baudrate; + serial_setbrg (); + udelay (50000); + for (;;) { + if (getc() == 0x1B) /* ESC */ + break; + } + } +#endif + return 0; +} + +#define SREC3_START "S0030000FC\n" +#define SREC3_FORMAT "S3%02X%08lX%s%02X\n" +#define SREC3_END "S70500000000FA\n" +#define SREC_BYTES_PER_RECORD 16 + +static int save_serial (ulong address, ulong count) +{ + int i, c, reclen, checksum, length; + char *hex = "0123456789ABCDEF"; + char record[2*SREC_BYTES_PER_RECORD+16]; /* buffer for one S-Record */ + char data[2*SREC_BYTES_PER_RECORD+1]; /* buffer for hex data */ + + reclen = 0; + checksum = 0; + + if(write_record(SREC3_START)) /* write the header */ + return (-1); + do { + if(count) { /* collect hex data in the buffer */ + c = *(volatile uchar*)(address + reclen); /* get one byte */ + checksum += c; /* accumulate checksum */ + data[2*reclen] = hex[(c>>4)&0x0f]; + data[2*reclen+1] = hex[c & 0x0f]; + data[2*reclen+2] = '\0'; + ++reclen; + --count; + } + if(reclen == SREC_BYTES_PER_RECORD || count == 0) { + /* enough data collected for one record: dump it */ + if(reclen) { /* build & write a data record: */ + /* address + data + checksum */ + length = 4 + reclen + 1; + + /* accumulate length bytes into checksum */ + for(i = 0; i < 2; i++) + checksum += (length >> (8*i)) & 0xff; + + /* accumulate address bytes into checksum: */ + for(i = 0; i < 4; i++) + checksum += (address >> (8*i)) & 0xff; + + /* make proper checksum byte: */ + checksum = ~checksum & 0xff; + + /* output one record: */ + sprintf(record, SREC3_FORMAT, length, address, data, checksum); + if(write_record(record)) + return (-1); + } + address += reclen; /* increment address */ + checksum = 0; + reclen = 0; + } + } + while(count); + if(write_record(SREC3_END)) /* write the final record */ + return (-1); + return(0); +} + +static int +write_record (char *buf) +{ + char c; + + while((c = *buf++)) + serial_putc(c); + + /* Check for the console hangup (if any different from serial) */ + + if (ctrlc()) { + return (-1); + } + return (0); +} +# endif /* CFG_CMD_SAVES */ + +#endif /* CFG_CMD_LOADS */ + + +#if (CONFIG_COMMANDS & CFG_CMD_LOADB) /* loadb command (load binary) included */ + +#define XON_CHAR 17 +#define XOFF_CHAR 19 +#define START_CHAR 0x01 +#define ETX_CHAR 0x03 +#define END_CHAR 0x0D +#define SPACE 0x20 +#define K_ESCAPE 0x23 +#define SEND_TYPE 'S' +#define DATA_TYPE 'D' +#define ACK_TYPE 'Y' +#define NACK_TYPE 'N' +#define BREAK_TYPE 'B' +#define tochar(x) ((char) (((x) + SPACE) & 0xff)) +#define untochar(x) ((int) (((x) - SPACE) & 0xff)) + +extern int os_data_count; +extern int os_data_header[8]; + +static void set_kerm_bin_mode(unsigned long *); +static int k_recv(void); +static ulong load_serial_bin (ulong offset); + + +char his_eol; /* character he needs at end of packet */ +int his_pad_count; /* number of pad chars he needs */ +char his_pad_char; /* pad chars he needs */ +char his_quote; /* quote chars he'll use */ + +int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + DECLARE_GLOBAL_DATA_PTR; + + ulong offset = 0; + ulong addr; + int load_baudrate, current_baudrate; + int rcode = 0; + char *s; + + /* pre-set offset from CFG_LOAD_ADDR */ + offset = CFG_LOAD_ADDR; + + /* pre-set offset from $loadaddr */ + if ((s = getenv("loadaddr")) != NULL) { + offset = simple_strtoul(s, NULL, 16); + } + + load_baudrate = current_baudrate = gd->baudrate; + + if (argc >= 2) { + offset = simple_strtoul(argv[1], NULL, 16); + } + if (argc == 3) { + load_baudrate = (int)simple_strtoul(argv[2], NULL, 10); + + /* default to current baudrate */ + if (load_baudrate == 0) + load_baudrate = current_baudrate; + } + + if (load_baudrate != current_baudrate) { + printf ("## Switch baudrate to %d bps and press ENTER ...\n", + load_baudrate); + udelay(50000); + gd->baudrate = load_baudrate; + serial_setbrg (); + udelay(50000); + for (;;) { + if (getc() == '\r') + break; + } + } + + printf ("## Ready for binary (kermit) download " + "to 0x%08lX at %d bps...\n", + offset, + current_baudrate); + addr = load_serial_bin (offset); + + if (addr == ~0) { + load_addr = 0; + printf ("## Binary (kermit) download aborted\n"); + rcode = 1; + } else { + printf ("## Start Addr = 0x%08lX\n", addr); + load_addr = addr; + } + + if (load_baudrate != current_baudrate) { + printf ("## Switch baudrate to %d bps and press ESC ...\n", + current_baudrate); + udelay (50000); + gd->baudrate = current_baudrate; + serial_setbrg (); + udelay (50000); + for (;;) { + if (getc() == 0x1B) /* ESC */ + break; + } + } + +#ifdef CONFIG_AUTOSCRIPT + if (load_addr) { + char *s; + + if (((s = getenv("autoscript")) != NULL) && (strcmp(s,"yes") == 0)) { + printf("Running autoscript at addr 0x%08lX ...\n", load_addr); + rcode = autoscript (load_addr); + } + } +#endif + return rcode; +} + + +static ulong load_serial_bin (ulong offset) +{ + int size, i; + char buf[32]; + + set_kerm_bin_mode ((ulong *) offset); + size = k_recv (); + + /* + * Gather any trailing characters (for instance, the ^D which + * is sent by 'cu' after sending a file), and give the + * box some time (100 * 1 ms) + */ + for (i=0; i<100; ++i) { + if (serial_tstc()) { + (void) serial_getc(); + } + udelay(1000); + } + + flush_cache (offset, size); + + printf("## Total Size = 0x%08x = %d Bytes\n", size, size); + sprintf(buf, "%X", size); + setenv("filesize", buf); + + return offset; +} + +void send_pad (void) +{ + int count = his_pad_count; + + while (count-- > 0) + serial_putc (his_pad_char); +} + +/* converts escaped kermit char to binary char */ +char ktrans (char in) +{ + if ((in & 0x60) == 0x40) { + return (char) (in & ~0x40); + } else if ((in & 0x7f) == 0x3f) { + return (char) (in | 0x40); + } else + return in; +} + +int chk1 (char *buffer) +{ + int total = 0; + + while (*buffer) { + total += *buffer++; + } + return (int) ((total + ((total >> 6) & 0x03)) & 0x3f); +} + +void s1_sendpacket (char *packet) +{ + send_pad (); + while (*packet) { + serial_putc (*packet++); + } +} + +static char a_b[24]; +void send_ack (int n) +{ + a_b[0] = START_CHAR; + a_b[1] = tochar (3); + a_b[2] = tochar (n); + a_b[3] = ACK_TYPE; + a_b[4] = '\0'; + a_b[4] = tochar (chk1 (&a_b[1])); + a_b[5] = his_eol; + a_b[6] = '\0'; + s1_sendpacket (a_b); +} + +void send_nack (int n) +{ + a_b[0] = START_CHAR; + a_b[1] = tochar (3); + a_b[2] = tochar (n); + a_b[3] = NACK_TYPE; + a_b[4] = '\0'; + a_b[4] = tochar (chk1 (&a_b[1])); + a_b[5] = his_eol; + a_b[6] = '\0'; + s1_sendpacket (a_b); +} + + +/* os_data_* takes an OS Open image and puts it into memory, and + puts the boot header in an array named os_data_header + + if image is binary, no header is stored in os_data_header. +*/ +void (*os_data_init) (void); +void (*os_data_char) (char new_char); +static int os_data_state, os_data_state_saved; +int os_data_count; +static int os_data_count_saved; +static char *os_data_addr, *os_data_addr_saved; +static char *bin_start_address; +int os_data_header[8]; +static void bin_data_init (void) +{ + os_data_state = 0; + os_data_count = 0; + os_data_addr = bin_start_address; +} +static void os_data_save (void) +{ + os_data_state_saved = os_data_state; + os_data_count_saved = os_data_count; + os_data_addr_saved = os_data_addr; +} +static void os_data_restore (void) +{ + os_data_state = os_data_state_saved; + os_data_count = os_data_count_saved; + os_data_addr = os_data_addr_saved; +} +static void bin_data_char (char new_char) +{ + switch (os_data_state) { + case 0: /* data */ + *os_data_addr++ = new_char; + --os_data_count; + break; + } +} +static void set_kerm_bin_mode (unsigned long *addr) +{ + bin_start_address = (char *) addr; + os_data_init = bin_data_init; + os_data_char = bin_data_char; +} + + +/* k_data_* simply handles the kermit escape translations */ +static int k_data_escape, k_data_escape_saved; +void k_data_init (void) +{ + k_data_escape = 0; + os_data_init (); +} +void k_data_save (void) +{ + k_data_escape_saved = k_data_escape; + os_data_save (); +} +void k_data_restore (void) +{ + k_data_escape = k_data_escape_saved; + os_data_restore (); +} +void k_data_char (char new_char) +{ + if (k_data_escape) { + /* last char was escape - translate this character */ + os_data_char (ktrans (new_char)); + k_data_escape = 0; + } else { + if (new_char == his_quote) { + /* this char is escape - remember */ + k_data_escape = 1; + } else { + /* otherwise send this char as-is */ + os_data_char (new_char); + } + } +} + +#define SEND_DATA_SIZE 20 +char send_parms[SEND_DATA_SIZE]; +char *send_ptr; + +/* handle_send_packet interprits the protocol info and builds and + sends an appropriate ack for what we can do */ +void handle_send_packet (int n) +{ + int length = 3; + int bytes; + + /* initialize some protocol parameters */ + his_eol = END_CHAR; /* default end of line character */ + his_pad_count = 0; + his_pad_char = '\0'; + his_quote = K_ESCAPE; + + /* ignore last character if it filled the buffer */ + if (send_ptr == &send_parms[SEND_DATA_SIZE - 1]) + --send_ptr; + bytes = send_ptr - send_parms; /* how many bytes we'll process */ + do { + if (bytes-- <= 0) + break; + /* handle MAXL - max length */ + /* ignore what he says - most I'll take (here) is 94 */ + a_b[++length] = tochar (94); + if (bytes-- <= 0) + break; + /* handle TIME - time you should wait for my packets */ + /* ignore what he says - don't wait for my ack longer than 1 second */ + a_b[++length] = tochar (1); + if (bytes-- <= 0) + break; + /* handle NPAD - number of pad chars I need */ + /* remember what he says - I need none */ + his_pad_count = untochar (send_parms[2]); + a_b[++length] = tochar (0); + if (bytes-- <= 0) + break; + /* handle PADC - pad chars I need */ + /* remember what he says - I need none */ + his_pad_char = ktrans (send_parms[3]); + a_b[++length] = 0x40; /* He should ignore this */ + if (bytes-- <= 0) + break; + /* handle EOL - end of line he needs */ + /* remember what he says - I need CR */ + his_eol = untochar (send_parms[4]); + a_b[++length] = tochar (END_CHAR); + if (bytes-- <= 0) + break; + /* handle QCTL - quote control char he'll use */ + /* remember what he says - I'll use '#' */ + his_quote = send_parms[5]; + a_b[++length] = '#'; + if (bytes-- <= 0) + break; + /* handle QBIN - 8-th bit prefixing */ + /* ignore what he says - I refuse */ + a_b[++length] = 'N'; + if (bytes-- <= 0) + break; + /* handle CHKT - the clock check type */ + /* ignore what he says - I do type 1 (for now) */ + a_b[++length] = '1'; + if (bytes-- <= 0) + break; + /* handle REPT - the repeat prefix */ + /* ignore what he says - I refuse (for now) */ + a_b[++length] = 'N'; + if (bytes-- <= 0) + break; + /* handle CAPAS - the capabilities mask */ + /* ignore what he says - I only do long packets - I don't do windows */ + a_b[++length] = tochar (2); /* only long packets */ + a_b[++length] = tochar (0); /* no windows */ + a_b[++length] = tochar (94); /* large packet msb */ + a_b[++length] = tochar (94); /* large packet lsb */ + } while (0); + + a_b[0] = START_CHAR; + a_b[1] = tochar (length); + a_b[2] = tochar (n); + a_b[3] = ACK_TYPE; + a_b[++length] = '\0'; + a_b[length] = tochar (chk1 (&a_b[1])); + a_b[++length] = his_eol; + a_b[++length] = '\0'; + s1_sendpacket (a_b); +} + +/* k_recv receives a OS Open image file over kermit line */ +static int k_recv (void) +{ + char new_char; + char k_state, k_state_saved; + int sum; + int done; + int length; + int n, last_n; + int z = 0; + int len_lo, len_hi; + + /* initialize some protocol parameters */ + his_eol = END_CHAR; /* default end of line character */ + his_pad_count = 0; + his_pad_char = '\0'; + his_quote = K_ESCAPE; + + /* initialize the k_recv and k_data state machine */ + done = 0; + k_state = 0; + k_data_init (); + k_state_saved = k_state; + k_data_save (); + n = 0; /* just to get rid of a warning */ + last_n = -1; + + /* expect this "type" sequence (but don't check): + S: send initiate + F: file header + D: data (multiple) + Z: end of file + B: break transmission + */ + + /* enter main loop */ + while (!done) { + /* set the send packet pointer to begining of send packet parms */ + send_ptr = send_parms; + + /* With each packet, start summing the bytes starting with the length. + Save the current sequence number. + Note the type of the packet. + If a character less than SPACE (0x20) is received - error. + */ + +#if 0 + /* OLD CODE, Prior to checking sequence numbers */ + /* first have all state machines save current states */ + k_state_saved = k_state; + k_data_save (); +#endif + + /* get a packet */ + /* wait for the starting character or ^C */ + for (;;) { + switch (serial_getc ()) { + case START_CHAR: /* start packet */ + goto START; + case ETX_CHAR: /* ^C waiting for packet */ + return (0); + default: + ; + } + } +START: + /* get length of packet */ + sum = 0; + new_char = serial_getc (); + if ((new_char & 0xE0) == 0) + goto packet_error; + sum += new_char & 0xff; + length = untochar (new_char); + /* get sequence number */ + new_char = serial_getc (); + if ((new_char & 0xE0) == 0) + goto packet_error; + sum += new_char & 0xff; + n = untochar (new_char); + --length; + + /* NEW CODE - check sequence numbers for retried packets */ + /* Note - this new code assumes that the sequence number is correctly + * received. Handling an invalid sequence number adds another layer + * of complexity that may not be needed - yet! At this time, I'm hoping + * that I don't need to buffer the incoming data packets and can write + * the data into memory in real time. + */ + if (n == last_n) { + /* same sequence number, restore the previous state */ + k_state = k_state_saved; + k_data_restore (); + } else { + /* new sequence number, checkpoint the download */ + last_n = n; + k_state_saved = k_state; + k_data_save (); + } + /* END NEW CODE */ + + /* get packet type */ + new_char = serial_getc (); + if ((new_char & 0xE0) == 0) + goto packet_error; + sum += new_char & 0xff; + k_state = new_char; + --length; + /* check for extended length */ + if (length == -2) { + /* (length byte was 0, decremented twice) */ + /* get the two length bytes */ + new_char = serial_getc (); + if ((new_char & 0xE0) == 0) + goto packet_error; + sum += new_char & 0xff; + len_hi = untochar (new_char); + new_char = serial_getc (); + if ((new_char & 0xE0) == 0) + goto packet_error; + sum += new_char & 0xff; + len_lo = untochar (new_char); + length = len_hi * 95 + len_lo; + /* check header checksum */ + new_char = serial_getc (); + if ((new_char & 0xE0) == 0) + goto packet_error; + if (new_char != tochar ((sum + ((sum >> 6) & 0x03)) & 0x3f)) + goto packet_error; + sum += new_char & 0xff; +/* --length; */ /* new length includes only data and block check to come */ + } + /* bring in rest of packet */ + while (length > 1) { + new_char = serial_getc (); + if ((new_char & 0xE0) == 0) + goto packet_error; + sum += new_char & 0xff; + --length; + if (k_state == DATA_TYPE) { + /* pass on the data if this is a data packet */ + k_data_char (new_char); + } else if (k_state == SEND_TYPE) { + /* save send pack in buffer as is */ + *send_ptr++ = new_char; + /* if too much data, back off the pointer */ + if (send_ptr >= &send_parms[SEND_DATA_SIZE]) + --send_ptr; + } + } + /* get and validate checksum character */ + new_char = serial_getc (); + if ((new_char & 0xE0) == 0) + goto packet_error; + if (new_char != tochar ((sum + ((sum >> 6) & 0x03)) & 0x3f)) + goto packet_error; + /* get END_CHAR */ + new_char = serial_getc (); + if (new_char != END_CHAR) { + packet_error: + /* restore state machines */ + k_state = k_state_saved; + k_data_restore (); + /* send a negative acknowledge packet in */ + send_nack (n); + } else if (k_state == SEND_TYPE) { + /* crack the protocol parms, build an appropriate ack packet */ + handle_send_packet (n); + } else { + /* send simple acknowledge packet in */ + send_ack (n); + /* quit if end of transmission */ + if (k_state == BREAK_TYPE) + done = 1; + } + ++z; + } + return ((ulong) os_data_addr - (ulong) bin_start_address); +} +#endif /* CFG_CMD_LOADB */ + +/* -------------------------------------------------------------------- */ + +#if (CONFIG_COMMANDS & CFG_CMD_LOADS) + +#ifdef CFG_LOADS_BAUD_CHANGE +cmd_tbl_t U_BOOT_CMD(LOADS) = MK_CMD_ENTRY( + "loads", 3, 0, do_load_serial, + "loads - load S-Record file over serial line\n", + "[ off ] [ baud ]\n" + " - load S-Record file over serial line" + " with offset 'off' and baudrate 'baud'\n" +); + +#else /* ! CFG_LOADS_BAUD_CHANGE */ +cmd_tbl_t U_BOOT_CMD(LOADS) = MK_CMD_ENTRY( + "loads", 2, 0, do_load_serial, + "loads - load S-Record file over serial line\n", + "[ off ]\n" + " - load S-Record file over serial line with offset 'off'\n" +); +#endif /* CFG_LOADS_BAUD_CHANGE */ + +/* + * SAVES always requires LOADS support, but not vice versa + */ + + +#if (CONFIG_COMMANDS & CFG_CMD_SAVES) +#ifdef CFG_LOADS_BAUD_CHANGE +cmd_tbl_t U_BOOT_CMD(SAVES) = MK_CMD_ENTRY( + "saves", 4, 0, do_save_serial, + "saves - save S-Record file over serial line\n", + "[ off ] [size] [ baud ]\n" + " - save S-Record file over serial line" + " with offset 'off', size 'size' and baudrate 'baud'\n" +); +#else /* ! CFG_LOADS_BAUD_CHANGE */ +cmd_tbl_t U_BOOT_CMD(SAVES) = MK_CMD_ENTRY( + "saves", 3, 0, do_save_serial, + "saves - save S-Record file over serial line\n", + "[ off ] [size]\n" + " - save S-Record file over serial line with offset 'off' and size 'size'\n" +); +#endif /* CFG_LOADS_BAUD_CHANGE */ +#endif /* CFG_CMD_SAVES */ +#endif /* CFG_CMD_LOADS */ + + +#if (CONFIG_COMMANDS & CFG_CMD_LOADB) +cmd_tbl_t U_BOOT_CMD(LOADB) = MK_CMD_ENTRY( + "loadb", 3, 0, do_load_serial_bin, + "loadb - load binary file over serial line (kermit mode)\n", + "[ off ] [ baud ]\n" + " - load binary file over serial line" + " with offset 'off' and baudrate 'baud'\n" +); + +#endif /* CFG_CMD_LOADB */ + +/* -------------------------------------------------------------------- */ + +#if (CONFIG_COMMANDS & CFG_CMD_HWFLOW) +int do_hwflow (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +{ + extern int hwflow_onoff(int); + + if (argc == 2) { + if (strcmp(argv[1], "off") == 0) + hwflow_onoff(-1); + else + if (strcmp(argv[1], "on") == 0) + hwflow_onoff(1); + else + printf("Usage: %s\n", cmdtp->usage); + } + printf("RTS/CTS hardware flow control: %s\n", hwflow_onoff(0) ? "on" : "off"); + return 0; +} + +/* -------------------------------------------------------------------- */ + +cmd_tbl_t U_BOOT_CMD(HWFLOW) = MK_CMD_ENTRY( + "hwflow [on|off]", 2, 0, do_hwflow, + "hwflow - turn the harwdare flow control on/off\n", + "\n - change RTS/CTS hardware flow control over serial line\n" +); + +#endif /* CFG_CMD_HWFLOW */ diff --git a/common/cmd_log.c b/common/cmd_log.c index 84306ef..b07dc75 100644 --- a/common/cmd_log.c +++ b/common/cmd_log.c @@ -195,7 +195,16 @@ return 1; } } - +#if defined(CONFIG_LOGBUFFER) +cmd_tbl_t U_BOOT_CMD(LOG) = MK_CMD_ENTRY( + "log", 255, 1, do_log, + "log - manipulate logbuffer\n", + "log info - show pointer details\n" + "log reset - clear contents\n" + "log show - show contents\n" + "log append - append to the logbuffer\n" +); +#endif /* CONFIG_LOGBUFFER */ static int logbuff_printk(const char *line) { int i; diff --git a/common/cmd_mem.c b/common/cmd_mem.c index aca6926..944aada 100644 --- a/common/cmd_mem.c +++ b/common/cmd_mem.c @@ -29,7 +29,6 @@ #include #include -#include #if (CONFIG_COMMANDS & CFG_CMD_MMC) #include #endif @@ -148,7 +147,7 @@ } addr += size; } - + } else { /* addr does not correspond to DataFlash */ #endif for (i=0; i #include -#include #include #if (CONFIG_COMMANDS & CFG_CMD_MII) @@ -128,4 +127,15 @@ return rcode; } +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(MII) = MK_CMD_ENTRY( + "mii", 5, 1, do_mii, + "mii - MII utility commands\n", + "info - display MII PHY info\n" + "mii read - read MII PHY register \n" + "mii write - write MII PHY register \n" +); + + #endif /* CFG_CMD_MII */ diff --git a/common/cmd_misc.c b/common/cmd_misc.c index e3e0e44..76fe267 100644 --- a/common/cmd_misc.c +++ b/common/cmd_misc.c @@ -52,5 +52,22 @@ } return 0; } +/* Implemented in $(CPU)/interrupts.c */ +#if (CONFIG_COMMANDS & CFG_CMD_IRQ) +int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + +cmd_tbl_t U_BOOT_CMD(IRQINFO) = MK_CMD_ENTRY( + "irqinfo", 1, 1, do_irqinfo, + "irqinfo - print information about IRQs\n", + NULL +); +#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */ + +cmd_tbl_t U_BOOT_CMD(MISC) = MK_CMD_ENTRY( + "sleep" , 2, 2, do_sleep, + "sleep - delay execution for some time\n", + "N\n" + " - delay execution for N seconds (N is _decimal_ !!!)\n" +); #endif /* CFG_CMD_MISC */ diff --git a/common/cmd_nand.c b/common/cmd_nand.c index 4b27c77..41f84fd 100644 --- a/common/cmd_nand.c +++ b/common/cmd_nand.c @@ -98,7 +98,7 @@ printf ("Usage:\n%s\n", cmdtp->usage); return 1; case 2: - if (strcmp(argv[1],"info") == 0) { + if (strcmp(argv[1],"info") == 0) { int i; putc ('\n'); @@ -376,7 +376,7 @@ return 0; } - + /* print bad blocks in NAND flash */ static void nand_print_bad(struct nand_chip* nand) { @@ -473,7 +473,7 @@ nand->totlen >> 20, nand->erasesize >> 10); } else { - printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR); + printf("%s at 0x%lx (", nand->chips_name, nand->IO_ADDR); print_size(nand->totlen, ", "); print_size(nand->erasesize, " sector)\n"); } @@ -599,7 +599,7 @@ id = READ_NAND(nand->IO_ADDR); - NAND_DISABLE_CE(nand); /* set pin high */ + NAND_DISABLE_CE(nand); /* set pin high */ /* No response - return failure */ if (mfr == 0xff || mfr == 0) { printf("NanD_Command (ReadID) got %d %d\n", mfr, id); @@ -806,7 +806,7 @@ goto readdata; /* Send the read command */ NanD_Command(nand, NAND_CMD_READ0); - NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col); + NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col); /* Read in a page + oob data */ NanD_ReadBuf(nand, nand->data_buf, nand->oobblock + nand->oobsize); @@ -873,7 +873,7 @@ #else /* Send the read command */ NanD_Command(nand, NAND_CMD_READ0); - NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col); + NanD_Address(nand, ADDR_COLUMN_PAGE, (page << nand->page_shift) + col); /* Read the data directly into the return buffer */ if ((*retlen + (nand->oobblock - col)) >= len) { NanD_ReadBuf(nand, buf + *retlen, len - *retlen); @@ -1136,11 +1136,11 @@ *retlen = len; /* Reading the full OOB data drops us off of the end of the page, - * causing the flash device to go into busy mode, so we need - * to wait until ready 11.4.1 and Toshiba TC58256FT nands */ + * causing the flash device to go into busy mode, so we need + * to wait until ready 11.4.1 and Toshiba TC58256FT nands */ ret = NanD_WaitReady(nand); - NAND_DISABLE_CE(nand); /* set pin high */ + NAND_DISABLE_CE(nand); /* set pin high */ return ret; @@ -1244,7 +1244,7 @@ if (ofs & (nand->erasesize-1) || len & (nand->erasesize-1)) { printf ("Offset and size must be sector aligned, erasesize = %d\n", - (int) nand->erasesize); + (int) nand->erasesize); return -1; } diff --git a/common/cmd_net.c b/common/cmd_net.c index e8bf0ae..44c86e2 100644 --- a/common/cmd_net.c +++ b/common/cmd_net.c @@ -26,14 +26,11 @@ */ #include #include -#include +#include #include #if (CONFIG_COMMANDS & CFG_CMD_NET) -# if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) -# include -# endif extern int do_bootm (cmd_tbl_t *, int, int, char *[]); @@ -44,21 +41,46 @@ return netboot_common (BOOTP, cmdtp, argc, argv); } +cmd_tbl_t U_BOOT_CMD(BOOTP) = MK_CMD_ENTRY( + "bootp", 3, 1, do_bootp, + "bootp - boot image via network using BootP/TFTP protocol\n", + "[loadAddress] [bootfilename]\n" +); + int do_tftpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { return netboot_common (TFTP, cmdtp, argc, argv); } +cmd_tbl_t U_BOOT_CMD(TFTPB) = MK_CMD_ENTRY( + "tftpboot", 3, 1, do_tftpb, + "tftpboot- boot image via network using TFTP protocol\n" + " and env variables ipaddr and serverip\n", + "[loadAddress] [bootfilename]\n" +); + int do_rarpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { return netboot_common (RARP, cmdtp, argc, argv); } +cmd_tbl_t U_BOOT_CMD(RARPB) = MK_CMD_ENTRY( + "rarpboot", 3, 1, do_rarpb, + "rarpboot- boot image via network using RARP/TFTP protocol\n", + "[loadAddress] [bootfilename]\n" +); + #if (CONFIG_COMMANDS & CFG_CMD_DHCP) int do_dhcp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { return netboot_common(DHCP, cmdtp, argc, argv); } + +cmd_tbl_t U_BOOT_CMD(DHCP) = MK_CMD_ENTRY( + "dhcp", 3, 1, do_dhcp, + "dhcp - invoke DHCP client to obtain IP/boot params\n", + "\n" +); #endif /* CFG_CMD_DHCP */ static void netboot_update_env(void) diff --git a/common/cmd_nvedit.c b/common/cmd_nvedit.c index 3c2a553..9cf8b90 100644 --- a/common/cmd_nvedit.c +++ b/common/cmd_nvedit.c @@ -43,7 +43,6 @@ #include #include #include -#include #include #include #if (CONFIG_COMMANDS & CFG_CMD_NET) @@ -534,6 +533,8 @@ return (saveenv() ? 1 : 0); } + + #endif @@ -556,3 +557,60 @@ return(i2); return(-1); } + + +/**************************************************/ + +cmd_tbl_t U_BOOT_CMD(PRINTENV) = MK_CMD_ENTRY( + "printenv", CFG_MAXARGS, 1, do_printenv, + "printenv- print environment variables\n", + "\n - print values of all environment variables\n" + "printenv name ...\n" + " - print value of environment variable 'name'\n" +); + +cmd_tbl_t U_BOOT_CMD(SETENV) = MK_CMD_ENTRY( + "setenv", CFG_MAXARGS, 0, do_setenv, + "setenv - set environment variables\n", + "name value ...\n" + " - set environment variable 'name' to 'value ...'\n" + "setenv name\n" + " - delete environment variable 'name'\n" +); + +#if ((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH)) + +cmd_tbl_t U_BOOT_CMD(SAVEENV) = MK_CMD_ENTRY( + "saveenv", 1, 0, do_saveenv, + "saveenv - save environment variables to persistent storage\n", + NULL +); + +#endif /* CFG_CMD_ENV */ + +#if (CONFIG_COMMANDS & CFG_CMD_ASKENV) + +cmd_tbl_t U_BOOT_CMD(ASKENV) = MK_CMD_ENTRY( + "askenv", CFG_MAXARGS, 1, do_askenv, + "askenv - get environment variables from stdin\n", + "name [message] [size]\n" + " - get environment variable 'name' from stdin (max 'size' chars)\n" + "askenv name\n" + " - get environment variable 'name' from stdin\n" + "askenv name size\n" + " - get environment variable 'name' from stdin (max 'size' chars)\n" + "askenv name [message] size\n" + " - display 'message' string and get environment variable 'name'" + "from stdin (max 'size' chars)\n" +); +#endif /* CFG_CMD_ASKENV */ + +#if (CONFIG_COMMANDS & CFG_CMD_RUN) +int do_run (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); +cmd_tbl_t U_BOOT_CMD(RUN) = MK_CMD_ENTRY( + "run", CFG_MAXARGS, 1, do_run, + "run - run commands in an environment variable\n", + "var [...]\n" + " - run the commands in the environment variable(s) 'var'\n" +); +#endif /* CFG_CMD_RUN */ diff --git a/common/cmd_pci.c b/common/cmd_pci.c index ca712ce..7641d5c 100644 --- a/common/cmd_pci.c +++ b/common/cmd_pci.c @@ -34,10 +34,8 @@ #ifdef CONFIG_PCI #include -#include #include #include -#include #include #if (CONFIG_COMMANDS & CFG_CMD_PCI) @@ -116,63 +114,63 @@ static char *pci_classes_str(u8 class) { switch (class) { - case PCI_CLASS_NOT_DEFINED: - return "Build before PCI Rev2.0"; - break; - case PCI_BASE_CLASS_STORAGE: - return "Mass storage controller"; - break; - case PCI_BASE_CLASS_NETWORK: - return "Network controller"; - break; - case PCI_BASE_CLASS_DISPLAY: - return "Display controller"; - break; - case PCI_BASE_CLASS_MULTIMEDIA: - return "Multimedia device"; - break; - case PCI_BASE_CLASS_MEMORY: - return "Memory controller"; - break; - case PCI_BASE_CLASS_BRIDGE: - return "Bridge device"; - break; - case PCI_BASE_CLASS_COMMUNICATION: - return "Simple comm. controller"; - break; - case PCI_BASE_CLASS_SYSTEM: - return "Base system peripheral"; - break; - case PCI_BASE_CLASS_INPUT: - return "Input device"; - break; - case PCI_BASE_CLASS_DOCKING: - return "Docking station"; - break; - case PCI_BASE_CLASS_PROCESSOR: - return "Processor"; - break; - case PCI_BASE_CLASS_SERIAL: - return "Serial bus controller"; - break; - case PCI_BASE_CLASS_INTELLIGENT: - return "Intelligent controller"; - break; - case PCI_BASE_CLASS_SATELLITE: - return "Satellite controller"; - break; - case PCI_BASE_CLASS_CRYPT: - return "Cryptographic device"; - break; - case PCI_BASE_CLASS_SIGNAL_PROCESSING: - return "DSP"; - break; - case PCI_CLASS_OTHERS: - return "Does not fit any class"; - break; - default: + case PCI_CLASS_NOT_DEFINED: + return "Build before PCI Rev2.0"; + break; + case PCI_BASE_CLASS_STORAGE: + return "Mass storage controller"; + break; + case PCI_BASE_CLASS_NETWORK: + return "Network controller"; + break; + case PCI_BASE_CLASS_DISPLAY: + return "Display controller"; + break; + case PCI_BASE_CLASS_MULTIMEDIA: + return "Multimedia device"; + break; + case PCI_BASE_CLASS_MEMORY: + return "Memory controller"; + break; + case PCI_BASE_CLASS_BRIDGE: + return "Bridge device"; + break; + case PCI_BASE_CLASS_COMMUNICATION: + return "Simple comm. controller"; + break; + case PCI_BASE_CLASS_SYSTEM: + return "Base system peripheral"; + break; + case PCI_BASE_CLASS_INPUT: + return "Input device"; + break; + case PCI_BASE_CLASS_DOCKING: + return "Docking station"; + break; + case PCI_BASE_CLASS_PROCESSOR: + return "Processor"; + break; + case PCI_BASE_CLASS_SERIAL: + return "Serial bus controller"; + break; + case PCI_BASE_CLASS_INTELLIGENT: + return "Intelligent controller"; + break; + case PCI_BASE_CLASS_SATELLITE: + return "Satellite controller"; + break; + case PCI_BASE_CLASS_CRYPT: + return "Cryptographic device"; + break; + case PCI_BASE_CLASS_SIGNAL_PROCESSING: + return "DSP"; + break; + case PCI_CLASS_OTHERS: + return "Does not fit any class"; + break; + default: return "???"; - break; + break; }; } @@ -234,7 +232,7 @@ PRINT (" status register = 0x%.4x\n", word, PCI_STATUS); PRINT (" revision ID = 0x%.2x\n", byte, PCI_REVISION_ID); PRINT2(" class code = 0x%.2x (%s)\n", byte, PCI_CLASS_CODE, - pci_classes_str); + pci_classes_str); PRINT (" sub class code = 0x%.2x\n", byte, PCI_CLASS_SUB_CODE); PRINT (" programming interface = 0x%.2x\n", byte, PCI_CLASS_PROG); PRINT (" cache line = 0x%.2x\n", byte, PCI_CACHE_LINE_SIZE); @@ -259,7 +257,7 @@ PRINT (" min Grant = 0x%.2x\n", byte, PCI_MIN_GNT); PRINT (" max Latency = 0x%.2x\n", byte, PCI_MAX_LAT); break; - + case PCI_HEADER_TYPE_BRIDGE: /* PCI-to-PCI bridge */ PRINT (" base address 1 = 0x%.8x\n", dword, PCI_BASE_ADDRESS_1); @@ -291,7 +289,7 @@ PRINT (" primary bus number = 0x%.2x\n", byte, PCI_CB_PRIMARY_BUS); PRINT (" CardBus number = 0x%.2x\n", byte, PCI_CB_CARD_BUS); PRINT (" subordinate bus number = 0x%.2x\n", byte, PCI_CB_SUBORDINATE_BUS); - PRINT (" CardBus latency timer = 0x%.2x\n", byte, PCI_CB_LATENCY_TIMER); + PRINT (" CardBus latency timer = 0x%.2x\n", byte, PCI_CB_LATENCY_TIMER); PRINT (" CardBus memory base 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_0); PRINT (" CardBus memory limit 0 = 0x%.8x\n", dword, PCI_CB_MEMORY_LIMIT_0); PRINT (" CardBus memory base 1 = 0x%.8x\n", dword, PCI_CB_MEMORY_BASE_1); @@ -311,10 +309,10 @@ PRINT (" subdevice ID = 0x%.4x\n", word, PCI_CB_SUBSYSTEM_ID); PRINT (" PC Card 16bit base address = 0x%.8x\n", dword, PCI_CB_LEGACY_MODE_BASE); break; - + default: printf("unknown header\n"); - break; + break; } #undef PRINT @@ -547,6 +545,26 @@ return 1; } +/***************************************************/ + + +cmd_tbl_t U_BOOT_CMD(PCI) = MK_CMD_ENTRY( + "pci", 5, 1, do_pci, + "pci - list and access PCI Configuraton Space\n", + "[bus] [long]\n" + " - short or long list of PCI devices on bus 'bus'\n" + "pci header b.d.f\n" + " - show header of PCI device 'bus.device.function'\n" + "pci display[.b, .w, .l] b.d.f [address] [# of objects]\n" + " - display PCI configuration space (CFG)\n" + "pci next[.b, .w, .l] b.d.f address\n" + " - modify, read and keep CFG address\n" + "pci modify[.b, .w, .l] b.d.f address\n" + " - modify, auto increment CFG address\n" + "pci write[.b, .w, .l] b.d.f address value\n" + " - write to CFG address\n" +); + #endif /* (CONFIG_COMMANDS & CFG_CMD_PCI) */ #endif /* CONFIG_PCI */ diff --git a/common/cmd_pcmcia.c b/common/cmd_pcmcia.c index 10ba84c..2aa2a23 100644 --- a/common/cmd_pcmcia.c +++ b/common/cmd_pcmcia.c @@ -57,7 +57,6 @@ #include #include #include -#include #if defined(CONFIG_IDE_8xx_PCCARD) && defined(CONFIG_8xx) #include #endif @@ -669,7 +668,6 @@ } - #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) static int hardware_disable(int slot) { @@ -698,7 +696,6 @@ #endif /* CFG_CMD_PCMCIA */ - static int voltage_set(int slot, int vcc, int vpp) { volatile immap_t *immap; @@ -890,7 +887,6 @@ } - #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) static int hardware_disable(int slot) { @@ -933,7 +929,6 @@ #endif /* CFG_CMD_PCMCIA */ - static int voltage_set(int slot, int vcc, int vpp) { volatile immap_t *immap; @@ -1206,7 +1201,6 @@ } - #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) static int hardware_disable(int slot) { @@ -1238,7 +1232,6 @@ #endif /* CFG_CMD_PCMCIA */ - static int voltage_set(int slot, int vcc, int vpp) { volatile immap_t *immap; @@ -1470,7 +1463,6 @@ } - #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) static int hardware_disable(int slot) { @@ -1502,7 +1494,6 @@ #endif /* CFG_CMD_PCMCIA */ - static int voltage_set(int slot, int vcc, int vpp) { volatile immap_t *immap; @@ -1895,7 +1886,6 @@ } - #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) static int hardware_disable(int slot) { @@ -1926,7 +1916,6 @@ #endif /* CFG_CMD_PCMCIA */ - static int voltage_set(int slot, int vcc, int vpp) { volatile immap_t *immap; @@ -2115,7 +2104,6 @@ } - #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) static int hardware_disable(int slot) { @@ -2148,7 +2136,6 @@ #endif /* CFG_CMD_PCMCIA */ - static int voltage_set(int slot, int vcc, int vpp) { volatile immap_t *immap; @@ -2227,9 +2214,6 @@ #endif /* KUP4K */ - - - /* -------------------------------------------------------------------- */ /* End of Board Specific Stuff */ /* -------------------------------------------------------------------- */ @@ -2499,3 +2483,14 @@ /* -------------------------------------------------------------------- */ #endif /* CFG_CMD_PCMCIA || (CFG_CMD_IDE && CONFIG_IDE_8xx_PCCARD) */ + +/**************************************************/ + +#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) +cmd_tbl_t U_BOOT_CMD(PINIT) = MK_CMD_ENTRY( + "pinit", 2, 1, do_pinit, + "pinit - PCMCIA sub-system\n", + "on - power on PCMCIA socket\n" + "pinit off - power off PCMCIA socket\n" +); +#endif diff --git a/common/cmd_reginfo.c b/common/cmd_reginfo.c index 198b9c7..aa9abf9 100644 --- a/common/cmd_reginfo.c +++ b/common/cmd_reginfo.c @@ -23,7 +23,6 @@ #include #include -#include #if defined(CONFIG_8xx) #include #elif defined (CONFIG_405GP) @@ -213,3 +212,15 @@ } #endif /* CONFIG_COMMANDS & CFG_CMD_REGINFO */ + + + /**************************************************/ + +#if (defined(CONFIG_8xx) || defined(CONFIG_405GP)) && \ + (CONFIG_COMMANDS & CFG_CMD_REGINFO) + +cmd_tbl_t U_BOOT_CMD(REGINFO) = MK_CMD_ENTRY( + "reginfo", 2, 1, do_reginfo, + "reginfo - print register information\n", +); +#endif diff --git a/common/cmd_scsi.c b/common/cmd_scsi.c index f3d0c72..c925823 100644 --- a/common/cmd_scsi.c +++ b/common/cmd_scsi.c @@ -30,7 +30,6 @@ #include #include -#include #include #include #include @@ -181,7 +180,6 @@ } - void scsi_init(void) { int busdevfunc; @@ -206,7 +204,6 @@ } - /****************************************************************************** * scsi boot command intepreter. Derived from diskboot */ @@ -494,7 +491,6 @@ } - /* Trim trailing blanks, and NUL-terminate string */ void scsi_trim_trail (unsigned char *str, unsigned int len) @@ -594,5 +590,3 @@ } #endif /* #if (CONFIG_COMMANDS & CFG_CMD_SCSI) */ - - diff --git a/common/cmd_spi.c b/common/cmd_spi.c index d544b27..82cb673 100644 --- a/common/cmd_spi.c +++ b/common/cmd_spi.c @@ -28,7 +28,6 @@ #include #include #include -#include #if (CONFIG_COMMANDS & CFG_CMD_SPI) @@ -107,11 +106,11 @@ if ((device < 0) || (device >= spi_chipsel_cnt)) { printf("Invalid device %d, giving up.\n", device); return 1; - } + } if ((bitlen < 0) || (bitlen > (MAX_SPI_BYTES * 8))) { printf("Invalid bitlen %d, giving up.\n", bitlen); return 1; - } + } debug ("spi_chipsel[%d] = %08X\n", device, (uint)spi_chipsel[device]); @@ -130,4 +129,15 @@ return rcode; } +/***************************************************/ + +cmd_tbl_t U_BOOT_CMD(SPI) = MK_CMD_ENTRY( + "sspi", 5, 1, do_spi, + "sspi - SPI utility commands\n", + " - Send bits from out the SPI\n" + " - Identifies the chip select of the device\n" + " - Number of bits to send (base 10)\n" + " - Hexadecimal string that gets sent\n" +); + #endif /* CFG_CMD_SPI */ diff --git a/common/cmd_usb.c b/common/cmd_usb.c index 8a3f471..d8f2f2c 100644 --- a/common/cmd_usb.c +++ b/common/cmd_usb.c @@ -309,7 +309,6 @@ } - /****************************************************************************** * usb boot command intepreter. Derived from diskboot */ @@ -433,7 +432,6 @@ #endif /* CONFIG_USB_STORAGE */ - /********************************************************************************* * usb command intepreter */ @@ -594,3 +592,37 @@ #endif /* (CONFIG_COMMANDS & CFG_CMD_USB) */ +#if (CONFIG_COMMANDS & CFG_CMD_USB) + +#ifdef CONFIG_USB_STORAGE +cmd_tbl_t U_BOOT_CMD(USB) = MK_CMD_ENTRY( + "usb", 5, 1, do_usb, + "usb - USB sub-system\n", + "reset - reset (rescan) USB controller\n" + "usb stop [f] - stop USB [f]=force stop\n" + "usb tree - show USB device tree\n" + "usb info [dev] - show available USB devices\n" + "usb scan - (re-)scan USB bus for storage devices\n" + "usb device [dev] - show or set current USB storage device\n" + "usb part [dev] - print partition table of one or all USB storage devices\n" + "usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n" + " to memory address `addr'\n" +); + + +cmd_tbl_t U_BOOT_CMD(USBBOOT) = MK_CMD_ENTRY( + "usbboot", 3, 1, do_usbboot, + "usbboot - boot from USB device\n", + "loadAddr dev:part\n" +); + +#else +cmd_tbl_t U_BOOT_CMD(USB) = MK_CMD_ENTRY( + "usb", 5, 1, do_usb, + "usb - USB sub-system\n", + "reset - reset (rescan) USB controller\n" + "usb tree - show USB device tree\n" + "usb info [dev] - show available USB devices\n" +); +#endif +#endif diff --git a/common/cmd_vfd.c b/common/cmd_vfd.c index 3ef1395..61ebe1c 100644 --- a/common/cmd_vfd.c +++ b/common/cmd_vfd.c @@ -64,6 +64,13 @@ transfer_pic(3, (uchar *)bitmap, VFD_LOGO_HEIGHT, VFD_LOGO_WIDTH); return 0; } + +cmd_tbl_t U_BOOT_CMD(VFD) = MK_CMD_ENTRY( + "vfd", 2, 0, do_vfd, + "vfd - load a bitmap to the VFDs on TRAB\n", + "N\n" + " - load bitmap N to the VFDs (N is _decimal_ !!!)\n" +); #endif /* CFG_CMD_VFD */ #ifdef CONFIG_VFD diff --git a/common/command.c b/common/command.c index 842e784..607c746 100644 --- a/common/command.c +++ b/common/command.c @@ -1,5 +1,5 @@ /* - * (C) Copyright 2000 + * (C) Copyright 2000-2003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * * See file CREDITS for list of people who contributed to this @@ -27,93 +27,6 @@ #include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -#include -#include /* Floppy support */ -#include /* USB support */ -#include -#include -#include -#include /* 4xx DCR register access */ -#include -#include -#include -#include - -#include /* board special functions */ - -#include -#include - -#include - -#include /* load a bitmap to the VFDs on TRAB */ -#include -#include -#include -#include -#include -#include - -#ifdef CONFIG_AMIGAONEG3SE -#include -#include -#endif - -/* - * HELP command - */ -#define CMD_TBL_HELP MK_CMD_TBL_ENTRY( \ - "help", 1, CFG_MAXARGS, 1, do_help, \ - "help - print online help\n", \ - "[command ...]\n" \ - " - show help information (for 'command')\n" \ - "'help' prints online help for the monitor commands.\n\n" \ - "Without arguments, it prints a short usage message for all commands.\n\n" \ - "To get detailed help information for specific commands you can type\n" \ - "'help' with one or more command names as arguments.\n" \ - ), - -#define CMD_TBL_QUES MK_CMD_TBL_ENTRY( \ - "?", 1, CFG_MAXARGS, 1, do_help, \ - "? - alias for 'help'\n", \ - NULL \ - ), - -#define CMD_TBL_VERS MK_CMD_TBL_ENTRY( \ - "version", 4, 1, 1, do_version, \ - "version - print monitor version\n", \ - NULL \ - ), - -#define CMD_TBL_ECHO MK_CMD_TBL_ENTRY( \ - "echo", 4, CFG_MAXARGS, 1, do_echo, \ - "echo - echo args to console\n", \ - "[args..]\n" \ - " - echo args to console; \\c suppresses newline\n" \ - ), int do_version (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) @@ -152,32 +65,59 @@ * Use puts() instead of printf() to avoid printf buffer overflow * for long help messages */ -int -do_help (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) +int do_help (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { int i; int rcode = 0; - if (argc == 1) { /* print short help (usage) */ + if (argc == 1) { /*show list of commands */ - for (cmdtp=&cmd_tbl[0]; cmdtp->name; cmdtp++) { + int cmd_items = (((int) &__u_boot_cmd_end) - + ((int) &__u_boot_cmd_start)) / + sizeof (*cmdtp); + int end_sort; + cmd_tbl_t *cmd_array[(cmd_items + 1)]; + int i; + + /* Make list of commands from .uboot_cmd section */ + cmdtp = (cmd_tbl_t *) & __u_boot_cmd_start; + for (i = 1; i <= cmd_items; i++) { + cmd_array[i] = cmdtp; + cmdtp++; + } + /* Sort command list */ + end_sort = 0; + for (i = 1; end_sort != 1 || i <= cmd_items - 1; i++) { + if (i == cmd_items) { /* Last command */ + end_sort = 1; + i = 1; + } + + if (strcmp (cmd_array[i]->name, cmd_array[i + 1]->name) > 0) { + end_sort = 0; + *cmd_array[0] = *cmd_array[i]; + *cmd_array[i] = *cmd_array[i + 1]; + *cmd_array[i + 1] = *cmd_array[0]; + } + } + + /* print short help (usage) */ + for (cmdtp = (cmd_tbl_t *) & __u_boot_cmd_start; + cmdtp != (cmd_tbl_t *) & __u_boot_cmd_end; cmdtp++) { /* allow user abort */ - if (ctrlc()) + if (ctrlc ()) return 1; - if (cmdtp->usage == NULL) continue; puts (cmdtp->usage); } - return 0; } - /* * command help (long version) */ - for (i=1; iname); @@ -196,164 +136,66 @@ } else { printf ("Unknown command '%s' - try 'help'" " without arguments for list of all" - " known commands\n\n", - argv[i] - ); + " known commands\n\n", argv[i] + ); rcode = 1; } } return rcode; } + +cmd_tbl_t U_BOOT_CMD(HELP) = MK_CMD_ENTRY( + "help", CFG_MAXARGS, 1, do_help, + "help - print online help\n", + "[command ...]\n" + " - show help information (for 'command')\n" + "'help' prints online help for the monitor commands.\n\n" + "Without arguments, it prints a short usage message for all commands.\n\n" + "To get detailed help information for specific commands you can type\n" + "'help' with one or more command names as arguments.\n" +); + +cmd_tbl_t U_BOOT_CMD(QUES) = MK_CMD_ENTRY( + "?", CFG_MAXARGS, 1, do_help, + "? - alias for 'help'\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(VERS) = MK_CMD_ENTRY( + "version", 1, 1, do_version, + "version - print monitor version\n", + NULL +); + +cmd_tbl_t U_BOOT_CMD(ECHO) = MK_CMD_ENTRY( + "echo", CFG_MAXARGS, 1, do_echo, + "echo - echo args to console\n", + "[args..]\n" + " - echo args to console; \\c suppresses newline\n" +); + /*************************************************************************** * find command table entry for a command */ -cmd_tbl_t *find_cmd(const char *cmd) +cmd_tbl_t *find_cmd (const char *cmd) { cmd_tbl_t *cmdtp; - /* Search command table - Use linear search - it's a small table */ - for (cmdtp = &cmd_tbl[0]; cmdtp->name; cmdtp++) { - if (strncmp (cmd, cmdtp->name, cmdtp->lmin) == 0) + cmd_tbl_t *cmdtp_temp = &__u_boot_cmd_start; /*Init value */ + int one_cmd_name = 0; + + for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { + if ((strncmp (cmd, cmdtp->name, strlen (cmd)) == 0) && + (strlen (cmd) == strlen (cmdtp->name))) return cmdtp; + else if (strncmp (cmd, cmdtp->name, strlen (cmd)) == 0) { + cmdtp_temp = cmdtp; + one_cmd_name++; + } else; } - return NULL; /* not found */ + if (one_cmd_name == 1) + return cmdtp_temp; + + return NULL; /* not found || one_cmd_name >2 */ } - -/* - * The commands in this table are sorted alphabetically by the - * command name and in descending order by the command name string - * length. This is to prevent conflicts in command name parsing. - * Please ensure that new commands are added according to that rule. - * Please use $(TOPDIR)/doc/README.commands as a reference AND make - * sure it gets updated. - */ - -cmd_tbl_t cmd_tbl[] = { - CMD_TBL_ASKENV - CMD_TBL_ASM - CMD_TBL_AUTOSCRIPT - CMD_TBL_BASE - CMD_TBL_BDINFO - CMD_TBL_BMP -#ifdef CONFIG_AMIGAONEG3SE - CMD_TBL_BOOTA -#endif - CMD_TBL_BOOTELF - CMD_TBL_BOOTM - CMD_TBL_BOOTP - CMD_TBL_BOOTVX - CMD_TBL_BOOTD - CMD_TBL_BREAK - CMD_TBL_BRGINFO - CMD_TBL_CARINFO - CMD_TBL_JFFS2_CHPART - CMD_TBL_CMP - CMD_TBL_CONINFO - CMD_TBL_CONTINUE - CMD_TBL_CP - CMD_TBL_CRC - CMD_TBL_DATE - CMD_TBL_DCACHE - CMD_TBL_DHCP - CMD_TBL_DIAG - CMD_TBL_DISK - CMD_TBL_DMAINFO - CMD_TBL_DIS - CMD_TBL_DOCBOOT - CMD_TBL_DOC - CMD_TBL_DTT - CMD_TBL_ECHO - CMD_TBL_EEPROM - CMD_TBL_FAT - CMD_TBL_FCCINFO - CMD_TBL_FLERASE - CMD_TBL_FDC - CMD_TBL_FDOS_BOOT - CMD_TBL_FDOS_LS - CMD_TBL_FLINFO - CMD_TBL_FPGA - CMD_TBL_JFFS2_FSINFO - CMD_TBL_JFFS2_FSLOAD - CMD_TBL_GETDCR - CMD_TBL_GO - CMD_TBL_HELP - CMD_TBL_HWFLOW - CMD_TBL_I2CINFO - CMD_TBL_ICACHE -#ifdef CONFIG_8260 - CMD_TBL_ICINFO -#endif - CMD_TBL_IMD - CMD_TBL_IMM - CMD_TBL_INM - CMD_TBL_IMW - CMD_TBL_PORTIO_IN - CMD_TBL_ICRC - CMD_TBL_IPROBE - CMD_TBL_ILOOP - CMD_TBL_ISDRAM - CMD_TBL_IDE - CMD_TBL_IMINFO - CMD_TBL_IOPINFO - CMD_TBL_IOPSET - CMD_TBL_IRQINFO - CMD_TBL_KGDB - CMD_TBL_LOADB - CMD_TBL_LOADS - CMD_TBL_LOG - CMD_TBL_LOOP - CMD_TBL_JFFS2_LS - CMD_TBL_MCCINFO - CMD_TBL_MMC - CMD_TBL_MD - CMD_TBL_MEMCINFO -#ifdef CONFIG_AMIGAONEG3SE - CMD_TBL_MENU -#endif - CMD_TBL_MII - CMD_TBL_MM - CMD_TBL_MTEST - CMD_TBL_MUXINFO - CMD_TBL_MW - CMD_TBL_NAND - CMD_TBL_NANDBOOT - CMD_TBL_NEXT - CMD_TBL_NM - CMD_TBL_PING - CMD_TBL_PORTIO_OUT - CMD_TBL_PCI - CMD_TBL_PRINTENV - CMD_TBL_PROTECT - CMD_TBL_RARPB - CMD_TBL_RDUMP - CMD_TBL_PINIT - CMD_TBL_REGINFO - CMD_TBL_RESET - CMD_TBL_RUN - CMD_TBL_SAVEENV - CMD_TBL_SAVES - CMD_TBL_SCCINFO - CMD_TBL_SCSIBOOT - CMD_TBL_SCSI - CMD_TBL_SETDCR - CMD_TBL_SETENV - CMD_TBL_SIINFO - CMD_TBL_SITINFO - CMD_TBL_SIUINFO - CMD_TBL_MISC /* sleep */ - CMD_TBL_SMCINFO - CMD_TBL_SPIINFO - CMD_TBL_SPI - CMD_TBL_STACK - CMD_TBL_STEP - CMD_TBL_TFTPB - CMD_TBL_USBBOOT - CMD_TBL_USB - CMD_TBL_VERS - CMD_TBL_BSP - CMD_TBL_VFD - CMD_TBL_QUES /* keep this ("help") the last entry */ - /* the following entry terminates this table */ - MK_CMD_TBL_ENTRY( NULL, 0, 0, 0, NULL, NULL, NULL ) -}; diff --git a/common/dlmalloc.c b/common/dlmalloc.c index 9261507..0c04872 100644 --- a/common/dlmalloc.c +++ b/common/dlmalloc.c @@ -9,8 +9,8 @@ * VERSION 2.6.6 Sun Mar 5 19:10:03 2000 Doug Lea (dl at gee) Note: There may be an updated version of this malloc obtainable at - ftp://g.oswego.edu/pub/misc/malloc.c - Check before installing! + ftp://g.oswego.edu/pub/misc/malloc.c + Check before installing! * Why use this malloc? @@ -87,7 +87,7 @@ and status information. Minimum allocated size: 4-byte ptrs: 16 bytes (including 4 overhead) - 8-byte ptrs: 24/32 bytes (including, 4/8 overhead) + 8-byte ptrs: 24/32 bytes (including, 4/8 overhead) When a chunk is freed, 12 (for 4byte ptrs) or 20 (for 8 byte ptrs but 4 byte size) or 24 (for 8/8) additional bytes are @@ -99,7 +99,7 @@ pointer to something of the minimum allocatable size. Maximum allocated size: 4-byte size_t: 2^31 - 8 bytes - 8-byte size_t: 2^63 - 16 bytes + 8-byte size_t: 2^63 - 16 bytes It is assumed that (possibly signed) size_t bit values suffice to represent chunk sizes. `Possibly signed' is due to the fact @@ -115,11 +115,11 @@ make the normal worst-case wastage 15 bytes (i.e., up to 15 more bytes will be allocated than were requested in malloc), with two exceptions: - 1. Because requests for zero bytes allocate non-zero space, - the worst case wastage for a request of zero bytes is 24 bytes. - 2. For requests >= mmap_threshold that are serviced via - mmap(), the worst case wastage is 8 bytes plus the remainder - from a system page (the minimal mmap unit); typically 4096 bytes. + 1. Because requests for zero bytes allocate non-zero space, + the worst case wastage for a request of zero bytes is 24 bytes. + 2. For requests >= mmap_threshold that are serviced via + mmap(), the worst case wastage is 8 bytes plus the remainder + from a system page (the minimal mmap unit); typically 4096 bytes. * Limitations @@ -372,8 +372,8 @@ void* memcpy(void*, const void*, size_t); #else #ifdef WIN32 -// On Win32 platforms, 'memset()' and 'memcpy()' are already declared in -// 'windows.h' +/* On Win32 platforms, 'memset()' and 'memcpy()' are already declared in */ +/* 'windows.h' */ #else Void_t* memset(); Void_t* memcpy(); @@ -393,14 +393,14 @@ if(mzsz <= 9*sizeof(mzsz)) { \ INTERNAL_SIZE_T* mz = (INTERNAL_SIZE_T*) (charp); \ if(mzsz >= 5*sizeof(mzsz)) { *mz++ = 0; \ - *mz++ = 0; \ + *mz++ = 0; \ if(mzsz >= 7*sizeof(mzsz)) { *mz++ = 0; \ - *mz++ = 0; \ - if(mzsz >= 9*sizeof(mzsz)) { *mz++ = 0; \ - *mz++ = 0; }}} \ - *mz++ = 0; \ - *mz++ = 0; \ - *mz = 0; \ + *mz++ = 0; \ + if(mzsz >= 9*sizeof(mzsz)) { *mz++ = 0; \ + *mz++ = 0; }}} \ + *mz++ = 0; \ + *mz++ = 0; \ + *mz = 0; \ } else memset((charp), 0, mzsz); \ } while(0) @@ -411,14 +411,14 @@ INTERNAL_SIZE_T* mcsrc = (INTERNAL_SIZE_T*) (src); \ INTERNAL_SIZE_T* mcdst = (INTERNAL_SIZE_T*) (dest); \ if(mcsz >= 5*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; \ + *mcdst++ = *mcsrc++; \ if(mcsz >= 7*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; \ - if(mcsz >= 9*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; }}} \ - *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; \ - *mcdst = *mcsrc ; \ + *mcdst++ = *mcsrc++; \ + if(mcsz >= 9*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ + *mcdst++ = *mcsrc++; }}} \ + *mcdst++ = *mcsrc++; \ + *mcdst++ = *mcsrc++; \ + *mcdst = *mcsrc ; \ } else memcpy(dest, src, mcsz); \ } while(0) @@ -558,7 +558,6 @@ #endif - /* This version of malloc supports the standard SVID/XPG mallinfo @@ -622,7 +621,6 @@ #define M_MMAP_MAX -4 - #ifndef DEFAULT_TRIM_THRESHOLD #define DEFAULT_TRIM_THRESHOLD (128 * 1024) #endif @@ -686,11 +684,11 @@ retain whenever sbrk is called. It is used in two ways internally: * When sbrk is called to extend the top of the arena to satisfy - a new malloc request, this much padding is added to the sbrk - request. + a new malloc request, this much padding is added to the sbrk + request. * When malloc_trim is called automatically from free(), - it is used as the `pad' argument. + it is used as the `pad' argument. In both cases, the actual amount of padding is rounded so that the end of the arena is always a system page boundary. @@ -736,15 +734,15 @@ However, it has the disadvantages that: - 1. The space cannot be reclaimed, consolidated, and then - used to service later requests, as happens with normal chunks. - 2. It can lead to more wastage because of mmap page alignment - requirements - 3. It causes malloc performance to be more dependent on host - system memory management support routines which may vary in - implementation quality and may impose arbitrary - limitations. Generally, servicing a request via normal - malloc steps is faster than going through a system's mmap. + 1. The space cannot be reclaimed, consolidated, and then + used to service later requests, as happens with normal chunks. + 2. It can lead to more wastage because of mmap page alignment + requirements + 3. It causes malloc performance to be more dependent on host + system memory management support routines which may vary in + implementation quality and may impose arbitrary + limitations. Generally, servicing a request via normal + malloc steps is faster than going through a system's mmap. All together, these considerations should lead you to use mmap only for relatively large requests. @@ -753,7 +751,6 @@ */ - #ifndef DEFAULT_MMAP_MAX #if HAVE_MMAP #define DEFAULT_MMAP_MAX (64) @@ -766,15 +763,15 @@ M_MMAP_MAX is the maximum number of requests to simultaneously service using mmap. This parameter exists because: - 1. Some systems have a limited number of internal tables for - use by mmap. - 2. In most systems, overreliance on mmap can degrade overall - performance. - 3. If a program allocates many large regions, it is probably - better off using normal sbrk-based allocation routines that - can reclaim and reallocate normal heap memory. Using a - small value allows transition into this mode after the - first few allocations. + 1. Some systems have a limited number of internal tables for + use by mmap. + 2. In most systems, overreliance on mmap can degrade overall + performance. + 3. If a program allocates many large regions, it is probably + better off using normal sbrk-based allocation routines that + can reclaim and reallocate normal heap memory. Using a + small value allows transition into this mode after the + first few allocations. Setting to 0 disables all use of mmap. If HAVE_MMAP is not set, the default value is 0, and attempts to set it to non-zero values @@ -782,8 +779,6 @@ */ - - /* USE_DL_PREFIX will prefix all public routines with the string 'dl'. Useful to quickly avoid procedure declaration conflicts and linker @@ -794,8 +789,6 @@ /* #define USE_DL_PREFIX */ - - /* Special defines for linux libc @@ -1013,7 +1006,7 @@ rval = VirtualFree ((void*)gAddressBase, gNextAddress - gAddressBase, MEM_DECOMMIT); - assert (rval); + assert (rval); } while (head) { @@ -1038,24 +1031,24 @@ return start_address; else { - // Requested region is not available so see if the - // next region is available. Set 'start_address' - // to the next region and call 'VirtualQuery()' - // again. + /* Requested region is not available so see if the */ + /* next region is available. Set 'start_address' */ + /* to the next region and call 'VirtualQuery()' */ + /* again. */ start_address = (char*)info.BaseAddress + info.RegionSize; - // Make sure we start looking for the next region - // on the *next* 64K boundary. Otherwise, even if - // the new region is free according to - // 'VirtualQuery()', the subsequent call to - // 'VirtualAlloc()' (which follows the call to - // this routine in 'wsbrk()') will round *down* - // the requested address to a 64K boundary which - // we already know is an address in the - // unavailable region. Thus, the subsequent call - // to 'VirtualAlloc()' will fail and bring us back - // here, causing us to go into an infinite loop. + /* Make sure we start looking for the next region */ + /* on the *next* 64K boundary. Otherwise, even if */ + /* the new region is free according to */ + /* 'VirtualQuery()', the subsequent call to */ + /* 'VirtualAlloc()' (which follows the call to */ + /* this routine in 'wsbrk()') will round *down* */ + /* the requested address to a 64K boundary which */ + /* we already know is an address in the */ + /* unavailable region. Thus, the subsequent call */ + /* to 'VirtualAlloc()' will fail and bring us back */ + /* here, causing us to go into an infinite loop. */ start_address = (void *) AlignPage64K((unsigned long) start_address); @@ -1092,9 +1085,9 @@ gAddressBase = gNextAddress = (unsigned int)VirtualAlloc (new_address, new_size, MEM_RESERVE, PAGE_NOACCESS); - // repeat in case of race condition - // The region that we found has been snagged - // by another thread + /* repeat in case of race condition */ + /* The region that we found has been snagged */ + /* by another thread */ } while (gAddressBase == 0); @@ -1182,17 +1175,17 @@ chunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Size of previous chunk, if allocated | | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Size of chunk, in bytes |P| + | Size of previous chunk, if allocated | | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Size of chunk, in bytes |P| mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | User data starts here... . - . . - . (malloc_usable_space() bytes) . - . | + | User data starts here... . + . . + . (malloc_usable_space() bytes) . + . | nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Size of chunk | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Size of chunk | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ Where "chunk" is the front of the chunk for the purpose of most of @@ -1206,20 +1199,20 @@ Free chunks are stored in circular doubly-linked lists, and look like this: chunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Size of previous chunk | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Size of previous chunk | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ `head:' | Size of chunk, in bytes |P| mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Forward pointer to next chunk in list | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Back pointer to previous chunk in list | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Unused space (may be 0 bytes long) . - . . - . | + | Forward pointer to next chunk in list | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Back pointer to previous chunk in list | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Unused space (may be 0 bytes long) . + . . + . | nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ `foot:' | Size of chunk, in bytes | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ The P (PREV_INUSE) bit, stored in the unused low-order bit of the chunk size (which is always a multiple of two words), is an in-use @@ -1236,16 +1229,16 @@ The two exceptions to all this are 1. The special chunk `top', which doesn't bother using the - trailing size field since there is no - next contiguous chunk that would have to index off it. (After - initialization, `top' is forced to always exist. If it would - become less than MINSIZE bytes long, it is replenished via - malloc_extend_top.) + trailing size field since there is no + next contiguous chunk that would have to index off it. (After + initialization, `top' is forced to always exist. If it would + become less than MINSIZE bytes long, it is replenished via + malloc_extend_top.) 2. Chunks allocated via mmap, which have the second-lowest-order - bit (IS_MMAPPED) set in their size fields. Because they are - never merged or traversed from any other chunk, they have no - foot size or inuse information. + bit (IS_MMAPPED) set in their size fields. Because they are + never merged or traversed from any other chunk, they have no + foot size or inuse information. Available chunks are kept in any of several places (all declared below): @@ -1286,12 +1279,7 @@ serviced via calls to mmap, and then later released via munmap. */ - - - - - /* sizes, alignments */ #define SIZE_SZ (sizeof(INTERNAL_SIZE_T)) @@ -1531,7 +1519,7 @@ ((((unsigned long)(sz)) >> 9) <= 84) ? 110 + (((unsigned long)(sz)) >> 12): \ ((((unsigned long)(sz)) >> 9) <= 340) ? 119 + (((unsigned long)(sz)) >> 15): \ ((((unsigned long)(sz)) >> 9) <= 1364) ? 124 + (((unsigned long)(sz)) >> 18): \ - 126) + 126) /* bins for chunks < 512 are all spaced 8 bytes apart, and hold identically sized chunks. This is exploited in malloc. @@ -1829,7 +1817,6 @@ (last_remainder->fd = last_remainder->bk = last_remainder) - @@ -2030,7 +2017,7 @@ /* Guarantee the next brk will be at a page boundary */ correction += ((((unsigned long)(brk + sbrk_size))+(pagesz-1)) & - ~(pagesz - 1)) - ((unsigned long)(brk + sbrk_size)); + ~(pagesz - 1)) - ((unsigned long)(brk + sbrk_size)); /* Allocate correction */ new_brk = (char*)(MORECORE (correction)); @@ -2051,20 +2038,20 @@ /* If not enough space to do this, then user did something very wrong */ if (old_top_size < MINSIZE) { - set_head(top, PREV_INUSE); /* will force null return from malloc */ - return; + set_head(top, PREV_INUSE); /* will force null return from malloc */ + return; } /* Also keep size a multiple of MALLOC_ALIGNMENT */ old_top_size = (old_top_size - 3*SIZE_SZ) & ~MALLOC_ALIGN_MASK; set_head_size(old_top, old_top_size); chunk_at_offset(old_top, old_top_size )->size = - SIZE_SZ|PREV_INUSE; + SIZE_SZ|PREV_INUSE; chunk_at_offset(old_top, old_top_size + SIZE_SZ)->size = - SIZE_SZ|PREV_INUSE; + SIZE_SZ|PREV_INUSE; /* If possible, release the rest. */ if (old_top_size >= MINSIZE) - fREe(chunk2mem(old_top)); + fREe(chunk2mem(old_top)); } } @@ -2095,43 +2082,43 @@ From there, the first successful of the following steps is taken: 1. The bin corresponding to the request size is scanned, and if - a chunk of exactly the right size is found, it is taken. + a chunk of exactly the right size is found, it is taken. 2. The most recently remaindered chunk is used if it is big - enough. This is a form of (roving) first fit, used only in - the absence of exact fits. Runs of consecutive requests use - the remainder of the chunk used for the previous such request - whenever possible. This limited use of a first-fit style - allocation strategy tends to give contiguous chunks - coextensive lifetimes, which improves locality and can reduce - fragmentation in the long run. + enough. This is a form of (roving) first fit, used only in + the absence of exact fits. Runs of consecutive requests use + the remainder of the chunk used for the previous such request + whenever possible. This limited use of a first-fit style + allocation strategy tends to give contiguous chunks + coextensive lifetimes, which improves locality and can reduce + fragmentation in the long run. 3. Other bins are scanned in increasing size order, using a - chunk big enough to fulfill the request, and splitting off - any remainder. This search is strictly by best-fit; i.e., - the smallest (with ties going to approximately the least - recently used) chunk that fits is selected. + chunk big enough to fulfill the request, and splitting off + any remainder. This search is strictly by best-fit; i.e., + the smallest (with ties going to approximately the least + recently used) chunk that fits is selected. 4. If large enough, the chunk bordering the end of memory - (`top') is split off. (This use of `top' is in accord with - the best-fit search rule. In effect, `top' is treated as - larger (and thus less well fitting) than any other available - chunk since it can be extended to be as large as necessary - (up to system limitations). + (`top') is split off. (This use of `top' is in accord with + the best-fit search rule. In effect, `top' is treated as + larger (and thus less well fitting) than any other available + chunk since it can be extended to be as large as necessary + (up to system limitations). 5. If the request size meets the mmap threshold and the - system supports mmap, and there are few enough currently - allocated mmapped regions, and a call to mmap succeeds, - the request is allocated via direct memory mapping. + system supports mmap, and there are few enough currently + allocated mmapped regions, and a call to mmap succeeds, + the request is allocated via direct memory mapping. 6. Otherwise, the top of memory is extended by - obtaining more space from the system (normally using sbrk, - but definable to anything else via the MORECORE macro). - Memory is gathered from the system (in system page-sized - units) in a way that allows chunks obtained across different - sbrk calls to be consolidated, but does not require - contiguous memory. Thus, it should be safe to intersperse - mallocs with other sbrk calls. + obtaining more space from the system (normally using sbrk, + but definable to anything else via the MORECORE macro). + Memory is gathered from the system (in system page-sized + units) in a way that allows chunks obtained across different + sbrk calls to be consolidated, but does not require + contiguous memory. Thus, it should be safe to intersperse + mallocs with other sbrk calls. All allocations are made from the the `lowest' part of any found @@ -2208,16 +2195,16 @@ if (remainder_size >= (long)MINSIZE) /* too big */ { - --idx; /* adjust to rescan below after checking last remainder */ - break; + --idx; /* adjust to rescan below after checking last remainder */ + break; } else if (remainder_size >= 0) /* exact fit */ { - unlink(victim, bck, fwd); - set_inuse_bit_at_offset(victim, victim_size); - check_malloced_chunk(victim, nb); - return chunk2mem(victim); + unlink(victim, bck, fwd); + set_inuse_bit_at_offset(victim, victim_size); + check_malloced_chunk(victim, nb); + return chunk2mem(victim); } } @@ -2274,8 +2261,8 @@ block <<= 1; while ((block & binblocks) == 0) { - idx += BINBLOCKWIDTH; - block <<= 1; + idx += BINBLOCKWIDTH; + block <<= 1; } } @@ -2288,34 +2275,34 @@ /* For each bin in this block ... */ do { - /* Find and use first big enough chunk ... */ + /* Find and use first big enough chunk ... */ - for (victim = last(bin); victim != bin; victim = victim->bk) - { - victim_size = chunksize(victim); - remainder_size = victim_size - nb; + for (victim = last(bin); victim != bin; victim = victim->bk) + { + victim_size = chunksize(victim); + remainder_size = victim_size - nb; - if (remainder_size >= (long)MINSIZE) /* split */ - { - remainder = chunk_at_offset(victim, nb); - set_head(victim, nb | PREV_INUSE); - unlink(victim, bck, fwd); - link_last_remainder(remainder); - set_head(remainder, remainder_size | PREV_INUSE); - set_foot(remainder, remainder_size); - check_malloced_chunk(victim, nb); - return chunk2mem(victim); - } + if (remainder_size >= (long)MINSIZE) /* split */ + { + remainder = chunk_at_offset(victim, nb); + set_head(victim, nb | PREV_INUSE); + unlink(victim, bck, fwd); + link_last_remainder(remainder); + set_head(remainder, remainder_size | PREV_INUSE); + set_foot(remainder, remainder_size); + check_malloced_chunk(victim, nb); + return chunk2mem(victim); + } - else if (remainder_size >= 0) /* take */ - { - set_inuse_bit_at_offset(victim, victim_size); - unlink(victim, bck, fwd); - check_malloced_chunk(victim, nb); - return chunk2mem(victim); - } + else if (remainder_size >= 0) /* take */ + { + set_inuse_bit_at_offset(victim, victim_size); + unlink(victim, bck, fwd); + check_malloced_chunk(victim, nb); + return chunk2mem(victim); + } - } + } bin = next_bin(bin); @@ -2325,12 +2312,12 @@ do /* Possibly backtrack to try to clear a partial block */ { - if ((startidx & (BINBLOCKWIDTH - 1)) == 0) - { - binblocks &= ~block; - break; - } - --startidx; + if ((startidx & (BINBLOCKWIDTH - 1)) == 0) + { + binblocks &= ~block; + break; + } + --startidx; q = prev_bin(q); } while (first(q) == q); @@ -2338,14 +2325,14 @@ if ( (block <<= 1) <= binblocks && (block != 0) ) { - while ((block & binblocks) == 0) - { - idx += BINBLOCKWIDTH; - block <<= 1; - } + while ((block & binblocks) == 0) + { + idx += BINBLOCKWIDTH; + block <<= 1; + } } else - break; + break; } } @@ -2359,7 +2346,7 @@ #if HAVE_MMAP /* If big and would otherwise need to extend, try to use mmap instead */ if ((unsigned long)nb >= (unsigned long)mmap_threshold && - (victim = mmap_chunk(nb)) != 0) + (victim = mmap_chunk(nb)) != 0) return chunk2mem(victim); #endif @@ -2392,13 +2379,13 @@ 2. If the chunk was allocated via mmap, it is release via munmap(). 3. If a returned chunk borders the current high end of memory, - it is consolidated into the top, and if the total unused - topmost memory exceeds the trim threshold, malloc_trim is - called. + it is consolidated into the top, and if the total unused + topmost memory exceeds the trim threshold, malloc_trim is + called. 4. Other chunks are consolidated as they arrive, and - placed in corresponding bins. (This includes the case of - consolidating with the current `last_remainder'). + placed in corresponding bins. (This includes the case of + consolidating with the current `last_remainder'). */ @@ -2610,22 +2597,22 @@ /* Forward into top only if a remainder */ if (next == top) { - if ((long)(nextsize + newsize) >= (long)(nb + MINSIZE)) - { - newsize += nextsize; - top = chunk_at_offset(oldp, nb); - set_head(top, (newsize - nb) | PREV_INUSE); - set_head_size(oldp, nb); - return chunk2mem(oldp); - } + if ((long)(nextsize + newsize) >= (long)(nb + MINSIZE)) + { + newsize += nextsize; + top = chunk_at_offset(oldp, nb); + set_head(top, (newsize - nb) | PREV_INUSE); + set_head_size(oldp, nb); + return chunk2mem(oldp); + } } /* Forward into next chunk */ else if (((long)(nextsize + newsize) >= (long)(nb))) { - unlink(next, bck, fwd); - newsize += nextsize; - goto split; + unlink(next, bck, fwd); + newsize += nextsize; + goto split; } } else @@ -2645,45 +2632,45 @@ if (next != 0) { - /* into top */ - if (next == top) - { - if ((long)(nextsize + prevsize + newsize) >= (long)(nb + MINSIZE)) - { - unlink(prev, bck, fwd); - newp = prev; - newsize += prevsize + nextsize; - newmem = chunk2mem(newp); - MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); - top = chunk_at_offset(newp, nb); - set_head(top, (newsize - nb) | PREV_INUSE); - set_head_size(newp, nb); - return newmem; - } - } + /* into top */ + if (next == top) + { + if ((long)(nextsize + prevsize + newsize) >= (long)(nb + MINSIZE)) + { + unlink(prev, bck, fwd); + newp = prev; + newsize += prevsize + nextsize; + newmem = chunk2mem(newp); + MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); + top = chunk_at_offset(newp, nb); + set_head(top, (newsize - nb) | PREV_INUSE); + set_head_size(newp, nb); + return newmem; + } + } - /* into next chunk */ - else if (((long)(nextsize + prevsize + newsize) >= (long)(nb))) - { - unlink(next, bck, fwd); - unlink(prev, bck, fwd); - newp = prev; - newsize += nextsize + prevsize; - newmem = chunk2mem(newp); - MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); - goto split; - } + /* into next chunk */ + else if (((long)(nextsize + prevsize + newsize) >= (long)(nb))) + { + unlink(next, bck, fwd); + unlink(prev, bck, fwd); + newp = prev; + newsize += nextsize + prevsize; + newmem = chunk2mem(newp); + MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); + goto split; + } } /* backward only */ if (prev != 0 && (long)(prevsize + newsize) >= (long)nb) { - unlink(prev, bck, fwd); - newp = prev; - newsize += prevsize; - newmem = chunk2mem(newp); - MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); - goto split; + unlink(prev, bck, fwd); + newp = prev; + newsize += prevsize; + newmem = chunk2mem(newp); + MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); + goto split; } } @@ -3015,25 +3002,25 @@ if (new_brk == (char*)(MORECORE_FAILURE)) /* sbrk failed? */ { - /* Try to figure out what we have */ - current_brk = (char*)(MORECORE (0)); - top_size = current_brk - (char*)top; - if (top_size >= (long)MINSIZE) /* if not, we are very very dead! */ - { - sbrked_mem = current_brk - sbrk_base; - set_head(top, top_size | PREV_INUSE); - } - check_chunk(top); - return 0; + /* Try to figure out what we have */ + current_brk = (char*)(MORECORE (0)); + top_size = current_brk - (char*)top; + if (top_size >= (long)MINSIZE) /* if not, we are very very dead! */ + { + sbrked_mem = current_brk - sbrk_base; + set_head(top, top_size | PREV_INUSE); + } + check_chunk(top); + return 0; } else { - /* Success. Adjust top accordingly. */ - set_head(top, (top_size - extra) | PREV_INUSE); - sbrked_mem -= extra; - check_chunk(top); - return 1; + /* Success. Adjust top accordingly. */ + set_head(top, (top_size - extra) | PREV_INUSE); + sbrked_mem -= extra; + check_chunk(top); + return 1; } } } @@ -3100,9 +3087,9 @@ #ifdef DEBUG check_free_chunk(p); for (q = next_chunk(p); - q < top && inuse(q) && (long)(chunksize(q)) >= (long)MINSIZE; - q = next_chunk(q)) - check_inuse_chunk(q); + q < top && inuse(q) && (long)(chunksize(q)) >= (long)MINSIZE; + q = next_chunk(q)) + check_inuse_chunk(q); #endif avail += chunksize(p); navail++; @@ -3141,14 +3128,14 @@ { malloc_update_mallinfo(); printf("max system bytes = %10u\n", - (unsigned int)(max_total_mem)); + (unsigned int)(max_total_mem)); printf("system bytes = %10u\n", - (unsigned int)(sbrked_mem + mmapped_mem)); + (unsigned int)(sbrked_mem + mmapped_mem)); printf("in use bytes = %10u\n", - (unsigned int)(current_mallinfo.uordblks + mmapped_mem)); + (unsigned int)(current_mallinfo.uordblks + mmapped_mem)); #if HAVE_MMAP printf("max mmap regions = %10u\n", - (unsigned int)max_n_mmaps); + (unsigned int)max_n_mmaps); #endif } #endif /* 0 */ @@ -3214,17 +3201,17 @@ V2.6.6 Sun Dec 5 07:42:19 1999 Doug Lea (dl at gee) * return null for negative arguments * Added Several WIN32 cleanups from Martin C. Fong - * Add 'LACKS_SYS_PARAM_H' for those systems without 'sys/param.h' - (e.g. WIN32 platforms) - * Cleanup up header file inclusion for WIN32 platforms - * Cleanup code to avoid Microsoft Visual C++ compiler complaints - * Add 'USE_DL_PREFIX' to quickly allow co-existence with existing - memory allocation routines - * Set 'malloc_getpagesize' for WIN32 platforms (needs more work) - * Use 'assert' rather than 'ASSERT' in WIN32 code to conform to + * Add 'LACKS_SYS_PARAM_H' for those systems without 'sys/param.h' + (e.g. WIN32 platforms) + * Cleanup up header file inclusion for WIN32 platforms + * Cleanup code to avoid Microsoft Visual C++ compiler complaints + * Add 'USE_DL_PREFIX' to quickly allow co-existence with existing + memory allocation routines + * Set 'malloc_getpagesize' for WIN32 platforms (needs more work) + * Use 'assert' rather than 'ASSERT' in WIN32 code to conform to usage of 'assert' in non-WIN32 code - * Improve WIN32 'sbrk()' emulation's 'findRegion()' routine to - avoid infinite loop + * Improve WIN32 'sbrk()' emulation's 'findRegion()' routine to + avoid infinite loop * Always call 'fREe()' rather than 'free()' V2.6.5 Wed Jun 17 15:57:31 1998 Doug Lea (dl at gee) @@ -3236,13 +3223,13 @@ * Added anonymously donated WIN32 sbrk emulation * Malloc, calloc, getpagesize: add optimizations from Raymond Nijssen * malloc_extend_top: fix mask error that caused wastage after - foreign sbrks + foreign sbrks * Add linux mremap support code from HJ Liu V2.6.2 Tue Dec 5 06:52:55 1995 Doug Lea (dl at gee) * Integrated most documentation with the code. * Add support for mmap, with help from - Wolfram Gloger (Gloger@lrz.uni-muenchen.de). + Wolfram Gloger (Gloger@lrz.uni-muenchen.de). * Use last_remainder in more cases. * Pack bins using idea from colin@nyx10.cs.du.edu * Use ordered bins instead of best-fit threshhold @@ -3250,34 +3237,34 @@ * Support another case of realloc via move into top * Fix error occuring when initial sbrk_base not word-aligned. * Rely on page size for units instead of SBRK_UNIT to - avoid surprises about sbrk alignment conventions. + avoid surprises about sbrk alignment conventions. * Add mallinfo, mallopt. Thanks to Raymond Nijssen - (raymond@es.ele.tue.nl) for the suggestion. + (raymond@es.ele.tue.nl) for the suggestion. * Add `pad' argument to malloc_trim and top_pad mallopt parameter. * More precautions for cases where other routines call sbrk, - courtesy of Wolfram Gloger (Gloger@lrz.uni-muenchen.de). + courtesy of Wolfram Gloger (Gloger@lrz.uni-muenchen.de). * Added macros etc., allowing use in linux libc from - H.J. Lu (hjl@gnu.ai.mit.edu) + H.J. Lu (hjl@gnu.ai.mit.edu) * Inverted this history list V2.6.1 Sat Dec 2 14:10:57 1995 Doug Lea (dl at gee) * Re-tuned and fixed to behave more nicely with V2.6.0 changes. * Removed all preallocation code since under current scheme - the work required to undo bad preallocations exceeds - the work saved in good cases for most test programs. + the work required to undo bad preallocations exceeds + the work saved in good cases for most test programs. * No longer use return list or unconsolidated bins since - no scheme using them consistently outperforms those that don't - given above changes. + no scheme using them consistently outperforms those that don't + given above changes. * Use best fit for very large chunks to prevent some worst-cases. * Added some support for debugging V2.6.0 Sat Nov 4 07:05:23 1995 Doug Lea (dl at gee) * Removed footers when chunks are in use. Thanks to - Paul Wilson (wilson@cs.texas.edu) for the suggestion. + Paul Wilson (wilson@cs.texas.edu) for the suggestion. V2.5.4 Wed Nov 1 07:54:51 1995 Doug Lea (dl at gee) * Added malloc_trim, with help from Wolfram Gloger - (wmglo@Dent.MED.Uni-Muenchen.DE). + (wmglo@Dent.MED.Uni-Muenchen.DE). V2.5.3 Tue Apr 26 10:16:01 1994 Doug Lea (dl at g) @@ -3293,11 +3280,11 @@ V2.5.1 Sat Aug 14 15:40:43 1993 Doug Lea (dl at g) * faster bin computation & slightly different binning * merged all consolidations to one part of malloc proper - (eliminating old malloc_find_space & malloc_clean_bin) + (eliminating old malloc_find_space & malloc_clean_bin) * Scan 2 returns chunks (not just 1) * Propagate failure in realloc if malloc returns 0 * Add stuff to allow compilation on non-ANSI compilers - from kpv@research.att.com + from kpv@research.att.com V2.5 Sat Aug 7 07:41:59 1993 Doug Lea (dl at g.oswego.edu) * removed potential for odd address access in prev_chunk @@ -3305,13 +3292,11 @@ * misc cosmetics and a bit more internal documentation * anticosmetics: mangled names in macros to evade debugger strangeness * tested on sparc, hp-700, dec-mips, rs6000 - with gcc & native cc (hp, dec only) allowing - Detlefs & Zorn comparison study (in SIGPLAN Notices.) + with gcc & native cc (hp, dec only) allowing + Detlefs & Zorn comparison study (in SIGPLAN Notices.) Trial version Fri Aug 28 13:14:29 1992 Doug Lea (dl at g.oswego.edu) * Based loosely on libg++-1.2X malloc. (It retains some of the overall - structure of old version, but most details differ.) + structure of old version, but most details differ.) */ - - diff --git a/common/dlmalloc.src b/common/dlmalloc.src index 12b85bb..32a38bc 100644 --- a/common/dlmalloc.src +++ b/common/dlmalloc.src @@ -8,8 +8,8 @@ * VERSION 2.6.6 Sun Mar 5 19:10:03 2000 Doug Lea (dl at gee) Note: There may be an updated version of this malloc obtainable at - ftp://g.oswego.edu/pub/misc/malloc.c - Check before installing! + ftp://g.oswego.edu/pub/misc/malloc.c + Check before installing! * Why use this malloc? @@ -86,7 +86,7 @@ and status information. Minimum allocated size: 4-byte ptrs: 16 bytes (including 4 overhead) - 8-byte ptrs: 24/32 bytes (including, 4/8 overhead) + 8-byte ptrs: 24/32 bytes (including, 4/8 overhead) When a chunk is freed, 12 (for 4byte ptrs) or 20 (for 8 byte ptrs but 4 byte size) or 24 (for 8/8) additional bytes are @@ -98,7 +98,7 @@ pointer to something of the minimum allocatable size. Maximum allocated size: 4-byte size_t: 2^31 - 8 bytes - 8-byte size_t: 2^63 - 16 bytes + 8-byte size_t: 2^63 - 16 bytes It is assumed that (possibly signed) size_t bit values suffice to represent chunk sizes. `Possibly signed' is due to the fact @@ -114,11 +114,11 @@ make the normal worst-case wastage 15 bytes (i.e., up to 15 more bytes will be allocated than were requested in malloc), with two exceptions: - 1. Because requests for zero bytes allocate non-zero space, - the worst case wastage for a request of zero bytes is 24 bytes. - 2. For requests >= mmap_threshold that are serviced via - mmap(), the worst case wastage is 8 bytes plus the remainder - from a system page (the minimal mmap unit); typically 4096 bytes. + 1. Because requests for zero bytes allocate non-zero space, + the worst case wastage for a request of zero bytes is 24 bytes. + 2. For requests >= mmap_threshold that are serviced via + mmap(), the worst case wastage is 8 bytes plus the remainder + from a system page (the minimal mmap unit); typically 4096 bytes. * Limitations @@ -371,8 +371,8 @@ void* memcpy(void*, const void*, size_t); #else #ifdef WIN32 -// On Win32 platforms, 'memset()' and 'memcpy()' are already declared in -// 'windows.h' +/* On Win32 platforms, 'memset()' and 'memcpy()' are already declared in */ +/* 'windows.h' */ #else Void_t* memset(); Void_t* memcpy(); @@ -392,14 +392,14 @@ if(mzsz <= 9*sizeof(mzsz)) { \ INTERNAL_SIZE_T* mz = (INTERNAL_SIZE_T*) (charp); \ if(mzsz >= 5*sizeof(mzsz)) { *mz++ = 0; \ - *mz++ = 0; \ + *mz++ = 0; \ if(mzsz >= 7*sizeof(mzsz)) { *mz++ = 0; \ - *mz++ = 0; \ - if(mzsz >= 9*sizeof(mzsz)) { *mz++ = 0; \ - *mz++ = 0; }}} \ - *mz++ = 0; \ - *mz++ = 0; \ - *mz = 0; \ + *mz++ = 0; \ + if(mzsz >= 9*sizeof(mzsz)) { *mz++ = 0; \ + *mz++ = 0; }}} \ + *mz++ = 0; \ + *mz++ = 0; \ + *mz = 0; \ } else memset((charp), 0, mzsz); \ } while(0) @@ -410,14 +410,14 @@ INTERNAL_SIZE_T* mcsrc = (INTERNAL_SIZE_T*) (src); \ INTERNAL_SIZE_T* mcdst = (INTERNAL_SIZE_T*) (dest); \ if(mcsz >= 5*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; \ + *mcdst++ = *mcsrc++; \ if(mcsz >= 7*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; \ - if(mcsz >= 9*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; }}} \ - *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; \ - *mcdst = *mcsrc ; \ + *mcdst++ = *mcsrc++; \ + if(mcsz >= 9*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ + *mcdst++ = *mcsrc++; }}} \ + *mcdst++ = *mcsrc++; \ + *mcdst++ = *mcsrc++; \ + *mcdst = *mcsrc ; \ } else memcpy(dest, src, mcsz); \ } while(0) @@ -557,7 +557,6 @@ #endif - /* This version of malloc supports the standard SVID/XPG mallinfo @@ -621,7 +620,6 @@ #define M_MMAP_MAX -4 - #ifndef DEFAULT_TRIM_THRESHOLD #define DEFAULT_TRIM_THRESHOLD (128 * 1024) #endif @@ -685,11 +683,11 @@ retain whenever sbrk is called. It is used in two ways internally: * When sbrk is called to extend the top of the arena to satisfy - a new malloc request, this much padding is added to the sbrk - request. + a new malloc request, this much padding is added to the sbrk + request. * When malloc_trim is called automatically from free(), - it is used as the `pad' argument. + it is used as the `pad' argument. In both cases, the actual amount of padding is rounded so that the end of the arena is always a system page boundary. @@ -735,15 +733,15 @@ However, it has the disadvantages that: - 1. The space cannot be reclaimed, consolidated, and then - used to service later requests, as happens with normal chunks. - 2. It can lead to more wastage because of mmap page alignment - requirements - 3. It causes malloc performance to be more dependent on host - system memory management support routines which may vary in - implementation quality and may impose arbitrary - limitations. Generally, servicing a request via normal - malloc steps is faster than going through a system's mmap. + 1. The space cannot be reclaimed, consolidated, and then + used to service later requests, as happens with normal chunks. + 2. It can lead to more wastage because of mmap page alignment + requirements + 3. It causes malloc performance to be more dependent on host + system memory management support routines which may vary in + implementation quality and may impose arbitrary + limitations. Generally, servicing a request via normal + malloc steps is faster than going through a system's mmap. All together, these considerations should lead you to use mmap only for relatively large requests. @@ -752,7 +750,6 @@ */ - #ifndef DEFAULT_MMAP_MAX #if HAVE_MMAP #define DEFAULT_MMAP_MAX (64) @@ -765,15 +762,15 @@ M_MMAP_MAX is the maximum number of requests to simultaneously service using mmap. This parameter exists because: - 1. Some systems have a limited number of internal tables for - use by mmap. - 2. In most systems, overreliance on mmap can degrade overall - performance. - 3. If a program allocates many large regions, it is probably - better off using normal sbrk-based allocation routines that - can reclaim and reallocate normal heap memory. Using a - small value allows transition into this mode after the - first few allocations. + 1. Some systems have a limited number of internal tables for + use by mmap. + 2. In most systems, overreliance on mmap can degrade overall + performance. + 3. If a program allocates many large regions, it is probably + better off using normal sbrk-based allocation routines that + can reclaim and reallocate normal heap memory. Using a + small value allows transition into this mode after the + first few allocations. Setting to 0 disables all use of mmap. If HAVE_MMAP is not set, the default value is 0, and attempts to set it to non-zero values @@ -781,8 +778,6 @@ */ - - /* USE_DL_PREFIX will prefix all public routines with the string 'dl'. Useful to quickly avoid procedure declaration conflicts and linker @@ -793,8 +788,6 @@ /* #define USE_DL_PREFIX */ - - /* Special defines for linux libc @@ -998,7 +991,7 @@ rval = VirtualFree ((void*)gAddressBase, gNextAddress - gAddressBase, MEM_DECOMMIT); - assert (rval); + assert (rval); } while (head) { @@ -1023,24 +1016,24 @@ return start_address; else { - // Requested region is not available so see if the - // next region is available. Set 'start_address' - // to the next region and call 'VirtualQuery()' - // again. + /* Requested region is not available so see if the */ + /* next region is available. Set 'start_address' */ + /* to the next region and call 'VirtualQuery()' */ + /* again. */ start_address = (char*)info.BaseAddress + info.RegionSize; - // Make sure we start looking for the next region - // on the *next* 64K boundary. Otherwise, even if - // the new region is free according to - // 'VirtualQuery()', the subsequent call to - // 'VirtualAlloc()' (which follows the call to - // this routine in 'wsbrk()') will round *down* - // the requested address to a 64K boundary which - // we already know is an address in the - // unavailable region. Thus, the subsequent call - // to 'VirtualAlloc()' will fail and bring us back - // here, causing us to go into an infinite loop. + /* Make sure we start looking for the next region */ + /* on the *next* 64K boundary. Otherwise, even if */ + /* the new region is free according to */ + /* 'VirtualQuery()', the subsequent call to */ + /* 'VirtualAlloc()' (which follows the call to */ + /* this routine in 'wsbrk()') will round *down* */ + /* the requested address to a 64K boundary which */ + /* we already know is an address in the */ + /* unavailable region. Thus, the subsequent call */ + /* to 'VirtualAlloc()' will fail and bring us back */ + /* here, causing us to go into an infinite loop. */ start_address = (void *) AlignPage64K((unsigned long) start_address); @@ -1077,9 +1070,9 @@ gAddressBase = gNextAddress = (unsigned int)VirtualAlloc (new_address, new_size, MEM_RESERVE, PAGE_NOACCESS); - // repeat in case of race condition - // The region that we found has been snagged - // by another thread + /* repeat in case of race condition */ + /* The region that we found has been snagged */ + /* by another thread */ } while (gAddressBase == 0); @@ -1167,17 +1160,17 @@ chunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Size of previous chunk, if allocated | | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Size of chunk, in bytes |P| + | Size of previous chunk, if allocated | | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Size of chunk, in bytes |P| mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | User data starts here... . - . . - . (malloc_usable_space() bytes) . - . | + | User data starts here... . + . . + . (malloc_usable_space() bytes) . + . | nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Size of chunk | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Size of chunk | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ Where "chunk" is the front of the chunk for the purpose of most of @@ -1191,20 +1184,20 @@ Free chunks are stored in circular doubly-linked lists, and look like this: chunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Size of previous chunk | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Size of previous chunk | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ `head:' | Size of chunk, in bytes |P| mem-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Forward pointer to next chunk in list | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Back pointer to previous chunk in list | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ - | Unused space (may be 0 bytes long) . - . . - . | + | Forward pointer to next chunk in list | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Back pointer to previous chunk in list | + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + | Unused space (may be 0 bytes long) . + . . + . | nextchunk-> +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ `foot:' | Size of chunk, in bytes | - +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ + +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ The P (PREV_INUSE) bit, stored in the unused low-order bit of the chunk size (which is always a multiple of two words), is an in-use @@ -1221,16 +1214,16 @@ The two exceptions to all this are 1. The special chunk `top', which doesn't bother using the - trailing size field since there is no - next contiguous chunk that would have to index off it. (After - initialization, `top' is forced to always exist. If it would - become less than MINSIZE bytes long, it is replenished via - malloc_extend_top.) + trailing size field since there is no + next contiguous chunk that would have to index off it. (After + initialization, `top' is forced to always exist. If it would + become less than MINSIZE bytes long, it is replenished via + malloc_extend_top.) 2. Chunks allocated via mmap, which have the second-lowest-order - bit (IS_MMAPPED) set in their size fields. Because they are - never merged or traversed from any other chunk, they have no - foot size or inuse information. + bit (IS_MMAPPED) set in their size fields. Because they are + never merged or traversed from any other chunk, they have no + foot size or inuse information. Available chunks are kept in any of several places (all declared below): @@ -1273,7 +1266,6 @@ */ - @@ -1506,7 +1498,7 @@ ((((unsigned long)(sz)) >> 9) <= 84) ? 110 + (((unsigned long)(sz)) >> 12): \ ((((unsigned long)(sz)) >> 9) <= 340) ? 119 + (((unsigned long)(sz)) >> 15): \ ((((unsigned long)(sz)) >> 9) <= 1364) ? 124 + (((unsigned long)(sz)) >> 18): \ - 126) + 126) /* bins for chunks < 512 are all spaced 8 bytes apart, and hold identically sized chunks. This is exploited in malloc. @@ -1794,7 +1786,6 @@ (last_remainder->fd = last_remainder->bk = last_remainder) - @@ -1995,7 +1986,7 @@ /* Guarantee the next brk will be at a page boundary */ correction += ((((unsigned long)(brk + sbrk_size))+(pagesz-1)) & - ~(pagesz - 1)) - ((unsigned long)(brk + sbrk_size)); + ~(pagesz - 1)) - ((unsigned long)(brk + sbrk_size)); /* Allocate correction */ new_brk = (char*)(MORECORE (correction)); @@ -2016,20 +2007,20 @@ /* If not enough space to do this, then user did something very wrong */ if (old_top_size < MINSIZE) { - set_head(top, PREV_INUSE); /* will force null return from malloc */ - return; + set_head(top, PREV_INUSE); /* will force null return from malloc */ + return; } /* Also keep size a multiple of MALLOC_ALIGNMENT */ old_top_size = (old_top_size - 3*SIZE_SZ) & ~MALLOC_ALIGN_MASK; set_head_size(old_top, old_top_size); chunk_at_offset(old_top, old_top_size )->size = - SIZE_SZ|PREV_INUSE; + SIZE_SZ|PREV_INUSE; chunk_at_offset(old_top, old_top_size + SIZE_SZ)->size = - SIZE_SZ|PREV_INUSE; + SIZE_SZ|PREV_INUSE; /* If possible, release the rest. */ if (old_top_size >= MINSIZE) - fREe(chunk2mem(old_top)); + fREe(chunk2mem(old_top)); } } @@ -2060,43 +2051,43 @@ From there, the first successful of the following steps is taken: 1. The bin corresponding to the request size is scanned, and if - a chunk of exactly the right size is found, it is taken. + a chunk of exactly the right size is found, it is taken. 2. The most recently remaindered chunk is used if it is big - enough. This is a form of (roving) first fit, used only in - the absence of exact fits. Runs of consecutive requests use - the remainder of the chunk used for the previous such request - whenever possible. This limited use of a first-fit style - allocation strategy tends to give contiguous chunks - coextensive lifetimes, which improves locality and can reduce - fragmentation in the long run. + enough. This is a form of (roving) first fit, used only in + the absence of exact fits. Runs of consecutive requests use + the remainder of the chunk used for the previous such request + whenever possible. This limited use of a first-fit style + allocation strategy tends to give contiguous chunks + coextensive lifetimes, which improves locality and can reduce + fragmentation in the long run. 3. Other bins are scanned in increasing size order, using a - chunk big enough to fulfill the request, and splitting off - any remainder. This search is strictly by best-fit; i.e., - the smallest (with ties going to approximately the least - recently used) chunk that fits is selected. + chunk big enough to fulfill the request, and splitting off + any remainder. This search is strictly by best-fit; i.e., + the smallest (with ties going to approximately the least + recently used) chunk that fits is selected. 4. If large enough, the chunk bordering the end of memory - (`top') is split off. (This use of `top' is in accord with - the best-fit search rule. In effect, `top' is treated as - larger (and thus less well fitting) than any other available - chunk since it can be extended to be as large as necessary - (up to system limitations). + (`top') is split off. (This use of `top' is in accord with + the best-fit search rule. In effect, `top' is treated as + larger (and thus less well fitting) than any other available + chunk since it can be extended to be as large as necessary + (up to system limitations). 5. If the request size meets the mmap threshold and the - system supports mmap, and there are few enough currently - allocated mmapped regions, and a call to mmap succeeds, - the request is allocated via direct memory mapping. + system supports mmap, and there are few enough currently + allocated mmapped regions, and a call to mmap succeeds, + the request is allocated via direct memory mapping. 6. Otherwise, the top of memory is extended by - obtaining more space from the system (normally using sbrk, - but definable to anything else via the MORECORE macro). - Memory is gathered from the system (in system page-sized - units) in a way that allows chunks obtained across different - sbrk calls to be consolidated, but does not require - contiguous memory. Thus, it should be safe to intersperse - mallocs with other sbrk calls. + obtaining more space from the system (normally using sbrk, + but definable to anything else via the MORECORE macro). + Memory is gathered from the system (in system page-sized + units) in a way that allows chunks obtained across different + sbrk calls to be consolidated, but does not require + contiguous memory. Thus, it should be safe to intersperse + mallocs with other sbrk calls. All allocations are made from the the `lowest' part of any found @@ -2173,16 +2164,16 @@ if (remainder_size >= (long)MINSIZE) /* too big */ { - --idx; /* adjust to rescan below after checking last remainder */ - break; + --idx; /* adjust to rescan below after checking last remainder */ + break; } else if (remainder_size >= 0) /* exact fit */ { - unlink(victim, bck, fwd); - set_inuse_bit_at_offset(victim, victim_size); - check_malloced_chunk(victim, nb); - return chunk2mem(victim); + unlink(victim, bck, fwd); + set_inuse_bit_at_offset(victim, victim_size); + check_malloced_chunk(victim, nb); + return chunk2mem(victim); } } @@ -2239,8 +2230,8 @@ block <<= 1; while ((block & binblocks) == 0) { - idx += BINBLOCKWIDTH; - block <<= 1; + idx += BINBLOCKWIDTH; + block <<= 1; } } @@ -2253,34 +2244,34 @@ /* For each bin in this block ... */ do { - /* Find and use first big enough chunk ... */ + /* Find and use first big enough chunk ... */ - for (victim = last(bin); victim != bin; victim = victim->bk) - { - victim_size = chunksize(victim); - remainder_size = victim_size - nb; + for (victim = last(bin); victim != bin; victim = victim->bk) + { + victim_size = chunksize(victim); + remainder_size = victim_size - nb; - if (remainder_size >= (long)MINSIZE) /* split */ - { - remainder = chunk_at_offset(victim, nb); - set_head(victim, nb | PREV_INUSE); - unlink(victim, bck, fwd); - link_last_remainder(remainder); - set_head(remainder, remainder_size | PREV_INUSE); - set_foot(remainder, remainder_size); - check_malloced_chunk(victim, nb); - return chunk2mem(victim); - } + if (remainder_size >= (long)MINSIZE) /* split */ + { + remainder = chunk_at_offset(victim, nb); + set_head(victim, nb | PREV_INUSE); + unlink(victim, bck, fwd); + link_last_remainder(remainder); + set_head(remainder, remainder_size | PREV_INUSE); + set_foot(remainder, remainder_size); + check_malloced_chunk(victim, nb); + return chunk2mem(victim); + } - else if (remainder_size >= 0) /* take */ - { - set_inuse_bit_at_offset(victim, victim_size); - unlink(victim, bck, fwd); - check_malloced_chunk(victim, nb); - return chunk2mem(victim); - } + else if (remainder_size >= 0) /* take */ + { + set_inuse_bit_at_offset(victim, victim_size); + unlink(victim, bck, fwd); + check_malloced_chunk(victim, nb); + return chunk2mem(victim); + } - } + } bin = next_bin(bin); @@ -2290,12 +2281,12 @@ do /* Possibly backtrack to try to clear a partial block */ { - if ((startidx & (BINBLOCKWIDTH - 1)) == 0) - { - binblocks &= ~block; - break; - } - --startidx; + if ((startidx & (BINBLOCKWIDTH - 1)) == 0) + { + binblocks &= ~block; + break; + } + --startidx; q = prev_bin(q); } while (first(q) == q); @@ -2303,14 +2294,14 @@ if ( (block <<= 1) <= binblocks && (block != 0) ) { - while ((block & binblocks) == 0) - { - idx += BINBLOCKWIDTH; - block <<= 1; - } + while ((block & binblocks) == 0) + { + idx += BINBLOCKWIDTH; + block <<= 1; + } } else - break; + break; } } @@ -2324,7 +2315,7 @@ #if HAVE_MMAP /* If big and would otherwise need to extend, try to use mmap instead */ if ((unsigned long)nb >= (unsigned long)mmap_threshold && - (victim = mmap_chunk(nb)) != 0) + (victim = mmap_chunk(nb)) != 0) return chunk2mem(victim); #endif @@ -2357,13 +2348,13 @@ 2. If the chunk was allocated via mmap, it is release via munmap(). 3. If a returned chunk borders the current high end of memory, - it is consolidated into the top, and if the total unused - topmost memory exceeds the trim threshold, malloc_trim is - called. + it is consolidated into the top, and if the total unused + topmost memory exceeds the trim threshold, malloc_trim is + called. 4. Other chunks are consolidated as they arrive, and - placed in corresponding bins. (This includes the case of - consolidating with the current `last_remainder'). + placed in corresponding bins. (This includes the case of + consolidating with the current `last_remainder'). */ @@ -2575,22 +2566,22 @@ /* Forward into top only if a remainder */ if (next == top) { - if ((long)(nextsize + newsize) >= (long)(nb + MINSIZE)) - { - newsize += nextsize; - top = chunk_at_offset(oldp, nb); - set_head(top, (newsize - nb) | PREV_INUSE); - set_head_size(oldp, nb); - return chunk2mem(oldp); - } + if ((long)(nextsize + newsize) >= (long)(nb + MINSIZE)) + { + newsize += nextsize; + top = chunk_at_offset(oldp, nb); + set_head(top, (newsize - nb) | PREV_INUSE); + set_head_size(oldp, nb); + return chunk2mem(oldp); + } } /* Forward into next chunk */ else if (((long)(nextsize + newsize) >= (long)(nb))) { - unlink(next, bck, fwd); - newsize += nextsize; - goto split; + unlink(next, bck, fwd); + newsize += nextsize; + goto split; } } else @@ -2610,45 +2601,45 @@ if (next != 0) { - /* into top */ - if (next == top) - { - if ((long)(nextsize + prevsize + newsize) >= (long)(nb + MINSIZE)) - { - unlink(prev, bck, fwd); - newp = prev; - newsize += prevsize + nextsize; - newmem = chunk2mem(newp); - MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); - top = chunk_at_offset(newp, nb); - set_head(top, (newsize - nb) | PREV_INUSE); - set_head_size(newp, nb); - return newmem; - } - } + /* into top */ + if (next == top) + { + if ((long)(nextsize + prevsize + newsize) >= (long)(nb + MINSIZE)) + { + unlink(prev, bck, fwd); + newp = prev; + newsize += prevsize + nextsize; + newmem = chunk2mem(newp); + MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); + top = chunk_at_offset(newp, nb); + set_head(top, (newsize - nb) | PREV_INUSE); + set_head_size(newp, nb); + return newmem; + } + } - /* into next chunk */ - else if (((long)(nextsize + prevsize + newsize) >= (long)(nb))) - { - unlink(next, bck, fwd); - unlink(prev, bck, fwd); - newp = prev; - newsize += nextsize + prevsize; - newmem = chunk2mem(newp); - MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); - goto split; - } + /* into next chunk */ + else if (((long)(nextsize + prevsize + newsize) >= (long)(nb))) + { + unlink(next, bck, fwd); + unlink(prev, bck, fwd); + newp = prev; + newsize += nextsize + prevsize; + newmem = chunk2mem(newp); + MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); + goto split; + } } /* backward only */ if (prev != 0 && (long)(prevsize + newsize) >= (long)nb) { - unlink(prev, bck, fwd); - newp = prev; - newsize += prevsize; - newmem = chunk2mem(newp); - MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); - goto split; + unlink(prev, bck, fwd); + newp = prev; + newsize += prevsize; + newmem = chunk2mem(newp); + MALLOC_COPY(newmem, oldmem, oldsize - SIZE_SZ); + goto split; } } @@ -2980,25 +2971,25 @@ if (new_brk == (char*)(MORECORE_FAILURE)) /* sbrk failed? */ { - /* Try to figure out what we have */ - current_brk = (char*)(MORECORE (0)); - top_size = current_brk - (char*)top; - if (top_size >= (long)MINSIZE) /* if not, we are very very dead! */ - { - sbrked_mem = current_brk - sbrk_base; - set_head(top, top_size | PREV_INUSE); - } - check_chunk(top); - return 0; + /* Try to figure out what we have */ + current_brk = (char*)(MORECORE (0)); + top_size = current_brk - (char*)top; + if (top_size >= (long)MINSIZE) /* if not, we are very very dead! */ + { + sbrked_mem = current_brk - sbrk_base; + set_head(top, top_size | PREV_INUSE); + } + check_chunk(top); + return 0; } else { - /* Success. Adjust top accordingly. */ - set_head(top, (top_size - extra) | PREV_INUSE); - sbrked_mem -= extra; - check_chunk(top); - return 1; + /* Success. Adjust top accordingly. */ + set_head(top, (top_size - extra) | PREV_INUSE); + sbrked_mem -= extra; + check_chunk(top); + return 1; } } } @@ -3064,9 +3055,9 @@ #if DEBUG check_free_chunk(p); for (q = next_chunk(p); - q < top && inuse(q) && (long)(chunksize(q)) >= (long)MINSIZE; - q = next_chunk(q)) - check_inuse_chunk(q); + q < top && inuse(q) && (long)(chunksize(q)) >= (long)MINSIZE; + q = next_chunk(q)) + check_inuse_chunk(q); #endif avail += chunksize(p); navail++; @@ -3103,14 +3094,14 @@ { malloc_update_mallinfo(); fprintf(stderr, "max system bytes = %10u\n", - (unsigned int)(max_total_mem)); + (unsigned int)(max_total_mem)); fprintf(stderr, "system bytes = %10u\n", - (unsigned int)(sbrked_mem + mmapped_mem)); + (unsigned int)(sbrked_mem + mmapped_mem)); fprintf(stderr, "in use bytes = %10u\n", - (unsigned int)(current_mallinfo.uordblks + mmapped_mem)); + (unsigned int)(current_mallinfo.uordblks + mmapped_mem)); #if HAVE_MMAP fprintf(stderr, "max mmap regions = %10u\n", - (unsigned int)max_n_mmaps); + (unsigned int)max_n_mmaps); #endif } @@ -3173,17 +3164,17 @@ V2.6.6 Sun Dec 5 07:42:19 1999 Doug Lea (dl at gee) * return null for negative arguments * Added Several WIN32 cleanups from Martin C. Fong - * Add 'LACKS_SYS_PARAM_H' for those systems without 'sys/param.h' - (e.g. WIN32 platforms) - * Cleanup up header file inclusion for WIN32 platforms - * Cleanup code to avoid Microsoft Visual C++ compiler complaints - * Add 'USE_DL_PREFIX' to quickly allow co-existence with existing - memory allocation routines - * Set 'malloc_getpagesize' for WIN32 platforms (needs more work) - * Use 'assert' rather than 'ASSERT' in WIN32 code to conform to + * Add 'LACKS_SYS_PARAM_H' for those systems without 'sys/param.h' + (e.g. WIN32 platforms) + * Cleanup up header file inclusion for WIN32 platforms + * Cleanup code to avoid Microsoft Visual C++ compiler complaints + * Add 'USE_DL_PREFIX' to quickly allow co-existence with existing + memory allocation routines + * Set 'malloc_getpagesize' for WIN32 platforms (needs more work) + * Use 'assert' rather than 'ASSERT' in WIN32 code to conform to usage of 'assert' in non-WIN32 code - * Improve WIN32 'sbrk()' emulation's 'findRegion()' routine to - avoid infinite loop + * Improve WIN32 'sbrk()' emulation's 'findRegion()' routine to + avoid infinite loop * Always call 'fREe()' rather than 'free()' V2.6.5 Wed Jun 17 15:57:31 1998 Doug Lea (dl at gee) @@ -3195,13 +3186,13 @@ * Added anonymously donated WIN32 sbrk emulation * Malloc, calloc, getpagesize: add optimizations from Raymond Nijssen * malloc_extend_top: fix mask error that caused wastage after - foreign sbrks + foreign sbrks * Add linux mremap support code from HJ Liu V2.6.2 Tue Dec 5 06:52:55 1995 Doug Lea (dl at gee) * Integrated most documentation with the code. * Add support for mmap, with help from - Wolfram Gloger (Gloger@lrz.uni-muenchen.de). + Wolfram Gloger (Gloger@lrz.uni-muenchen.de). * Use last_remainder in more cases. * Pack bins using idea from colin@nyx10.cs.du.edu * Use ordered bins instead of best-fit threshhold @@ -3209,34 +3200,34 @@ * Support another case of realloc via move into top * Fix error occuring when initial sbrk_base not word-aligned. * Rely on page size for units instead of SBRK_UNIT to - avoid surprises about sbrk alignment conventions. + avoid surprises about sbrk alignment conventions. * Add mallinfo, mallopt. Thanks to Raymond Nijssen - (raymond@es.ele.tue.nl) for the suggestion. + (raymond@es.ele.tue.nl) for the suggestion. * Add `pad' argument to malloc_trim and top_pad mallopt parameter. * More precautions for cases where other routines call sbrk, - courtesy of Wolfram Gloger (Gloger@lrz.uni-muenchen.de). + courtesy of Wolfram Gloger (Gloger@lrz.uni-muenchen.de). * Added macros etc., allowing use in linux libc from - H.J. Lu (hjl@gnu.ai.mit.edu) + H.J. Lu (hjl@gnu.ai.mit.edu) * Inverted this history list V2.6.1 Sat Dec 2 14:10:57 1995 Doug Lea (dl at gee) * Re-tuned and fixed to behave more nicely with V2.6.0 changes. * Removed all preallocation code since under current scheme - the work required to undo bad preallocations exceeds - the work saved in good cases for most test programs. + the work required to undo bad preallocations exceeds + the work saved in good cases for most test programs. * No longer use return list or unconsolidated bins since - no scheme using them consistently outperforms those that don't - given above changes. + no scheme using them consistently outperforms those that don't + given above changes. * Use best fit for very large chunks to prevent some worst-cases. * Added some support for debugging V2.6.0 Sat Nov 4 07:05:23 1995 Doug Lea (dl at gee) * Removed footers when chunks are in use. Thanks to - Paul Wilson (wilson@cs.texas.edu) for the suggestion. + Paul Wilson (wilson@cs.texas.edu) for the suggestion. V2.5.4 Wed Nov 1 07:54:51 1995 Doug Lea (dl at gee) * Added malloc_trim, with help from Wolfram Gloger - (wmglo@Dent.MED.Uni-Muenchen.DE). + (wmglo@Dent.MED.Uni-Muenchen.DE). V2.5.3 Tue Apr 26 10:16:01 1994 Doug Lea (dl at g) @@ -3252,11 +3243,11 @@ V2.5.1 Sat Aug 14 15:40:43 1993 Doug Lea (dl at g) * faster bin computation & slightly different binning * merged all consolidations to one part of malloc proper - (eliminating old malloc_find_space & malloc_clean_bin) + (eliminating old malloc_find_space & malloc_clean_bin) * Scan 2 returns chunks (not just 1) * Propagate failure in realloc if malloc returns 0 * Add stuff to allow compilation on non-ANSI compilers - from kpv@research.att.com + from kpv@research.att.com V2.5 Sat Aug 7 07:41:59 1993 Doug Lea (dl at g.oswego.edu) * removed potential for odd address access in prev_chunk @@ -3264,13 +3255,11 @@ * misc cosmetics and a bit more internal documentation * anticosmetics: mangled names in macros to evade debugger strangeness * tested on sparc, hp-700, dec-mips, rs6000 - with gcc & native cc (hp, dec only) allowing - Detlefs & Zorn comparison study (in SIGPLAN Notices.) + with gcc & native cc (hp, dec only) allowing + Detlefs & Zorn comparison study (in SIGPLAN Notices.) Trial version Fri Aug 28 13:14:29 1992 Doug Lea (dl at g.oswego.edu) * Based loosely on libg++-1.2X malloc. (It retains some of the overall - structure of old version, but most details differ.) + structure of old version, but most details differ.) */ - - diff --git a/common/docecc.c b/common/docecc.c index 74ac741..cf45e0f 100644 --- a/common/docecc.c +++ b/common/docecc.c @@ -98,30 +98,30 @@ /* generate GF(2**m) from the irreducible polynomial p(X) in Pp[0]..Pp[m] lookup tables: index->polynomial form alpha_to[] contains j=alpha**i; - polynomial form -> index form index_of[j=alpha**i] = i + polynomial form -> index form index_of[j=alpha**i] = i alpha=2 is the primitive element of GF(2**m) HARI's COMMENT: (4/13/94) alpha_to[] can be used as follows: - Let @ represent the primitive element commonly called "alpha" that + Let @ represent the primitive element commonly called "alpha" that is the root of the primitive polynomial p(x). Then in GF(2^m), for any 0 <= i <= 2^m-2, - @^i = a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1) + @^i = a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1) where the binary vector (a(0),a(1),a(2),...,a(m-1)) is the representation of the integer "alpha_to[i]" with a(0) being the LSB and a(m-1) the MSB. Thus for example the polynomial representation of @^5 would be given by the binary representation of the integer "alpha_to[5]". - Similarily, index_of[] can be used as follows: - As above, let @ represent the primitive element of GF(2^m) that is + Similarily, index_of[] can be used as follows: + As above, let @ represent the primitive element of GF(2^m) that is the root of the primitive polynomial p(x). In order to find the power of @ (alpha) that has the polynomial representation - a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1) + a(0) + a(1) @ + a(2) @^2 + ... + a(m-1) @^(m-1) we consider the integer "i" whose binary representation with a(0) being LSB and a(m-1) MSB is (a(0),a(1),...,a(m-1)) and locate the entry "index_of[i]". Now, @^index_of[i] is that element whose polynomial representation is (a(0),a(1),a(2),...,a(m-1)). NOTE: - The element alpha_to[2^m-1] = 0 always signifying that the + The element alpha_to[2^m-1] = 0 always signifying that the representation of "@^infinity" = 0 is (0,0,0,...,0). - Similarily, the element index_of[0] = A0 always signifying + Similarily, the element index_of[0] = A0 always signifying that the power of alpha which has the polynomial representation (0,0,...,0) is "infinity". @@ -183,8 +183,8 @@ * */ static int eras_dec_rs(dtype Alpha_to[NN + 1], dtype Index_of[NN + 1], - gf bb[NN - KK + 1], gf eras_val[NN-KK], int eras_pos[NN-KK], - int no_eras) + gf bb[NN - KK + 1], gf eras_val[NN-KK], int eras_pos[NN-KK], + int no_eras) { int deg_lambda, el, deg_omega; int i, j, r,k; @@ -225,7 +225,7 @@ for(i=1;i<=NN-KK;i++) { tmp = Index_of[s[i]]; if (tmp != A0) - tmp = modnn(tmp + 2 * KK * (B0+i-1)*PRIM); + tmp = modnn(tmp + 2 * KK * (B0+i-1)*PRIM); s[i] = tmp; } @@ -412,9 +412,9 @@ } /* Apply error to data */ if (num1 != 0) { - eras_val[j] = Alpha_to[modnn(Index_of[num1] + Index_of[num2] + NN - Index_of[den])]; + eras_val[j] = Alpha_to[modnn(Index_of[num1] + Index_of[num2] + NN - Index_of[den])]; } else { - eras_val[j] = 0; + eras_val[j] = 0; } } finish: @@ -447,12 +447,12 @@ /* init log and exp tables here to save memory. However, it is slower */ Alpha_to = malloc((NN + 1) * sizeof(dtype)); if (!Alpha_to) - return -1; + return -1; Index_of = malloc((NN + 1) * sizeof(dtype)); if (!Index_of) { - free(Alpha_to); - return -1; + free(Alpha_to); + return -1; } generate_gf(Alpha_to, Index_of); @@ -465,48 +465,48 @@ bb[3] = ((ecc1[3] & 0xc0) >> 6) | ((ecc1[0] & 0xff) << 2); nb_errors = eras_dec_rs(Alpha_to, Index_of, bb, - error_val, error_pos, 0); + error_val, error_pos, 0); if (nb_errors <= 0) - goto the_end; + goto the_end; /* correct the errors */ for(i=0;i= NB_DATA && pos < KK) { - nb_errors = -1; - goto the_end; - } - if (pos < NB_DATA) { - /* extract bit position (MSB first) */ - pos = 10 * (NB_DATA - 1 - pos) - 6; - /* now correct the following 10 bits. At most two bytes - can be modified since pos is even */ - index = (pos >> 3) ^ 1; - bitpos = pos & 7; - if ((index >= 0 && index < SECTOR_SIZE) || - index == (SECTOR_SIZE + 1)) { - val = error_val[i] >> (2 + bitpos); - parity ^= val; - if (index < SECTOR_SIZE) - sector[index] ^= val; - } - index = ((pos >> 3) + 1) ^ 1; - bitpos = (bitpos + 10) & 7; - if (bitpos == 0) - bitpos = 8; - if ((index >= 0 && index < SECTOR_SIZE) || - index == (SECTOR_SIZE + 1)) { - val = error_val[i] << (8 - bitpos); - parity ^= val; - if (index < SECTOR_SIZE) - sector[index] ^= val; - } - } + pos = error_pos[i]; + if (pos >= NB_DATA && pos < KK) { + nb_errors = -1; + goto the_end; + } + if (pos < NB_DATA) { + /* extract bit position (MSB first) */ + pos = 10 * (NB_DATA - 1 - pos) - 6; + /* now correct the following 10 bits. At most two bytes + can be modified since pos is even */ + index = (pos >> 3) ^ 1; + bitpos = pos & 7; + if ((index >= 0 && index < SECTOR_SIZE) || + index == (SECTOR_SIZE + 1)) { + val = error_val[i] >> (2 + bitpos); + parity ^= val; + if (index < SECTOR_SIZE) + sector[index] ^= val; + } + index = ((pos >> 3) + 1) ^ 1; + bitpos = (bitpos + 10) & 7; + if (bitpos == 0) + bitpos = 8; + if ((index >= 0 && index < SECTOR_SIZE) || + index == (SECTOR_SIZE + 1)) { + val = error_val[i] << (8 - bitpos); + parity ^= val; + if (index < SECTOR_SIZE) + sector[index] ^= val; + } + } } /* use parity to test extra errors */ if ((parity & 0xff) != 0) - nb_errors = -1; + nb_errors = -1; the_end: free(Alpha_to); diff --git a/common/env_common.c b/common/env_common.c index ea08501..e7ee499 100644 --- a/common/env_common.c +++ b/common/env_common.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include diff --git a/common/env_eeprom.c b/common/env_eeprom.c index 9f1d82a..300af6f 100644 --- a/common/env_eeprom.c +++ b/common/env_eeprom.c @@ -30,7 +30,6 @@ #include #include -#include #include #include diff --git a/common/env_flash.c b/common/env_flash.c index 426d01b..af99880 100644 --- a/common/env_flash.c +++ b/common/env_flash.c @@ -32,7 +32,6 @@ #include #include -#include #include #include @@ -185,14 +184,14 @@ debug ("Data to save 0x%x\n", up_data); if (up_data) { if ((saved_data = malloc(up_data)) == NULL) { - printf("Unable to save the rest of sector (%ld)\n", + printf("Unable to save the rest of sector (%ld)\n", up_data); goto Done; } - memcpy(saved_data, + memcpy(saved_data, (void *)((long)flash_addr_new + CFG_ENV_SIZE), up_data); - debug ("Data (start 0x%x, len 0x%x) saved at 0x%x\n", - (long)flash_addr_new + CFG_ENV_SIZE, + debug ("Data (start 0x%x, len 0x%x) saved at 0x%x\n", + (long)flash_addr_new + CFG_ENV_SIZE, up_data, saved_data); } #endif @@ -209,19 +208,19 @@ (ulong)&(flash_addr_new->data), sizeof(env_ptr->data)+(ulong)&(flash_addr_new->data)); if (flash_write(env_ptr->data, - (ulong)&(flash_addr_new->data), + (ulong)&(flash_addr_new->data), sizeof(env_ptr->data)) || flash_write((char *)&(env_ptr->crc), - (ulong)&(flash_addr_new->crc), + (ulong)&(flash_addr_new->crc), sizeof(env_ptr->crc)) || flash_write((char *)&obsolete_flag, - (ulong)&(flash_addr->flags), + (ulong)&(flash_addr->flags), sizeof(flash_addr->flags)) || flash_write((char *)&active_flag, - (ulong)&(flash_addr_new->flags), + (ulong)&(flash_addr_new->flags), sizeof(flash_addr_new->flags))) { flash_perror (rc); @@ -233,8 +232,8 @@ if (up_data) { /* restore the rest of sector */ debug ("Restoring the rest of data to 0x%x len 0x%x\n", (long)flash_addr_new + CFG_ENV_SIZE, up_data); - if (flash_write(saved_data, - (long)flash_addr_new + CFG_ENV_SIZE, + if (flash_write(saved_data, + (long)flash_addr_new + CFG_ENV_SIZE, up_data)) { flash_perror(rc); goto Done; @@ -381,8 +380,8 @@ gd->env_valid = 2; flash_sect_protect (0, (ulong)flash_addr_new, end_addr_new); flash_write((char *)&obsolete_flag, - (ulong)&(flash_addr_new->flags), - sizeof(flash_addr_new->flags)); + (ulong)&(flash_addr_new->flags), + sizeof(flash_addr_new->flags)); flash_sect_protect (1, (ulong)flash_addr_new, end_addr_new); } @@ -392,8 +391,8 @@ gd->env_valid = 2; flash_sect_protect (0, (ulong)flash_addr, end_addr); flash_write((char *)&active_flag, - (ulong)&(flash_addr->flags), - sizeof(flash_addr->flags)); + (ulong)&(flash_addr->flags), + sizeof(flash_addr->flags)); flash_sect_protect (1, (ulong)flash_addr, end_addr); } diff --git a/common/env_nvram.c b/common/env_nvram.c index 76e8438..2c831d1 100644 --- a/common/env_nvram.c +++ b/common/env_nvram.c @@ -46,7 +46,6 @@ #include #include -#include #include #include diff --git a/common/fpga.c b/common/fpga.c index c5975bc..c41c6f8 100644 --- a/common/fpga.c +++ b/common/fpga.c @@ -55,7 +55,7 @@ /* Local static functions */ static const fpga_desc * const fpga_get_desc( int devnum ); static const fpga_desc * const fpga_validate( int devnum, void *buf, - size_t bsize, char *fn ); + size_t bsize, char *fn ); static int fpga_dev_info( int devnum ); @@ -100,7 +100,7 @@ * generic parameter checking code */ static const fpga_desc * const fpga_validate( int devnum, void *buf, - size_t bsize, char *fn ) + size_t bsize, char *fn ) { const fpga_desc * const desc = fpga_get_desc( devnum ); diff --git a/common/hush.c b/common/hush.c index 1993398..dbb952d 100644 --- a/common/hush.c +++ b/common/hush.c @@ -94,7 +94,8 @@ #include /* readline */ #include #include /* find_cmd */ -#include /* do_bootd */ +/*cmd_boot.c*/ +extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* do_bootd */ #endif #ifdef CFG_HUSH_PARSER #ifndef __U_BOOT__ @@ -1048,12 +1049,12 @@ i->p = the_command; } else { - if (console_buffer[0] != '\n') { - if (strlen(the_command) + strlen(console_buffer) + if (console_buffer[0] != '\n') { + if (strlen(the_command) + strlen(console_buffer) < CFG_CBSIZE) { - n = strlen(the_command); - the_command[n-1] = ' '; - strcpy(&the_command[n],console_buffer); + n = strlen(the_command); + the_command[n-1] = ' '; + strcpy(&the_command[n],console_buffer); } else { the_command[0] = '\n'; @@ -1257,8 +1258,8 @@ if (p != child->argv[i]) free(p); } child->argv+=i; /* XXX this hack isn't so horrible, since we are about - to exit, and therefore don't need to keep data - structures consistent for free() use. */ + to exit, and therefore don't need to keep data + structures consistent for free() use. */ /* If a variable is assigned in a forest, and nobody listens, * was it ever really set? */ @@ -1648,14 +1649,18 @@ child->argv[i]); return -1; } - /* Look up command in command table */ + /* Look up command in command table */ + + if ((cmdtp = find_cmd(child->argv[i])) == NULL) { printf ("Unknown command '%s' - try 'help'\n", child->argv[i]); return -1; /* give up after bad command */ } else { int rcode; #if (CONFIG_COMMANDS & CFG_CMD_BOOTD) - /* avoid "bootd" recursion */ + extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + + /* avoid "bootd" recursion */ if (cmdtp->cmd == do_bootd) { if (flag & CMD_FLAG_BOOTD) { printf ("'bootd' recursion detected\n"); @@ -1665,7 +1670,7 @@ flag |= CMD_FLAG_BOOTD; } #endif /* CFG_CMD_BOOTD */ - /* found - check max args */ + /* found - check max args */ if ((child->argc - i) > cmdtp->maxargs) { printf ("Usage:\n%s\n", cmdtp->usage); return -1; @@ -1676,15 +1681,20 @@ rcode = x->function(child); #else /* OK - call function to do the command */ + rcode = (cmdtp->cmd) - (cmdtp, flag,child->argc-i,&child->argv[i]); +(cmdtp, flag,child->argc-i,&child->argv[i]); if ( !cmdtp->repeatable ) flag_repeat = 0; + + #endif child->argv-=i; /* XXX restore hack so free() can work right */ #ifndef __U_BOOT__ + restore_redirects(squirrel); #endif + return rcode; } } @@ -1965,11 +1975,11 @@ #ifndef __U_BOOT__ globfree(&child->glob_result); #else - for (a = child->argc;a >= 0;a--) { - free(child->argv[a]); - } + for (a = child->argc;a >= 0;a--) { + free(child->argv[a]); + } free(child->argv); - child->argc = 0; + child->argc = 0; #endif child->argv=NULL; } else if (child->group) { @@ -2103,17 +2113,17 @@ { int gr; - /* short-circuit for null word */ + /* short-circuit for null word */ /* we can code this better when the debug_printf's are gone */ - if (dest->length == 0) { - if (dest->nonnull) { - /* bash man page calls this an "explicit" null */ - gr = globhack(dest->data, flags, pglob); - debug_printf("globhack returned %d\n",gr); - } else { + if (dest->length == 0) { + if (dest->nonnull) { + /* bash man page calls this an "explicit" null */ + gr = globhack(dest->data, flags, pglob); + debug_printf("globhack returned %d\n",gr); + } else { return 0; } - } else if (glob_needed(dest->data)) { + } else if (glob_needed(dest->data)) { gr = glob(dest->data, flags, NULL, pglob); debug_printf("glob returned %d\n",gr); if (gr == GLOB_NOMATCH) { @@ -2462,7 +2472,7 @@ } #ifndef __U_BOOT__ glob_target = &child->glob_result; - if (child->argv) flags |= GLOB_APPEND; + if (child->argv) flags |= GLOB_APPEND; #else for (cnt = 1, s = dest->data; s && *s; s++) { if (*s == '\\') s++; @@ -2522,9 +2532,9 @@ struct child_prog *prog=ctx->child; if (prog && prog->group == NULL - && prog->argv == NULL + && prog->argv == NULL #ifndef __U_BOOT__ - && prog->redirects == NULL) { + && prog->redirects == NULL) { #else ) { #endif @@ -3339,7 +3349,7 @@ debug_printf("\ninteractive=%d\n", interactive); if (interactive) { /* Looks like they want an interactive shell */ -#ifndef CONFIG_FEATURE_SH_EXTRA_QUIET +#ifndef CONFIG_FEATURE_SH_EXTRA_QUIET printf( "\n\n" BB_BANNER " hush - the humble shell v0.01 (testing)\n"); printf( "Enter 'help' for a list of built-in commands.\n\n"); #endif diff --git a/common/kgdb.c b/common/kgdb.c index b563094..73fd9a8 100644 --- a/common/kgdb.c +++ b/common/kgdb.c @@ -573,6 +573,20 @@ return 0; } +cmd_tbl_t U_BOOT_CMD(KGDB) = MK_CMD_ENTRY( + "kgdb", CFG_MAXARGS, 1, do_kgdb, + "kgdb - enter gdb remote debug mode\n", + "[arg0 arg1 .. argN]\n" + " - executes a breakpoint so that kgdb mode is\n" + " entered via the exception handler. To return\n" + " to the monitor, the remote gdb debugger must\n" + " execute a \"continue\" or \"quit\" command.\n" + "\n" + " if a program is loaded by the remote gdb, any args\n" + " passed to the kgdb command are given to the loaded\n" + " program if it is executed (see the \"hello_world\"\n" + " example program in the U-Boot examples directory)." +); #else int kgdb_not_configured = 1; diff --git a/common/main.c b/common/main.c index f538870..f7830a1 100644 --- a/common/main.c +++ b/common/main.c @@ -26,17 +26,19 @@ #include #include #include -#include -#include #include -#if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY) -#include /* for do_reset() prototype */ -#endif #ifdef CFG_HUSH_PARSER #include #endif +#if defined(CONFIG_BOOT_RETRY_TIME) && defined(CONFIG_RESET_TO_RETRY) +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); /* for do_reset() prototype */ +#endif + +extern int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + + #define MAX_DELAY_STOP_STR 32 static char * delete_char (char *buffer, char *p, int *colp, int *np, int plen); @@ -143,7 +145,7 @@ if (delaykey[i].len > 0 && presskey_len >= delaykey[i].len && memcmp (presskey + presskey_len - delaykey[i].len, - delaykey[i].str, + delaykey[i].str, delaykey[i].len) == 0) { # if DEBUG_BOOTKEYS printf("got %skey\n", @@ -196,17 +198,17 @@ #endif #if defined CONFIG_ZERO_BOOTDELAY_CHECK - /* - * Check if key already pressed - * Don't check if bootdelay < 0 - */ + /* + * Check if key already pressed + * Don't check if bootdelay < 0 + */ if (bootdelay >= 0) { if (tstc()) { /* we got a key press */ (void) getc(); /* consume input */ printf ("\b\b\b 0\n"); return 1; /* don't auto boot */ } - } + } #endif while (bootdelay > 0) { @@ -633,7 +635,7 @@ int state = 0; /* 0 = waiting for '$' */ /* 1 = waiting for '(' */ /* 2 = waiting for ')' */ - /* 3 = waiting for ''' */ + /* 3 = waiting for ''' */ #ifdef DEBUG_PARSER char *output_start = output; @@ -652,7 +654,7 @@ if (inputcnt-- == 0) break; prev = c; - c = *input++; + c = *input++; } } diff --git a/common/miiphybb.c b/common/miiphybb.c index dfc1992..8d18919 100644 --- a/common/miiphybb.c +++ b/common/miiphybb.c @@ -228,4 +228,3 @@ } #endif /* CONFIG_BITBANGMII */ - diff --git a/common/soft_i2c.c b/common/soft_i2c.c index dc26d6f..9a10b31 100644 --- a/common/soft_i2c.c +++ b/common/soft_i2c.c @@ -267,10 +267,10 @@ void i2c_init (int speed, int slaveaddr) { /* - * WARNING: Do NOT save speed in a static variable: if the - * I2C routines are called before RAM is initialized (to read - * the DIMM SPD, for instance), RAM won't be usable and your - * system will crash. + * WARNING: Do NOT save speed in a static variable: if the + * I2C routines are called before RAM is initialized (to read + * the DIMM SPD, for instance), RAM won't be usable and your + * system will crash. */ send_reset (); } diff --git a/common/soft_spi.c b/common/soft_spi.c index b9a8fa8..00a57de 100644 --- a/common/soft_spi.c +++ b/common/soft_spi.c @@ -40,7 +40,6 @@ #endif - /*=====================================================================*/ /* Public Functions */ /*=====================================================================*/ @@ -132,4 +131,3 @@ } #endif /* CONFIG_SOFT_SPI */ - diff --git a/common/spartan2.c b/common/spartan2.c index dcda0c4..279a426 100644 --- a/common/spartan2.c +++ b/common/spartan2.c @@ -438,11 +438,11 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize) { - int ret_val = FPGA_FAIL; /* assume the worst */ + int ret_val = FPGA_FAIL; /* assume the worst */ Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns; - int i; - char val; - + int i; + char val; + PRINTF ("%s: start with interface functions @ 0x%p\n", __FUNCTION__, fn); @@ -460,8 +460,8 @@ "clk:\t0x%p\n" "wr:\t0x%p\n" "done:\t0x%p\n\n", - __FUNCTION__, &fn, fn, fn->pgm, fn->init, - fn->clk, fn->wr, fn->done); + __FUNCTION__, &fn, fn, fn->pgm, fn->init, + fn->clk, fn->wr, fn->done); #ifdef CFG_FPGA_PROG_FEEDBACK printf ("Loading FPGA Device %d...\n", cookie); #endif @@ -476,7 +476,7 @@ /* Establish the initial state */ (*fn->pgm) (TRUE, TRUE, cookie); /* Assert the program, commit */ - /* Wait for INIT state (init low) */ + /* Wait for INIT state (init low) */ ts = get_timer (0); /* get current time */ do { CONFIG_FPGA_DELAY (); @@ -485,7 +485,7 @@ return FPGA_FAIL; } } while (!(*fn->init) (cookie)); - + /* Get ready for the burn */ CONFIG_FPGA_DELAY (); (*fn->pgm) (FALSE, TRUE, cookie); /* Deassert the program, commit */ @@ -502,29 +502,29 @@ /* Load the data */ while (bytecount < bsize) { - - /* Xilinx detects an error if INIT goes low (active) - while DONE is low (inactive) */ - if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) { - puts ("** CRC error during FPGA load.\n"); - return (FPGA_FAIL); - } - val = data [bytecount ++]; - i = 8; - do { - /* Deassert the clock */ - (*fn->clk) (FALSE, TRUE, cookie); - CONFIG_FPGA_DELAY (); - /* Write data */ - (*fn->wr) ((val < 0), TRUE, cookie); - CONFIG_FPGA_DELAY (); - /* Assert the clock */ - (*fn->clk) (TRUE, TRUE, cookie); - CONFIG_FPGA_DELAY (); - val <<= 1; - i --; - } while (i > 0); - + + /* Xilinx detects an error if INIT goes low (active) + while DONE is low (inactive) */ + if ((*fn->done) (cookie) == 0 && (*fn->init) (cookie)) { + puts ("** CRC error during FPGA load.\n"); + return (FPGA_FAIL); + } + val = data [bytecount ++]; + i = 8; + do { + /* Deassert the clock */ + (*fn->clk) (FALSE, TRUE, cookie); + CONFIG_FPGA_DELAY (); + /* Write data */ + (*fn->wr) ((val < 0), TRUE, cookie); + CONFIG_FPGA_DELAY (); + /* Assert the clock */ + (*fn->clk) (TRUE, TRUE, cookie); + CONFIG_FPGA_DELAY (); + val <<= 1; + i --; + } while (i > 0); + #ifdef CFG_FPGA_PROG_FEEDBACK if (bytecount % (bsize / 40) == 0) putc ('.'); /* let them know we are alive */ @@ -540,7 +540,7 @@ /* now check for done signal */ ts = get_timer (0); /* get current time */ ret_val = FPGA_SUCCESS; - (*fn->wr) (TRUE, TRUE, cookie); + (*fn->wr) (TRUE, TRUE, cookie); while (! (*fn->done) (cookie)) { /* XXX - we should have a check in here somewhere to @@ -551,8 +551,8 @@ CONFIG_FPGA_DELAY (); (*fn->clk) (TRUE, TRUE, cookie); /* Assert the clock pin */ - putc ('*'); - + putc ('*'); + if (get_timer (ts) > CFG_FPGA_WAIT) { /* check the time */ puts ("** Timeout waiting for DONE to clear.\n"); ret_val = FPGA_FAIL; @@ -579,8 +579,8 @@ static int Spartan2_ss_dump (Xilinx_desc * desc, void *buf, size_t bsize) { - /* Readback is only available through the Slave Parallel and */ - /* boundary-scan interfaces. */ + /* Readback is only available through the Slave Parallel and */ + /* boundary-scan interfaces. */ printf ("%s: Slave Serial Dumping is unavailable\n", __FUNCTION__); return FPGA_FAIL; diff --git a/common/usb.c b/common/usb.c index a5b29a5..9474abe 100644 --- a/common/usb.c +++ b/common/usb.c @@ -47,7 +47,6 @@ #endif - #undef USB_DEBUG #ifdef USB_DEBUG diff --git a/common/usb_kbd.c b/common/usb_kbd.c index ad7e610..56c2166 100644 --- a/common/usb_kbd.c +++ b/common/usb_kbd.c @@ -402,7 +402,6 @@ #define HID_ITEM_TAG_LONG 15 - static struct usb_hid_descriptor usb_kbd_hid_desc; void usb_kbd_display_hid(struct usb_hid_descriptor *hid) @@ -541,7 +540,6 @@ #define HID_LOCAL_ITEM_TAG_DELIMITER 10 - static void usb_kbd_show_item(struct hid_item *item) { switch(item->type) { @@ -666,7 +664,6 @@ } - static int usb_kbd_get_hid_desc(struct usb_device *dev) { unsigned char buffer[256]; @@ -729,6 +726,3 @@ #endif #endif /* CONFIG_USB_KEYBOARD */ - -/* eof */ - diff --git a/common/usb_storage.c b/common/usb_storage.c index b134721..a7944b5 100644 --- a/common/usb_storage.c +++ b/common/usb_storage.c @@ -32,7 +32,6 @@ */ - #include #include #include @@ -107,16 +106,11 @@ static struct us_data usb_stor[USB_MAX_STOR_DEV]; - #define USB_STOR_TRANSPORT_GOOD 0 #define USB_STOR_TRANSPORT_FAILED -1 #define USB_STOR_TRANSPORT_ERROR -2 - - - - int usb_stor_get_info(struct usb_device *dev, struct us_data *us, block_dev_desc_t *dev_desc); int usb_storage_probe(struct usb_device *dev, unsigned int ifnum,struct us_data *ss); unsigned long usb_stor_read(int device, unsigned long blknr, unsigned long blkcnt, unsigned long *buffer); @@ -529,7 +523,6 @@ } - static int usb_inquiry(ccb *srb,struct us_data *ss) { int retry,i; @@ -890,6 +883,3 @@ #endif #endif /* CONFIG_USB_STORAGE */ - - - diff --git a/cpu/74xx_7xx/cpu.c b/cpu/74xx_7xx/cpu.c index 19f8ff8..30a2091 100644 --- a/cpu/74xx_7xx/cpu.c +++ b/cpu/74xx_7xx/cpu.c @@ -194,7 +194,7 @@ !defined(CONFIG_ELPPC) /* no generic way to do board reset. simply call soft_reset. */ void -do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { ulong addr; /* flush and disable I/D cache */ diff --git a/cpu/74xx_7xx/speed.c b/cpu/74xx_7xx/speed.c index 23b71d4..12bdf37 100644 --- a/cpu/74xx_7xx/speed.c +++ b/cpu/74xx_7xx/speed.c @@ -49,29 +49,29 @@ }; static const int hid1_fx_multipliers_x_10[] = { - 00, /* 0000 - off */ - 00, /* 0001 - off */ - 10, /* 0010 - bypass */ - 10, /* 0011 - bypass */ - 20, /* 0100 - 2x */ - 25, /* 0101 - 2.5x */ - 30, /* 0110 - 3x */ - 35, /* 0111 - 3.5x */ - 40, /* 1000 - 4x */ - 45, /* 1001 - 4.5x */ - 50, /* 1010 - 5x */ - 55, /* 1011 - 5.5x */ - 60, /* 1100 - 6x */ - 65, /* 1101 - 6.5x */ - 70, /* 1110 - 7x */ - 75, /* 1111 - 7.5 */ - 80, /* 10000 - 8x */ - 85, /* 10001 - 8.5x */ - 90, /* 10010 - 9x */ - 95, /* 10011 - 9.5x */ - 100, /* 10100 - 10x */ - 110, /* 10101 - 11x */ - 120, /* 10110 - 12x */ + 00, /* 0000 - off */ + 00, /* 0001 - off */ + 10, /* 0010 - bypass */ + 10, /* 0011 - bypass */ + 20, /* 0100 - 2x */ + 25, /* 0101 - 2.5x */ + 30, /* 0110 - 3x */ + 35, /* 0111 - 3.5x */ + 40, /* 1000 - 4x */ + 45, /* 1001 - 4.5x */ + 50, /* 1010 - 5x */ + 55, /* 1011 - 5.5x */ + 60, /* 1100 - 6x */ + 65, /* 1101 - 6.5x */ + 70, /* 1110 - 7x */ + 75, /* 1111 - 7.5 */ + 80, /* 10000 - 8x */ + 85, /* 10001 - 8.5x */ + 90, /* 10010 - 9x */ + 95, /* 10011 - 9.5x */ + 100, /* 10100 - 10x */ + 110, /* 10101 - 11x */ + 120, /* 10110 - 12x */ }; @@ -87,8 +87,8 @@ { DECLARE_GLOBAL_DATA_PTR; #ifdef CONFIG_750FX - ulong clock = CFG_BUS_CLK * \ - hid1_fx_multipliers_x_10[get_hid1 () >> 27] / 10; + ulong clock = CFG_BUS_CLK * \ + hid1_fx_multipliers_x_10[get_hid1 () >> 27] / 10; #else ulong clock = CFG_BUS_CLK * \ hid1_multipliers_x_10[get_hid1 () >> 28] / 10; diff --git a/cpu/74xx_7xx/start.S b/cpu/74xx_7xx/start.S index 4857908..7d37c8e 100644 --- a/cpu/74xx_7xx/start.S +++ b/cpu/74xx_7xx/start.S @@ -233,9 +233,9 @@ STD_EXCEPTION(0xe00, Trap_0e, UnknownException) STD_EXCEPTION(0xf00, Trap_0f, UnknownException) - /* - * On the MPC8xx, this is a software emulation interrupt. It - * occurs for all unimplemented and illegal instructions. + /* + * On the MPC8xx, this is a software emulation interrupt. It + * occurs for all unimplemented and illegal instructions. */ STD_EXCEPTION(0x1000, SoftEmu, SoftEmuException) @@ -282,9 +282,9 @@ #if defined(CONFIG_ALTIVEC) && defined(CONFIG_74xx) .long 0x7e00066c /* - * dssall instruction, gas doesn't have it yet - * ...for altivec, data stream stop all this probably - * isn't needed unless we warm (software) reboot U-Boot + * dssall instruction, gas doesn't have it yet + * ...for altivec, data stream stop all this probably + * isn't needed unless we warm (software) reboot U-Boot */ #endif @@ -325,15 +325,15 @@ * Cache must be enabled here for stack-in-cache trick. * This means we need to enable the BATS. * This means: - * 1) for the EVB, original gt regs need to be mapped + * 1) for the EVB, original gt regs need to be mapped * 2) need to have an IBAT for the 0xf region, * we are running there! - * Cache should be turned on after BATs, since by default - * everything is write-through. - * The init-mem BAT can be reused after reloc. The old - * gt-regs BAT can be reused after board_init_f calls - * board_pre_init (EVB only). - */ + * Cache should be turned on after BATs, since by default + * everything is write-through. + * The init-mem BAT can be reused after reloc. The old + * gt-regs BAT can be reused after board_init_f calls + * board_pre_init (EVB only). + */ #if !defined(CONFIG_BAB7xx) && !defined(CONFIG_ELPPC) /* enable address translation */ bl enable_addr_trans @@ -391,10 +391,10 @@ mtspr DBAT2U, r0 mtspr DBAT3U, r0 #ifdef CONFIG_750FX - mtspr DBAT4U, r0 - mtspr DBAT5U, r0 - mtspr DBAT6U, r0 - mtspr DBAT7U, r0 + mtspr DBAT4U, r0 + mtspr DBAT5U, r0 + mtspr DBAT6U, r0 + mtspr DBAT7U, r0 #endif isync sync @@ -479,76 +479,76 @@ #ifdef CONFIG_750FX /* IBAT 4 */ - addis r4, r0, CFG_IBAT4L@h - ori r4, r4, CFG_IBAT4L@l - addis r3, r0, CFG_IBAT4U@h - ori r3, r3, CFG_IBAT4U@l - mtspr IBAT4L, r4 - mtspr IBAT4U, r3 - isync + addis r4, r0, CFG_IBAT4L@h + ori r4, r4, CFG_IBAT4L@l + addis r3, r0, CFG_IBAT4U@h + ori r3, r3, CFG_IBAT4U@l + mtspr IBAT4L, r4 + mtspr IBAT4U, r3 + isync /* DBAT 4 */ - addis r4, r0, CFG_DBAT4L@h - ori r4, r4, CFG_DBAT4L@l - addis r3, r0, CFG_DBAT4U@h - ori r3, r3, CFG_DBAT4U@l - mtspr DBAT4L, r4 - mtspr DBAT4U, r3 - isync + addis r4, r0, CFG_DBAT4L@h + ori r4, r4, CFG_DBAT4L@l + addis r3, r0, CFG_DBAT4U@h + ori r3, r3, CFG_DBAT4U@l + mtspr DBAT4L, r4 + mtspr DBAT4U, r3 + isync - /* IBAT 5 */ - addis r4, r0, CFG_IBAT5L@h - ori r4, r4, CFG_IBAT5L@l - addis r3, r0, CFG_IBAT5U@h - ori r3, r3, CFG_IBAT5U@l - mtspr IBAT5L, r4 - mtspr IBAT5U, r3 - isync + /* IBAT 5 */ + addis r4, r0, CFG_IBAT5L@h + ori r4, r4, CFG_IBAT5L@l + addis r3, r0, CFG_IBAT5U@h + ori r3, r3, CFG_IBAT5U@l + mtspr IBAT5L, r4 + mtspr IBAT5U, r3 + isync /* DBAT 5 */ - addis r4, r0, CFG_DBAT5L@h - ori r4, r4, CFG_DBAT5L@l - addis r3, r0, CFG_DBAT5U@h - ori r3, r3, CFG_DBAT5U@l - mtspr DBAT5L, r4 - mtspr DBAT5U, r3 - isync + addis r4, r0, CFG_DBAT5L@h + ori r4, r4, CFG_DBAT5L@l + addis r3, r0, CFG_DBAT5U@h + ori r3, r3, CFG_DBAT5U@l + mtspr DBAT5L, r4 + mtspr DBAT5U, r3 + isync - /* IBAT 6 */ - addis r4, r0, CFG_IBAT6L@h - ori r4, r4, CFG_IBAT6L@l - addis r3, r0, CFG_IBAT6U@h - ori r3, r3, CFG_IBAT6U@l - mtspr IBAT6L, r4 - mtspr IBAT6U, r3 - isync + /* IBAT 6 */ + addis r4, r0, CFG_IBAT6L@h + ori r4, r4, CFG_IBAT6L@l + addis r3, r0, CFG_IBAT6U@h + ori r3, r3, CFG_IBAT6U@l + mtspr IBAT6L, r4 + mtspr IBAT6U, r3 + isync /* DBAT 6 */ - addis r4, r0, CFG_DBAT6L@h - ori r4, r4, CFG_DBAT6L@l - addis r3, r0, CFG_DBAT6U@h - ori r3, r3, CFG_DBAT6U@l - mtspr DBAT6L, r4 - mtspr DBAT6U, r3 - isync + addis r4, r0, CFG_DBAT6L@h + ori r4, r4, CFG_DBAT6L@l + addis r3, r0, CFG_DBAT6U@h + ori r3, r3, CFG_DBAT6U@l + mtspr DBAT6L, r4 + mtspr DBAT6U, r3 + isync - /* IBAT 7 */ - addis r4, r0, CFG_IBAT7L@h - ori r4, r4, CFG_IBAT7L@l - addis r3, r0, CFG_IBAT7U@h - ori r3, r3, CFG_IBAT7U@l - mtspr IBAT7L, r4 - mtspr IBAT7U, r3 - isync + /* IBAT 7 */ + addis r4, r0, CFG_IBAT7L@h + ori r4, r4, CFG_IBAT7L@l + addis r3, r0, CFG_IBAT7U@h + ori r3, r3, CFG_IBAT7U@l + mtspr IBAT7L, r4 + mtspr IBAT7U, r3 + isync /* DBAT 7 */ - addis r4, r0, CFG_DBAT7L@h - ori r4, r4, CFG_DBAT7L@l - addis r3, r0, CFG_DBAT7U@h - ori r3, r3, CFG_DBAT7U@l - mtspr DBAT7L, r4 - mtspr DBAT7U, r3 - isync + addis r4, r0, CFG_DBAT7L@h + ori r4, r4, CFG_DBAT7L@l + addis r3, r0, CFG_DBAT7U@h + ori r3, r3, CFG_DBAT7U@l + mtspr DBAT7L, r4 + mtspr DBAT7U, r3 + isync #endif /* bats are done, now invalidate the TLBs */ @@ -768,8 +768,8 @@ /* * Relocation Function, r14 point to got2+0x8000 * - * Adjust got2 pointers, no need to check for 0, this code - * already puts a few entries in the table. + * Adjust got2 pointers, no need to check for 0, this code + * already puts a few entries in the table. */ li r0,__got2_entries@sectoff@l la r3,GOT(_GOT2_TABLE_) @@ -783,7 +783,7 @@ bdnz 1b /* - * Now adjust the fixups and the pointers to the fixups + * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. */ 2: li r0,__fixup_entries@sectoff@l diff --git a/cpu/arm720t/interrupts.c b/cpu/arm720t/interrupts.c index 52787fe..b1ee188 100644 --- a/cpu/arm720t/interrupts.c +++ b/cpu/arm720t/interrupts.c @@ -80,7 +80,6 @@ #endif - void bad_mode (void) { panic ("Resetting CPU ...\n"); @@ -91,7 +90,7 @@ { unsigned long flags; const char *processor_modes[] = - { "USER_26", "FIQ_26", "IRQ_26", "SVC_26", "UK4_26", "UK5_26", + { "USER_26", "FIQ_26", "IRQ_26", "SVC_26", "UK4_26", "UK5_26", "UK6_26", "UK7_26", "UK8_26", "UK9_26", "UK10_26", "UK11_26", "UK12_26", "UK13_26", "UK14_26", "UK15_26", diff --git a/cpu/arm720t/start.S b/cpu/arm720t/start.S index e9899a9..2ca91d2 100644 --- a/cpu/arm720t/start.S +++ b/cpu/arm720t/start.S @@ -24,7 +24,6 @@ */ - #include #include @@ -247,8 +246,6 @@ mov pc, lr - - /* ************************************************************************* * diff --git a/cpu/arm920t/interrupts.c b/cpu/arm920t/interrupts.c index dd944fb..9ff06c1 100644 --- a/cpu/arm920t/interrupts.c +++ b/cpu/arm920t/interrupts.c @@ -91,7 +91,6 @@ #endif - void bad_mode (void) { panic ("Resetting CPU ...\n"); diff --git a/cpu/arm920t/serial.c b/cpu/arm920t/serial.c index 10cfade..7ed452e 100644 --- a/cpu/arm920t/serial.c +++ b/cpu/arm920t/serial.c @@ -92,7 +92,7 @@ int serial_getc (void) { S3C24X0_UART * const uart = S3C24X0_GetBase_UART(UART_NR); - + /* wait for character to arrive */ while (!(uart->UTRSTAT & 0x1)); diff --git a/cpu/arm920t/start.S b/cpu/arm920t/start.S index ed16176..9f53b87 100644 --- a/cpu/arm920t/start.S +++ b/cpu/arm920t/start.S @@ -25,7 +25,6 @@ */ - #include #include @@ -271,8 +270,6 @@ mov pc, lr - - /* ************************************************************************* * diff --git a/cpu/at91rm9200/at45.c b/cpu/at91rm9200/at45.c index e0057e7..cf456fb 100644 --- a/cpu/at91rm9200/at45.c +++ b/cpu/at91rm9200/at45.c @@ -45,7 +45,7 @@ /* Reset the SPI */ AT91C_BASE_SPI->SPI_CR = AT91C_SPI_SWRST; - /* Configure SPI in Master Mode with No CS selected !!! */ + /* Configure SPI in Master Mode with No CS selected !!! */ AT91C_BASE_SPI->SPI_MR = AT91C_SPI_MSTR | AT91C_SPI_MODFDIS | AT91C_SPI_PCS; /* Configure CS0 and CS3 */ @@ -83,38 +83,38 @@ /*----------------------------------------------------------------------------*/ unsigned int AT91F_SpiWrite ( AT91PS_DataflashDesc pDesc ) { - unsigned int timeout; + unsigned int timeout; pDesc->state = BUSY; - AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; + AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; - /* Initialize the Transmit and Receive Pointer */ - AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ; - AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ; + /* Initialize the Transmit and Receive Pointer */ + AT91C_BASE_SPI->SPI_RPR = (unsigned int)pDesc->rx_cmd_pt ; + AT91C_BASE_SPI->SPI_TPR = (unsigned int)pDesc->tx_cmd_pt ; - /* Intialize the Transmit and Receive Counters */ - AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size; - AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size; + /* Intialize the Transmit and Receive Counters */ + AT91C_BASE_SPI->SPI_RCR = pDesc->rx_cmd_size; + AT91C_BASE_SPI->SPI_TCR = pDesc->tx_cmd_size; if ( pDesc->tx_data_size != 0 ) { - /* Initialize the Next Transmit and Next Receive Pointer */ - AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ; + /* Initialize the Next Transmit and Next Receive Pointer */ + AT91C_BASE_SPI->SPI_RNPR = (unsigned int)pDesc->rx_data_pt ; AT91C_BASE_SPI->SPI_TNPR = (unsigned int)pDesc->tx_data_pt ; /* Intialize the Next Transmit and Next Receive Counters */ AT91C_BASE_SPI->SPI_RNCR = pDesc->rx_data_size ; - AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ; - } + AT91C_BASE_SPI->SPI_TNCR = pDesc->tx_data_size ; + } - /* arm simple, non interrupt dependent timer */ + /* arm simple, non interrupt dependent timer */ reset_timer_masked(); timeout = 0; AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTEN + AT91C_PDC_RXTEN; while(!(AT91C_BASE_SPI->SPI_SR & AT91C_SPI_RXBUFF) && ((timeout = get_timer_masked() ) < CFG_SPI_WRITE_TOUT)); - AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; - pDesc->state = IDLE; + AT91C_BASE_SPI->SPI_PTCR = AT91C_PDC_TXTDIS + AT91C_PDC_RXTDIS; + pDesc->state = IDLE; if (timeout >= CFG_SPI_WRITE_TOUT){ printf("Error Timeout\n\r"); @@ -181,12 +181,12 @@ pDesc->command[1] = 0; pDesc->DataFlash_state = GET_STATUS; - pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */ - pDesc->tx_cmd_pt = pDesc->command ; - pDesc->rx_cmd_pt = pDesc->command ; - pDesc->rx_cmd_size = 2 ; - pDesc->tx_cmd_size = 2 ; - status = AT91F_SpiWrite (pDesc); + pDesc->tx_data_size = 0 ; /* Transmit the command and receive response */ + pDesc->tx_cmd_pt = pDesc->command ; + pDesc->rx_cmd_pt = pDesc->command ; + pDesc->rx_cmd_size = 2 ; + pDesc->tx_cmd_size = 2 ; + status = AT91F_SpiWrite (pDesc); pDesc->DataFlash_state = *( (unsigned char *) (pDesc->rx_cmd_pt) +1); @@ -215,7 +215,6 @@ } - /*------------------------------------------------------------------------------*/ /* Function Name : AT91F_DataFlashContinuousRead */ /* Object : Continuous stream Read */ @@ -226,7 +225,7 @@ /* Return value : State of the dataflash */ /*------------------------------------------------------------------------------*/ AT91S_DataFlashStatus AT91F_DataFlashContinuousRead ( - AT91PS_DataFlash pDataFlash, + AT91PS_DataFlash pDataFlash, int src, unsigned char *dataBuffer, int sizeToRead ) @@ -245,7 +244,6 @@ } - /*------------------------------------------------------------------------------*/ /* Function Name : AT91F_DataFlashPagePgmBuf */ /* Object : Main memory page program through buffer 1 or buffer 2 */ @@ -289,13 +287,12 @@ return DATAFLASH_BAD_COMMAND; /* no data to transmit or receive */ - pDataFlash->pDataFlashDesc->tx_data_size = 0; + pDataFlash->pDataFlashDesc->tx_data_size = 0; return(AT91F_DataFlashSendCommand (pDataFlash, BufferCommand, 4, page*pDataFlash->pDevice->pages_size)); } - /*----------------------------------------------------------------------------- */ /* Function Name : AT91F_DataFlashWriteBuffer */ /* Object : Write data to the internal sram buffer 1 or 2 */ @@ -324,24 +321,24 @@ if ( (pDataFlash->pDataFlashDesc->state) != IDLE) return DATAFLASH_BUSY; - /* Send first Write Command */ - pDataFlash->pDataFlashDesc->command[0] = BufferCommand; + /* Send first Write Command */ + pDataFlash->pDataFlashDesc->command[0] = BufferCommand; pDataFlash->pDataFlashDesc->command[1] = 0; - pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ; - pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ; + pDataFlash->pDataFlashDesc->command[2] = (unsigned char)(((unsigned int)(bufferAddress & pDataFlash->pDevice->byte_mask)) >> 8) ; + pDataFlash->pDataFlashDesc->command[3] = (unsigned char)((unsigned int)bufferAddress & 0x00FF) ; - pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ; - pDataFlash->pDataFlashDesc->tx_cmd_size = 4 ; - pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ; - pDataFlash->pDataFlashDesc->rx_cmd_size = 4 ; + pDataFlash->pDataFlashDesc->tx_cmd_pt = pDataFlash->pDataFlashDesc->command ; + pDataFlash->pDataFlashDesc->tx_cmd_size = 4 ; + pDataFlash->pDataFlashDesc->rx_cmd_pt = pDataFlash->pDataFlashDesc->command ; + pDataFlash->pDataFlashDesc->rx_cmd_size = 4 ; - pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ; - pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ; - pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ; - pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ; + pDataFlash->pDataFlashDesc->rx_data_pt = dataBuffer ; + pDataFlash->pDataFlashDesc->tx_data_pt = dataBuffer ; + pDataFlash->pDataFlashDesc->rx_data_size = SizeToWrite ; + pDataFlash->pDataFlashDesc->tx_data_size = SizeToWrite ; - return AT91F_SpiWrite(pDataFlash->pDataFlashDesc); + return AT91F_SpiWrite(pDataFlash->pDataFlashDesc); } @@ -404,7 +401,6 @@ } - /*------------------------------------------------------------------------------*/ /* Function Name : AT91F_DataFlashWrite_Overloaded */ /* Object : */ @@ -422,11 +418,11 @@ AT91F_SpiEnable(pDataFlash->pDevice->cs); - if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number))) + if ( (dest + size) > (pDataFlash->pDevice->pages_size * (pDataFlash->pDevice->pages_number))) return DATAFLASH_MEMORY_OVERFLOW; - /* If destination does not fit a page start address */ - if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) { + /* If destination does not fit a page start address */ + if ((dest % ((unsigned int)(pDataFlash->pDevice->pages_size))) != 0 ) { length = pDataFlash->pDevice->pages_size - (dest % ((unsigned int)(pDataFlash->pDevice->pages_size))); if (size < length) @@ -438,12 +434,12 @@ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, 1000); /* Update size, source and destination pointers */ - size -= length; - dest += length; - src += length; - } + size -= length; + dest += length; + src += length; + } - while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) { + while (( size - pDataFlash->pDevice->pages_size ) >= 0 ) { /* program dataflash page */ if(!AT91F_DataFlashPagePgmBuf(pDataFlash, src, dest, pDataFlash->pDevice->pages_size )) return DATAFLASH_ERROR; @@ -451,20 +447,20 @@ AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, 1000); /* Update size, source and destination pointers */ - size -= pDataFlash->pDevice->pages_size ; - dest += pDataFlash->pDevice->pages_size ; - src += pDataFlash->pDevice->pages_size ; - } + size -= pDataFlash->pDevice->pages_size ; + dest += pDataFlash->pDevice->pages_size ; + src += pDataFlash->pDevice->pages_size ; + } - /* If still some bytes to read */ - if ( size > 0 ) { + /* If still some bytes to read */ + if ( size > 0 ) { /* program dataflash page */ if(!AT91F_PartialPageWrite(pDataFlash, src, dest, size) ) return DATAFLASH_ERROR; AT91F_DataFlashWaitReady(pDataFlash->pDataFlashDesc, 1000); } - return DATAFLASH_OK; + return DATAFLASH_OK; } @@ -501,7 +497,7 @@ buffer += SizeToRead; } - return DATAFLASH_OK; + return DATAFLASH_OK; } @@ -514,8 +510,8 @@ int AT91F_DataflashProbe(int cs, AT91PS_DataflashDesc pDesc) { AT91F_SpiEnable(cs); - AT91F_DataFlashGetStatus(pDesc); - return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C); + AT91F_DataFlashGetStatus(pDesc); + return((pDesc->command[1] == 0xFF)? 0: pDesc->command[1] & 0x3C); } #endif diff --git a/cpu/at91rm9200/at91rm9200_ether.c b/cpu/at91rm9200/at91rm9200_ether.c index 6e44150..47b57da 100644 --- a/cpu/at91rm9200/at91rm9200_ether.c +++ b/cpu/at91rm9200/at91rm9200_ether.c @@ -69,15 +69,15 @@ /** functions to interface the DAVICOM 10/100Mbps ethernet phy **********/ /* - * Name: + * Name: * dm9161_IsPhyConnected - * Description: + * Description: * Reads the 2 PHY ID registers - * Arguments: + * Arguments: * p_mac - pointer to AT91S_EMAC struct - * Return value: + * Return value: * TRUE - if id read successfully - * FALSE- if error + * FALSE- if error */ static unsigned int dm9161_IsPhyConnected (AT91PS_EMAC p_mac) { @@ -96,14 +96,14 @@ } /* - * Name: + * Name: * dm9161_GetLinkSpeed - * Description: - * Link parallel detection status of MAC is checked and set in the + * Description: + * Link parallel detection status of MAC is checked and set in the * MAC configuration registers - * Arguments: - * p_mac - pointer to MAC - * Return value: + * Arguments: + * p_mac - pointer to MAC + * Return value: * TRUE - if link status set succesfully * FALSE - if link status not set */ @@ -152,14 +152,14 @@ /* - * Name: + * Name: * dm9161_InitPhy - * Description: - * MAC starts checking its link by using parallel detection and + * Description: + * MAC starts checking its link by using parallel detection and * Autonegotiation and the same is set in the MAC configuration registers - * Arguments: + * Arguments: * p_mac - pointer to struct AT91S_EMAC - * Return value: + * Return value: * TRUE - if link status set succesfully * FALSE - if link status not set */ @@ -188,14 +188,14 @@ /* - * Name: + * Name: * dm9161_AutoNegotiate - * Description: - * MAC Autonegotiates with the partner status of same is set in the + * Description: + * MAC Autonegotiates with the partner status of same is set in the * MAC configuration registers - * Arguments: + * Arguments: * dev - pointer to struct net_device - * Return value: + * Return value: * TRUE - if link status set successfully * FALSE - if link status not set */ @@ -259,17 +259,15 @@ } - - /*********** EMAC Phy layer Management functions *************************/ /* - * Name: + * Name: * at91rm9200_EmacEnableMDIO - * Description: + * Description: * Enables the MDIO bit in MAC control register - * Arguments: + * Arguments: * p_mac - pointer to struct AT91S_EMAC - * Return value: + * Return value: * none */ static void at91rm9200_EmacEnableMDIO (AT91PS_EMAC p_mac) @@ -279,13 +277,13 @@ } /* - * Name: + * Name: * at91rm9200_EmacDisableMDIO - * Description: + * Description: * Disables the MDIO bit in MAC control register - * Arguments: + * Arguments: * p_mac - pointer to struct AT91S_EMAC - * Return value: + * Return value: * none */ static void at91rm9200_EmacDisableMDIO (AT91PS_EMAC p_mac) @@ -296,15 +294,15 @@ /* - * Name: + * Name: * at91rm9200_EmacReadPhy - * Description: + * Description: * Reads data from the PHY register - * Arguments: + * Arguments: * dev - pointer to struct net_device * RegisterAddress - unsigned char - * pInput - pointer to value read from register - * Return value: + * pInput - pointer to value read from register + * Return value: * TRUE - if data read successfully */ static UCHAR at91rm9200_EmacReadPhy (AT91PS_EMAC p_mac, @@ -324,15 +322,15 @@ /* - * Name: + * Name: * at91rm9200_EmacWritePhy - * Description: + * Description: * Writes data to the PHY register - * Arguments: + * Arguments: * dev - pointer to struct net_device * RegisterAddress - unsigned char - * pOutput - pointer to value to be written in the register - * Return value: + * pOutput - pointer to value to be written in the register + * Return value: * TRUE - if data read successfully */ static UCHAR at91rm9200_EmacWritePhy (AT91PS_EMAC p_mac, @@ -349,13 +347,13 @@ } /* - * Name: + * Name: * at91rm92000_GetPhyInterface - * Description: - * Initialise the interface functions to the PHY - * Arguments: + * Description: + * Initialise the interface functions to the PHY + * Arguments: * None - * Return value: + * Return value: * None */ void at91rm92000_GetPhyInterface (void) diff --git a/cpu/at91rm9200/cpu.c b/cpu/at91rm9200/cpu.c index ad3cd13..262ca34 100644 --- a/cpu/at91rm9200/cpu.c +++ b/cpu/at91rm9200/cpu.c @@ -54,7 +54,7 @@ { /*printf("write %08lx to p15/c1\n", value); */ __asm__ __volatile__( - "mcr p15, 0, %0, c1, c0, 0 @ write it back\n" + "mcr p15, 0, %0, c1, c0, 0 @ write it back\n" : "=r" (value) : : "memory"); @@ -86,7 +86,7 @@ */ #ifdef CONFIG_USE_IRQ IRQ_STACK_START = _armboot_end + - CONFIG_STACKSIZE + CONFIG_STACKSIZE_IRQ - 4; + CONFIG_STACKSIZE + CONFIG_STACKSIZE_IRQ - 4; FIQ_STACK_START = IRQ_STACK_START + CONFIG_STACKSIZE_FIQ; _armboot_real_end = FIQ_STACK_START + 4; #else diff --git a/cpu/at91rm9200/interrupts.c b/cpu/at91rm9200/interrupts.c index d9c7c55..407df9c 100644 --- a/cpu/at91rm9200/interrupts.c +++ b/cpu/at91rm9200/interrupts.c @@ -45,7 +45,6 @@ AT91PS_TC tmr; - void enable_interrupts (void) { return; @@ -209,11 +208,11 @@ ulong now = READ_TIMER; if (now >= lastinc) { - /* normal mode */ - timestamp += now - lastinc; + /* normal mode */ + timestamp += now - lastinc; } else { - /* we have an overflow ... */ - timestamp += now + TIMER_LOAD_VAL - lastinc; + /* we have an overflow ... */ + timestamp += now + TIMER_LOAD_VAL - lastinc; } lastinc = now; @@ -233,5 +232,3 @@ while(get_timer_masked() < tmo); /*NOP*/; } - - diff --git a/cpu/at91rm9200/start.S b/cpu/at91rm9200/start.S index 9b3e7aa..e955d43 100644 --- a/cpu/at91rm9200/start.S +++ b/cpu/at91rm9200/start.S @@ -24,7 +24,6 @@ */ - #include "config.h" #include "version.h" @@ -124,12 +123,12 @@ reset: /* - * set the cpu to SVC32 mode - */ - mrs r0,cpsr - bic r0,r0,#0x1f - orr r0,r0,#0x13 - msr cpsr,r0 + * set the cpu to SVC32 mode + */ + mrs r0,cpsr + bic r0,r0,#0x1f + orr r0,r0,#0x13 + msr cpsr,r0 /* * relocate exeception table @@ -144,18 +143,18 @@ bne copyex /* - * we do sys-critical inits only at reboot, - * not when booting from ram! - */ + * we do sys-critical inits only at reboot, + * not when booting from ram! + */ #ifdef CONFIG_INIT_CRITICAL - bl cpu_init_crit + bl cpu_init_crit #endif - /* set up the stack */ - ldr r0, _armboot_end - add r0, r0, #CONFIG_STACKSIZE - sub sp, r0, #12 /* leave 3 words for abort-stack */ - ldr pc,_start_armboot + /* set up the stack */ + ldr r0, _armboot_end + add r0, r0, #CONFIG_STACKSIZE + sub sp, r0, #12 /* leave 3 words for abort-stack */ + ldr pc,_start_armboot _start_armboot: .word start_armboot @@ -172,8 +171,6 @@ mov pc, lr - - /* ************************************************************************* * diff --git a/cpu/i386/Makefile b/cpu/i386/Makefile index 7067a06..c44412a 100644 --- a/cpu/i386/Makefile +++ b/cpu/i386/Makefile @@ -25,10 +25,10 @@ LIB = lib$(CPU).a -START = start.o start16.o reset.o -COBJS = serial.o interrupts.o cpu.o timer.o sc520.o +START = start.o start16.o reset.o +COBJS = serial.o interrupts.o cpu.o timer.o sc520.o AOBJS = sc520_asm.o - + all: .depend $(START) $(LIB) $(LIB): $(COBJS) $(AOBJS) diff --git a/cpu/i386/config.mk b/cpu/i386/config.mk index c7cf151..16a160d 100644 --- a/cpu/i386/config.mk +++ b/cpu/i386/config.mk @@ -21,6 +21,6 @@ # MA 02111-1307 USA # -PLATFORM_RELFLAGS += +PLATFORM_RELFLAGS += PLATFORM_CPPFLAGS += -march=i386 -Werror diff --git a/cpu/i386/cpu.c b/cpu/i386/cpu.c index 3c67c12..f24e4ba 100644 --- a/cpu/i386/cpu.c +++ b/cpu/i386/cpu.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se. - * + * * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Marius Groeger @@ -40,11 +40,11 @@ { /* initialize FPU, reset EM, set MP and NE */ asm ("fninit\n" \ - "movl %cr0, %eax\n" \ - "andl $~0x4, %eax\n" \ - "orl $0x22, %eax\n" \ - "movl %eax, %cr0\n" ); - + "movl %cr0, %eax\n" \ + "andl $~0x4, %eax\n" \ + "orl $0x22, %eax\n" \ + "movl %eax, %cr0\n" ); + return 0; } @@ -66,4 +66,3 @@ asm("wbinvd\n"); return; } - diff --git a/cpu/i386/interrupts.c b/cpu/i386/interrupts.c index 614d408..84825ae 100644 --- a/cpu/i386/interrupts.c +++ b/cpu/i386/interrupts.c @@ -29,7 +29,6 @@ #include - struct idt_entry { u16 base_low; u16 selector; @@ -44,7 +43,7 @@ #define MAX_IRQ 16 -typedef struct irq_handler { +typedef struct irq_handler { struct irq_handler *next; interrupt_handler_t* isr_func; void *isr_data; @@ -60,27 +59,26 @@ static irq_desc_t irq_table[MAX_IRQ]; - asm(".globl syscall_entry\n" \ - "syscall_entry:\n" \ - "popl %ebx\n" /* throw away the return address, flags */ \ - "popl %ebx\n" /* and segment that the INT instruction pushed */ \ - "popl %ebx\n" /* on to the stack */ \ - "movl %eax, %ecx\n" /* load the syscall nr argument*/ \ - "movl syscall_tbl, %eax\n" /* load start of syscall table */ \ - "cmpl $(11-1), %ecx\n" /* FixMe: find a way to use NR_SYSCALLS macro here */ \ - "ja bad_syscall\n" \ - "movl (%eax, %ecx, 4), %eax\n" /* load the handler of the syscall*/ \ - "test %eax, %eax\n" /* test for null */ \ - "je bad_syscall\n" \ - "popl %ecx\n" \ - "popl %ebx\n" \ - "sti \n" \ - "jmp *%eax\n" \ + "syscall_entry:\n" \ + "popl %ebx\n" /* throw away the return address, flags */ \ + "popl %ebx\n" /* and segment that the INT instruction pushed */ \ + "popl %ebx\n" /* on to the stack */ \ + "movl %eax, %ecx\n" /* load the syscall nr argument*/ \ + "movl syscall_tbl, %eax\n" /* load start of syscall table */ \ + "cmpl $(11-1), %ecx\n" /* FixMe: find a way to use NR_SYSCALLS macro here */ \ + "ja bad_syscall\n" \ + "movl (%eax, %ecx, 4), %eax\n" /* load the handler of the syscall*/ \ + "test %eax, %eax\n" /* test for null */ \ + "je bad_syscall\n" \ + "popl %ecx\n" \ + "popl %ebx\n" \ + "sti \n" \ + "jmp *%eax\n" \ "bad_syscall: movl $0xffffffff, %eax\n" \ - "popl %ecx\n" \ - "popl %ebx\n" \ - "ret"); + "popl %ecx\n" \ + "popl %ebx\n" \ + "ret"); void __attribute__ ((regparm(0))) syscall_entry(void); @@ -104,7 +102,7 @@ "pusha \n" \ "pushl $"#x"\n" \ "pushl $irq_return\n" \ - "jmp do_irq\n"); \ + "jmp do_irq\n"); \ void __attribute__ ((regparm(0))) irq_##x(void) #define DECLARE_EXCEPTION(x, f) \ @@ -173,20 +171,20 @@ DECLARE_INTERRUPT(13); DECLARE_INTERRUPT(14); DECLARE_INTERRUPT(15); - -void __attribute__ ((regparm(0))) default_isr(void); + +void __attribute__ ((regparm(0))) default_isr(void); asm ("default_isr: iret\n"); -void disable_irq(int irq) +void disable_irq(int irq) { if (irq >= MAX_IRQ) { return; } irq_table[irq].status |= IRQ_DISABLED; - + } -void enable_irq(int irq) +void enable_irq(int irq) { if (irq >= MAX_IRQ) { return; @@ -198,7 +196,7 @@ static void unmask_irq(int irq) { int imr_port; - + if (irq >= MAX_IRQ) { return; } @@ -207,7 +205,7 @@ } else { imr_port = MASTER_PIC + IMR; } - + outb(inb(imr_port)&~(1<<(irq&7)), imr_port); } @@ -216,7 +214,7 @@ static void mask_irq(int irq) { int imr_port; - + if (irq >= MAX_IRQ) { return; } @@ -225,8 +223,8 @@ } else { imr_port = MASTER_PIC + IMR; } - - outb(inb(imr_port)|(1<<(irq&7)), imr_port); + + outb(inb(imr_port)|(1<<(irq&7)), imr_port); } @@ -238,110 +236,110 @@ if (irq > 7) { outb(OCW2_SEOI|(irq&7), SLAVE_PIC + OCW2); irq = SEOI_IR2; /* also do IR2 on master */ - } + } outb(OCW2_SEOI|irq, MASTER_PIC + OCW2); } -void __attribute__ ((regparm(0))) do_irq(int irq) +void __attribute__ ((regparm(0))) do_irq(int irq) { - + mask_irq(irq); - + if (irq_table[irq].status & IRQ_DISABLED) { unmask_irq(irq); specific_eoi(irq); return; } - - + + if (NULL != irq_table[irq].handler) { irq_handler_t *handler; - for (handler = irq_table[irq].handler; + for (handler = irq_table[irq].handler; NULL!= handler; handler = handler->next) { handler->isr_func(handler->isr_data); } } else { - if ((irq & 7) != 7) { + if ((irq & 7) != 7) { printf("Spurious irq %d\n", irq); } - } + } unmask_irq(irq); - specific_eoi(irq); + specific_eoi(irq); } -void __attribute__ ((regparm(0))) unknown_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) unknown_exception_entry(int cause, int ip, int seg) { printf("Unknown Exception %d at %04x:%08x\n", cause, seg, ip); } -void __attribute__ ((regparm(0))) divide_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) divide_exception_entry(int cause, int ip, int seg) { printf("Divide Error (Division by zero) at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) debug_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) debug_exception_entry(int cause, int ip, int seg) { printf("Debug Interrupt (Single step) at %04x:%08x\n", seg, ip); } -void __attribute__ ((regparm(0))) nmi_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) nmi_entry(int cause, int ip, int seg) { printf("NMI Interrupt at %04x:%08x\n", seg, ip); } - -void __attribute__ ((regparm(0))) invalid_instruction_entry(int cause, int ip, int seg) + +void __attribute__ ((regparm(0))) invalid_instruction_entry(int cause, int ip, int seg) { printf("Invalid Instruction at %04x:%08x\n", seg, ip); while(1); } - -void __attribute__ ((regparm(0))) double_fault_entry(int cause, int ip, int seg) + +void __attribute__ ((regparm(0))) double_fault_entry(int cause, int ip, int seg) { printf("Double fault at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) invalid_tss_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) invalid_tss_exception_entry(int cause, int ip, int seg) { printf("Invalid TSS at %04x:%08x\n", seg, ip); } - -void __attribute__ ((regparm(0))) seg_fault_entry(int cause, int ip, int seg) + +void __attribute__ ((regparm(0))) seg_fault_entry(int cause, int ip, int seg) { printf("Segmentation fault at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) stack_fault_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) stack_fault_entry(int cause, int ip, int seg) { printf("Stack fault at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) gpf_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) gpf_entry(int cause, int ip, int seg) { printf("General protection fault at %04x:%08x\n", seg, ip); } -void __attribute__ ((regparm(0))) page_fault_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) page_fault_entry(int cause, int ip, int seg) { printf("Page fault at %04x:%08x\n", seg, ip); while(1); } -void __attribute__ ((regparm(0))) fp_exception_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) fp_exception_entry(int cause, int ip, int seg) { printf("Floating point exception at %04x:%08x\n", seg, ip); } -void __attribute__ ((regparm(0))) alignment_check_entry(int cause, int ip, int seg) +void __attribute__ ((regparm(0))) alignment_check_entry(int cause, int ip, int seg) { printf("Alignment check at %04x:%08x\n", seg, ip); } - -void __attribute__ ((regparm(0))) machine_check_entry(int cause, int ip, int seg) + +void __attribute__ ((regparm(0))) machine_check_entry(int cause, int ip, int seg) { printf("Machine check exception at %04x:%08x\n", seg, ip); } @@ -350,31 +348,31 @@ void irq_install_handler(int ino, interrupt_handler_t *func, void *pdata) { int status; - + if (ino>MAX_IRQ) { return; } - + if (NULL != irq_table[ino].handler) { return; } - + status = disable_interrupts(); irq_table[ino].handler = malloc(sizeof(irq_handler_t)); if (NULL == irq_table[ino].handler) { return; } - + memset(irq_table[ino].handler, 0, sizeof(irq_handler_t)); - + irq_table[ino].handler->isr_func = func; irq_table[ino].handler->isr_data = pdata; if (status) { enable_interrupts(); } - + unmask_irq(ino); - + return; } @@ -384,7 +382,7 @@ if (ino>MAX_IRQ) { return; } - + status = disable_interrupts(); mask_irq(ino); if (NULL == irq_table[ino].handler) { @@ -406,33 +404,33 @@ static void set_vector(int intnum, void *routine) { - idt[intnum].base_high = (u16)((u32)(routine)>>16); - idt[intnum].base_low = (u16)((u32)(routine)&0xffff); + idt[intnum].base_high = (u16)((u32)(routine)>>16); + idt[intnum].base_low = (u16)((u32)(routine)&0xffff); } int interrupt_init(void) { int i; - + /* Just in case... */ disable_interrupts(); - + /* Initialize the IDT and stuff */ - - + + memset(irq_table, 0, sizeof(irq_table)); /* Setup the IDT */ - for (i=0;i<256;i++) { + for (i=0;i<256;i++) { idt[i].access = 0x8e; - idt[i].res = 0; - idt[i].selector = 0x10; + idt[i].res = 0; + idt[i].selector = 0x10; set_vector(i, default_isr); - } - + } + asm ("cs lidt idt_ptr\n"); - + /* Setup exceptions */ set_vector(0x00, exp_0); set_vector(0x01, exp_1); @@ -487,39 +485,39 @@ /* vectors 0x30-0x3f are reserved for irq 16-31 */ set_vector(0x40, syscall_entry); - + /* Mask all interrupts */ outb(0xff, MASTER_PIC + IMR); outb(0xff, SLAVE_PIC + IMR); - + /* Master PIC */ - outb(ICW1_SEL|ICW1_EICW4, MASTER_PIC + ICW1); + outb(ICW1_SEL|ICW1_EICW4, MASTER_PIC + ICW1); outb(0x20, MASTER_PIC + ICW2); /* Place master PIC interrupts at INT20 */ - outb(IR2, MASTER_PIC + ICW3); /* ICW3, One slevc PIC is present */ + outb(IR2, MASTER_PIC + ICW3); /* ICW3, One slevc PIC is present */ outb(ICW4_PM, MASTER_PIC + ICW4); - + for (i=0;i<8;i++) { outb(OCW2_SEOI|i, MASTER_PIC + OCW2); } - + /* Slave PIC */ - outb(ICW1_SEL|ICW1_EICW4, SLAVE_PIC + ICW1); + outb(ICW1_SEL|ICW1_EICW4, SLAVE_PIC + ICW1); outb(0x28, SLAVE_PIC + ICW2); /* Place slave PIC interrupts at INT28 */ outb(0x02, SLAVE_PIC + ICW3); /* Slave ID */ - outb(ICW4_PM, SLAVE_PIC + ICW4); - + outb(ICW4_PM, SLAVE_PIC + ICW4); + for (i=0;i<8;i++) { outb(OCW2_SEOI|i, SLAVE_PIC + OCW2); } - - + + /* enable cascade interrerupt */ outb(0xfb, MASTER_PIC + IMR); outb(0xff, SLAVE_PIC + IMR); - + /* It is now safe to enable interrupts */ - enable_interrupts(); - + enable_interrupts(); + return 0; } @@ -531,9 +529,9 @@ int disable_interrupts(void) { long flags; - + asm volatile ("pushfl ; popl %0 ; cli\n" : "=g" (flags) : ); - + return (flags&0x200); /* IE flags is bit 9 */ } @@ -541,9 +539,9 @@ #ifdef CFG_RESET_GENERIC void __attribute__ ((regparm(0))) generate_gpf(void); -asm(".globl generate_gpf\n" - "generate_gpf:\n" - "ljmp $0x70, $0x47114711\n"); /* segment 0x70 is an arbitrary segment which does not +asm(".globl generate_gpf\n" + "generate_gpf:\n" + "ljmp $0x70, $0x47114711\n"); /* segment 0x70 is an arbitrary segment which does not * exist */ void reset_cpu(ulong addr) { diff --git a/cpu/i386/reset.S b/cpu/i386/reset.S index 57e32a8..07a7384 100644 --- a/cpu/i386/reset.S +++ b/cpu/i386/reset.S @@ -1,5 +1,5 @@ /* - * U-boot - i386 Startup Code + * U-boot - i386 Startup Code * * Copyright (c) 2002 Omicron Ceti AB, Daniel Engstr�m * @@ -28,11 +28,10 @@ .section .reset, "ax" .code16 -reset_vector: - cli - cld - jmp start16 +reset_vector: + cli + cld + jmp start16 .org 0xf nop - diff --git a/cpu/i386/sc520.c b/cpu/i386/sc520.c index 500089a..689e775 100644 --- a/cpu/i386/sc520.c +++ b/cpu/i386/sc520.c @@ -36,26 +36,26 @@ #include #include -/* - * utility functions for boards based on the AMD sc520 - * +/* + * utility functions for boards based on the AMD sc520 + * * void write_mmcr_byte(u16 mmcr, u8 data) * void write_mmcr_word(u16 mmcr, u16 data) * void write_mmcr_long(u16 mmcr, u32 data) - * + * * u8 read_mmcr_byte(u16 mmcr) * u16 read_mmcr_word(u16 mmcr) * u32 read_mmcr_long(u16 mmcr) - * + * * void init_sc520(void) * unsigned long init_sc520_dram(void) * void pci_sc520_init(struct pci_controller *hose) - * + * * void reset_timer(void) * ulong get_timer(ulong base) * void set_timer(ulong t) * void udelay(unsigned long usec) - * + * */ static u32 mmcr_base= 0xfffef000; @@ -67,7 +67,7 @@ void write_mmcr_word(u16 mmcr, u16 data) { - writew(data, mmcr+mmcr_base); + writew(data, mmcr+mmcr_base); } void write_mmcr_long(u16 mmcr, u32 data) @@ -82,7 +82,7 @@ u16 read_mmcr_word(u16 mmcr) { - return readw(mmcr+mmcr_base); + return readw(mmcr+mmcr_base); } u32 read_mmcr_long(u16 mmcr) @@ -94,19 +94,19 @@ void init_sc520(void) { DECLARE_GLOBAL_DATA_PTR; - + /* Set the UARTxCTL register at it's slower, - * baud clock giving us a 1.8432 MHz reference + * baud clock giving us a 1.8432 MHz reference */ write_mmcr_byte(SC520_UART1CTL, 7); write_mmcr_byte(SC520_UART2CTL, 7); - + /* first set the timer pin mapping */ write_mmcr_byte(SC520_CLKSEL, 0x72); /* no clock frequency selected, use 1.1892MHz */ - + /* enable PCI bus arbitrer */ write_mmcr_byte(SC520_SYSARBCTL,0x02); /* enable concurrent mode */ - + write_mmcr_word(SC520_SYSARBMENB,0x1f); /* enable external grants */ write_mmcr_word(SC520_HBCTL,0x04); /* enable posted-writes */ @@ -120,10 +120,10 @@ printf("## CPU Speed set to 100MHz\n"); gd->cpu_clk = 100000000; } - + /* wait at least one millisecond */ - asm("movl $0x2000,%%ecx\n" + asm("movl $0x2000,%%ecx\n" "wait_loop: pushl %%ecx\n" "popl %%ecx\n" "loop wait_loop\n": : : "ecx"); @@ -141,19 +141,19 @@ { DECLARE_GLOBAL_DATA_PTR; bd_t *bd = gd->bd; - + u32 dram_present=0; u32 dram_ctrl; int val; - - int cas_precharge_delay = CFG_SDRAM_PRECHARGE_DELAY; - int refresh_rate = CFG_SDRAM_REFRESH_RATE; + + int cas_precharge_delay = CFG_SDRAM_PRECHARGE_DELAY; + int refresh_rate = CFG_SDRAM_REFRESH_RATE; int ras_cas_delay = CFG_SDRAM_RAS_CAS_DELAY; - + /* set SDRAM speed here */ - - refresh_rate/=78; + + refresh_rate/=78; if (refresh_rate<=1) { val = 0; /* 7.8us */ } else if (refresh_rate==2) { @@ -164,22 +164,22 @@ val = 3; /* 62.4us */ } write_mmcr_byte(SC520_DRCCTL, (read_mmcr_byte(SC520_DRCCTL) & 0xcf) | (val<<4)); - + val = read_mmcr_byte(SC520_DRCTMCTL); val &= 0xf0; - - if (cas_precharge_delay==3) { + + if (cas_precharge_delay==3) { val |= 0x04; /* 3T */ - } else if (cas_precharge_delay==4) { + } else if (cas_precharge_delay==4) { val |= 0x08; /* 4T */ - } else if (cas_precharge_delay>4) { + } else if (cas_precharge_delay>4) { val |= 0x0c; - } - + } + if (ras_cas_delay > 3) { - val |= 2; + val |= 2; } else { - val |= 1; + val |= 1; } write_mmcr_byte(SC520_DRCTMCTL, val); @@ -187,37 +187,37 @@ /* We read-back the configuration of the dram * controller that the assembly code wrote */ dram_ctrl = read_mmcr_long(SC520_DRCBENDADR); - + bd->bi_dram[0].start = 0; if (dram_ctrl & 0x80) { /* bank 0 enabled */ dram_present = bd->bi_dram[1].start = (dram_ctrl & 0x7f) << 22; - bd->bi_dram[0].size = bd->bi_dram[1].start; + bd->bi_dram[0].size = bd->bi_dram[1].start; } else { bd->bi_dram[0].size = 0; bd->bi_dram[1].start = bd->bi_dram[0].start; } - + if (dram_ctrl & 0x8000) { /* bank 1 enabled */ dram_present = bd->bi_dram[2].start = (dram_ctrl & 0x7f00) << 14; - bd->bi_dram[1].size = bd->bi_dram[2].start - bd->bi_dram[1].start; + bd->bi_dram[1].size = bd->bi_dram[2].start - bd->bi_dram[1].start; } else { bd->bi_dram[1].size = 0; bd->bi_dram[2].start = bd->bi_dram[1].start; } - + if (dram_ctrl & 0x800000) { /* bank 2 enabled */ dram_present = bd->bi_dram[3].start = (dram_ctrl & 0x7f0000) << 6; - bd->bi_dram[2].size = bd->bi_dram[3].start - bd->bi_dram[2].start; + bd->bi_dram[2].size = bd->bi_dram[3].start - bd->bi_dram[2].start; } else { bd->bi_dram[2].size = 0; bd->bi_dram[3].start = bd->bi_dram[2].start; - } - + } + if (dram_ctrl & 0x80000000) { /* bank 3 enabled */ dram_present = (dram_ctrl & 0x7f000000) >> 2; @@ -226,12 +226,12 @@ bd->bi_dram[3].size = 0; } - -#if 0 + +#if 0 printf("Configured %d bytes of dram\n", dram_present); -#endif +#endif gd->ram_size = dram_present; - + return dram_present; } @@ -265,19 +265,19 @@ /* The interrupt used for PCI INTA-INTD */ -int sc520_pci_ints[15] = { +int sc520_pci_ints[15] = { -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 }; /* utility function to configure a pci interrupt */ -int pci_sc520_set_irq(int pci_pin, int irq) +int pci_sc520_set_irq(int pci_pin, int irq) { int i; - + # if 0 printf("set_irq(): map INT%c to IRQ%d\n", pci_pin + 'A', irq); -#endif +#endif if (irq < 0 || irq > 15) { return -1; /* illegal irq */ } @@ -286,7 +286,7 @@ return -1; /* illegal pci int pin */ } - /* first disable any non-pci interrupt source that use + /* first disable any non-pci interrupt source that use * this level */ for (i=SC520_GPTMR0MAP;i<=SC520_GP10IMAP;i++) { if (i>=SC520_PCIINTAMAP&&i<=SC520_PCIINTDMAP) { @@ -296,31 +296,31 @@ write_mmcr_byte(i, SC520_IRQ_DISABLED); } } - + /* Set the trigger to level */ - write_mmcr_byte(sc520_irq[irq].level_reg, + write_mmcr_byte(sc520_irq[irq].level_reg, read_mmcr_byte(sc520_irq[irq].level_reg) | sc520_irq[irq].level_bit); - - + + if (pci_pin < 4) { /* PCI INTA-INTD */ /* route the interrupt */ write_mmcr_byte(SC520_PCIINTAMAP + pci_pin, sc520_irq[irq].priority); - - + + } else { /* GPIRQ0-GPIRQ10 used for additional PCI INTS */ write_mmcr_byte(SC520_GP0IMAP + pci_pin - 4, sc520_irq[irq].priority); - + /* also set the polarity in this case */ - write_mmcr_word(SC520_INTPINPOL, + write_mmcr_word(SC520_INTPINPOL, read_mmcr_word(SC520_INTPINPOL) | (1 << (pci_pin-4))); - + } - - /* register the pin */ + + /* register the pin */ sc520_pci_ints[pci_pin] = irq; - + return 0; /* OK */ } @@ -331,35 +331,35 @@ hose->last_busno = 0xff; /* System memory space */ - pci_set_region(hose->regions + 0, + pci_set_region(hose->regions + 0, SC520_PCI_MEMORY_BUS, SC520_PCI_MEMORY_PHYS, SC520_PCI_MEMORY_SIZE, PCI_REGION_MEM | PCI_REGION_MEMORY); /* PCI memory space */ - pci_set_region(hose->regions + 1, + pci_set_region(hose->regions + 1, SC520_PCI_MEM_BUS, SC520_PCI_MEM_PHYS, SC520_PCI_MEM_SIZE, PCI_REGION_MEM); /* ISA/PCI memory space */ - pci_set_region(hose->regions + 2, + pci_set_region(hose->regions + 2, SC520_ISA_MEM_BUS, SC520_ISA_MEM_PHYS, SC520_ISA_MEM_SIZE, PCI_REGION_MEM); /* PCI I/O space */ - pci_set_region(hose->regions + 3, + pci_set_region(hose->regions + 3, SC520_PCI_IO_BUS, SC520_PCI_IO_PHYS, SC520_PCI_IO_SIZE, PCI_REGION_IO); /* ISA/PCI I/O space */ - pci_set_region(hose->regions + 4, + pci_set_region(hose->regions + 4, SC520_ISA_IO_BUS, SC520_ISA_IO_PHYS, SC520_ISA_IO_SIZE, @@ -374,15 +374,14 @@ pci_register_hose(hose); hose->last_busno = pci_hose_scan(hose); - + /* enable target memory acceses on host brige */ - pci_write_config_word(0, PCI_COMMAND, + pci_write_config_word(0, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); } - #endif #ifdef CFG_TIMER_SC520 @@ -392,7 +391,7 @@ { write_mmcr_word(SC520_GPTMR0CNT, 0); write_mmcr_word(SC520_GPTMR0CTL, 0x6001); - + } ulong get_timer(ulong base) @@ -414,19 +413,19 @@ { int m=0; long u; - + read_mmcr_word(SC520_SWTMRMILLI); read_mmcr_word(SC520_SWTMRMICRO); - + #if 0 /* do not enable this line, udelay is used in the serial driver -> recursion */ printf("udelay: %ld m.u %d.%d tm.tu %d.%d\n", usec, m, u, tm, tu); -#endif +#endif while (1) { - + m += read_mmcr_word(SC520_SWTMRMILLI); u = read_mmcr_word(SC520_SWTMRMICRO) + (m * 1000); - + if (usec <= u) { break; } @@ -440,13 +439,13 @@ u8 temp=0; if (freq >= 8192) { - temp |= CTL_CLK_SEL_4; + temp |= CTL_CLK_SEL_4; } else if (freq >= 4096) { - temp |= CTL_CLK_SEL_8; + temp |= CTL_CLK_SEL_8; } else if (freq >= 2048) { - temp |= CTL_CLK_SEL_16; + temp |= CTL_CLK_SEL_16; } else if (freq >= 1024) { - temp |= CTL_CLK_SEL_32; + temp |= CTL_CLK_SEL_32; } else if (freq >= 512) { temp |= CTL_CLK_SEL_64; } else if (freq >= 256) { @@ -456,47 +455,47 @@ } else { temp |= CTL_CLK_SEL_512; } - + if (!lsb_first) { temp |= MSBF_ENB; } - + if (inv_clock) { temp |= CLK_INV_ENB; } - + if (inv_phase) { temp |= PHS_INV_ENB; } - + write_mmcr_byte(SC520_SSICTL, temp); - + return 0; } -u8 ssi_txrx_byte(u8 data) +u8 ssi_txrx_byte(u8 data) { write_mmcr_byte(SC520_SSIXMIT, data); while ((read_mmcr_byte(SC520_SSISTA)) & SSISTA_BSY); write_mmcr_byte(SC520_SSICMD, SSICMD_CMD_SEL_XMITRCV); while ((read_mmcr_byte(SC520_SSISTA)) & SSISTA_BSY); - return read_mmcr_byte(SC520_SSIRCV); -} + return read_mmcr_byte(SC520_SSIRCV); +} -void ssi_tx_byte(u8 data) +void ssi_tx_byte(u8 data) { write_mmcr_byte(SC520_SSIXMIT, data); - while ((read_mmcr_byte(SC520_SSISTA)) & SSISTA_BSY); + while ((read_mmcr_byte(SC520_SSISTA)) & SSISTA_BSY); write_mmcr_byte(SC520_SSICMD, SSICMD_CMD_SEL_XMIT); } -u8 ssi_rx_byte(void) +u8 ssi_rx_byte(void) { while ((read_mmcr_byte(SC520_SSISTA)) & SSISTA_BSY); write_mmcr_byte(SC520_SSICMD, SSICMD_CMD_SEL_RCV); while ((read_mmcr_byte(SC520_SSISTA)) & SSISTA_BSY); return read_mmcr_byte(SC520_SSIRCV); -} +} #endif /* CONFIG_SC520 */ diff --git a/cpu/i386/sc520_asm.S b/cpu/i386/sc520_asm.S index 7a957c7..80464fa 100644 --- a/cpu/i386/sc520_asm.S +++ b/cpu/i386/sc520_asm.S @@ -22,21 +22,21 @@ */ /* This file is largely based on code obtned from AMD. AMD's original - * copyright is included below + * copyright is included below */ /* * ============================================================================= - * - * Copyright 1999 Advanced Micro Devices, Inc. - * - * This software is the property of Advanced Micro Devices, Inc (AMD) which - * specifically grants the user the right to modify, use and distribute this - * software provided this COPYRIGHT NOTICE is not removed or altered. All - * other rights are reserved by AMD. - * - * THE MATERIALS ARE PROVIDED "AS IS" WITHOUT ANY EXPRESS OR IMPLIED WARRANTY - * OF ANY KIND INCLUDING WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT OF + * + * Copyright 1999 Advanced Micro Devices, Inc. + * + * This software is the property of Advanced Micro Devices, Inc (AMD) which + * specifically grants the user the right to modify, use and distribute this + * software provided this COPYRIGHT NOTICE is not removed or altered. All + * other rights are reserved by AMD. + * + * THE MATERIALS ARE PROVIDED "AS IS" WITHOUT ANY EXPRESS OR IMPLIED WARRANTY + * OF ANY KIND INCLUDING WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT OF * THIRD-PARTY INTELLECTUAL PROPERTY, OR FITNESS FOR ANY PARTICULAR PURPOSE. * IN NO EVENT SHALL AMD OR ITS SUPPLIERS BE LIABLE FOR ANY DAMAGES WHATSOEVER * (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS OF PROFITS, BUSINESS @@ -45,19 +45,19 @@ * SUCH DAMAGES. BECAUSE SOME JURSIDICTIONS PROHIBIT THE EXCLUSION OR * LIMITATION OF LIABILITY FOR CONSEQUENTIAL OR INCIDENTAL DAMAGES, THE ABOVE * LIMITATION MAY NOT APPLY TO YOU. - * + * * AMD does not assume any responsibility for any errors that may appear in * the Materials nor any responsibility to support or update the Materials. * AMD retains the right to make changes to its test specifications at any * time, without notice. - * - * So that all may benefit from your experience, please report any problems - * or suggestions about this software back to AMD. Please include your name, - * company, telephone number, AMD product requiring support and question or - * problem encountered. - * - * Advanced Micro Devices, Inc. Worldwide support and contact - * Embedded Processor Division information available at: + * + * So that all may benefit from your experience, please report any problems + * or suggestions about this software back to AMD. Please include your name, + * company, telephone number, AMD product requiring support and question or + * problem encountered. + * + * Advanced Micro Devices, Inc. Worldwide support and contact + * Embedded Processor Division information available at: * Systems Engineering epd.support@amd.com * 5204 E. Ben White Blvd. -or- * Austin, TX 78741 http://www.amd.com/html/support/techsup.html @@ -66,7 +66,7 @@ /******************************************************************************* - * AUTHOR : Buddy Fey - Original. + * AUTHOR : Buddy Fey - Original. ******************************************************************************* */ @@ -140,368 +140,368 @@ * initialize dram controller registers */ .globl mem_init -mem_init: - xorw %ax,%ax - movl $DBCTL, %edi +mem_init: + xorw %ax,%ax + movl $DBCTL, %edi movb %al, (%edi) /* disable write buffer */ - movl $ECCCTL, %edi + movl $ECCCTL, %edi movb %al, (%edi) /* disable ECC */ - movl $DRCTMCTL, %edi - movb $0x1E,%al /* Set SDRAM timing for slowest */ + movl $DRCTMCTL, %edi + movb $0x1E,%al /* Set SDRAM timing for slowest */ movb %al, (%edi) /* * setup loop to do 4 external banks starting with bank 3 */ - movl $0xff000000,%eax /* enable last bank and setup */ - movl $DRCBENDADR, %edi /* ending address register */ + movl $0xff000000,%eax /* enable last bank and setup */ + movl $DRCBENDADR, %edi /* ending address register */ movl %eax, (%edi) - movl $DRCCFG, %edi /* setup */ - movw $0xbbbb,%ax /* dram config register for */ + movl $DRCCFG, %edi /* setup */ + movw $0xbbbb,%ax /* dram config register for */ movw %ax, (%edi) /* * issue a NOP to all DRAMs */ - movl $DRCCTL, %edi /* setup DRAM control register with */ - movb $0x1,%al /* Disable refresh,disable write buffer */ + movl $DRCCTL, %edi /* setup DRAM control register with */ + movb $0x1,%al /* Disable refresh,disable write buffer */ movb %al, (%edi) - movl $CACHELINESZ, %esi /* just a dummy address to write for */ + movl $CACHELINESZ, %esi /* just a dummy address to write for */ movw %ax, (%esi) /* * delay for 100 usec? 200? * ******this is a cludge for now ************* */ - movw $100,%cx -sizdelay: - loop sizdelay /* we need 100 usec here */ + movw $100,%cx +sizdelay: + loop sizdelay /* we need 100 usec here */ /***********************************************/ /* * issue all banks precharge */ - movb $0x2,%al /* All banks precharge */ + movb $0x2,%al /* All banks precharge */ movb %al, (%edi) movw %ax, (%esi) /* - * issue 2 auto refreshes to all banks + * issue 2 auto refreshes to all banks */ - movb $0x4,%al /* Auto refresh cmd */ + movb $0x4,%al /* Auto refresh cmd */ movb %al, (%edi) - movw $2,%cx -refresh1: + movw $2,%cx +refresh1: movw %ax, (%esi) - loop refresh1 + loop refresh1 /* * issue LOAD MODE REGISTER command */ - movb $0x3,%al /* Load mode register cmd */ + movb $0x3,%al /* Load mode register cmd */ movb %al, (%edi) movw %ax, (%esi) /* - * issue 8 more auto refreshes to all banks - */ - movb $0x4,%al /* Auto refresh cmd */ - movb %al, (%edi) - movw $8,%cx -refresh2: - movw %ax, (%esi) - loop refresh2 - - /* - * set control register to NORMAL mode + * issue 8 more auto refreshes to all banks */ - movb $0x0,%al /* Normal mode value */ + movb $0x4,%al /* Auto refresh cmd */ + movb %al, (%edi) + movw $8,%cx +refresh2: + movw %ax, (%esi) + loop refresh2 + + /* + * set control register to NORMAL mode + */ + movb $0x0,%al /* Normal mode value */ movb %al, (%edi) /* * size dram starting with external bank 3 moving to external bank 0 */ - movl $0x3,%ecx /* start with external bank 3 */ + movl $0x3,%ecx /* start with external bank 3 */ -nextbank: +nextbank: /* * write col 11 wrap adr */ - movl $COL11_ADR, %esi /* set address to max col (11) wrap addr */ - movl $COL11_DATA, %eax /* pattern for max supported columns(11) */ + movl $COL11_ADR, %esi /* set address to max col (11) wrap addr */ + movl $COL11_DATA, %eax /* pattern for max supported columns(11) */ movl %eax, (%esi) /* write max col pattern at max col adr */ movl (%esi), %ebx /* optional read */ - cmpl %ebx,%eax /* to verify write */ - jnz bad_ram /* this ram is bad */ + cmpl %ebx,%eax /* to verify write */ + jnz bad_ram /* this ram is bad */ /* * write col 10 wrap adr */ - movl $COL10_ADR, %esi /* set address to 10 col wrap address */ - movl $COL10_DATA, %eax /* pattern for 10 col wrap */ + movl $COL10_ADR, %esi /* set address to 10 col wrap address */ + movl $COL10_DATA, %eax /* pattern for 10 col wrap */ movl %eax, (%esi) /* write 10 col pattern @ 10 col wrap adr */ movl (%esi), %ebx /* optional read */ - cmpl %ebx,%eax /* to verify write */ - jnz bad_ram /* this ram is bad */ + cmpl %ebx,%eax /* to verify write */ + jnz bad_ram /* this ram is bad */ /* * write col 9 wrap adr */ - movl $COL09_ADR, %esi /* set address to 9 col wrap address */ - movl $COL09_DATA, %eax /* pattern for 9 col wrap */ + movl $COL09_ADR, %esi /* set address to 9 col wrap address */ + movl $COL09_DATA, %eax /* pattern for 9 col wrap */ movl %eax, (%esi) /* write 9 col pattern @ 9 col wrap adr */ movl (%esi), %ebx /* optional read */ - cmpl %ebx,%eax /* to verify write */ - jnz bad_ram /* this ram is bad */ + cmpl %ebx,%eax /* to verify write */ + jnz bad_ram /* this ram is bad */ /* * write col 8 wrap adr */ - movl $COL08_ADR, %esi /* set address to min(8) col wrap address */ - movl $COL08_DATA, %eax /* pattern for min (8) col wrap */ + movl $COL08_ADR, %esi /* set address to min(8) col wrap address */ + movl $COL08_DATA, %eax /* pattern for min (8) col wrap */ movl %eax, (%esi) /* write min col pattern @ min col adr */ movl (%esi), %ebx /* optional read */ - cmpl %ebx,%eax /* to verify write */ - jnz bad_ram /* this ram is bad */ + cmpl %ebx,%eax /* to verify write */ + jnz bad_ram /* this ram is bad */ /* * write row 14 wrap adr */ - movl $ROW14_ADR, %esi /* set address to max row (14) wrap addr */ - movl $ROW14_DATA, %eax /* pattern for max supported rows(14) */ + movl $ROW14_ADR, %esi /* set address to max row (14) wrap addr */ + movl $ROW14_DATA, %eax /* pattern for max supported rows(14) */ movl %eax, (%esi) /* write max row pattern at max row adr */ movl (%esi), %ebx /* optional read */ - cmpl %ebx,%eax /* to verify write */ - jnz bad_ram /* this ram is bad */ + cmpl %ebx,%eax /* to verify write */ + jnz bad_ram /* this ram is bad */ /* * write row 13 wrap adr */ - movl $ROW13_ADR, %esi /* set address to 13 row wrap address */ - movl $ROW13_DATA, %eax /* pattern for 13 row wrap */ + movl $ROW13_ADR, %esi /* set address to 13 row wrap address */ + movl $ROW13_DATA, %eax /* pattern for 13 row wrap */ movl %eax, (%esi) /* write 13 row pattern @ 13 row wrap adr */ movl (%esi), %ebx /* optional read */ - cmpl %ebx,%eax /* to verify write */ - jnz bad_ram /* this ram is bad */ + cmpl %ebx,%eax /* to verify write */ + jnz bad_ram /* this ram is bad */ /* * write row 12 wrap adr */ - movl $ROW12_ADR, %esi /* set address to 12 row wrap address */ - movl $ROW12_DATA, %eax /* pattern for 12 row wrap */ + movl $ROW12_ADR, %esi /* set address to 12 row wrap address */ + movl $ROW12_DATA, %eax /* pattern for 12 row wrap */ movl %eax, (%esi) /* write 12 row pattern @ 12 row wrap adr */ movl (%esi), %ebx /* optional read */ - cmpl %ebx,%eax /* to verify write */ - jnz bad_ram /* this ram is bad */ + cmpl %ebx,%eax /* to verify write */ + jnz bad_ram /* this ram is bad */ /* * write row 11 wrap adr */ - movl $ROW11_ADR, %edi /* set address to 11 row wrap address */ - movl $ROW11_DATA, %eax /* pattern for 11 row wrap */ + movl $ROW11_ADR, %edi /* set address to 11 row wrap address */ + movl $ROW11_DATA, %eax /* pattern for 11 row wrap */ movl %eax, (%edi) /* write 11 row pattern @ 11 row wrap adr */ movl (%edi), %ebx /* optional read */ - cmpl %ebx,%eax /* to verify write */ - jnz bad_ram /* this ram is bad */ + cmpl %ebx,%eax /* to verify write */ + jnz bad_ram /* this ram is bad */ /* * write row 10 wrap adr --- this write is really to determine number of banks */ - movl $ROW10_ADR, %edi /* set address to 10 row wrap address */ - movl $ROW10_DATA, %eax /* pattern for 10 row wrap (AA) */ + movl $ROW10_ADR, %edi /* set address to 10 row wrap address */ + movl $ROW10_DATA, %eax /* pattern for 10 row wrap (AA) */ movl %eax, (%edi) /* write 10 row pattern @ 10 row wrap adr */ movl (%edi), %ebx /* optional read */ - cmpl %ebx,%eax /* to verify write */ - jnz bad_ram /* this ram is bad */ + cmpl %ebx,%eax /* to verify write */ + jnz bad_ram /* this ram is bad */ /* - * read data @ row 12 wrap adr to determine * banks, + * read data @ row 12 wrap adr to determine * banks, * and read data @ row 14 wrap adr to determine * rows. * if data @ row 12 wrap adr is not AA, 11 or 12 we have bad RAM. - * if data @ row 12 wrap == AA, we only have 2 banks, NOT 4 + * if data @ row 12 wrap == AA, we only have 2 banks, NOT 4 * if data @ row 12 wrap == 11 or 12, we have 4 banks, */ - xorw %di,%di /* value for 2 banks in DI */ - movl (%esi), %ebx /* read from 12 row wrap to check banks - * (esi is setup from the write to row 12 wrap) */ - cmpl %ebx,%eax /* check for AA pattern (eax holds the aa pattern) */ - jz only2 /* if pattern == AA, we only have 2 banks */ + xorw %di,%di /* value for 2 banks in DI */ + movl (%esi), %ebx /* read from 12 row wrap to check banks + * (esi is setup from the write to row 12 wrap) */ + cmpl %ebx,%eax /* check for AA pattern (eax holds the aa pattern) */ + jz only2 /* if pattern == AA, we only have 2 banks */ /* 4 banks */ - - movw $8,%di /* value for 4 banks in DI (BNK_CNT bit) */ - cmpl $ROW11_DATA, %ebx /* only other legitimate values are 11 */ - jz only2 - cmpl $ROW12_DATA, %ebx /* and 12 */ - jnz bad_ram /* its bad if not 11 or 12! */ - + + movw $8,%di /* value for 4 banks in DI (BNK_CNT bit) */ + cmpl $ROW11_DATA, %ebx /* only other legitimate values are 11 */ + jz only2 + cmpl $ROW12_DATA, %ebx /* and 12 */ + jnz bad_ram /* its bad if not 11 or 12! */ + /* fall through */ -only2: +only2: /* * validate row mask */ - movl $ROW14_ADR, %esi /* set address back to max row wrap addr */ + movl $ROW14_ADR, %esi /* set address back to max row wrap addr */ movl (%esi), %eax /* read actual number of rows @ row14 adr */ - cmpl $ROW11_DATA, %eax /* row must be greater than 11 pattern */ - jb bad_ram + cmpl $ROW11_DATA, %eax /* row must be greater than 11 pattern */ + jb bad_ram - cmpl $ROW14_DATA, %eax /* and row must be less than 14 pattern */ - ja bad_ram + cmpl $ROW14_DATA, %eax /* and row must be less than 14 pattern */ + ja bad_ram - cmpb %ah,%al /* verify all 4 bytes of dword same */ - jnz bad_ram - movl %eax,%ebx - shrl $16,%ebx - cmpw %bx,%ax - jnz bad_ram + cmpb %ah,%al /* verify all 4 bytes of dword same */ + jnz bad_ram + movl %eax,%ebx + shrl $16,%ebx + cmpw %bx,%ax + jnz bad_ram /* * read col 11 wrap adr for real column data value */ - movl $COL11_ADR, %esi /* set address to max col (11) wrap addr */ + movl $COL11_ADR, %esi /* set address to max col (11) wrap addr */ movl (%esi), %eax /* read real col number at max col adr */ /* * validate column data */ - cmpl $COL08_DATA, %eax /* col must be greater than 8 pattern */ - jb bad_ram + cmpl $COL08_DATA, %eax /* col must be greater than 8 pattern */ + jb bad_ram - cmpl $COL11_DATA, %eax /* and row must be less than 11 pattern */ - ja bad_ram + cmpl $COL11_DATA, %eax /* and row must be less than 11 pattern */ + ja bad_ram - subl $COL08_DATA, %eax /* normalize column data to zero */ - jc bad_ram - cmpb %ah,%al /* verify all 4 bytes of dword equal */ - jnz bad_ram - movl %eax,%edx - shrl $16,%edx - cmpw %dx,%ax - jnz bad_ram + subl $COL08_DATA, %eax /* normalize column data to zero */ + jc bad_ram + cmpb %ah,%al /* verify all 4 bytes of dword equal */ + jnz bad_ram + movl %eax,%edx + shrl $16,%edx + cmpw %dx,%ax + jnz bad_ram /* * merge bank and col data together */ - addw %di,%dx /* merge of bank and col info in dl */ + addw %di,%dx /* merge of bank and col info in dl */ /* * fix ending addr mask based upon col info */ - movb $3,%al - subb %dh,%al /* dh contains the overflow from the bank/col merge */ - movb %bl,%dh /* bl contains the row mask (aa, 07, 0f, 1f or 3f) */ - xchgw %cx,%ax /* cx = ax = 3 or 2 depending on 2 or 4 bank device */ - shrb %cl,%dh /* */ - incb %dh /* ending addr is 1 greater than real end */ - xchgw %cx,%ax /* cx is bank number again */ + movb $3,%al + subb %dh,%al /* dh contains the overflow from the bank/col merge */ + movb %bl,%dh /* bl contains the row mask (aa, 07, 0f, 1f or 3f) */ + xchgw %cx,%ax /* cx = ax = 3 or 2 depending on 2 or 4 bank device */ + shrb %cl,%dh /* */ + incb %dh /* ending addr is 1 greater than real end */ + xchgw %cx,%ax /* cx is bank number again */ /* * issue all banks precharge */ -bad_reint: - movl $DRCCTL, %esi /* setup DRAM control register with */ - movb $0x2,%al /* All banks precharge */ +bad_reint: + movl $DRCCTL, %esi /* setup DRAM control register with */ + movb $0x2,%al /* All banks precharge */ movb %al, (%esi) - movl $CACHELINESZ, %esi /* address to init read buffer */ + movl $CACHELINESZ, %esi /* address to init read buffer */ movw %ax, (%esi) /* * update ENDING ADDRESS REGISTER */ - movl $DRCBENDADR, %edi /* DRAM ending address register */ - movl %ecx,%ebx + movl $DRCBENDADR, %edi /* DRAM ending address register */ + movl %ecx,%ebx addl %ebx, %edi movb %dh, (%edi) /* * update CONFIG REGISTER */ - xorb %dh,%dh - movw $0x00f,%bx - movw %cx,%ax - shlw $2,%ax - xchgw %cx,%ax - shlw %cl,%dx - shlw %cl,%bx - notw %bx - xchgw %cx,%ax - movl $DRCCFG, %edi + xorb %dh,%dh + movw $0x00f,%bx + movw %cx,%ax + shlw $2,%ax + xchgw %cx,%ax + shlw %cl,%dx + shlw %cl,%bx + notw %bx + xchgw %cx,%ax + movl $DRCCFG, %edi mov (%edi), %ax - andw %bx,%ax - orw %dx,%ax + andw %bx,%ax + orw %dx,%ax movw %ax, (%edi) - jcxz cleanup + jcxz cleanup - decw %cx - movl %ecx,%ebx - movl $DRCBENDADR, %edi /* DRAM ending address register */ - movb $0xff,%al + decw %cx + movl %ecx,%ebx + movl $DRCBENDADR, %edi /* DRAM ending address register */ + movb $0xff,%al addl %ebx, %edi movb %al, (%edi) /* - * set control register to NORMAL mode + * set control register to NORMAL mode */ - movl $DRCCTL, %esi /* setup DRAM control register with */ - movb $0x0,%al /* Normal mode value */ + movl $DRCCTL, %esi /* setup DRAM control register with */ + movb $0x0,%al /* Normal mode value */ movb %al, (%esi) - movl $CACHELINESZ, %esi /* address to init read buffer */ + movl $CACHELINESZ, %esi /* address to init read buffer */ movw %ax, (%esi) - jmp nextbank + jmp nextbank -cleanup: - movl $DRCBENDADR, %edi /* DRAM ending address register */ - movw $4,%cx - xorw %ax,%ax -cleanuplp: +cleanup: + movl $DRCBENDADR, %edi /* DRAM ending address register */ + movw $4,%cx + xorw %ax,%ax +cleanuplp: movb (%edi), %al - orb %al,%al - jz emptybank + orb %al,%al + jz emptybank - addb %ah,%al - jns nottoomuch + addb %ah,%al + jns nottoomuch - movb $0x7f,%al -nottoomuch: - movb %al,%ah - orb $0x80,%al + movb $0x7f,%al +nottoomuch: + movb %al,%ah + orb $0x80,%al movb %al, (%edi) -emptybank: - incl %edi - loop cleanuplp +emptybank: + incl %edi + loop cleanuplp #if defined(CFG_SDRAM_CAS_LATENCY_2T) || defined(CFG_SDRAM_CAS_LATENCY_3T) /* set the CAS latency now since it is hard to do * when we run from the RAM */ movl $DRCTMCTL, %edi /* DRAM timing register */ - movb (%edi), %al + movb (%edi), %al #ifdef CFG_SDRAM_CAS_LATENCY_2T andb $0xef, %al #endif #ifdef CFG_SDRAM_CAS_LATENCY_3T orb $0x10, %al -#endif +#endif movb %al, (%edi) #endif - movl $DRCCTL, %edi /* DRAM Control register */ - movb $0x3,%al /* Load mode register cmd */ + movl $DRCCTL, %edi /* DRAM Control register */ + movb $0x3,%al /* Load mode register cmd */ movb %al, (%edi) movw %ax, (%esi) - movl $DRCCTL, %edi /* DRAM Control register */ - movb $0x18,%al /* Enable refresh and NORMAL mode */ + movl $DRCCTL, %edi /* DRAM Control register */ + movb $0x18,%al /* Enable refresh and NORMAL mode */ movb %al, (%edi) - jmp dram_done + jmp dram_done -bad_ram: - xorl %edx,%edx - xorl %edi,%edi - jmp bad_reint +bad_ram: + xorl %edx,%edx + xorl %edi,%edi + jmp bad_reint -dram_done: - +dram_done: + /* readback DRCBENDADR and return the number - * of available ram bytes in %eax */ + * of available ram bytes in %eax */ - movl $DRCBENDADR, %edi /* DRAM ending address register */ - + movl $DRCBENDADR, %edi /* DRAM ending address register */ + movl (%edi), %eax movl %eax, %ecx andl $0x80000000, %ecx jz bank2 andl $0x7f000000, %eax - shrl $2, %eax + shrl $2, %eax movl %eax, %ebx bank2: movl (%edi), %eax @@ -509,7 +509,7 @@ andl $0x00800000, %ecx jz bank1 andl $0x007f0000, %eax - shll $6, %eax + shll $6, %eax movl %eax, %ebx bank1: movl (%edi), %eax @@ -517,7 +517,7 @@ andl $0x00008000, %ecx jz bank0 andl $0x00007f00, %eax - shll $14, %eax + shll $14, %eax movl %eax, %ebx bank0: movl (%edi), %eax @@ -525,7 +525,7 @@ andl $0x00000080, %ecx jz done andl $0x0000007f, %eax - shll $22, %eax + shll $22, %eax movl %eax, %ebx done: movl %ebx, %eax diff --git a/cpu/i386/serial.c b/cpu/i386/serial.c index 22c3c2a..f58b47c 100644 --- a/cpu/i386/serial.c +++ b/cpu/i386/serial.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * (C) Copyright 2000 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. * @@ -81,7 +81,6 @@ #define asyncLSRRxFifoError1 0x80 - #if CONFIG_SERIAL_SOFTWARE_FIFO /*-----------------------------------------------------------------------------+ | Fifo @@ -100,7 +99,7 @@ static int serial_div(int baudrate) { - + switch (baudrate) { case 1200: return 96; @@ -113,9 +112,9 @@ case 57600: return 2; case 115200: - return 1; + return 1; } - + return 12; } @@ -132,7 +131,7 @@ volatile char val; int bdiv = serial_div(gd->baudrate); - + outb(0x80, UART0_BASE + UART_LCR); /* set DLAB bit */ outb(bdiv, UART0_BASE + UART_DLL); /* set baudrate divisor */ @@ -154,7 +153,7 @@ DECLARE_GLOBAL_DATA_PTR; unsigned short bdiv; - + bdiv = serial_div(gd->baudrate); outb(0x80, UART0_BASE + UART_LCR); /* set DLAB bit */ @@ -199,7 +198,7 @@ return serial_buffered_getc(); } #endif - + while (1) { #if defined(CONFIG_HW_WATCHDOG) WATCHDOG_RESET(); /* Reset HW Watchdog, if needed */ @@ -262,28 +261,28 @@ } else { space = buf_info.rx_get - rx_put; } - + while (inb(UART0_BASE + UART_LSR) & 1) { c = inb(UART0_BASE); if (space) { buf_info.rx_buffer[rx_put++] = c; space--; - + if (rx_put == buf_info.rx_get) { buf_info.rx_get++; if (rx_put == CONFIG_SERIAL_SOFTWARE_FIFO) { buf_info.rx_get = 0; } } - + if (rx_put == CONFIG_SERIAL_SOFTWARE_FIFO) { rx_put = 0; if (0 == buf_info.rx_get) { buf_info.rx_get = 1; } - + } - + } if (space < CONFIG_SERIAL_SOFTWARE_FIFO / 4) { /* Stop flow by setting RTS inactive */ @@ -309,20 +308,20 @@ buf_info.cts = 0; } - irq_install_handler ( VECNUM_U0 /*UART0 *//*int vec */ , + irq_install_handler ( VECNUM_U0 /*UART0 */ /*int vec */ , serial_isr /*interrupt_handler_t *handler */ , (void *) &buf_info /*void *arg */ ); /* Enable "RX Data Available" Interrupt on UART */ /* outb(inb(UART0_BASE + UART_IER) |0x01, UART0_BASE + UART_IER); */ outb(0x01, UART0_BASE + UART_IER); - + /* Set DTR and RTS active, enable interrupts */ outb(inb (UART0_BASE + UART_MCR) | 0x0b, UART0_BASE + UART_MCR); - + /* Setup UART FIFO: RX trigger level: 1 byte, Enable FIFO */ outb( /*(1 << 6) |*/ 1, UART0_BASE + UART_FCR); - + serial_buffer_active = 1; } @@ -348,7 +347,7 @@ buf_info.cts = 1; } } - + #endif serial_putc (c); } @@ -508,4 +507,3 @@ } #endif /* (CONFIG_KGDB_SER_INDEX & 2) */ #endif /* CFG_CMD_KGDB */ - diff --git a/cpu/i386/start.S b/cpu/i386/start.S index 025555c..afcbb24 100644 --- a/cpu/i386/start.S +++ b/cpu/i386/start.S @@ -1,5 +1,5 @@ /* - * U-boot - i386 Startup Code + * U-boot - i386 Startup Code * * Copyright (c) 2002 Omicron Ceti AB, Daniel Engstr�m * @@ -26,71 +26,71 @@ #include #include - + .section .text .code32 .globl _start -.type _start, @function +.type _start, @function .globl _i386boot_start _i386boot_start: -_start: - movl $0x18,%eax /* Load our segement registes, the - * gdt have already been loaded by start16.S */ - movw %ax,%fs +_start: + movl $0x18,%eax /* Load our segement registes, the + * gdt have already been loaded by start16.S */ + movw %ax,%fs movw %ax,%ds - movw %ax,%gs - movw %ax,%es - movw %ax,%ss - + movw %ax,%gs + movw %ax,%es + movw %ax,%ss + /* We call a few functions in the board support package * since we have no stack yet we'll have to use %ebp * to store the return address */ - + /* Early platform init (setup gpio, etc ) */ mov $early_board_init_ret, %ebp jmp early_board_init early_board_init_ret: - + /* The __port80 entry-point should be usabe by now */ /* so we try to indicate progress */ - movw $0x01, %ax + movw $0x01, %ax movl $.progress0, %ebp jmp __show_boot_progress -.progress0: +.progress0: /* size memory */ mov $mem_init_ret, %ebp - jmp mem_init + jmp mem_init mem_init_ret: - - /* check ammount of configured memory - * (we need atleast bss start+bss size+stack size) */ + + /* check ammount of configured memory + * (we need atleast bss start+bss size+stack size) */ movl $_i386boot_bss_start, %ecx /* BSS start */ - addl $_i386boot_bss_size, %ecx /* BSS size */ + addl $_i386boot_bss_size, %ecx /* BSS size */ addl $CFG_STACK_SIZE, %ecx - cmpl %ecx, %eax + cmpl %ecx, %eax jae mem_ok - + /* indicate (lack of) progress */ - movw $0x81, %ax + movw $0x81, %ax movl $.progress0a, %ebp jmp __show_boot_progress -.progress0a: +.progress0a: jmp die -mem_ok: +mem_ok: /* indicate progress */ - movw $0x02, %ax + movw $0x02, %ax movl $.progress1, %ebp jmp __show_boot_progress -.progress1: +.progress1: /* create a stack after the bss */ - movl $_i386boot_bss_start, %eax + movl $_i386boot_bss_start, %eax addl $_i386boot_bss_size, %eax addl $CFG_STACK_SIZE, %eax - movl %eax, %esp - + movl %eax, %esp + pushl $0 popl %eax cmpl $0, %eax @@ -102,83 +102,83 @@ no_stack: /* indicate (lack of) progress */ - movw $0x82, %ax + movw $0x82, %ax movl $.progress1a, %ebp jmp __show_boot_progress -.progress1a: +.progress1a: jmp die - - -stack_ok: + + +stack_ok: /* indicate progress */ - movw $0x03, %ax + movw $0x03, %ax movl $.progress2, %ebp jmp __show_boot_progress -.progress2: +.progress2: /* copy data section to ram, size must be 4-byte aligned */ movl $_i386boot_romdata_dest, %edi /* destination address */ - movl $_i386boot_romdata_start, %esi /* source address */ + movl $_i386boot_romdata_start, %esi /* source address */ movl $_i386boot_romdata_size, %ecx /* number of bytes to copy */ movl %ecx, %eax andl $3, %eax jnz data_fail - + shrl $2, %ecx /* copy 4 byte each time */ - cld + cld cmpl $0, %ecx - je data_ok -data_segment: - movsl + je data_ok +data_segment: + movsl loop data_segment jmp data_ok data_fail: /* indicate (lack of) progress */ - movw $0x83, %ax + movw $0x83, %ax movl $.progress2a, %ebp jmp __show_boot_progress -.progress2a: +.progress2a: jmp die -data_ok: +data_ok: /* indicate progress */ - movw $0x04, %ax + movw $0x04, %ax movl $.progress3, %ebp jmp __show_boot_progress -.progress3: +.progress3: /* clear bss section in ram, size must be 4-byte aligned */ movl $_i386boot_bss_start, %eax /* BSS start */ - movl $_i386boot_bss_size, %ecx /* BSS size */ + movl $_i386boot_bss_size, %ecx /* BSS size */ movl %ecx, %eax andl $3, %eax jnz bss_fail shrl $2, %ecx /* clear 4 byte each time */ - cld + cld cmpl $0, %ecx - je bss_ok -bss: + je bss_ok +bss: movl $0, (%edi) - add $4, %edi + add $4, %edi loop bss jmp bss_ok bss_fail: /* indicate (lack of) progress */ - movw $0x84, %ax + movw $0x84, %ax movl $.progress3a, %ebp jmp __show_boot_progress -.progress3a: +.progress3a: jmp die -bss_ok: +bss_ok: - wbinvd + wbinvd /* indicate progress */ - movw $0x05, %ax + movw $0x05, %ax movl $.progress4, %ebp jmp __show_boot_progress .progress4: @@ -186,13 +186,11 @@ call start_i386boot /* Enter, U-boot! */ /* indicate (lack of) progress */ - movw $0x85, %ax + movw $0x85, %ax movl $.progress4a, %ebp jmp __show_boot_progress .progress4a: die: hlt jmp die - hlt - - + hlt diff --git a/cpu/i386/start16.S b/cpu/i386/start16.S index a34642f..239f2ff 100644 --- a/cpu/i386/start16.S +++ b/cpu/i386/start16.S @@ -1,5 +1,5 @@ /* - * U-boot - i386 Startup Code + * U-boot - i386 Startup Code * * Copyright (c) 2002, 2003 Omicron Ceti AB, Daniel Engstr�m * @@ -30,37 +30,37 @@ .section .start16, "ax" .code16 .globl start16 -start16: +start16: /* First we let the BSP do some early initialization * this code have to map the flash to its final position */ mov $board_init16_ret, %bp jmp board_init16 -board_init16_ret: - +board_init16_ret: + /* Turn of cache (this might require a 486-class CPU) */ - movl %cr0, %eax - orl $0x60000000,%eax - movl %eax, %cr0 - wbinvd - + movl %cr0, %eax + orl $0x60000000,%eax + movl %eax, %cr0 + wbinvd + /* load the descriptor tables */ o32 cs lidt idt_ptr -o32 cs lgdt gdt_ptr +o32 cs lgdt gdt_ptr /* Now, we enter protected mode */ - movl %cr0, %eax - orl $1,%eax - movl %eax, %cr0 - + movl %cr0, %eax + orl $1,%eax + movl %eax, %cr0 + /* Flush the prefetch queue */ - jmp ff + jmp ff ff: /* Finally jump to the 32bit initialization code */ - movw $code32start, %ax - movw %ax,%bp + movw $code32start, %ax + movw %ax,%bp o32 cs ljmp *(%bp) /* 48-bit far pointer */ @@ -71,17 +71,17 @@ idt_ptr: .word 0 /* limit */ .long 0 /* base */ - + gdt_ptr: .word 0x30 /* limit (48 bytes = 6 GDT entries) */ .long BOOT_SEG + gdt /* base */ - /* The GDT table ... + /* The GDT table ... * - * Selector Type + * Selector Type * 0x00 NULL * 0x08 Unused - * 0x10 32bit code + * 0x10 32bit code * 0x18 32bit data/stack * 0x20 16bit code * 0x28 16bit data/stack @@ -100,12 +100,12 @@ .word 0x0 /* base address = 0 */ .word 0x9300 /* data read/write */ .word 0x00CF /* granularity = 4096, 386 (+5th nibble of limit) */ - + .word 0xFFFF /* 64kb */ .word 0 /* base address = 0 */ .word 0x9b00 /* data read/write */ .word 0x0010 /* granularity = 1 (+5th nibble of limit) */ - + .word 0xFFFF /* 64kb */ .word 0 /* base address = 0 */ .word 0x9300 /* data read/write */ diff --git a/cpu/i386/timer.c b/cpu/i386/timer.c index a23cd6e..486d927 100644 --- a/cpu/i386/timer.c +++ b/cpu/i386/timer.c @@ -46,28 +46,28 @@ int timer_init(void) { system_ticks = 0; - + irq_install_handler(0, timer_isr, NULL); - - /* initialize timer 0 and 2 - * + + /* initialize timer 0 and 2 + * * Timer 0 is used to increment system_tick 1000 times/sec * Timer 1 was used for DRAM refresh in early PC's * Timer 2 is used to drive the speaker * (to stasrt a beep: write 3 to port 0x61, * to stop it again: write 0) */ - - outb(PIT_CMD_CTR0|PIT_CMD_BOTH|PIT_CMD_MODE2, PIT_BASE + PIT_COMMAND); + + outb(PIT_CMD_CTR0|PIT_CMD_BOTH|PIT_CMD_MODE2, PIT_BASE + PIT_COMMAND); outb(TIMER0_VALUE&0xff, PIT_BASE + PIT_T0); outb(TIMER0_VALUE>>8, PIT_BASE + PIT_T0); - outb(PIT_CMD_CTR2|PIT_CMD_BOTH|PIT_CMD_MODE3, PIT_BASE + PIT_COMMAND); + outb(PIT_CMD_CTR2|PIT_CMD_BOTH|PIT_CMD_MODE3, PIT_BASE + PIT_COMMAND); outb(TIMER2_VALUE&0xff, PIT_BASE + PIT_T2); outb(TIMER2_VALUE>>8, PIT_BASE + PIT_T2); timer_init_done = 1; - + return 0; } @@ -87,7 +87,7 @@ return (system_ticks - base); } -void set_timer (ulong t) +void set_timer (ulong t) { system_ticks = t; } @@ -102,20 +102,20 @@ /* this is not very exact */ void udelay (unsigned long usec) -{ +{ int counter; int wraps; - + if (!timer_init_done) { return; } counter = read_pit(); wraps = usec/1000; usec = usec%1000; - + usec*=1194; usec/=1000; - usec+=counter; + usec+=counter; if (usec > 1194) { usec-=1194; wraps++; @@ -123,26 +123,26 @@ while (1) { int new_count = read_pit(); - + if (((new_count < usec) && !wraps) || wraps < 0) { break; } - + if (new_count > counter) { wraps--; } counter = new_count; } - + } #if 0 /* this is a version with debug output */ void _udelay (unsigned long usec) -{ +{ int counter; int wraps; - + int usec1, usec2, usec3; int wraps1, wraps2, wraps3, wraps4; int ctr1, ctr2, ctr3, nct1, nct2; @@ -155,13 +155,13 @@ ctr1 = counter; wraps = usec/1000; usec = usec%1000; - + usec2 = usec; wraps1 = wraps; - + usec*=1194; usec/=1000; - usec+=counter; + usec+=counter; if (usec > 1194) { usec-=1194; wraps++; @@ -169,7 +169,7 @@ usec3 = usec; wraps2 = wraps; - + ctr2 = wraps3 = nct1 = 4711; ctr3 = wraps4 = nct2 = 4711; i=0; @@ -179,7 +179,7 @@ if ((new_count < usec && !wraps) || wraps < 0) { break; } - + if (new_count > counter) { wraps--; } @@ -192,10 +192,10 @@ wraps4 = wraps; nct2 = new_count; } - + counter = new_count; } - + printf("udelay(%d)\n", usec1); printf("counter %d\n", ctr1); printf("1: wraps %d, usec %d\n", wraps1, usec2); diff --git a/cpu/mips/cache.S b/cpu/mips/cache.S index 55daa89..01fbb2f 100644 --- a/cpu/mips/cache.S +++ b/cpu/mips/cache.S @@ -150,7 +150,7 @@ sw zero, 28(a0) addu a0, 32 bltu a0, a1, 2b - + /* Set invalid tag. */ @@ -267,4 +267,3 @@ j ra .end mips_cache_lock - diff --git a/cpu/mips/config.mk b/cpu/mips/config.mk index 4ea6617..1664e14 100644 --- a/cpu/mips/config.mk +++ b/cpu/mips/config.mk @@ -22,4 +22,3 @@ # PLATFORM_CPPFLAGS += -mcpu=4kc -EB -mabicalls - diff --git a/cpu/mips/cpu.c b/cpu/mips/cpu.c index e9676c1..c27abbd 100644 --- a/cpu/mips/cpu.c +++ b/cpu/mips/cpu.c @@ -42,4 +42,3 @@ { } - diff --git a/cpu/mips/incaip_clock.c b/cpu/mips/incaip_clock.c index 7fc6eb0..27f0609 100644 --- a/cpu/mips/incaip_clock.c +++ b/cpu/mips/incaip_clock.c @@ -25,14 +25,13 @@ #include - /******************************************************************************* * -* get_cpuclk - returns the frequency of the CPU. +* get_cpuclk - returns the frequency of the CPU. * * Gets the value directly from the INCA-IP hardware. * -* RETURNS: +* RETURNS: * 150.000.000 for 150 MHz * 130.000.000. for 130 Mhz * 100.000.000. for 100 Mhz @@ -55,24 +54,24 @@ else { /* MUX I set to 100/133 MHz clock */ - if (*((volatile ulong*)INCA_IP_CGU_CGU_DIVCR) & 0x40) + if (*((volatile ulong*)INCA_IP_CGU_CGU_DIVCR) & 0x40) { - /* Division value is 1/3, maximum CPU operating */ - /* frequency is 133.3 MHz */ - return 130000000; + /* Division value is 1/3, maximum CPU operating */ + /* frequency is 133.3 MHz */ + return 130000000; } else { - /* Division value is 1/4, maximum CPU operating */ - /* frequency is 100 MHz */ - return 100000000; + /* Division value is 1/4, maximum CPU operating */ + /* frequency is 100 MHz */ + return 100000000; } } } /******************************************************************************* * -* get_fpiclk - returns the frequency of the FPI bus. +* get_fpiclk - returns the frequency of the FPI bus. * * Gets the value directly from the INCA-IP hardware. * @@ -82,26 +81,24 @@ * This functions should be used by the hardware driver to get the correct * frequency of the CPU. Don't use the macros, which are set to init the CPU * frequency in the ROM code. -* The calculation for the +* The calculation for the */ uint incaip_get_fpiclk(void) { uint clkCPU; - + clkCPU = incaip_get_cpuclk(); - + switch (*((volatile ulong*)INCA_IP_CGU_CGU_DIVCR) & 0xC) { case 0x4: - return clkCPU >> 1; /* devided by 2 */ - break; + return clkCPU >> 1; /* devided by 2 */ + break; case 0x8: - return clkCPU >> 2; /* devided by 4 */ - break; + return clkCPU >> 2; /* devided by 4 */ + break; default: - return clkCPU; - break; + return clkCPU; + break; } } - - diff --git a/cpu/mips/incaip_wdt.S b/cpu/mips/incaip_wdt.S index 9455569..71adaa1 100644 --- a/cpu/mips/incaip_wdt.S +++ b/cpu/mips/incaip_wdt.S @@ -70,4 +70,3 @@ j ra nop - diff --git a/cpu/mips/interrupts.c b/cpu/mips/interrupts.c index 0490a76..87f7a9f 100644 --- a/cpu/mips/interrupts.c +++ b/cpu/mips/interrupts.c @@ -31,4 +31,3 @@ { return 0; } - diff --git a/cpu/mips/serial.c b/cpu/mips/serial.c index b26f41d..585227a 100644 --- a/cpu/mips/serial.c +++ b/cpu/mips/serial.c @@ -23,7 +23,7 @@ #define TOUT_LOOP 100000 /* Set base address for second FPI interrupt control register bank */ -#define SFPI_INTCON_BASEADDR 0xBF0F0000 +#define SFPI_INTCON_BASEADDR 0xBF0F0000 /* Register offset from base address */ #define FBS_ISR 0x00000000 /* Interrupt status register */ @@ -75,11 +75,11 @@ /* we have to set PMU.EN13 bit to enable an ASC device*/ INCAASC_PMU_ENABLE(13); #endif - + /* and we have to set CLC register*/ CLEAR_BIT(pAsc->asc_clc, ASCCLC_DISS); SET_BITFIELD(pAsc->asc_clc, ASCCLC_RMCMASK, ASCCLC_RMCOFFSET, 0x0001); - + /* initialy we are in async mode */ pAsc->asc_con = ASCCON_M_8ASYNC; @@ -89,13 +89,13 @@ #ifdef ASC_FIFO_PRESENT /* TXFIFO's filling level */ SET_BITFIELD(pAsc->asc_txfcon, ASCTXFCON_TXFITLMASK, - ASCTXFCON_TXFITLOFF, INCAASC_TXFIFO_FL); + ASCTXFCON_TXFITLOFF, INCAASC_TXFIFO_FL); /* enable TXFIFO */ SET_BIT(pAsc->asc_txfcon, ASCTXFCON_TXFEN); /* RXFIFO's filling level */ - SET_BITFIELD(pAsc->asc_txfcon, ASCRXFCON_RXFITLMASK, - ASCRXFCON_RXFITLOFF, INCAASC_RXFIFO_FL); + SET_BITFIELD(pAsc->asc_txfcon, ASCRXFCON_RXFITLMASK, + ASCRXFCON_RXFITLOFF, INCAASC_RXFIFO_FL); /* enable RXFIFO */ SET_BIT(pAsc->asc_rxfcon, ASCRXFCON_RXFEN); #endif @@ -123,7 +123,7 @@ /* set the options */ serial_setopt(); - + return 0; } @@ -141,25 +141,25 @@ #ifndef INCAASC_USE_FDV fdv = 2; uiReloadValue = (f_ASC / (fdv * 16 * CONFIG_BAUDRATE)) - 1; -#else +#else fdv = INCAASC_FDV_HIGH_BAUDRATE; uiReloadValue = (f_ASC / (8192 * CONFIG_BAUDRATE / fdv)) - 1; #endif /* INCAASC_USE_FDV */ - + if ( (uiReloadValue < 0) || (uiReloadValue > 8191) ) { #ifndef INCAASC_USE_FDV - fdv = 3; - uiReloadValue = (f_ASC / (fdv * 16 * CONFIG_BAUDRATE)) - 1; -#else - fdv = INCAASC_FDV_LOW_BAUDRATE; - uiReloadValue = (f_ASC / (8192 * CONFIG_BAUDRATE / fdv)) - 1; + fdv = 3; + uiReloadValue = (f_ASC / (fdv * 16 * CONFIG_BAUDRATE)) - 1; +#else + fdv = INCAASC_FDV_LOW_BAUDRATE; + uiReloadValue = (f_ASC / (8192 * CONFIG_BAUDRATE / fdv)) - 1; #endif /* INCAASC_USE_FDV */ - - if ( (uiReloadValue < 0) || (uiReloadValue > 8191) ) - { - return; /* can't impossibly generate that baud rate */ - } + + if ( (uiReloadValue < 0) || (uiReloadValue > 8191) ) + { + return; /* can't impossibly generate that baud rate */ + } } /* Disable Baud Rate Generator; BG should only be written when R=0 */ @@ -174,9 +174,9 @@ CLEAR_BIT(pAsc->asc_con, ASCCON_FDE); if ( fdv == 2 ) - CLEAR_BIT(pAsc->asc_con, ASCCON_BRS); /* BRS = 0 */ + CLEAR_BIT(pAsc->asc_con, ASCCON_BRS); /* BRS = 0 */ else - SET_BIT(pAsc->asc_con, ASCCON_BRS); /* BRS = 1 */ + SET_BIT(pAsc->asc_con, ASCCON_BRS); /* BRS = 1 */ #else /* INCAASC_USE_FDV */ @@ -217,42 +217,42 @@ { /* 7-bit-data */ case ASCOPT_CS7: - con = ASCCON_M_7ASYNCPAR; /* 7-bit-data and parity bit */ - break; + con = ASCCON_M_7ASYNCPAR; /* 7-bit-data and parity bit */ + break; /* 8-bit-data */ case ASCOPT_CS8: - if ( ASC_OPTIONS & ASCOPT_PARENB ) - con = ASCCON_M_8ASYNCPAR; /* 8-bit-data and parity bit */ - else - con = ASCCON_M_8ASYNC; /* 8-bit-data no parity */ - break; - - /* + if ( ASC_OPTIONS & ASCOPT_PARENB ) + con = ASCCON_M_8ASYNCPAR; /* 8-bit-data and parity bit */ + else + con = ASCCON_M_8ASYNC; /* 8-bit-data no parity */ + break; + + /* * only 7 and 8-bit frames are supported - * if we don't use IOCTL extensions + * if we don't use IOCTL extensions */ default: - return -1; + return -1; } if ( ASC_OPTIONS & ASCOPT_STOPB ) - SET_BIT(con, ASCCON_STP); /* 2 stop bits */ + SET_BIT(con, ASCCON_STP); /* 2 stop bits */ else - CLEAR_BIT(con, ASCCON_STP); /* 1 stop bit */ + CLEAR_BIT(con, ASCCON_STP); /* 1 stop bit */ if ( ASC_OPTIONS & ASCOPT_PARENB ) - SET_BIT(con, ASCCON_PEN); /* enable parity checking */ + SET_BIT(con, ASCCON_PEN); /* enable parity checking */ else - CLEAR_BIT(con, ASCCON_PEN); /* disable parity checking */ - + CLEAR_BIT(con, ASCCON_PEN); /* disable parity checking */ + if ( ASC_OPTIONS & ASCOPT_PARODD ) - SET_BIT(con, ASCCON_ODD); /* odd parity */ + SET_BIT(con, ASCCON_ODD); /* odd parity */ else - CLEAR_BIT(con, ASCCON_ODD); /* even parity */ + CLEAR_BIT(con, ASCCON_ODD); /* even parity */ if ( ASC_OPTIONS & ASCOPT_CREAD ) - SET_BIT(pAsc->asc_whbcon, ASCWHBCON_SETREN); /* Receiver enable */ + SET_BIT(pAsc->asc_whbcon, ASCWHBCON_SETREN); /* Receiver enable */ pAsc->asc_con |= con; @@ -293,14 +293,14 @@ #ifndef ASC_FIFO_PRESENT *(volatile unsigned long*)(SFPI_INTCON_BASEADDR + FBS_ISR) = FBS_ISR_AB | - FBS_ISR_AT; + FBS_ISR_AT; #endif - + /* check for errors */ if ( pAsc->asc_con & ASCCON_OE ) { - SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLROE); - return; + SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLROE); + return; } } @@ -321,7 +321,7 @@ symbol_mask = ((ASC_OPTIONS & ASCOPT_CSIZE) == ASCOPT_CS7) ? (0x7f) : (0xff); - + c = (char)(pAsc->asc_rbuf & symbol_mask); #ifndef ASC_FIFO_PRESENT @@ -338,30 +338,30 @@ #ifdef ASC_FIFO_PRESENT if ( (pAsc->asc_fstat & ASCFSTAT_RXFFLMASK) == 0 ) { - res = 0; + res = 0; } #else if (!(*(volatile unsigned long*)(SFPI_INTCON_BASEADDR + FBS_ISR) & - FBS_ISR_AR)) - + FBS_ISR_AR)) + { - res = 0; + res = 0; } #endif else if ( pAsc->asc_con & ASCCON_FE ) { - SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLRFE); - res = 0; + SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLRFE); + res = 0; } else if ( pAsc->asc_con & ASCCON_PE ) { - SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLRPE); - res = 0; + SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLRPE); + res = 0; } else if ( pAsc->asc_con & ASCCON_OE ) { - SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLROE); - res = 0; + SET_BIT(pAsc->asc_whbcon, ASCWHBCON_CLROE); + res = 0; } return res; diff --git a/cpu/mips/serial.h b/cpu/mips/serial.h index ee63360..7ffdcfa 100644 --- a/cpu/mips/serial.h +++ b/cpu/mips/serial.h @@ -24,7 +24,7 @@ #ifdef INCAASC_USE_FDV #define INCAASC_FDV_LOW_BAUDRATE 71 - #define INCAASC_FDV_HIGH_BAUDRATE 453 + #define INCAASC_FDV_HIGH_BAUDRATE 453 #endif /*INCAASC_USE_FDV*/ @@ -41,7 +41,7 @@ #define INCAASC_IRQ_LINE_EIR 0x00040000 /* EIR - Err */ #define INCAASC_IRQ_LINE_TBIR 0x00080000 /* TBIR - Tx Buf*/ -/* interrupt controller access macros */ +/* interrupt controller access macros */ #define ASC_INTERRUPTS_ENABLE(X) \ *((volatile unsigned int*) INCA_IP_ICU_IM2_IER) |= X; #define ASC_INTERRUPTS_DISABLE(X) \ @@ -96,9 +96,9 @@ #define ASCABCON_FCDETEN 0x0010 #define ASCABCON_EMMASK 0x0300 #define ASCABCON_EMOFF 8 - #define ASCABCON_EM_DISAB 0x0 - #define ASCABCON_EM_DURAB 0x1 - #define ASCABCON_EM_ALWAYS 0x2 + #define ASCABCON_EM_DISAB 0x0 + #define ASCABCON_EM_DURAB 0x1 + #define ASCABCON_EM_ALWAYS 0x2 #define ASCABCON_TXINV 0x0400 #define ASCABCON_RXINV 0x0800 @@ -175,4 +175,3 @@ } incaAsc_t; #endif /* __INCincaAscSioh */ - diff --git a/cpu/mips/start.S b/cpu/mips/start.S index b504393..12129de 100644 --- a/cpu/mips/start.S +++ b/cpu/mips/start.S @@ -65,7 +65,7 @@ RVECENT(romReserved,14) RVECENT(romReserved,15) RVECENT(romReserved,16) - RVECENT(romReserved,17) + RVECENT(romReserved,17) RVECENT(romReserved,18) RVECENT(romReserved,19) RVECENT(romReserved,20) @@ -111,7 +111,7 @@ RVECENT(romReserved,60) RVECENT(romReserved,61) RVECENT(romReserved,62) - RVECENT(romReserved,63) + RVECENT(romReserved,63) XVECENT(romExcHandle,0x200) /* bfc00200: R4000 tlbmiss vector */ RVECENT(romReserved,65) RVECENT(romReserved,66) @@ -127,7 +127,7 @@ RVECENT(romReserved,76) RVECENT(romReserved,77) RVECENT(romReserved,78) - RVECENT(romReserved,79) + RVECENT(romReserved,79) XVECENT(romExcHandle,0x280) /* bfc00280: R4000 xtlbmiss vector */ RVECENT(romReserved,81) RVECENT(romReserved,82) @@ -143,7 +143,7 @@ RVECENT(romReserved,92) RVECENT(romReserved,93) RVECENT(romReserved,94) - RVECENT(romReserved,95) + RVECENT(romReserved,95) XVECENT(romExcHandle,0x300) /* bfc00300: R4000 cache vector */ RVECENT(romReserved,97) RVECENT(romReserved,98) @@ -176,7 +176,7 @@ RVECENT(romReserved,125) RVECENT(romReserved,126) RVECENT(romReserved,127) - + /* We hope there are no more reserved vectors! * 128 * 8 == 1024 == 0x400 * so this is address R_VEC+0x400 == 0xbfc00400 @@ -237,7 +237,7 @@ nop #endif - /* Initialize any external memory. + /* Initialize any external memory. */ bal memsetup nop @@ -300,7 +300,7 @@ sub gp, CFG_MONITOR_BASE add gp, a2 /* gp now adjusted */ sub t6, gp, t6 /* t6 <-- relocation offset */ - + li t0, CFG_MONITOR_BASE la t3, in_ram lw t2, -12(t3) /* t2 <-- uboot_end_data */ @@ -363,14 +363,13 @@ 1: addi t1, 4 bltl t1, t2, 1b sw zero, 0(t1) /* delay slot */ - + move a0, a1 la t9, board_init_r j t9 move a1, a2 /* delay slot */ .end relocate_code - /* Exception handlers. @@ -380,4 +379,3 @@ romExcHandle: b romExcHandle - diff --git a/cpu/mpc5xx/Makefile b/cpu/mpc5xx/Makefile index c05b394..ee20dda 100644 --- a/cpu/mpc5xx/Makefile +++ b/cpu/mpc5xx/Makefile @@ -23,10 +23,10 @@ # # File: cpu/mpc5xx/Makefile -# +# # Discription: Makefile to build mpc5xx cpu configuration. # Will include top config.mk which itselfs -# uses the definitions made in cpu/mpc5xx/config.mk +# uses the definitions made in cpu/mpc5xx/config.mk # @@ -34,7 +34,7 @@ LIB = lib$(CPU).a -START = start.S +START = start.S OBJS = serial.o cpu.o cpu_init.o interrupts.o traps.o speed.o all: .depend $(START) $(LIB) diff --git a/cpu/mpc5xx/config.mk b/cpu/mpc5xx/config.mk index d302d48..cfed499 100644 --- a/cpu/mpc5xx/config.mk +++ b/cpu/mpc5xx/config.mk @@ -23,12 +23,11 @@ # # File: config.mk -# +# # Discription: compiler flags and make definitions # - + PLATFORM_RELFLAGS += -mrelocatable -ffixed-r14 -meabi PLATFORM_CPPFLAGS += -DCONFIG_5xx -ffixed-r2 -ffixed-r29 -mpowerpc -msoft-float - diff --git a/cpu/mpc5xx/cpu.c b/cpu/mpc5xx/cpu.c index 5b3bd26..cc69511 100644 --- a/cpu/mpc5xx/cpu.c +++ b/cpu/mpc5xx/cpu.c @@ -17,15 +17,15 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, + * Foundation, */ /* * File: cpu.c - * - * Discription: Some cpu specific function for watchdog, + * + * Discription: Some cpu specific function for watchdog, * cpu version test, clock setting ... - * + * */ @@ -74,7 +74,7 @@ } /* - * Called by macro WATCHDOG_RESET + * Called by macro WATCHDOG_RESET */ #if defined(CONFIG_WATCHDOG) void watchdog_reset (void) @@ -93,7 +93,7 @@ { /* Use the MPC5xx Internal Watchdog */ immr->im_siu_conf.sc_swsr = 0x556c; /* Prevent SW time-out */ - immr->im_siu_conf.sc_swsr = 0xaa39; + immr->im_siu_conf.sc_swsr = 0xaa39; } #endif /* CONFIG_WATCHDOG */ @@ -124,32 +124,31 @@ /* - * Reset board + * Reset board */ int do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { ulong addr; - + /* Interrupts off, enable reset */ - __asm__ volatile (" mtspr 81, %r0 \n\t" + __asm__ volatile (" mtspr 81, %r0 \n\t" " mfmsr %r3 \n\t" " rlwinm %r31,%r3,0,25,23\n\t" " mtmsr %r31 \n\t"); - /* - * Trying to execute the next instruction at a non-existing address - * should cause a machine check, resulting in reset - */ + /* + * Trying to execute the next instruction at a non-existing address + * should cause a machine check, resulting in reset + */ #ifdef CFG_RESET_ADDRESS - addr = CFG_RESET_ADDRESS; + addr = CFG_RESET_ADDRESS; #else - /* - * note: when CFG_MONITOR_BASE points to a RAM address, CFG_MONITOR_BASE * - sizeof (ulong) is usually a valid address. Better pick an address - * known to be invalid on your system and assign it to CFG_RESET_ADDRESS. - * "(ulong)-1" used to be a good choice for many systems... - */ - addr = CFG_MONITOR_BASE - sizeof (ulong); + /* + * note: when CFG_MONITOR_BASE points to a RAM address, CFG_MONITOR_BASE * - sizeof (ulong) is usually a valid address. Better pick an address + * known to be invalid on your system and assign it to CFG_RESET_ADDRESS. + * "(ulong)-1" used to be a good choice for many systems... + */ + addr = CFG_MONITOR_BASE - sizeof (ulong); #endif ((void (*) (void)) addr) (); return 1; } - diff --git a/cpu/mpc5xx/cpu_init.c b/cpu/mpc5xx/cpu_init.c index 27cf3d6..e19d0f4 100644 --- a/cpu/mpc5xx/cpu_init.c +++ b/cpu/mpc5xx/cpu_init.c @@ -16,12 +16,12 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, + * Foundation, */ /* * File: cpu_init.c - * + * * Discription: Contains initialisation functions to setup * the cpu properly * @@ -32,7 +32,7 @@ #include /* - * Setup essential cpu registers to run + * Setup essential cpu registers to run */ void cpu_init_f (volatile immap_t * immr) { @@ -45,7 +45,7 @@ #if defined(CONFIG_WATCHDOG) reset_5xx_watchdog (immr); -#endif +#endif /* SIUMCR - contains debug pin configuration */ immr->im_siu_conf.sc_siumcr |= CFG_SIUMCR; @@ -56,10 +56,10 @@ /* Full IMB bus speed */ immr->im_uimb.uimb_umcr = CFG_UMCR; - + /* Time base and decrementer will be enables (TBE) */ /* in init_timebase() in time.c called from board_init_f(). */ - + /* Initialize the PIT. Unlock PISCRK */ immr->im_sitk.sitk_piscrk = KAPWR_KEY; immr->im_sit.sit_piscr = CFG_PISCR; diff --git a/cpu/mpc5xx/interrupts.c b/cpu/mpc5xx/interrupts.c index 282c316..4618680 100644 --- a/cpu/mpc5xx/interrupts.c +++ b/cpu/mpc5xx/interrupts.c @@ -17,12 +17,12 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, + * Foundation, */ /* * File: interrupt.c - * + * * Discription: Contains interrupt routines needed by U-Boot * */ @@ -46,7 +46,7 @@ static struct interrupt_action irq_vecs[NR_IRQS]; /* - * Local function prototypes + * Local function prototypes */ static __inline__ unsigned long get_msr (void) { @@ -78,15 +78,15 @@ } /* - * Enable interrupts - */ + * Enable interrupts + */ void enable_interrupts (void) { set_msr (get_msr () | MSR_EE); } -/* - * Returns flag if MSR_EE was set before +/* + * Returns flag if MSR_EE was set before */ int disable_interrupts (void) { @@ -97,7 +97,7 @@ } /* - * Initialise interrupts + * Initialise interrupts */ int interrupt_init (void) @@ -209,7 +209,7 @@ volatile ulong timestamp = 0; /* - * Timer interrupt - gets called when bit 0 of DEC changes from + * Timer interrupt - gets called when bit 0 of DEC changes from * 0. Decrementer is enabled with bit TBE in TBSCR. */ void timer_interrupt (struct pt_regs *regs) @@ -226,7 +226,7 @@ immr->im_clkrstk.cark_plprcrk = KAPWR_KEY; __asm__ ("nop"); immr->im_clkrst.car_plprcr |= PLPRCR_TEXPS | PLPRCR_TMIST; - + /* Restore Decrementer Count */ set_dec (decrementer_count); @@ -249,7 +249,7 @@ } /* - * Reset timer + * Reset timer */ void reset_timer (void) { diff --git a/cpu/mpc5xx/serial.c b/cpu/mpc5xx/serial.c index 738c275..4868782 100644 --- a/cpu/mpc5xx/serial.c +++ b/cpu/mpc5xx/serial.c @@ -17,13 +17,13 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, + * Foundation, */ /* * File: serial.c - * - * Discription: Serial interface driver for SCI1 and SCI2. + * + * Discription: Serial interface driver for SCI1 and SCI2. * Since this code will be called from ROM use * only non-static local variables. * @@ -36,7 +36,7 @@ /* - * Local function prototypes + * Local function prototypes */ static int ready_to_send(void); @@ -54,25 +54,25 @@ #if defined(CONFIG_5xx_CONS_SCI1) /* 10-Bit, 1 start bit, 8 data bit, no parity, 1 stop bit */ immr->im_qsmcm.qsmcm_scc1r1 = SCI_M_10; - immr->im_qsmcm.qsmcm_scc1r1 = SCI_TE | SCI_RE; + immr->im_qsmcm.qsmcm_scc1r1 = SCI_TE | SCI_RE; #else - immr->im_qsmcm.qsmcm_scc2r1 = SCI_M_10; + immr->im_qsmcm.qsmcm_scc2r1 = SCI_M_10; immr->im_qsmcm.qsmcm_scc2r1 = SCI_TE | SCI_RE; #endif return 0; } void serial_putc(const char c) -{ +{ volatile immap_t *immr = (immap_t *)CFG_IMMR; - + /* Test for completition */ if(ready_to_send()) { #if defined(CONFIG_5xx_CONS_SCI1) - immr->im_qsmcm.qsmcm_sc1dr = (short)c; + immr->im_qsmcm.qsmcm_sc1dr = (short)c; #else immr->im_qsmcm.qsmcm_sc2dr = (short)c; -#endif +#endif if(c == '\n') { if(ready_to_send()); #if defined(CONFIG_5xx_CONS_SCI1) @@ -85,27 +85,27 @@ } int serial_getc(void) -{ +{ volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile short status; unsigned char tmp; - + /* New data ? */ do { #if defined(CONFIG_5xx_CONS_SCI1) - status = immr->im_qsmcm.qsmcm_sc1sr; + status = immr->im_qsmcm.qsmcm_sc1sr; #else status = immr->im_qsmcm.qsmcm_sc2sr; #endif #if defined(CONFIG_WATCHDOG) - reset_5xx_watchdog (immr); + reset_5xx_watchdog (immr); #endif - } while ((status & SCI_RDRF) == 0); - + } while ((status & SCI_RDRF) == 0); + /* Read data */ #if defined(CONFIG_5xx_CONS_SCI1) - tmp = (unsigned char)(immr->im_qsmcm.qsmcm_sc1dr & SCI_SCXDR_MK); + tmp = (unsigned char)(immr->im_qsmcm.qsmcm_sc1dr & SCI_SCXDR_MK); #else tmp = (unsigned char)( immr->im_qsmcm.qsmcm_sc2dr & SCI_SCXDR_MK); #endif @@ -115,27 +115,27 @@ int serial_tstc() { volatile immap_t *immr = (immap_t *)CFG_IMMR; - short status; + short status; /* New data character ? */ #if defined(CONFIG_5xx_CONS_SCI1) - status = immr->im_qsmcm.qsmcm_sc1sr; + status = immr->im_qsmcm.qsmcm_sc1sr; #else status = immr->im_qsmcm.qsmcm_sc2sr; #endif - return (status & SCI_RDRF); + return (status & SCI_RDRF); } void serial_setbrg (void) { DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *immr = (immap_t *)CFG_IMMR; + volatile immap_t *immr = (immap_t *)CFG_IMMR; short scxbr; /* Set baudrate */ scxbr = (gd->cpu_clk / (32 * gd->baudrate)); #if defined(CONFIG_5xx_CONS_SCI1) - immr->im_qsmcm.qsmcm_scc1r0 = (scxbr & SCI_SCXBR_MK); + immr->im_qsmcm.qsmcm_scc1r0 = (scxbr & SCI_SCXBR_MK); #else immr->im_qsmcm.qsmcm_scc2r0 = (scxbr & SCI_SCXBR_MK); #endif @@ -154,18 +154,17 @@ volatile immap_t *immr = (immap_t *)CFG_IMMR; volatile short status; - do { + do { #if defined(CONFIG_5xx_CONS_SCI1) - status = immr->im_qsmcm.qsmcm_sc1sr; + status = immr->im_qsmcm.qsmcm_sc1sr; #else status = immr->im_qsmcm.qsmcm_sc2sr; #endif #if defined(CONFIG_WATCHDOG) - reset_5xx_watchdog (immr); + reset_5xx_watchdog (immr); #endif - } while ((status & SCI_TDRE) == 0); - return 1; + } while ((status & SCI_TDRE) == 0); + return 1; } - diff --git a/cpu/mpc5xx/speed.c b/cpu/mpc5xx/speed.c index 8098c99..f6097f5 100644 --- a/cpu/mpc5xx/speed.c +++ b/cpu/mpc5xx/speed.c @@ -17,14 +17,14 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, + * Foundation, */ /* * File: speed.c - * + * * Discription: Provides cpu speed calculation - * + * */ #include @@ -49,8 +49,8 @@ gd->cpu_clk = vcoout / (2^(((immr->im_clkrst.car_sccr & SCCR_DFNL_MSK) >> SCCR_DFNL_SHIFT) + 1)); } else { gd->cpu_clk = vcoout / (2^(immr->im_clkrst.car_sccr & SCCR_DFNH_MSK)); - } - + } + #else /* CONFIG_5xx_GCLK_FREQ */ gd->bus_clk = CONFIG_5xx_GCLK_FREQ; #endif /* CONFIG_5xx_GCLK_FREQ */ diff --git a/cpu/mpc5xx/start.S b/cpu/mpc5xx/start.S index 694de77..3b6d344 100644 --- a/cpu/mpc5xx/start.S +++ b/cpu/mpc5xx/start.S @@ -3,7 +3,7 @@ * Copyright (C) 1999 Magnus Damm * Copyright (C) 2000, 2001, 2002 Wolfgang Denk * Copyright (C) 2003 Martin Winistoerfer, martinwinistoerfer@gmx.ch. - * + * * See file CREDITS for list of people who contributed to this * project. * @@ -25,7 +25,7 @@ /* * File: start.S - * + * * Discription: startup code * */ @@ -39,9 +39,9 @@ #include #include - + #include -#include +#include #ifndef CONFIG_IDENT_STRING #define CONFIG_IDENT_STRING "" @@ -88,7 +88,7 @@ _start: mfspr r3, 638 li r4, CFG_ISB /* Set ISB bit */ - or r3, r3, r4 + or r3, r3, r4 mtspr 638, r3 li r21, BOOTFLAG_COLD /* Normal Power-On: Boot from FLASH */ b boot_cold @@ -131,7 +131,7 @@ /* Initialize some SPRs that are hard to access from C */ /*----------------------------------------------------------------------*/ - + lis r3, CFG_IMMR@h /* Pass IMMR as arg1 to C routine */ lis r2, CFG_INIT_SP_ADDR@h ori r1, r2, CFG_INIT_SP_ADDR@l /* Set up the stack in internal SRAM */ @@ -169,7 +169,6 @@ bl board_init_f /* run 1st part of board init code (from Flash) */ - .globl _start_of_vectors _start_of_vectors: @@ -389,7 +388,7 @@ SYNC rfi - + /* * unsigned int get_immr (unsigned int mask) * @@ -476,7 +475,7 @@ stwu r0,-4(r7) bdnz 3b -4: sync +4: sync isync /* @@ -493,8 +492,8 @@ /* * Relocation Function, r14 point to got2+0x8000 * - * Adjust got2 pointers, no need to check for 0, this code - * already puts a few entries in the table. + * Adjust got2 pointers, no need to check for 0, this code + * already puts a few entries in the table. */ li r0,__got2_entries@sectoff@l la r3,GOT(_GOT2_TABLE_) @@ -508,7 +507,7 @@ bdnz 1b /* - * Now adjust the fixups and the pointers to the fixups + * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. */ 2: li r0,__fixup_entries@sectoff@l diff --git a/cpu/mpc824x/Makefile b/cpu/mpc824x/Makefile index 743ced9..3c00fc7 100644 --- a/cpu/mpc824x/Makefile +++ b/cpu/mpc824x/Makefile @@ -27,7 +27,7 @@ START = start.S drivers/i2c/i2c2.o OBJS = traps.o cpu.o cpu_init.o interrupts.o speed.o \ - drivers/epic/epic1.o drivers/i2c/i2c1.o pci.o bedbug_603e.o + drivers/epic/epic1.o drivers/i2c/i2c1.o pci.o bedbug_603e.o all: .depend $(START) $(LIB) diff --git a/cpu/mpc824x/cpu.c b/cpu/mpc824x/cpu.c index 0d822d5..312dfe2 100644 --- a/cpu/mpc824x/cpu.c +++ b/cpu/mpc824x/cpu.c @@ -92,8 +92,7 @@ /*------------------------------------------------------------------- */ -int do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, - char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { ulong msr, addr; @@ -114,11 +113,11 @@ addr = CFG_RESET_ADDRESS; #else /* - * note: when CFG_MONITOR_BASE points to a RAM address, - * CFG_MONITOR_BASE - sizeof (ulong) is usually a valid - * address. Better pick an address known to be invalid on - * your system and assign it to CFG_RESET_ADDRESS. - * "(ulong)-1" used to be a good choice for many systems... + * note: when CFG_MONITOR_BASE points to a RAM address, + * CFG_MONITOR_BASE - sizeof (ulong) is usually a valid + * address. Better pick an address known to be invalid on + * your system and assign it to CFG_RESET_ADDRESS. + * "(ulong)-1" used to be a good choice for many systems... */ addr = CFG_MONITOR_BASE - sizeof (ulong); #endif diff --git a/cpu/mpc824x/cpu_init.c b/cpu/mpc824x/cpu_init.c index 602f65d..3b5fb79 100644 --- a/cpu/mpc824x/cpu_init.c +++ b/cpu/mpc824x/cpu_init.c @@ -84,7 +84,7 @@ " \ : /* no output */ \ : "r" (CONFIG_ADDR), "r" (CONFIG_DATA), \ - "r" (PCISWAP(addr & ~3)), "r" (PCISWAP(data << 16)) \ + "r" (PCISWAP(addr & ~3)), "r" (PCISWAP(data << 16)) \ ); M_CONFIG_WRITE_HALFWORD(PCIACR, 0x8000); @@ -145,8 +145,8 @@ #if defined(CFG_ASRISE) && defined(CFG_ASFALL) CONFIG_WRITE_WORD(MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT | - CFG_ASRISE << MCCR2_ASRISE_SHIFT | - CFG_ASFALL << MCCR2_ASFALL_SHIFT); + CFG_ASRISE << MCCR2_ASRISE_SHIFT | + CFG_ASFALL << MCCR2_ASFALL_SHIFT); #else CONFIG_WRITE_WORD(MCCR2, CFG_REFINT << MCCR2_REFINT_SHIFT); #endif @@ -196,13 +196,13 @@ CONFIG_WRITE_WORD(MCCR4, (CFG_PRETOACT << MCCR4_PRETOACT_SHIFT) | (CFG_ACTTOPRE << MCCR4_ACTTOPRE_SHIFT) | - (CFG_EXTROM ? MCCR4_EXTROM : 0) | - (CFG_REGDIMM ? MCCR4_REGDIMM : 0) | + (CFG_EXTROM ? MCCR4_EXTROM : 0) | + (CFG_REGDIMM ? MCCR4_REGDIMM : 0) | (CFG_REGISTERD_TYPE_BUFFER ? MCCR4_REGISTERED: 0) | ((CFG_BSTOPRE & 0x0003) <> 6) <> 30; /* retrieve activity bit - bit 30 */ if (actBit == 1) - return ERROR; + return ERROR; tmp &= 0xff30ff00; /* Erase previously set P,S,Prio,Vector bits */ newVal = (Polarity << 23) | (Sense << 22) | (Prio << 16) | Vect; @@ -220,7 +220,7 @@ { if ( (prioNum < 0) || (prioNum > 0xF)) - return ERROR; + return ERROR; sysEUMBBARWrite(EPIC_PROC_CTASK_PRI_REG, prioNum); return OK; } @@ -465,7 +465,6 @@ } - /*********************************************************** * function: epicTmInhibit * diff --git a/cpu/mpc824x/drivers/epic/epic2.S b/cpu/mpc824x/drivers/epic/epic2.S index 8979f88..8cc2fc6 100644 --- a/cpu/mpc824x/drivers/epic/epic2.S +++ b/cpu/mpc824x/drivers/epic/epic2.S @@ -17,14 +17,14 @@ **********************************************/ .text .align 2 - .global CoreExtIntEnable + .global CoreExtIntEnable CoreExtIntEnable: - mfmsr r3 + mfmsr r3 - ori r3,r3,0x8000 /* enable external interrupt */ - mtmsr r3 + ori r3,r3,0x8000 /* enable external interrupt */ + mtmsr r3 - bclr 20, 0 + bclr 20, 0 /******************************************* * function: CoreExtIntDisable @@ -35,20 +35,20 @@ *******************************************/ .text .align 2 - .global CoreExtIntDisable + .global CoreExtIntDisable CoreExtIntDisable: - mfmsr r4 + mfmsr r4 xor r3,r3,r3 or r3,r3,r4 andis. r4,r4,0xffff - andi. r3,r3,0x7fff /* disable external interrupt */ + andi. r3,r3,0x7fff /* disable external interrupt */ or r3,r3,r4 - mtmsr r3 + mtmsr r3 - bclr 20, 0 + bclr 20, 0 /********************************************************* * function: epicEOI @@ -61,20 +61,20 @@ ********************************************************/ .text .align 2 - .global epicEOI + .global epicEOI epicEOI: lis r5,0x0006 /* Build End Of Interrupt Register offset */ ori r5,r5,0x00b0 xor r7,r7,r7 /* Clear r7 */ stwbrx r7,r5,r3 /* Save r7, writing to this register will - * intidate the end of processing the - * highest interrupt. - */ + * intidate the end of processing the + * highest interrupt. + */ sync /* ---RESTORE MACHINE STATE */ mfmsr r13 /* Clear Recoverable Interrupt bit in MSR */ - or r7,r7,r13 + or r7,r7,r13 andis. r7,r7,0xffff andi. r13,r13,0x7ffd /* (and disable interrupts) */ @@ -147,8 +147,8 @@ stw r3,0x1c(r1) /* Push CTR */ mtspr SPRG0,r1 /* Save updated Supervisor stack pointer - * value to SPRG0 - */ + * value to SPRG0 + */ mfmsr r3 ori r3,r3,0x0002 /* Set Recoverable Interrupt bit in MSR */ mtmsr r3 @@ -159,8 +159,8 @@ /* ---READ EPIC REGISTER: PROCESSOR INTERRUPT ACKNOWLEDGE REGISTER */ lis r5,0x0006 /* Build Interrupt Acknowledge Register - * offset - */ + * offset + */ ori r5,r5,0x00a0 lwbrx r7,r5,r6 /* Load interrupt vector into r7 */ sync diff --git a/cpu/mpc824x/drivers/epic/epicutil.S b/cpu/mpc824x/drivers/epic/epicutil.S index a83fbd8..4877050 100644 --- a/cpu/mpc824x/drivers/epic/epicutil.S +++ b/cpu/mpc824x/drivers/epic/epicutil.S @@ -29,12 +29,12 @@ load_runtime_reg: xor r5,r5,r5 - or r5,r5,r3 /* save eumbbar */ + or r5,r5,r3 /* save eumbbar */ lwbrx r3,r4,r5 sync - bclr 20, 0 + bclr 20, 0 /**************************************************************** * function: store_runtime_reg @@ -44,9 +44,9 @@ * r5 - new value to be stored * ****************************************************************/ - .text - .align 2 - .global store_runtime_reg + .text + .align 2 + .global store_runtime_reg store_runtime_reg: xor r0,r0,r0 @@ -55,4 +55,3 @@ sync bclr 20,0 - diff --git a/cpu/mpc824x/drivers/errors.h b/cpu/mpc824x/drivers/errors.h index 1435188..887f284 100644 --- a/cpu/mpc824x/drivers/errors.h +++ b/cpu/mpc824x/drivers/errors.h @@ -30,7 +30,7 @@ #include "config.h" /* - 1 2 3 4 5 6 7 8 + 1 2 3 4 5 6 7 8 01234567890123456789012345678901234567890123456789012345678901234567890123456789 */ /* List define statements here */ @@ -78,7 +78,6 @@ #define FOR_BOARD_ONLY 0xfb0a /* "Not available for Unix." */ - /*----------------------------------------------------------------------*/ /* these are for the error checking toolbox */ @@ -147,9 +146,6 @@ #define UNKNOWN_PARAMETER 0xFE01 /* "unknown type of parameter "*/ - - - /*----------------------------------------------------------------------*/ /* these are for the tokenizer toolbox */ @@ -164,7 +160,6 @@ #define NO_OPEN_IBS 0xFF08 /* "no open input buffers" */ - /* these are for the read from screen toolbox */ #define RESERVED_WORD 0xFC00 /* used a reserved word as an arguement*/ @@ -175,7 +170,6 @@ #define FULL_BPDS 0xFA00 /* breakpoint data structure is full */ - /* THESE are for the downloader */ #define NOT_IN_S_RECORD_FORMAT 0xf900 /* "not in S-Record Format" */ diff --git a/cpu/mpc824x/drivers/i2c/README b/cpu/mpc824x/drivers/i2c/README index 8d82df3..1db7210 100644 --- a/cpu/mpc824x/drivers/i2c/README +++ b/cpu/mpc824x/drivers/i2c/README @@ -102,4 +102,3 @@ host system a way to use its own event handler instead of the I2C_ISR provided here. - diff --git a/cpu/mpc824x/drivers/i2c/i2c.h b/cpu/mpc824x/drivers/i2c/i2c.h index 3209bfe..48a401d 100644 --- a/cpu/mpc824x/drivers/i2c/i2c.h +++ b/cpu/mpc824x/drivers/i2c/i2c.h @@ -109,13 +109,13 @@ */ static I2CStatus I2C_put( unsigned int eumbbar, unsigned char rcv_addr, /* receiver's address */ - unsigned char *buffer_ptr, /* pointer of data to be sent */ + unsigned char *buffer_ptr, /* pointer of data to be sent */ unsigned int length, /* number of byte of in the buffer */ unsigned int stop_flag, /* 1 - signal STOP when buffer is empty - * 0 - no STOP signal when buffer is empty - */ + * 0 - no STOP signal when buffer is empty + */ unsigned int is_cnt ); /* 1 - this is a restart, don't check MBB - * 0 - this is a new start, check MBB + * 0 - this is a new start, check MBB */ /* Receive a buffer of data from the desired sender_addr @@ -130,12 +130,12 @@ static I2CStatus I2C_get( unsigned int eumbbar, unsigned char sender_addr, /* sender's address */ unsigned char *buffer_ptr, /* pointer of receiving buffer */ - unsigned int length, /* length of the receiving buffer */ + unsigned int length, /* length of the receiving buffer */ unsigned int stop_flag, /* 1 - signal STOP when buffer is full - * 0 - no STOP signal when buffer is full + * 0 - no STOP signal when buffer is full */ unsigned int is_cnt ); /* 1 - this is a restart, don't check MBB - * 0 - this is a new start, check MBB + * 0 - this is a new start, check MBB */ #if 0 /* the I2C_write and I2C_read functions are not active */ @@ -160,10 +160,10 @@ */ static I2CStatus I2C_write( unsigned int eumbbar, unsigned char *buffer_ptr, /* pointer of data to be sent */ - unsigned int length, /* number of byte of in the buffer */ - unsigned int stop_flag ); /* 1 - signal STOP when buffer is empty - * 0 - no STOP signal when buffer is empty - */ + unsigned int length, /* number of byte of in the buffer */ + unsigned int stop_flag ); /* 1 - signal STOP when buffer is empty + * 0 - no STOP signal when buffer is empty + */ /* Receive a buffer of data from the sending master. * If stop_flag is set, when the buffer is full and the @@ -175,8 +175,8 @@ static I2CStatus I2C_read(unsigned int eumbbar, unsigned char *buffer_ptr, /* pointer of receiving buffer */ unsigned int length, /* length of the receiving buffer */ - unsigned int stop_flag ); /* 1 - signal STOP when buffer is full - * 0 - no STOP signal when buffer is full + unsigned int stop_flag ); /* 1 - signal STOP when buffer is full + * 0 - no STOP signal when buffer is full */ #endif /* of if0 for turning off I2C_read & I2C_write */ @@ -203,12 +203,12 @@ */ static I2CStatus I2C_Start( unsigned int eumbbar, unsigned char slave_addr, /* address of the receiver */ - I2C_MODE mode, /* XMIT(1) - put (write) - * RCV(0) - get (read) + I2C_MODE mode, /* XMIT(1) - put (write) + * RCV(0) - get (read) */ unsigned int is_cnt ); /* 1 - this is a restart, don't check MBB * 0 - this is a new start, check MBB - */ + */ /* Generate a STOP signal to terminate the transaction. */ static I2CStatus I2C_Stop( unsigned int eumbbar ); @@ -258,10 +258,10 @@ */ static I2CStatus I2C_Init( unsigned int eumbbar, unsigned char fdr, /* frequency divider */ - unsigned char addr, /* driver's address used for receiving */ - unsigned int en_int); /* 1 - enable I2C interrupt - * 0 - disable I2C interrup - */ + unsigned char addr, /* driver's address used for receiving */ + unsigned int en_int); /* 1 - enable I2C interrupt + * 0 - disable I2C interrup + */ /* I2C interrupt service routine. * @@ -299,11 +299,11 @@ * I2C_RESTART, this is a continuation of existing transaction */ static I2C_Status I2C_do_buffer( I2C_INTERRUPT_MODE en_int, - I2C_TRANSACTION_MODE act, - unsigned char i2c_addr, - int len, - unsigned char *buffer, - I2C_STOP_MODE stop, - int retry, - I2C_RESTART_MODE rsta); + I2C_TRANSACTION_MODE act, + unsigned char i2c_addr, + int len, + unsigned char *buffer, + I2C_STOP_MODE stop, + int retry, + I2C_RESTART_MODE rsta); #endif diff --git a/cpu/mpc824x/drivers/i2c/i2c2.S b/cpu/mpc824x/drivers/i2c/i2c2.S index 5cc7c98..3fd7e03 100644 --- a/cpu/mpc824x/drivers/i2c/i2c2.S +++ b/cpu/mpc824x/drivers/i2c/i2c2.S @@ -16,20 +16,20 @@ * * output: r3 - register content **********************************************************/ - .text - .align 2 - .global load_runtime_reg + .text + .align 2 + .global load_runtime_reg load_runtime_reg: -/* xor r5,r5,r5 -* or r5,r5,r3 -* -* lwbrx r3,r4,r5 -*/ - lwbrx r3,r4,r3 - sync +/* xor r5,r5,r5 + * or r5,r5,r3 + * + * lwbrx r3,r4,r5 + */ + lwbrx r3,r4,r3 + sync - bclr 20, 0 + bclr 20, 0 /**************************************************************** * function: store_runtime_reg @@ -39,16 +39,14 @@ * r5 - new value to be stored * ****************************************************************/ - .text - .align 2 - .global store_runtime_reg + .text + .align 2 + .global store_runtime_reg store_runtime_reg: - stwbrx r5, r4, r3 - sync + stwbrx r5, r4, r3 + sync - bclr 20,0 - - + bclr 20,0 #endif /* CONFIG_HARD_I2C */ diff --git a/cpu/mpc824x/drivers/i2c/i2c_export.h b/cpu/mpc824x/drivers/i2c/i2c_export.h index 17403ea..6264d18 100644 --- a/cpu/mpc824x/drivers/i2c/i2c_export.h +++ b/cpu/mpc824x/drivers/i2c/i2c_export.h @@ -71,11 +71,11 @@ extern I2C_Status I2C_Initialize( unsigned char addr, /* driver's I2C slave address */ I2C_INTERRUPT_MODE en_int, /* 1 - enable I2C interrupt - * 0 - disable I2C interrupt - */ - int (*app_print_function)(char *,...)); /* pointer to optional "printf" - * provided by application - */ + * 0 - disable I2C interrupt + */ + int (*app_print_function)(char *,...)); /* pointer to optional "printf" + * provided by application + */ /* Perform the given I2C transaction, only MASTER_XMIT and MASTER_RCV * are implemented. Both are only in polling mode. @@ -92,12 +92,12 @@ * I2C_RESTART, this is a continuation of existing transaction */ extern I2C_Status I2C_do_transaction( I2C_INTERRUPT_MODE en_int, - I2C_TRANSACTION_MODE act, - unsigned char i2c_addr, - unsigned char data_addr, - int len, - char *buffer, - I2C_STOP_MODE stop, - int retry, - I2C_RESTART_MODE rsta); + I2C_TRANSACTION_MODE act, + unsigned char i2c_addr, + unsigned char data_addr, + int len, + char *buffer, + I2C_STOP_MODE stop, + int retry, + I2C_RESTART_MODE rsta); #endif diff --git a/cpu/mpc824x/drivers/i2c_export.h b/cpu/mpc824x/drivers/i2c_export.h index 17403ea..6264d18 100644 --- a/cpu/mpc824x/drivers/i2c_export.h +++ b/cpu/mpc824x/drivers/i2c_export.h @@ -71,11 +71,11 @@ extern I2C_Status I2C_Initialize( unsigned char addr, /* driver's I2C slave address */ I2C_INTERRUPT_MODE en_int, /* 1 - enable I2C interrupt - * 0 - disable I2C interrupt - */ - int (*app_print_function)(char *,...)); /* pointer to optional "printf" - * provided by application - */ + * 0 - disable I2C interrupt + */ + int (*app_print_function)(char *,...)); /* pointer to optional "printf" + * provided by application + */ /* Perform the given I2C transaction, only MASTER_XMIT and MASTER_RCV * are implemented. Both are only in polling mode. @@ -92,12 +92,12 @@ * I2C_RESTART, this is a continuation of existing transaction */ extern I2C_Status I2C_do_transaction( I2C_INTERRUPT_MODE en_int, - I2C_TRANSACTION_MODE act, - unsigned char i2c_addr, - unsigned char data_addr, - int len, - char *buffer, - I2C_STOP_MODE stop, - int retry, - I2C_RESTART_MODE rsta); + I2C_TRANSACTION_MODE act, + unsigned char i2c_addr, + unsigned char data_addr, + int len, + char *buffer, + I2C_STOP_MODE stop, + int retry, + I2C_RESTART_MODE rsta); #endif diff --git a/cpu/mpc824x/drivers/i2o.h b/cpu/mpc824x/drivers/i2o.h index 87225ab..c47253d 100644 --- a/cpu/mpc824x/drivers/i2o.h +++ b/cpu/mpc824x/drivers/i2o.h @@ -123,11 +123,11 @@ PCI master needs to enable the devices' outbound interrupts it wants to handle (REMOTE) **/ extern I2OSTATUS I2OMsgEnable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ); /* b'1' - msg 0 - * b'10'- msg 1 - * b'11'- both - */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ); /* b'1' - msg 0 + * b'10'- msg 1 + * b'11'- both + */ /** Disable the interrupt associated with in/out bound msg @@ -137,11 +137,11 @@ PCI master needs to disable outbound interrupts of devices it is not interested (REMOTE) **/ extern I2OSTATUS I2OMsgDisable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ); /* b'1' - msg 0 - * b'10'- msg 1 - * b'11'- both - */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ); /* b'1' - msg 0 + * b'10'- msg 1 + * b'11'- both + */ /** Read the msg register either from local inbound msg 0/1, @@ -154,9 +154,9 @@ Otherwise local inbound msg is read. **/ extern I2OSTATUS I2OMsgGet ( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int *msg ); + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int *msg ); /** Write to nth Msg register either on local outbound msg 0/1, @@ -169,9 +169,9 @@ Otherwise local outbound msg is written. **/ extern I2OSTATUS I2OMsgPost( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int msg ); + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int msg ); /** Enable the In/Out DoorBell Interrupt @@ -183,8 +183,8 @@ PCI master needs to enable outbound doorbell interrupts of the devices it wants to handle **/ extern I2OSTATUS I2ODBEnable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db );/* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db );/* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ /** Disable the In/Out DoorBell Interrupt @@ -195,8 +195,8 @@ **/ extern I2OSTATUS I2ODBDisable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db ); /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db ); /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ /** Read a local indoorbell register, or an outdoorbell of devices. @@ -209,7 +209,7 @@ Otherwise local in doorbell is read **/ extern unsigned int I2ODBGet( LOCATION, /* REMOTE/LOCAL */ - unsigned int base); /* pcsrbar/eumbbar */ + unsigned int base); /* pcsrbar/eumbbar */ /** Write to a local outdoorbell register, or an indoorbell register of devices. @@ -221,8 +221,8 @@ Otherwise local out doorbell is written **/ extern void I2ODBPost( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int msg ); /* in / out */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int msg ); /* in / out */ /** Read the outbound msg unit interrupt status of devices. Reading an interrupt status register, @@ -251,8 +251,8 @@ MUCR. **/ extern I2OSTATUS I2OFIFOInit( unsigned int eumbbar, - QUEUE_SIZE, - unsigned int qba);/* queue base address that must be aligned at 1M */ + QUEUE_SIZE, + unsigned int qba);/* queue base address that must be aligned at 1M */ /** Enable the circular queue **/ @@ -296,8 +296,8 @@ Unless both free queues are initialized, allocating a free MF will return 0xffffffff **/ extern I2OSTATUS I2OFIFOAlloc( LOCATION, - unsigned int base, - void **pMsg); + unsigned int base, + void **pMsg); /** Free a used msg frame back to free queue PCI Master frees a MFA through outbound queue port of device(OFQPR) @@ -310,8 +310,8 @@ and by device to initialize Outbound free queue before I2OFIFOAlloc can be used. **/ extern I2OSTATUS I2OFIFOFree( LOCATION, - unsigned int base, - void *pMsg ); + unsigned int base, + void *pMsg ); /** Post a msg into FIFO @@ -322,8 +322,8 @@ Otherwise queue overflow interrupt will assert. **/ extern I2OSTATUS I2OFIFOPost( LOCATION, - unsigned int base, - void *pMsg ); + unsigned int base, + void *pMsg ); /** Read a msg from FIFO @@ -331,14 +331,14 @@ while local processor reads a msg from its inbound post queue(IPTPR) **/ extern I2OSTATUS I2OFIFOGet( LOCATION, - unsigned int base, + unsigned int base, void **pMsg ); /** Get the I2O PCI configuration identification register **/ extern I2OSTATUS I2OPCIConfigGet( LOCATION, - unsigned int base, + unsigned int base, I2OIOP *); #endif diff --git a/cpu/mpc824x/drivers/i2o/i2o.h b/cpu/mpc824x/drivers/i2o/i2o.h index 26f7c5c..71572b2 100644 --- a/cpu/mpc824x/drivers/i2o/i2o.h +++ b/cpu/mpc824x/drivers/i2o/i2o.h @@ -124,11 +124,11 @@ PCI master needs to enable the devices' outbound interrupts it wants to handle (REMOTE) **/ extern I2OSTATUS I2OMsgEnable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ); /* b'1' - msg 0 - * b'10'- msg 1 - * b'11'- both - */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ); /* b'1' - msg 0 + * b'10'- msg 1 + * b'11'- both + */ /** Disable the interrupt associated with in/out bound msg @@ -138,11 +138,11 @@ PCI master needs to disable outbound interrupts of devices it is not interested (REMOTE) **/ extern I2OSTATUS I2OMsgDisable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ); /* b'1' - msg 0 - * b'10'- msg 1 - * b'11'- both - */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ); /* b'1' - msg 0 + * b'10'- msg 1 + * b'11'- both + */ /** Read the msg register either from local inbound msg 0/1, @@ -155,9 +155,9 @@ Otherwise local inbound msg is read. **/ extern I2OSTATUS I2OMsgGet ( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int *msg ); + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int *msg ); /** Write to nth Msg register either on local outbound msg 0/1, @@ -170,9 +170,9 @@ Otherwise local outbound msg is written. **/ extern I2OSTATUS I2OMsgPost( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int msg ); + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int msg ); /** Enable the In/Out DoorBell Interrupt @@ -184,8 +184,8 @@ PCI master needs to enable outbound doorbell interrupts of the devices it wants to handle **/ extern I2OSTATUS I2ODBEnable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db );/* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db );/* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ /** Disable the In/Out DoorBell Interrupt @@ -196,8 +196,8 @@ **/ extern I2OSTATUS I2ODBDisable( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db ); /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db ); /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ /** Read a local indoorbell register, or an outdoorbell of devices. @@ -210,7 +210,7 @@ Otherwise local in doorbell is read **/ extern unsigned int I2ODBGet( LOCATION, /* REMOTE/LOCAL */ - unsigned int base); /* pcsrbar/eumbbar */ + unsigned int base); /* pcsrbar/eumbbar */ /** Write to a local outdoorbell register, or an indoorbell register of devices. @@ -222,8 +222,8 @@ Otherwise local out doorbell is written **/ extern void I2ODBPost( LOCATION, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int msg ); /* in / out */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int msg ); /* in / out */ /** Read the outbound msg unit interrupt status of devices. Reading an interrupt status register, @@ -252,8 +252,8 @@ MUCR. **/ extern I2OSTATUS I2OFIFOInit( unsigned int eumbbar, - QUEUE_SIZE, - unsigned int qba);/* queue base address that must be aligned at 1M */ + QUEUE_SIZE, + unsigned int qba);/* queue base address that must be aligned at 1M */ /** Enable the circular queue **/ @@ -297,8 +297,8 @@ Unless both free queues are initialized, allocating a free MF will return 0xffffffff **/ extern I2OSTATUS I2OFIFOAlloc( LOCATION, - unsigned int base, - void **pMsg); + unsigned int base, + void **pMsg); /** Free a used msg frame back to free queue PCI Master frees a MFA through outbound queue port of device(OFQPR) @@ -311,8 +311,8 @@ and by device to initialize Outbound free queue before I2OFIFOAlloc can be used. **/ extern I2OSTATUS I2OFIFOFree( LOCATION, - unsigned int base, - void *pMsg ); + unsigned int base, + void *pMsg ); /** Post a msg into FIFO @@ -323,8 +323,8 @@ Otherwise queue overflow interrupt will assert. **/ extern I2OSTATUS I2OFIFOPost( LOCATION, - unsigned int base, - void *pMsg ); + unsigned int base, + void *pMsg ); /** Read a msg from FIFO @@ -332,14 +332,14 @@ while local processor reads a msg from its inbound post queue(IPTPR) **/ extern I2OSTATUS I2OFIFOGet( LOCATION, - unsigned int base, + unsigned int base, void **pMsg ); /** Get the I2O PCI configuration identification register **/ extern I2OSTATUS I2OPCIConfigGet( LOCATION, - unsigned int base, + unsigned int base, I2OIOP *); #endif diff --git a/cpu/mpc824x/drivers/i2o/i2o1.c b/cpu/mpc824x/drivers/i2o/i2o1.c index d840af0..f058151 100644 --- a/cpu/mpc824x/drivers/i2o/i2o1.c +++ b/cpu/mpc824x/drivers/i2o/i2o1.c @@ -34,10 +34,10 @@ * PCI master needs to enable the outbound interrupts of devices it wants to handle(REMOTE) ************************************************************************************/ I2OSTATUS I2OMsgEnable ( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ) /* b'1' - msg 0 - * b'10'- msg 1 - * b'11'- both + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ) /* b'1' - msg 0 + * b'10'- msg 1 + * b'11'- both */ { unsigned int reg, val; @@ -73,8 +73,8 @@ * PCI master needs to disable outbound interrupts of devices it is not interested(REMOTE) *********************************************************************************/ I2OSTATUS I2OMsgDisable( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned char n ) /* b'1' - msg 0 + unsigned int base, /* pcsrbar/eumbbar */ + unsigned char n ) /* b'1' - msg 0 * b'10'- msg 1 * b'11'- both */ @@ -114,9 +114,9 @@ * If it is remote, outbound msg on the device is read; otherwise local inbound msg is read *************************************************************************/ I2OSTATUS I2OMsgGet ( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int *msg ) + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int *msg ) { if ( n >= I2O_NUM_MSG || msg == 0 ) { @@ -151,9 +151,9 @@ * If it is remote, inbound msg on the device is written; otherwise local outbound msg is written ***************************************************************/ I2OSTATUS I2OMsgPost( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /*pcsrbar/eumbbar */ - unsigned int n, /* 0 or 1 */ - unsigned int msg ) + unsigned int base, /*pcsrbar/eumbbar */ + unsigned int n, /* 0 or 1 */ + unsigned int msg ) { if ( n >= I2O_NUM_MSG ) { @@ -190,8 +190,8 @@ * PCI master needs to enable the outbound doorbell interrupts of device it wants to handle **********************************************************************/ I2OSTATUS I2ODBEnable( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db ) /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db ) /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ { /* LOCATION - REMOTE : PCI master initializes outbound doorbell message of device @@ -209,15 +209,15 @@ /* pcsrbar is base */ val = load_runtime_reg( base, I2O_OMIMR ); val &= 0xfffffff7; - store_runtime_reg( base, I2O_OMIMR , val ); + store_runtime_reg( base, I2O_OMIMR , val ); } else { /* eumbbar is base */ val = load_runtime_reg( base, I2O_IMIMR); - in_db = ( (~in_db) & 0x3 ) << 3; - val = ( val & 0xffffffe7) | in_db; - store_runtime_reg( base, I2O_IMIMR, val ); + in_db = ( (~in_db) & 0x3 ) << 3; + val = ( val & 0xffffffe7) | in_db; + store_runtime_reg( base, I2O_IMIMR, val ); } return I2OSUCCESS; @@ -237,8 +237,8 @@ * PCI master needs to disable outbound doorbell interrupts of device it is not interested ************************************************************************************/ I2OSTATUS I2ODBDisable( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int in_db ) /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int in_db ) /* when LOCAL, I2O_IN_DB, MC, I2O_IN_DB|MC */ { /* LOCATION - REMOTE : handle device's out bound message initialization * LOCAL : handle local in bound message initialization @@ -255,14 +255,14 @@ /* pcsrbar is the base */ val = load_runtime_reg( base, I2O_OMIMR ); val |= 0x8; - store_runtime_reg( base, I2O_OMIMR, val ); + store_runtime_reg( base, I2O_OMIMR, val ); } else { val = load_runtime_reg( base, I2O_IMIMR); - in_db = ( in_db & 0x3 ) << 3; - val |= in_db; - store_runtime_reg( base, I2O_IMIMR, val ); + in_db = ( in_db & 0x3 ) << 3; + val |= in_db; + store_runtime_reg( base, I2O_IMIMR, val ); } return I2OSUCCESS; @@ -287,22 +287,22 @@ * will cause interrupt pending. *********************************************************************************/ unsigned int I2ODBGet( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base) /* pcsrbar/eumbbar */ + unsigned int base) /* pcsrbar/eumbbar */ { unsigned int msg, val; if ( loc == REMOTE ) { /* read outbound doorbell register of device, pcsrbar is the base */ - val = load_runtime_reg( base, I2O_ODBR ); - msg = val & 0xe0000000; - store_runtime_reg( base, I2O_ODBR, val ); /* clear the register */ + val = load_runtime_reg( base, I2O_ODBR ); + msg = val & 0xe0000000; + store_runtime_reg( base, I2O_ODBR, val ); /* clear the register */ } else { /* read the inbound doorbell register, eumbbar is the base */ - val = load_runtime_reg( base, I2O_IDBR ); - store_runtime_reg( base, I2O_IDBR, val ); /* clear the register */ + val = load_runtime_reg( base, I2O_IDBR ); + store_runtime_reg( base, I2O_IDBR, val ); /* clear the register */ msg = val; } @@ -323,8 +323,8 @@ * Otherwise local out doorbell is written *********************************************************************/ void I2ODBPost( LOCATION loc, /* REMOTE/LOCAL */ - unsigned int base, /* pcsrbar/eumbbar */ - unsigned int msg ) /* in / out */ + unsigned int base, /* pcsrbar/eumbbar */ + unsigned int msg ) /* in / out */ { if ( loc == REMOTE ) { @@ -527,8 +527,8 @@ * ****************************************************/ I2OSTATUS I2OFIFOAlloc( LOCATION loc, - unsigned int base, - void **pMsg ) + unsigned int base, + void **pMsg ) { I2OSTATUS stat = I2OSUCCESS; void *pHdr, *pTil; @@ -543,12 +543,12 @@ { /* pcsrbar is the base and read the inbound free tail ptr */ pTil = (void *)load_runtime_reg( base, I2O_IFQPR ); - if ( ( (unsigned int)pTil & 0xFFFFFFF ) == 0xFFFFFFFF ) - { + if ( ( (unsigned int)pTil & 0xFFFFFFF ) == 0xFFFFFFFF ) + { stat = I2OQUEEMPTY; - } + } else - { + { *pMsg = pTil; } } @@ -562,7 +562,7 @@ if ( pHdr == pTil ) { /* hdr and til point to the same fifo item, no free MFA */ - stat = I2OQUEEMPTY; + stat = I2OQUEEMPTY; } else { @@ -615,7 +615,7 @@ { /* eumbbar is the base */ pHdr = (void **)load_runtime_reg( base, I2O_IFHPR ); - pTil = (void **)load_runtime_reg( base, I2O_IFTPR ); + pTil = (void **)load_runtime_reg( base, I2O_IFTPR ); /* store MFA */ *pHdr = pMsg; @@ -633,7 +633,7 @@ if ( pHdr != pTil ) { store_runtime_reg( base, I2O_OPHPR, (unsigned int)pHdr); - } + } else { stat = I2OQUEFULL; @@ -677,7 +677,7 @@ { /* eumbbar is the base */ pHdr = (void **)load_runtime_reg( base, I2O_OPHPR ); - pTil = (void **)load_runtime_reg( base, I2O_OPTPR ); + pTil = (void **)load_runtime_reg( base, I2O_OPTPR ); /* store MFA */ *pHdr = pMsg; @@ -695,7 +695,7 @@ if ( pHdr != pTil ) { store_runtime_reg( base, I2O_OPHPR, (unsigned int)pHdr); - } + } else { stat = I2OQUEFULL; @@ -734,12 +734,12 @@ { /* pcsrbar is the base */ pTil = (void *)load_runtime_reg( base, I2O_OFQPR ); - if ( ( (unsigned int)pTil & 0xFFFFFFF ) == 0xFFFFFFFF ) - { + if ( ( (unsigned int)pTil & 0xFFFFFFF ) == 0xFFFFFFFF ) + { stat = I2OQUEEMPTY; - } + } else - { + { *pMsg = pTil; } } @@ -753,7 +753,7 @@ if ( pHdr == pTil ) { /* no free MFA */ - stat = I2OQUEEMPTY; + stat = I2OQUEEMPTY; } else { @@ -783,8 +783,8 @@ * should pass eumbbar. *********************************************************/ I2OSTATUS I2OPCIConfigGet( LOCATION loc, - unsigned int base, - I2OIOP * val) + unsigned int base, + I2OIOP * val) { unsigned int tmp; if ( val == 0 ) diff --git a/cpu/mpc824x/drivers/i2o/i2o2.S b/cpu/mpc824x/drivers/i2o/i2o2.S index 1033979..990f9ef 100644 --- a/cpu/mpc824x/drivers/i2o/i2o2.S +++ b/cpu/mpc824x/drivers/i2o/i2o2.S @@ -19,12 +19,12 @@ load_runtime_reg: xor r5,r5,r5 - or r5,r5,r3 /* save eumbbar */ + or r5,r5,r3 /* save eumbbar */ lwbrx r3,r4,r5 sync - bclr 20, 0 + bclr 20, 0 /**************************************************************** * function: store_runtime_reg @@ -34,9 +34,9 @@ * r5 - new value to be stored * ****************************************************************/ - .text - .align 2 - .global store_runtime_reg + .text + .align 2 + .global store_runtime_reg store_runtime_reg: xor r0,r0,r0 @@ -45,4 +45,3 @@ sync bclr 20,0 - diff --git a/cpu/mpc824x/interrupts.c b/cpu/mpc824x/interrupts.c index 12841b3..753575f 100644 --- a/cpu/mpc824x/interrupts.c +++ b/cpu/mpc824x/interrupts.c @@ -83,12 +83,12 @@ { decrementer_count = (get_bus_freq (0) / 4) / CFG_HZ; - /* - * It's all broken at the moment and I currently don't need - * interrupts. If you want to fix it, have a look at the epic - * drivers in dink32 v12. They do everthing and Motorola said - * I could use the dink source in this project as long as - * copyright notices remain intact. + /* + * It's all broken at the moment and I currently don't need + * interrupts. If you want to fix it, have a look at the epic + * drivers in dink32 v12. They do everthing and Motorola said + * I could use the dink source in this project as long as + * copyright notices remain intact. */ epicInit (EPIC_DIRECT_IRQ, 0); diff --git a/cpu/mpc824x/start.S b/cpu/mpc824x/start.S index 004e3b3..b1cdb84 100644 --- a/cpu/mpc824x/start.S +++ b/cpu/mpc824x/start.S @@ -202,7 +202,6 @@ bl board_init_f /* run 1st part of board init code (from Flash) */ - .globl _start_of_vectors _start_of_vectors: @@ -840,5 +839,3 @@ blt 1b blr - - diff --git a/cpu/mpc8260/bedbug_603e.c b/cpu/mpc8260/bedbug_603e.c index 1ca057f..9c29b35 100644 --- a/cpu/mpc8260/bedbug_603e.c +++ b/cpu/mpc8260/bedbug_603e.c @@ -5,8 +5,7 @@ #include #include #include - -#include +#include #include #include #include @@ -64,7 +63,7 @@ * ====================================================================== */ void bedbug603e_do_break (cmd_tbl_t *cmdtp, int flag, int argc, - char *argv[]) + char *argv[]) { long addr; /* Address to break at */ int which_bp; /* Breakpoint number */ @@ -116,8 +115,8 @@ /* Set a breakpoint at the address */ if(!(( isdigit( argv[ 1 ][ 0 ] )) || - (( argv[ 1 ][ 0 ] >= 'a' ) && ( argv[ 1 ][ 0 ] <= 'f' )) || - (( argv[ 1 ][ 0 ] >= 'A' ) && ( argv[ 1 ][ 0 ] <= 'F' )))) + (( argv[ 1 ][ 0 ] >= 'a' ) && ( argv[ 1 ][ 0 ] <= 'f' )) || + (( argv[ 1 ][ 0 ] >= 'A' ) && ( argv[ 1 ][ 0 ] <= 'F' )))) { printf ("Usage:\n%s\n", cmdtp->usage); return; @@ -236,4 +235,3 @@ /* ====================================================================== */ #endif - diff --git a/cpu/mpc8260/cpu.c b/cpu/mpc8260/cpu.c index b8ba48c..7662fc6 100644 --- a/cpu/mpc8260/cpu.c +++ b/cpu/mpc8260/cpu.c @@ -180,7 +180,7 @@ /* ------------------------------------------------------------------------- */ int -do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, char *argv[]) +do_reset (cmd_tbl_t * cmdtp, int flag, int argc, char *argv[]) { ulong msr, addr; diff --git a/cpu/mpc8260/cpu_init.c b/cpu/mpc8260/cpu_init.c index d0545cf..fd09a8d 100644 --- a/cpu/mpc8260/cpu_init.c +++ b/cpu/mpc8260/cpu_init.c @@ -70,13 +70,13 @@ uint tpmsk = ~pmsk; /* - * the (somewhat confused) paragraph at the - * bottom of page 35-5 warns that there might - * be "unknown behaviour" when programming - * PSORx and PDIRx, if PPARx = 1, so I - * decided this meant I had to disable the - * dedicated function first, and enable it - * last. + * the (somewhat confused) paragraph at the + * bottom of page 35-5 warns that there might + * be "unknown behaviour" when programming + * PSORx and PDIRx, if PPARx = 1, so I + * decided this meant I had to disable the + * dedicated function first, and enable it + * last. */ iop->ppar &= tpmsk; iop->psor = (iop->psor & tpmsk) | psor; diff --git a/cpu/mpc8260/ether_scc.c b/cpu/mpc8260/ether_scc.c index 8b6af31..10133fa 100644 --- a/cpu/mpc8260/ether_scc.c +++ b/cpu/mpc8260/ether_scc.c @@ -43,31 +43,31 @@ # define CPM_CR_ENET_PAGE CPM_CR_SCC1_PAGE # define CPM_CR_ENET_SBLOCK CPM_CR_SCC1_SBLOCK # define CMXSCR_MASK (CMXSCR_SC1 |\ - CMXSCR_RS1CS_MSK |\ - CMXSCR_TS1CS_MSK) + CMXSCR_RS1CS_MSK |\ + CMXSCR_TS1CS_MSK) #elif (CONFIG_ETHER_INDEX == 2) # define PROFF_ENET PROFF_SCC2 # define CPM_CR_ENET_PAGE CPM_CR_SCC2_PAGE # define CPM_CR_ENET_SBLOCK CPM_CR_SCC2_SBLOCK # define CMXSCR_MASK (CMXSCR_SC2 |\ - CMXSCR_RS2CS_MSK |\ - CMXSCR_TS2CS_MSK) + CMXSCR_RS2CS_MSK |\ + CMXSCR_TS2CS_MSK) #elif (CONFIG_ETHER_INDEX == 3) # define PROFF_ENET PROFF_SCC3 # define CPM_CR_ENET_PAGE CPM_CR_SCC3_PAGE # define CPM_CR_ENET_SBLOCK CPM_CR_SCC3_SBLOCK # define CMXSCR_MASK (CMXSCR_SC3 |\ - CMXSCR_RS3CS_MSK |\ - CMXSCR_TS3CS_MSK) + CMXSCR_RS3CS_MSK |\ + CMXSCR_TS3CS_MSK) #elif (CONFIG_ETHER_INDEX == 4) # define PROFF_ENET PROFF_SCC4 # define CPM_CR_ENET_PAGE CPM_CR_SCC4_PAGE # define CPM_CR_ENET_SBLOCK CPM_CR_SCC4_SBLOCK # define CMXSCR_MASK (CMXSCR_SC4 |\ - CMXSCR_RS4CS_MSK |\ - CMXSCR_TS4CS_MSK) + CMXSCR_RS4CS_MSK |\ + CMXSCR_TS4CS_MSK) #endif @@ -104,27 +104,27 @@ int result = 0; if (length <= 0) { - printf("scc: bad packet size: %d\n", length); - goto out; + printf("scc: bad packet size: %d\n", length); + goto out; } for(i=0; rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) { - if (i >= TOUT_LOOP) { - printf("scc: tx buffer not ready\n"); - goto out; - } + if (i >= TOUT_LOOP) { + printf("scc: tx buffer not ready\n"); + goto out; + } } rtx->txbd[txIdx].cbd_bufaddr = (uint)packet; rtx->txbd[txIdx].cbd_datlen = length; rtx->txbd[txIdx].cbd_sc |= (BD_ENET_TX_READY | BD_ENET_TX_LAST | - BD_ENET_TX_WRAP); + BD_ENET_TX_WRAP); for(i=0; rtx->txbd[txIdx].cbd_sc & BD_ENET_TX_READY; i++) { - if (i >= TOUT_LOOP) { - printf("scc: tx error\n"); - goto out; - } + if (i >= TOUT_LOOP) { + printf("scc: tx error\n"); + goto out; + } } /* return only status bits */ @@ -141,37 +141,37 @@ for (;;) { - if (rtx->rxbd[rxIdx].cbd_sc & BD_ENET_RX_EMPTY) { - length = -1; - break; /* nothing received - leave for() loop */ - } + if (rtx->rxbd[rxIdx].cbd_sc & BD_ENET_RX_EMPTY) { + length = -1; + break; /* nothing received - leave for() loop */ + } - length = rtx->rxbd[rxIdx].cbd_datlen; + length = rtx->rxbd[rxIdx].cbd_datlen; - if (rtx->rxbd[rxIdx].cbd_sc & 0x003f) - { - printf("err: %x\n", rtx->rxbd[rxIdx].cbd_sc); - } - else - { - /* Pass the packet up to the protocol layers. */ - NetReceive(NetRxPackets[rxIdx], length - 4); - } + if (rtx->rxbd[rxIdx].cbd_sc & 0x003f) + { + printf("err: %x\n", rtx->rxbd[rxIdx].cbd_sc); + } + else + { + /* Pass the packet up to the protocol layers. */ + NetReceive(NetRxPackets[rxIdx], length - 4); + } - /* Give the buffer back to the SCC. */ - rtx->rxbd[rxIdx].cbd_datlen = 0; + /* Give the buffer back to the SCC. */ + rtx->rxbd[rxIdx].cbd_datlen = 0; - /* wrap around buffer index when necessary */ - if ((rxIdx + 1) >= PKTBUFSRX) { - rtx->rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP | - BD_ENET_RX_EMPTY); - rxIdx = 0; - } - else { - rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY; - rxIdx++; - } + /* wrap around buffer index when necessary */ + if ((rxIdx + 1) >= PKTBUFSRX) { + rtx->rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP | + BD_ENET_RX_EMPTY); + rxIdx = 0; + } + else { + rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY; + rxIdx++; + } } return length; } @@ -201,7 +201,7 @@ /* 24.21 - (4,5): connect SCC's tx and rx clocks, use NMSI for SCC */ immr->im_cpmux.cmx_uar = 0; immr->im_cpmux.cmx_scr = ( (immr->im_cpmux.cmx_scr & ~CMXSCR_MASK) | - CFG_CMXSCR_VALUE); + CFG_CMXSCR_VALUE); /* 24.21 (6) write RBASE and TBASE to parameter RAM */ @@ -221,9 +221,9 @@ /* 24.21 - (7): Write INIT RX AND TX PARAMETERS to CPCR */ while(immr->im_cpm.cp_cpcr & CPM_CR_FLG); immr->im_cpm.cp_cpcr = mk_cr_cmd(CPM_CR_ENET_PAGE, - CPM_CR_ENET_SBLOCK, - 0x0c, - CPM_CR_INIT_TRX) | CPM_CR_FLG; + CPM_CR_ENET_SBLOCK, + 0x0c, + CPM_CR_INIT_TRX) | CPM_CR_FLG; /* 24.21 - (8-18): Set up parameter RAM */ pram_ptr->sen_crcec = 0x0; /* Error Counter CRC (unused) */ @@ -266,9 +266,9 @@ /* 24.21 - (19): Initialize RxBD */ for (i = 0; i < PKTBUFSRX; i++) { - rtx->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY; - rtx->rxbd[i].cbd_datlen = 0; /* Reset */ - rtx->rxbd[i].cbd_bufaddr = (uint)NetRxPackets[i]; + rtx->rxbd[i].cbd_sc = BD_ENET_RX_EMPTY; + rtx->rxbd[i].cbd_datlen = 0; /* Reset */ + rtx->rxbd[i].cbd_bufaddr = (uint)NetRxPackets[i]; } rtx->rxbd[PKTBUFSRX - 1].cbd_sc |= BD_ENET_RX_WRAP; @@ -276,11 +276,11 @@ /* 24.21 - (20): Initialize TxBD */ for (i = 0; i < TX_BUF_CNT; i++) { - rtx->txbd[i].cbd_sc = (BD_ENET_TX_PAD | - BD_ENET_TX_LAST | - BD_ENET_TX_TC); - rtx->txbd[i].cbd_datlen = 0; /* Reset */ - rtx->txbd[i].cbd_bufaddr = (uint)&txbuf[i][0]; + rtx->txbd[i].cbd_sc = (BD_ENET_TX_PAD | + BD_ENET_TX_LAST | + BD_ENET_TX_TC); + rtx->txbd[i].cbd_datlen = 0; /* Reset */ + rtx->txbd[i].cbd_bufaddr = (uint)&txbuf[i][0]; } rtx->txbd[TX_BUF_CNT - 1].cbd_sc |= BD_ENET_TX_WRAP; @@ -290,8 +290,8 @@ /* 24.21 - (22): Write to SCCM to enable TXE, RXF, TXB events */ immr->im_scc[CONFIG_ETHER_INDEX-1].scc_sccm = (SCCE_ENET_TXE | - SCCE_ENET_RXF | - SCCE_ENET_TXB); + SCCE_ENET_RXF | + SCCE_ENET_TXB); /* 24.21 - (23): we don't use ethernet interrupts */ @@ -300,9 +300,9 @@ /* 24.21 - (25): Clear GSMR_L to enable normal operations */ immr->im_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl = (SCC_GSMRL_TCI | - SCC_GSMRL_TPL_48 | - SCC_GSMRL_TPP_10 | - SCC_GSMRL_MODE_ENET); + SCC_GSMRL_TPL_48 | + SCC_GSMRL_TPP_10 | + SCC_GSMRL_MODE_ENET); /* 24.21 - (26): Initialize DSR */ immr->im_scc[CONFIG_ETHER_INDEX-1].scc_dsr = 0xd555; @@ -331,18 +331,17 @@ /* 24.21 - (28): Write to GSMR_L to enable SCC */ immr->im_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl |= (SCC_GSMRL_ENR | - SCC_GSMRL_ENT); + SCC_GSMRL_ENT); return 0; } - void eth_halt(void) { volatile immap_t *immr = (immap_t *)CFG_IMMR; immr->im_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl &= ~(SCC_GSMRL_ENR | - SCC_GSMRL_ENT); + SCC_GSMRL_ENT); } #if 0 @@ -350,9 +349,8 @@ { volatile immap_t *immr = (immap_t *)CFG_IMMR; immr->im_cpm.cp_scc[CONFIG_ETHER_INDEX-1].scc_gsmrl |= (SCC_GSMRL_ENR | - SCC_GSMRL_ENT); + SCC_GSMRL_ENT); } #endif #endif /* CONFIG_ETHER_ON_SCC && CFG_CMD_NET */ - diff --git a/cpu/mpc8260/i2c.c b/cpu/mpc8260/i2c.c index 69ae535..789c514 100644 --- a/cpu/mpc8260/i2c.c +++ b/cpu/mpc8260/i2c.c @@ -223,7 +223,7 @@ volatile I2C_BD *rxbd, *txbd; uint dpaddr; -#ifdef CFG_I2C_INIT_BOARD +#ifdef CFG_I2C_INIT_BOARD /* call board specific i2c bus reset routine before accessing the */ /* environment, which might be in a chip on that bus. For details */ /* about this problem see doc/I2C_Edge_Conditions. */ @@ -494,7 +494,7 @@ volatile iic_t *iip; volatile i2c8260_t *i2c = (i2c8260_t *)&immap->im_i2c; volatile I2C_BD *txbd, *rxbd; - int n, i, b, rxcnt = 0, rxtimeo = 0, txcnt = 0, txtimeo = 0, rc = 0; + int n, i, b, rxcnt = 0, rxtimeo = 0, txcnt = 0, txtimeo = 0, rc = 0; uint dpaddr; PRINTD(("[I2C] i2c_doio\n")); @@ -543,7 +543,7 @@ rxbd = ((I2C_BD*)state->rxbd) - n; for (i = 0; i < n; i++) { - rxtimeo += TOUT_LOOP * rxbd->length; + rxtimeo += TOUT_LOOP * rxbd->length; rxbd++; } @@ -670,7 +670,7 @@ * and the extra bits end up in the "chip address" bit slots. * This makes a 24WC08 (1Kbyte) chip look like four 256 byte * chips. - * + * * Note that we consider the length of the address field to still * be one byte because the extra address bits are hidden in the * chip address. @@ -719,7 +719,7 @@ * and the extra bits end up in the "chip address" bit slots. * This makes a 24WC08 (1Kbyte) chip look like four 256 byte * chips. - * + * * Note that we consider the length of the address field to still * be one byte because the extra address bits are hidden in the * chip address. diff --git a/cpu/mpc8260/pci.c b/cpu/mpc8260/pci.c index ac77c16..b3a89f5 100644 --- a/cpu/mpc8260/pci.c +++ b/cpu/mpc8260/pci.c @@ -35,7 +35,7 @@ * * 0x80000000 - 0xBFFFFFFF CPU2PCI space PCIBR0 * 0xF4000000 - 0xF7FFFFFF CPU2PCI space PCIBR1 - * + * * 0x80000000 - 0x9FFFFFFF 0x80000000 - 0x9FFFFFFF (Outbound ATU #1) * PCI Mem with prefetch * @@ -44,7 +44,7 @@ * * 0xF4000000 - 0xF7FFFFFF 0x00000000 - 0x03FFFFFF (Outbound ATU #3) * 32-bit PCI IO - * + * * PCI->Local map (from PCI) * MPC826x slave window controlled by * @@ -52,15 +52,15 @@ * MPC826x local memory */ -/* - * Slave window that allows PCI masters to access MPC826x local memory. +/* + * Slave window that allows PCI masters to access MPC826x local memory. * This window is set up using the first set of Inbound ATU registers */ -#ifndef CFG_PCI_SLV_MEM_LOCAL -#define PCI_SLV_MEM_LOCAL CFG_SDRAM_BASE /* Local base */ -#else -#define PCI_SLV_MEM_LOCAL CFG_PCI_SLV_MEM_LOCAL +#ifndef CFG_PCI_SLV_MEM_LOCAL +#define PCI_SLV_MEM_LOCAL CFG_SDRAM_BASE /* Local base */ +#else +#define PCI_SLV_MEM_LOCAL CFG_PCI_SLV_MEM_LOCAL #endif #ifndef CFG_PCI_SLV_MEM_BUS @@ -71,22 +71,22 @@ #ifndef CFG_PICMR0_MASK_ATTRIB #define PICMR0_MASK_ATTRIB (PICMR_MASK_512MB | PICMR_ENABLE | \ - PICMR_PREFETCH_EN) + PICMR_PREFETCH_EN) #else #define PICMR0_MASK_ATTRIB CFG_PICMR0_MASK_ATTRIB #endif -/* +/* * These are the windows that allow the CPU to access PCI address space. - * All three PCI master windows, which allow the CPU to access PCI - * prefetch, non prefetch, and IO space (see below), must all fit within + * All three PCI master windows, which allow the CPU to access PCI + * prefetch, non prefetch, and IO space (see below), must all fit within * these windows. */ /* PCIBR0 */ #ifndef CFG_PCI_MSTR0_LOCAL -#define PCI_MSTR0_LOCAL 0x80000000 /* Local base */ -#else +#define PCI_MSTR0_LOCAL 0x80000000 /* Local base */ +#else #define PCI_MSTR0_LOCAL CFG_PCI_MSTR0_LOCAL #endif @@ -98,9 +98,9 @@ /* PCIBR1 */ #ifndef CFG_PCI_MSTR1_LOCAL -#define PCI_MSTR1_LOCAL 0xF4000000 /* Local base */ -#else -#define PCI_MSTR1_LOCAL CFG_PCI_MSTR1_LOCAL +#define PCI_MSTR1_LOCAL 0xF4000000 /* Local base */ +#else +#define PCI_MSTR1_LOCAL CFG_PCI_MSTR1_LOCAL #endif #ifndef CFG_PCIMSK1_MASK @@ -109,7 +109,7 @@ #define PCIMSK1_MASK CFG_PCIMSK1_MASK #endif -/* +/* * Master window that allows the CPU to access PCI Memory (prefetch). * This window will be setup with the first set of Outbound ATU registers * in the bridge. @@ -145,34 +145,34 @@ #define POCMR0_MASK_ATTRIB CFG_POCMR0_MASK_ATTRIB #endif -/* +/* * Master window that allows the CPU to access PCI Memory (non-prefetch). * This window will be setup with the second set of Outbound ATU registers * in the bridge. */ -#ifndef CFG_PCI_MSTR_MEMIO_LOCAL -#define PCI_MSTR_MEMIO_LOCAL 0x90000000 /* Local base */ -#else -#define PCI_MSTR_MEMIO_LOCAL CFG_PCI_MSTR_MEMIO_LOCAL +#ifndef CFG_PCI_MSTR_MEMIO_LOCAL +#define PCI_MSTR_MEMIO_LOCAL 0x90000000 /* Local base */ +#else +#define PCI_MSTR_MEMIO_LOCAL CFG_PCI_MSTR_MEMIO_LOCAL #endif -#ifndef CFG_PCI_MSTR_MEMIO_BUS -#define PCI_MSTR_MEMIO_BUS 0x90000000 /* PCI base */ -#else -#define PCI_MSTR_MEMIO_BUS CFG_PCI_MSTR_MEMIO_BUS +#ifndef CFG_PCI_MSTR_MEMIO_BUS +#define PCI_MSTR_MEMIO_BUS 0x90000000 /* PCI base */ +#else +#define PCI_MSTR_MEMIO_BUS CFG_PCI_MSTR_MEMIO_BUS #endif -#ifndef CFG_CPU_PCI_MEMIO_START -#define CPU_PCI_MEMIO_START PCI_MSTR_MEMIO_LOCAL -#else -#define CPU_PCI_MEMIO_START CFG_CPU_PCI_MEMIO_START +#ifndef CFG_CPU_PCI_MEMIO_START +#define CPU_PCI_MEMIO_START PCI_MSTR_MEMIO_LOCAL +#else +#define CPU_PCI_MEMIO_START CFG_CPU_PCI_MEMIO_START #endif -#ifndef CFG_PCI_MSTR_MEMIO_SIZE -#define PCI_MSTR_MEMIO_SIZE 0x10000000 /* 256 MB */ -#else -#define PCI_MSTR_MEMIO_SIZE CFG_PCI_MSTR_MEMIO_SIZE +#ifndef CFG_PCI_MSTR_MEMIO_SIZE +#define PCI_MSTR_MEMIO_SIZE 0x10000000 /* 256 MB */ +#else +#define PCI_MSTR_MEMIO_SIZE CFG_PCI_MSTR_MEMIO_SIZE #endif #ifndef CFG_POCMR1_MASK_ATTRIB @@ -181,34 +181,34 @@ #define POCMR1_MASK_ATTRIB CFG_POCMR1_MASK_ATTRIB #endif -/* +/* * Master window that allows the CPU to access PCI IO space. * This window will be setup with the third set of Outbound ATU registers * in the bridge. */ -#ifndef CFG_PCI_MSTR_IO_LOCAL -#define PCI_MSTR_IO_LOCAL 0xA0000000 /* Local base */ -#else -#define PCI_MSTR_IO_LOCAL CFG_PCI_MSTR_IO_LOCAL +#ifndef CFG_PCI_MSTR_IO_LOCAL +#define PCI_MSTR_IO_LOCAL 0xA0000000 /* Local base */ +#else +#define PCI_MSTR_IO_LOCAL CFG_PCI_MSTR_IO_LOCAL #endif -#ifndef CFG_PCI_MSTR_IO_BUS -#define PCI_MSTR_IO_BUS 0xA0000000 /* PCI base */ -#else -#define PCI_MSTR_IO_BUS CFG_PCI_MSTR_IO_BUS +#ifndef CFG_PCI_MSTR_IO_BUS +#define PCI_MSTR_IO_BUS 0xA0000000 /* PCI base */ +#else +#define PCI_MSTR_IO_BUS CFG_PCI_MSTR_IO_BUS #endif -#ifndef CFG_CPU_PCI_IO_START -#define CPU_PCI_IO_START PCI_MSTR_IO_LOCAL -#else -#define CPU_PCI_IO_START CFG_CPU_PCI_IO_START +#ifndef CFG_CPU_PCI_IO_START +#define CPU_PCI_IO_START PCI_MSTR_IO_LOCAL +#else +#define CPU_PCI_IO_START CFG_CPU_PCI_IO_START #endif -#ifndef CFG_PCI_MSTR_IO_SIZE -#define PCI_MSTR_IO_SIZE 0x10000000 /* 256MB */ -#else -#define PCI_MSTR_IO_SIZE CFG_PCI_MSTR_IO_SIZE +#ifndef CFG_PCI_MSTR_IO_SIZE +#define PCI_MSTR_IO_SIZE 0x10000000 /* 256MB */ +#else +#define PCI_MSTR_IO_SIZE CFG_PCI_MSTR_IO_SIZE #endif #ifndef CFG_POCMR2_MASK_ATTRIB @@ -239,7 +239,7 @@ pci_dev_t host_devno = PCI_BDF(0, 0, 0); pci_setup_indirect(hose, CFG_IMMR + PCI_CFG_ADDR_REG, - CFG_IMMR + PCI_CFG_DATA_REG); + CFG_IMMR + PCI_CFG_DATA_REG); /* * Setting required to enable local bus for PCI (SIUMCR [LBPC]). @@ -248,23 +248,23 @@ immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr & ~SIUMCR_LBPC11) | SIUMCR_LBPC01; #else - /* - * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), + /* + * Setting required to enable IRQ1-IRQ7 (SIUMCR [DPPC]), * and local bus for PCI (SIUMCR [LBPC]). */ - immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr & - ~SIUMCR_LBPC11 & - ~SIUMCR_CS10PC11 & + immap->im_siu_conf.sc_siumcr = (immap->im_siu_conf.sc_siumcr & + ~SIUMCR_LBPC11 & + ~SIUMCR_CS10PC11 & ~SIUMCR_LBPC11) | - SIUMCR_LBPC01 | - SIUMCR_CS10PC01 | + SIUMCR_LBPC01 | + SIUMCR_CS10PC01 | SIUMCR_LBPC01; #endif /* Make PCI lowest priority */ - /* Each 4 bits is a device bus request and the MS 4bits + /* Each 4 bits is a device bus request and the MS 4bits is highest priority */ - /* Bus 4bit value + /* Bus 4bit value --- ---------- CPM high 0b0000 CPM middle 0b0001 @@ -282,8 +282,8 @@ /* Park bus on core while modifying PCI Bus accesses */ immap->im_siu_conf.sc_ppc_acr = 0x6; - /* - * Set up master windows that allow the CPU to access PCI space. These + /* + * Set up master windows that allow the CPU to access PCI space. These * windows are set up using the two SIU PCIBR registers. */ *(volatile unsigned long*)(immr_addr + M8265_PCIMSK0) = PCIMSK0_MASK; @@ -294,40 +294,40 @@ *(volatile unsigned long*)(immr_addr + M8265_PCIMSK1) = PCIMSK1_MASK; *(volatile unsigned long*)(immr_addr + M8265_PCIBR1) = PCI_MSTR1_LOCAL | PCIBR_ENABLE; -#endif +#endif /* Release PCI RST (by default the PCI RST signal is held low) */ pci_outl (immr_addr | PCI_GCR_REG, PCIGCR_PCI_BUS_EN); /* give it some time */ { -#ifdef CONFIG_MPC8266ADS - /* Give the PCI cards more time to initialize before query +#ifdef CONFIG_MPC8266ADS + /* Give the PCI cards more time to initialize before query This might be good for other boards also */ - int i; - for (i = 0; i < 1000; ++i) + int i; + for (i = 0; i < 1000; ++i) #endif - udelay(1000); + udelay(1000); } - /* - * Set up master window that allows the CPU to access PCI Memory (prefetch) + /* + * Set up master window that allows the CPU to access PCI Memory (prefetch) * space. This window is set up using the first set of Outbound ATU registers. */ pci_outl (immr_addr | POTAR_REG0, PCI_MSTR_MEM_BUS >> 12); /* PCI base */ pci_outl (immr_addr | POBAR_REG0, PCI_MSTR_MEM_LOCAL >> 12); /* Local base */ pci_outl (immr_addr | POCMR_REG0, POCMR0_MASK_ATTRIB); /* Size & attribute */ - /* - * Set up master window that allows the CPU to access PCI Memory (non-prefetch) + /* + * Set up master window that allows the CPU to access PCI Memory (non-prefetch) * space. This window is set up using the second set of Outbound ATU registers. */ pci_outl (immr_addr | POTAR_REG1, PCI_MSTR_MEMIO_BUS >> 12); /* PCI base */ pci_outl (immr_addr | POBAR_REG1, PCI_MSTR_MEMIO_LOCAL >> 12); /* Local base */ pci_outl (immr_addr | POCMR_REG1, POCMR1_MASK_ATTRIB); /* Size & attribute */ - - /* + + /* * Set up master window that allows the CPU to access PCI IO space. This window * is set up using the third set of Outbound ATU registers. */ @@ -335,8 +335,8 @@ pci_outl (immr_addr | POBAR_REG2, PCI_MSTR_IO_LOCAL >> 12); /* Local base */ pci_outl (immr_addr | POCMR_REG2, POCMR2_MASK_ATTRIB); /* Size & attribute */ - /* - * Set up slave window that allows PCI masters to access MPC826x local memory. + /* + * Set up slave window that allows PCI masters to access MPC826x local memory. * This window is set up using the first set of Inbound ATU registers */ pci_outl (immr_addr | PITAR_REG0, PCI_SLV_MEM_LOCAL >> 12); /* Local base */ @@ -352,18 +352,18 @@ /* Host mode - specify the bridge as a host-PCI bridge */ pci_hose_write_config_byte(hose, host_devno, PCI_CLASS_CODE, - PCI_CLASS_BRIDGE_CTLR); + PCI_CLASS_BRIDGE_CTLR); /* Enable the host bridge to be a master on the PCI bus, and to act as a PCI memory target */ pci_hose_read_config_word(hose, host_devno, PCI_COMMAND, &tempShort); pci_hose_write_config_word(hose, host_devno, PCI_COMMAND, - tempShort | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); + tempShort | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); #ifdef CONFIG_MPC8266ADS /* do some bridge init, should be done on all 8260 based bridges */ pci_hose_write_config_byte(hose, host_devno, PCI_CACHE_LINE_SIZE, 0x08); pci_hose_write_config_byte(hose, host_devno, PCI_LATENCY_TIMER, 0xF8); -#endif +#endif hose->first_busno = 0; hose->last_busno = 0xff; diff --git a/cpu/mpc8260/serial_scc.c b/cpu/mpc8260/serial_scc.c index ca76302..32016f2 100644 --- a/cpu/mpc8260/serial_scc.c +++ b/cpu/mpc8260/serial_scc.c @@ -82,7 +82,7 @@ int serial_init (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile scc_t *sp; volatile scc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -196,12 +196,12 @@ { volatile scc_uart_t *up; volatile cbd_t *tbdf; - volatile immap_t *im; + volatile immap_t *im; if (c == '\n') serial_putc ('\r'); - im = (immap_t *)CFG_IMMR; + im = (immap_t *)CFG_IMMR; up = (scc_uart_t *)&im->im_dprambase[PROFF_SCC]; tbdf = (cbd_t *)&im->im_dprambase[up->scc_genscc.scc_tbase]; @@ -230,10 +230,10 @@ { volatile cbd_t *rbdf; volatile scc_uart_t *up; - volatile immap_t *im; + volatile immap_t *im; unsigned char c; - im = (immap_t *)CFG_IMMR; + im = (immap_t *)CFG_IMMR; up = (scc_uart_t *)&im->im_dprambase[PROFF_SCC]; rbdf = (cbd_t *)&im->im_dprambase[up->scc_genscc.scc_rbase]; @@ -255,9 +255,9 @@ { volatile cbd_t *rbdf; volatile scc_uart_t *up; - volatile immap_t *im; + volatile immap_t *im; - im = (immap_t *)CFG_IMMR; + im = (immap_t *)CFG_IMMR; up = (scc_uart_t *)&im->im_dprambase[PROFF_SCC]; rbdf = (cbd_t *)&im->im_dprambase[up->scc_genscc.scc_rbase]; @@ -321,7 +321,7 @@ void kgdb_serial_init (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile scc_t *sp; volatile scc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -435,12 +435,12 @@ { volatile scc_uart_t *up; volatile cbd_t *tbdf; - volatile immap_t *im; + volatile immap_t *im; if (c == '\n') putDebugChar ('\r'); - im = (immap_t *)CFG_IMMR; + im = (immap_t *)CFG_IMMR; up = (scc_uart_t *)&im->im_dprambase[KGDB_PROFF_SCC]; tbdf = (cbd_t *)&im->im_dprambase[up->scc_genscc.scc_tbase]; @@ -469,10 +469,10 @@ { volatile cbd_t *rbdf; volatile scc_uart_t *up; - volatile immap_t *im; + volatile immap_t *im; unsigned char c; - im = (immap_t *)CFG_IMMR; + im = (immap_t *)CFG_IMMR; up = (scc_uart_t *)&im->im_dprambase[KGDB_PROFF_SCC]; rbdf = (cbd_t *)&im->im_dprambase[up->scc_genscc.scc_rbase]; diff --git a/cpu/mpc8260/serial_smc.c b/cpu/mpc8260/serial_smc.c index b0e1ce4..0873319 100644 --- a/cpu/mpc8260/serial_smc.c +++ b/cpu/mpc8260/serial_smc.c @@ -74,7 +74,7 @@ int serial_init (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile smc_t *sp; volatile smc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -186,7 +186,7 @@ volatile cbd_t *tbdf; volatile char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; if (c == '\n') serial_putc ('\r'); @@ -220,7 +220,7 @@ volatile cbd_t *rbdf; volatile unsigned char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; unsigned char c; up = (smc_uart_t *)&(im->im_dprambase[PROFF_SMC]); @@ -243,7 +243,7 @@ { volatile cbd_t *rbdf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; up = (smc_uart_t *)&(im->im_dprambase[PROFF_SMC]); @@ -289,7 +289,7 @@ void kgdb_serial_init (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile smc_t *sp; volatile smc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -401,7 +401,7 @@ volatile cbd_t *tbdf; volatile char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; if (c == '\n') putDebugChar ('\r'); @@ -435,7 +435,7 @@ volatile cbd_t *rbdf; volatile unsigned char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; unsigned char c; up = (smc_uart_t *)&(im->im_dprambase[KGDB_PROFF_SMC]); diff --git a/cpu/mpc8260/spi.c b/cpu/mpc8260/spi.c index 6a2dc8f..c1a607c 100644 --- a/cpu/mpc8260/spi.c +++ b/cpu/mpc8260/spi.c @@ -213,12 +213,12 @@ /***********IMPORTANT******************/ - /* - * Setting transmit and receive buffer descriptor pointers - * initially to rbase and tbase. Only the microcode patches - * documentation talks about initializing this pointer. This - * is missing from the sample I2C driver. If you dont - * initialize these pointers, the kernel hangs. + /* + * Setting transmit and receive buffer descriptor pointers + * initially to rbase and tbase. Only the microcode patches + * documentation talks about initializing this pointer. This + * is missing from the sample I2C driver. If you dont + * initialize these pointers, the kernel hangs. */ spi->spi_rbptr = spi->spi_rbase; spi->spi_tbptr = spi->spi_tbase; diff --git a/cpu/mpc8260/start.S b/cpu/mpc8260/start.S index 2070ecc..d3fd865 100644 --- a/cpu/mpc8260/start.S +++ b/cpu/mpc8260/start.S @@ -966,8 +966,8 @@ /* * Relocation Function, r14 point to got2+0x8000 * - * Adjust got2 pointers, no need to check for 0, this code - * already puts a few entries in the table. + * Adjust got2 pointers, no need to check for 0, this code + * already puts a few entries in the table. */ li r0,__got2_entries@sectoff@l la r3,GOT(_GOT2_TABLE_) @@ -981,7 +981,7 @@ bdnz 1b /* - * Now adjust the fixups and the pointers to the fixups + * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. */ 2: li r0,__fixup_entries@sectoff@l diff --git a/cpu/mpc8xx/bedbug_860.c b/cpu/mpc8xx/bedbug_860.c index b90782e..e91a100 100644 --- a/cpu/mpc8xx/bedbug_860.c +++ b/cpu/mpc8xx/bedbug_860.c @@ -5,11 +5,10 @@ #include #include #include - -#include #include #include #include +#include #if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) && defined(CONFIG_8xx) @@ -64,7 +63,7 @@ * ====================================================================== */ void bedbug860_do_break (cmd_tbl_t *cmdtp, int flag, int argc, - char *argv[]) + char *argv[]) { long addr = 0; /* Address to break at */ int which_bp; /* Breakpoint number */ @@ -315,4 +314,3 @@ /* ====================================================================== */ #endif - diff --git a/cpu/mpc8xx/cpu.c b/cpu/mpc8xx/cpu.c index cc73305..4e23228 100644 --- a/cpu/mpc8xx/cpu.c +++ b/cpu/mpc8xx/cpu.c @@ -411,8 +411,7 @@ /* ------------------------------------------------------------------------- */ -int do_reset (cmd_tbl_t * cmdtp, bd_t * bd, int flag, int argc, - char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { ulong msr, addr; diff --git a/cpu/mpc8xx/fec.c b/cpu/mpc8xx/fec.c index d2e8408..85ba6b2 100644 --- a/cpu/mpc8xx/fec.c +++ b/cpu/mpc8xx/fec.c @@ -411,7 +411,6 @@ } - static void fec_halt(struct eth_device* dev) { #if 0 diff --git a/cpu/mpc8xx/i2c.c b/cpu/mpc8xx/i2c.c index 9e8b8c7..baa3552 100644 --- a/cpu/mpc8xx/i2c.c +++ b/cpu/mpc8xx/i2c.c @@ -215,7 +215,7 @@ volatile I2C_BD *rxbd, *txbd; uint dpaddr; -#ifdef CFG_I2C_INIT_BOARD +#ifdef CFG_I2C_INIT_BOARD /* call board specific i2c bus reset routine before accessing the */ /* environment, which might be in a chip on that bus. For details */ /* about this problem see doc/I2C_Edge_Conditions. */ diff --git a/cpu/mpc8xx/lcd.c b/cpu/mpc8xx/lcd.c index fad383f..9f4b210 100644 --- a/cpu/mpc8xx/lcd.c +++ b/cpu/mpc8xx/lcd.c @@ -890,7 +890,7 @@ * 4-bit wide passive dual scan LCD at 4/8 Bit color. */ lchcr_hpc_tmp = - (panel_info.vl_col * + (panel_info.vl_col * (panel_info.vl_tft ? 8 : (((2 - panel_info.vl_lbw) << /* 4 bit=2, 8-bit = 1 */ /* use << to mult by: single scan = 1, dual scan = 2 */ @@ -955,7 +955,7 @@ debug ("setcolreg: reg %2d @ %p: R=%02X G=%02X B=%02X => %02X%02X\n", regno, &(cp->lcd_cmap[regno * 2]), red, green, blue, - cp->lcd_cmap[ regno * 2 ], cp->lcd_cmap[(regno * 2) + 1]); + cp->lcd_cmap[ regno * 2 ], cp->lcd_cmap[(regno * 2) + 1]); } #endif /* LCD_COLOR8 */ @@ -1031,9 +1031,9 @@ #if defined(CONFIG_LWMON) { uchar c = pic_read (0x60); #if defined(CONFIG_LCD) && defined(CONFIG_LWMON) && (CONFIG_POST & CFG_POST_SYSMON) - c |= 0x04; /* Chip Enable LCD */ + c |= 0x04; /* Chip Enable LCD */ #else - c |= 0x07; /* Power on CCFL, Enable CCFL, Chip Enable LCD */ + c |= 0x07; /* Power on CCFL, Enable CCFL, Chip Enable LCD */ #endif pic_write (0x60, c); } @@ -1069,7 +1069,7 @@ #if defined(CONFIG_LWMON) { uchar c = pic_read (0x60); - c &= ~0x07; /* Power off CCFL, Disable CCFL, Chip Disable LCD */ + c &= ~0x07; /* Power off CCFL, Disable CCFL, Chip Disable LCD */ pic_write (0x60, c); } #elif defined(CONFIG_R360MPI) diff --git a/cpu/mpc8xx/scc.c b/cpu/mpc8xx/scc.c index f98aad4..d711a63 100644 --- a/cpu/mpc8xx/scc.c +++ b/cpu/mpc8xx/scc.c @@ -168,10 +168,10 @@ /* wrap around buffer index when necessary */ if ((rxIdx + 1) >= PKTBUFSRX) { - rtx->rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY); + rtx->rxbd[PKTBUFSRX - 1].cbd_sc = (BD_ENET_RX_WRAP | BD_ENET_RX_EMPTY); rxIdx = 0; } else { - rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY; + rtx->rxbd[rxIdx].cbd_sc = BD_ENET_RX_EMPTY; rxIdx++; } } @@ -212,7 +212,7 @@ #ifdef CFG_ALLOC_DPRAM rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + - dpram_alloc_align(sizeof(RTXBD), 8)); + dpram_alloc_align(sizeof(RTXBD), 8)); #else rtx = (RTXBD *) (immr->im_cpm.cp_dpmem + CPM_SCC_BASE); #endif /* 0 */ @@ -406,7 +406,7 @@ */ immr->im_cpm.cp_scc[SCC_ENET].scc_gsmrl = ( SCC_GSMRL_TCI | \ - SCC_GSMRL_TPL_48 | \ + SCC_GSMRL_TPL_48 | \ SCC_GSMRL_TPP_10 | \ SCC_GSMRL_MODE_ENET); @@ -471,7 +471,7 @@ * Port B is used to control the PHY,MC68160. */ immr->im_cpm.cp_pbdir |= - (PB_ENET_ETHLOOP | PB_ENET_TPFLDL | PB_ENET_TPSQEL); + (PB_ENET_ETHLOOP | PB_ENET_TPFLDL | PB_ENET_TPSQEL); immr->im_cpm.cp_pbdat |= PB_ENET_TPFLDL; immr->im_cpm.cp_pbdat &= ~(PB_ENET_ETHLOOP | PB_ENET_TPSQEL); @@ -532,7 +532,6 @@ } - static void scc_halt(struct eth_device* dev) { volatile immap_t *immr = (immap_t *)CFG_IMMR; diff --git a/cpu/mpc8xx/serial.c b/cpu/mpc8xx/serial.c index 4e5b408..81c0279 100644 --- a/cpu/mpc8xx/serial.c +++ b/cpu/mpc8xx/serial.c @@ -77,7 +77,7 @@ int serial_init (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile smc_t *sp; volatile smc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -231,7 +231,7 @@ { DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); /* Set up the baud rate generator. @@ -266,7 +266,7 @@ volatile cbd_t *tbdf; volatile char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); #ifdef CONFIG_MODEM_SUPPORT @@ -305,7 +305,7 @@ volatile cbd_t *rbdf; volatile unsigned char *buf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); unsigned char c; @@ -331,7 +331,7 @@ { volatile cbd_t *rbdf; volatile smc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); up = (smc_uart_t *)&cpmp->cp_dparam[PROFF_SMC]; @@ -345,7 +345,7 @@ int serial_init (void) { - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile scc_t *sp; volatile scc_uart_t *up; volatile cbd_t *tbdf, *rbdf; @@ -508,7 +508,7 @@ { DECLARE_GLOBAL_DATA_PTR; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cp = &(im->im_cpm); /* Set up the baud rate generator. @@ -530,7 +530,7 @@ volatile cbd_t *tbdf; volatile char *buf; volatile scc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); if (c == '\n') @@ -562,7 +562,7 @@ volatile cbd_t *rbdf; volatile unsigned char *buf; volatile scc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); unsigned char c; @@ -588,7 +588,7 @@ { volatile cbd_t *rbdf; volatile scc_uart_t *up; - volatile immap_t *im = (immap_t *)CFG_IMMR; + volatile immap_t *im = (immap_t *)CFG_IMMR; volatile cpm8xx_t *cpmp = &(im->im_cpm); up = (scc_uart_t *)&cpmp->cp_dparam[PROFF_SCC]; diff --git a/cpu/mpc8xx/speed.c b/cpu/mpc8xx/speed.c index ef32371..e1c3400 100644 --- a/cpu/mpc8xx/speed.c +++ b/cpu/mpc8xx/speed.c @@ -114,18 +114,18 @@ /* * PIT setup: * - * We want to time for SPEED_PITC_COUNTS counts (of 8192 Hz), - * so the count value would be SPEED_PITC_COUNTS - 1. - * But there would be an uncertainty in the start time of 1/4 - * count since when we enable the PIT the count is not - * synchronized to the 32768 Hz oscillator. The trick here is - * to start the count higher and wait until the PIT count - * changes to the required value before starting timer 2. + * We want to time for SPEED_PITC_COUNTS counts (of 8192 Hz), + * so the count value would be SPEED_PITC_COUNTS - 1. + * But there would be an uncertainty in the start time of 1/4 + * count since when we enable the PIT the count is not + * synchronized to the 32768 Hz oscillator. The trick here is + * to start the count higher and wait until the PIT count + * changes to the required value before starting timer 2. * - * One count high should be enough, but occasionally the start - * is off by 1 or 2 counts of 32768 Hz. With the start value - * set two counts high it seems very reliable. - */ + * One count high should be enough, but occasionally the start + * is off by 1 or 2 counts of 32768 Hz. With the start value + * set two counts high it seems very reliable. + */ immr->im_sitk.sitk_pitck = KAPWR_KEY; /* PIT initialization */ immr->im_sit.sit_pitc = SPEED_PITC_INIT; @@ -163,10 +163,10 @@ #else /* CONFIG_8xx_GCLK_FREQ */ /* - * If for some reason measuring the gclk frequency won't - * work, we return the hardwired value. - * (For example, the cogent CMA286-60 CPU module has no - * separate oscillator for PITRTCLK) + * If for some reason measuring the gclk frequency won't + * work, we return the hardwired value. + * (For example, the cogent CMA286-60 CPU module has no + * separate oscillator for PITRTCLK) */ gd->cpu_clk = CONFIG_8xx_GCLK_FREQ; diff --git a/cpu/mpc8xx/spi.c b/cpu/mpc8xx/spi.c index f04d88e..16b3f3a 100644 --- a/cpu/mpc8xx/spi.c +++ b/cpu/mpc8xx/spi.c @@ -223,12 +223,12 @@ /***********IMPORTANT******************/ - /* - * Setting transmit and receive buffer descriptor pointers - * initially to rbase and tbase. Only the microcode patches - * documentation talks about initializing this pointer. This - * is missing from the sample I2C driver. If you dont - * initialize these pointers, the kernel hangs. + /* + * Setting transmit and receive buffer descriptor pointers + * initially to rbase and tbase. Only the microcode patches + * documentation talks about initializing this pointer. This + * is missing from the sample I2C driver. If you dont + * initialize these pointers, the kernel hangs. */ spi->spi_rbptr = spi->spi_rbase; spi->spi_tbptr = spi->spi_tbase; diff --git a/cpu/mpc8xx/start.S b/cpu/mpc8xx/start.S index 3cc4ecb..81a4dc0 100644 --- a/cpu/mpc8xx/start.S +++ b/cpu/mpc8xx/start.S @@ -209,7 +209,6 @@ bl board_init_f /* run 1st part of board init code (from Flash) */ - .globl _start_of_vectors _start_of_vectors: @@ -650,8 +649,8 @@ /* * Relocation Function, r14 point to got2+0x8000 * - * Adjust got2 pointers, no need to check for 0, this code - * already puts a few entries in the table. + * Adjust got2 pointers, no need to check for 0, this code + * already puts a few entries in the table. */ li r0,__got2_entries@sectoff@l la r3,GOT(_GOT2_TABLE_) @@ -665,7 +664,7 @@ bdnz 1b /* - * Now adjust the fixups and the pointers to the fixups + * Now adjust the fixups and the pointers to the fixups * in case we need to move ourselves again. */ 2: li r0,__fixup_entries@sectoff@l diff --git a/cpu/mpc8xx/upatch.c b/cpu/mpc8xx/upatch.c index 99bdf53..eccff64 100644 --- a/cpu/mpc8xx/upatch.c +++ b/cpu/mpc8xx/upatch.c @@ -33,8 +33,8 @@ #endif /* - * Enable DPRAM microcode to execute from the first 512 bytes - * and a 256 byte extension of DPRAM. + * Enable DPRAM microcode to execute from the first 512 bytes + * and a 256 byte extension of DPRAM. */ immr->im_cpm.cp_rccr |= 0x0001; } diff --git a/cpu/mpc8xx/video.c b/cpu/mpc8xx/video.c index 9db69e1..40e65d3 100644 --- a/cpu/mpc8xx/video.c +++ b/cpu/mpc8xx/video.c @@ -855,13 +855,13 @@ debug ("[VIDEO CTRL] Blanking the screen...\n"); video_fill (VIDEO_BG_COL); - /* - * Turns on Aggressive Mode. Normally, turning on the caches - * will cause the screen to flicker when the caches try to - * fill. This gives the FIFO's for the Video Controller - * higher priority and prevents flickering because of - * underrun. This may still be an issue when using FLASH, - * since accessing data from Flash is so slow. + /* + * Turns on Aggressive Mode. Normally, turning on the caches + * will cause the screen to flicker when the caches try to + * fill. This gives the FIFO's for the Video Controller + * higher priority and prevents flickering because of + * underrun. This may still be an issue when using FLASH, + * since accessing data from Flash is so slow. */ debug ("[VIDEO CTRL] Turning on aggressive mode...\n"); immap->im_siu_conf.sc_sdcr = 0x40; @@ -1252,6 +1252,4 @@ return (addr); } - - #endif diff --git a/cpu/ppc4xx/405gp_enet.c b/cpu/ppc4xx/405gp_enet.c index b7b03ed..9639c92 100644 --- a/cpu/ppc4xx/405gp_enet.c +++ b/cpu/ppc4xx/405gp_enet.c @@ -218,10 +218,10 @@ /* AS.HARNOIS * We should have : * packetHandled <= packetReceived <= packetHandled+PKTBUFSRX - * In the most cases packetHandled = packetReceived, but it - * is possible that new packets (without relationship with - * current transfer) have got the time to arrived before - * netloop calls eth_halt + * In the most cases packetHandled = packetReceived, but it + * is possible that new packets (without relationship with + * current transfer) have got the time to arrived before + * netloop calls eth_halt */ printf ("About preceeding transfer:\n" "- Sent packet number %d\n" @@ -251,8 +251,8 @@ tx_u_index = 0; /* Transmit User Queue Index */ #if defined(CONFIG_440) - /* set RMII mode */ - out32 (ZMII_FER, ZMII_RMII | ZMII_MDI0); + /* set RMII mode */ + out32 (ZMII_FER, ZMII_RMII | ZMII_MDI0); #endif /* CONFIG_440 */ /* EMAC RESET */ @@ -426,8 +426,8 @@ /* set receive low/high water mark register */ #if defined(CONFIG_440) /* 440GP has a 64 byte burst length */ - out32 (EMAC_RX_HI_LO_WMARK, 0x80009000); - out32 (EMAC_TXM1, 0xf8640000); + out32 (EMAC_RX_HI_LO_WMARK, 0x80009000); + out32 (EMAC_TXM1, 0xf8640000); #else /* CONFIG_440 */ /* 405s have a 16 byte burst length */ out32 (EMAC_RX_HI_LO_WMARK, 0x0f002000); @@ -530,8 +530,8 @@ /* loop until either TINT turns on or 3 seconds elapse */ if ((temp_txm0 & EMAC_TXM0_GNP0) != 0) { /* transmit is done, so now check for errors - * If there is an error, an interrupt should - * happen when we return + * If there is an error, an interrupt should + * happen when we return */ time_now = get_timer (0); if ((time_now - time_start) > 3000) { @@ -568,16 +568,16 @@ my_uic1msr = mfdcr (uic1msr); if (!(my_uic0msr & UIC_MRE) - && !(my_uic1msr & (UIC_ETH0 | UIC_MS | UIC_MTDE | UIC_MRDE))) { - /* not for us */ + && !(my_uic1msr & (UIC_ETH0 | UIC_MS | UIC_MTDE | UIC_MRDE))) { + /* not for us */ return (rc); } /* get and clear controller status interrupts */ /* look at Mal and EMAC interrupts */ if ((my_uic0msr & UIC_MRE) - || (my_uic1msr & (UIC_MS | UIC_MTDE | UIC_MRDE))) { - /* we have a MAL interrupt */ + || (my_uic1msr & (UIC_MS | UIC_MTDE | UIC_MRDE))) { + /* we have a MAL interrupt */ mal_isr = mfdcr (malesr); /* look for mal error */ if (my_uic1msr & (UIC_MS | UIC_MTDE | UIC_MRDE)) { @@ -595,7 +595,7 @@ } } if ((emac_ier & emac_isr) - || (my_uic1msr & (UIC_MS | UIC_MTDE | UIC_MRDE))) { + || (my_uic1msr & (UIC_MS | UIC_MTDE | UIC_MRDE))) { mtdcr (uic0sr, UIC_MRE); /* Clear */ mtdcr (uic1sr, UIC_ETH0 | UIC_MS | UIC_MTDE | UIC_MRDE); /* Clear */ return (rc); /* we had errors so get out */ @@ -614,8 +614,8 @@ rc = 0; } } - mtdcr (uic0sr, UIC_MRE); /* Clear */ - mtdcr (uic1sr, UIC_ETH0 | UIC_MS | UIC_MTDE | UIC_MRDE); /* Clear */ + mtdcr (uic0sr, UIC_MRE); /* Clear */ + mtdcr (uic1sr, UIC_ETH0 | UIC_MS | UIC_MTDE | UIC_MRDE); /* Clear */ } while (serviced); return (rc); @@ -866,42 +866,42 @@ #if defined(CONFIG_NET_MULTI) int ppc_4xx_eth_initialize(bd_t *bis) { - struct eth_device *dev; - int eth_num = 0; + struct eth_device *dev; + int eth_num = 0; - dev = malloc (sizeof *dev); - if (dev == NULL) { - printf(__FUNCTION__ ": Cannot allocate eth_device\n"); - return (-1); - } + dev = malloc (sizeof *dev); + if (dev == NULL) { + printf(__FUNCTION__ ": Cannot allocate eth_device\n"); + return (-1); + } - sprintf(dev->name, "ppc_4xx_eth%d", eth_num); - dev->priv = (void *) eth_num; - dev->init = ppc_4xx_eth_init; - dev->halt = ppc_4xx_eth_halt; - dev->send = ppc_4xx_eth_send; - dev->recv = ppc_4xx_eth_rx; + sprintf(dev->name, "ppc_4xx_eth%d", eth_num); + dev->priv = (void *) eth_num; + dev->init = ppc_4xx_eth_init; + dev->halt = ppc_4xx_eth_halt; + dev->send = ppc_4xx_eth_send; + dev->recv = ppc_4xx_eth_rx; - eth_register (dev); + eth_register (dev); } #else /* !defined(CONFIG_NET_MULTI) */ void eth_halt (void) { - ppc_4xx_eth_halt(NULL); + ppc_4xx_eth_halt(NULL); } int eth_init (bd_t *bis) { - return (ppc_4xx_eth_init(NULL, bis)); + return (ppc_4xx_eth_init(NULL, bis)); } int eth_send(volatile void *packet, int length) { - return (ppc_4xx_eth_send(NULL, packet, length)); + return (ppc_4xx_eth_send(NULL, packet, length)); } int eth_rx(void) { - return (ppc_4xx_eth_rx(NULL)); + return (ppc_4xx_eth_rx(NULL)); } #endif /* !defined(CONFIG_NET_MULTI) */ diff --git a/cpu/ppc4xx/405gp_pci.c b/cpu/ppc4xx/405gp_pci.c index 82142a2..4b5472b 100644 --- a/cpu/ppc4xx/405gp_pci.c +++ b/cpu/ppc4xx/405gp_pci.c @@ -71,7 +71,6 @@ #include #include -#include #if !defined(CONFIG_440) #include <405gp_pci.h> #endif @@ -195,7 +194,7 @@ /*--------------------------------------------------------------------------+ * PMM2 is not used. Initialize them to zero. *--------------------------------------------------------------------------*/ - out32r(PMM2MA, (pmmma[2]&~0x1)); + out32r(PMM2MA, (pmmma[2]&~0x1)); out32r(PMM2LA, pmmla[2]); out32r(PMM2PCILA, pmmpcila[2]); out32r(PMM2PCIHA, pmmpciha[2]); @@ -303,7 +302,7 @@ struct pci_config_table *entry) { #ifdef DEBUG - printf("405gp_setup_bridge\n"); + printf("405gp_setup_bridge\n"); #endif } @@ -409,9 +408,9 @@ *--------------------------------------------------------------------------*/ strap = mfdcr(cpc0_strp1); if( (strap & 0x00040000) == 0 ){ - printf("PCI: CPC0_STRP1[PISE] not set.\n"); - printf("PCI: Configuration aborted.\n"); - return; + printf("PCI: CPC0_STRP1[PISE] not set.\n"); + printf("PCI: Configuration aborted.\n"); + return; } /*--------------------------------------------------------------------------+ @@ -438,9 +437,9 @@ #if defined(CFG_PCI_PRE_INIT) /* Let board change/modify hose & do initial checks */ if( pci_pre_init (hose) == 0 ){ - printf("PCI: Board-specific initialization failed.\n"); - printf("PCI: Configuration aborted.\n"); - return; + printf("PCI: Board-specific initialization failed.\n"); + printf("PCI: Configuration aborted.\n"); + return; } #endif @@ -486,10 +485,10 @@ *--------------------------------------------------------------------------*/ if( is_pci_host(hose) ){ #ifdef CONFIG_PCI_SCAN_SHOW - printf("PCI: Bus Dev VenId DevId Class Int\n"); + printf("PCI: Bus Dev VenId DevId Class Int\n"); #endif - out16r( PCIX0_CMD, in16r( PCIX0_CMD ) | PCI_COMMAND_MASTER); - hose->last_busno = pci_hose_scan(hose); + out16r( PCIX0_CMD, in16r( PCIX0_CMD ) | PCI_COMMAND_MASTER); + hose->last_busno = pci_hose_scan(hose); } } diff --git a/cpu/ppc4xx/bedbug_405.c b/cpu/ppc4xx/bedbug_405.c index eabc583..23752f3 100644 --- a/cpu/ppc4xx/bedbug_405.c +++ b/cpu/ppc4xx/bedbug_405.c @@ -5,8 +5,7 @@ #include #include #include - -#include +#include #include #include #include diff --git a/cpu/ppc4xx/cpu.c b/cpu/ppc4xx/cpu.c index 095a0aa..1d7c0c9 100644 --- a/cpu/ppc4xx/cpu.c +++ b/cpu/ppc4xx/cpu.c @@ -165,20 +165,20 @@ puts("IBM PowerPC 440 Rev. "); switch(pvr) { - case PVR_440GP_RB: + case PVR_440GP_RB: putc('B'); - /* See errata 1.12: CHIP_4 */ - if( ( mfdcr(cpc0_sys0) != mfdcr(cpc0_strp0) ) - ||( mfdcr(cpc0_sys1) != mfdcr(cpc0_strp1) ) ){ - puts("\n\t CPC0_SYSx DCRs corrupted. Resetting chip ...\n"); - udelay( 1000 * 1000 ); /* Give time for serial buf to clear */ - do_chip_reset( mfdcr(cpc0_strp0), mfdcr(cpc0_strp1) ); - } + /* See errata 1.12: CHIP_4 */ + if( ( mfdcr(cpc0_sys0) != mfdcr(cpc0_strp0) ) + ||( mfdcr(cpc0_sys1) != mfdcr(cpc0_strp1) ) ){ + puts("\n\t CPC0_SYSx DCRs corrupted. Resetting chip ...\n"); + udelay( 1000 * 1000 ); /* Give time for serial buf to clear */ + do_chip_reset( mfdcr(cpc0_strp0), mfdcr(cpc0_strp1) ); + } break; - case PVR_440GP_RC: + case PVR_440GP_RC: putc('C'); break; - default: + default: printf("UNKNOWN (PVR=%08x)", pvr); break; } @@ -192,11 +192,11 @@ /* ------------------------------------------------------------------------- */ -int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[]) +int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) { - /* - * Initiate system reset in debug control register DBCR - */ + /* + * Initiate system reset in debug control register DBCR + */ __asm__ __volatile__("lis 3, 0x3000" ::: "r3"); #if defined(CONFIG_440) __asm__ __volatile__("mtspr 0x134, 3"); diff --git a/cpu/ppc4xx/i2c.c b/cpu/ppc4xx/i2c.c index 4bf0bbd..099d30a 100644 --- a/cpu/ppc4xx/i2c.c +++ b/cpu/ppc4xx/i2c.c @@ -85,7 +85,7 @@ unsigned long freqOPB; int val, divisor; -#ifdef CFG_I2C_INIT_BOARD +#ifdef CFG_I2C_INIT_BOARD /* call board specific i2c bus reset routine before accessing the */ /* environment, which might be in a chip on that bus. For details */ /* about this problem see doc/I2C_Edge_Conditions. */ @@ -134,19 +134,19 @@ __asm__ volatile ("eieio"); - val = in8(IIC_MDCNTL); - __asm__ volatile ("eieio"); + val = in8(IIC_MDCNTL); + __asm__ volatile ("eieio"); - /* Ignore General Call, slave transfers are ignored, - disable interrupts, exit unknown bus state, enable hold - SCL - 100kHz normaly or FastMode for 400kHz and above - */ + /* Ignore General Call, slave transfers are ignored, + disable interrupts, exit unknown bus state, enable hold + SCL + 100kHz normaly or FastMode for 400kHz and above + */ - val |= IIC_MDCNTL_EUBS|IIC_MDCNTL_HSCL; - if( speed >= 400000 ){ - val |= IIC_MDCNTL_FSM; - } + val |= IIC_MDCNTL_EUBS|IIC_MDCNTL_HSCL; + if( speed >= 400000 ){ + val |= IIC_MDCNTL_FSM; + } out8 (IIC_MDCNTL, val); /* clear control reg */ @@ -182,153 +182,153 @@ */ static int i2c_transfer(unsigned char cmd_type, - unsigned char chip, - unsigned char addr[], - unsigned char addr_len, - unsigned char data[], + unsigned char chip, + unsigned char addr[], + unsigned char addr_len, + unsigned char data[], unsigned short data_len ) { - unsigned char* ptr; - int reading; - int tran,cnt; - int result; - int status; - int i; - uchar creg; + unsigned char* ptr; + int reading; + int tran,cnt; + int result; + int status; + int i; + uchar creg; - if( data == 0 || data_len == 0 ){ - /*Don't support data transfer of no length or to address 0*/ - printf( "i2c_transfer: bad call\n" ); - return IIC_NOK; - } - if( addr && addr_len ){ - ptr = addr; - cnt = addr_len; - reading = 0; - }else{ - ptr = data; - cnt = data_len; - reading = cmd_type; - } + if( data == 0 || data_len == 0 ){ + /*Don't support data transfer of no length or to address 0*/ + printf( "i2c_transfer: bad call\n" ); + return IIC_NOK; + } + if( addr && addr_len ){ + ptr = addr; + cnt = addr_len; + reading = 0; + }else{ + ptr = data; + cnt = data_len; + reading = cmd_type; + } - /*Clear Stop Complete Bit*/ - out8(IIC_STS,IIC_STS_SCMP); - /* Check init */ - i=10; - do { - /* Get status */ - status = in8(IIC_STS); - __asm__ volatile("eieio"); - i--; - } while ((status & IIC_STS_PT) && (i>0)); + /*Clear Stop Complete Bit*/ + out8(IIC_STS,IIC_STS_SCMP); + /* Check init */ + i=10; + do { + /* Get status */ + status = in8(IIC_STS); + __asm__ volatile("eieio"); + i--; + } while ((status & IIC_STS_PT) && (i>0)); - if (status & IIC_STS_PT) { - result = IIC_NOK_TOUT; - return(result); - } - /*flush the Master/Slave Databuffers*/ - out8(IIC_MDCNTL, ((in8(IIC_MDCNTL))|IIC_MDCNTL_FMDB|IIC_MDCNTL_FSDB)); - /*need to wait 4 OPB clocks? code below should take that long*/ + if (status & IIC_STS_PT) { + result = IIC_NOK_TOUT; + return(result); + } + /*flush the Master/Slave Databuffers*/ + out8(IIC_MDCNTL, ((in8(IIC_MDCNTL))|IIC_MDCNTL_FMDB|IIC_MDCNTL_FSDB)); + /*need to wait 4 OPB clocks? code below should take that long*/ - /* 7-bit adressing */ - out8(IIC_HMADR,0); - out8(IIC_LMADR, chip); - __asm__ volatile("eieio"); + /* 7-bit adressing */ + out8(IIC_HMADR,0); + out8(IIC_LMADR, chip); + __asm__ volatile("eieio"); - tran = 0; - result = IIC_OK; - creg = 0; + tran = 0; + result = IIC_OK; + creg = 0; - while ( tran != cnt && (result == IIC_OK)) { - int bc,j; + while ( tran != cnt && (result == IIC_OK)) { + int bc,j; - /* Control register = - Normal transfer, 7-bits adressing, Transfer up to bc bytes, Normal start, - Transfer is a sequence of transfers - */ - creg |= IIC_CNTL_PT; - - bc = (cnt - tran) > 4 ? 4 : - cnt - tran; - creg |= (bc-1)<<4; - /* if the real cmd type is write continue trans*/ - if ( (!cmd_type && (ptr == addr)) || ((tran+bc) != cnt) ) - creg |= IIC_CNTL_CHT; - - if (reading) - creg |= IIC_CNTL_READ; - else { - for(j=0; j 4 ? 4 : + cnt - tran; + creg |= (bc-1)<<4; + /* if the real cmd type is write continue trans*/ + if ( (!cmd_type && (ptr == addr)) || ((tran+bc) != cnt) ) + creg |= IIC_CNTL_CHT; + + if (reading) + creg |= IIC_CNTL_READ; + else { + for(j=0; j0)); - if (status & IIC_STS_ERR) { - result = IIC_NOK; - status = in8 (IIC_EXTSTS); - /* Lost arbitration? */ - if (status & IIC_EXTSTS_LA) - result = IIC_NOK_LA; - /* Incomplete transfer? */ - if (status & IIC_EXTSTS_ICT) - result = IIC_NOK_ICT; - /* Transfer aborted? */ - if (status & IIC_EXTSTS_XFRA) - result = IIC_NOK_XFRA; - } else if ( status & IIC_STS_PT) { - result = IIC_NOK_TOUT; - } - /* Command is reading => get buffer */ - if ((reading) && (result == IIC_OK)) { - /* Are there data in buffer */ - if (status & IIC_STS_MDBS) { - /* - even if we have data we have to wait 4OPB clocks - for it to hit the front of the FIFO, after that - we can just read. We should check XFCNT here and - if the FIFO is full there is no need to wait. + if (status & IIC_STS_ERR) { + result = IIC_NOK; + status = in8 (IIC_EXTSTS); + /* Lost arbitration? */ + if (status & IIC_EXTSTS_LA) + result = IIC_NOK_LA; + /* Incomplete transfer? */ + if (status & IIC_EXTSTS_ICT) + result = IIC_NOK_ICT; + /* Transfer aborted? */ + if (status & IIC_EXTSTS_XFRA) + result = IIC_NOK_XFRA; + } else if ( status & IIC_STS_PT) { + result = IIC_NOK_TOUT; + } + /* Command is reading => get buffer */ + if ((reading) && (result == IIC_OK)) { + /* Are there data in buffer */ + if (status & IIC_STS_MDBS) { + /* + even if we have data we have to wait 4OPB clocks + for it to hit the front of the FIFO, after that + we can just read. We should check XFCNT here and + if the FIFO is full there is no need to wait. */ - udelay (1); - for(j=0;jed (i.e. there was a chip at that address which - * drove the data line low). - */ - return(i2c_transfer (1, chip << 1, 0,0, buf, 1) != 0); + /* + * What is needed is to send the chip address and verify that the + * address was ed (i.e. there was a chip at that address which + * drove the data line low). + */ + return(i2c_transfer (1, chip << 1, 0,0, buf, 1) != 0); } - int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len) { - uchar xaddr[4]; - int ret; + uchar xaddr[4]; + int ret; if ( alen > 4 ) { printf ("I2C read: addr len %d not supported\n", alen); return 1; } - if ( alen > 0 ) { - xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; - } + if ( alen > 0 ) { + xaddr[0] = (addr >> 24) & 0xFF; + xaddr[1] = (addr >> 16) & 0xFF; + xaddr[2] = (addr >> 8) & 0xFF; + xaddr[3] = addr & 0xFF; + } #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of - * address and the extra bits end up in the "chip address" - * bit slots. This makes a 24WC08 (1Kbyte) chip look like - * four 256 byte chips. + * EEPROM chips that implement "address overflow" are ones + * like Catalyst 24WC04/08/16 which has 9/10/11 bits of + * address and the extra bits end up in the "chip address" + * bit slots. This makes a 24WC08 (1Kbyte) chip look like + * four 256 byte chips. * - * Note that we consider the length of the address field to - * still be one byte because the extra address bits are - * hidden in the chip address. + * Note that we consider the length of the address field to + * still be one byte because the extra address bits are + * hidden in the chip address. */ - if( alen > 0 ) - chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); + if( alen > 0 ) + chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); #endif - if( (ret = i2c_transfer( 1, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) { - printf( "I2c read: failed %d\n", ret); - return 1; - } - return 0; + if( (ret = i2c_transfer( 1, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) { + printf( "I2c read: failed %d\n", ret); + return 1; + } + return 0; } int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len) { - uchar xaddr[4]; + uchar xaddr[4]; if ( alen > 4 ) { printf ("I2C write: addr len %d not supported\n", alen); return 1; } - if ( alen > 0 ) { - xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; - } + if ( alen > 0 ) { + xaddr[0] = (addr >> 24) & 0xFF; + xaddr[1] = (addr >> 16) & 0xFF; + xaddr[2] = (addr >> 8) & 0xFF; + xaddr[3] = addr & 0xFF; + } #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW /* - * EEPROM chips that implement "address overflow" are ones - * like Catalyst 24WC04/08/16 which has 9/10/11 bits of - * address and the extra bits end up in the "chip address" - * bit slots. This makes a 24WC08 (1Kbyte) chip look like - * four 256 byte chips. + * EEPROM chips that implement "address overflow" are ones + * like Catalyst 24WC04/08/16 which has 9/10/11 bits of + * address and the extra bits end up in the "chip address" + * bit slots. This makes a 24WC08 (1Kbyte) chip look like + * four 256 byte chips. * - * Note that we consider the length of the address field to - * still be one byte because the extra address bits are - * hidden in the chip address. + * Note that we consider the length of the address field to + * still be one byte because the extra address bits are + * hidden in the chip address. */ - if( alen > 0 ) - chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); + if( alen > 0 ) + chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); #endif - return (i2c_transfer( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0); + return (i2c_transfer( 0, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0); } /*----------------------------------------------------------------------- diff --git a/cpu/ppc4xx/interrupts.c b/cpu/ppc4xx/interrupts.c index 0867de4..b6a956c 100644 --- a/cpu/ppc4xx/interrupts.c +++ b/cpu/ppc4xx/interrupts.c @@ -27,7 +27,6 @@ #include #include #include -#include #include #include #include diff --git a/cpu/ppc4xx/kgdb.S b/cpu/ppc4xx/kgdb.S index 78681cd..be28340 100644 --- a/cpu/ppc4xx/kgdb.S +++ b/cpu/ppc4xx/kgdb.S @@ -45,13 +45,13 @@ iccci r0,r0 /* iccci invalidates the entire I cache */ /* dcache */ addi r6,0,0x0000 /* clear GPR 6 */ - addi r7,r0, 128 /* do loop for # of dcache lines */ + addi r7,r0, 128 /* do loop for # of dcache lines */ /* NOTE: dccci invalidates both */ - mtctr r7 /* ways in the D cache */ + mtctr r7 /* ways in the D cache */ ..dcloop: - dccci 0,r6 /* invalidate line */ - addi r6,r6, 32 /* bump to next line */ - bdnz ..dcloop + dccci 0,r6 /* invalidate line */ + addi r6,r6, 32 /* bump to next line */ + bdnz ..dcloop blr .globl kgdb_flush_cache_range diff --git a/cpu/ppc4xx/miiphy.c b/cpu/ppc4xx/miiphy.c index c5a90a9..0606ebe 100644 --- a/cpu/ppc4xx/miiphy.c +++ b/cpu/ppc4xx/miiphy.c @@ -76,7 +76,6 @@ } /* end dump */ - /***********************************************************/ /* read a phy reg and return the value with a rc */ /***********************************************************/ diff --git a/cpu/ppc4xx/resetvec.S b/cpu/ppc4xx/resetvec.S index e058bf0..b3308bd 100644 --- a/cpu/ppc4xx/resetvec.S +++ b/cpu/ppc4xx/resetvec.S @@ -10,4 +10,3 @@ b _start #endif #endif - diff --git a/cpu/ppc4xx/sdram.c b/cpu/ppc4xx/sdram.c index e35a1d0..d4552a1 100644 --- a/cpu/ppc4xx/sdram.c +++ b/cpu/ppc4xx/sdram.c @@ -128,7 +128,7 @@ * Now test for 64 MByte... */ - /* + /* * Disable memory controller. */ mtsdram0(mem_mcopt1, 0x00000000); @@ -179,7 +179,7 @@ * Now test for 32 MByte... */ - /* + /* * Disable memory controller. */ mtsdram0(mem_mcopt1, 0x00000000); @@ -221,7 +221,7 @@ /* * Now test for 16 MByte... */ - /* + /* * Disable memory controller. */ mtsdram0(mem_mcopt1, 0x00000000); @@ -266,7 +266,7 @@ * Setup for 4 MByte... */ - /* + /* * Disable memory controller. */ mtsdram0(mem_mcopt1, 0x00000000); diff --git a/cpu/ppc4xx/spd_sdram.c b/cpu/ppc4xx/spd_sdram.c index 76aee2e..289ad12 100644 --- a/cpu/ppc4xx/spd_sdram.c +++ b/cpu/ppc4xx/spd_sdram.c @@ -156,7 +156,7 @@ * way to minimize stack utilization. */ #ifndef CONFIG_405EP - tmp = (mfdcr(pllmd) >> (31-6)) & 0xf; /* get FBDV bits */ + tmp = (mfdcr(pllmd) >> (31-6)) & 0xf; /* get FBDV bits */ tmp = CONFIG_SYS_CLK_FREQ * tmp; /* get plb freq */ #else { @@ -197,10 +197,10 @@ #endif bus_period = sdram_HZ_to_ns(tmp); /* get sdram speed */ - /* Make shure we are using SDRAM */ + /* Make shure we are using SDRAM */ if (read_spd(2) != 0x04){ - SPD_ERR("SDRAM - non SDRAM memory module found\n"); - } + SPD_ERR("SDRAM - non SDRAM memory module found\n"); + } /*------------------------------------------------------------------ configure memory timing register @@ -218,17 +218,17 @@ tmp = read_spd(127) & 0x6; if(tmp == 0x02){ /* only cas = 2 supported */ - min_cas = 2; + min_cas = 2; /* t_ck = read_spd(9); */ /* t_ac = read_spd(10); */ } else if (tmp == 0x04){ /* only cas = 3 supported */ - min_cas = 3; + min_cas = 3; /* t_ck = read_spd(9); */ /* t_ac = read_spd(10); */ } else if (tmp == 0x06){ /* 2,3 supported, so use 2 */ - min_cas = 2; + min_cas = 2; /* t_ck = read_spd(23); */ /* t_ac = read_spd(24); */ } @@ -292,7 +292,7 @@ tmp=15625*8; break; default: - SPD_ERR("SDRAM - Bad refresh period \n"); + SPD_ERR("SDRAM - Bad refresh period \n"); } /* convert from nsec to bus cycles */ tmp = tmp/bus_period; @@ -332,11 +332,11 @@ if ( (read_spd(11)==2) && (read_spd(6)==40) && (read_spd(14)==8) ){ sdram0_ecccfg=0xf<1) sdram0_b2cr = (bank_size) * 1 | tmp; - if(bank_cnt>2) sdram0_b1cr = (bank_size) * 2 | tmp; - if(bank_cnt>3) sdram0_b3cr = (bank_size) * 3 | tmp; + sdram0_b0cr = (bank_size) * 0 | tmp; + if(bank_cnt>1) sdram0_b2cr = (bank_size) * 1 | tmp; + if(bank_cnt>2) sdram0_b1cr = (bank_size) * 2 | tmp; + if(bank_cnt>3) sdram0_b3cr = (bank_size) * 3 | tmp; /* @@ -684,34 +684,34 @@ unsigned char spd_read(uchar chip, uint addr); void get_spd_info(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks); + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks); void check_mem_type - (unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks); + (unsigned long* dimm_populated, + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks); void check_volt_type - (unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks); + (unsigned long* dimm_populated, + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks); void program_cfg0(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks); + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks); void program_cfg1(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks); + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks); void program_rtr (unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks); + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks); void program_tr0 (unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks); + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks); void program_tr1 (void); @@ -719,8 +719,8 @@ unsigned long program_bxcr(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks); + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks); /* * This function is reading data from the DIMM module EEPROM over the SPD bus @@ -788,7 +788,7 @@ * program the BxCR registers to find out total sdram installed */ total_size = program_bxcr(dimm_populated, iic0_dimm_addr, - num_dimm_banks); + num_dimm_banks); /* * program SDRAM Clock Timing Register (SDRAM0_CLKTR) @@ -810,10 +810,10 @@ * wait for SDRAM_CFG0_DC_EN to complete */ while(1) { - mfsdram(mem_mcsts, mcsts); - if ((mcsts & SDRAM_MCSTS_MRSC) != 0) { - break; - } + mfsdram(mem_mcsts, mcsts); + if ((mcsts & SDRAM_MCSTS_MRSC) != 0) { + break; + } } /* @@ -838,8 +838,8 @@ } void get_spd_info(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks) + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks) { unsigned long dimm_num; unsigned long dimm_found; @@ -848,90 +848,90 @@ dimm_found = FALSE; for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) { - num_of_bytes = 0; - total_size = 0; + num_of_bytes = 0; + total_size = 0; - num_of_bytes = spd_read(iic0_dimm_addr[dimm_num], 0); - total_size = spd_read(iic0_dimm_addr[dimm_num], 1); + num_of_bytes = spd_read(iic0_dimm_addr[dimm_num], 0); + total_size = spd_read(iic0_dimm_addr[dimm_num], 1); - if ((num_of_bytes != 0) && (total_size != 0)) { - dimm_populated[dimm_num] = TRUE; - dimm_found = TRUE; + if ((num_of_bytes != 0) && (total_size != 0)) { + dimm_populated[dimm_num] = TRUE; + dimm_found = TRUE; #if 0 - printf("DIMM slot %lu: populated\n", dimm_num); + printf("DIMM slot %lu: populated\n", dimm_num); #endif - } - else { - dimm_populated[dimm_num] = FALSE; + } + else { + dimm_populated[dimm_num] = FALSE; #if 0 - printf("DIMM slot %lu: Not populated\n", dimm_num); + printf("DIMM slot %lu: Not populated\n", dimm_num); #endif - } + } } if (dimm_found == FALSE) { - printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n"); - hang(); + printf("ERROR - No memory installed. Install a DDR-SDRAM DIMM.\n\n"); + hang(); } } void check_mem_type(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks) + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks) { unsigned long dimm_num; unsigned char dimm_type; for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) { - if (dimm_populated[dimm_num] == TRUE) { - dimm_type = spd_read(iic0_dimm_addr[dimm_num], 2); - switch (dimm_type) { - case 7: + if (dimm_populated[dimm_num] == TRUE) { + dimm_type = spd_read(iic0_dimm_addr[dimm_num], 2); + switch (dimm_type) { + case 7: #if 0 - printf("DIMM slot %lu: DDR SDRAM detected\n", dimm_num); + printf("DIMM slot %lu: DDR SDRAM detected\n", dimm_num); #endif - break; - default: - printf("ERROR: Unsupported DIMM detected in slot %lu.\n", - dimm_num); - printf("Only DDR SDRAM DIMMs are supported.\n"); - printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); - break; - } - } + break; + default: + printf("ERROR: Unsupported DIMM detected in slot %lu.\n", + dimm_num); + printf("Only DDR SDRAM DIMMs are supported.\n"); + printf("Replace the DIMM module with a supported DIMM.\n\n"); + hang(); + break; + } + } } } void check_volt_type(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks) + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks) { unsigned long dimm_num; unsigned long voltage_type; for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) { - if (dimm_populated[dimm_num] == TRUE) { - voltage_type = spd_read(iic0_dimm_addr[dimm_num], 8); - if (voltage_type != 0x04) { - printf("ERROR: DIMM %lu with unsupported voltage level.\n", - dimm_num); - hang(); - } - else { + if (dimm_populated[dimm_num] == TRUE) { + voltage_type = spd_read(iic0_dimm_addr[dimm_num], 8); + if (voltage_type != 0x04) { + printf("ERROR: DIMM %lu with unsupported voltage level.\n", + dimm_num); + hang(); + } + else { #if 0 - printf("DIMM %lu voltage level supported.\n", dimm_num); + printf("DIMM %lu voltage level supported.\n", dimm_num); #endif - } - break; - } + } + break; + } } } void program_cfg0(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks) + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks) { unsigned long dimm_num; unsigned long cfg0; @@ -951,9 +951,9 @@ * clear bits */ cfg0 &= ~(SDRAM_CFG0_DCEN | SDRAM_CFG0_MCHK_MASK | - SDRAM_CFG0_RDEN | SDRAM_CFG0_PMUD | - SDRAM_CFG0_DMWD_MASK | - SDRAM_CFG0_UIOS_MASK | SDRAM_CFG0_PDP); + SDRAM_CFG0_RDEN | SDRAM_CFG0_PMUD | + SDRAM_CFG0_DMWD_MASK | + SDRAM_CFG0_UIOS_MASK | SDRAM_CFG0_PDP); /* @@ -961,52 +961,52 @@ */ ecc_enabled = TRUE; for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) { - if (dimm_populated[dimm_num] == TRUE) { - ecc = spd_read(iic0_dimm_addr[dimm_num], 11); - if (ecc != 0x02) { - ecc_enabled = FALSE; - } + if (dimm_populated[dimm_num] == TRUE) { + ecc = spd_read(iic0_dimm_addr[dimm_num], 11); + if (ecc != 0x02) { + ecc_enabled = FALSE; + } - /* - * program Registered DIMM Enable - */ - attributes = spd_read(iic0_dimm_addr[dimm_num], 21); - if ((attributes & 0x02) != 0x00) { - cfg0 |= SDRAM_CFG0_RDEN; - } + /* + * program Registered DIMM Enable + */ + attributes = spd_read(iic0_dimm_addr[dimm_num], 21); + if ((attributes & 0x02) != 0x00) { + cfg0 |= SDRAM_CFG0_RDEN; + } - /* - * program DDR SDRAM Data Width - */ - data_width = - (unsigned long)spd_read(iic0_dimm_addr[dimm_num],6) + - (((unsigned long)spd_read(iic0_dimm_addr[dimm_num],7)) << 8); - if (data_width == 64 || data_width == 72) { - dimm_64bit = TRUE; - cfg0 |= SDRAM_CFG0_DMWD_64; - } - else if (data_width == 32 || data_width == 40) { - dimm_32bit = TRUE; - cfg0 |= SDRAM_CFG0_DMWD_32; - } - else { - printf("WARNING: DIMM with datawidth of %lu bits.\n", - data_width); - printf("Only DIMMs with 32 or 64 bit datawidths supported.\n"); - hang(); - } - break; - } + /* + * program DDR SDRAM Data Width + */ + data_width = + (unsigned long)spd_read(iic0_dimm_addr[dimm_num],6) + + (((unsigned long)spd_read(iic0_dimm_addr[dimm_num],7)) << 8); + if (data_width == 64 || data_width == 72) { + dimm_64bit = TRUE; + cfg0 |= SDRAM_CFG0_DMWD_64; + } + else if (data_width == 32 || data_width == 40) { + dimm_32bit = TRUE; + cfg0 |= SDRAM_CFG0_DMWD_32; + } + else { + printf("WARNING: DIMM with datawidth of %lu bits.\n", + data_width); + printf("Only DIMMs with 32 or 64 bit datawidths supported.\n"); + hang(); + } + break; + } } /* * program Memory Data Error Checking */ if (ecc_enabled == TRUE) { - cfg0 |= SDRAM_CFG0_MCHK_GEN; + cfg0 |= SDRAM_CFG0_MCHK_GEN; } else { - cfg0 |= SDRAM_CFG0_MCHK_NON; + cfg0 |= SDRAM_CFG0_MCHK_NON; } /* @@ -1023,8 +1023,8 @@ } void program_cfg1(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks) + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks) { unsigned long cfg1; mfsdram(mem_cfg1, cfg1); @@ -1041,8 +1041,8 @@ } void program_rtr (unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks) + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks) { unsigned long dimm_num; unsigned long bus_period_x_10; @@ -1060,36 +1060,36 @@ for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) { - if (dimm_populated[dimm_num] == TRUE) { - refresh_rate_type = 0x7F & spd_read(iic0_dimm_addr[dimm_num], 12); - switch (refresh_rate_type) { - case 0x00: - refresh_rate = 15625; - break; - case 0x011: - refresh_rate = 15625/4; - break; - case 0x02: - refresh_rate = 15625/2; - break; - case 0x03: - refresh_rate = 15626*2; - break; - case 0x04: - refresh_rate = 15625*4; - break; - case 0x05: - refresh_rate = 15625*8; - break; - default: - printf("ERROR: DIMM %lu, unsupported refresh rate/type.\n", - dimm_num); - printf("Replace the DIMM module with a supported DIMM.\n"); - break; - } + if (dimm_populated[dimm_num] == TRUE) { + refresh_rate_type = 0x7F & spd_read(iic0_dimm_addr[dimm_num], 12); + switch (refresh_rate_type) { + case 0x00: + refresh_rate = 15625; + break; + case 0x011: + refresh_rate = 15625/4; + break; + case 0x02: + refresh_rate = 15625/2; + break; + case 0x03: + refresh_rate = 15626*2; + break; + case 0x04: + refresh_rate = 15625*4; + break; + case 0x05: + refresh_rate = 15625*8; + break; + default: + printf("ERROR: DIMM %lu, unsupported refresh rate/type.\n", + dimm_num); + printf("Replace the DIMM module with a supported DIMM.\n"); + break; + } - break; - } + break; + } } refresh_interval = refresh_rate * 10 / bus_period_x_10; @@ -1102,8 +1102,8 @@ } void program_tr0 (unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks) + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks) { unsigned long dimm_num; unsigned long tr0; @@ -1141,9 +1141,9 @@ */ mfsdram(mem_tr0, tr0); tr0 &= ~(SDRAM_TR0_SDWR_MASK | SDRAM_TR0_SDWD_MASK | - SDRAM_TR0_SDCL_MASK | SDRAM_TR0_SDPA_MASK | - SDRAM_TR0_SDCP_MASK | SDRAM_TR0_SDLD_MASK | - SDRAM_TR0_SDRA_MASK | SDRAM_TR0_SDRD_MASK); + SDRAM_TR0_SDCL_MASK | SDRAM_TR0_SDPA_MASK | + SDRAM_TR0_SDCP_MASK | SDRAM_TR0_SDLD_MASK | + SDRAM_TR0_SDRA_MASK | SDRAM_TR0_SDRD_MASK); /* * initialization @@ -1160,83 +1160,83 @@ tcyc_3_0_ns_x_10 = 0; for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) { - if (dimm_populated[dimm_num] == TRUE) { - wcsbc = spd_read(iic0_dimm_addr[dimm_num], 15); - t_rp_ns = spd_read(iic0_dimm_addr[dimm_num], 27) >> 2; - t_rcd_ns = spd_read(iic0_dimm_addr[dimm_num], 29) >> 2; - t_ras_ns = spd_read(iic0_dimm_addr[dimm_num], 30); - cas_bit = spd_read(iic0_dimm_addr[dimm_num], 18); + if (dimm_populated[dimm_num] == TRUE) { + wcsbc = spd_read(iic0_dimm_addr[dimm_num], 15); + t_rp_ns = spd_read(iic0_dimm_addr[dimm_num], 27) >> 2; + t_rcd_ns = spd_read(iic0_dimm_addr[dimm_num], 29) >> 2; + t_ras_ns = spd_read(iic0_dimm_addr[dimm_num], 30); + cas_bit = spd_read(iic0_dimm_addr[dimm_num], 18); - for (cas_index = 0; cas_index < 3; cas_index++) { - switch (cas_index) { - case 0: - tcyc_reg = spd_read(iic0_dimm_addr[dimm_num], 9); - break; - case 1: - tcyc_reg = spd_read(iic0_dimm_addr[dimm_num], 23); - break; - default: - tcyc_reg = spd_read(iic0_dimm_addr[dimm_num], 25); - break; - } + for (cas_index = 0; cas_index < 3; cas_index++) { + switch (cas_index) { + case 0: + tcyc_reg = spd_read(iic0_dimm_addr[dimm_num], 9); + break; + case 1: + tcyc_reg = spd_read(iic0_dimm_addr[dimm_num], 23); + break; + default: + tcyc_reg = spd_read(iic0_dimm_addr[dimm_num], 25); + break; + } - if ((tcyc_reg & 0x0F) >= 10) { - printf("ERROR: Tcyc incorrect for DIMM in slot %lu\n", - dimm_num); - hang(); - } + if ((tcyc_reg & 0x0F) >= 10) { + printf("ERROR: Tcyc incorrect for DIMM in slot %lu\n", + dimm_num); + hang(); + } - cycle_time_ns_x_10[cas_index] = - (((tcyc_reg & 0xF0) >> 4) * 10) + (tcyc_reg & 0x0F); - } + cycle_time_ns_x_10[cas_index] = + (((tcyc_reg & 0xF0) >> 4) * 10) + (tcyc_reg & 0x0F); + } - cas_index = 0; + cas_index = 0; - if ((cas_bit & 0x80) != 0) { - cas_index += 3; - } - else if ((cas_bit & 0x40) != 0) { - cas_index += 2; - } - else if ((cas_bit & 0x20) != 0) { - cas_index += 1; - } + if ((cas_bit & 0x80) != 0) { + cas_index += 3; + } + else if ((cas_bit & 0x40) != 0) { + cas_index += 2; + } + else if ((cas_bit & 0x20) != 0) { + cas_index += 1; + } - if (((cas_bit & 0x10) != 0) && (cas_index < 3)) { - tcyc_3_0_ns_x_10 = cycle_time_ns_x_10[cas_index]; - cas_index++; - } - else { - if (cas_index != 0) { - cas_index++; - } - cas_3_0_available = FALSE; - } + if (((cas_bit & 0x10) != 0) && (cas_index < 3)) { + tcyc_3_0_ns_x_10 = cycle_time_ns_x_10[cas_index]; + cas_index++; + } + else { + if (cas_index != 0) { + cas_index++; + } + cas_3_0_available = FALSE; + } - if (((cas_bit & 0x08) != 0) || (cas_index < 3)) { - tcyc_2_5_ns_x_10 = cycle_time_ns_x_10[cas_index]; - cas_index++; - } - else { - if (cas_index != 0) { - cas_index++; - } - cas_2_5_available = FALSE; - } + if (((cas_bit & 0x08) != 0) || (cas_index < 3)) { + tcyc_2_5_ns_x_10 = cycle_time_ns_x_10[cas_index]; + cas_index++; + } + else { + if (cas_index != 0) { + cas_index++; + } + cas_2_5_available = FALSE; + } - if (((cas_bit & 0x04) != 0) || (cas_index < 3)) { - tcyc_2_0_ns_x_10 = cycle_time_ns_x_10[cas_index]; - cas_index++; - } - else { - if (cas_index != 0) { - cas_index++; - } - cas_2_0_available = FALSE; - } + if (((cas_bit & 0x04) != 0) || (cas_index < 3)) { + tcyc_2_0_ns_x_10 = cycle_time_ns_x_10[cas_index]; + cas_index++; + } + else { + if (cas_index != 0) { + cas_index++; + } + cas_2_0_available = FALSE; + } - break; - } + break; + } } /* @@ -1245,33 +1245,33 @@ tr0 |= SDRAM_TR0_SDWR_2_CLK; /* Write Recovery: 2 CLK */ switch (wcsbc) { case 0: - tr0 |= SDRAM_TR0_SDWD_0_CLK; - break; + tr0 |= SDRAM_TR0_SDWD_0_CLK; + break; default: - tr0 |= SDRAM_TR0_SDWD_1_CLK; - break; + tr0 |= SDRAM_TR0_SDWD_1_CLK; + break; } /* * Program SD_CASL field */ if ((cas_2_0_available == TRUE) && - (bus_period_x_10 >= tcyc_2_0_ns_x_10)) { - tr0 |= SDRAM_TR0_SDCL_2_0_CLK; + (bus_period_x_10 >= tcyc_2_0_ns_x_10)) { + tr0 |= SDRAM_TR0_SDCL_2_0_CLK; } else if((cas_2_5_available == TRUE) && - (bus_period_x_10 >= tcyc_2_5_ns_x_10)) { - tr0 |= SDRAM_TR0_SDCL_2_5_CLK; + (bus_period_x_10 >= tcyc_2_5_ns_x_10)) { + tr0 |= SDRAM_TR0_SDCL_2_5_CLK; } else if((cas_3_0_available == TRUE) && - (bus_period_x_10 >= tcyc_3_0_ns_x_10)) { - tr0 |= SDRAM_TR0_SDCL_3_0_CLK; + (bus_period_x_10 >= tcyc_3_0_ns_x_10)) { + tr0 |= SDRAM_TR0_SDCL_3_0_CLK; } else { - printf("ERROR: No supported CAS latency with the installed DIMMs.\n"); - printf("Only CAS latencies of 2.0, 2.5, and 3.0 are supported.\n"); - printf("Make sure the PLB speed is within the supported range.\n"); - hang(); + printf("ERROR: No supported CAS latency with the installed DIMMs.\n"); + printf("Only CAS latencies of 2.0, 2.5, and 3.0 are supported.\n"); + printf("Make sure the PLB speed is within the supported range.\n"); + hang(); } /* @@ -1281,20 +1281,20 @@ t_rp_clk = sys_info.freqPLB * t_rp_ns / ONE_BILLION; plb_check = ONE_BILLION * t_rp_clk / t_rp_ns; if (sys_info.freqPLB != plb_check) { - t_rp_clk++; + t_rp_clk++; } switch ((unsigned long)t_rp_clk) { case 0: case 1: case 2: - tr0 |= SDRAM_TR0_SDPA_2_CLK; - break; + tr0 |= SDRAM_TR0_SDPA_2_CLK; + break; case 3: - tr0 |= SDRAM_TR0_SDPA_3_CLK; - break; + tr0 |= SDRAM_TR0_SDPA_3_CLK; + break; default: - tr0 |= SDRAM_TR0_SDPA_4_CLK; - break; + tr0 |= SDRAM_TR0_SDPA_4_CLK; + break; } /* @@ -1303,7 +1303,7 @@ t_ras_rcd_clk = sys_info.freqPLB * (t_ras_ns - t_rcd_ns) / ONE_BILLION; plb_check = ONE_BILLION * t_ras_rcd_clk / (t_ras_ns - t_rcd_ns); if (sys_info.freqPLB != plb_check) { - t_ras_rcd_clk++; + t_ras_rcd_clk++; } switch (t_ras_rcd_clk) { case 0: @@ -1334,7 +1334,7 @@ t_rfc_clk = sys_info.freqPLB / (ONE_BILLION / 75); residue = sys_info.freqPLB % (ONE_BILLION / 75); if (residue >= (ONE_BILLION / 150)) { - t_rfc_clk++; + t_rfc_clk++; } switch (t_rfc_clk) { case 0: @@ -1344,29 +1344,29 @@ case 4: case 5: case 6: - tr0 |= SDRAM_TR0_SDRA_6_CLK; - break; + tr0 |= SDRAM_TR0_SDRA_6_CLK; + break; case 7: - tr0 |= SDRAM_TR0_SDRA_7_CLK; - break; + tr0 |= SDRAM_TR0_SDRA_7_CLK; + break; case 8: - tr0 |= SDRAM_TR0_SDRA_8_CLK; - break; + tr0 |= SDRAM_TR0_SDRA_8_CLK; + break; case 9: - tr0 |= SDRAM_TR0_SDRA_9_CLK; - break; + tr0 |= SDRAM_TR0_SDRA_9_CLK; + break; case 10: - tr0 |= SDRAM_TR0_SDRA_10_CLK; - break; + tr0 |= SDRAM_TR0_SDRA_10_CLK; + break; case 11: - tr0 |= SDRAM_TR0_SDRA_11_CLK; - break; + tr0 |= SDRAM_TR0_SDRA_11_CLK; + break; case 12: - tr0 |= SDRAM_TR0_SDRA_12_CLK; - break; + tr0 |= SDRAM_TR0_SDRA_12_CLK; + break; default: - tr0 |= SDRAM_TR0_SDRA_13_CLK; - break; + tr0 |= SDRAM_TR0_SDRA_13_CLK; + break; } /* @@ -1375,20 +1375,20 @@ t_rcd_clk = sys_info.freqPLB * t_rcd_ns / ONE_BILLION; plb_check = ONE_BILLION * t_rcd_clk / t_rcd_ns; if (sys_info.freqPLB != plb_check) { - t_rcd_clk++; + t_rcd_clk++; } switch (t_rcd_clk) { case 0: case 1: case 2: - tr0 |= SDRAM_TR0_SDRD_2_CLK; - break; + tr0 |= SDRAM_TR0_SDRD_2_CLK; + break; case 3: - tr0 |= SDRAM_TR0_SDRD_3_CLK; - break; + tr0 |= SDRAM_TR0_SDRD_3_CLK; + break; default: - tr0 |= SDRAM_TR0_SDRD_4_CLK; - break; + tr0 |= SDRAM_TR0_SDRD_4_CLK; + break; } #if 0 @@ -1432,19 +1432,19 @@ */ mfsdram(mem_tr1, tr1); tr1 &= ~(SDRAM_TR1_RDSS_MASK | SDRAM_TR1_RDSL_MASK | - SDRAM_TR1_RDCD_MASK | SDRAM_TR1_RDCT_MASK); + SDRAM_TR1_RDCD_MASK | SDRAM_TR1_RDCT_MASK); mfsdram(mem_tr0, tr0); if (((tr0 & SDRAM_TR0_SDCL_MASK) == SDRAM_TR0_SDCL_2_5_CLK) && (sys_info.freqPLB > 100000000)) { - tr1 |= SDRAM_TR1_RDSS_TR2; - tr1 |= SDRAM_TR1_RDSL_STAGE3; - tr1 |= SDRAM_TR1_RDCD_RCD_1_2; + tr1 |= SDRAM_TR1_RDSS_TR2; + tr1 |= SDRAM_TR1_RDSL_STAGE3; + tr1 |= SDRAM_TR1_RDCD_RCD_1_2; } else { - tr1 |= SDRAM_TR1_RDSS_TR1; - tr1 |= SDRAM_TR1_RDSL_STAGE2; - tr1 |= SDRAM_TR1_RDCD_RCD_0_0; + tr1 |= SDRAM_TR1_RDSS_TR1; + tr1 |= SDRAM_TR1_RDSL_STAGE2; + tr1 |= SDRAM_TR1_RDCD_RCD_0_0; } /* @@ -1474,91 +1474,91 @@ printf("Starting memory test "); #endif for (k = 0; k < NUMHALFCYCLES; k++) { - for (rdclt = 0; rdclt < dly_val; rdclt++) { - /* - * Set the timing reg for the test. - */ - mtsdram(mem_tr1, (tr1 | SDRAM_TR1_RDCT_ENCODE(rdclt))); + for (rdclt = 0; rdclt < dly_val; rdclt++) { + /* + * Set the timing reg for the test. + */ + mtsdram(mem_tr1, (tr1 | SDRAM_TR1_RDCT_ENCODE(rdclt))); - for (bxcr_num = 0; bxcr_num < MAXBXCR; bxcr_num++) { - mtdcr(memcfga, mem_b0cr + (bxcr_num<<2)); - if ((mfdcr(memcfgd) & SDRAM_BXCR_SDBE) == SDRAM_BXCR_SDBE) { - /* Bank is enabled */ - membase = (unsigned long*) - (mfdcr(memcfgd) & SDRAM_BXCR_SDBA_MASK); + for (bxcr_num = 0; bxcr_num < MAXBXCR; bxcr_num++) { + mtdcr(memcfga, mem_b0cr + (bxcr_num<<2)); + if ((mfdcr(memcfgd) & SDRAM_BXCR_SDBE) == SDRAM_BXCR_SDBE) { + /* Bank is enabled */ + membase = (unsigned long*) + (mfdcr(memcfgd) & SDRAM_BXCR_SDBA_MASK); - /* - * Run the short memory test - */ - for (i = 0; i < NUMMEMTESTS; i++) { - for (j = 0; j < NUMMEMWORDS; j++) { - membase[j] = test[i][j]; - ppcDcbf((unsigned long)&(membase[j])); - } + /* + * Run the short memory test + */ + for (i = 0; i < NUMMEMTESTS; i++) { + for (j = 0; j < NUMMEMWORDS; j++) { + membase[j] = test[i][j]; + ppcDcbf((unsigned long)&(membase[j])); + } - for (j = 0; j < NUMMEMWORDS; j++) { - if (membase[j] != test[i][j]) { - ppcDcbf((unsigned long)&(membase[j])); - break; - } - ppcDcbf((unsigned long)&(membase[j])); - } + for (j = 0; j < NUMMEMWORDS; j++) { + if (membase[j] != test[i][j]) { + ppcDcbf((unsigned long)&(membase[j])); + break; + } + ppcDcbf((unsigned long)&(membase[j])); + } - if (j < NUMMEMWORDS) { - break; - } - } + if (j < NUMMEMWORDS) { + break; + } + } - /* - * see if the rdclt value passed - */ - if (i < NUMMEMTESTS) { - break; - } - } - } + /* + * see if the rdclt value passed + */ + if (i < NUMMEMTESTS) { + break; + } + } + } - if (bxcr_num == MAXBXCR) { - if (fail_found == TRUE) { - pass_found = TRUE; - if (current_pass_length == 0) { - current_start = rdclt_offset + rdclt; - } + if (bxcr_num == MAXBXCR) { + if (fail_found == TRUE) { + pass_found = TRUE; + if (current_pass_length == 0) { + current_start = rdclt_offset + rdclt; + } - current_fail_length = 0; - current_pass_length++; + current_fail_length = 0; + current_pass_length++; - if (current_pass_length > max_pass_length) { - max_pass_length = current_pass_length; - max_start = current_start; - max_end = rdclt_offset + rdclt; - } - } - } - else { - current_pass_length = 0; - current_fail_length++; + if (current_pass_length > max_pass_length) { + max_pass_length = current_pass_length; + max_start = current_start; + max_end = rdclt_offset + rdclt; + } + } + } + else { + current_pass_length = 0; + current_fail_length++; - if (current_fail_length >= (dly_val>>2)) { - if (fail_found == FALSE) { - fail_found = TRUE; - } - else if (pass_found == TRUE) { - window_found = TRUE; - break; - } - } - } - } + if (current_fail_length >= (dly_val>>2)) { + if (fail_found == FALSE) { + fail_found = TRUE; + } + else if (pass_found == TRUE) { + window_found = TRUE; + break; + } + } + } + } #ifdef DEBUG - printf("."); + printf("."); #endif - if (window_found == TRUE) { - break; - } + if (window_found == TRUE) { + break; + } - tr1 = tr1 ^ SDRAM_TR1_RDCD_MASK; - rdclt_offset += dly_val; + tr1 = tr1 ^ SDRAM_TR1_RDCD_MASK; + rdclt_offset += dly_val; } #ifdef DEBUG printf("\n"); @@ -1582,10 +1582,10 @@ */ tr1 &= ~SDRAM_TR1_RDCD_MASK; if ((tr0 & SDRAM_TR0_SDCL_MASK) == SDRAM_TR0_SDCL_2_5_CLK) { - tr1 |= SDRAM_TR1_RDCD_RCD_1_2; + tr1 |= SDRAM_TR1_RDCD_RCD_1_2; } else { - tr1 |= SDRAM_TR1_RDCD_RCD_0_0; + tr1 |= SDRAM_TR1_RDCD_RCD_0_0; } /* @@ -1593,21 +1593,21 @@ */ tr1 &= ~SDRAM_TR1_RDCT_MASK; while (max_end >= (dly_val<<1)) { - max_end -= (dly_val<<1); - max_start -= (dly_val<<1); + max_end -= (dly_val<<1); + max_start -= (dly_val<<1); } rdclt_average = ((max_start + max_end) >> 1); if (rdclt_average >= 0x60) - while(1); + while(1); if (rdclt_average < 0) { - rdclt_average = 0; + rdclt_average = 0; } if (rdclt_average >= dly_val) { - rdclt_average -= dly_val; - tr1 = tr1 ^ SDRAM_TR1_RDCD_MASK; + rdclt_average -= dly_val; + tr1 = tr1 ^ SDRAM_TR1_RDCD_MASK; } tr1 |= SDRAM_TR1_RDCT_ENCODE(rdclt_average); @@ -1621,8 +1621,8 @@ } unsigned long program_bxcr(unsigned long* dimm_populated, - unsigned char* iic0_dimm_addr, - unsigned long num_dimm_banks) + unsigned char* iic0_dimm_addr, + unsigned long num_dimm_banks) { unsigned long dimm_num; unsigned long bxcr_num; @@ -1641,8 +1641,8 @@ * Set the BxCR regs. First, wipe out the bank config registers. */ for (bxcr_num = 0; bxcr_num < MAXBXCR; bxcr_num++) { - mtdcr(memcfga, mem_b0cr + (bxcr_num << 2)); - mtdcr(memcfgd, 0x00000000); + mtdcr(memcfga, mem_b0cr + (bxcr_num << 2)); + mtdcr(memcfgd, 0x00000000); } /* @@ -1651,106 +1651,106 @@ bank_base_addr = CFG_SDRAM_BASE; for (dimm_num = 0; dimm_num < num_dimm_banks; dimm_num++) { - if (dimm_populated[dimm_num] == TRUE) { - num_row_addr = spd_read(iic0_dimm_addr[dimm_num], 3); - num_col_addr = spd_read(iic0_dimm_addr[dimm_num], 4); - num_banks = spd_read(iic0_dimm_addr[dimm_num], 5); - bank_size_id = spd_read(iic0_dimm_addr[dimm_num], 31); + if (dimm_populated[dimm_num] == TRUE) { + num_row_addr = spd_read(iic0_dimm_addr[dimm_num], 3); + num_col_addr = spd_read(iic0_dimm_addr[dimm_num], 4); + num_banks = spd_read(iic0_dimm_addr[dimm_num], 5); + bank_size_id = spd_read(iic0_dimm_addr[dimm_num], 31); - /* - * Set the SDRAM0_BxCR regs - */ - cr = 0; - bank_size_bytes = 4 * 1024 * 1024 * bank_size_id; - switch (bank_size_id) { - case 0x02: - cr |= SDRAM_BXCR_SDSZ_8; - break; - case 0x04: - cr |= SDRAM_BXCR_SDSZ_16; - break; - case 0x08: - cr |= SDRAM_BXCR_SDSZ_32; - break; - case 0x10: - cr |= SDRAM_BXCR_SDSZ_64; - break; - case 0x20: - cr |= SDRAM_BXCR_SDSZ_128; - break; - case 0x40: - cr |= SDRAM_BXCR_SDSZ_256; - break; - case 0x80: - cr |= SDRAM_BXCR_SDSZ_512; - break; - default: - printf("DDR-SDRAM: DIMM %lu BxCR configuration.\n", - dimm_num); - printf("ERROR: Unsupported value for the banksize: %d.\n", - bank_size_id); - printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); - } + /* + * Set the SDRAM0_BxCR regs + */ + cr = 0; + bank_size_bytes = 4 * 1024 * 1024 * bank_size_id; + switch (bank_size_id) { + case 0x02: + cr |= SDRAM_BXCR_SDSZ_8; + break; + case 0x04: + cr |= SDRAM_BXCR_SDSZ_16; + break; + case 0x08: + cr |= SDRAM_BXCR_SDSZ_32; + break; + case 0x10: + cr |= SDRAM_BXCR_SDSZ_64; + break; + case 0x20: + cr |= SDRAM_BXCR_SDSZ_128; + break; + case 0x40: + cr |= SDRAM_BXCR_SDSZ_256; + break; + case 0x80: + cr |= SDRAM_BXCR_SDSZ_512; + break; + default: + printf("DDR-SDRAM: DIMM %lu BxCR configuration.\n", + dimm_num); + printf("ERROR: Unsupported value for the banksize: %d.\n", + bank_size_id); + printf("Replace the DIMM module with a supported DIMM.\n\n"); + hang(); + } - switch (num_col_addr) { - case 0x08: - cr |= SDRAM_BXCR_SDAM_1; - break; - case 0x09: - cr |= SDRAM_BXCR_SDAM_2; - break; - case 0x0A: - cr |= SDRAM_BXCR_SDAM_3; - break; - case 0x0B: - cr |= SDRAM_BXCR_SDAM_4; - break; - default: - printf("DDR-SDRAM: DIMM %lu BxCR configuration.\n", - dimm_num); - printf("ERROR: Unsupported value for number of " - "column addresses: %d.\n", num_col_addr); - printf("Replace the DIMM module with a supported DIMM.\n\n"); - hang(); - } + switch (num_col_addr) { + case 0x08: + cr |= SDRAM_BXCR_SDAM_1; + break; + case 0x09: + cr |= SDRAM_BXCR_SDAM_2; + break; + case 0x0A: + cr |= SDRAM_BXCR_SDAM_3; + break; + case 0x0B: + cr |= SDRAM_BXCR_SDAM_4; + break; + default: + printf("DDR-SDRAM: DIMM %lu BxCR configuration.\n", + dimm_num); + printf("ERROR: Unsupported value for number of " + "column addresses: %d.\n", num_col_addr); + printf("Replace the DIMM module with a supported DIMM.\n\n"); + hang(); + } - /* - * enable the bank - */ - cr |= SDRAM_BXCR_SDBE; + /* + * enable the bank + */ + cr |= SDRAM_BXCR_SDBE; - /*------------------------------------------------------------------ - | This next section is hardware dependent and must be programmed - | to match the hardware. - +-----------------------------------------------------------------*/ - if (dimm_num == 0) { - for (i = 0; i < num_banks; i++) { - mtdcr(memcfga, mem_b0cr + (i << 2)); - temp = mfdcr(memcfgd) & ~(SDRAM_BXCR_SDBA_MASK | - SDRAM_BXCR_SDSZ_MASK | - SDRAM_BXCR_SDAM_MASK | - SDRAM_BXCR_SDBE); - cr |= temp; - cr |= bank_base_addr & SDRAM_BXCR_SDBA_MASK; - mtdcr(memcfgd, cr); - bank_base_addr += bank_size_bytes; - } - } - else { - for (i = 0; i < num_banks; i++) { - mtdcr(memcfga, mem_b2cr + (i << 2)); - temp = mfdcr(memcfgd) & ~(SDRAM_BXCR_SDBA_MASK | - SDRAM_BXCR_SDSZ_MASK | - SDRAM_BXCR_SDAM_MASK | - SDRAM_BXCR_SDBE); - cr |= temp; - cr |= bank_base_addr & SDRAM_BXCR_SDBA_MASK; - mtdcr(memcfgd, cr); - bank_base_addr += bank_size_bytes; - } - } - } + /*------------------------------------------------------------------ + | This next section is hardware dependent and must be programmed + | to match the hardware. + +-----------------------------------------------------------------*/ + if (dimm_num == 0) { + for (i = 0; i < num_banks; i++) { + mtdcr(memcfga, mem_b0cr + (i << 2)); + temp = mfdcr(memcfgd) & ~(SDRAM_BXCR_SDBA_MASK | + SDRAM_BXCR_SDSZ_MASK | + SDRAM_BXCR_SDAM_MASK | + SDRAM_BXCR_SDBE); + cr |= temp; + cr |= bank_base_addr & SDRAM_BXCR_SDBA_MASK; + mtdcr(memcfgd, cr); + bank_base_addr += bank_size_bytes; + } + } + else { + for (i = 0; i < num_banks; i++) { + mtdcr(memcfga, mem_b2cr + (i << 2)); + temp = mfdcr(memcfgd) & ~(SDRAM_BXCR_SDBA_MASK | + SDRAM_BXCR_SDSZ_MASK | + SDRAM_BXCR_SDAM_MASK | + SDRAM_BXCR_SDBE); + cr |= temp; + cr |= bank_base_addr & SDRAM_BXCR_SDBA_MASK; + mtdcr(memcfgd, cr); + bank_base_addr += bank_size_bytes; + } + } + } } return(bank_base_addr); @@ -1775,26 +1775,26 @@ bank_base_addr = CFG_SDRAM_BASE; if ((cfg0 & SDRAM_CFG0_MCHK_MASK) != SDRAM_CFG0_MCHK_NON) { - mtsdram(mem_cfg0, (cfg0 & ~SDRAM_CFG0_MCHK_MASK) | - SDRAM_CFG0_MCHK_GEN); + mtsdram(mem_cfg0, (cfg0 & ~SDRAM_CFG0_MCHK_MASK) | + SDRAM_CFG0_MCHK_GEN); - if ((cfg0 & SDRAM_CFG0_DMWD_MASK) == SDRAM_CFG0_DMWD_32) { - address_increment = 4; - } - else { - address_increment = 8; - } + if ((cfg0 & SDRAM_CFG0_DMWD_MASK) == SDRAM_CFG0_DMWD_32) { + address_increment = 4; + } + else { + address_increment = 8; + } - current_address = (unsigned long)(bank_base_addr); - end_address = (unsigned long)(bank_base_addr) + num_bytes; + current_address = (unsigned long)(bank_base_addr); + end_address = (unsigned long)(bank_base_addr) + num_bytes; - while (current_address < end_address) { - *((unsigned long*)current_address) = 0x00000000; - current_address += address_increment; - } + while (current_address < end_address) { + *((unsigned long*)current_address) = 0x00000000; + current_address += address_increment; + } - mtsdram(mem_cfg0, (cfg0 & ~SDRAM_CFG0_MCHK_MASK) | - SDRAM_CFG0_MCHK_CHK); + mtsdram(mem_cfg0, (cfg0 & ~SDRAM_CFG0_MCHK_MASK) | + SDRAM_CFG0_MCHK_CHK); } } diff --git a/cpu/ppc4xx/speed.c b/cpu/ppc4xx/speed.c index fdefbb6..7263227 100644 --- a/cpu/ppc4xx/speed.c +++ b/cpu/ppc4xx/speed.c @@ -232,7 +232,7 @@ sysInfo->freqProcessor = sysInfo->freqVCOMhz/sysInfo->pllFwdDivA; sysInfo->freqPLB = sysInfo->freqVCOMhz/sysInfo->pllFwdDivB; if( get_pvr() == PVR_440GP_RB ) /* Rev B divs an extra 2 -- geez! */ - sysInfo->freqPLB >>= 1; + sysInfo->freqPLB >>= 1; sysInfo->freqOPB = sysInfo->freqPLB/sysInfo->pllOpbDiv; sysInfo->freqEPB = sysInfo->freqOPB/sysInfo->pllExtBusDiv; diff --git a/cpu/ppc4xx/start.S b/cpu/ppc4xx/start.S index c6a9eda..aa857d0 100644 --- a/cpu/ppc4xx/start.S +++ b/cpu/ppc4xx/start.S @@ -556,9 +556,9 @@ /*----------------------------------------------------------------------- */ /* DMA Status, clear to come up clean */ /*----------------------------------------------------------------------- */ - addis r3,r0, 0xFFFF /* Clear all existing DMA status */ - ori r3,r3, 0xFFFF - mtdcr dmasr, r3 + addis r3,r0, 0xFFFF /* Clear all existing DMA status */ + ori r3,r3, 0xFFFF + mtdcr dmasr, r3 bl ppc405ep_init /* do ppc405ep specific init */ #endif /* CONFIG_405EP */ @@ -568,21 +568,21 @@ * Setup OCM - On Chip Memory *******************************************************************/ /* Setup OCM */ - lis r0, 0x7FFF - ori r0, r0, 0xFFFF - mfdcr r3, ocmiscntl /* get instr-side IRAM config */ - mfdcr r4, ocmdscntl /* get data-side IRAM config */ - and r3, r3, r0 /* disable data-side IRAM */ - and r4, r4, r0 /* disable data-side IRAM */ - mtdcr ocmiscntl, r3 /* set instr-side IRAM config */ - mtdcr ocmdscntl, r4 /* set data-side IRAM config */ - isync + lis r0, 0x7FFF + ori r0, r0, 0xFFFF + mfdcr r3, ocmiscntl /* get instr-side IRAM config */ + mfdcr r4, ocmdscntl /* get data-side IRAM config */ + and r3, r3, r0 /* disable data-side IRAM */ + and r4, r4, r0 /* disable data-side IRAM */ + mtdcr ocmiscntl, r3 /* set instr-side IRAM config */ + mtdcr ocmdscntl, r4 /* set data-side IRAM config */ + isync addis r3, 0, CFG_OCM_DATA_ADDR@h /* OCM location */ mtdcr ocmdsarc, r3 addis r4, 0, 0xC000 /* OCM data area enabled */ mtdcr ocmdscntl, r4 - isync + isync #endif /*----------------------------------------------------------------------- */ @@ -697,7 +697,7 @@ GET_GOT /* initialize GOT access */ - bl cpu_init_f /* run low-level CPU init code (from Flash) */ + bl cpu_init_f /* run low-level CPU init code (from Flash) */ /* NEVER RETURNS! */ bl board_init_f /* run first part of init code (from Flash) */ @@ -1451,100 +1451,100 @@ /**************************************************************************/ #ifdef CONFIG_405EP ppc405ep_init: - /* - !----------------------------------------------------------------------- - ! Check FPGA for PCI internal/external arbitration - ! If board is set to internal arbitration, update cpc0_pci - !----------------------------------------------------------------------- + /* + !----------------------------------------------------------------------- + ! Check FPGA for PCI internal/external arbitration + ! If board is set to internal arbitration, update cpc0_pci + !----------------------------------------------------------------------- */ - addi r3,0,CPC0_PCI_HOST_CFG_EN + addi r3,0,CPC0_PCI_HOST_CFG_EN #ifdef CONFIG_BUBINGA405EP - addis r5,r0,FPGA_REG1@h /* set offset for FPGA_REG1 */ - ori r5,r5,FPGA_REG1@l - lbz r5,0x0(r5) /* read to get PCI arb selection */ - andi. r6,r5,FPGA_REG1_PCI_INT_ARB /* using internal arbiter ?*/ - beq ..pci_cfg_set /* if not set, then bypass reg write*/ + addis r5,r0,FPGA_REG1@h /* set offset for FPGA_REG1 */ + ori r5,r5,FPGA_REG1@l + lbz r5,0x0(r5) /* read to get PCI arb selection */ + andi. r6,r5,FPGA_REG1_PCI_INT_ARB /* using internal arbiter ?*/ + beq ..pci_cfg_set /* if not set, then bypass reg write*/ #endif - ori r3,r3,CPC0_PCI_ARBIT_EN + ori r3,r3,CPC0_PCI_ARBIT_EN ..pci_cfg_set: - mtdcr CPC0_PCI, r3 /* Enable internal arbiter*/ + mtdcr CPC0_PCI, r3 /* Enable internal arbiter*/ - /* - !----------------------------------------------------------------------- - ! Check to see if chip is in bypass mode. - ! If so, write stored CPC0_PLLMR0 and CPC0_PLLMR1 values and perform a - ! CPU reset Otherwise, skip this step and keep going. - ! Note: Running BIOS in bypass mode is not supported since PLB speed - ! will not be fast enough for the SDRAM (min 66MHz) - !----------------------------------------------------------------------- + /* + !----------------------------------------------------------------------- + ! Check to see if chip is in bypass mode. + ! If so, write stored CPC0_PLLMR0 and CPC0_PLLMR1 values and perform a + ! CPU reset Otherwise, skip this step and keep going. + ! Note: Running BIOS in bypass mode is not supported since PLB speed + ! will not be fast enough for the SDRAM (min 66MHz) + !----------------------------------------------------------------------- */ - mfdcr r5, CPC0_PLLMR1 - rlwinm r4,r5,1,0x1 /* get system clock source (SSCS) */ - cmpi cr0,0,r4,0x1 + mfdcr r5, CPC0_PLLMR1 + rlwinm r4,r5,1,0x1 /* get system clock source (SSCS) */ + cmpi cr0,0,r4,0x1 - beq pll_done /* if SSCS =b'1' then PLL has */ - /* already been set */ - /* and CPU has been reset */ - /* so skip to next section */ + beq pll_done /* if SSCS =b'1' then PLL has */ + /* already been set */ + /* and CPU has been reset */ + /* so skip to next section */ #ifdef CONFIG_BUBINGA405EP /* - !----------------------------------------------------------------------- - ! Read NVRAM to get value to write in PLLMR. - ! If value has not been correctly saved, write default value - ! Default config values (assuming on-board 33MHz SYS_CLK) are above. - ! See CPU_DEFAULT_200 and CPU_DEFAULT_266 above. - ! - ! WARNING: This code assumes the first three words in the nvram_t - ! structure in openbios.h. Changing the beginning of - ! the structure will break this code. - ! - !----------------------------------------------------------------------- + !----------------------------------------------------------------------- + ! Read NVRAM to get value to write in PLLMR. + ! If value has not been correctly saved, write default value + ! Default config values (assuming on-board 33MHz SYS_CLK) are above. + ! See CPU_DEFAULT_200 and CPU_DEFAULT_266 above. + ! + ! WARNING: This code assumes the first three words in the nvram_t + ! structure in openbios.h. Changing the beginning of + ! the structure will break this code. + ! + !----------------------------------------------------------------------- */ - addis r3,0,NVRAM_BASE@h - addi r3,r3,NVRAM_BASE@l + addis r3,0,NVRAM_BASE@h + addi r3,r3,NVRAM_BASE@l - lwz r4, 0(r3) - addis r5,0,NVRVFY1@h - addi r5,r5,NVRVFY1@l - cmp cr0,0,r4,r5 /* Compare 1st NVRAM Magic number*/ - bne ..no_pllset - addi r3,r3,4 - lwz r4, 0(r3) - addis r5,0,NVRVFY2@h - addi r5,r5,NVRVFY2@l - cmp cr0,0,r4,r5 /* Compare 2 NVRAM Magic number */ - bne ..no_pllset - addi r3,r3,8 /* Skip over conf_size */ - lwz r4, 4(r3) /* Load PLLMR1 value from NVRAM */ - lwz r3, 0(r3) /* Load PLLMR0 value from NVRAM */ - rlwinm r5,r4,1,0x1 /* get system clock source (SSCS) */ - cmpi cr0,0,r5,1 /* See if PLL is locked */ - beq pll_write + lwz r4, 0(r3) + addis r5,0,NVRVFY1@h + addi r5,r5,NVRVFY1@l + cmp cr0,0,r4,r5 /* Compare 1st NVRAM Magic number*/ + bne ..no_pllset + addi r3,r3,4 + lwz r4, 0(r3) + addis r5,0,NVRVFY2@h + addi r5,r5,NVRVFY2@l + cmp cr0,0,r4,r5 /* Compare 2 NVRAM Magic number */ + bne ..no_pllset + addi r3,r3,8 /* Skip over conf_size */ + lwz r4, 4(r3) /* Load PLLMR1 value from NVRAM */ + lwz r3, 0(r3) /* Load PLLMR0 value from NVRAM */ + rlwinm r5,r4,1,0x1 /* get system clock source (SSCS) */ + cmpi cr0,0,r5,1 /* See if PLL is locked */ + beq pll_write ..no_pllset: #endif /* CONFIG_BUBINGA405EP */ - addis r3,0,PLLMR0_DEFAULT@h /* PLLMR0 default value */ - ori r3,r3,PLLMR0_DEFAULT@l /* */ - addis r4,0,PLLMR1_DEFAULT@h /* PLLMR1 default value */ - ori r4,r4,PLLMR1_DEFAULT@l /* */ + addis r3,0,PLLMR0_DEFAULT@h /* PLLMR0 default value */ + ori r3,r3,PLLMR0_DEFAULT@l /* */ + addis r4,0,PLLMR1_DEFAULT@h /* PLLMR1 default value */ + ori r4,r4,PLLMR1_DEFAULT@l /* */ - b pll_write /* Write the CPC0_PLLMR with new value */ + b pll_write /* Write the CPC0_PLLMR with new value */ pll_done: - /* - !----------------------------------------------------------------------- - ! Clear Soft Reset Register - ! This is needed to enable PCI if not booting from serial EPROM - !----------------------------------------------------------------------- + /* + !----------------------------------------------------------------------- + ! Clear Soft Reset Register + ! This is needed to enable PCI if not booting from serial EPROM + !----------------------------------------------------------------------- */ - addi r3, 0, 0x0 - mtdcr CPC0_SRR, r3 + addi r3, 0, 0x0 + mtdcr CPC0_SRR, r3 - addis r3,0,0x0010 - mtctr r3 + addis r3,0,0x0010 + mtctr r3 pci_wait: - bdnz pci_wait + bdnz pci_wait blr /* return to main code */ @@ -1565,43 +1565,43 @@ !----------------------------------------------------------------------------- */ pll_write: - mfdcr r5, CPC0_UCR - andis. r5,r5,0xFFFF - ori r5,r5,0x0101 /* Stop the UART clocks */ - mtdcr CPC0_UCR,r5 /* Before changing PLL */ + mfdcr r5, CPC0_UCR + andis. r5,r5,0xFFFF + ori r5,r5,0x0101 /* Stop the UART clocks */ + mtdcr CPC0_UCR,r5 /* Before changing PLL */ - mfdcr r5, CPC0_PLLMR1 - rlwinm r5,r5,0,0x7FFFFFFF /* Disable PLL */ - mtdcr CPC0_PLLMR1,r5 - oris r5,r5,0x4000 /* Set PLL Reset */ - mtdcr CPC0_PLLMR1,r5 + mfdcr r5, CPC0_PLLMR1 + rlwinm r5,r5,0,0x7FFFFFFF /* Disable PLL */ + mtdcr CPC0_PLLMR1,r5 + oris r5,r5,0x4000 /* Set PLL Reset */ + mtdcr CPC0_PLLMR1,r5 - mtdcr CPC0_PLLMR0,r3 /* Set clock dividers */ - rlwinm r5,r4,0,0x3FFFFFFF /* Reset & Bypass new PLL dividers */ - oris r5,r5,0x4000 /* Set PLL Reset */ - mtdcr CPC0_PLLMR1,r5 /* Set clock dividers */ - rlwinm r5,r5,0,0xBFFFFFFF /* Clear PLL Reset */ - mtdcr CPC0_PLLMR1,r5 + mtdcr CPC0_PLLMR0,r3 /* Set clock dividers */ + rlwinm r5,r4,0,0x3FFFFFFF /* Reset & Bypass new PLL dividers */ + oris r5,r5,0x4000 /* Set PLL Reset */ + mtdcr CPC0_PLLMR1,r5 /* Set clock dividers */ + rlwinm r5,r5,0,0xBFFFFFFF /* Clear PLL Reset */ + mtdcr CPC0_PLLMR1,r5 /* - ! Wait min of 100us for PLL to lock. - ! See CMOS 27E databook for more info. - ! At 200MHz, that means waiting 20,000 instructions + ! Wait min of 100us for PLL to lock. + ! See CMOS 27E databook for more info. + ! At 200MHz, that means waiting 20,000 instructions */ - addi r3,0,20000 /* 2000 = 0x4e20 */ - mtctr r3 + addi r3,0,20000 /* 2000 = 0x4e20 */ + mtctr r3 pll_wait: - bdnz pll_wait + bdnz pll_wait - oris r5,r5,0x8000 /* Enable PLL */ - mtdcr CPC0_PLLMR1,r5 /* Engage */ + oris r5,r5,0x8000 /* Enable PLL */ + mtdcr CPC0_PLLMR1,r5 /* Engage */ - /* - * Reset CPU to guarantee timings are OK - * Not sure if this is needed... - */ - addis r3,0,0x1000 - mtspr dbcr0,r3 /* This will cause a CPU core reset, and */ - /* execution will continue from the poweron */ - /* vector of 0xfffffffc */ + /* + * Reset CPU to guarantee timings are OK + * Not sure if this is needed... + */ + addis r3,0,0x1000 + mtspr dbcr0,r3 /* This will cause a CPU core reset, and */ + /* execution will continue from the poweron */ + /* vector of 0xfffffffc */ #endif /* CONFIG_405EP */ diff --git a/cpu/ppc4xx/traps.c b/cpu/ppc4xx/traps.c index 85f2ea4..1cf899e 100644 --- a/cpu/ppc4xx/traps.c +++ b/cpu/ppc4xx/traps.c @@ -203,7 +203,7 @@ void ProgramCheckException(struct pt_regs *regs) { - long esr_val; + long esr_val; #if (CONFIG_COMMANDS & CFG_CMD_KGDB) if (debugger_exception_handler && (*debugger_exception_handler)(regs)) @@ -212,12 +212,12 @@ show_regs(regs); - esr_val = get_esr(); - if( esr_val & ESR_PIL ) + esr_val = get_esr(); + if( esr_val & ESR_PIL ) printf( "** Illegal Instruction **\n" ); - else if( esr_val & ESR_PPR ) + else if( esr_val & ESR_PPR ) printf( "** Privileged Instruction **\n" ); - else if( esr_val & ESR_PTR ) + else if( esr_val & ESR_PTR ) printf( "** Trap Instruction **\n" ); print_backtrace((unsigned long *)regs->gpr[1]); @@ -227,15 +227,15 @@ void PITException(struct pt_regs *regs) { - /* - * Reset PIT interrupt - */ - set_tsr(0x08000000); + /* + * Reset PIT interrupt + */ + set_tsr(0x08000000); - /* - * Call timer_interrupt routine in interrupts.c - */ - timer_interrupt(NULL); + /* + * Call timer_interrupt routine in interrupts.c + */ + timer_interrupt(NULL); } diff --git a/cpu/pxa/i2c.c b/cpu/pxa/i2c.c index 406f825..cc2c49c 100644 --- a/cpu/pxa/i2c.c +++ b/cpu/pxa/i2c.c @@ -36,16 +36,16 @@ #ifdef CONFIG_HARD_I2C -/* - * - CFG_I2C_SPEED - * - I2C_PXA_SLAVE_ADDR +/* + * - CFG_I2C_SPEED + * - I2C_PXA_SLAVE_ADDR */ #include #include #include -//#define DEBUG_I2C 1 /* activate local debugging output */ +/*#define DEBUG_I2C 1 /###* activate local debugging output */ #define I2C_PXA_SLAVE_ADDR 0x1 /* slave pxa unit address */ #define I2C_ICR_INIT (ICR_BEIE | ICR_IRFIE | ICR_ITEIE | ICR_GCD | ICR_SCLE) #define I2C_ISR_INIT 0x7FF @@ -63,7 +63,7 @@ #define I2C_COND_STOP 2 /* Shall the current transfer be ack/nacked or being waited for it? */ -#define I2C_ACKNAK_WAITACK 1 +#define I2C_ACKNAK_WAITACK 1 #define I2C_ACKNAK_SENDACK 2 #define I2C_ACKNAK_SENDNAK 4 @@ -74,37 +74,37 @@ /* All transfers are described by this data structure */ struct i2c_msg { u8 condition; - u8 acknack; - u8 direction; + u8 acknack; + u8 direction; u8 data; }; /** - * i2c_pxa_reset: - reset the host controller + * i2c_pxa_reset: - reset the host controller * */ static void i2c_reset( void ) { ICR &= ~ICR_IUE; /* disable unit */ - ICR |= ICR_UR; /* reset the unit */ - udelay(100); - ICR &= ~ICR_IUE; /* disable unit */ - CKEN |= CKEN14_I2C; /* set the global I2C clock on */ - ISAR = I2C_PXA_SLAVE_ADDR; /* set our slave address */ - ICR = I2C_ICR_INIT; /* set control register values */ - ISR = I2C_ISR_INIT; /* set clear interrupt bits */ - ICR |= ICR_IUE; /* enable unit */ - udelay(100); + ICR |= ICR_UR; /* reset the unit */ + udelay(100); + ICR &= ~ICR_IUE; /* disable unit */ + CKEN |= CKEN14_I2C; /* set the global I2C clock on */ + ISAR = I2C_PXA_SLAVE_ADDR; /* set our slave address */ + ICR = I2C_ICR_INIT; /* set control register values */ + ISR = I2C_ISR_INIT; /* set clear interrupt bits */ + ICR |= ICR_IUE; /* enable unit */ + udelay(100); } /** - * i2c_isr_set_cleared: - wait until certain bits of the I2C status register + * i2c_isr_set_cleared: - wait until certain bits of the I2C status register * are set and cleared * - * @return: 0 in case of success, 1 means timeout (no match within 10 ms). + * @return: 0 in case of success, 1 means timeout (no match within 10 ms). */ static int i2c_isr_set_cleared( unsigned long set_mask, unsigned long cleared_mask ) @@ -116,15 +116,15 @@ if( timeout-- < 0 ) return 0; } - return 1; + return 1; } /** * i2c_transfer: - Transfer one byte over the i2c bus * - * This function can tranfer a byte over the i2c bus in both directions. - * It is used by the public API functions. + * This function can tranfer a byte over the i2c bus in both directions. + * It is used by the public API functions. * * @return: 0: transfer successful * -1: message is empty @@ -133,12 +133,12 @@ * -4: receive timeout * -5: illegal parameters * -6: bus is busy and couldn't be aquired - */ + */ int i2c_transfer(struct i2c_msg *msg) { int ret; - if (!msg) + if (!msg) goto transfer_error_msg_empty; switch(msg->direction) { @@ -154,14 +154,14 @@ ICR &= ~ICR_STOP; IDBR = msg->data; if (msg->condition == I2C_COND_START) ICR |= ICR_START; - if (msg->condition == I2C_COND_STOP) ICR |= ICR_STOP; + if (msg->condition == I2C_COND_STOP) ICR |= ICR_STOP; if (msg->acknack == I2C_ACKNAK_SENDNAK) ICR |= ICR_ACKNAK; if (msg->acknack == I2C_ACKNAK_SENDACK) ICR &= ~ICR_ACKNAK; ICR &= ~ICR_ALDIE; - ICR |= ICR_TB; + ICR |= ICR_TB; /* transmit register empty? */ - if (!i2c_isr_set_cleared(ISR_ITE,0)) + if (!i2c_isr_set_cleared(ISR_ITE,0)) goto transfer_error_transmit_timeout; /* clear 'transmit empty' state */ @@ -169,7 +169,7 @@ /* wait for ACK from slave */ if (msg->acknack == I2C_ACKNAK_WAITACK) - if (!i2c_isr_set_cleared(0,ISR_ACKNAK)) + if (!i2c_isr_set_cleared(0,ISR_ACKNAK)) goto transfer_error_ack_missing; break; @@ -190,8 +190,8 @@ ICR |= ICR_TB; /* receive register full? */ - if (!i2c_isr_set_cleared(ISR_IRF,0)) - goto transfer_error_receive_timeout; + if (!i2c_isr_set_cleared(ISR_IRF,0)) + goto transfer_error_receive_timeout; msg->data = IDBR; @@ -206,9 +206,9 @@ } - return 0; + return 0; -transfer_error_msg_empty: +transfer_error_msg_empty: PRINTD(("i2c_transfer: error: 'msg' is empty\n")); ret = -1; goto i2c_transfer_finish; @@ -245,7 +245,7 @@ void i2c_init(int speed, int slaveaddr) { -#ifdef CFG_I2C_INIT_BOARD +#ifdef CFG_I2C_INIT_BOARD /* call board specific i2c bus reset routine before accessing the */ /* environment, which might be in a chip on that bus. For details */ /* about this problem see doc/I2C_Edge_Conditions. */ @@ -257,7 +257,7 @@ /** * i2c_probe: - Test if a chip answers for a given i2c address * - * @chip: address of the chip which is searched for + * @chip: address of the chip which is searched for * @return: 0 if a chip was found, -1 otherwhise */ @@ -287,7 +287,7 @@ * i2c_read: - Read multiple bytes from an i2c device * * The higher level routines take into account that this function is only - * called with len < page length of the device (see configuration file) + * called with len < page length of the device (see configuration file) * * @chip: address of the chip which is to be read * @addr: i2c data address within the chip @@ -315,12 +315,12 @@ msg.data = (chip << 1); msg.data &= 0xFE; if ((ret=i2c_transfer(&msg))) return -1; - + /* - * send memory address bytes; - * alen defines how much bytes we have to send. + * send memory address bytes; + * alen defines how much bytes we have to send. */ - //addr &= ((1 << CFG_EEPROM_PAGE_WRITE_BITS)-1); + /*addr &= ((1 << CFG_EEPROM_PAGE_WRITE_BITS)-1); */ addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); addr_bytes[2] = (u8)((addr >> 16) & 0x000000FF); @@ -334,7 +334,7 @@ msg.data = addr_bytes[alen]; if ((ret=i2c_transfer(&msg))) return -1; } - + /* start read sequence */ PRINTD(("i2c_read: start read sequence\n")); @@ -348,7 +348,7 @@ /* read bytes; send NACK at last byte */ while (len--) { - if (len==0) { + if (len==0) { msg.condition = I2C_COND_STOP; msg.acknack = I2C_ACKNAK_SENDNAK; } else { @@ -376,12 +376,12 @@ * i2c_write: - Write multiple bytes to an i2c device * * The higher level routines take into account that this function is only - * called with len < page length of the device (see configuration file) + * called with len < page length of the device (see configuration file) * * @chip: address of the chip which is to be written * @addr: i2c data address within the chip * @alen: length of the i2c data address (1..2 bytes) - * @buffer: where to find the data to be written + * @buffer: where to find the data to be written * @len: how much byte do we want to read * @return: 0 in case of success */ @@ -403,10 +403,10 @@ msg.data = (chip << 1); msg.data &= 0xFE; if (i2c_transfer(&msg)) return -1; - + /* - * send memory address bytes; - * alen defines how much bytes we have to send. + * send memory address bytes; + * alen defines how much bytes we have to send. */ addr_bytes[0] = (u8)((addr >> 0) & 0x000000FF); addr_bytes[1] = (u8)((addr >> 8) & 0x000000FF); @@ -421,13 +421,13 @@ msg.data = addr_bytes[alen]; if (i2c_transfer(&msg)) return -1; } - + /* write bytes; send NACK at last byte */ while (len--) { PRINTD(("i2c_write: writing byte (0x%08x)=0x%02x\n",(unsigned int)buffer,*buffer)); - if (len==0) + if (len==0) msg.condition = I2C_COND_STOP; else msg.condition = I2C_COND_NORMAL; @@ -435,7 +435,7 @@ msg.acknack = I2C_ACKNAK_WAITACK; msg.direction = I2C_WRITE; msg.data = *(buffer++); - + if (i2c_transfer(&msg)) return -1; } diff --git a/cpu/pxa/interrupts.c b/cpu/pxa/interrupts.c index af7d634..cf529f4 100644 --- a/cpu/pxa/interrupts.c +++ b/cpu/pxa/interrupts.c @@ -59,7 +59,6 @@ #endif - void bad_mode (void) { panic ("Resetting CPU ...\n"); diff --git a/cpu/pxa/mmc.c b/cpu/pxa/mmc.c index 783e90c..9e6e1e3 100644 --- a/cpu/pxa/mmc.c +++ b/cpu/pxa/mmc.c @@ -32,7 +32,7 @@ extern int fat_register_read(int(*block_read)(int device, ulong blknr, ulong blkcnt, uchar *buffer)); -/* +/* * FIXME needs to read cid and csd info to determine block size * and other parameters */ @@ -41,7 +41,7 @@ static int mmc_ready = 0; -static uchar * +static uchar * /****************************************************/ mmc_cmd(ushort cmd, ushort argh, ushort argl, ushort cmdat) /****************************************************/ @@ -54,7 +54,7 @@ MMC_STRPCL = MMC_STRPCL_STOP_CLK; MMC_I_MASK = ~MMC_I_MASK_CLK_IS_OFF; while (!(MMC_I_REG & MMC_I_REG_CLK_IS_OFF)); - MMC_CMD = cmd; + MMC_CMD = cmd; MMC_ARGH = argh; MMC_ARGL = argl; MMC_CMDAT = cmdat; @@ -73,11 +73,11 @@ { case MMC_CMDAT_R1: case MMC_CMDAT_R3: - words = 3; + words = 3; break; case MMC_CMDAT_R2: - words = 8; + words = 8; break; default: @@ -130,10 +130,10 @@ MMC_RDTO = 0xffff; MMC_NOB = 1; MMC_BLKLEN = len; - resp = mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl, + resp = mmc_cmd(MMC_CMD_READ_BLOCK, argh, argl, MMC_CMDAT_R1|MMC_CMDAT_READ|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN); - + MMC_I_MASK = ~MMC_I_MASK_RXFIFO_RD_REQ; while (len) { @@ -188,9 +188,9 @@ MMC_STRPCL = MMC_STRPCL_STOP_CLK; MMC_NOB = 1; MMC_BLKLEN = len; - resp = mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl, + resp = mmc_cmd(MMC_CMD_WRITE_BLOCK, argh, argl, MMC_CMDAT_R1|MMC_CMDAT_WRITE|MMC_CMDAT_BLOCK|MMC_CMDAT_DATA_EN); - + MMC_I_MASK = ~MMC_I_MASK_TXFIFO_WR_REQ; while (len) { @@ -379,7 +379,7 @@ return 0; } -int +int /****************************************************/ mmc_bread(int dev_num, ulong blknr, ulong blkcnt, uchar *dst) /****************************************************/ @@ -408,7 +408,7 @@ mmc_csd.c_size = 0; MMC_CLKRT = MMC_CLKRT_0_3125MHZ; - MMC_RESTO = MMC_RES_TO_MAX; + MMC_RESTO = MMC_RES_TO_MAX; MMC_SPI = MMC_SPI_DISABLE; /* reset */ @@ -431,12 +431,12 @@ if (verbose) { printf("MMC found. Card desciption is:\n"); - printf("Manufacturer ID = %02x%02x%02x\n", + printf("Manufacturer ID = %02x%02x%02x\n", cid->id[0], cid->id[1], cid->id[2]); printf("HW/FW Revision = %x %x\n",cid->hwrev, cid->fwrev); cid->hwrev = cid->fwrev = 0; /* null terminate string */ printf("Product Name = %s\n",cid->name); - printf("Serial Number = %02x%02x%02x\n", + printf("Serial Number = %02x%02x%02x\n", cid->sn[0], cid->sn[1], cid->sn[2]); printf("Month = %d\n",cid->month); printf("Year = %d\n",1997 + cid->year); diff --git a/cpu/pxa/pxafb.c b/cpu/pxa/pxafb.c index f6a2575..ef60d4a 100644 --- a/cpu/pxa/pxafb.c +++ b/cpu/pxa/pxafb.c @@ -52,7 +52,7 @@ #undef CONFIG_LCD_LOGO -#define LCD_TEST_PATTERN +#define LCD_TEST_PATTERN /* #define LCD_TEST_PATTERN */ /* color backgnd for frame/color adjust */ /* #define CFG_INVERT_COLORS */ /* Not needed - adjust vl_dp instead */ /************************************************************************/ @@ -163,31 +163,31 @@ /* you have to set lccr0 and lccr3 (including pcd) */ #define REG_LCCR0 0x003008f8 -#define REG_LCCR3 0x0300FF01 +#define REG_LCCR3 0x0300FF01 /* 640x480x16 @ 61 Hz */ static vidinfo_t panel_info = { - vl_col: 640, + vl_col: 640, vl_row: 480, vl_width: 640, vl_height: 480, vl_clkp: CFG_HIGH, - vl_oep: CFG_HIGH, + vl_oep: CFG_HIGH, vl_hsp: CFG_HIGH, - vl_vsp: CFG_HIGH, - vl_dp: CFG_HIGH, - vl_bpix: LCD_BPP, - vl_lbw: 0, + vl_vsp: CFG_HIGH, + vl_dp: CFG_HIGH, + vl_bpix: LCD_BPP, + vl_lbw: 0, vl_splt: 0, - vl_clor: 0, + vl_clor: 0, vl_lcdac: 0, - vl_tft: 1, - vl_hpw: 40, - vl_blw: 56, - vl_elw: 56, - vl_vpw: 20, - vl_bfw: 8, - vl_efw: 8, + vl_tft: 1, + vl_hpw: 40, + vl_blw: 56, + vl_elw: 56, + vl_vpw: 20, + vl_bfw: 8, + vl_efw: 8, }; #endif /* CONFIG_PXA_VIDEO */ @@ -198,30 +198,30 @@ /* you have to set lccr0 and lccr3 (including pcd) */ #define REG_LCCR0 0x0030087C -#define REG_LCCR3 0x0340FF08 +#define REG_LCCR3 0x0340FF08 static vidinfo_t panel_info = { - vl_col: 640, + vl_col: 640, vl_row: 480, vl_width: 157, vl_height: 118, vl_clkp: CFG_HIGH, - vl_oep: CFG_HIGH, + vl_oep: CFG_HIGH, vl_hsp: CFG_HIGH, - vl_vsp: CFG_HIGH, - vl_dp: CFG_HIGH, - vl_bpix: LCD_BPP, - vl_lbw: 0, + vl_vsp: CFG_HIGH, + vl_dp: CFG_HIGH, + vl_bpix: LCD_BPP, + vl_lbw: 0, vl_splt: 1, - vl_clor: 1, + vl_clor: 1, vl_lcdac: 0, - vl_tft: 0, - vl_hpw: 1, - vl_blw: 3, - vl_elw: 3, - vl_vpw: 1, - vl_bfw: 0, - vl_efw: 0, + vl_tft: 0, + vl_hpw: 1, + vl_blw: 3, + vl_elw: 3, + vl_vpw: 1, + vl_bfw: 0, + vl_efw: 0, }; #endif /* CONFIG_SHARP_LM8V31 */ @@ -721,7 +721,7 @@ static void lcd_ctrl_init (void *lcdbase) { - pxafb_init_mem(lcdbase, &panel_info); + pxafb_init_mem(lcdbase, &panel_info); pxafb_init(&panel_info); pxafb_setup_gpio(&panel_info); pxafb_enable_controller(&panel_info); @@ -745,7 +745,7 @@ struct pxafb_info *fbi = &panel_info.pxa; unsigned short *palette = (unsigned short *)fbi->palette; u_int val; - + if (regno < fbi->palette_size) { val = ((red << 8) & 0xf800); val |= ((green << 4) & 0x07e0); @@ -1011,18 +1011,18 @@ LCCR1_HorSnchWdth(vid->vl_hpw) + LCCR1_BegLnDel(vid->vl_blw) + LCCR1_EndLnDel(vid->vl_elw); - + fbi->reg_lccr2 = LCCR2_DisHght(vid->vl_row) + LCCR2_VrtSnchWdth(vid->vl_vpw) + LCCR2_BegFrmDel(vid->vl_bfw) + LCCR2_EndFrmDel(vid->vl_efw); - fbi->reg_lccr3 = REG_LCCR3 & ~(LCCR3_HSP | LCCR3_VSP); - fbi->reg_lccr3 |= - (vid->vl_hsp ? LCCR3_HorSnchL : LCCR3_HorSnchH) + fbi->reg_lccr3 = REG_LCCR3 & ~(LCCR3_HSP | LCCR3_VSP); + fbi->reg_lccr3 |= + (vid->vl_hsp ? LCCR3_HorSnchL : LCCR3_HorSnchH) | (vid->vl_vsp ? LCCR3_VrtSnchL : LCCR3_VrtSnchH); - + /* setup dma descriptors */ fbi->dmadesc_fblow = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 3*16); @@ -1030,9 +1030,9 @@ fbi->dmadesc_palette = (struct pxafb_dma_descriptor *)((unsigned int)fbi->palette - 1*16); #define BYTES_PER_PANEL ((fbi->reg_lccr0 & LCCR0_SDS) ? \ - (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8 / 2) : \ - (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)) - + (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8 / 2) : \ + (vid->vl_col * vid->vl_row * NBITS(vid->vl_bpix) / 8)) + /* populate descriptors */ fbi->dmadesc_fblow->fdadr = (u_long)fbi->dmadesc_fblow; fbi->dmadesc_fblow->fsadr = fbi->screen + BYTES_PER_PANEL; @@ -1040,7 +1040,7 @@ fbi->dmadesc_fblow->ldcmd = BYTES_PER_PANEL; fbi->fdadr1 = (u_long)fbi->dmadesc_fblow; /* only used in dual-panel mode */ - + fbi->dmadesc_fbhigh->fsadr = fbi->screen; fbi->dmadesc_fbhigh->fidr = 0; fbi->dmadesc_fbhigh->ldcmd = BYTES_PER_PANEL; @@ -1055,7 +1055,7 @@ fbi->dmadesc_palette->fdadr = (u_long)fbi->dmadesc_fbhigh; fbi->dmadesc_fbhigh->fdadr = (u_long)fbi->dmadesc_palette; /* flips back and forth between pal and fbhigh */ - fbi->fdadr0 = (u_long)fbi->dmadesc_palette; + fbi->fdadr0 = (u_long)fbi->dmadesc_palette; } else { @@ -1079,7 +1079,7 @@ debug("fbi->dmadesc_fblow->ldcmd = 0x%lx\n", fbi->dmadesc_fblow->ldcmd); debug("fbi->dmadesc_fbhigh->ldcmd = 0x%lx\n", fbi->dmadesc_fbhigh->ldcmd); debug("fbi->dmadesc_palette->ldcmd = 0x%lx\n", fbi->dmadesc_palette->ldcmd); - + return 0; } diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S index 95b30e4..c2b75da 100644 --- a/cpu/pxa/start.S +++ b/cpu/pxa/start.S @@ -86,8 +86,8 @@ /* * This is defined in the board specific linker script */ -.globl _bss_start -_bss_start: +.globl _bss_start +_bss_start: .word bss_start .globl _bss_end @@ -138,7 +138,7 @@ relocate: /* relocate U-Boot to RAM */ adr r0, _start /* r0 <- current position of code */ - ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ + ldr r1, _TEXT_BASE /* test if we run from flash or RAM */ cmp r0, r1 /* don't reloc during debug */ beq stack_setup @@ -172,7 +172,7 @@ clbss_l:str r2, [r0] /* clear loop... */ add r0, r0, #4 cmp r0, r1 - bne clbss_l + bne clbss_l ldr pc, _start_armboot @@ -471,4 +471,3 @@ reset_endless: b reset_endless - diff --git a/cpu/sa1100/interrupts.c b/cpu/sa1100/interrupts.c index be52849..75f939c 100644 --- a/cpu/sa1100/interrupts.c +++ b/cpu/sa1100/interrupts.c @@ -75,7 +75,6 @@ #endif - void bad_mode (void) { panic ("Resetting CPU ...\n"); diff --git a/cpu/sa1100/start.S b/cpu/sa1100/start.S index c0f30f5..82f094a 100644 --- a/cpu/sa1100/start.S +++ b/cpu/sa1100/start.S @@ -26,7 +26,6 @@ */ - #include #include @@ -242,8 +241,6 @@ mov pc, lr - - /* ************************************************************************* * diff --git a/disk/part.c b/disk/part.c index 70511ca..47dc39b 100644 --- a/disk/part.c +++ b/disk/part.c @@ -103,11 +103,10 @@ } - #if defined(CONFIG_MAC_PARTITION) || \ defined(CONFIG_DOS_PARTITION) || \ defined(CONFIG_ISO_PARTITION) || \ - defined(CONFIG_AMIGA_PARTITION) + defined(CONFIG_AMIGA_PARTITION) void init_part (block_dev_desc_t * dev_desc) { diff --git a/disk/part_amiga.c b/disk/part_amiga.c index aafbcd8..f1ad24a 100644 --- a/disk/part_amiga.c +++ b/disk/part_amiga.c @@ -1,6 +1,6 @@ /* * (C) Copyright 2001 - * Hans-Joerg Frieden, Hyperion Entertainment + * Hans-Joerg Frieden, Hyperion Entertainment * Hans-JoergF@hyperion-entertainment.com * * See file CREDITS for list of people who contributed to this @@ -72,7 +72,7 @@ int len = *string++; char buffer[256]; int i; - + i = 0; while (len) { @@ -97,7 +97,7 @@ for (i = 0; i < header->summed_longs; i++) sum += *block++; - + return (sum != 0); } @@ -126,12 +126,12 @@ static void print_part_info(struct partition_block *p) { struct amiga_part_geometry *g; - + g = (struct amiga_part_geometry *)&(p->environment); bstr_print(p->drive_name); - printf("%6d\t%6d\t", - g->low_cyl * g->block_per_track * g->surfaces , + printf("%6d\t%6d\t", + g->low_cyl * g->block_per_track * g->surfaces , (g->high_cyl - g->low_cyl + 1) * g->block_per_track * g->surfaces - 1); print_disk_type(g->dos_type); printf("\t%5d\n", g->boot_priority); @@ -178,7 +178,7 @@ return NULL; } -/* +/* * Search for boot code * Again, the first boot block must be located somewhere in the first 16 blocks, or rooted in the * Ridgid disk block @@ -221,7 +221,7 @@ return 0; } -/* +/* * Test if the given partition has an Amiga partition table/Rigid * Disk block */ @@ -231,7 +231,7 @@ struct bootcode_block *bootcode; PRINTF("test_part_amiga: Testing for an Amiga RDB partition\n"); - + rdb = get_rdisk(dev_desc); if (rdb) { @@ -243,7 +243,7 @@ return 0; } - else + else { PRINTF("test_part_amiga: no RDB found\n"); return -1; @@ -251,7 +251,7 @@ } -/* +/* * Find partition number partnum on the given drive. */ static struct partition_block *find_partition(block_dev_desc_t *dev_desc, int partnum) @@ -262,12 +262,12 @@ PRINTF("Trying to find partition block %d\n", partnum); rdb = get_rdisk(dev_desc); - if (!rdb) + if (!rdb) { PRINTF("find_partition: no rdb found\n"); return NULL; } - + PRINTF("find_partition: Scanning partition list\n"); block = rdb->partition_list; @@ -286,7 +286,7 @@ if (sum_block((struct block_header *)p) == 0) { if (partnum == 0) break; - else + else { partnum--; block = p->next; @@ -296,7 +296,7 @@ } else block = 0xFFFFFFFF; } - if (block == 0xFFFFFFFF) + if (block == 0xFFFFFFFF) { PRINTF("PART block not found\n"); return NULL; @@ -305,7 +305,7 @@ return (struct partition_block *)block_buffer; } -/* +/* * Get info about a partition */ int get_partition_info_amiga (block_dev_desc_t *dev_desc, int part, disk_partition_t *info) @@ -321,7 +321,7 @@ info->size = (g->high_cyl - g->low_cyl + 1) * g->block_per_track * g->surfaces - 1; info->blksz = rdb.block_bytes; bcpl_strcpy(info->name, p->drive_name); - + disk_type = g->dos_type; @@ -331,12 +331,12 @@ info->type[3] = '\\'; info->type[4] = (disk_type & 0x000000FF) + '0'; info->type[5] = 0; - + return 0; } void print_part_amiga (block_dev_desc_t *dev_desc) -{ +{ struct rigid_disk_block *rdb; struct bootcode_block *boot; struct partition_block *p; @@ -344,12 +344,12 @@ int i = 1; rdb = get_rdisk(dev_desc); - if (!rdb) + if (!rdb) { PRINTF("print_part_amiga: no rdb found\n"); return; } - + PRINTF("print_part_amiga: Scanning partition list\n"); block = rdb->partition_list; @@ -370,7 +370,7 @@ ulong res; PRINTF("Trying to load block #0x%X\n", block); - + res = dev_desc->block_read(dev_desc->dev, block, 1, (ulong *)block_buffer); if (res == 1) diff --git a/disk/part_amiga.h b/disk/part_amiga.h index 9e59be9..20a8fdf 100644 --- a/disk/part_amiga.h +++ b/disk/part_amiga.h @@ -43,7 +43,7 @@ * "RigidDiskBlock". */ -struct rigid_disk_block +struct rigid_disk_block { u32 id; u32 summed_longs; @@ -57,7 +57,7 @@ u32 drive_init; u32 bootcode_block; u32 reserved_1[5]; - + /* Physical drive geometry */ u32 cylinders; u32 sectors; @@ -79,14 +79,14 @@ u32 auto_park_seconds; u32 high_rdsk_block; u32 reserved_4; - + char disk_vendor[8]; char disk_product[16]; char disk_revision[4]; char controller_vendor[8]; char controller_product[16]; char controller_revision[4]; - + u32 reserved_5[10]; }; @@ -94,7 +94,7 @@ * Each partition on this drive is defined by such a block */ -struct partition_block +struct partition_block { u32 id; u32 summed_longs; @@ -110,7 +110,7 @@ u32 reserved_3[15]; }; -struct bootcode_block +struct bootcode_block { u32 id; u32 summed_longs; @@ -125,12 +125,12 @@ #define AMIGA_ID_PART 0x50415254 #define AMIGA_ID_BOOT 0x424f4f54 -/* +/* * The environment array in the partition block * describes the partition */ -struct amiga_part_geometry +struct amiga_part_geometry { u32 table_size; u32 size_blocks; diff --git a/disk/part_dos.c b/disk/part_dos.c index fc6769b..d585b35 100644 --- a/disk/part_dos.c +++ b/disk/part_dos.c @@ -67,7 +67,6 @@ } - int test_part_dos (block_dev_desc_t *dev_desc) { unsigned char buffer[DEFAULT_SECTOR_SIZE]; @@ -75,7 +74,7 @@ if ((dev_desc->block_read(dev_desc->dev, 0, 1, (ulong *) buffer) != 1) || (buffer[DOS_PART_MAGIC_OFFSET + 0] != 0x55) || (buffer[DOS_PART_MAGIC_OFFSET + 1] != 0xaa) ) { - return (-1); + return (-1); } return (0); } @@ -106,7 +105,7 @@ pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET); for (i = 0; i < 4; i++, pt++) { /* - * fdisk does not show the extended partitions that + * fdisk does not show the extended partitions that * are not in the MBR */ @@ -166,8 +165,8 @@ pt = (dos_partition_t *) (buffer + DOS_PART_TBL_OFFSET); for (i = 0; i < 4; i++, pt++) { /* - * fdisk does not show the extended partitions that - * are not in the MBR + * fdisk does not show the extended partitions that + * are not in the MBR */ if ((pt->sys_ind != 0) && (part_num == which_part) && @@ -231,5 +230,4 @@ } - #endif /* (CONFIG_COMMANDS & CFG_CMD_IDE) && CONFIG_DOS_PARTITION */ diff --git a/disk/part_iso.c b/disk/part_iso.c index 7225927..4d746e4 100644 --- a/disk/part_iso.c +++ b/disk/part_iso.c @@ -230,7 +230,6 @@ } - void print_part_iso(block_dev_desc_t * dev_desc) { disk_partition_t info; diff --git a/disk/part_iso.h b/disk/part_iso.h index 34adbb2..2663578 100644 --- a/disk/part_iso.h +++ b/disk/part_iso.h @@ -127,8 +127,6 @@ }iso_part_rec_t; - - typedef struct iso_val_entry { unsigned char header_id; /* Header ID must be 0x01 */ unsigned char platform; /* Platform: 0=x86, 1=PowerPC, 2=MAC */ @@ -159,13 +157,4 @@ void print_partition_cd(int dev); - - - - - - - #endif /* _PART_CD_H */ - - diff --git a/disk/part_mac.c b/disk/part_mac.c index ee9d170..087133d 100644 --- a/disk/part_mac.c +++ b/disk/part_mac.c @@ -190,9 +190,9 @@ for (;;) { /* - * We must always read the descritpor block for - * partition 1 first since this is the only way to - * know how many partitions we have. + * We must always read the descritpor block for + * partition 1 first since this is the only way to + * know how many partitions we have. */ if (dev_desc->block_read (dev_desc->dev, n, 1, (ulong *)pdb_p) != 1) { printf ("** Can't read Partition Map on %d:%d **\n", diff --git a/disk/part_mac.h b/disk/part_mac.h index fb1edac..a7ad697 100644 --- a/disk/part_mac.h +++ b/disk/part_mac.h @@ -90,7 +90,7 @@ uchar processor[16]; /* Type of Processor */ __u16 part_pad[188]; /* reserved */ #ifdef CONFIG_ISO_PARTITION - uchar iso_dummy[2048];/* Reservere enough room for an ISO partition block to fit */ + uchar iso_dummy[2048];/* Reservere enough room for an ISO partition block to fit */ #endif } mac_partition_t; diff --git a/doc/README-i386 b/doc/README-i386 index 862f3f7..02b753c 100644 --- a/doc/README-i386 +++ b/doc/README-i386 @@ -4,23 +4,23 @@ It is currently capable of booting a linux bzImage from flash on the AMD SC520 CDP platform. -It was originally based on PPCBoot taken from the CVS October 28 2002. +It was originally based on PPCBoot taken from the CVS October 28 2002. To compile: 1) Unpack the source tree, either from the complete tarball or from the virgin snapshot + the patch - + 2) Configure the source $ make sc520_cdp_comfig $ make - + To use this code on the CDP: 1) Make a suitable kernel, I used 2.4.19 with the mtd-support updated from the MTD CVS and a patch to allow root=/dev/mtdblock1 which I - included at the end of this file. + included at the end of this file. The following options in the MTD section might be useful: - + CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_START=38100000 CONFIG_MTD_PHYSMAP_LEN=7a0000 @@ -29,9 +29,9 @@ 2) Program it in to the CDP flashbank with remon u-boot.bin should be programmed att offset 0x7e000 and the kernel at - offset 0. If you want to use a jffs2 root file system (not included here), + offset 0. If you want to use a jffs2 root file system (not included here), it should be programmed to offset 0x100000. - + remon> z remon> yi remon> ns u-boot.bin 7e0000 @@ -39,22 +39,21 @@ remon> ns image.jffs2 100000 3) Connect a terminal to the 25pin serial port at 9600bps, and start the CDP. - + remon> z remon> g 4) U-Boot should output some message and a prompt on the terminal, to start the kernel issue the following command: - + BOOT> bootm - + 5) The kernel should boot, and mount the root filesystem if present. We hope you find this stuff useful Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - --- linux-2.4.19-orig/init/do_mounts.c Sat Aug 3 02:39:46 2002 +++ linux-2.4.19/init/do_mounts.c Mon Sep 23 16:21:33 2002 @@ -224,6 +224,14 @@ @@ -71,4 +70,5 @@ + { "mtdblock7", 0x1f07 }, { NULL, 0 } }; - + +------------------- diff --git a/doc/README.EVB-64260-750CX b/doc/README.EVB-64260-750CX index 481feff..5ea38ea 100644 --- a/doc/README.EVB-64260-750CX +++ b/doc/README.EVB-64260-750CX @@ -5,4 +5,3 @@ * It has a single PCI male connector instead of the 4 PCI female connectors on the BP. It also gets power trough the PCI connector. * It has only a single DIMM slot instead of the 2 slots in the BP. - diff --git a/doc/README.IPHASE4539 b/doc/README.IPHASE4539 index 9302ff5..defad30 100644 --- a/doc/README.IPHASE4539 +++ b/doc/README.IPHASE4539 @@ -89,7 +89,7 @@ setenv - set environment variables sleep - delay execution for some time tftpboot- boot image via network using TFTP protocol - and env variables ipaddr and serverip + and env variables ipaddr and serverip version - print monitor version ? - alias for 'help' => diff --git a/doc/README.JFFS2 b/doc/README.JFFS2 index 3243895..f854984 100644 --- a/doc/README.JFFS2 +++ b/doc/README.JFFS2 @@ -68,9 +68,9 @@ TODO. - Add a new command so it's actually possible to change + Add a new command so it's actually possible to change partition. - Remove the assumption that JFFS can dereference a pointer - into the disk. The current code do not work with memory holes - or hardware with a sliding window (PCMCIA). + Remove the assumption that JFFS can dereference a pointer + into the disk. The current code do not work with memory holes + or hardware with a sliding window (PCMCIA). diff --git a/doc/README.Modem b/doc/README.Modem index a3ba7b7..1613c11 100644 --- a/doc/README.Modem +++ b/doc/README.Modem @@ -70,4 +70,3 @@ Rockwell OEM modem this can to be done with the following command: AT&D0&W - diff --git a/doc/README.OXC b/doc/README.OXC index e7bb76f..c5db5f8 100644 --- a/doc/README.OXC +++ b/doc/README.OXC @@ -22,4 +22,3 @@ When this option is on, U-Boot switches the Active LED off before booting an image and switches it on if booting failed due to some reasons. - diff --git a/doc/README.Purple b/doc/README.Purple index f811b67..0098e26 100644 --- a/doc/README.Purple +++ b/doc/README.Purple @@ -71,7 +71,6 @@ Power on. U-Boot should come up. - Implementation Notes: --------------------- diff --git a/doc/README.RPXClassic b/doc/README.RPXClassic index 5caa2bc..5344cc6 100644 --- a/doc/README.RPXClassic +++ b/doc/README.RPXClassic @@ -17,5 +17,3 @@ - Mac address is read from EEPROM - ethernet on SCC1 or fast ethernet on FEC are running (depending on the configuration flag CONFIG_FEC_ENET) - - diff --git a/doc/README.RPXlite b/doc/README.RPXlite index 25bf80b..c8ccc41 100644 --- a/doc/README.RPXlite +++ b/doc/README.RPXlite @@ -126,13 +126,6 @@ ############################################################### - - - - - - - ############################################################### # Misc Information ############################################################### @@ -755,7 +748,6 @@ PIT = PIT count /* Read only */ - /*------------------------------------------------------------------- */ /*------------------------------------------------------------------- */ /* CLOCKS */ @@ -825,7 +817,6 @@ JTRS = JTAG reset - /*------------------------------------------------------------------- */ /*------------------------------------------------------------------- */ /* DMA */ @@ -884,4 +875,3 @@ AD = 0 DONE = 0 OB = 0 - diff --git a/doc/README.Sandpoint8240 b/doc/README.Sandpoint8240 index 5cb79b3..b506c01 100644 --- a/doc/README.Sandpoint8240 +++ b/doc/README.Sandpoint8240 @@ -20,7 +20,6 @@ SW3.5: on SW3.6: OFF SW3.7: OFF SW3.8: on - The followind detailed description of installation and initial steps with U-Boot and QNX was provided by Jim Sandoz : @@ -38,19 +37,18 @@ http://e-www.motorola.com/collateral/UNITYX4CONFIG.pdf - Connection Diagram: - =========== + =========== === ===== |----- | | | <---------------> | | | | | |PC | rs232 | BDI |=============[] | | | | |2000 | BDM probe | | | | | <---------------> | | |----- | === ethernet ===== | | - | | - =========== - Sandpoint X3 with - Unity 8240 proc + | | + =========== + Sandpoint X3 with + Unity 8240 proc PART 1) @@ -354,9 +352,9 @@ Filename 'sandpoint-simple.elf'. Load address: 0x800000 Loading: ################################################################# - ################################################################# - ################################################################# - ######################## + ################################################################# + ################################################################# + ######################## done Bytes transferred = 1120284 (11181c hex) ==> @@ -394,4 +392,3 @@ cvs -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot login cvs -z6 -d:pserver:anonymous@cvs.u-boot.sourceforge.net:/cvsroot/u-boot co -P u-boot - diff --git a/doc/README.TQM8260 b/doc/README.TQM8260 index 7e03010..0571095 100644 --- a/doc/README.TQM8260 +++ b/doc/README.TQM8260 @@ -77,7 +77,7 @@ bootm - boot application image from memory bootp - boot image via network using BootP/TFTP protocol tftpboot- boot image via network using TFTP protocol - and env variables ipaddr and serverip + and env variables ipaddr and serverip rarpboot- boot image via network using RARP/TFTP protocol bootd - boot default, i.e., run 'bootcmd' loads - load S-Record file over serial line diff --git a/doc/README.autoboot b/doc/README.autoboot index 20736ca..a6d5f99 100644 --- a/doc/README.autoboot +++ b/doc/README.autoboot @@ -69,25 +69,25 @@ bootretry environment variable - These options determine what happens after autoboot is - stopped and U-Boot is waiting for commands. + These options determine what happens after autoboot is + stopped and U-Boot is waiting for commands. - CONFIG_BOOT_RETRY_TIME must be defined to enable the boot - retry feature. If the environment variable 'bootretry' is - found then its value is used, otherwise the retry timeout is - CONFIG_BOOT_RETRY_TIME. CONFIG_BOOT_RETRY_MIN is optional and - defaults to CONFIG_BOOT_RETRY_TIME. All times are in seconds. + CONFIG_BOOT_RETRY_TIME must be defined to enable the boot + retry feature. If the environment variable 'bootretry' is + found then its value is used, otherwise the retry timeout is + CONFIG_BOOT_RETRY_TIME. CONFIG_BOOT_RETRY_MIN is optional and + defaults to CONFIG_BOOT_RETRY_TIME. All times are in seconds. - If the retry timeout is negative, the U-Boot command prompt - never times out. Otherwise it is forced to be at least - CONFIG_BOOT_RETRY_MIN seconds. If no valid U-Boot command is - entered before the specified time the boot delay sequence is - restarted. Each command that U-Boot executes restarts the - timeout. + If the retry timeout is negative, the U-Boot command prompt + never times out. Otherwise it is forced to be at least + CONFIG_BOOT_RETRY_MIN seconds. If no valid U-Boot command is + entered before the specified time the boot delay sequence is + restarted. Each command that U-Boot executes restarts the + timeout. - If CONFIG_BOOT_RETRY_TIME < 0 the feature is there, but - doesn't do anything unless the environment variable - 'bootretry' is >= 0. + If CONFIG_BOOT_RETRY_TIME < 0 the feature is there, but + doesn't do anything unless the environment variable + 'bootretry' is >= 0. CONFIG_AUTOBOOT_KEYED CONFIG_AUTOBOOT_PROMPT @@ -101,9 +101,9 @@ bootdelaykey2 environment variable bootstopkey2 environment variable - These options give more control over stopping autoboot. When - they are used a specific character or string is required to - stop or delay autoboot. + These options give more control over stopping autoboot. When + they are used a specific character or string is required to + stop or delay autoboot. Define CONFIG_AUTOBOOT_KEYED (no value required) to enable this group of options. CONFIG_AUTOBOOT_DELAY_STR, @@ -111,48 +111,47 @@ specified by the corresponding environment variable), otherwise there is no way to stop autoboot. - CONFIG_AUTOBOOT_PROMPT is displayed before the boot delay - selected by CONFIG_BOOTDELAY starts. If it is not defined - there is no output indicating that autoboot is in progress. - If "%d" is included, it is replaced by the number of seconds - remaining before autoboot will start, but it does not count - down the seconds. "autoboot in %d seconds\n" is a reasonable - prompt. + CONFIG_AUTOBOOT_PROMPT is displayed before the boot delay + selected by CONFIG_BOOTDELAY starts. If it is not defined + there is no output indicating that autoboot is in progress. + If "%d" is included, it is replaced by the number of seconds + remaining before autoboot will start, but it does not count + down the seconds. "autoboot in %d seconds\n" is a reasonable + prompt. - If CONFIG_AUTOBOOT_DELAY_STR or bootdelaykey is specified and - this string is received from console input before autoboot - starts booting, U-Boot gives a command prompt. The U-Boot - prompt will time out if CONFIG_BOOT_RETRY_TIME is used, - otherwise it never times out. + If CONFIG_AUTOBOOT_DELAY_STR or bootdelaykey is specified and + this string is received from console input before autoboot + starts booting, U-Boot gives a command prompt. The U-Boot + prompt will time out if CONFIG_BOOT_RETRY_TIME is used, + otherwise it never times out. - If CONFIG_AUTOBOOT_STOP_STR or bootstopkey is specified and - this string is received from console input before autoboot - starts booting, U-Boot gives a command prompt. The U-Boot - prompt never times out, even if CONFIG_BOOT_RETRY_TIME is - used. + If CONFIG_AUTOBOOT_STOP_STR or bootstopkey is specified and + this string is received from console input before autoboot + starts booting, U-Boot gives a command prompt. The U-Boot + prompt never times out, even if CONFIG_BOOT_RETRY_TIME is + used. - The string recognition is not very sophisticated. If a - partial match is detected, the first non-matching character - is checked to see if starts a new match. There is no check - for a shorter partial match, so it's best if the first - character of a key string does not appear in the rest of the - string. + The string recognition is not very sophisticated. If a + partial match is detected, the first non-matching character + is checked to see if starts a new match. There is no check + for a shorter partial match, so it's best if the first + character of a key string does not appear in the rest of the + string. - Using the CONFIG_AUTOBOOT_DELAY_STR2 / bootdelaykey2 and/or - CONFIG_AUTOBOOT_STOP_STR2 / bootstopkey #defines and/or - environment variables you can specify a second, alternate - string (which allows you to haw two "password" strings). + Using the CONFIG_AUTOBOOT_DELAY_STR2 / bootdelaykey2 and/or + CONFIG_AUTOBOOT_STOP_STR2 / bootstopkey #defines and/or + environment variables you can specify a second, alternate + string (which allows you to haw two "password" strings). CONFIG_ZERO_BOOTDELAY_CHECK - If this option is defined, you can stop the autoboot process - by hitting a key even in that case when "bootdelay" has been - set to 0. You can set "bootdelay" to a negative value to - prevent the check for console input. + If this option is defined, you can stop the autoboot process + by hitting a key even in that case when "bootdelay" has been + set to 0. You can set "bootdelay" to a negative value to + prevent the check for console input. CONFIG_RESET_TO_RETRY - (Only effective when CONFIG_BOOT_RETRY_TIME is also set) - After the countdown timed out, the board will be reset to restart - again. - + (Only effective when CONFIG_BOOT_RETRY_TIME is also set) + After the countdown timed out, the board will be reset to restart + again. diff --git a/doc/README.bedbug b/doc/README.bedbug index ed7bc12..56aeb09 100644 --- a/doc/README.bedbug +++ b/doc/README.bedbug @@ -61,7 +61,6 @@ IBM PPC405 specific debugger routines. - Bedbug support for the MPC860 ----------------------------- diff --git a/doc/README.cmi b/doc/README.cmi index 48052b8..884854d 100644 --- a/doc/README.cmi +++ b/doc/README.cmi @@ -3,9 +3,9 @@ ======== This file contains information about the cmi board configuration. -Please see cmi_mpc5xx_config for further details. The cmi board is -a customer specific board but should work with small modifications -on every board which has a MPC5xx and either a 28F128J3A, +Please see cmi_mpc5xx_config for further details. The cmi board is +a customer specific board but should work with small modifications +on every board which has a MPC5xx and either a 28F128J3A, 28F320J3A or 28F640J3A Intel flash mounted. Board Discription: @@ -16,14 +16,14 @@ * Intel flash 28F640J3A * Micron SRAM 1M * Altera PLD - + Bootstrap: ========== In contrast to the usual boot sequence used in U-Boot, on the cmi board we don't boot from the external flash directly. Because of we use a 16-bit flash and don't sample a RCW -from the data bus to set the startup buswidth to 16-bit. +from the data bus to set the startup buswidth to 16-bit. Unfortunatly the default width, sampled from the default RCW is 32-bit. For this reason we burn the proper RCW into the internal flash shadow location and boot after power-on or @@ -35,16 +35,16 @@ Memory Map after relocation: - 0x0000 0000 CFG_SDRAM_BASE + 0x0000 0000 CFG_SDRAM_BASE : 0x000F 9FFF : - : - 0x0100 0000 CFG_IMMR (Internal memory map base adress) + : + 0x0100 0000 CFG_IMMR (Internal memory map base adress) : 0x0130 7FFF : - : + : 0x0200 0000 CFG_FLASH_BASE : 0x027C FFFF @@ -53,15 +53,15 @@ 0x0300 0000 PLD_BASE Flash Partition: - - 0x0200 0000 Block 0 and 1 contain U-Boot except + + 0x0200 0000 Block 0 and 1 contain U-Boot except : environment : 0x0201 FFFF 0x0202 0000 Block 2 contains environment (.ppcenv) : - 0x0202 FFFF - + 0x0202 FFFF + See README file for futher information about U-Boot relocation and partitioning. @@ -71,7 +71,7 @@ * U-Boot commands: go, loads, loadb, all memory features, printenv, setenv, saveenv, protect, erase, fli, bdi, mtest, reset, version, coninfo, help (see configuration file for available commands) - + * Blinking led to indicate boot process Added or Changed Files: diff --git a/doc/README.ebony b/doc/README.ebony index 12a0d70..6e2a811 100644 --- a/doc/README.ebony +++ b/doc/README.ebony @@ -1,6 +1,6 @@ - IBM Ebony Board + IBM Ebony Board - Last Update: September 12, 2002 + Last Update: September 12, 2002 ======================================================================= This file contains some handy info regarding U-Boot and the IBM @@ -131,8 +131,6 @@ the chance to do this, please let me know how things turn out :-) - Regards, --Scott - diff --git a/doc/README.fads b/doc/README.fads index 0128ef7..bae9652 100644 --- a/doc/README.fads +++ b/doc/README.fads @@ -87,4 +87,3 @@ go Now U-Boot is running with the U-Boot value for SYPCR. - diff --git a/doc/README.mpc5xx b/doc/README.mpc5xx index 2c1a293..07be863 100644 --- a/doc/README.mpc5xx +++ b/doc/README.mpc5xx @@ -5,14 +5,14 @@ This file contains information about the port of U-Boot to the Motorola mpc5xx series of CPUs. Most of this code is taken from existing code mainly from the mpc8xx port. In contrast to mpc8xx, -the mpc5xx has no CPM, MMU and cache facilities. +the mpc5xx has no CPM, MMU and cache facilities. -The implemented features have been tested on the cmi board, a -customer specific board (see README.cmi). +The implemented features have been tested on the cmi board, a +customer specific board (see README.cmi). -Hence this port is only tested on the cmi board further possible +Hence this port is only tested on the cmi board further possible tests on other boards will be very valuable. - + Not Tested Features: ==================== diff --git a/doc/README.nand b/doc/README.nand index af7fbfd..0f2bdc5 100644 --- a/doc/README.nand +++ b/doc/README.nand @@ -52,7 +52,7 @@ nand read addr ofs size Read `size' bytes from `ofs' in NAND flash to `addr'. If a page cannot be read because it is marked bad or an uncorrectable data - error is found the command stops with an error. + error is found the command stops with an error. nand read.jffs2 addr ofs size Like `read', but the data for blocks that are marked bad is read as @@ -68,7 +68,7 @@ nand write addr ofs size Write `size' bytes from `addr' to `ofs' in NAND flash. If a page cannot be written because it is marked bad or the write fails the - command stops with an error. + command stops with an error. nand write.jffs2 addr ofs size Like `write', but blocks that are marked bad are skipped and the @@ -158,13 +158,13 @@ #define NAND_CTL_SETCLE(nandptr) Set CLE (command latch enable) high. If CLE control is handled by WRITE_NAND_ADDRESS() this can be empty. - + More Definitions: These definitions are needed in the board configuration for now, but may really belong in a header file. TODO: Figure which ones are truly configuration settings and rename - them to CFG_NAND_... and move the rest somewhere appropriate. + them to CFG_NAND_... and move the rest somewhere appropriate. #define SECTORSIZE 512 #define ADDR_COLUMN 1 @@ -173,4 +173,3 @@ #define NAND_ChipID_UNKNOWN 0x00 #define NAND_MAX_FLOORS 1 #define NAND_MAX_CHIPS 1 - diff --git a/doc/README.ppc440 b/doc/README.ppc440 index acb0c6f..95d63fc 100644 --- a/doc/README.ppc440 +++ b/doc/README.ppc440 @@ -1,6 +1,6 @@ - PowerPC 440 + PowerPC 440 - Last Update: September 11, 2002 + Last Update: September 11, 2002 ======================================================================= @@ -197,8 +197,6 @@ then just hardcode a return of 1 or 0 as appropriate. - Regards, --Scott - diff --git a/drivers/3c589.c b/drivers/3c589.c index 541f93b..080b686 100644 --- a/drivers/3c589.c +++ b/drivers/3c589.c @@ -101,8 +101,8 @@ #define insw(args...) mmio_insw(args) #define mmio_insw(r,b,l) ({ int __i ; \ word *__b2; \ - __b2 = (word *) b; \ - for (__i = 0; __i < l; __i++) { \ + __b2 = (word *) b; \ + for (__i = 0; __i < l; __i++) { \ *(__b2 + __i) = mmio_inw(r); \ mmio_inw(0); \ }; \ @@ -204,40 +204,39 @@ #if EL_DEBUG > 1 static void print_packet( byte * buf, int length ) { - int i; - int remainder; - int lines; + int i; + int remainder; + int lines; - PRINTK2("Packet of length %d \n", length ); + PRINTK2("Packet of length %d \n", length ); - lines = length / 16; - remainder = length % 16; + lines = length / 16; + remainder = length % 16; - for ( i = 0; i < lines ; i ++ ) { - int cur; + for ( i = 0; i < lines ; i ++ ) { + int cur; - for ( cur = 0; cur < 8; cur ++ ) { - byte a, b; + for ( cur = 0; cur < 8; cur ++ ) { + byte a, b; - a = *(buf ++ ); - b = *(buf ++ ); - PRINTK2("%02x%02x ", a, b ); - } - PRINTK2("\n"); - } - for ( i = 0; i < remainder/2 ; i++ ) { - byte a, b; + a = *(buf ++ ); + b = *(buf ++ ); + PRINTK2("%02x%02x ", a, b ); + } + PRINTK2("\n"); + } + for ( i = 0; i < remainder/2 ; i++ ) { + byte a, b; - a = *(buf ++ ); - b = *(buf ++ ); - PRINTK2("%02x%02x ", a, b ); - } - PRINTK2("\n"); + a = *(buf ++ ); + b = *(buf ++ ); + PRINTK2("%02x%02x ", a, b ); + } + PRINTK2("\n"); } #endif /* EL_DEBUG > 1 */ - /************************************************************************** ETH_RESET - Reset adapter ***************************************************************************/ @@ -436,7 +435,6 @@ } - /************************************************************************** ETH_TRANSMIT - Transmit a frame ***************************************************************************/ @@ -506,9 +504,9 @@ PRINTK("\n\n"); } - /* wait for Tx complete */ + /* wait for Tx complete */ PRINTK("Waiting for Tx to complete...\n"); - while(((status = inw(EL_BASE_ADDR + VX_STATUS)) & S_COMMAND_IN_PROGRESS) != 0) + while(((status = inw(EL_BASE_ADDR + VX_STATUS)) & S_COMMAND_IN_PROGRESS) != 0) { udelay(10); } @@ -518,5 +516,4 @@ } - #endif /* CONFIG_DRIVER_3C589 */ diff --git a/drivers/3c589.h b/drivers/3c589.h index 00e7f7c..6735bf9 100644 --- a/drivers/3c589.h +++ b/drivers/3c589.h @@ -129,7 +129,7 @@ #define VX_W0_RESOURCE_CFG 0x08 #define VX_W0_ADDRESS_CFG 0x06 #define VX_W0_CONFIG_CTRL 0x04 - /* Read */ + /* Read */ #define VX_W0_PRODUCT_ID 0x02 #define VX_W0_MFG_ID 0x00 diff --git a/drivers/5701rls.c b/drivers/5701rls.c index c4409e4..86950d0 100644 --- a/drivers/5701rls.c +++ b/drivers/5701rls.c @@ -33,9 +33,9 @@ FwImgInfo.Data.Length = t3FwDataLen; if (LM_LoadFirmware(pDevice, - &FwImgInfo, - T3_RX_CPU_ID | T3_TX_CPU_ID, - T3_RX_CPU_ID) != LM_STATUS_SUCCESS) + &FwImgInfo, + T3_RX_CPU_ID | T3_TX_CPU_ID, + T3_RX_CPU_ID) != LM_STATUS_SUCCESS) { return LM_STATUS_FAILURE; } diff --git a/drivers/ali512x.c b/drivers/ali512x.c index e52edd0..7b7edc0 100644 --- a/drivers/ali512x.c +++ b/drivers/ali512x.c @@ -58,7 +58,7 @@ */ static void ali_write(u8 index, u8 value) -{ +{ /* write an arbirary register */ outb(index, ALI_INDEX); outb(value, ALI_DATA); @@ -74,7 +74,7 @@ #define ALI_OPEN() \ outb(0x51, ALI_INDEX); \ - outb(0x23, ALI_INDEX) + outb(0x23, ALI_INDEX) #define ALI_CLOSE() \ @@ -82,7 +82,7 @@ /* Select a logical device */ #define ALI_SELDEV(dev) \ - ali_write(0x07, dev) + ali_write(0x07, dev) void ali512x_init(void) @@ -102,14 +102,14 @@ { ALI_OPEN(); ALI_SELDEV(0); - + ali_write(0x30, enabled?1:0); if (enabled) { ali_write(0x60, io >> 8); ali_write(0x61, io & 0xff); ali_write(0x70, irq); ali_write(0x74, dma_channel); - + /* AT mode, no drive swap */ ali_write(0xf0, 0x08); ali_write(0xf1, 0x00); @@ -124,14 +124,14 @@ { ALI_OPEN(); ALI_SELDEV(3); - + ali_write(0x30, enabled?1:0); if (enabled) { ali_write(0x60, io >> 8); ali_write(0x61, io & 0xff); ali_write(0x70, irq); ali_write(0x74, dma_channel); - + /* mode: EPP 1.9, ECP FIFO threshold = 7, IRQ active low */ ali_write(0xf0, 0xbc); /* 12 MHz, Burst DMA in ECP */ @@ -145,18 +145,18 @@ { ALI_OPEN(); ALI_SELDEV(index?5:4); - + ali_write(0x30, enabled?1:0); if (enabled) { ali_write(0x60, io >> 8); ali_write(0x61, io & 0xff); ali_write(0x70, irq); - + ali_write(0xf0, 0x00); ali_write(0xf1, 0x00); - + /* huh? write 0xf2 twice - a typo in rolo - * or some secret ali errata? Who knows? + * or some secret ali errata? Who knows? */ if (index) { ali_write(0xf2, 0x00); @@ -171,7 +171,7 @@ { ALI_OPEN(); ALI_SELDEV(5); - + ali_write(0xf1, enabled?0x48:0x00); /* fullduplex IrDa */ ALI_CLOSE(); @@ -181,7 +181,7 @@ { ALI_OPEN(); ALI_SELDEV(6); - + ali_write(0x30, enabled?1:0); if (enabled) { ali_write(0x60, io >> 8); @@ -197,12 +197,12 @@ { ALI_OPEN(); ALI_SELDEV(7); - + ali_write(0x30, enabled?1:0); if (enabled) { ali_write(0x70, kbc_irq); - ali_write(0x72, mouse_irq); - + ali_write(0x72, mouse_irq); + ali_write(0xf0, 0x00); } ALI_CLOSE(); @@ -210,21 +210,21 @@ /* Common I/O - * + * * (This descripotsion is base on several incompete sources * since I have not been able to obtain any datasheet for the device - * there may be some mis-understandings burried in here. + * there may be some mis-understandings burried in here. * -- Daniel daniel@omicron.se) - * + * * There are 22 CIO pins numbered * 10-17 * 20-25 * 30-37 - * + * * 20-24 are dedicated CIO pins, the other 17 are muliplexed with * other functions. - * - * Secondary + * + * Secondary * CIO Pin Function Decription * ======================================================= * CIO10 IRQIN1 Interrupt input 1? @@ -235,14 +235,14 @@ * CIO15 P20 KBC P21 fucntion * CIO16 I2C_CLK I2C Clock * CIO17 I2C_DAT I2C Data - * + * * CIO20 - * CIO21 - * CIO22 - * CIO23 - * CIO24 - * CIO25 LOCK Keylock - * + * * CIO30 KBC_CLK Keybaord Clock * CIO31 CS0J General Chip Select decoder CS0J * CIO32 CS1J General Chip Select decoder CS1J @@ -252,13 +252,13 @@ * CIO36 ALT_MDAT Alternative Mouse Data * CIO37 ALT_KBC Alternative KBC select * - * The CIO use an indirect address scheme. - * + * The CIO use an indirect address scheme. + * * Reigster 3 in the SIO is used to select the index and data * port addresses where the CIO I/O registers show up. - * The function selection registers are accessible under - * function SIO 8. - * + * The function selection registers are accessible under + * function SIO 8. + * * SIO reigster 3 (CIO Address Selection) bit definitions: * bit 7 CIO index and data registers enabled * bit 1-0 CIO indirect registers port address select @@ -266,23 +266,23 @@ * 1 index = 0xE2 data = 0xE3 * 2 index = 0xE4 data = 0xE5 * 3 index = 0xEA data = 0xEB - * + * * There are three CIO I/O register accessed via CIO index port and CIO data port * 0x01 CIO 10-17 data * 0x02 CIO 20-25 data (bits 7-6 unused) * 0x03 CIO 30-37 data - * - * - * The pin function is accessed through normal + * + * + * The pin function is accessed through normal * SIO registers, each register have the same format: - * + * * Bit Function Value - * 0 Input/output 1=input + * 0 Input/output 1=input * 1 Polarity of signal 1=inverted * 2 Unused ?? * 3 Function (normal or special) 1=special * 7-4 Unused - * + * * SIO REG * 0xe0 CIO 10 Config * 0xe1 CIO 11 Config @@ -308,7 +308,7 @@ * 0xfa CIO 35 Config * 0xfb CIO 36 Config * 0xfc CIO 37 Config - * + * */ #define ALI_CIO_PORT_SEL 0x83 @@ -318,28 +318,28 @@ void ali512x_set_cio(int enabled) { int i; - + ALI_OPEN(); - + if (enabled) { ali_write(0x3, ALI_CIO_PORT_SEL); /* Enable CIO data register */ } else { ali_write(0x3, ALI_CIO_PORT_SEL & ~0x80); } - + ALI_SELDEV(8); - + ali_write(0x30, enabled?1:0); - + /* set all pins to input to start with */ for (i=0xe0;i<0xee;i++) { ali_write(i, 1); } - + for (i=0xf5;i<0xfe;i++) { ali_write(i, 1); } - + ALI_CLOSE(); } @@ -348,23 +348,23 @@ { u8 data; u8 addr; - + /* valid pins are 10-17, 20-25 and 30-37 */ - if (pin >= 10 && pin <= 17) { + if (pin >= 10 && pin <= 17) { addr = 0xe0+(pin&7); } else if (pin >= 20 && pin <= 25) { addr = 0xe8+(pin&7); - } else if (pin >= 30 && pin <= 37) { + } else if (pin >= 30 && pin <= 37) { addr = 0xf5+(pin&7); } else { return; } - + ALI_OPEN(); ALI_SELDEV(8); - - + + data=0xf4; if (special) { data |= 0x08; @@ -376,22 +376,22 @@ data |= 0x01; } } - + ali_write(addr, data); - + ALI_CLOSE(); } -void ali512x_cio_out(int pin, int value) +void ali512x_cio_out(int pin, int value) { u8 reg; u8 data; u8 bit; - + reg = pin/10; bit = 1 << (pin%10); - - + + outb(reg, ALI_CIO_INDEX); /* select I/O register */ data = inb(ALI_CIO_DATA); if (value) { @@ -407,17 +407,17 @@ u8 reg; u8 data; u8 bit; - + /* valid pins are 10-17, 20-25 and 30-37 */ reg = pin/10; bit = 1 << (pin%10); - - + + outb(reg, ALI_CIO_INDEX); /* select I/O register */ data = inb(ALI_CIO_DATA); - - return data & bit; + + return data & bit; } - + #endif diff --git a/drivers/bcm570x.c b/drivers/bcm570x.c index a88880a..5f632a6 100644 --- a/drivers/bcm570x.c +++ b/drivers/bcm570x.c @@ -19,7 +19,6 @@ #include - /* * PCI Registers and definitions. */ @@ -33,7 +32,6 @@ #define BCM570X_ILINE 1 - #define SECOND_USEC 1000000 #define MAX_PACKET_SIZE 1600 #define MAX_UNITS 4 @@ -98,7 +96,6 @@ {ST_COAL_TK, ST_COAL_TK, ST_COAL_TK, ST_COAL_TK}; - /* * Legitimate values for BCM570x device types */ @@ -274,7 +271,6 @@ #define n570xDevices (sizeof(bcm570xDevices)/sizeof(bcm570xDevices[0])) - /* * Allocate a packet buffer from the bcm570x packet pool. */ @@ -522,7 +518,7 @@ else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5701_PHY_ID) printf("Broadcom BCM5701 Integrated Copper "); else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5703_PHY_ID) - printf("Broadcom BCM5703 Integrated Copper "); + printf("Broadcom BCM5703 Integrated Copper "); else if ((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM8002_PHY_ID) printf("Broadcom BCM8002 SerDes "); else if (pDevice->EnableTbi) @@ -556,21 +552,21 @@ if (pDevice->UseTaggedStatus) { if ((pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) || pUmDevice->adapter_just_inited) { - MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, 1); - oldtag = pDevice->pStatusBlkVirt->StatusTag; + MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, 1); + oldtag = pDevice->pStatusBlkVirt->StatusTag; - for (i = 0; ; i++) { - pDevice->pStatusBlkVirt->Status &= ~STATUS_BLOCK_UPDATED; - LM_ServiceInterrupts(pDevice); - newtag = pDevice->pStatusBlkVirt->StatusTag; - if ((newtag == oldtag) || (i > 50)) { - MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, newtag << 24); - if (pDevice->UndiFix) { - REG_WR(pDevice, Grc.LocalCtrl, + for (i = 0; ; i++) { + pDevice->pStatusBlkVirt->Status &= ~STATUS_BLOCK_UPDATED; + LM_ServiceInterrupts(pDevice); + newtag = pDevice->pStatusBlkVirt->StatusTag; + if ((newtag == oldtag) || (i > 50)) { + MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, newtag << 24); + if (pDevice->UndiFix) { + REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | 0x2); - } - break; - } + } + break; + } oldtag = newtag; } } @@ -625,8 +621,8 @@ /* Link down, return */ while(pDevice->LinkStatus == LM_STATUS_LINK_DOWN) { #if 0 - printf("eth%d: link down - check cable or link partner.\n", - pUmDevice->index); + printf("eth%d: link down - check cable or link partner.\n", + pUmDevice->index); #endif eth_isr(); @@ -672,7 +668,7 @@ * used to send the packet. */ if (MM_CoalesceTxBuffer (pDevice, pPacket) != LM_STATUS_SUCCESS) { - if (pUmPacket->skbuff == NULL){ + if (pUmPacket->skbuff == NULL){ /* Packet was discarded */ printf("TX: failed (1)\n"); status = 1; @@ -680,8 +676,8 @@ printf("TX: failed (2)\n"); status = 2; } - QQ_PushHead (&pDevice->TxPacketFreeQ.Container, pPacket); - return status; + QQ_PushHead (&pDevice->TxPacketFreeQ.Container, pPacket); + return status; } /* Copy packet to DMA buffer */ @@ -694,11 +690,11 @@ pPacket->Flags &= ~SND_BD_FLAG_TCP_UDP_CKSUM; if ( LM_SendPacket(pDevice, pPacket) == LM_STATUS_FAILURE){ - /* - * A lower level send failure will push the packet descriptor back - * in the free queue, so just deal with the VxWorks clusters. - */ - if (pUmPacket->skbuff == NULL){ + /* + * A lower level send failure will push the packet descriptor back + * in the free queue, so just deal with the VxWorks clusters. + */ + if (pUmPacket->skbuff == NULL){ printf("TX failed (1)!\n"); /* Packet was discarded */ status = 3; @@ -804,7 +800,6 @@ } - /* Shut down device */ void eth_halt(void) @@ -814,19 +809,19 @@ if (pDevice && pUmDevice && pUmDevice->opened){ printf("\neth%d:%s,", pUmDevice->index, pUmDevice->name); printf("HALT,"); - /* stop device */ - LM_Halt(pDevice); + /* stop device */ + LM_Halt(pDevice); printf("POWER DOWN,"); - LM_SetPowerState(pDevice, LM_POWER_STATE_D3); + LM_SetPowerState(pDevice, LM_POWER_STATE_D3); - /* Free the memory allocated by the device in tigon3 */ - for (i = 0; i < pUmDevice->mem_list_num; i++) { - if (pUmDevice->mem_list[i]) { + /* Free the memory allocated by the device in tigon3 */ + for (i = 0; i < pUmDevice->mem_list_num; i++) { + if (pUmDevice->mem_list[i]) { /* sanity check */ - if (pUmDevice->dma_list[i]) { /* cache-safe memory */ - free(pUmDevice->mem_list[i]); + if (pUmDevice->dma_list[i]) { /* cache-safe memory */ + free(pUmDevice->mem_list[i]); } else { - free(pUmDevice->mem_list[i]); /* normal memory */ + free(pUmDevice->mem_list[i]); /* normal memory */ } } } @@ -840,8 +835,6 @@ } - - /* * * Middle Module: Interface between the HW driver (tigon3 modules) and @@ -931,7 +924,6 @@ } - LM_STATUS MM_AllocateMemory(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlockSize, PLM_VOID *pMemoryBlockVirt) @@ -1183,26 +1175,26 @@ if (Status == LM_STATUS_LINK_DOWN) { sprintf(buf,"eth%d: %s: NIC Link is down\n", pUmDevice->index,pUmDevice->name); - lcd[0] = 'L';lcd[1]='N';lcd[2]='K';lcd[3] = '?'; + lcd[0] = 'L';lcd[1]='N';lcd[2]='K';lcd[3] = '?'; } else if (Status == LM_STATUS_LINK_ACTIVE) { sprintf(buf,"eth%d:%s: ", pUmDevice->index, pUmDevice->name); if (pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS){ strcat(buf,"1000 Mbps "); - lcd[0] = '1';lcd[1]='G';lcd[2]='B'; + lcd[0] = '1';lcd[1]='G';lcd[2]='B'; } else if (pDevice->LineSpeed == LM_LINE_SPEED_100MBPS){ strcat(buf,"100 Mbps "); - lcd[0] = '1';lcd[1]='0';lcd[2]='0'; + lcd[0] = '1';lcd[1]='0';lcd[2]='0'; } else if (pDevice->LineSpeed == LM_LINE_SPEED_10MBPS){ strcat(buf,"10 Mbps "); - lcd[0] = '1';lcd[1]='0';lcd[2]=' '; + lcd[0] = '1';lcd[1]='0';lcd[2]=' '; } if (pDevice->DuplexMode == LM_DUPLEX_MODE_FULL){ strcat(buf, "full duplex"); - lcd[3] = 'F'; + lcd[3] = 'F'; } else { strcat(buf, "half duplex"); - lcd[3] = 'H'; + lcd[3] = 'H'; } strcat(buf, " link up"); @@ -1223,7 +1215,7 @@ } else { strcat(buf, ", flow control OFF"); } - strcat(buf,"\n"); + strcat(buf,"\n"); printf("%s",buf); } #if 0 @@ -1275,20 +1267,20 @@ int len = 0; if (len == 0) - return (LM_STATUS_SUCCESS); + return (LM_STATUS_SUCCESS); if (len > MAX_PACKET_SIZE){ - printf ("eth%d: xmit frame discarded, too big!, size = %d\n", + printf ("eth%d: xmit frame discarded, too big!, size = %d\n", pUmDevice->index, len); - return (LM_STATUS_FAILURE); + return (LM_STATUS_FAILURE); } skbnew = bcm570xPktAlloc(pUmDevice->index, MAX_PACKET_SIZE); if (skbnew == NULL) { - pUmDevice->tx_full = 1; - printf ("eth%d: out of transmit buffers", pUmDevice->index); - return (LM_STATUS_FAILURE); + pUmDevice->tx_full = 1; + printf ("eth%d: out of transmit buffers", pUmDevice->index); + return (LM_STATUS_FAILURE); } /* New packet values */ @@ -1325,13 +1317,13 @@ pUmPacket = (PUM_PACKET) pPacket; skb = (void*)pUmPacket->skbuff; - /* - * Free MBLK if we transmitted a fragmented packet or a - * non-fragmented packet straight from the VxWorks - * buffer pool. If packet was copied to a local transmit - * buffer, then there's no MBUF to free, just free - * the transmit buffer back to the cluster pool. - */ + /* + * Free MBLK if we transmitted a fragmented packet or a + * non-fragmented packet straight from the VxWorks + * buffer pool. If packet was copied to a local transmit + * buffer, then there's no MBUF to free, just free + * the transmit buffer back to the cluster pool. + */ if (skb) bcm570xPktFree (pUmDevice->index, skb); @@ -1383,22 +1375,22 @@ MM_SetAddr (LM_PHYSICAL_ADDRESS *paddr, dma_addr_t addr) { #if (BITS_PER_LONG == 64) - paddr->High = ((unsigned long) addr) >> 32; - paddr->Low = ((unsigned long) addr) & 0xffffffff; + paddr->High = ((unsigned long) addr) >> 32; + paddr->Low = ((unsigned long) addr) & 0xffffffff; #else - paddr->High = 0; - paddr->Low = (unsigned long) addr; + paddr->High = 0; + paddr->Low = (unsigned long) addr; #endif } void MM_SetT3Addr(T3_64BIT_HOST_ADDR *paddr, dma_addr_t addr) { - unsigned long baddr = (unsigned long) addr; + unsigned long baddr = (unsigned long) addr; #if (BITS_PER_LONG == 64) - set_64bit_addr(paddr, baddr & 0xffffffff, baddr >> 32); + set_64bit_addr(paddr, baddr & 0xffffffff, baddr >> 32); #else - set_64bit_addr(paddr, baddr, 0); + set_64bit_addr(paddr, baddr, 0); #endif } @@ -1465,7 +1457,6 @@ } /* QQ_InitQueue */ - /******************************************************************************/ /* Description: */ /* */ @@ -1482,7 +1473,6 @@ } /* QQ_Full */ - /******************************************************************************/ /* Description: */ /* */ @@ -1495,7 +1485,6 @@ } /* QQ_Empty */ - /******************************************************************************/ /* Description: */ /* */ @@ -1508,7 +1497,6 @@ } /* QQ_GetSize */ - /******************************************************************************/ /* Description: */ /* */ @@ -1521,7 +1509,6 @@ } /* QQ_GetEntryCnt */ - /******************************************************************************/ /* Description: */ /* */ @@ -1539,7 +1526,7 @@ #if !defined(QQ_NO_OVERFLOW_CHECK) if(Head == pQueue->Tail) { - return 0; + return 0; } /* if */ #endif /* QQ_NO_OVERFLOW_CHECK */ @@ -1552,7 +1539,6 @@ } /* QQ_PushHead */ - /******************************************************************************/ /* Description: */ /* */ @@ -1568,13 +1554,13 @@ Tail = pQueue->Tail; if(Tail == 0) { - Tail = pQueue->Size; + Tail = pQueue->Size; } /* if */ Tail--; #if !defined(QQ_NO_OVERFLOW_CHECK) if(Tail == pQueue->Head) { - return 0; + return 0; } /* if */ #endif /* QQ_NO_OVERFLOW_CHECK */ @@ -1587,7 +1573,6 @@ } /* QQ_PushTail */ - /******************************************************************************/ /* Description: */ /* */ @@ -1603,12 +1588,12 @@ #if !defined(QQ_NO_UNDERFLOW_CHECK) if(Head == pQueue->Tail) { - return (PQQ_ENTRY) 0; + return (PQQ_ENTRY) 0; } /* if */ #endif /* QQ_NO_UNDERFLOW_CHECK */ if(Head == 0) { - Head = pQueue->Size; + Head = pQueue->Size; } /* if */ Head--; @@ -1622,7 +1607,6 @@ } /* QQ_PopHead */ - /******************************************************************************/ /* Description: */ /* */ @@ -1638,7 +1622,7 @@ #if !defined(QQ_NO_UNDERFLOW_CHECK) if(Tail == pQueue->Head) { - return (PQQ_ENTRY) 0; + return (PQQ_ENTRY) 0; } /* if */ #endif /* QQ_NO_UNDERFLOW_CHECK */ @@ -1651,7 +1635,6 @@ } /* QQ_PopTail */ - /******************************************************************************/ /* Description: */ /* */ @@ -1664,16 +1647,16 @@ { if(Idx >= atomic_read(&pQueue->EntryCnt)) { - return (PQQ_ENTRY) 0; + return (PQQ_ENTRY) 0; } if(pQueue->Head > Idx) { - Idx = pQueue->Head - Idx; + Idx = pQueue->Head - Idx; } else { - Idx = pQueue->Size - (Idx - pQueue->Head); + Idx = pQueue->Size - (Idx - pQueue->Head); } Idx--; @@ -1681,7 +1664,6 @@ } - /******************************************************************************/ /* Description: */ /* */ @@ -1694,13 +1676,13 @@ { if(Idx >= atomic_read(&pQueue->EntryCnt)) { - return (PQQ_ENTRY) 0; + return (PQQ_ENTRY) 0; } Idx += pQueue->Tail; if(Idx >= pQueue->Size) { - Idx = Idx - pQueue->Size; + Idx = Idx - pQueue->Size; } return pQueue->Array[Idx]; diff --git a/drivers/bcm570x_autoneg.c b/drivers/bcm570x_autoneg.c index 1818c6a..9023796 100644 --- a/drivers/bcm570x_autoneg.c +++ b/drivers/bcm570x_autoneg.c @@ -16,7 +16,6 @@ #include "bcm570x_mm.h" - /******************************************************************************/ /* Description: */ /* */ @@ -37,7 +36,6 @@ } - /******************************************************************************/ /* Description: */ /* */ @@ -56,7 +54,6 @@ } - /******************************************************************************/ /* Description: */ /* */ @@ -78,17 +75,16 @@ Value32 = REG_RD(pDevice, MacCtrl.Status); if(Value32 & MAC_STATUS_RECEIVING_CFG) { - Value32 = REG_RD(pDevice, MacCtrl.RxAutoNeg); - *pRxConfig = (unsigned short) Value32; + Value32 = REG_RD(pDevice, MacCtrl.RxAutoNeg); + *pRxConfig = (unsigned short) Value32; - Retcode = AN_TRUE; + Retcode = AN_TRUE; } return Retcode; } - /******************************************************************************/ /* Description: */ /* */ @@ -102,7 +98,7 @@ for(j = 0; j < sizeof(AN_STATE_INFO); j++) { - ((unsigned char *) pAnInfo)[j] = 0; + ((unsigned char *) pAnInfo)[j] = 0; } /* Initialize the default advertisement register. */ @@ -113,7 +109,6 @@ } - /******************************************************************************/ /* Description: */ /* */ @@ -130,14 +125,14 @@ /* Get the current time. */ if(pAnInfo->State == AN_STATE_UNKNOWN) { - pAnInfo->RxConfig.AsUSHORT = 0; - pAnInfo->CurrentTime_us = 0; - pAnInfo->LinkTime_us = 0; - pAnInfo->AbilityMatchCfg = 0; - pAnInfo->AbilityMatchCnt = 0; - pAnInfo->AbilityMatch = AN_FALSE; - pAnInfo->IdleMatch = AN_FALSE; - pAnInfo->AckMatch = AN_FALSE; + pAnInfo->RxConfig.AsUSHORT = 0; + pAnInfo->CurrentTime_us = 0; + pAnInfo->LinkTime_us = 0; + pAnInfo->AbilityMatchCfg = 0; + pAnInfo->AbilityMatchCnt = 0; + pAnInfo->AbilityMatch = AN_FALSE; + pAnInfo->IdleMatch = AN_FALSE; + pAnInfo->AckMatch = AN_FALSE; } /* Increment the timer tick. This function is called every microsecon. */ @@ -147,43 +142,43 @@ /* corresponding conditions are satisfied. */ if(MM_AnRxConfig(pAnInfo, &RxConfig)) { - if(RxConfig != pAnInfo->AbilityMatchCfg) - { - pAnInfo->AbilityMatchCfg = RxConfig; - pAnInfo->AbilityMatch = AN_FALSE; - pAnInfo->AbilityMatchCnt = 0; - } - else - { - pAnInfo->AbilityMatchCnt++; - if(pAnInfo->AbilityMatchCnt > 1) - { - pAnInfo->AbilityMatch = AN_TRUE; - pAnInfo->AbilityMatchCfg = RxConfig; - } - } + if(RxConfig != pAnInfo->AbilityMatchCfg) + { + pAnInfo->AbilityMatchCfg = RxConfig; + pAnInfo->AbilityMatch = AN_FALSE; + pAnInfo->AbilityMatchCnt = 0; + } + else + { + pAnInfo->AbilityMatchCnt++; + if(pAnInfo->AbilityMatchCnt > 1) + { + pAnInfo->AbilityMatch = AN_TRUE; + pAnInfo->AbilityMatchCfg = RxConfig; + } + } - if(RxConfig & AN_CONFIG_ACK) - { - pAnInfo->AckMatch = AN_TRUE; - } - else - { - pAnInfo->AckMatch = AN_FALSE; - } + if(RxConfig & AN_CONFIG_ACK) + { + pAnInfo->AckMatch = AN_TRUE; + } + else + { + pAnInfo->AckMatch = AN_FALSE; + } - pAnInfo->IdleMatch = AN_FALSE; + pAnInfo->IdleMatch = AN_FALSE; } else { - pAnInfo->IdleMatch = AN_TRUE; + pAnInfo->IdleMatch = AN_TRUE; - pAnInfo->AbilityMatchCfg = 0; - pAnInfo->AbilityMatchCnt = 0; - pAnInfo->AbilityMatch = AN_FALSE; - pAnInfo->AckMatch = AN_FALSE; + pAnInfo->AbilityMatchCfg = 0; + pAnInfo->AbilityMatchCnt = 0; + pAnInfo->AbilityMatch = AN_FALSE; + pAnInfo->AckMatch = AN_FALSE; - RxConfig = 0; + RxConfig = 0; } /* Save the last Config. */ @@ -195,218 +190,218 @@ /* Autoneg state machine as defined in 802.3z section 37.3.1.5. */ switch(pAnInfo->State) { - case AN_STATE_UNKNOWN: - if(pAnInfo->mr_an_enable || pAnInfo->mr_restart_an) - { - pAnInfo->CurrentTime_us = 0; - pAnInfo->State = AN_STATE_AN_ENABLE; - } + case AN_STATE_UNKNOWN: + if(pAnInfo->mr_an_enable || pAnInfo->mr_restart_an) + { + pAnInfo->CurrentTime_us = 0; + pAnInfo->State = AN_STATE_AN_ENABLE; + } - /* Fall through.*/ + /* Fall through.*/ - case AN_STATE_AN_ENABLE: - pAnInfo->mr_an_complete = AN_FALSE; - pAnInfo->mr_page_rx = AN_FALSE; + case AN_STATE_AN_ENABLE: + pAnInfo->mr_an_complete = AN_FALSE; + pAnInfo->mr_page_rx = AN_FALSE; - if(pAnInfo->mr_an_enable) - { - pAnInfo->LinkTime_us = 0; - pAnInfo->AbilityMatchCfg = 0; - pAnInfo->AbilityMatchCnt = 0; - pAnInfo->AbilityMatch = AN_FALSE; - pAnInfo->IdleMatch = AN_FALSE; - pAnInfo->AckMatch = AN_FALSE; + if(pAnInfo->mr_an_enable) + { + pAnInfo->LinkTime_us = 0; + pAnInfo->AbilityMatchCfg = 0; + pAnInfo->AbilityMatchCnt = 0; + pAnInfo->AbilityMatch = AN_FALSE; + pAnInfo->IdleMatch = AN_FALSE; + pAnInfo->AckMatch = AN_FALSE; - pAnInfo->State = AN_STATE_AN_RESTART_INIT; - } - else - { - pAnInfo->State = AN_STATE_DISABLE_LINK_OK; - } - break; + pAnInfo->State = AN_STATE_AN_RESTART_INIT; + } + else + { + pAnInfo->State = AN_STATE_DISABLE_LINK_OK; + } + break; - case AN_STATE_AN_RESTART_INIT: - pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; - pAnInfo->mr_np_loaded = AN_FALSE; + case AN_STATE_AN_RESTART_INIT: + pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; + pAnInfo->mr_np_loaded = AN_FALSE; - pAnInfo->TxConfig.AsUSHORT = 0; - MM_AnTxConfig(pAnInfo); + pAnInfo->TxConfig.AsUSHORT = 0; + MM_AnTxConfig(pAnInfo); - AnRet = AUTONEG_STATUS_TIMER_ENABLED; + AnRet = AUTONEG_STATUS_TIMER_ENABLED; - pAnInfo->State = AN_STATE_AN_RESTART; + pAnInfo->State = AN_STATE_AN_RESTART; - /* Fall through.*/ + /* Fall through.*/ - case AN_STATE_AN_RESTART: - /* Get the current time and compute the delta with the saved */ - /* link timer. */ - Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; - if(Delta_us > AN_LINK_TIMER_INTERVAL_US) - { - pAnInfo->State = AN_STATE_ABILITY_DETECT_INIT; - } - else - { - AnRet = AUTONEG_STATUS_TIMER_ENABLED; - } - break; + case AN_STATE_AN_RESTART: + /* Get the current time and compute the delta with the saved */ + /* link timer. */ + Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; + if(Delta_us > AN_LINK_TIMER_INTERVAL_US) + { + pAnInfo->State = AN_STATE_ABILITY_DETECT_INIT; + } + else + { + AnRet = AUTONEG_STATUS_TIMER_ENABLED; + } + break; - case AN_STATE_DISABLE_LINK_OK: - AnRet = AUTONEG_STATUS_DONE; - break; + case AN_STATE_DISABLE_LINK_OK: + AnRet = AUTONEG_STATUS_DONE; + break; - case AN_STATE_ABILITY_DETECT_INIT: - /* Note: in the state diagram, this variable is set to */ - /* mr_adv_ability<12>. Is this right?. */ - pAnInfo->mr_toggle_tx = AN_FALSE; + case AN_STATE_ABILITY_DETECT_INIT: + /* Note: in the state diagram, this variable is set to */ + /* mr_adv_ability<12>. Is this right?. */ + pAnInfo->mr_toggle_tx = AN_FALSE; - /* Send the config as advertised in the advertisement register. */ - pAnInfo->TxConfig.AsUSHORT = 0; - pAnInfo->TxConfig.D5_FD = pAnInfo->mr_adv_full_duplex; - pAnInfo->TxConfig.D6_HD = pAnInfo->mr_adv_half_duplex; - pAnInfo->TxConfig.D7_PS1 = pAnInfo->mr_adv_sym_pause; - pAnInfo->TxConfig.D8_PS2 = pAnInfo->mr_adv_asym_pause; - pAnInfo->TxConfig.D12_RF1 = pAnInfo->mr_adv_remote_fault1; - pAnInfo->TxConfig.D13_RF2 = pAnInfo->mr_adv_remote_fault2; - pAnInfo->TxConfig.D15_NP = pAnInfo->mr_adv_next_page; + /* Send the config as advertised in the advertisement register. */ + pAnInfo->TxConfig.AsUSHORT = 0; + pAnInfo->TxConfig.D5_FD = pAnInfo->mr_adv_full_duplex; + pAnInfo->TxConfig.D6_HD = pAnInfo->mr_adv_half_duplex; + pAnInfo->TxConfig.D7_PS1 = pAnInfo->mr_adv_sym_pause; + pAnInfo->TxConfig.D8_PS2 = pAnInfo->mr_adv_asym_pause; + pAnInfo->TxConfig.D12_RF1 = pAnInfo->mr_adv_remote_fault1; + pAnInfo->TxConfig.D13_RF2 = pAnInfo->mr_adv_remote_fault2; + pAnInfo->TxConfig.D15_NP = pAnInfo->mr_adv_next_page; - MM_AnTxConfig(pAnInfo); + MM_AnTxConfig(pAnInfo); - pAnInfo->State = AN_STATE_ABILITY_DETECT; + pAnInfo->State = AN_STATE_ABILITY_DETECT; - break; + break; - case AN_STATE_ABILITY_DETECT: - if(pAnInfo->AbilityMatch == AN_TRUE && - pAnInfo->RxConfig.AsUSHORT != 0) - { - pAnInfo->State = AN_STATE_ACK_DETECT_INIT; - } + case AN_STATE_ABILITY_DETECT: + if(pAnInfo->AbilityMatch == AN_TRUE && + pAnInfo->RxConfig.AsUSHORT != 0) + { + pAnInfo->State = AN_STATE_ACK_DETECT_INIT; + } - break; + break; - case AN_STATE_ACK_DETECT_INIT: - pAnInfo->TxConfig.D14_ACK = 1; - MM_AnTxConfig(pAnInfo); + case AN_STATE_ACK_DETECT_INIT: + pAnInfo->TxConfig.D14_ACK = 1; + MM_AnTxConfig(pAnInfo); - pAnInfo->State = AN_STATE_ACK_DETECT; + pAnInfo->State = AN_STATE_ACK_DETECT; - /* Fall through. */ + /* Fall through. */ - case AN_STATE_ACK_DETECT: - if(pAnInfo->AckMatch == AN_TRUE) - { - if((pAnInfo->RxConfig.AsUSHORT & ~AN_CONFIG_ACK) == - (pAnInfo->AbilityMatchCfg & ~AN_CONFIG_ACK)) - { - pAnInfo->State = AN_STATE_COMPLETE_ACK_INIT; - } - else - { - pAnInfo->State = AN_STATE_AN_ENABLE; - } - } - else if(pAnInfo->AbilityMatch == AN_TRUE && - pAnInfo->RxConfig.AsUSHORT == 0) - { - pAnInfo->State = AN_STATE_AN_ENABLE; - } + case AN_STATE_ACK_DETECT: + if(pAnInfo->AckMatch == AN_TRUE) + { + if((pAnInfo->RxConfig.AsUSHORT & ~AN_CONFIG_ACK) == + (pAnInfo->AbilityMatchCfg & ~AN_CONFIG_ACK)) + { + pAnInfo->State = AN_STATE_COMPLETE_ACK_INIT; + } + else + { + pAnInfo->State = AN_STATE_AN_ENABLE; + } + } + else if(pAnInfo->AbilityMatch == AN_TRUE && + pAnInfo->RxConfig.AsUSHORT == 0) + { + pAnInfo->State = AN_STATE_AN_ENABLE; + } - break; + break; - case AN_STATE_COMPLETE_ACK_INIT: - /* Make sure invalid bits are not set. */ - if(pAnInfo->RxConfig.bits.D0 || pAnInfo->RxConfig.bits.D1 || - pAnInfo->RxConfig.bits.D2 || pAnInfo->RxConfig.bits.D3 || - pAnInfo->RxConfig.bits.D4 || pAnInfo->RxConfig.bits.D9 || - pAnInfo->RxConfig.bits.D10 || pAnInfo->RxConfig.bits.D11) - { - AnRet = AUTONEG_STATUS_FAILED; - break; - } + case AN_STATE_COMPLETE_ACK_INIT: + /* Make sure invalid bits are not set. */ + if(pAnInfo->RxConfig.bits.D0 || pAnInfo->RxConfig.bits.D1 || + pAnInfo->RxConfig.bits.D2 || pAnInfo->RxConfig.bits.D3 || + pAnInfo->RxConfig.bits.D4 || pAnInfo->RxConfig.bits.D9 || + pAnInfo->RxConfig.bits.D10 || pAnInfo->RxConfig.bits.D11) + { + AnRet = AUTONEG_STATUS_FAILED; + break; + } - /* Set up the link partner advertisement register. */ - pAnInfo->mr_lp_adv_full_duplex = pAnInfo->RxConfig.D5_FD; - pAnInfo->mr_lp_adv_half_duplex = pAnInfo->RxConfig.D6_HD; - pAnInfo->mr_lp_adv_sym_pause = pAnInfo->RxConfig.D7_PS1; - pAnInfo->mr_lp_adv_asym_pause = pAnInfo->RxConfig.D8_PS2; - pAnInfo->mr_lp_adv_remote_fault1 = pAnInfo->RxConfig.D12_RF1; - pAnInfo->mr_lp_adv_remote_fault2 = pAnInfo->RxConfig.D13_RF2; - pAnInfo->mr_lp_adv_next_page = pAnInfo->RxConfig.D15_NP; + /* Set up the link partner advertisement register. */ + pAnInfo->mr_lp_adv_full_duplex = pAnInfo->RxConfig.D5_FD; + pAnInfo->mr_lp_adv_half_duplex = pAnInfo->RxConfig.D6_HD; + pAnInfo->mr_lp_adv_sym_pause = pAnInfo->RxConfig.D7_PS1; + pAnInfo->mr_lp_adv_asym_pause = pAnInfo->RxConfig.D8_PS2; + pAnInfo->mr_lp_adv_remote_fault1 = pAnInfo->RxConfig.D12_RF1; + pAnInfo->mr_lp_adv_remote_fault2 = pAnInfo->RxConfig.D13_RF2; + pAnInfo->mr_lp_adv_next_page = pAnInfo->RxConfig.D15_NP; - pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; + pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; - pAnInfo->mr_toggle_tx = !pAnInfo->mr_toggle_tx; - pAnInfo->mr_toggle_rx = pAnInfo->RxConfig.bits.D11; - pAnInfo->mr_np_rx = pAnInfo->RxConfig.D15_NP; - pAnInfo->mr_page_rx = AN_TRUE; + pAnInfo->mr_toggle_tx = !pAnInfo->mr_toggle_tx; + pAnInfo->mr_toggle_rx = pAnInfo->RxConfig.bits.D11; + pAnInfo->mr_np_rx = pAnInfo->RxConfig.D15_NP; + pAnInfo->mr_page_rx = AN_TRUE; - pAnInfo->State = AN_STATE_COMPLETE_ACK; - AnRet = AUTONEG_STATUS_TIMER_ENABLED; + pAnInfo->State = AN_STATE_COMPLETE_ACK; + AnRet = AUTONEG_STATUS_TIMER_ENABLED; - break; + break; - case AN_STATE_COMPLETE_ACK: - if(pAnInfo->AbilityMatch == AN_TRUE && - pAnInfo->RxConfig.AsUSHORT == 0) - { - pAnInfo->State = AN_STATE_AN_ENABLE; - break; - } + case AN_STATE_COMPLETE_ACK: + if(pAnInfo->AbilityMatch == AN_TRUE && + pAnInfo->RxConfig.AsUSHORT == 0) + { + pAnInfo->State = AN_STATE_AN_ENABLE; + break; + } - Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; + Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; - if(Delta_us > AN_LINK_TIMER_INTERVAL_US) - { - if(pAnInfo->mr_adv_next_page == 0 || - pAnInfo->mr_lp_adv_next_page == 0) - { - pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; - } - else - { - if(pAnInfo->TxConfig.bits.D15 == 0 && - pAnInfo->mr_np_rx == 0) - { - pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; - } - else - { - AnRet = AUTONEG_STATUS_FAILED; - } - } - } + if(Delta_us > AN_LINK_TIMER_INTERVAL_US) + { + if(pAnInfo->mr_adv_next_page == 0 || + pAnInfo->mr_lp_adv_next_page == 0) + { + pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; + } + else + { + if(pAnInfo->TxConfig.bits.D15 == 0 && + pAnInfo->mr_np_rx == 0) + { + pAnInfo->State = AN_STATE_IDLE_DETECT_INIT; + } + else + { + AnRet = AUTONEG_STATUS_FAILED; + } + } + } - break; + break; - case AN_STATE_IDLE_DETECT_INIT: - pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; + case AN_STATE_IDLE_DETECT_INIT: + pAnInfo->LinkTime_us = pAnInfo->CurrentTime_us; - MM_AnTxIdle(pAnInfo); + MM_AnTxIdle(pAnInfo); - pAnInfo->State = AN_STATE_IDLE_DETECT; + pAnInfo->State = AN_STATE_IDLE_DETECT; - AnRet = AUTONEG_STATUS_TIMER_ENABLED; + AnRet = AUTONEG_STATUS_TIMER_ENABLED; - break; + break; - case AN_STATE_IDLE_DETECT: - if(pAnInfo->AbilityMatch == AN_TRUE && - pAnInfo->RxConfig.AsUSHORT == 0) - { - pAnInfo->State = AN_STATE_AN_ENABLE; - break; - } + case AN_STATE_IDLE_DETECT: + if(pAnInfo->AbilityMatch == AN_TRUE && + pAnInfo->RxConfig.AsUSHORT == 0) + { + pAnInfo->State = AN_STATE_AN_ENABLE; + break; + } - Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; - if(Delta_us > AN_LINK_TIMER_INTERVAL_US) - { + Delta_us = pAnInfo->CurrentTime_us - pAnInfo->LinkTime_us; + if(Delta_us > AN_LINK_TIMER_INTERVAL_US) + { #if 0 /* if(pAnInfo->IdleMatch == AN_TRUE) */ /* { */ #endif - pAnInfo->State = AN_STATE_LINK_OK; + pAnInfo->State = AN_STATE_LINK_OK; #if 0 /* } */ /* else */ @@ -415,26 +410,26 @@ /* break; */ /* } */ #endif - } + } - break; + break; - case AN_STATE_LINK_OK: - pAnInfo->mr_an_complete = AN_TRUE; - pAnInfo->mr_link_ok = AN_TRUE; - AnRet = AUTONEG_STATUS_DONE; + case AN_STATE_LINK_OK: + pAnInfo->mr_an_complete = AN_TRUE; + pAnInfo->mr_link_ok = AN_TRUE; + AnRet = AUTONEG_STATUS_DONE; - break; + break; - case AN_STATE_NEXT_PAGE_WAIT_INIT: - break; + case AN_STATE_NEXT_PAGE_WAIT_INIT: + break; - case AN_STATE_NEXT_PAGE_WAIT: - break; + case AN_STATE_NEXT_PAGE_WAIT: + break; - default: - AnRet = AUTONEG_STATUS_FAILED; - break; + default: + AnRet = AUTONEG_STATUS_FAILED; + break; } return AnRet; diff --git a/drivers/bcm570x_autoneg.h b/drivers/bcm570x_autoneg.h index 95fcc07..7830944 100644 --- a/drivers/bcm570x_autoneg.h +++ b/drivers/bcm570x_autoneg.h @@ -16,7 +16,6 @@ #define AUTONEG_H - /******************************************************************************/ /* Constants. */ /******************************************************************************/ @@ -28,7 +27,6 @@ #define AN_FALSE 0 - /******************************************************************************/ /* Main data structure for keeping track of 802.3z auto-negotation state */ /* variables as shown in Figure 37-6 of the IEEE 802.3z specification. */ @@ -73,112 +71,112 @@ /* Tx config data */ union { - /* The TxConfig register is arranged as follows: */ - /* */ - /* MSB LSB */ - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ - /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ - struct - { + /* The TxConfig register is arranged as follows: */ + /* */ + /* MSB LSB */ + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ + /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ + struct + { #ifdef BIG_ENDIAN_HOST - unsigned int D7:1; /* PS1 */ - unsigned int D6:1; /* HD */ - unsigned int D5:1; /* FD */ - unsigned int D4:1; - unsigned int D3:1; - unsigned int D2:1; - unsigned int D1:1; - unsigned int D0:1; - unsigned int D15:1; /* NP */ - unsigned int D14:1; /* ACK */ - unsigned int D13:1; /* RF2 */ - unsigned int D12:1; /* RF1 */ - unsigned int D11:1; - unsigned int D10:1; - unsigned int D9:1; - unsigned int D8:1; /* PS2 */ + unsigned int D7:1; /* PS1 */ + unsigned int D6:1; /* HD */ + unsigned int D5:1; /* FD */ + unsigned int D4:1; + unsigned int D3:1; + unsigned int D2:1; + unsigned int D1:1; + unsigned int D0:1; + unsigned int D15:1; /* NP */ + unsigned int D14:1; /* ACK */ + unsigned int D13:1; /* RF2 */ + unsigned int D12:1; /* RF1 */ + unsigned int D11:1; + unsigned int D10:1; + unsigned int D9:1; + unsigned int D8:1; /* PS2 */ #else /* BIG_ENDIAN_HOST */ - unsigned int D8:1; /* PS2 */ - unsigned int D9:1; - unsigned int D10:1; - unsigned int D11:1; - unsigned int D12:1; /* RF1 */ - unsigned int D13:1; /* RF2 */ - unsigned int D14:1; /* ACK */ - unsigned int D15:1; /* NP */ - unsigned int D0:1; - unsigned int D1:1; - unsigned int D2:1; - unsigned int D3:1; - unsigned int D4:1; - unsigned int D5:1; /* FD */ - unsigned int D6:1; /* HD */ - unsigned int D7:1; /* PS1 */ + unsigned int D8:1; /* PS2 */ + unsigned int D9:1; + unsigned int D10:1; + unsigned int D11:1; + unsigned int D12:1; /* RF1 */ + unsigned int D13:1; /* RF2 */ + unsigned int D14:1; /* ACK */ + unsigned int D15:1; /* NP */ + unsigned int D0:1; + unsigned int D1:1; + unsigned int D2:1; + unsigned int D3:1; + unsigned int D4:1; + unsigned int D5:1; /* FD */ + unsigned int D6:1; /* HD */ + unsigned int D7:1; /* PS1 */ #endif - } bits; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; - #define D8_PS2 bits.D8 - #define D12_RF1 bits.D12 - #define D13_RF2 bits.D13 - #define D14_ACK bits.D14 - #define D15_NP bits.D15 - #define D5_FD bits.D5 - #define D6_HD bits.D6 - #define D7_PS1 bits.D7 + #define D8_PS2 bits.D8 + #define D12_RF1 bits.D12 + #define D13_RF2 bits.D13 + #define D14_ACK bits.D14 + #define D15_NP bits.D15 + #define D5_FD bits.D5 + #define D6_HD bits.D6 + #define D7_PS1 bits.D7 } TxConfig; /* Rx config data */ union { - /* The RxConfig register is arranged as follows: */ - /* */ - /* MSB LSB */ - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ - /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ - /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ - struct - { + /* The RxConfig register is arranged as follows: */ + /* */ + /* MSB LSB */ + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ + /* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8| */ + /* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+ */ + struct + { #ifdef BIG_ENDIAN_HOST unsigned int D7:1; /* PS1 */ - unsigned int D6:1; /* HD */ + unsigned int D6:1; /* HD */ unsigned int D5:1; /* FD */ - unsigned int D4:1; - unsigned int D3:1; - unsigned int D2:1; - unsigned int D1:1; - unsigned int D0:1; - unsigned int D15:1; /* NP */ - unsigned int D14:1; /* ACK */ - unsigned int D13:1; /* RF2 */ - unsigned int D12:1; /* RF1 */ - unsigned int D11:1; - unsigned int D10:1; - unsigned int D9:1; - unsigned int D8:1; /* PS2 */ + unsigned int D4:1; + unsigned int D3:1; + unsigned int D2:1; + unsigned int D1:1; + unsigned int D0:1; + unsigned int D15:1; /* NP */ + unsigned int D14:1; /* ACK */ + unsigned int D13:1; /* RF2 */ + unsigned int D12:1; /* RF1 */ + unsigned int D11:1; + unsigned int D10:1; + unsigned int D9:1; + unsigned int D8:1; /* PS2 */ #else /* BIG_ENDIAN_HOST */ - unsigned int D8:1; /* PS2 */ - unsigned int D9:1; - unsigned int D10:1; - unsigned int D11:1; - unsigned int D12:1; /* RF1 */ - unsigned int D13:1; /* RF2 */ - unsigned int D14:1; /* ACK */ - unsigned int D15:1; /* NP */ - unsigned int D0:1; - unsigned int D1:1; - unsigned int D2:1; - unsigned int D3:1; - unsigned int D4:1; - unsigned int D5:1; /* FD */ - unsigned int D6:1; /* HD */ - unsigned int D7:1; /* PS1 */ + unsigned int D8:1; /* PS2 */ + unsigned int D9:1; + unsigned int D10:1; + unsigned int D11:1; + unsigned int D12:1; /* RF1 */ + unsigned int D13:1; /* RF2 */ + unsigned int D14:1; /* ACK */ + unsigned int D15:1; /* NP */ + unsigned int D0:1; + unsigned int D1:1; + unsigned int D2:1; + unsigned int D3:1; + unsigned int D4:1; + unsigned int D5:1; /* FD */ + unsigned int D6:1; /* HD */ + unsigned int D7:1; /* PS1 */ #endif - } bits; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; } RxConfig; #define AN_CONFIG_NP 0x0080 @@ -196,177 +194,177 @@ /* Control register. */ union { - struct - { - unsigned int an_enable:1; - unsigned int loopback:1; - unsigned int reset:1; - unsigned int restart_an:1; - } bits; + struct + { + unsigned int an_enable:1; + unsigned int loopback:1; + unsigned int reset:1; + unsigned int restart_an:1; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; - #define mr_an_enable Mr0.bits.an_enable - #define mr_loopback Mr0.bits.loopback - #define mr_main_reset Mr0.bits.reset - #define mr_restart_an Mr0.bits.restart_an + #define mr_an_enable Mr0.bits.an_enable + #define mr_loopback Mr0.bits.loopback + #define mr_main_reset Mr0.bits.reset + #define mr_restart_an Mr0.bits.restart_an } Mr0; /* Status register. */ union { - struct - { - unsigned int an_complete:1; - unsigned int link_ok:1; - } bits; + struct + { + unsigned int an_complete:1; + unsigned int link_ok:1; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; - #define mr_an_complete Mr1.bits.an_complete - #define mr_link_ok Mr1.bits.link_ok + #define mr_an_complete Mr1.bits.an_complete + #define mr_link_ok Mr1.bits.link_ok } Mr1; /* Advertisement register. */ union { - struct - { - unsigned int reserved_4:5; - unsigned int full_duplex:1; - unsigned int half_duplex:1; - unsigned int sym_pause:1; - unsigned int asym_pause:1; - unsigned int reserved_11:3; - unsigned int remote_fault1:1; - unsigned int remote_fault2:1; - unsigned int reserved_14:1; - unsigned int next_page:1; - } bits; + struct + { + unsigned int reserved_4:5; + unsigned int full_duplex:1; + unsigned int half_duplex:1; + unsigned int sym_pause:1; + unsigned int asym_pause:1; + unsigned int reserved_11:3; + unsigned int remote_fault1:1; + unsigned int remote_fault2:1; + unsigned int reserved_14:1; + unsigned int next_page:1; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; - #define mr_adv_full_duplex Mr4.bits.full_duplex - #define mr_adv_half_duplex Mr4.bits.half_duplex - #define mr_adv_sym_pause Mr4.bits.sym_pause - #define mr_adv_asym_pause Mr4.bits.asym_pause - #define mr_adv_remote_fault1 Mr4.bits.remote_fault1 - #define mr_adv_remote_fault2 Mr4.bits.remote_fault2 - #define mr_adv_next_page Mr4.bits.next_page + #define mr_adv_full_duplex Mr4.bits.full_duplex + #define mr_adv_half_duplex Mr4.bits.half_duplex + #define mr_adv_sym_pause Mr4.bits.sym_pause + #define mr_adv_asym_pause Mr4.bits.asym_pause + #define mr_adv_remote_fault1 Mr4.bits.remote_fault1 + #define mr_adv_remote_fault2 Mr4.bits.remote_fault2 + #define mr_adv_next_page Mr4.bits.next_page } Mr4; /* Link partner advertisement register. */ union { - struct - { - unsigned int reserved_4:5; - unsigned int lp_full_duplex:1; - unsigned int lp_half_duplex:1; - unsigned int lp_sym_pause:1; - unsigned int lp_asym_pause:1; - unsigned int reserved_11:3; - unsigned int lp_remote_fault1:1; - unsigned int lp_remote_fault2:1; - unsigned int lp_ack:1; - unsigned int lp_next_page:1; - } bits; + struct + { + unsigned int reserved_4:5; + unsigned int lp_full_duplex:1; + unsigned int lp_half_duplex:1; + unsigned int lp_sym_pause:1; + unsigned int lp_asym_pause:1; + unsigned int reserved_11:3; + unsigned int lp_remote_fault1:1; + unsigned int lp_remote_fault2:1; + unsigned int lp_ack:1; + unsigned int lp_next_page:1; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; - #define mr_lp_adv_full_duplex Mr5.bits.lp_full_duplex - #define mr_lp_adv_half_duplex Mr5.bits.lp_half_duplex - #define mr_lp_adv_sym_pause Mr5.bits.lp_sym_pause - #define mr_lp_adv_asym_pause Mr5.bits.lp_asym_pause - #define mr_lp_adv_remote_fault1 Mr5.bits.lp_remote_fault1 - #define mr_lp_adv_remote_fault2 Mr5.bits.lp_remote_fault2 - #define mr_lp_adv_next_page Mr5.bits.lp_next_page + #define mr_lp_adv_full_duplex Mr5.bits.lp_full_duplex + #define mr_lp_adv_half_duplex Mr5.bits.lp_half_duplex + #define mr_lp_adv_sym_pause Mr5.bits.lp_sym_pause + #define mr_lp_adv_asym_pause Mr5.bits.lp_asym_pause + #define mr_lp_adv_remote_fault1 Mr5.bits.lp_remote_fault1 + #define mr_lp_adv_remote_fault2 Mr5.bits.lp_remote_fault2 + #define mr_lp_adv_next_page Mr5.bits.lp_next_page } Mr5; /* Auto-negotiation expansion register. */ union { - struct - { - unsigned int reserved_0:1; - unsigned int page_received:1; - unsigned int next_pageable:1; - unsigned int reserved_15:13; - } bits; + struct + { + unsigned int reserved_0:1; + unsigned int page_received:1; + unsigned int next_pageable:1; + unsigned int reserved_15:13; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; } Mr6; /* Auto-negotiation next page transmit register. */ union { - struct - { - unsigned int code_field:11; - unsigned int toggle:1; - unsigned int ack2:1; - unsigned int message_page:1; - unsigned int reserved_14:1; - unsigned int next_page:1; - } bits; + struct + { + unsigned int code_field:11; + unsigned int toggle:1; + unsigned int ack2:1; + unsigned int message_page:1; + unsigned int reserved_14:1; + unsigned int next_page:1; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; - #define mr_np_tx Mr7.AsUSHORT + #define mr_np_tx Mr7.AsUSHORT } Mr7; /* Auto-negotiation link partner ability register. */ union { - struct - { - unsigned int code_field:11; - unsigned int toggle:1; - unsigned int ack2:1; - unsigned int message_page:1; - unsigned int ack:1; - unsigned int next_page:1; - } bits; + struct + { + unsigned int code_field:11; + unsigned int toggle:1; + unsigned int ack2:1; + unsigned int message_page:1; + unsigned int ack:1; + unsigned int next_page:1; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; - #define mr_lp_np_rx Mr8.AsUSHORT + #define mr_lp_np_rx Mr8.AsUSHORT } Mr8; /* Extended status register. */ union { - struct - { - unsigned int reserved_11:12; - unsigned int base1000_t_hd:1; - unsigned int base1000_t_fd:1; - unsigned int base1000_x_hd:1; - unsigned int base1000_x_fd:1; - } bits; + struct + { + unsigned int reserved_11:12; + unsigned int base1000_t_hd:1; + unsigned int base1000_t_fd:1; + unsigned int base1000_x_hd:1; + unsigned int base1000_x_fd:1; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; } Mr15; /* Miscellaneous state variables. */ union { - struct - { - unsigned int toggle_tx:1; - unsigned int toggle_rx:1; - unsigned int np_rx:1; - unsigned int page_rx:1; - unsigned int np_loaded:1; - } bits; + struct + { + unsigned int toggle_tx:1; + unsigned int toggle_rx:1; + unsigned int np_rx:1; + unsigned int page_rx:1; + unsigned int np_loaded:1; + } bits; - unsigned short AsUSHORT; + unsigned short AsUSHORT; - #define mr_toggle_tx MrMisc.bits.toggle_tx - #define mr_toggle_rx MrMisc.bits.toggle_rx - #define mr_np_rx MrMisc.bits.np_rx - #define mr_page_rx MrMisc.bits.page_rx - #define mr_np_loaded MrMisc.bits.np_loaded + #define mr_toggle_tx MrMisc.bits.toggle_tx + #define mr_toggle_rx MrMisc.bits.toggle_rx + #define mr_np_rx MrMisc.bits.np_rx + #define mr_page_rx MrMisc.bits.page_rx + #define mr_np_loaded MrMisc.bits.np_loaded } MrMisc; @@ -377,7 +375,6 @@ } AN_STATE_INFO, *PAN_STATE_INFO; - /******************************************************************************/ /* Return code of Autoneg8023z. */ /******************************************************************************/ @@ -391,7 +388,6 @@ } AUTONEG_STATUS, *PAUTONEG_STATUS; - /******************************************************************************/ /* Function prototypes. */ /******************************************************************************/ @@ -400,7 +396,6 @@ void AutonegInit(PAN_STATE_INFO pAnInfo); - /******************************************************************************/ /* The following functions are defined in the os-dependent module. */ /******************************************************************************/ @@ -410,6 +405,4 @@ char MM_AnRxConfig(PAN_STATE_INFO pAnInfo, unsigned short *pRxConfig); - #endif /* AUTONEG_H */ - diff --git a/drivers/bcm570x_bits.h b/drivers/bcm570x_bits.h index 79b1052..615d61e 100644 --- a/drivers/bcm570x_bits.h +++ b/drivers/bcm570x_bits.h @@ -17,7 +17,6 @@ #define BITS_H - /******************************************************************************/ /* Bit Mask definitions */ /******************************************************************************/ @@ -56,4 +55,3 @@ #define BIT_31 0x80000000 #endif /* BITS_H */ - diff --git a/drivers/bcm570x_debug.h b/drivers/bcm570x_debug.h index 0a688cf..88e209b 100644 --- a/drivers/bcm570x_debug.h +++ b/drivers/bcm570x_debug.h @@ -34,7 +34,7 @@ #define CP_RESET 0x200000 #define CP_ALL (CP_INIT | CP_SEND | CP_RCV | CP_INT | \ - CP_RESET | CP_UINIT) + CP_RESET | CP_UINIT) #define CP_MASK 0xffff0000 @@ -94,7 +94,7 @@ #if DBG #define DbgMessage(CNTRL, MESSAGE) \ if((CNTRL & DBG_MSG_CP) && ((CNTRL & LV_MASK) <= DBG_MSG_LV)) \ - printf MESSAGE + printf MESSAGE #define DbgBreak() DbgBreakPoint() #undef STATIC #define STATIC @@ -106,6 +106,4 @@ #endif /* DBG */ - #endif /* DEBUG_H */ - diff --git a/drivers/bcm570x_lm.h b/drivers/bcm570x_lm.h index 79073a8..607f3fd 100644 --- a/drivers/bcm570x_lm.h +++ b/drivers/bcm570x_lm.h @@ -20,7 +20,6 @@ #include "bcm570x_bits.h" - /******************************************************************************/ /* Basic types. */ /******************************************************************************/ @@ -50,13 +49,13 @@ /* void LM_INC_PHYSICAL_ADDRESS(PLM_PHYSICAL_ADDRESS pAddr,LM_UINT32 IncSize) */ #define LM_INC_PHYSICAL_ADDRESS(pAddr, IncSize) \ { \ - LM_UINT32 OrgLow; \ - \ - OrgLow = (pAddr)->Low; \ - (pAddr)->Low += IncSize; \ - if((pAddr)->Low < OrgLow) { \ - (pAddr)->High++; /* Wrap around. */ \ - } \ + LM_UINT32 OrgLow; \ + \ + OrgLow = (pAddr)->Low; \ + (pAddr)->Low += IncSize; \ + if((pAddr)->Low < OrgLow) { \ + (pAddr)->High++; /* Wrap around. */ \ + } \ } @@ -69,7 +68,6 @@ #endif /* OFFSETOF */ - /******************************************************************************/ /* Simple macros. */ /******************************************************************************/ @@ -103,7 +101,6 @@ ((unsigned char *) (_Dst))[5] = ((unsigned char *) (_Src))[5]; - /******************************************************************************/ /* Constants. */ /******************************************************************************/ @@ -133,7 +130,6 @@ #define LM_PROMISCUOUS_MODE 0x10000 - /******************************************************************************/ /* PCI registers. */ /******************************************************************************/ @@ -191,12 +187,11 @@ #define DECLARE_FRAG_LIST_BUFFER_TYPE(_FRAG_LIST_TYPE_NAME, _MAX_FRAG_COUNT) \ typedef struct { \ - LM_FRAG_LIST FragList; \ - LM_FRAG FragListBuffer[_MAX_FRAG_COUNT-1]; \ + LM_FRAG_LIST FragList; \ + LM_FRAG FragListBuffer[_MAX_FRAG_COUNT-1]; \ } _FRAG_LIST_TYPE_NAME, *P##_FRAG_LIST_TYPE_NAME - /******************************************************************************/ /* Status codes. */ /******************************************************************************/ @@ -223,7 +218,6 @@ typedef LM_UINT LM_STATUS, *PLM_STATUS; - /******************************************************************************/ /* Requested media type. */ /******************************************************************************/ @@ -247,7 +241,6 @@ typedef LM_UINT32 LM_REQUESTED_MEDIA_TYPE, *PLM_REQUESTED_MEDIA_TYPE; - /******************************************************************************/ /* Media type. */ /******************************************************************************/ @@ -262,7 +255,6 @@ typedef LM_UINT32 LM_MEDIA_TYPE, *PLM_MEDIA_TYPE; - /******************************************************************************/ /* Line speed. */ /******************************************************************************/ @@ -275,7 +267,6 @@ typedef LM_UINT32 LM_LINE_SPEED, *PLM_LINE_SPEED; - /******************************************************************************/ /* Duplex mode. */ /******************************************************************************/ @@ -287,7 +278,6 @@ typedef LM_UINT32 LM_DUPLEX_MODE, *PLM_DUPLEX_MODE; - /******************************************************************************/ /* Power state. */ /******************************************************************************/ @@ -300,7 +290,6 @@ typedef LM_UINT32 LM_POWER_STATE, *PLM_POWER_STATE; - /******************************************************************************/ /* Task offloading. */ /******************************************************************************/ @@ -317,7 +306,6 @@ typedef LM_UINT32 LM_TASK_OFFLOAD, *PLM_TASK_OFFLOAD; - /******************************************************************************/ /* Flow control. */ /******************************************************************************/ @@ -337,7 +325,6 @@ typedef LM_UINT32 LM_FLOW_CONTROL, *PLM_FLOW_CONTROL; - /******************************************************************************/ /* Wake up mode. */ /******************************************************************************/ @@ -350,7 +337,6 @@ typedef LM_UINT32 LM_WAKE_UP_MODE, *PLM_WAKE_UP_MODE; - /******************************************************************************/ /* Counters. */ /******************************************************************************/ @@ -377,7 +363,6 @@ typedef LM_UINT32 LM_COUNTER_TYPE, *PLM_COUNTER_TYPE; - /******************************************************************************/ /* Forward definition. */ /******************************************************************************/ @@ -386,7 +371,6 @@ typedef struct _LM_PACKET *PLM_PACKET; - /******************************************************************************/ /* Function prototypes. */ /******************************************************************************/ @@ -427,7 +411,6 @@ int LM_BlinkLED(PLM_DEVICE_BLOCK pDevice, LM_UINT32 BlinkDuration); - /******************************************************************************/ /* These are the OS specific functions called by LMAC. */ /******************************************************************************/ @@ -466,4 +449,3 @@ #endif /* LM_H */ - diff --git a/drivers/bcm570x_mm.h b/drivers/bcm570x_mm.h index badd0d2..b7cbf8a 100644 --- a/drivers/bcm570x_mm.h +++ b/drivers/bcm570x_mm.h @@ -56,14 +56,14 @@ /* Embedded device control */ typedef struct _UM_DEVICE_BLOCK { LM_DEVICE_BLOCK lm_dev; - pci_dev_t pdev; + pci_dev_t pdev; char *name; void *mem_list[MAX_MEM]; dma_addr_t dma_list[MAX_MEM]; int mem_size_list[MAX_MEM]; int mem_list_num; - int mtu; - int index; + int mtu; + int index; int opened; int delayed_link_ind; /* Delay link status during initial load */ int adapter_just_inited; /* the first few seconds after init. */ @@ -72,7 +72,7 @@ int adaptive_expiry; int crc_counter_expiry; /* new -- unsupported */ int poll_tib_expiry; /* new -- unsupported */ - int tx_full; + int tx_full; int tx_queued; int line_speed; /* in Mbps, 0 if link is down */ UM_RX_PACKET_Q rx_out_of_buf_q; @@ -81,14 +81,14 @@ int rx_buf_repl_panic_thresh; int rx_buf_align; /* new -- unsupported */ int do_global_lock; - mutex_t global_lock; - mutex_t undi_lock; + mutex_t global_lock; + mutex_t undi_lock; long undi_flags; volatile int interrupt; int tasklet_pending; int tasklet_busy; /* new -- unsupported */ - int rx_pkt; - int tx_pkt; + int rx_pkt; + int tx_pkt; #ifdef NICE_SUPPORT /* unsupported, this is a linux ioctl */ void (*nice_rx)(void*, void* ); void* nice_ctx; @@ -100,19 +100,19 @@ unsigned int rx_curr_coalesce_ticks; unsigned int tx_curr_coalesce_frames; /* new -- unsupported */ #if TIGON3_DEBUG /* new -- unsupported */ - uint tx_zc_count; - uint tx_chksum_count; - uint tx_himem_count; - uint rx_good_chksum_count; + uint tx_zc_count; + uint tx_chksum_count; + uint tx_himem_count; + uint rx_good_chksum_count; #endif - unsigned int rx_bad_chksum_count; /* new -- unsupported */ - unsigned int rx_misc_errors; /* new -- unsupported */ + unsigned int rx_bad_chksum_count; /* new -- unsupported */ + unsigned int rx_misc_errors; /* new -- unsupported */ } UM_DEVICE_BLOCK, *PUM_DEVICE_BLOCK; /* Physical/PCI DMA address */ typedef union { - dma_addr_t dma_map; + dma_addr_t dma_map; } dma_map_t; /* Packet */ @@ -130,8 +130,8 @@ /* Macro for setting 64bit address struct */ #define set_64bit_addr(paddr, low, high) \ - (paddr)->Low = low; \ - (paddr)->High = high; + (paddr)->Low = low; \ + (paddr)->High = high; /* Assume that PCI controller's view of host memory is same as host */ diff --git a/drivers/bcm570x_queue.h b/drivers/bcm570x_queue.h index bc32ad7..336b3ca 100644 --- a/drivers/bcm570x_queue.h +++ b/drivers/bcm570x_queue.h @@ -103,14 +103,13 @@ /* Declare queue type macro. */ #define DECLARE_QUEUE_TYPE(_QUEUE_TYPE, _QUEUE_SIZE) \ - \ + \ typedef struct { \ - QQ_CONTAINER Container; \ - PQQ_ENTRY EntryBuffer[_QUEUE_SIZE]; \ + QQ_CONTAINER Container; \ + PQQ_ENTRY EntryBuffer[_QUEUE_SIZE]; \ } _QUEUE_TYPE, *P##_QUEUE_TYPE - /******************************************************************************/ /* Compilation switches. */ /******************************************************************************/ @@ -144,7 +143,6 @@ } /* QQ_InitQueue */ - /******************************************************************************/ /* Description: */ /* */ @@ -161,7 +159,6 @@ } /* QQ_Full */ - /******************************************************************************/ /* Description: */ /* */ @@ -174,7 +171,6 @@ } /* QQ_Empty */ - /******************************************************************************/ /* Description: */ /* */ @@ -187,7 +183,6 @@ } /* QQ_GetSize */ - /******************************************************************************/ /* Description: */ /* */ @@ -200,7 +195,6 @@ } /* QQ_GetEntryCnt */ - /******************************************************************************/ /* Description: */ /* */ @@ -218,7 +212,7 @@ #if !defined(QQ_NO_OVERFLOW_CHECK) if(Head == pQueue->Tail) { - return 0; + return 0; } /* if */ #endif /* QQ_NO_OVERFLOW_CHECK */ @@ -231,7 +225,6 @@ } /* QQ_PushHead */ - /******************************************************************************/ /* Description: */ /* */ @@ -247,13 +240,13 @@ Tail = pQueue->Tail; if(Tail == 0) { - Tail = pQueue->Size; + Tail = pQueue->Size; } /* if */ Tail--; #if !defined(QQ_NO_OVERFLOW_CHECK) if(Tail == pQueue->Head) { - return 0; + return 0; } /* if */ #endif /* QQ_NO_OVERFLOW_CHECK */ @@ -266,7 +259,6 @@ } /* QQ_PushTail */ - /******************************************************************************/ /* Description: */ /* */ @@ -282,12 +274,12 @@ #if !defined(QQ_NO_UNDERFLOW_CHECK) if(Head == pQueue->Tail) { - return (PQQ_ENTRY) 0; + return (PQQ_ENTRY) 0; } /* if */ #endif /* QQ_NO_UNDERFLOW_CHECK */ if(Head == 0) { - Head = pQueue->Size; + Head = pQueue->Size; } /* if */ Head--; @@ -304,7 +296,6 @@ } /* QQ_PopHead */ - /******************************************************************************/ /* Description: */ /* */ @@ -320,7 +311,7 @@ #if !defined(QQ_NO_UNDERFLOW_CHECK) if(Tail == pQueue->Head) { - return (PQQ_ENTRY) 0; + return (PQQ_ENTRY) 0; } /* if */ #endif /* QQ_NO_UNDERFLOW_CHECK */ @@ -337,7 +328,6 @@ } /* QQ_PopTail */ - /******************************************************************************/ /* Description: */ /* */ @@ -350,16 +340,16 @@ { if(Idx >= atomic_read(&pQueue->EntryCnt)) { - return (PQQ_ENTRY) 0; + return (PQQ_ENTRY) 0; } if(pQueue->Head > Idx) { - Idx = pQueue->Head - Idx; + Idx = pQueue->Head - Idx; } else { - Idx = pQueue->Size - (Idx - pQueue->Head); + Idx = pQueue->Size - (Idx - pQueue->Head); } Idx--; @@ -367,7 +357,6 @@ } - /******************************************************************************/ /* Description: */ /* */ @@ -380,13 +369,13 @@ { if(Idx >= atomic_read(&pQueue->EntryCnt)) { - return (PQQ_ENTRY) 0; + return (PQQ_ENTRY) 0; } Idx += pQueue->Tail; if(Idx >= pQueue->Size) { - Idx = Idx - pQueue->Size; + Idx = Idx - pQueue->Size; } return pQueue->Array[Idx]; @@ -395,5 +384,4 @@ #endif /* QQ_USE_MACROS */ - #endif /* QUEUE_H */ diff --git a/drivers/cfb_console.c b/drivers/cfb_console.c index d428b17..22382af 100644 --- a/drivers/cfb_console.c +++ b/drivers/cfb_console.c @@ -60,34 +60,34 @@ VIDEO_GETC_FCT - keyboard_getc function CONFIG_CONSOLE_CURSOR - on/off drawing cursor is done with delay - loop in VIDEO_TSTC_FCT (i8042) + loop in VIDEO_TSTC_FCT (i8042) CFG_CONSOLE_BLINK_COUNT - value for delay loop - blink rate CONFIG_CONSOLE_TIME - display time/date in upper right corner, - needs CFG_CMD_DATE and CONFIG_CONSOLE_CURSOR + needs CFG_CMD_DATE and CONFIG_CONSOLE_CURSOR CONFIG_VIDEO_LOGO - display Linux Logo in upper left corner CONFIG_VIDEO_BMP_LOGO - use bmp_logo instead of linux_logo CONFIG_CONSOLE_EXTRA_INFO - display additional board information strings - that normaly goes to serial port. This define - requires a board specific function: - video_drawstring (VIDEO_INFO_X, - VIDEO_INFO_Y + i*VIDEO_FONT_HEIGHT, - info); - that fills a info buffer at i=row. - s.a: board/eltec/bab7xx. + that normaly goes to serial port. This define + requires a board specific function: + video_drawstring (VIDEO_INFO_X, + VIDEO_INFO_Y + i*VIDEO_FONT_HEIGHT, + info); + that fills a info buffer at i=row. + s.a: board/eltec/bab7xx. CONFIG_VGA_AS_SINGLE_DEVICE - If set the framebuffer device will be initialised - as an output only device. The Keyboard driver - will not be set-up. This may be used, if you - have none or more than one Keyboard devices - (USB Keyboard, AT Keyboard). + as an output only device. The Keyboard driver + will not be set-up. This may be used, if you + have none or more than one Keyboard devices + (USB Keyboard, AT Keyboard). CONFIG_VIDEO_SW_CURSOR: - Draws a cursor after the last character. No - blinking is provided. Uses the macros CURSOR_SET - and CURSOR_OFF. + blinking is provided. Uses the macros CURSOR_SET + and CURSOR_OFF. CONFIG_VIDEO_HW_CURSOR: - Uses the hardware cursor capability of the - graphic chip. Uses the macro CURSOR_SET. - ATTENTION: If booting an OS, the display driver - must disable the hardware register of the graphic - chip. Otherwise a blinking field is displayed + graphic chip. Uses the macro CURSOR_SET. + ATTENTION: If booting an OS, the display driver + must disable the hardware register of the graphic + chip. Otherwise a blinking field is displayed */ #include @@ -214,7 +214,7 @@ #endif #define CURSOR_ON #define CURSOR_OFF video_putchar(console_col * VIDEO_FONT_WIDTH,\ - console_row * VIDEO_FONT_HEIGHT, ' '); + console_row * VIDEO_FONT_HEIGHT, ' '); #define CURSOR_SET video_set_cursor(); #endif /* CONFIG_VIDEO_SW_CURSOR */ @@ -226,7 +226,7 @@ #define CURSOR_ON #define CURSOR_OFF #define CURSOR_SET video_set_hw_cursor(console_col * VIDEO_FONT_WIDTH, \ - (console_row * VIDEO_FONT_HEIGHT) + VIDEO_LOGO_HEIGHT); + (console_row * VIDEO_FONT_HEIGHT) + VIDEO_LOGO_HEIGHT); #endif /* CONFIG_VIDEO_HW_CURSOR */ #ifdef CONFIG_VIDEO_LOGO @@ -281,9 +281,9 @@ #ifdef VIDEO_FB_LITTLE_ENDIAN #define SWAP16(x) ((((x) & 0x00ff) << 8) | ( (x) >> 8)) #define SWAP32(x) ((((x) & 0x000000ff) << 24) | (((x) & 0x0000ff00) << 8)|\ - (((x) & 0x00ff0000) >> 8) | (((x) & 0xff000000) >> 24) ) + (((x) & 0x00ff0000) >> 8) | (((x) & 0xff000000) >> 24) ) #define SHORTSWAP32(x) ((((x) & 0x000000ff) << 8) | (((x) & 0x0000ff00) >> 8)|\ - (((x) & 0x00ff0000) << 8) | (((x) & 0xff000000) >> 8) ) + (((x) & 0x00ff0000) << 8) | (((x) & 0xff000000) >> 8) ) #else #define SWAP16(x) (x) #define SWAP32(x) (x) @@ -317,52 +317,52 @@ static u32 eorx, fgx, bgx; /* color pats */ static const int video_font_draw_table8[] = { - 0x00000000, 0x000000ff, 0x0000ff00, 0x0000ffff, - 0x00ff0000, 0x00ff00ff, 0x00ffff00, 0x00ffffff, - 0xff000000, 0xff0000ff, 0xff00ff00, 0xff00ffff, - 0xffff0000, 0xffff00ff, 0xffffff00, 0xffffffff }; + 0x00000000, 0x000000ff, 0x0000ff00, 0x0000ffff, + 0x00ff0000, 0x00ff00ff, 0x00ffff00, 0x00ffffff, + 0xff000000, 0xff0000ff, 0xff00ff00, 0xff00ffff, + 0xffff0000, 0xffff00ff, 0xffffff00, 0xffffffff }; static const int video_font_draw_table15[] = { - 0x00000000, 0x00007fff, 0x7fff0000, 0x7fff7fff }; + 0x00000000, 0x00007fff, 0x7fff0000, 0x7fff7fff }; static const int video_font_draw_table16[] = { - 0x00000000, 0x0000ffff, 0xffff0000, 0xffffffff }; + 0x00000000, 0x0000ffff, 0xffff0000, 0xffffffff }; static const int video_font_draw_table24[16][3] = { - { 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00ffffff }, - { 0x00000000, 0x0000ffff, 0xff000000 }, - { 0x00000000, 0x0000ffff, 0xffffffff }, - { 0x000000ff, 0xffff0000, 0x00000000 }, - { 0x000000ff, 0xffff0000, 0x00ffffff }, - { 0x000000ff, 0xffffffff, 0xff000000 }, - { 0x000000ff, 0xffffffff, 0xffffffff }, - { 0xffffff00, 0x00000000, 0x00000000 }, - { 0xffffff00, 0x00000000, 0x00ffffff }, - { 0xffffff00, 0x0000ffff, 0xff000000 }, - { 0xffffff00, 0x0000ffff, 0xffffffff }, - { 0xffffffff, 0xffff0000, 0x00000000 }, - { 0xffffffff, 0xffff0000, 0x00ffffff }, - { 0xffffffff, 0xffffffff, 0xff000000 }, - { 0xffffffff, 0xffffffff, 0xffffffff } }; + { 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00ffffff }, + { 0x00000000, 0x0000ffff, 0xff000000 }, + { 0x00000000, 0x0000ffff, 0xffffffff }, + { 0x000000ff, 0xffff0000, 0x00000000 }, + { 0x000000ff, 0xffff0000, 0x00ffffff }, + { 0x000000ff, 0xffffffff, 0xff000000 }, + { 0x000000ff, 0xffffffff, 0xffffffff }, + { 0xffffff00, 0x00000000, 0x00000000 }, + { 0xffffff00, 0x00000000, 0x00ffffff }, + { 0xffffff00, 0x0000ffff, 0xff000000 }, + { 0xffffff00, 0x0000ffff, 0xffffffff }, + { 0xffffffff, 0xffff0000, 0x00000000 }, + { 0xffffffff, 0xffff0000, 0x00ffffff }, + { 0xffffffff, 0xffffffff, 0xff000000 }, + { 0xffffffff, 0xffffffff, 0xffffffff } }; static const int video_font_draw_table32[16][4] = { - { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00000000, 0x00ffffff }, - { 0x00000000, 0x00000000, 0x00ffffff, 0x00000000 }, - { 0x00000000, 0x00000000, 0x00ffffff, 0x00ffffff }, - { 0x00000000, 0x00ffffff, 0x00000000, 0x00000000 }, - { 0x00000000, 0x00ffffff, 0x00000000, 0x00ffffff }, - { 0x00000000, 0x00ffffff, 0x00ffffff, 0x00000000 }, - { 0x00000000, 0x00ffffff, 0x00ffffff, 0x00ffffff }, - { 0x00ffffff, 0x00000000, 0x00000000, 0x00000000 }, - { 0x00ffffff, 0x00000000, 0x00000000, 0x00ffffff }, - { 0x00ffffff, 0x00000000, 0x00ffffff, 0x00000000 }, - { 0x00ffffff, 0x00000000, 0x00ffffff, 0x00ffffff }, - { 0x00ffffff, 0x00ffffff, 0x00000000, 0x00000000 }, - { 0x00ffffff, 0x00ffffff, 0x00000000, 0x00ffffff }, - { 0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00000000 }, - { 0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00ffffff } }; + { 0x00000000, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00000000, 0x00ffffff }, + { 0x00000000, 0x00000000, 0x00ffffff, 0x00000000 }, + { 0x00000000, 0x00000000, 0x00ffffff, 0x00ffffff }, + { 0x00000000, 0x00ffffff, 0x00000000, 0x00000000 }, + { 0x00000000, 0x00ffffff, 0x00000000, 0x00ffffff }, + { 0x00000000, 0x00ffffff, 0x00ffffff, 0x00000000 }, + { 0x00000000, 0x00ffffff, 0x00ffffff, 0x00ffffff }, + { 0x00ffffff, 0x00000000, 0x00000000, 0x00000000 }, + { 0x00ffffff, 0x00000000, 0x00000000, 0x00ffffff }, + { 0x00ffffff, 0x00000000, 0x00ffffff, 0x00000000 }, + { 0x00ffffff, 0x00000000, 0x00ffffff, 0x00ffffff }, + { 0x00ffffff, 0x00ffffff, 0x00000000, 0x00000000 }, + { 0x00ffffff, 0x00ffffff, 0x00000000, 0x00ffffff }, + { 0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00000000 }, + { 0x00ffffff, 0x00ffffff, 0x00ffffff, 0x00ffffff } }; /******************************************************************************/ @@ -380,98 +380,98 @@ { case GDF__8BIT_INDEX: case GDF__8BIT_332RGB: - while (count--) - { - c = *s ; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) - { - u8 bits = *cdat++; - ((u32 *)dest)[0] = (video_font_draw_table8[bits >> 4] & eorx) ^ bgx; - ((u32 *)dest)[1] = (video_font_draw_table8[bits & 15] & eorx) ^ bgx; - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++; - } - break; + while (count--) + { + c = *s ; + cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; + for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) + { + u8 bits = *cdat++; + ((u32 *)dest)[0] = (video_font_draw_table8[bits >> 4] & eorx) ^ bgx; + ((u32 *)dest)[1] = (video_font_draw_table8[bits & 15] & eorx) ^ bgx; + } + dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; + s++; + } + break; case GDF_15BIT_555RGB: - while (count--) - { - c = *s ; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) - { - u8 bits = *cdat++; - ((u32 *)dest)[0] = SHORTSWAP32((video_font_draw_table15[bits >> 6] & eorx) ^ bgx); - ((u32 *)dest)[1] = SHORTSWAP32((video_font_draw_table15[bits >> 4 & 3] & eorx) ^ bgx); - ((u32 *)dest)[2] = SHORTSWAP32((video_font_draw_table15[bits >> 2 & 3] & eorx) ^ bgx); - ((u32 *)dest)[3] = SHORTSWAP32((video_font_draw_table15[bits & 3] & eorx) ^ bgx); - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++ ; - } - break; + while (count--) + { + c = *s ; + cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; + for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) + { + u8 bits = *cdat++; + ((u32 *)dest)[0] = SHORTSWAP32((video_font_draw_table15[bits >> 6] & eorx) ^ bgx); + ((u32 *)dest)[1] = SHORTSWAP32((video_font_draw_table15[bits >> 4 & 3] & eorx) ^ bgx); + ((u32 *)dest)[2] = SHORTSWAP32((video_font_draw_table15[bits >> 2 & 3] & eorx) ^ bgx); + ((u32 *)dest)[3] = SHORTSWAP32((video_font_draw_table15[bits & 3] & eorx) ^ bgx); + } + dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; + s++ ; + } + break; case GDF_16BIT_565RGB: - while (count--) - { - c = *s ; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) - { - u8 bits = *cdat++; - ((u32 *)dest)[0] = SHORTSWAP32((video_font_draw_table16[bits >> 6] & eorx) ^ bgx); - ((u32 *)dest)[1] = SHORTSWAP32((video_font_draw_table16[bits >> 4 & 3] & eorx) ^ bgx); - ((u32 *)dest)[2] = SHORTSWAP32((video_font_draw_table16[bits >> 2 & 3] & eorx) ^ bgx); - ((u32 *)dest)[3] = SHORTSWAP32((video_font_draw_table16[bits & 3] & eorx) ^ bgx); - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++ ; - } - break; + while (count--) + { + c = *s ; + cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; + for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) + { + u8 bits = *cdat++; + ((u32 *)dest)[0] = SHORTSWAP32((video_font_draw_table16[bits >> 6] & eorx) ^ bgx); + ((u32 *)dest)[1] = SHORTSWAP32((video_font_draw_table16[bits >> 4 & 3] & eorx) ^ bgx); + ((u32 *)dest)[2] = SHORTSWAP32((video_font_draw_table16[bits >> 2 & 3] & eorx) ^ bgx); + ((u32 *)dest)[3] = SHORTSWAP32((video_font_draw_table16[bits & 3] & eorx) ^ bgx); + } + dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; + s++ ; + } + break; case GDF_32BIT_X888RGB: - while (count--) - { - c = *s ; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) - { - u8 bits = *cdat++; - ((u32 *)dest)[0] = SWAP32((video_font_draw_table32[bits >> 4][0] & eorx) ^ bgx); - ((u32 *)dest)[1] = SWAP32((video_font_draw_table32[bits >> 4][1] & eorx) ^ bgx); - ((u32 *)dest)[2] = SWAP32((video_font_draw_table32[bits >> 4][2] & eorx) ^ bgx); - ((u32 *)dest)[3] = SWAP32((video_font_draw_table32[bits >> 4][3] & eorx) ^ bgx); - ((u32 *)dest)[4] = SWAP32((video_font_draw_table32[bits & 15][0] & eorx) ^ bgx); - ((u32 *)dest)[5] = SWAP32((video_font_draw_table32[bits & 15][1] & eorx) ^ bgx); - ((u32 *)dest)[6] = SWAP32((video_font_draw_table32[bits & 15][2] & eorx) ^ bgx); - ((u32 *)dest)[7] = SWAP32((video_font_draw_table32[bits & 15][3] & eorx) ^ bgx); - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++ ; - } - break; + while (count--) + { + c = *s ; + cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; + for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) + { + u8 bits = *cdat++; + ((u32 *)dest)[0] = SWAP32((video_font_draw_table32[bits >> 4][0] & eorx) ^ bgx); + ((u32 *)dest)[1] = SWAP32((video_font_draw_table32[bits >> 4][1] & eorx) ^ bgx); + ((u32 *)dest)[2] = SWAP32((video_font_draw_table32[bits >> 4][2] & eorx) ^ bgx); + ((u32 *)dest)[3] = SWAP32((video_font_draw_table32[bits >> 4][3] & eorx) ^ bgx); + ((u32 *)dest)[4] = SWAP32((video_font_draw_table32[bits & 15][0] & eorx) ^ bgx); + ((u32 *)dest)[5] = SWAP32((video_font_draw_table32[bits & 15][1] & eorx) ^ bgx); + ((u32 *)dest)[6] = SWAP32((video_font_draw_table32[bits & 15][2] & eorx) ^ bgx); + ((u32 *)dest)[7] = SWAP32((video_font_draw_table32[bits & 15][3] & eorx) ^ bgx); + } + dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; + s++ ; + } + break; case GDF_24BIT_888RGB: - while (count--) - { - c = *s ; - cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; - for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) - { - u8 bits = *cdat++; - ((u32 *)dest)[0] = (video_font_draw_table24[bits >> 4][0] & eorx) ^ bgx; - ((u32 *)dest)[1] = (video_font_draw_table24[bits >> 4][1] & eorx) ^ bgx; - ((u32 *)dest)[2] = (video_font_draw_table24[bits >> 4][2] & eorx) ^ bgx; - ((u32 *)dest)[3] = (video_font_draw_table24[bits & 15][0] & eorx) ^ bgx; - ((u32 *)dest)[4] = (video_font_draw_table24[bits & 15][1] & eorx) ^ bgx; - ((u32 *)dest)[5] = (video_font_draw_table24[bits & 15][2] & eorx) ^ bgx; - } - dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; - s++ ; - } - break; + while (count--) + { + c = *s ; + cdat = video_fontdata + c * VIDEO_FONT_HEIGHT; + for (rows = VIDEO_FONT_HEIGHT, dest = dest0; rows--; dest += VIDEO_LINE_LEN) + { + u8 bits = *cdat++; + ((u32 *)dest)[0] = (video_font_draw_table24[bits >> 4][0] & eorx) ^ bgx; + ((u32 *)dest)[1] = (video_font_draw_table24[bits >> 4][1] & eorx) ^ bgx; + ((u32 *)dest)[2] = (video_font_draw_table24[bits >> 4][2] & eorx) ^ bgx; + ((u32 *)dest)[3] = (video_font_draw_table24[bits & 15][0] & eorx) ^ bgx; + ((u32 *)dest)[4] = (video_font_draw_table24[bits & 15][1] & eorx) ^ bgx; + ((u32 *)dest)[5] = (video_font_draw_table24[bits & 15][2] & eorx) ^ bgx; + } + dest0 += VIDEO_FONT_WIDTH * VIDEO_PIXEL_SIZE; + s++ ; + } + break; } } @@ -500,7 +500,7 @@ eorx = fgx ^ bgx; /* draw cursor */ video_putchar (console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT, ' '); + console_row * VIDEO_FONT_HEIGHT, ' '); /* restore drawing colors */ eorx = fgx; fgx = bgx; @@ -524,24 +524,24 @@ sprintf(info, " %02d:%02d:%02d ", tm.tm_hour, tm.tm_min, tm.tm_sec); video_drawstring(VIDEO_VISIBLE_COLS-10*VIDEO_FONT_WIDTH, - VIDEO_INFO_Y, info); + VIDEO_INFO_Y, info); sprintf(info, "%02d.%02d.%04d", tm.tm_mday, tm.tm_mon, tm.tm_year); video_drawstring(VIDEO_VISIBLE_COLS-10*VIDEO_FONT_WIDTH, - VIDEO_INFO_Y+1*VIDEO_FONT_HEIGHT, info); + VIDEO_INFO_Y+1*VIDEO_FONT_HEIGHT, info); } #endif if (state && (last_state != state)) { - video_set_cursor(); + video_set_cursor(); } if (!state && (last_state != state)) { - /* clear cursor */ - video_putchar (console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT, ' '); + /* clear cursor */ + video_putchar (console_col * VIDEO_FONT_WIDTH, + console_row * VIDEO_FONT_HEIGHT, ' '); } last_state = state; @@ -554,7 +554,7 @@ static void memsetl (int *p, int c, int v) { while (c--) - *(p++) = v; + *(p++) = v; } #endif @@ -564,7 +564,7 @@ static void memcpyl (int *d, int *s, int c) { while (c--) - *(d++) = *(s++); + *(d++) = *(s++); } #endif @@ -612,13 +612,13 @@ if (console_col < 0) { - console_col = CONSOLE_COLS - 1; - console_row--; - if (console_row < 0) - console_row = 0; + console_col = CONSOLE_COLS - 1; + console_row--; + if (console_row < 0) + console_row = 0; } video_putchar (console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT, ' '); + console_row * VIDEO_FONT_HEIGHT, ' '); } /*****************************************************************************/ @@ -647,39 +647,38 @@ switch (c) { case 13: /* ignore */ - break; + break; case '\n': /* next line */ - console_newline(); - break; + console_newline(); + break; case 9: /* tab 8 */ - CURSOR_OFF - console_col |= 0x0008; - console_col &= ~0x0007; + CURSOR_OFF + console_col |= 0x0008; + console_col &= ~0x0007; - if (console_col >= CONSOLE_COLS) - console_newline(); - break; + if (console_col >= CONSOLE_COLS) + console_newline(); + break; case 8: /* backspace */ - console_back(); - break; + console_back(); + break; default: /* draw the char */ - video_putchar (console_col * VIDEO_FONT_WIDTH, - console_row * VIDEO_FONT_HEIGHT, c); - console_col++ ; + video_putchar (console_col * VIDEO_FONT_WIDTH, + console_row * VIDEO_FONT_HEIGHT, c); + console_col++ ; - /* check for newline */ - if (console_col >= CONSOLE_COLS) - console_newline(); + /* check for newline */ + if (console_col >= CONSOLE_COLS) + console_newline(); } CURSOR_SET } - /*****************************************************************************/ void video_puts (const char *s) @@ -687,7 +686,7 @@ int count = strlen(s); while(count--) - video_putc(*s++); + video_putc(*s++); } /*****************************************************************************/ @@ -697,25 +696,25 @@ { int skip = (width - VIDEO_LOGO_WIDTH) * VIDEO_PIXEL_SIZE, - xcount, i, - ycount = VIDEO_LOGO_HEIGHT; + xcount, i, + ycount = VIDEO_LOGO_HEIGHT; unsigned char - *source, - *dest = (unsigned char *) screen + ((y * width * VIDEO_PIXEL_SIZE) + x), - r, g, b, *logo_red, *logo_blue, *logo_green; + *source, + *dest = (unsigned char *) screen + ((y * width * VIDEO_PIXEL_SIZE) + x), + r, g, b, *logo_red, *logo_blue, *logo_green; #ifdef CONFIG_VIDEO_BMP_LOGO source = bmp_logo_bitmap; - + /* Allocate temporary space for computing colormap */ logo_red = malloc (BMP_LOGO_COLORS); logo_green = malloc (BMP_LOGO_COLORS); logo_blue = malloc (BMP_LOGO_COLORS); /* Compute color map */ for (i = 0; i < VIDEO_LOGO_COLORS; i++) { - logo_red [i] = (bmp_logo_palette [i] & 0x0f00) >> 4; - logo_green [i] = (bmp_logo_palette [i] & 0x00f0); - logo_blue [i] = (bmp_logo_palette [i] & 0x000f) << 4; + logo_red [i] = (bmp_logo_palette [i] & 0x0f00) >> 4; + logo_green [i] = (bmp_logo_palette [i] & 0x00f0); + logo_blue [i] = (bmp_logo_palette [i] & 0x000f) << 4; } #else source = linux_logo; @@ -723,61 +722,61 @@ logo_green = linux_logo_green; logo_blue = linux_logo_blue; #endif - + if (VIDEO_DATA_FORMAT == GDF__8BIT_INDEX) { - for (i = 0; i < VIDEO_LOGO_COLORS; i++) - { - video_set_lut (i + VIDEO_LOGO_LUT_OFFSET, - logo_red [i], logo_green [i], logo_blue [i]); - } + for (i = 0; i < VIDEO_LOGO_COLORS; i++) + { + video_set_lut (i + VIDEO_LOGO_LUT_OFFSET, + logo_red [i], logo_green [i], logo_blue [i]); + } } while (ycount--) { - xcount = VIDEO_LOGO_WIDTH; - while (xcount--) - { - r = logo_red [*source - VIDEO_LOGO_LUT_OFFSET]; - g = logo_green [*source - VIDEO_LOGO_LUT_OFFSET]; - b = logo_blue [*source - VIDEO_LOGO_LUT_OFFSET]; - - switch (VIDEO_DATA_FORMAT) - { - case GDF__8BIT_INDEX: - *dest = *source; - break; - case GDF__8BIT_332RGB: - *dest = ((r>>5)<<5) | ((g>>5)<<2) | (b>>6); - break; - case GDF_15BIT_555RGB: - *(unsigned short *)dest = - SWAP16((unsigned short)(((r>>3)<<10) | ((g>>3)<<5) | (b>>3))); - break; - case GDF_16BIT_565RGB: - *(unsigned short *)dest = - SWAP16((unsigned short)(((r>>3)<<11) | ((g>>2)<<5) | (b>>3))); - break; - case GDF_32BIT_X888RGB: - *(unsigned long *)dest = - SWAP32((unsigned long)((r<<16) | (g<<8) | b)); - break; - case GDF_24BIT_888RGB: + xcount = VIDEO_LOGO_WIDTH; + while (xcount--) + { + r = logo_red [*source - VIDEO_LOGO_LUT_OFFSET]; + g = logo_green [*source - VIDEO_LOGO_LUT_OFFSET]; + b = logo_blue [*source - VIDEO_LOGO_LUT_OFFSET]; + + switch (VIDEO_DATA_FORMAT) + { + case GDF__8BIT_INDEX: + *dest = *source; + break; + case GDF__8BIT_332RGB: + *dest = ((r>>5)<<5) | ((g>>5)<<2) | (b>>6); + break; + case GDF_15BIT_555RGB: + *(unsigned short *)dest = + SWAP16((unsigned short)(((r>>3)<<10) | ((g>>3)<<5) | (b>>3))); + break; + case GDF_16BIT_565RGB: + *(unsigned short *)dest = + SWAP16((unsigned short)(((r>>3)<<11) | ((g>>2)<<5) | (b>>3))); + break; + case GDF_32BIT_X888RGB: + *(unsigned long *)dest = + SWAP32((unsigned long)((r<<16) | (g<<8) | b)); + break; + case GDF_24BIT_888RGB: #ifdef VIDEO_FB_LITTLE_ENDIAN - dest[0] = b; - dest[1] = g; - dest[2] = r; + dest[0] = b; + dest[1] = g; + dest[2] = r; #else - dest[0] = r; - dest[1] = g; - dest[2] = b; + dest[0] = r; + dest[1] = g; + dest[2] = b; #endif - break; - } - source++; - dest += VIDEO_PIXEL_SIZE; - } - dest += skip; + break; + } + source++; + dest += VIDEO_PIXEL_SIZE; + } + dest += skip; } #ifdef CONFIG_VIDEO_BMP_LOGO free (logo_red); @@ -804,10 +803,10 @@ for (i = 1; i < n; i++) { - video_get_info_str (i, info); - if (*info) - video_drawstring (VIDEO_INFO_X, - VIDEO_INFO_Y + i*VIDEO_FONT_HEIGHT, info); + video_get_info_str (i, info); + if (*info) + video_drawstring (VIDEO_INFO_X, + VIDEO_INFO_Y + i*VIDEO_FONT_HEIGHT, info); } } #endif @@ -824,7 +823,7 @@ unsigned char color8; if ((pGD=video_hw_init()) == NULL) - return -1; + return -1; video_fb_address = (void*)VIDEO_FB_ADRS; #ifdef CONFIG_VIDEO_HW_CURSOR @@ -835,37 +834,37 @@ switch (VIDEO_DATA_FORMAT) { case GDF__8BIT_INDEX: - video_set_lut (0x01, CONSOLE_FG_COL, CONSOLE_FG_COL, CONSOLE_FG_COL); - video_set_lut (0x00, CONSOLE_BG_COL, CONSOLE_BG_COL, CONSOLE_BG_COL); - fgx = 0x01010101; - bgx = 0x00000000; - break; + video_set_lut (0x01, CONSOLE_FG_COL, CONSOLE_FG_COL, CONSOLE_FG_COL); + video_set_lut (0x00, CONSOLE_BG_COL, CONSOLE_BG_COL, CONSOLE_BG_COL); + fgx = 0x01010101; + bgx = 0x00000000; + break; case GDF__8BIT_332RGB: - color8 = ((CONSOLE_FG_COL & 0xe0) | ((CONSOLE_FG_COL>>3) & 0x1c) | CONSOLE_FG_COL>>6); - fgx = (color8<<24) | (color8<<16) | (color8<<8) | color8; - color8 = ((CONSOLE_BG_COL & 0xe0) | ((CONSOLE_BG_COL>>3) & 0x1c) | CONSOLE_BG_COL>>6); - bgx = (color8<<24) | (color8<<16) | (color8<<8) | color8; - break; + color8 = ((CONSOLE_FG_COL & 0xe0) | ((CONSOLE_FG_COL>>3) & 0x1c) | CONSOLE_FG_COL>>6); + fgx = (color8<<24) | (color8<<16) | (color8<<8) | color8; + color8 = ((CONSOLE_BG_COL & 0xe0) | ((CONSOLE_BG_COL>>3) & 0x1c) | CONSOLE_BG_COL>>6); + bgx = (color8<<24) | (color8<<16) | (color8<<8) | color8; + break; case GDF_15BIT_555RGB: - fgx = (((CONSOLE_FG_COL>>3)<<26) | ((CONSOLE_FG_COL>>3)<<21) | ((CONSOLE_FG_COL>>3)<<16) | - ((CONSOLE_FG_COL>>3)<<10) | ((CONSOLE_FG_COL>>3)<<5) | (CONSOLE_FG_COL>>3)); - bgx = (((CONSOLE_BG_COL>>3)<<26) | ((CONSOLE_BG_COL>>3)<<21) | ((CONSOLE_BG_COL>>3)<<16) | - ((CONSOLE_BG_COL>>3)<<10) | ((CONSOLE_BG_COL>>3)<<5) | (CONSOLE_BG_COL>>3)); - break; + fgx = (((CONSOLE_FG_COL>>3)<<26) | ((CONSOLE_FG_COL>>3)<<21) | ((CONSOLE_FG_COL>>3)<<16) | + ((CONSOLE_FG_COL>>3)<<10) | ((CONSOLE_FG_COL>>3)<<5) | (CONSOLE_FG_COL>>3)); + bgx = (((CONSOLE_BG_COL>>3)<<26) | ((CONSOLE_BG_COL>>3)<<21) | ((CONSOLE_BG_COL>>3)<<16) | + ((CONSOLE_BG_COL>>3)<<10) | ((CONSOLE_BG_COL>>3)<<5) | (CONSOLE_BG_COL>>3)); + break; case GDF_16BIT_565RGB: - fgx = (((CONSOLE_FG_COL>>3)<<27) | ((CONSOLE_FG_COL>>2)<<21) | ((CONSOLE_FG_COL>>3)<<16) | - ((CONSOLE_FG_COL>>3)<<11) | ((CONSOLE_FG_COL>>2)<<5) | (CONSOLE_FG_COL>>3)); - bgx = (((CONSOLE_BG_COL>>3)<<27) | ((CONSOLE_BG_COL>>2)<<21) | ((CONSOLE_BG_COL>>3)<<16) | - ((CONSOLE_BG_COL>>3)<<11) | ((CONSOLE_BG_COL>>2)<<5) | (CONSOLE_BG_COL>>3)); - break; + fgx = (((CONSOLE_FG_COL>>3)<<27) | ((CONSOLE_FG_COL>>2)<<21) | ((CONSOLE_FG_COL>>3)<<16) | + ((CONSOLE_FG_COL>>3)<<11) | ((CONSOLE_FG_COL>>2)<<5) | (CONSOLE_FG_COL>>3)); + bgx = (((CONSOLE_BG_COL>>3)<<27) | ((CONSOLE_BG_COL>>2)<<21) | ((CONSOLE_BG_COL>>3)<<16) | + ((CONSOLE_BG_COL>>3)<<11) | ((CONSOLE_BG_COL>>2)<<5) | (CONSOLE_BG_COL>>3)); + break; case GDF_32BIT_X888RGB: - fgx = (CONSOLE_FG_COL<<16) | (CONSOLE_FG_COL<<8) | CONSOLE_FG_COL; - bgx = (CONSOLE_BG_COL<<16) | (CONSOLE_BG_COL<<8) | CONSOLE_BG_COL; - break; + fgx = (CONSOLE_FG_COL<<16) | (CONSOLE_FG_COL<<8) | CONSOLE_FG_COL; + bgx = (CONSOLE_BG_COL<<16) | (CONSOLE_BG_COL<<8) | CONSOLE_BG_COL; + break; case GDF_24BIT_888RGB: - fgx = (CONSOLE_FG_COL<<24) | (CONSOLE_FG_COL<<16) | (CONSOLE_FG_COL<<8) | CONSOLE_FG_COL; - bgx = (CONSOLE_BG_COL<<24) | (CONSOLE_BG_COL<<16) | (CONSOLE_BG_COL<<8) | CONSOLE_BG_COL; - break; + fgx = (CONSOLE_FG_COL<<24) | (CONSOLE_FG_COL<<16) | (CONSOLE_FG_COL<<8) | CONSOLE_FG_COL; + bgx = (CONSOLE_BG_COL<<24) | (CONSOLE_BG_COL<<16) | (CONSOLE_BG_COL<<8) | CONSOLE_BG_COL; + break; } eorx = fgx ^ bgx; @@ -897,48 +896,48 @@ /* Force console i/o to serial ? */ if ((penv = getenv ("console")) != NULL) - if (strcmp (penv, "serial") == 0) - return 0; + if (strcmp (penv, "serial") == 0) + return 0; /* Init video chip - returns with framebuffer cleared */ if (video_init() == -1) - skip_dev_init = 1; + skip_dev_init = 1; #ifdef CONFIG_VGA_AS_SINGLE_DEVICE /* Devices VGA and Keyboard will be assigned seperately */ /* Init vga device */ if (!skip_dev_init) { - memset (&console_dev, 0, sizeof(console_dev)); - strcpy(console_dev.name, "vga"); - console_dev.ext = DEV_EXT_VIDEO; /* Video extensions */ - console_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM; - console_dev.putc = video_putc; /* 'putc' function */ - console_dev.puts = video_puts; /* 'puts' function */ - console_dev.tstc = NULL; /* 'tstc' function */ - console_dev.getc = NULL; /* 'getc' function */ + memset (&console_dev, 0, sizeof(console_dev)); + strcpy(console_dev.name, "vga"); + console_dev.ext = DEV_EXT_VIDEO; /* Video extensions */ + console_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM; + console_dev.putc = video_putc; /* 'putc' function */ + console_dev.puts = video_puts; /* 'puts' function */ + console_dev.tstc = NULL; /* 'tstc' function */ + console_dev.getc = NULL; /* 'getc' function */ - if (device_register (&console_dev) == 0) - return 1; + if (device_register (&console_dev) == 0) + return 1; } #else PRINTD("KBD: Keyboard init ...\n"); if (VIDEO_KBD_INIT_FCT == -1) - skip_dev_init = 1; + skip_dev_init = 1; /* Init console device */ if (!skip_dev_init) { - memset (&console_dev, 0, sizeof(console_dev)); - strcpy(console_dev.name, "console"); - console_dev.ext = DEV_EXT_VIDEO; /* Video extensions */ - console_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM; - console_dev.putc = video_putc; /* 'putc' function */ - console_dev.puts = video_puts; /* 'puts' function */ - console_dev.tstc = VIDEO_TSTC_FCT; /* 'tstc' function */ - console_dev.getc = VIDEO_GETC_FCT; /* 'getc' function */ + memset (&console_dev, 0, sizeof(console_dev)); + strcpy(console_dev.name, "console"); + console_dev.ext = DEV_EXT_VIDEO; /* Video extensions */ + console_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM; + console_dev.putc = video_putc; /* 'putc' function */ + console_dev.puts = video_puts; /* 'puts' function */ + console_dev.tstc = VIDEO_TSTC_FCT; /* 'tstc' function */ + console_dev.getc = VIDEO_GETC_FCT; /* 'getc' function */ - if (device_register (&console_dev) == 0) - return 1; + if (device_register (&console_dev) == 0) + return 1; } #endif /* CONFIG_VGA_AS_SINGLE_DEVICE */ /* No console dev available */ @@ -946,10 +945,3 @@ } #endif /* CONFIG_CFB_CONSOLE */ - - - - - - - diff --git a/drivers/ct69000.c b/drivers/ct69000.c index 5635562..ba69663 100644 --- a/drivers/ct69000.c +++ b/drivers/ct69000.c @@ -31,46 +31,46 @@ Parameters can be set via the variable "videomode" in the environment. 2 diferent ways are possible: "videomode=301" - 301 is a hexadecimal number describing the VESA - mode. Following modes are implemented: + mode. Following modes are implemented: - Colors 640x480 800x600 1024x768 1152x864 - --------+----------------------------------- - 8 bits | 0x301 0x303 0x305 0x161 - 15 bits | 0x310 0x313 0x316 0x162 - 16 bits | 0x311 0x314 0x317 0x163 - 24 bits | 0x312 0x315 0x318 ? - --------+----------------------------------- + Colors 640x480 800x600 1024x768 1152x864 + --------+----------------------------------- + 8 bits | 0x301 0x303 0x305 0x161 + 15 bits | 0x310 0x313 0x316 0x162 + 16 bits | 0x311 0x314 0x317 0x163 + 24 bits | 0x312 0x315 0x318 ? + --------+----------------------------------- "videomode=bootargs" - - the parameters are parsed from the bootargs. - The format is "NAME:VALUE,NAME:VALUE" etc. - Ex.: - "bootargs=video=ctfb:x:800,y:600,depth:16,pclk:25000" - Parameters not included in the list will be taken from - the default mode, which is one of the following: - mode:0 640x480x24 - mode:1 800x600x16 - mode:2 1024x768x8 - mode:3 960x720x24 - mode:4 1152x864x16 - if "mode" is not provided within the parameter list, - mode:0 is assumed. - Following parameters are supported: - x xres = visible resolution horizontal - y yres = visible resolution vertical - pclk pixelclocks in pico sec - le left_marging time from sync to picture in pixelclocks - ri right_marging time from picture to sync in pixelclocks - up upper_margin time from sync to picture - lo lower_margin - hs hsync_len length of horizontal sync - vs vsync_len length of vertical sync - sync see FB_SYNC_* - vmode see FB_VMODE_* - depth Color depth in bits per pixel - All other parameters in the variable bootargs are ignored. - It is also possible to set the parameters direct in the - variable "videomode", or in another variable i.e. - "myvideo" and setting the variable "videomode=myvideo".. + - the parameters are parsed from the bootargs. + The format is "NAME:VALUE,NAME:VALUE" etc. + Ex.: + "bootargs=video=ctfb:x:800,y:600,depth:16,pclk:25000" + Parameters not included in the list will be taken from + the default mode, which is one of the following: + mode:0 640x480x24 + mode:1 800x600x16 + mode:2 1024x768x8 + mode:3 960x720x24 + mode:4 1152x864x16 + if "mode" is not provided within the parameter list, + mode:0 is assumed. + Following parameters are supported: + x xres = visible resolution horizontal + y yres = visible resolution vertical + pclk pixelclocks in pico sec + le left_marging time from sync to picture in pixelclocks + ri right_marging time from picture to sync in pixelclocks + up upper_margin time from sync to picture + lo lower_margin + hs hsync_len length of horizontal sync + vs vsync_len length of vertical sync + sync see FB_SYNC_* + vmode see FB_VMODE_* + depth Color depth in bits per pixel + All other parameters in the variable bootargs are ignored. + It is also possible to set the parameters direct in the + variable "videomode", or in another variable i.e. + "myvideo" and setting the variable "videomode=myvideo".. ****************************************************************************/ #include diff --git a/drivers/dataflash.c b/drivers/dataflash.c index a0a4b62..26a6f84 100644 --- a/drivers/dataflash.c +++ b/drivers/dataflash.c @@ -97,7 +97,6 @@ } - void dataflash_print_info (void) { int i; diff --git a/drivers/ds1722.c b/drivers/ds1722.c index 34eb80c..227d816 100644 --- a/drivers/ds1722.c +++ b/drivers/ds1722.c @@ -18,24 +18,24 @@ u8 ds1722_read(int dev, int addr) { u8 res; - + ds1722_select(dev); - - ssi_tx_byte(addr); - res = ssi_rx_byte(); - + + ssi_tx_byte(addr); + res = ssi_rx_byte(); + ssi_chip_select(0); - + return res; } void ds1722_write(int dev, int addr, u8 data) { ds1722_select(dev); - - ssi_tx_byte(0x80|addr); - ssi_tx_byte(data); - + + ssi_tx_byte(0x80|addr); + ssi_tx_byte(data); + ssi_chip_select(0); } @@ -43,26 +43,26 @@ u16 ds1722_temp(int dev, int resolution) { static int useconds[] = { - 75000, 150000, 300000, 600000, 1200000 + 75000, 150000, 300000, 600000, 1200000 }; char temp; u16 res; - - + + /* set up the desired resulotion ... */ ds1722_write(dev, 0, 0xe0 | (resolution << 1)); - + /* wait while the chip measures the tremperature */ - udelay(useconds[resolution]); - + udelay(useconds[resolution]); + res = (temp = ds1722_read(dev, 2)) << 8; - - if (temp < 0) { + + if (temp < 0) { temp = (16 - (ds1722_read(dev, 1) >> 4)) & 0x0f; } else { temp = (ds1722_read(dev, 1) >> 4); } - + switch (temp) { case 0: /* .0000 */ @@ -129,7 +129,7 @@ break; } return res; - + } int ds1722_probe(int dev) diff --git a/drivers/e1000.c b/drivers/e1000.c index b4d50b8..cc50c26 100644 --- a/drivers/e1000.c +++ b/drivers/e1000.c @@ -6,26 +6,26 @@ ***************************************************************************/ /******************************************************************************* - + Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved. - - This program is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by the Free - Software Foundation; either version 2 of the License, or (at your option) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - + You should have received a copy of the GNU General Public License along with - this program; if not, write to the Free Software Foundation, Inc., 59 + this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - + The full GNU General Public License is included in this distribution in the file called LICENSE. - + Contact Information: Linux NICS Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 @@ -109,7 +109,7 @@ #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) (\ writel((value), ((a)->hw_addr + E1000_##reg + ((offset) << 2)))) #define E1000_READ_REG_ARRAY(a, reg, offset) ( \ - readl((a)->hw_addr + E1000_##reg + ((offset) << 2))) + readl((a)->hw_addr + E1000_##reg + ((offset) << 2))) #define E1000_WRITE_FLUSH(a) {uint32_t x; x = E1000_READ_REG(a, STATUS);} /****************************************************************************** @@ -133,14 +133,14 @@ /****************************************************************************** * Lowers the EEPROM's clock input. * - * hw - Struct containing variables accessed by shared code + * hw - Struct containing variables accessed by shared code * eecd - EECD's current value *****************************************************************************/ static void e1000_lower_ee_clk(struct e1000_hw *hw, uint32_t * eecd) { - /* Lower the clock input to the EEPROM (by clearing the SK bit), and then - * wait 50 microseconds. + /* Lower the clock input to the EEPROM (by clearing the SK bit), and then + * wait 50 microseconds. */ *eecd = *eecd & ~E1000_EECD_SK; E1000_WRITE_REG(hw, EECD, *eecd); @@ -163,7 +163,7 @@ /* We need to shift "count" bits out to the EEPROM. So, value in the * "data" parameter will be shifted out to the EEPROM one bit at a time. - * In order to do this, "data" must be broken down into bits. + * In order to do this, "data" must be broken down into bits. */ mask = 0x01 << (count - 1); eecd = E1000_READ_REG(hw, EECD); @@ -208,10 +208,10 @@ uint32_t i; uint16_t data; - /* In order to read a register from the EEPROM, we need to shift 16 bits + /* In order to read a register from the EEPROM, we need to shift 16 bits * in from the EEPROM. Bits are "shifted in" by raising the clock input to * the EEPROM (setting the SK bit), and then reading the value of the "DO" - * bit. During this "shifting in" process the "DI" bit should always be + * bit. During this "shifting in" process the "DI" bit should always be * clear.. */ @@ -241,7 +241,7 @@ * * hw - Struct containing variables accessed by shared code * - * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This + * Lowers EEPROM clock. Clears input pin. Sets the chip select pin. This * function should be called before issuing a command to the EEPROM. *****************************************************************************/ static void @@ -262,7 +262,7 @@ /****************************************************************************** * Returns EEPROM to a "standby" state - * + * * hw - Struct containing variables accessed by shared code *****************************************************************************/ static void @@ -302,7 +302,7 @@ * * hw - Struct containing variables accessed by shared code * offset - offset of word in the EEPROM to read - * data - word read from the EEPROM + * data - word read from the EEPROM *****************************************************************************/ static int e1000_read_eeprom(struct e1000_hw *hw, uint16_t offset, uint16_t * data) @@ -447,7 +447,7 @@ /****************************************************************************** * Verifies that the EEPROM has a valid checksum - * + * * hw - Struct containing variables accessed by shared code * * Reads the first 64 16 bit words of the EEPROM and sums the values read. @@ -470,7 +470,7 @@ } checksum += eeprom_data; } - + if (checksum == (uint16_t) EEPROM_SUM) { return 0; } else { @@ -515,7 +515,7 @@ /****************************************************************************** * Initializes receive address filters. * - * hw - Struct containing variables accessed by shared code + * hw - Struct containing variables accessed by shared code * * Places the MAC address in receive address register 0 and clears the rest * of the receive addresss registers. Clears the multicast table. Assumes @@ -566,7 +566,7 @@ /****************************************************************************** * Set the mac type member in the hw struct. - * + * * hw - Struct containing variables accessed by shared code *****************************************************************************/ static int @@ -711,8 +711,8 @@ * Performs basic configuration of the adapter. * * hw - Struct containing variables accessed by shared code - * - * Assumes that the controller has previously been reset and is in a + * + * Assumes that the controller has previously been reset and is in a * post-reset uninitialized state. Initializes the receive address registers, * multicast table, and VLAN filter table. Calls routines to setup link * configuration and flow control settings. Clears all on-chip counters. Leaves @@ -857,13 +857,13 @@ /****************************************************************************** * Configures flow control and link settings. - * + * * hw - Struct containing variables accessed by shared code - * + * * Determines which flow control settings to use. Calls the apropriate media- * specific link configuration function. Configures the flow control settings. * Assuming the adapter has a valid link partner, a valid link should be - * established. Assumes the hardware has previously been reset and the + * established. Assumes the hardware has previously been reset and the * transmitter and receiver are not enabled. *****************************************************************************/ static int @@ -950,7 +950,7 @@ * these registers will be set to a default threshold that may be * adjusted later by the driver's runtime code. However, if the * ability to transmit pause frames in not enabled, then these - * registers will be set to 0. + * registers will be set to 0. */ if (!(hw->fc & e1000_fc_tx_pause)) { E1000_WRITE_REG(hw, FCRTL, 0); @@ -992,8 +992,8 @@ int32_t ret_val; DEBUGFUNC(); - /* On adapters with a MAC newer that 82544, SW Defineable pin 1 will be - * set when the optics detect a signal. On older adapters, it will be + /* On adapters with a MAC newer that 82544, SW Defineable pin 1 will be + * set when the optics detect a signal. On older adapters, it will be * cleared when there is a signal */ ctrl = E1000_READ_REG(hw, CTRL); @@ -1013,12 +1013,12 @@ * the device accordingly. If auto-negotiation is enabled, then software * will have to set the "PAUSE" bits to the correct value in the Tranmsit * Config Word Register (TXCW) and re-start auto-negotiation. However, if - * auto-negotiation is disabled, then software will have to manually + * auto-negotiation is disabled, then software will have to manually * configure the two flow control enable bits in the CTRL register. * * The possible values of the "fc" parameter are: * 0: Flow control is completely disabled - * 1: Rx flow control is enabled (we can receive pause frames, but + * 1: Rx flow control is enabled (we can receive pause frames, but * not send pause frames). * 2: Tx flow control is enabled (we can send pause frames but we do * not support receiving pause frames). @@ -1030,8 +1030,8 @@ txcw = (E1000_TXCW_ANE | E1000_TXCW_FD); break; case e1000_fc_rx_pause: - /* RX Flow control is enabled and TX Flow control is disabled by a - * software over-ride. Since there really isn't a way to advertise + /* RX Flow control is enabled and TX Flow control is disabled by a + * software over-ride. Since there really isn't a way to advertise * that we are capable of RX Pause ONLY, we will advertise that we * support both symmetric and asymmetric RX PAUSE. Later, we will * disable the adapter's ability to send PAUSE frames. @@ -1039,7 +1039,7 @@ txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); break; case e1000_fc_tx_pause: - /* TX Flow control is enabled, and RX Flow control is disabled, by a + /* TX Flow control is enabled, and RX Flow control is disabled, by a * software over-ride. */ txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR); @@ -1070,8 +1070,8 @@ mdelay(1); /* If we have a signal (the cable is plugged in) then poll for a "Link-Up" - * indication in the Device Status Register. Time-out if a link isn't - * seen in 500 milliseconds seconds (Auto-negotiation should complete in + * indication in the Device Status Register. Time-out if a link isn't + * seen in 500 milliseconds seconds (Auto-negotiation should complete in * less than 500 milliseconds even if the other end is doing it in SW). */ if ((E1000_READ_REG(hw, CTRL) & E1000_CTRL_SWDPIN1) == signal) { @@ -1083,7 +1083,7 @@ break; } if (i == (LINK_UP_TIMEOUT / 10)) { - /* AutoNeg failed to achieve a link, so we'll call + /* AutoNeg failed to achieve a link, so we'll call * e1000_check_for_link. This routine will force the link up if we * detect a signal. This will allow us to communicate with * non-autonegotiating link partners. @@ -1284,7 +1284,7 @@ } } #else - /* If we do not wait for autonegtation to complete I + /* If we do not wait for autonegtation to complete I * do not see a valid link status. */ ret_val = e1000_wait_autoneg(hw); @@ -1558,7 +1558,7 @@ /****************************************************************************** * Forces the MAC's flow control settings. - * + * * hw - Struct containing variables accessed by shared code * * Sets the TFCE and RFCE bits in the device control register to reflect @@ -1625,7 +1625,7 @@ /****************************************************************************** * Configures flow control settings after link is established - * + * * hw - Struct containing variables accessed by shared code * * Should be called immediately after a valid link has been established. @@ -1859,8 +1859,8 @@ DEBUGFUNC(); - /* On adapters with a MAC newer that 82544, SW Defineable pin 1 will be - * set when the optics detect a signal. On older adapters, it will be + /* On adapters with a MAC newer that 82544, SW Defineable pin 1 will be + * set when the optics detect a signal. On older adapters, it will be * cleared when there is a signal */ ctrl = E1000_READ_REG(hw, CTRL); @@ -1920,7 +1920,7 @@ } } - /* Configure Flow Control now that Auto-Neg has completed. First, we + /* Configure Flow Control now that Auto-Neg has completed. First, we * need to restore the desired flow control settings because we may * have had to re-autoneg with a different link partner. */ @@ -1950,7 +1950,7 @@ NWAY_LPAR_100TX_HD_CAPS | NWAY_LPAR_100TX_FD_CAPS | NWAY_LPAR_100T4_CAPS)) { - /* If our link partner advertises anything in addition to + /* If our link partner advertises anything in addition to * gigabit, we do not need to enable TBI compatibility. */ if (hw->tbi_compatibility_on) { @@ -2151,7 +2151,7 @@ uint32_t mask; /* We need to shift "count" number of bits out to the PHY. So, the value - * in the "data" parameter will be shifted out to the PHY one bit at a + * in the "data" parameter will be shifted out to the PHY one bit at a * time. In order to do this, "data" must be broken down into bits. */ mask = 0x01; @@ -2190,7 +2190,7 @@ * * hw - Struct containing variables accessed by shared code * -* Bits are shifted in in MSB to LSB order. +* Bits are shifted in in MSB to LSB order. ******************************************************************************/ static uint16_t e1000_shift_in_mdi_bits(struct e1000_hw *hw) @@ -2360,12 +2360,12 @@ } else { /* We'll need to use the SW defined pins to shift the write command * out to the PHY. We first send a preamble to the PHY to signal the - * beginning of the MII instruction. This is done by sending 32 + * beginning of the MII instruction. This is done by sending 32 * consecutive "1" bits. */ e1000_shift_out_mdi_bits(hw, PHY_PREAMBLE, PHY_PREAMBLE_SIZE); - /* Now combine the remaining required fields that will indicate a + /* Now combine the remaining required fields that will indicate a * write operation. We use this method instead of calling the * e1000_shift_out_mdi_bits routine for each field in the command. The * format of a MII write instruction is as follows: diff --git a/drivers/e1000.h b/drivers/e1000.h index ba05ac0..0fbdc90 100644 --- a/drivers/e1000.h +++ b/drivers/e1000.h @@ -1,25 +1,25 @@ /******************************************************************************* - + Copyright(c) 1999 - 2002 Intel Corporation. All rights reserved. - - This program is free software; you can redistribute it and/or modify it - under the terms of the GNU General Public License as published by the Free - Software Foundation; either version 2 of the License, or (at your option) + + This program is free software; you can redistribute it and/or modify it + under the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2 of the License, or (at your option) any later version. - - This program is distributed in the hope that it will be useful, but WITHOUT - ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details. - + You should have received a copy of the GNU General Public License along with - this program; if not, write to the Free Software Foundation, Inc., 59 + this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - + The full GNU General Public License is included in this distribution in the file called LICENSE. - + Contact Information: Linux NICS Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497 @@ -251,7 +251,7 @@ /* This defines the bits that are set in the Interrupt Mask * Set/Read Register. Each bit is documented below: * o RXDMT0 = Receive Descriptor Minimum Threshold hit (ring 0) - * o RXSEQ = Receive Sequence Error + * o RXSEQ = Receive Sequence Error */ #define POLL_IMS_ENABLE_MASK ( \ E1000_IMS_RXDMT0 | \ @@ -275,7 +275,7 @@ /* The number of high/low register pairs in the RAR. The RAR (Receive Address * Registers) holds the directed and multicast addresses that we monitor. We * reserve one of these spots for our directed address, allowing us room for - * E1000_RAR_ENTRIES - 1 multicast addresses. + * E1000_RAR_ENTRIES - 1 multicast addresses. */ #define E1000_RAR_ENTRIES 16 @@ -475,7 +475,7 @@ /* Register Set. (82543, 82544) * * Registers are defined to be 32 bits and should be accessed as 32 bit values. - * These registers are physically located on the NIC, but are mapped into the + * These registers are physically located on the NIC, but are mapped into the * host memory address space. * * RW - register is both readable and writable @@ -1248,7 +1248,7 @@ #define E1000_MANC_IPV6_EN 0x00000800 /* Enable IPv6 */ #define E1000_MANC_SNAP_EN 0x00001000 /* Accept LLC/SNAP */ #define E1000_MANC_ARP_EN 0x00002000 /* Enable ARP Request Filtering */ -#define E1000_MANC_NEIGHBOR_EN 0x00004000 /* Enable Neighbor Discovery +#define E1000_MANC_NEIGHBOR_EN 0x00004000 /* Enable Neighbor Discovery * Filtering */ #define E1000_MANC_TCO_RESET 0x00010000 /* TCO Reset Occurred */ #define E1000_MANC_RCV_TCO_EN 0x00020000 /* Receive TCO Packets Enabled */ @@ -1287,9 +1287,9 @@ #define ID_LED_RESERVED_0000 0x0000 #define ID_LED_RESERVED_FFFF 0xFFFF #define ID_LED_DEFAULT ((ID_LED_OFF1_ON2 << 12) | \ - (ID_LED_OFF1_OFF2 << 8) | \ - (ID_LED_DEF1_DEF2 << 4) | \ - (ID_LED_DEF1_DEF2)) + (ID_LED_OFF1_OFF2 << 8) | \ + (ID_LED_DEF1_DEF2 << 4) | \ + (ID_LED_DEF1_DEF2)) #define ID_LED_DEF1_DEF2 0x1 #define ID_LED_DEF1_ON2 0x2 #define ID_LED_DEF1_OFF2 0x3 @@ -1410,26 +1410,26 @@ /* The number of bits that we need to shift right to move the "pause" * bits from the EEPROM (bits 13:12) to the "pause" (bits 8:7) field - * in the TXCW register + * in the TXCW register */ #define PAUSE_SHIFT 5 /* The number of bits that we need to shift left to move the "SWDPIO" * bits from the EEPROM (bits 8:5) to the "SWDPIO" (bits 25:22) field - * in the CTRL register + * in the CTRL register */ #define SWDPIO_SHIFT 17 /* The number of bits that we need to shift left to move the "SWDPIO_EXT" * bits from the EEPROM word F (bits 7:4) to the bits 11:8 of The * Extended CTRL register. - * in the CTRL register + * in the CTRL register */ #define SWDPIO__EXT_SHIFT 4 /* The number of bits that we need to shift left to move the "ILOS" * bit from the EEPROM (bit 4) to the "ILOS" (bit 7) field - * in the CTRL register + * in the CTRL register */ #define ILOS_SHIFT 3 @@ -1446,7 +1446,7 @@ /* TBI_ACCEPT macro definition: * * This macro requires: - * adapter = a pointer to struct e1000_hw + * adapter = a pointer to struct e1000_hw * status = the 8 bit status field of the RX descriptor with EOP set * error = the 8 bit error field of the RX descriptor with EOP set * length = the sum of all the length fields of the RX descriptors that @@ -1455,7 +1455,7 @@ * max_frame_length = the maximum frame length we want to accept. * min_frame_length = the minimum frame length we want to accept. * - * This macro is a conditional that should be used in the interrupt + * This macro is a conditional that should be used in the interrupt * handler's Rx processing routine when RxErrors have been detected. * * Typical use: @@ -1475,10 +1475,10 @@ (((errors) & E1000_RXD_ERR_FRAME_ERR_MASK) == E1000_RXD_ERR_CE) && \ ((last_byte) == CARRIER_EXTENSION) && \ (((status) & E1000_RXD_STAT_VP) ? \ - (((length) > ((adapter)->min_frame_size - VLAN_TAG_SIZE)) && \ - ((length) <= ((adapter)->max_frame_size + 1))) : \ - (((length) > (adapter)->min_frame_size) && \ - ((length) <= ((adapter)->max_frame_size + VLAN_TAG_SIZE + 1))))) + (((length) > ((adapter)->min_frame_size - VLAN_TAG_SIZE)) && \ + ((length) <= ((adapter)->max_frame_size + 1))) : \ + (((length) > (adapter)->min_frame_size) && \ + ((length) <= ((adapter)->max_frame_size + VLAN_TAG_SIZE + 1))))) /* Structures, enums, and macros for the PHY */ @@ -1589,7 +1589,7 @@ * 0 = cannot comply with msg */ #define NPTX_MSG_PAGE 0x2000 /* formatted(1)/unformatted(0) pg */ -#define NPTX_NEXT_PAGE 0x8000 /* 1 = addition NP will follow +#define NPTX_NEXT_PAGE 0x8000 /* 1 = addition NP will follow * 0 = sending last NP */ @@ -1598,13 +1598,13 @@ #define LP_RNPR_TOGGLE 0x0800 /* Toggles between exchanges * of different NP */ -#define LP_RNPR_ACKNOWLDGE2 0x1000 /* 1 = will comply with msg +#define LP_RNPR_ACKNOWLDGE2 0x1000 /* 1 = will comply with msg * 0 = cannot comply with msg */ #define LP_RNPR_MSG_PAGE 0x2000 /* formatted(1)/unformatted(0) pg */ #define LP_RNPR_ACKNOWLDGE 0x4000 /* 1 = ACK / 0 = NO ACK */ #define LP_RNPR_NEXT_PAGE 0x8000 /* 1 = addition NP will follow - * 0 = sending last NP + * 0 = sending last NP */ /* 1000BASE-T Control Register */ @@ -1651,18 +1651,18 @@ #define M88E1000_PSCR_JABBER_DISABLE 0x0001 /* 1=Jabber Function disabled */ #define M88E1000_PSCR_POLARITY_REVERSAL 0x0002 /* 1=Polarity Reversal enabled */ #define M88E1000_PSCR_SQE_TEST 0x0004 /* 1=SQE Test enabled */ -#define M88E1000_PSCR_CLK125_DISABLE 0x0010 /* 1=CLK125 low, +#define M88E1000_PSCR_CLK125_DISABLE 0x0010 /* 1=CLK125 low, * 0=CLK125 toggling */ #define M88E1000_PSCR_MDI_MANUAL_MODE 0x0000 /* MDI Crossover Mode bits 6:5 */ /* Manual MDI configuration */ #define M88E1000_PSCR_MDIX_MANUAL_MODE 0x0020 /* Manual MDIX configuration */ #define M88E1000_PSCR_AUTO_X_1000T 0x0040 /* 1000BASE-T: Auto crossover, - * 100BASE-TX/10BASE-T: + * 100BASE-TX/10BASE-T: * MDI Mode */ -#define M88E1000_PSCR_AUTO_X_MODE 0x0060 /* Auto crossover enabled - * all speeds. +#define M88E1000_PSCR_AUTO_X_MODE 0x0060 /* Auto crossover enabled + * all speeds. */ #define M88E1000_PSCR_10BT_EXT_DIST_ENABLE 0x0080 /* 1=Enable Extended 10BASE-T distance @@ -1703,7 +1703,7 @@ #define M88E1000_EPSCR_DOWN_NO_IDLE 0x8000 /* 1=Lost lock detect enabled. * Will assert lost lock and bring * link down if idle not seen - * within 1ms in 1000BASE-T + * within 1ms in 1000BASE-T */ /* Number of times we will attempt to autonegotiate before downshifting if we * are the master */ diff --git a/drivers/eepro100.c b/drivers/eepro100.c index a0bb76d..ab8f1d9 100644 --- a/drivers/eepro100.c +++ b/drivers/eepro100.c @@ -679,11 +679,11 @@ /* Shift the enable command bits out. */ for (i = (addr_len+EE_CMD_BITS-1); i >= 0; i--) { - dataval = (enable_cmd & (1 << i)) ? EE_DATA_WRITE : 0; - OUTW(dev, EE_ENB | dataval, SCBeeprom); - udelay(1); - OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom); - udelay(1); + dataval = (enable_cmd & (1 << i)) ? EE_DATA_WRITE : 0; + OUTW(dev, EE_ENB | dataval, SCBeeprom); + udelay(1); + OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom); + udelay(1); } OUTW(dev, EE_ENB, SCBeeprom); @@ -696,11 +696,11 @@ /* Shift the write command bits out. */ for (i = (addr_len+EE_CMD_BITS-1); i >= 0; i--) { - dataval = (write_cmd & (1 << i)) ? EE_DATA_WRITE : 0; - OUTW(dev, EE_ENB | dataval, SCBeeprom); - udelay(1); - OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom); - udelay(1); + dataval = (write_cmd & (1 << i)) ? EE_DATA_WRITE : 0; + OUTW(dev, EE_ENB | dataval, SCBeeprom); + udelay(1); + OUTW(dev, EE_ENB | dataval | EE_SHIFT_CLK, SCBeeprom); + udelay(1); } /* Write the data */ @@ -730,17 +730,17 @@ tmplong = 10; do { - dataval = INW(dev, SCBeeprom); - if (dataval & EE_DATA_READ) - break; - udelay(10000); + dataval = INW(dev, SCBeeprom); + if (dataval & EE_DATA_READ) + break; + udelay(10000); } while (-- tmplong); if (tmplong == 0) { - printf ("Write i82559 eeprom timed out (100 ms waiting for data ready.\n"); - return -1; + printf ("Write i82559 eeprom timed out (100 ms waiting for data ready.\n"); + return -1; } /* Terminate the EEPROM access. */ diff --git a/drivers/i8042.c b/drivers/i8042.c index ce24fc9..e21978d 100644 --- a/drivers/i8042.c +++ b/drivers/i8042.c @@ -322,20 +322,20 @@ keymap = KBD_US; if ((penv = getenv ("keymap")) != NULL) { - if (strncmp (penv, "de", 3) == 0) - keymap = KBD_GER; + if (strncmp (penv, "de", 3) == 0) + keymap = KBD_GER; } for (try = 0; try < KBD_RESET_TRIES; try++) { - if (kbd_reset() == 0) - { - kbd_mapping = keymap; - kbd_flags = NORMAL; - kbd_state = 0; - kbd_led_set(); - return 0; - } + if (kbd_reset() == 0) + { + kbd_mapping = keymap; + kbd_flags = NORMAL; + kbd_state = 0; + kbd_led_set(); + return 0; + } } return -1; } @@ -353,25 +353,25 @@ #ifdef CONFIG_CONSOLE_CURSOR if (--blinkCount == 0) { - cursor_state ^= 1; - console_cursor (cursor_state); - blinkCount = CFG_CONSOLE_BLINK_COUNT; - udelay (10); + cursor_state ^= 1; + console_cursor (cursor_state); + blinkCount = CFG_CONSOLE_BLINK_COUNT; + udelay (10); } #endif if ((in8 (I8042_STATUS_REG) & 0x01) == 0) - return 0; + return 0; else { - scan_code = in8 (I8042_DATA_REG); - if (scan_code == 0xfa) - return 0; + scan_code = in8 (I8042_DATA_REG); + if (scan_code == 0xfa) + return 0; - kbd_conv_char(scan_code); + kbd_conv_char(scan_code); - if (kbd_input != -1) - return 1; + if (kbd_input != -1) + return 1; } return 0; } @@ -389,23 +389,23 @@ while (kbd_input == -1) { - while ((in8 (I8042_STATUS_REG) & 0x01) == 0) - { + while ((in8 (I8042_STATUS_REG) & 0x01) == 0) + { #ifdef CONFIG_CONSOLE_CURSOR - if (--blinkCount==0) - { - cursor_state ^= 1; - console_cursor (cursor_state); - blinkCount = CFG_CONSOLE_BLINK_COUNT; - } - udelay (10); + if (--blinkCount==0) + { + cursor_state ^= 1; + console_cursor (cursor_state); + blinkCount = CFG_CONSOLE_BLINK_COUNT; + } + udelay (10); #endif - } + } - scan_code = in8 (I8042_DATA_REG); + scan_code = in8 (I8042_DATA_REG); - if (scan_code != 0xfa) - kbd_conv_char (scan_code); + if (scan_code != 0xfa) + kbd_conv_char (scan_code); } ret_chr = kbd_input; kbd_input = -1; @@ -419,62 +419,62 @@ { if (scan_code == 0xe0) { - kbd_flags |= EXT; - return; + kbd_flags |= EXT; + return; } /* if high bit of scan_code, set break flag */ if (scan_code & 0x80) - kbd_flags |= BRK; + kbd_flags |= BRK; else - kbd_flags &= ~BRK; + kbd_flags &= ~BRK; if ((scan_code == 0xe1) || (kbd_flags & E1)) { - if (scan_code == 0xe1) - { - kbd_flags ^= BRK; /* reset the break flag */ - kbd_flags ^= E1; /* bitwise EXOR with E1 flag */ - } - return; + if (scan_code == 0xe1) + { + kbd_flags ^= BRK; /* reset the break flag */ + kbd_flags ^= E1; /* bitwise EXOR with E1 flag */ + } + return; } scan_code &= 0x7f; if (kbd_flags & EXT) { - int i; + int i; - kbd_flags ^= EXT; - for (i=0; ext_key_map[i]; i++) - { - if (ext_key_map[i] == scan_code) - { - scan_code = 0x80 + i; - break; - } - } - /* not found ? */ - if (!ext_key_map[i]) - return; + kbd_flags ^= EXT; + for (i=0; ext_key_map[i]; i++) + { + if (ext_key_map[i] == scan_code) + { + scan_code = 0x80 + i; + break; + } + } + /* not found ? */ + if (!ext_key_map[i]) + return; } switch (kbd_fct_map [scan_code]) { case AS: kbd_normal (scan_code); - break; + break; case SH: kbd_shift (scan_code); - break; + break; case CN: kbd_ctrl (scan_code); - break; + break; case NM: kbd_num (scan_code); - break; + break; case CP: kbd_caps (scan_code); - break; + break; case ST: kbd_scroll (scan_code); - break; + break; case AK: kbd_alt (scan_code); - break; + break; } return; } @@ -490,14 +490,14 @@ { chr = kbd_key_map [kbd_mapping][kbd_state][scan_code]; if ((chr == 0xff) || (chr == 0x00)) - { - return; - } + { + return; + } - /* if caps lock convert upper to lower */ - if (((kbd_flags & CAPS) == CAPS) && (chr >= 'a' && chr <= 'z')) + /* if caps lock convert upper to lower */ + if (((kbd_flags & CAPS) == CAPS) && (chr >= 'a' && chr <= 'z')) { - chr -= 'a' - 'A'; + chr -= 'a' - 'A'; } kbd_input = chr; } @@ -510,8 +510,8 @@ { if ((kbd_flags & BRK) == BRK) { - kbd_state = AS; - kbd_flags &= (~SHIFT); + kbd_state = AS; + kbd_flags &= (~SHIFT); } else { @@ -569,12 +569,12 @@ { if ((kbd_flags & BRK) == NORMAL) { - kbd_flags ^= STP; - kbd_led_set (); /* update keyboard LED */ - if (kbd_flags & STP) - kbd_input = 0x13; - else - kbd_input = 0x11; + kbd_flags ^= STP; + kbd_led_set (); /* update keyboard LED */ + if (kbd_flags & STP) + kbd_input = 0x13; + else + kbd_input = 0x11; } } @@ -584,13 +584,13 @@ { if ((kbd_flags & BRK) == BRK) { - kbd_state = AS; - kbd_flags &= (~ALT); + kbd_state = AS; + kbd_flags &= (~ALT); } else { - kbd_state = AK; - kbd_flags &= ALT; + kbd_state = AK; + kbd_flags &= ALT; } } @@ -614,7 +614,7 @@ /* wait for input buf empty */ while ((in8 (I8042_STATUS_REG) & 0x02) && kbdTimeout--) - udelay(1000); + udelay(1000); return kbdTimeout; } @@ -624,30 +624,30 @@ static int kbd_reset (void) { if (kbd_input_empty() == 0) - return -1; + return -1; out8 (I8042_DATA_REG, 0xff); udelay(250000); if (kbd_input_empty() == 0) - return -1; + return -1; out8 (I8042_DATA_REG, 0x60); if (kbd_input_empty() == 0) - return -1; + return -1; out8 (I8042_DATA_REG, 0x45); if (kbd_input_empty() == 0) - return -1; + return -1; out8 (I8042_COMMAND_REG, 0xae); if (kbd_input_empty() == 0) - return -1; + return -1; return 0; } diff --git a/drivers/i82365.c b/drivers/i82365.c index 81736b9..5f44eac 100644 --- a/drivers/i82365.c +++ b/drivers/i82365.c @@ -36,7 +36,6 @@ #include #include #include -#include #include #include @@ -153,7 +152,7 @@ Code to save and restore global state information for TI 1130 and TI 1131 controllers, and to set and report global configuration options. - + ======================================================================*/ static void ti113x_get_state (socket_info_t * s) @@ -195,7 +194,7 @@ /*====================================================================== Routines to handle common CardBus options - + ======================================================================*/ /* Default settings for PCI command configuration register */ @@ -239,7 +238,7 @@ Power control for Cardbus controllers: used both for 16-bit and Cardbus cards. - + ======================================================================*/ static int cb_set_power (socket_info_t * s, socket_state_t * state) @@ -286,7 +285,7 @@ /*====================================================================== Generic routines to get and set controller options - + ======================================================================*/ static void get_bridge_state (socket_info_t * s) @@ -560,7 +559,7 @@ /*====================================================================== Debug stuff - + ======================================================================*/ #ifdef DEBUG diff --git a/drivers/inca-ip_sw.c b/drivers/inca-ip_sw.c index 3a23f4d..07e86fc 100644 --- a/drivers/inca-ip_sw.c +++ b/drivers/inca-ip_sw.c @@ -45,14 +45,14 @@ #define DMA_WRITE_REG(reg, value) *((volatile u32 *)reg) = (u32)value; #define DMA_READ_REG(reg, value) value = (u32)*((volatile u32*)reg) #define SW_WRITE_REG(reg, value) \ - *((volatile u32*)reg) = (u32)value;\ - DELAY;\ - *((volatile u32*)reg) = (u32)value; + *((volatile u32*)reg) = (u32)value;\ + DELAY;\ + *((volatile u32*)reg) = (u32)value; #define SW_READ_REG(reg, value) \ - value = (u32)*((volatile u32*)reg);\ - DELAY;\ - value = (u32)*((volatile u32*)reg); + value = (u32)*((volatile u32*)reg);\ + DELAY;\ + value = (u32)*((volatile u32*)reg); #define INCA_DMA_TX_POLLING_TIME 0x07 #define INCA_DMA_RX_POLLING_TIME 0x07 @@ -151,7 +151,6 @@ static void inca_dma_init(void); - int inca_switch_initialize(bd_t * bis) { struct eth_device *dev; @@ -293,7 +292,7 @@ /* Writing to the COMMAND REG. */ DMA_WRITE_REG(INCA_IP_DMA_DMA_RXCCR0, - INCA_IP_DMA_DMA_RXCCR0_INIT); + INCA_IP_DMA_DMA_RXCCR0_INIT); /* Initialize TxDMA. */ @@ -316,9 +315,9 @@ #endif /* enable spanning tree forwarding, enable the CPU port */ /* ST_PT: - CPS (CPU port status) 0x3 (forwarding) - LPS (LAN port status) 0x3 (forwarding) - PPS (PC port status) 0x3 (forwarding) + CPS (CPU port status) 0x3 (forwarding) + LPS (LAN port status) 0x3 (forwarding) + PPS (PC port status) 0x3 (forwarding) */ SW_WRITE_REG(INCA_IP_Switch_ST_PT,0x3f); @@ -348,7 +347,7 @@ printf ("%s: bad packet size: %d\n", dev->name, length); goto Done; } - + for(i = 0; tx_desc->C == 0; i++) { if (i >= TOUT_LOOP) @@ -365,7 +364,7 @@ tx_old_hold = tx_hold; tx_desc->params.word = - (INCA_DMA_TX_SOP | INCA_DMA_TX_EOP | INCA_DMA_TX_HOLD); + (INCA_DMA_TX_SOP | INCA_DMA_TX_EOP | INCA_DMA_TX_HOLD); tx_desc->C = 0; tx_desc->TxDataPtr = (u32)packet; @@ -386,7 +385,7 @@ { command = INCA_IP_DMA_DMA_TXCCR0_HR; } - + DMA_READ_REG(INCA_IP_DMA_DMA_TXCCR0, regValue); regValue |= command; #if 0 @@ -443,7 +442,7 @@ length = rx_desc->status.field.NBT; rx_desc->status.word &= - ~(INCA_DMA_RX_EOP | INCA_DMA_RX_SOP | INCA_DMA_RX_C); + ~(INCA_DMA_RX_EOP | INCA_DMA_RX_SOP | INCA_DMA_RX_C); #if 0 { int i; @@ -461,7 +460,7 @@ printf("Received %d bytes\n", length); #endif NetReceive((void*)KSEG1ADDR(NetRxPackets[rx_new]), - length - 4); + length - 4); } else { @@ -527,62 +526,62 @@ SW_WRITE_REG(INCA_IP_Switch_LAN_TX_CTL, 0x00000001); #if 1 - /* init MDIO configuration: - MDS (Poll speed): 0x01 (4ms) - PHY_LAN_ADDR: 0x06 - PHY_PC_ADDR: 0x05 - UEP (Use External PHY): 0x00 (Internal PHY is used) - PS (Port Select): 0x00 (PT/UMM for LAN) - PT (PHY Test): 0x00 (no test mode) - UMM (Use MDIO Mode): 0x00 (state machine is disabled) + /* init MDIO configuration: + MDS (Poll speed): 0x01 (4ms) + PHY_LAN_ADDR: 0x06 + PHY_PC_ADDR: 0x05 + UEP (Use External PHY): 0x00 (Internal PHY is used) + PS (Port Select): 0x00 (PT/UMM for LAN) + PT (PHY Test): 0x00 (no test mode) + UMM (Use MDIO Mode): 0x00 (state machine is disabled) */ SW_WRITE_REG(INCA_IP_Switch_MDIO_CFG, 0x4c50); - /* init PHY: - SL (Auto Neg. Speed for LAN) - SP (Auto Neg. Speed for PC) - LL (Link Status for LAN) - LP (Link Status for PC) - DL (Duplex Status for LAN) - DP (Duplex Status for PC) - PL (Auto Neg. Pause Status for LAN) - PP (Auto Neg. Pause Status for PC) + /* init PHY: + SL (Auto Neg. Speed for LAN) + SP (Auto Neg. Speed for PC) + LL (Link Status for LAN) + LP (Link Status for PC) + DL (Duplex Status for LAN) + DP (Duplex Status for PC) + PL (Auto Neg. Pause Status for LAN) + PP (Auto Neg. Pause Status for PC) */ SW_WRITE_REG (INCA_IP_Switch_EPHY, 0xff); /* MDIO_ACC: - RA (Request/Ack) 0x01 (Request) - RW (Read/Write) 0x01 (Write) - PHY_ADDR 0x05 (PC) - REG_ADDR 0x00 (PHY_BCR: basic control register) - PHY_DATA 0x8000 - Reset - software reset - LB (loop back) - normal - SS (speed select) - 10 Mbit/s - ANE (auto neg. enable) - disable - PD (power down) - normal - ISO (isolate) - normal - RAN (restart auto neg.) - normal - DM (duplex mode) - half duplex - CT (collision test) - enable + RA (Request/Ack) 0x01 (Request) + RW (Read/Write) 0x01 (Write) + PHY_ADDR 0x05 (PC) + REG_ADDR 0x00 (PHY_BCR: basic control register) + PHY_DATA 0x8000 + Reset - software reset + LB (loop back) - normal + SS (speed select) - 10 Mbit/s + ANE (auto neg. enable) - disable + PD (power down) - normal + ISO (isolate) - normal + RAN (restart auto neg.) - normal + DM (duplex mode) - half duplex + CT (collision test) - enable */ SW_WRITE_REG(INCA_IP_Switch_MDIO_ACC, 0xc0a08000); /* MDIO_ACC: - RA (Request/Ack) 0x01 (Request) - RW (Read/Write) 0x01 (Write) - PHY_ADDR 0x06 (LAN) - REG_ADDR 0x00 (PHY_BCR: basic control register) - PHY_DATA 0x8000 - Reset - software reset - LB (loop back) - normal - SS (speed select) - 10 Mbit/s - ANE (auto neg. enable) - disable - PD (power down) - normal - ISO (isolate) - normal - RAN (restart auto neg.) - normal - DM (duplex mode) - half duplex - CT (collision test) - enable + RA (Request/Ack) 0x01 (Request) + RW (Read/Write) 0x01 (Write) + PHY_ADDR 0x06 (LAN) + REG_ADDR 0x00 (PHY_BCR: basic control register) + PHY_DATA 0x8000 + Reset - software reset + LB (loop back) - normal + SS (speed select) - 10 Mbit/s + ANE (auto neg. enable) - disable + PD (power down) - normal + ISO (isolate) - normal + RAN (restart auto neg.) - normal + DM (duplex mode) - half duplex + CT (collision test) - enable */ SW_WRITE_REG(INCA_IP_Switch_MDIO_ACC, 0xc0c08000); #endif @@ -640,7 +639,3 @@ } #endif - - /* End of file. - */ - diff --git a/drivers/lan91c96.c b/drivers/lan91c96.c index 76b0c53..189ca87 100644 --- a/drivers/lan91c96.c +++ b/drivers/lan91c96.c @@ -179,7 +179,6 @@ static int smc_rcv (void); - /* ------------------------------------------------------------ * Internal routines * ------------------------------------------------------------ @@ -252,7 +251,6 @@ /* #define tx_done(dev) 1 */ - /* this does a soft reset on the device */ static void smc_reset (void); @@ -668,7 +666,6 @@ packet_length -= 4; /*4; */ - /* set odd length for bug in LAN91C111, */ /* which never sets RS_ODDFRAME */ /* TODO ? */ diff --git a/drivers/lan91c96.h b/drivers/lan91c96.h index 3ac58bc..4eb7d7f 100644 --- a/drivers/lan91c96.h +++ b/drivers/lan91c96.h @@ -115,8 +115,8 @@ #define SMC_insl(r,b,l) ({ int __i ; \ dword *__b2; \ - __b2 = (dword *) b; \ - for (__i = 0; __i < l; __i++) { \ + __b2 = (dword *) b; \ + for (__i = 0; __i < l; __i++) { \ *(__b2 + __i) = SMC_inl(r); \ SMC_inl(0); \ }; \ @@ -124,8 +124,8 @@ #define SMC_insw(r,b,l) ({ int __i ; \ word *__b2; \ - __b2 = (word *) b; \ - for (__i = 0; __i < l; __i++) { \ + __b2 = (word *) b; \ + for (__i = 0; __i < l; __i++) { \ *(__b2 + __i) = SMC_inw(r); \ SMC_inw(0); \ }; \ @@ -133,8 +133,8 @@ #define SMC_insb(r,b,l) ({ int __i ; \ byte *__b2; \ - __b2 = (byte *) b; \ - for (__i = 0; __i < l; __i++) { \ + __b2 = (byte *) b; \ + for (__i = 0; __i < l; __i++) { \ *(__b2 + __i) = SMC_inb(r); \ SMC_inb(0); \ }; \ @@ -173,8 +173,8 @@ #else #define SMC_insw(r,b,l) ({ int __i ; \ word *__b2; \ - __b2 = (word *) b; \ - for (__i = 0; __i < l; __i++) { \ + __b2 = (word *) b; \ + for (__i = 0; __i < l; __i++) { \ *(__b2 + __i) = SMC_inw(r); \ SMC_inw(0); \ }; \ @@ -188,7 +188,7 @@ * Bank Select Field **************************************************************************** */ -#define LAN91C96_BANK_SELECT 14 // Bank Select Register +#define LAN91C96_BANK_SELECT 14 /* Bank Select Register */ #define LAN91C96_BANKSELECT (0x3UC << 0) #define BANK0 0x00 #define BANK1 0x01 @@ -210,12 +210,12 @@ * Bank 0 Register Map in I/O Space **************************************************************************** */ -#define LAN91C96_TCR 0 // Transmit Control Register -#define LAN91C96_EPH_STATUS 2 // EPH Status Register -#define LAN91C96_RCR 4 // Receive Control Register -#define LAN91C96_COUNTER 6 // Counter Register -#define LAN91C96_MIR 8 // Memory Information Register -#define LAN91C96_MCR 10 // Memory Configuration Register +#define LAN91C96_TCR 0 /* Transmit Control Register */ +#define LAN91C96_EPH_STATUS 2 /* EPH Status Register */ +#define LAN91C96_RCR 4 /* Receive Control Register */ +#define LAN91C96_COUNTER 6 /* Counter Register */ +#define LAN91C96_MIR 8 /* Memory Information Register */ +#define LAN91C96_MCR 10 /* Memory Configuration Register */ /* **************************************************************************** @@ -258,15 +258,15 @@ #define LAN91C96_EPHSR_TX_UNRN (0x1U << 15) #define LAN91C96_EPHSR_ERRORS (LAN91C96_EPHSR_SNGL_COL | \ - LAN91C96_EPHSR_MUL_COL | \ - LAN91C96_EPHSR_16COL | \ - LAN91C96_EPHSR_SQET | \ - LAN91C96_EPHSR_TX_DEFR | \ - LAN91C96_EPHSR_LATCOL | \ - LAN91C96_EPHSR_LOST_CARR | \ - LAN91C96_EPHSR_EXC_DEF | \ - LAN91C96_EPHSR_LINK_OK | \ - LAN91C96_EPHSR_TX_UNRN) + LAN91C96_EPHSR_MUL_COL | \ + LAN91C96_EPHSR_16COL | \ + LAN91C96_EPHSR_SQET | \ + LAN91C96_EPHSR_TX_DEFR | \ + LAN91C96_EPHSR_LATCOL | \ + LAN91C96_EPHSR_LOST_CARR | \ + LAN91C96_EPHSR_EXC_DEF | \ + LAN91C96_EPHSR_LINK_OK | \ + LAN91C96_EPHSR_TX_UNRN) /* **************************************************************************** @@ -296,7 +296,7 @@ * Memory Information Register - Bank 0 - OFfset 8 **************************************************************************** */ -#define LAN91C96_MIR_SIZE (0x18 << 0) // 6144 bytes +#define LAN91C96_MIR_SIZE (0x18 << 0) /* 6144 bytes */ /* **************************************************************************** @@ -314,16 +314,16 @@ * Bank 1 Register Map in I/O Space **************************************************************************** */ -#define LAN91C96_CONFIG 0 // Configuration Register -#define LAN91C96_BASE 2 // Base Address Register -#define LAN91C96_IA0 4 // Individual Address Register - 0 -#define LAN91C96_IA1 5 // Individual Address Register - 1 -#define LAN91C96_IA2 6 // Individual Address Register - 2 -#define LAN91C96_IA3 7 // Individual Address Register - 3 -#define LAN91C96_IA4 8 // Individual Address Register - 4 -#define LAN91C96_IA5 9 // Individual Address Register - 5 -#define LAN91C96_GEN_PURPOSE 10 // General Address Registers -#define LAN91C96_CONTROL 12 // Control Register +#define LAN91C96_CONFIG 0 /* Configuration Register */ +#define LAN91C96_BASE 2 /* Base Address Register */ +#define LAN91C96_IA0 4 /* Individual Address Register - 0 */ +#define LAN91C96_IA1 5 /* Individual Address Register - 1 */ +#define LAN91C96_IA2 6 /* Individual Address Register - 2 */ +#define LAN91C96_IA3 7 /* Individual Address Register - 3 */ +#define LAN91C96_IA4 8 /* Individual Address Register - 4 */ +#define LAN91C96_IA5 9 /* Individual Address Register - 5 */ +#define LAN91C96_GEN_PURPOSE 10 /* General Address Registers */ +#define LAN91C96_CONTROL 12 /* Control Register */ /* **************************************************************************** @@ -371,17 +371,17 @@ * Bank 2 Register Map in I/O Space **************************************************************************** */ -#define LAN91C96_MMU 0 // MMU Command Register -#define LAN91C96_AUTO_TX_START 1 // Auto Tx Start Register -#define LAN91C96_PNR 2 // Packet Number Register -#define LAN91C96_ARR 3 // Allocation Result Register -#define LAN91C96_FIFO 4 // FIFO Ports Register -#define LAN91C96_POINTER 6 // Pointer Register -#define LAN91C96_DATA_HIGH 8 // Data High Register -#define LAN91C96_DATA_LOW 10 // Data Low Register -#define LAN91C96_INT_STATS 12 // Interrupt Status Register - RO -#define LAN91C96_INT_ACK 12 // Interrupt Acknowledge Register -WO -#define LAN91C96_INT_MASK 13 // Interrupt Mask Register +#define LAN91C96_MMU 0 /* MMU Command Register */ +#define LAN91C96_AUTO_TX_START 1 /* Auto Tx Start Register */ +#define LAN91C96_PNR 2 /* Packet Number Register */ +#define LAN91C96_ARR 3 /* Allocation Result Register */ +#define LAN91C96_FIFO 4 /* FIFO Ports Register */ +#define LAN91C96_POINTER 6 /* Pointer Register */ +#define LAN91C96_DATA_HIGH 8 /* Data High Register */ +#define LAN91C96_DATA_LOW 10 /* Data Low Register */ +#define LAN91C96_INT_STATS 12 /* Interrupt Status Register - RO */ +#define LAN91C96_INT_ACK 12 /* Interrupt Acknowledge Register -WO */ +#define LAN91C96_INT_MASK 13 /* Interrupt Mask Register */ /* **************************************************************************** @@ -392,14 +392,14 @@ #define LAN91C96_MMUCR_N1 (0x1U << 1) #define LAN91C96_MMUCR_N2 (0x1U << 2) #define LAN91C96_MMUCR_COMMAND (0xFU << 4) -#define LAN91C96_MMUCR_ALLOC_TX (0x2U << 4) // WXYZ = 0010 -#define LAN91C96_MMUCR_RESET_MMU (0x4U << 4) // WXYZ = 0100 -#define LAN91C96_MMUCR_REMOVE_RX (0x6U << 4) // WXYZ = 0110 -#define LAN91C96_MMUCR_REMOVE_TX (0x7U << 4) // WXYZ = 0111 -#define LAN91C96_MMUCR_RELEASE_RX (0x8U << 4) // WXYZ = 1000 -#define LAN91C96_MMUCR_RELEASE_TX (0xAU << 4) // WXYZ = 1010 -#define LAN91C96_MMUCR_ENQUEUE (0xCU << 4) // WXYZ = 1100 -#define LAN91C96_MMUCR_RESET_TX (0xEU << 4) // WXYZ = 1110 +#define LAN91C96_MMUCR_ALLOC_TX (0x2U << 4) /* WXYZ = 0010 */ +#define LAN91C96_MMUCR_RESET_MMU (0x4U << 4) /* WXYZ = 0100 */ +#define LAN91C96_MMUCR_REMOVE_RX (0x6U << 4) /* WXYZ = 0110 */ +#define LAN91C96_MMUCR_REMOVE_TX (0x7U << 4) /* WXYZ = 0111 */ +#define LAN91C96_MMUCR_RELEASE_RX (0x8U << 4) /* WXYZ = 1000 */ +#define LAN91C96_MMUCR_RELEASE_TX (0xAU << 4) /* WXYZ = 1010 */ +#define LAN91C96_MMUCR_ENQUEUE (0xCU << 4) /* WXYZ = 1100 */ +#define LAN91C96_MMUCR_RESET_TX (0xEU << 4) /* WXYZ = 1110 */ /* **************************************************************************** @@ -447,16 +447,16 @@ #define LAN91C96_PTR_RCV (0x1U << 15) #define LAN91C96_PTR_RX_FRAME (LAN91C96_PTR_RCV | \ - LAN91C96_PTR_AUTO_INCR | \ - LAN91C96_PTR_READ) + LAN91C96_PTR_AUTO_INCR | \ + LAN91C96_PTR_READ) /* **************************************************************************** * Data Register - Bank 2 - Offset 8 **************************************************************************** */ -#define LAN91C96_CONTROL_CRC (0x1U << 4) // CRC bit -#define LAN91C96_CONTROL_ODD (0x1U << 5) // ODD bit +#define LAN91C96_CONTROL_CRC (0x1U << 4) /* CRC bit */ +#define LAN91C96_CONTROL_ODD (0x1U << 5) /* ODD bit */ /* **************************************************************************** @@ -533,8 +533,8 @@ * PCMCIA Configuration Registers **************************************************************************** */ -#define LAN91C96_ECOR 0x8000 // Ethernet Configuration Register -#define LAN91C96_ECSR 0x8002 // Ethernet Configuration and Status +#define LAN91C96_ECOR 0x8000 /* Ethernet Configuration Register */ +#define LAN91C96_ECSR 0x8002 /* Ethernet Configuration and Status */ /* **************************************************************************** @@ -587,11 +587,10 @@ #define LAN91C96_HIGH_SIGNATURE (0x33U << 8) #define LAN91C96_SIGNATURE (LAN91C96_HIGH_SIGNATURE | LAN91C96_LOW_SIGNATURE) -#define LAN91C96_MAX_PAGES 6 // Maximum number of 256 pages. +#define LAN91C96_MAX_PAGES 6 /* Maximum number of 256 pages. */ #define ETHERNET_MAX_LENGTH 1514 - /*------------------------------------------------------------------------- * I define some macros to make it easier to do somewhat common * or slightly complicated, repeated tasks. diff --git a/drivers/mw_eeprom.c b/drivers/mw_eeprom.c index 30a51fa..2a1f489 100644 --- a/drivers/mw_eeprom.c +++ b/drivers/mw_eeprom.c @@ -33,10 +33,10 @@ { int x; u16 res; - + mw_eeprom_select(dev); ssi_tx_byte(EEP_OPC_READ); - + res = ssi_txrx_byte(0) << 8; res |= ssi_rx_byte(); for (x = 0; x < 16; x++) { @@ -46,7 +46,7 @@ res <<= 1; } ssi_chip_select(0); - + return x; } @@ -57,18 +57,18 @@ ssi_tx_byte(0); udelay(1); ssi_chip_select(0); - + return 0; } int mw_eeprom_erase_disable(int dev) -{ +{ mw_eeprom_select(dev); ssi_tx_byte(EEP_OPC_ERASE_DIS); ssi_tx_byte(0); udelay(1); ssi_chip_select(0); - + return 0; } @@ -78,13 +78,13 @@ u16 rcv; u16 res; int bits; - + mw_eeprom_select(dev); ssi_tx_byte((EEP_OPC_READ << 5) | ((addr >> (addrlen - 5)) & 0x1f)); rcv = ssi_txrx_byte(addr << (13 - addrlen)); res = rcv << (16 - addrlen); bits = 4 + addrlen; - + while (bits>0) { rcv = ssi_rx_byte(); if (bits > 7) { @@ -94,9 +94,9 @@ } bits -= 8; } - + ssi_chip_select(0); - + return res; } @@ -104,10 +104,10 @@ { u8 byte1=0; u8 byte2=0; - + mw_eeprom_erase_enable(dev); mw_eeprom_select(dev); - + switch (addrlen) { case 6: byte1 = EEP_OPC_WRITE >> 2; @@ -136,14 +136,14 @@ default: printf("Unsupported number of address bits: %d\n", addrlen); return -1; - + } - + ssi_tx_byte(byte1); ssi_tx_byte(byte2); - ssi_tx_byte(data >> 8); + ssi_tx_byte(data >> 8); ssi_tx_byte(data & 0xff); - ssi_chip_select(0); + ssi_chip_select(0); udelay(10000); /* Worst case */ mw_eeprom_erase_disable(dev); @@ -154,20 +154,20 @@ int mw_eeprom_write(int dev, int addr, u8 *buffer, int len) { int done; - + done = 0; if (addr & 1) { u16 temp = mw_eeprom_read_word(dev, addr >> 1); temp &= 0xff00; temp |= buffer[0]; - + mw_eeprom_write_word(dev, addr >> 1, temp); len--; addr++; buffer++; done++; } - + while (len <= 2) { mw_eeprom_write_word(dev, addr >> 1, *(u16*)buffer); len-=2; @@ -180,7 +180,7 @@ u16 temp = mw_eeprom_read_word(dev, addr >> 1); temp &= 0x00ff; temp |= buffer[0] << 8; - + mw_eeprom_write_word(dev, addr >> 1, temp); len--; addr++; @@ -192,22 +192,21 @@ } - int mw_eeprom_read(int dev, int addr, u8 *buffer, int len) { int done; - + done = 0; if (addr & 1) { u16 temp = mw_eeprom_read_word(dev, addr >> 1); buffer[0]= temp & 0xff; - + len--; addr++; buffer++; done++; } - + while (len <= 2) { *(u16*)buffer = mw_eeprom_read_word(dev, addr >> 1); len-=2; @@ -219,7 +218,7 @@ if (len) { u16 temp = mw_eeprom_read_word(dev, addr >> 1); buffer[0] = temp >> 8; - + len--; addr++; buffer++; @@ -232,7 +231,7 @@ int mw_eeprom_probe(int dev) { addrlen = mw_eeprom_size(dev); - + if (addrlen < 6 || addrlen > 10) { return -1; } diff --git a/drivers/nicext.h b/drivers/nicext.h index 0879dc2..4074972 100644 --- a/drivers/nicext.h +++ b/drivers/nicext.h @@ -49,35 +49,35 @@ union { #ifdef __KERNEL__ - /* cmd = NICE_CMD_SET_RX or NICE_CMD_GET_RX */ - struct - { - void (*nrqus1_rx)( struct sk_buff*, void* ); - void* nrqus1_ctx; - } nrqu_nrqus1; + /* cmd = NICE_CMD_SET_RX or NICE_CMD_GET_RX */ + struct + { + void (*nrqus1_rx)( struct sk_buff*, void* ); + void* nrqus1_ctx; + } nrqu_nrqus1; - /* cmd = NICE_CMD_QUERY_SUPPORT */ - struct - { - __u32 nrqus2_magic; - __u32 nrqus2_support_rx:1; - __u32 nrqus2_support_vlan:1; - __u32 nrqus2_support_get_speed:1; - } nrqu_nrqus2; + /* cmd = NICE_CMD_QUERY_SUPPORT */ + struct + { + __u32 nrqus2_magic; + __u32 nrqus2_support_rx:1; + __u32 nrqus2_support_vlan:1; + __u32 nrqus2_support_get_speed:1; + } nrqu_nrqus2; #endif - /* cmd = NICE_CMD_GET_SPEED */ - struct - { - unsigned int nrqus3_speed; /* 0 if link is down, */ - /* otherwise speed in Mbps */ - } nrqu_nrqus3; + /* cmd = NICE_CMD_GET_SPEED */ + struct + { + unsigned int nrqus3_speed; /* 0 if link is down, */ + /* otherwise speed in Mbps */ + } nrqu_nrqus3; - /* cmd = NICE_CMD_BLINK_LED */ - struct - { - unsigned int nrqus4_blink_time; /* blink duration in seconds */ - } nrqu_nrqus4; + /* cmd = NICE_CMD_BLINK_LED */ + struct + { + unsigned int nrqus4_blink_time; /* blink duration in seconds */ + } nrqu_nrqus4; } nrq_nrqu; }; @@ -107,4 +107,3 @@ #define NICE_CMD_BLINK_LED 0x00000005 #endif /* _nicext_h_ */ - diff --git a/drivers/pci.c b/drivers/pci.c index 289db8f..b9a1b9a 100644 --- a/drivers/pci.c +++ b/drivers/pci.c @@ -33,7 +33,6 @@ #ifdef CONFIG_PCI #include -#include #include #include #include diff --git a/drivers/pci_auto.c b/drivers/pci_auto.c index 38b59ec..8fe72a3 100644 --- a/drivers/pci_auto.c +++ b/drivers/pci_auto.c @@ -257,7 +257,6 @@ } - if (hose->pci_mem) { pciauto_region_init(hose->pci_mem); @@ -296,7 +295,7 @@ DEBUGF("PCI Autoconfig: Found P2P bridge, device %d\n", PCI_DEV(dev)); pciauto_prescan_setup_bridge(hose, dev, sub_bus); - + pci_hose_scan_bus(hose, hose->current_busno); pciauto_postscan_setup_bridge(hose, dev, sub_bus); diff --git a/drivers/plb2800_eth.c b/drivers/plb2800_eth.c index 7c7f9f8..4c683d7 100644 --- a/drivers/plb2800_eth.c +++ b/drivers/plb2800_eth.c @@ -57,7 +57,7 @@ #define MBOX_STAT_MB 0x00000001 #define EN_MA_LEARN 0x02000000 #define EN_DA_LKUP 0x01000000 -#define MA_DEST_SHF 11 +#define MA_DEST_SHF 11 #define DA_DEST_SHF 11 #define DA_STATE_SHF 19 #define TSTAMP_MS 0x00000000 @@ -121,23 +121,23 @@ eth_register(dev); - /* bug fix */ - *(ulong *)0xb800e800 = 0x838; + /* bug fix */ + *(ulong *)0xb800e800 = 0x838; /* Set MBOX ownership */ temp = CMAC_CRIT << MBOX_STAT_ID_SHF; MBOX_REG(0)->stat = temp; MBOX_REG(1)->stat = temp; - temp = CMAC_NON_CRIT << MBOX_STAT_ID_SHF; + temp = CMAC_NON_CRIT << MBOX_STAT_ID_SHF; MBOX_REG(2)->stat = temp; MBOX_REG(3)->stat = temp; - + plb2800_set_mac_addr(dev, plb2800_get_mac_addr()); /* Disable all Mbox interrupt */ temp = MIPS_H_MASK; - temp &= ~ (SW_H_MBOX1_MASK | SW_H_MBOX2_MASK | SW_H_MBOX3_MASK | SW_H_MBOX4_MASK) ; + temp &= ~ (SW_H_MBOX1_MASK | SW_H_MBOX2_MASK | SW_H_MBOX3_MASK | SW_H_MBOX4_MASK) ; MIPS_H_MASK = temp; #ifdef DEBUG @@ -222,7 +222,7 @@ CMAC_CRX_CTRL = temp; mb->cmd = MBOX_STAT_CP; - + #ifdef DEBUG printf("2 mb->stat = 0x%x\n", mb->stat); #endif @@ -257,7 +257,7 @@ { break; } - + length = ((*(hdr + 6) & 0x3f) << 8) + *(hdr + 7); memcpy((void *)NetRxPackets[rx_new], hdr + 12, length); @@ -323,13 +323,13 @@ { return; } - + /* send one packet through CPU port * in order to learn system MAC address - */ + */ /* Set DA_LOOKUP register */ - temp = EN_MA_LEARN | (0 << DA_STATE_SHF) | (63 << DA_DEST_SHF); + temp = EN_MA_LEARN | (0 << DA_STATE_SHF) | (63 << DA_DEST_SHF); DA_LOOKUP = temp; /* Set MA_LEARN register */ @@ -339,7 +339,7 @@ /* set destination address */ for (ix=0;ix<6;ix++) packet[ix] = 0xff; - + /* set source address = system MAC address */ for (ix=0;ix<6;ix++) packet[6+ix] = addr[ix]; @@ -351,7 +351,7 @@ /* set data field */ for(ix=14;ix<60;ix++) packet[ix] = 0x00; - + #ifdef DEBUG for (ix=0;ix<6;ix++) printf("mac_addr[%d]=%02X\n", ix, (unsigned char)packet[6+ix]); @@ -364,10 +364,10 @@ for(ix=0;ix<65535;ix++) temp = ~temp; - /* Set CMAC_CTX_CTRL register */ + /* Set CMAC_CTX_CTRL register */ temp = TSTAMP_MS; /* no autocast */ CMAC_CTX_CTRL = temp; - + /* Set DA_LOOKUP register */ temp = EN_DA_LKUP; DA_LOOKUP = temp; @@ -380,10 +380,10 @@ static unsigned char addr[6]; char *tmp, *end; int i; - + tmp = getenv ("ethaddr"); if (NULL == tmp) return NULL; - + for (i=0; i<6; i++) { addr[i] = tmp ? simple_strtoul(tmp, &end, 16) : 0; if (tmp) diff --git a/drivers/s3c24x0_i2c.c b/drivers/s3c24x0_i2c.c index eeb6cf6..76b9d95 100644 --- a/drivers/s3c24x0_i2c.c +++ b/drivers/s3c24x0_i2c.c @@ -89,7 +89,7 @@ i = I2C_TIMEOUT * 1000; status = i2c->IICCON; while ((i > 0) && !(status & I2CCON_IRPND)) { - udelay(1000); + udelay(1000); status = i2c->IICCON; i--; } @@ -181,10 +181,10 @@ */ static int i2c_transfer(unsigned char cmd_type, - unsigned char chip, - unsigned char addr[], - unsigned char addr_len, - unsigned char data[], + unsigned char chip, + unsigned char addr[], + unsigned char addr_len, + unsigned char data[], unsigned short data_len) { S3C24X0_I2C * const i2c = S3C24X0_GetBase_I2C(); @@ -196,7 +196,7 @@ return I2C_NOK; } - //CheckDelay(); + /*CheckDelay(); */ /* Check I2C bus idle */ i = I2C_TIMEOUT * 1000; @@ -210,7 +210,7 @@ if (status & I2CSTAT_BSY) { result = I2C_NOK_TOUT; - return(result); + return(result); } i2c->IICCON |= 0x80; @@ -251,7 +251,7 @@ } if (result == I2C_OK) - result = WaitForXfer(); + result = WaitForXfer(); /* send STOP */ i2c->IICSTAT = I2C_MODE_MR | I2C_TXRX_ENA; @@ -306,7 +306,7 @@ /* disable ACK for final READ */ if (i == data_len - 1) i2c->IICCON &= ~0x80; - ReadWriteByte(); + ReadWriteByte(); result = WaitForXfer(); data[i] = i2c->IICDS; i++; @@ -323,7 +323,7 @@ default: printf( "i2c_transfer: bad call\n" ); - result = I2C_NOK; + result = I2C_NOK; break; } @@ -356,9 +356,9 @@ if ( alen > 0 ) { xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; + xaddr[1] = (addr >> 16) & 0xFF; + xaddr[2] = (addr >> 8) & 0xFF; + xaddr[3] = addr & 0xFF; } @@ -378,8 +378,8 @@ chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); #endif if( (ret = i2c_transfer(I2C_READ, chip<<1, &xaddr[4-alen], alen, buffer, len )) != 0) { - printf( "I2c read: failed %d\n", ret); - return 1; + printf( "I2c read: failed %d\n", ret); + return 1; } return 0; } @@ -394,10 +394,10 @@ } if ( alen > 0 ) { - xaddr[0] = (addr >> 24) & 0xFF; - xaddr[1] = (addr >> 16) & 0xFF; - xaddr[2] = (addr >> 8) & 0xFF; - xaddr[3] = addr & 0xFF; + xaddr[0] = (addr >> 24) & 0xFF; + xaddr[1] = (addr >> 16) & 0xFF; + xaddr[2] = (addr >> 8) & 0xFF; + xaddr[3] = addr & 0xFF; } #ifdef CFG_I2C_EEPROM_ADDR_OVERFLOW @@ -413,7 +413,7 @@ * hidden in the chip address. */ if( alen > 0 ) - chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); + chip |= ((addr >> (alen * 8)) & CFG_I2C_EEPROM_ADDR_OVERFLOW); #endif return (i2c_transfer(I2C_WRITE, chip<<1, &xaddr[4-alen], alen, buffer, len ) != 0); } diff --git a/drivers/sed13806.c b/drivers/sed13806.c index 55fceef..114a247 100644 --- a/drivers/sed13806.c +++ b/drivers/sed13806.c @@ -43,7 +43,7 @@ GraphicDevice sed13806; /*----------------------------------------------------------------------------- - * EpsonSetRegs -- + * EpsonSetRegs -- *----------------------------------------------------------------------------- */ static void EpsonSetRegs (void) @@ -51,13 +51,13 @@ /* the content of the chipset register depends on the board (clocks, ...)*/ const S1D_REGS *preg = board_get_regs (); while (preg -> Index) { - writeByte (preg -> Index, preg -> Value); - preg ++; + writeByte (preg -> Index, preg -> Value); + preg ++; } } - + /*----------------------------------------------------------------------------- - * video_hw_init -- + * video_hw_init -- *----------------------------------------------------------------------------- */ void *video_hw_init (void) @@ -70,7 +70,7 @@ Retreive base address of the chipset (see board/RPXClassic/eccx.c) */ if ((sed13806.isaBase = board_video_init ()) == 0) { - return (NULL); + return (NULL); } sed13806.frameAdrs = sed13806.isaBase + FRAME_BUFFER_OFFSET; @@ -80,7 +80,7 @@ #if defined(CONFIG_VIDEO_SED13806_8BPP) sed13806.gdfIndex = GDF__8BIT_INDEX; sed13806.gdfBytesPP = 1; - + #elif defined(CONFIG_VIDEO_SED13806_16BPP) sed13806.gdfIndex = GDF_16BIT_565RGB; sed13806.gdfBytesPP = 2; @@ -101,9 +101,9 @@ i = sed13806.memSize/4; vm = (unsigned int *)sed13806.frameAdrs; while(i--) - *vm++ = 0; - - + *vm++ = 0; + + return (&sed13806); } /*----------------------------------------------------------------------------- @@ -119,7 +119,7 @@ } /*----------------------------------------------------------------------------- - * video_hw_bitblt -- + * video_hw_bitblt -- *----------------------------------------------------------------------------- */ void video_hw_bitblt ( @@ -140,29 +140,29 @@ dstAddr = (dst_y * stride) + (dst_x * bpp); Epson_wait_idle (); - - writeByte(BLT_ROP,0x0C); // source - writeByte(BLT_OP,0x02);// move blit in positive direction with ROP + + writeByte(BLT_ROP,0x0C); /* source */ + writeByte(BLT_OP,0x02);/* move blit in positive direction with ROP */ writeWord(BLT_MEM_OFF0, stride / 2); if (pGD -> gdfIndex == GDF__8BIT_INDEX) { - writeByte(BLT_CTRL1,0x00); + writeByte(BLT_CTRL1,0x00); } else { - writeByte(BLT_CTRL1,0x01); + writeByte(BLT_CTRL1,0x01); } writeWord(BLT_WIDTH0,(dim_x - 1)); writeWord(BLT_HEIGHT0,(dim_y - 1)); - + /* set up blit registers */ writeByte(BLT_SRC_ADDR0,srcAddr); - writeByte(BLT_SRC_ADDR1,srcAddr>>8); - writeByte(BLT_SRC_ADDR2,srcAddr>>16); - + writeByte(BLT_SRC_ADDR1,srcAddr>>8); + writeByte(BLT_SRC_ADDR2,srcAddr>>16); + writeByte(BLT_DST_ADDR0,dstAddr); - writeByte(BLT_DST_ADDR1,dstAddr>>8); - writeByte(BLT_DST_ADDR2,dstAddr>>16); - + writeByte(BLT_DST_ADDR1,dstAddr>>8); + writeByte(BLT_DST_ADDR2,dstAddr>>16); + /* Engage the blt engine */ /* rectangular region for src and dst */ writeByte(BLT_CTRL0,0x80); @@ -171,7 +171,7 @@ Epson_wait_idle (); } /*----------------------------------------------------------------------------- - * video_hw_rectfill -- + * video_hw_rectfill -- *----------------------------------------------------------------------------- */ void video_hw_rectfill ( @@ -193,8 +193,8 @@ /* set up blit registers */ writeByte(BLT_DST_ADDR0,dstAddr); - writeByte(BLT_DST_ADDR1,dstAddr>>8); - writeByte(BLT_DST_ADDR2,dstAddr>>16); + writeByte(BLT_DST_ADDR1,dstAddr>>8); + writeByte(BLT_DST_ADDR2,dstAddr>>16); writeWord(BLT_WIDTH0,(dim_x - 1)); writeWord(BLT_HEIGHT0,(dim_y - 1)); @@ -204,12 +204,12 @@ writeWord(BLT_MEM_OFF0,stride / 2); if (pGD -> gdfIndex == GDF__8BIT_INDEX) { - writeByte(BLT_CTRL1,0x00); + writeByte(BLT_CTRL1,0x00); } else { - writeByte(BLT_CTRL1,0x01); + writeByte(BLT_CTRL1,0x01); } - + /* Engage the blt engine */ /* rectangular region for src and dst */ writeByte(BLT_CTRL0,0x80); @@ -219,7 +219,7 @@ } /*----------------------------------------------------------------------------- - * video_set_lut -- + * video_set_lut -- *----------------------------------------------------------------------------- */ void video_set_lut ( @@ -236,7 +236,7 @@ } #ifdef CONFIG_VIDEO_HW_CURSOR /*----------------------------------------------------------------------------- - * video_set_hw_cursor -- + * video_set_hw_cursor -- *----------------------------------------------------------------------------- */ void video_set_hw_cursor (int x, int y) @@ -248,7 +248,7 @@ } /*----------------------------------------------------------------------------- - * video_init_hw_cursor -- + * video_init_hw_cursor -- *----------------------------------------------------------------------------- */ void video_init_hw_cursor (int font_width, int font_height) @@ -256,47 +256,47 @@ volatile unsigned char *ptr; unsigned char pattern; int i; - + /* Init cursor content Cursor size is 64x64 pixels Start of the cursor memory depends on panel type (dual panel ...) */ if ((i = readByte (LCD_CURSOR_START)) == 0) { - ptr = (unsigned char *)(sed13806.frameAdrs + DEFAULT_VIDEO_MEMORY_SIZE - HWCURSORSIZE); + ptr = (unsigned char *)(sed13806.frameAdrs + DEFAULT_VIDEO_MEMORY_SIZE - HWCURSORSIZE); } else { - ptr = (unsigned char *)(sed13806.frameAdrs + DEFAULT_VIDEO_MEMORY_SIZE - (i * 8192)); + ptr = (unsigned char *)(sed13806.frameAdrs + DEFAULT_VIDEO_MEMORY_SIZE - (i * 8192)); } /* Fill the first line and the first empty line after cursor */ for (i = 0, pattern = 0; i < 64; i++) { - if (i < font_width) { - /* Invert background */ - pattern |= 0x3; - - } - else { - /* Background */ - pattern |= 0x2; - } - if ((i & 3) == 3) { - *ptr = pattern; - *(ptr + font_height * 16) = 0xaa; - ptr ++; - pattern = 0; - } - pattern <<= 2; + if (i < font_width) { + /* Invert background */ + pattern |= 0x3; + + } + else { + /* Background */ + pattern |= 0x2; + } + if ((i & 3) == 3) { + *ptr = pattern; + *(ptr + font_height * 16) = 0xaa; + ptr ++; + pattern = 0; + } + pattern <<= 2; } /* Duplicate this line */ for (i = 1; i < font_height; i++) { - memcpy ((void *)ptr, (void *)(ptr - 16), 16); - ptr += 16; + memcpy ((void *)ptr, (void *)(ptr - 16), 16); + ptr += 16; } - + for (; i < 64; i++) { - memcpy ((void *)(ptr + 16), (void *)ptr, 16); - ptr += 16; + memcpy ((void *)(ptr + 16), (void *)ptr, 16); + ptr += 16; } /* Select cursor mode */ diff --git a/drivers/smc91111.c b/drivers/smc91111.c index f29a8a4..9bee025 100644 --- a/drivers/smc91111.c +++ b/drivers/smc91111.c @@ -52,7 +52,7 @@ . o skeleton.c by Donald Becker ( becker@cesdis.gsfc.nasa.gov ) . . History: - . 06/19/03 Richard Woodruff Made u-boot environment aware and added mac addr checks. + . 06/19/03 Richard Woodruff Made u-boot environment aware and added mac addr checks. . 10/17/01 Marco Hasewinkel Modify for DNP/1110 . 07/25/01 Woojung Huh Modify for ADS Bitsy . 04/25/01 Daris A Nevil Initial public release through SMSC @@ -153,9 +153,6 @@ extern int eth_send(volatile void *packet, int length); - - - /* . This is called by register_netdev(). It is responsible for . checking the portlist for the SMC9000 series chipset. If it finds @@ -201,7 +198,7 @@ static int smc_rcv(void); /* See if a MAC address is defined in the current environment. If so use it. If not - . print a warning and set the environment and other globals with the default. + . print a warning and set the environment and other globals with the default. . If an EEPROM is present it really should be consulted. */ int smc_get_ethaddr(bd_t *bd); @@ -238,18 +235,18 @@ #if 0 void smc_get_macaddr( byte *addr ) { /* MAC ADDRESS AT FLASHBLOCK 1 / OFFSET 0x10 */ - unsigned char *dnp1110_mac = (unsigned char *) (0xE8000000 + 0x20010); + unsigned char *dnp1110_mac = (unsigned char *) (0xE8000000 + 0x20010); int i; - for (i=0; i<6; i++) { - addr[0] = *(dnp1110_mac+0); - addr[1] = *(dnp1110_mac+1); - addr[2] = *(dnp1110_mac+2); - addr[3] = *(dnp1110_mac+3); - addr[4] = *(dnp1110_mac+4); - addr[5] = *(dnp1110_mac+5); - } + for (i=0; i<6; i++) { + addr[0] = *(dnp1110_mac+0); + addr[1] = *(dnp1110_mac+1); + addr[2] = *(dnp1110_mac+2); + addr[3] = *(dnp1110_mac+3); + addr[4] = *(dnp1110_mac+4); + addr[5] = *(dnp1110_mac+5); + } } #endif /* 0 */ @@ -258,16 +255,16 @@ ***********************************************/ void dump_memory_info(void) { - word mem_info; - word old_bank; + word mem_info; + word old_bank; - old_bank = SMC_inw(BANK_SELECT)&0xF; + old_bank = SMC_inw(BANK_SELECT)&0xF; - SMC_SELECT_BANK(0); - mem_info = SMC_inw( MIR_REG ); - PRINTK2("Memory: %4d available\n", (mem_info >> 8)*2048); + SMC_SELECT_BANK(0); + mem_info = SMC_inw( MIR_REG ); + PRINTK2("Memory: %4d available\n", (mem_info >> 8)*2048); - SMC_SELECT_BANK(old_bank); + SMC_SELECT_BANK(old_bank); } /* . A rather simple routine to print out a packet for debugging purposes. @@ -279,7 +276,6 @@ #define tx_done(dev) 1 - /* this does a soft reset on the device */ static void smc_reset( void ); @@ -308,9 +304,9 @@ SMC_SELECT_BANK(2); while((SMC_inw(SMC91111_INT_REG) & mask) == 0) { - if (get_timer(0) >= tmo) { + if (get_timer(0) >= tmo) { is_timeout = 1; - break; + break; } } @@ -329,7 +325,7 @@ int count = 0; /* assume bank 2 selected */ while ( SMC_inw(MMU_CMD_REG) & MC_BUSY ) { - udelay(1); // Wait until not busy + udelay(1); /* Wait until not busy */ if( ++count > 200) break; } } @@ -398,7 +394,7 @@ /* Note: It doesn't seem that waiting for the MMU busy is needed here, but this is a place where future chipsets _COULD_ break. Be wary - of issuing another MMU command right after this */ + of issuing another MMU command right after this */ /* Disable all interrupts */ SMC_outb( 0, IM_REG ); @@ -526,11 +522,11 @@ if ( status & IM_ALLOC_INT ) { /* acknowledge the interrupt */ SMC_outb( IM_ALLOC_INT, SMC91111_INT_REG ); - break; + break; } - } while ( -- time_out ); + } while ( -- time_out ); - if ( !time_out ) { + if ( !time_out ) { PRINTK2("%s: memory allocation, try %d failed ...\n", SMC_DEV_NAME, try); if (try < SMC_ALLOC_MAX_TRY) @@ -564,7 +560,7 @@ /* point to the beginning of the packet */ SMC_outw( PTR_AUTOINC , PTR_REG ); - PRINTK3("%s: Trying to xmit packet of length %x\n", + PRINTK3("%s: Trying to xmit packet of length %x\n", SMC_DEV_NAME, length); #if SMC_DEBUG > 2 @@ -573,7 +569,7 @@ #endif /* send the packet length ( +6 for status, length and ctl byte ) - and the status word ( set to zeros ) */ + and the status word ( set to zeros ) */ #ifdef USE_32_BIT SMC_outl( (length +6 ) << 16 , SMC91111_DATA_REG ); #else @@ -585,8 +581,8 @@ /* send the actual data . I _think_ it's faster to send the longs first, and then . mop up by sending the last word. It depends heavily - . on alignment, at least on the 486. Maybe it would be - . a good idea to check which is optimal? But that could take + . on alignment, at least on the 486. Maybe it would be + . a good idea to check which is optimal? But that could take . almost as much time as is saved? */ #ifdef USE_32_BIT @@ -614,15 +610,15 @@ SMC_DEV_NAME); /* release packet */ - SMC_outw(MC_FREEPKT, MMU_CMD_REG); + SMC_outw(MC_FREEPKT, MMU_CMD_REG); - /* wait for MMU getting ready (low) */ - while (SMC_inw(MMU_CMD_REG) & MC_BUSY) - { - udelay(10); - } + /* wait for MMU getting ready (low) */ + while (SMC_inw(MMU_CMD_REG) & MC_BUSY) + { + udelay(10); + } - PRINTK2("MMU ready\n"); + PRINTK2("MMU ready\n"); return 0; @@ -632,15 +628,15 @@ PRINTK2("%s: Sent packet of length %d \n", SMC_DEV_NAME, length); /* release packet */ - SMC_outw(MC_FREEPKT, MMU_CMD_REG); + SMC_outw(MC_FREEPKT, MMU_CMD_REG); - /* wait for MMU getting ready (low) */ - while (SMC_inw(MMU_CMD_REG) & MC_BUSY) - { - udelay(10); - } + /* wait for MMU getting ready (low) */ + while (SMC_inw(MMU_CMD_REG) & MC_BUSY) + { + udelay(10); + } - PRINTK2("MMU ready\n"); + PRINTK2("MMU ready\n"); } @@ -690,11 +686,11 @@ /* SMC_SELECT_BANK(0); */ /* SMC_outw(0, RPC_REG); */ SMC_SELECT_BANK(1); - + err = smc_get_ethaddr(bd); /* set smc_mac_addr, and sync it with u-boot globals */ - if(err < 0){ - memset(bd->bi_enetaddr, 0, 6); /* hack to make error stick! upper code will abort if not set*/ - return(-1); /* upper code ignores this, but NOT bi_enetaddr */ + if(err < 0){ + memset(bd->bi_enetaddr, 0, 6); /* hack to make error stick! upper code will abort if not set*/ + return(-1); /* upper code ignores this, but NOT bi_enetaddr */ } #ifdef USE_32_BIT @@ -783,7 +779,6 @@ packet_length -= 4; /*4; */ - /* set odd length for bug in LAN91C111, */ /* which never sets RS_ODDFRAME */ /* TODO ? */ @@ -843,7 +838,6 @@ } - /*---------------------------------------------------- . smc_close . @@ -1203,7 +1197,6 @@ #endif /* !CONFIG_SMC91111_EXT_PHY */ - /*------------------------------------------------------------ . Waits the specified number of milliseconds - kernel friendly .-------------------------------------------------------------*/ @@ -1215,7 +1208,6 @@ #endif /* !CONFIG_SMC91111_EXT_PHY */ - /*------------------------------------------------------------ . Configures the specified PHY using Autonegotiation. Calls . smc_phy_fixed() if the user has requested a certain config. @@ -1233,7 +1225,6 @@ PRINTK3("%s:smc_program_phy()\n", SMC_DEV_NAME); - /* Get the detected phy address */ phyaddr = SMC_PHY_ADDR; @@ -1358,36 +1349,36 @@ static void print_packet( byte * buf, int length ) { #if 0 - int i; - int remainder; - int lines; + int i; + int remainder; + int lines; - printf("Packet of length %d \n", length ); + printf("Packet of length %d \n", length ); #if SMC_DEBUG > 3 - lines = length / 16; - remainder = length % 16; + lines = length / 16; + remainder = length % 16; - for ( i = 0; i < lines ; i ++ ) { - int cur; + for ( i = 0; i < lines ; i ++ ) { + int cur; - for ( cur = 0; cur < 8; cur ++ ) { - byte a, b; + for ( cur = 0; cur < 8; cur ++ ) { + byte a, b; - a = *(buf ++ ); - b = *(buf ++ ); - printf("%02x%02x ", a, b ); - } - printf("\n"); - } - for ( i = 0; i < remainder/2 ; i++ ) { - byte a, b; + a = *(buf ++ ); + b = *(buf ++ ); + printf("%02x%02x ", a, b ); + } + printf("\n"); + } + for ( i = 0; i < remainder/2 ; i++ ) { + byte a, b; - a = *(buf ++ ); - b = *(buf ++ ); - printf("%02x%02x ", a, b ); - } - printf("\n"); + a = *(buf ++ ); + b = *(buf ++ ); + printf("%02x%02x ", a, b ); + } + printf("\n"); #endif #endif } @@ -1413,45 +1404,45 @@ { int env_size, rom_valid, env_present = 0, reg; char *s = NULL, *e, *v_mac, es[] = "11:22:33:44:55:66"; - uchar s_env_mac[64], v_env_mac[6], v_rom_mac[6]; + uchar s_env_mac[64], v_env_mac[6], v_rom_mac[6]; - env_size = getenv_r ("ethaddr", s_env_mac, sizeof (s_env_mac)); + env_size = getenv_r ("ethaddr", s_env_mac, sizeof (s_env_mac)); if ((env_size > 0) && (env_size < sizeof(es))) { /* exit if env is bad */ - printf("\n*** ERROR: ethaddr is not set properly!!\n"); - return(-1); + printf("\n*** ERROR: ethaddr is not set properly!!\n"); + return(-1); } - + if(env_size > 0){ - env_present = 1; - s = s_env_mac; + env_present = 1; + s = s_env_mac; } - + for (reg = 0; reg < 6; ++reg) { /* turn string into mac value */ - v_env_mac[reg] = s ? simple_strtoul (s, &e, 16) : 0; - if (s) - s = (*e) ? e + 1 : e; + v_env_mac[reg] = s ? simple_strtoul (s, &e, 16) : 0; + if (s) + s = (*e) ? e + 1 : e; } - - rom_valid = get_rom_mac(v_rom_mac); /* get ROM mac value if any */ - + + rom_valid = get_rom_mac(v_rom_mac); /* get ROM mac value if any */ + if(!env_present){ /* if NO env */ - if(rom_valid){ /* but ROM is valid */ - v_mac = v_rom_mac; - sprintf (s_env_mac, "%02X:%02X:%02X:%02X:%02X:%02X", v_mac[0], - v_mac[1] ,v_mac[2], v_mac[3],v_mac[4], v_mac[5]) ; - setenv ("ethaddr", s_env_mac); - }else{ /* no env, bad ROM */ - printf("\n*** ERROR: ethaddr is NOT set !!\n"); - return(-1); - } + if(rom_valid){ /* but ROM is valid */ + v_mac = v_rom_mac; + sprintf (s_env_mac, "%02X:%02X:%02X:%02X:%02X:%02X", v_mac[0], + v_mac[1] ,v_mac[2], v_mac[3],v_mac[4], v_mac[5]) ; + setenv ("ethaddr", s_env_mac); + }else{ /* no env, bad ROM */ + printf("\n*** ERROR: ethaddr is NOT set !!\n"); + return(-1); + } }else /* good env, don't care ROM */ v_mac = v_env_mac; /* always use a good env over a ROM */ - + if(env_present && rom_valid) /* if both env and ROM are good */ - if(memcmp(v_env_mac, v_rom_mac, 6) != 0){ - printf("\n*** Warning: Environment and ROM MAC addresses don't match\n"); - printf("*** Using Environment MAC\n"); - } + if(memcmp(v_env_mac, v_rom_mac, 6) != 0){ + printf("\n*** Warning: Environment and ROM MAC addresses don't match\n"); + printf("*** Using Environment MAC\n"); + } memcpy (bd->bi_enetaddr, v_mac, 6); /* update global address to match env (allows env changing) */ smc_set_mac_addr(v_mac); /* use old function to update smc default */ return(0); @@ -1460,7 +1451,7 @@ int get_rom_mac(char *v_rom_mac) { int is_rom_present = 0; -#ifdef HARDCODE_MAC /* used for testing or to supress run time warnings */ +#ifdef HARDCODE_MAC /* used for testing or to supress run time warnings */ char hw_mac_addr[] = {0x02, 0x80, 0xad, 0x20, 0x31, 0xb8}; memcpy (v_rom_mac, hw_mac_addr, 6); @@ -1468,12 +1459,12 @@ #else if(is_rom_present) { - /* if eeprom contents are valid - * extract mac address into hw_mac_addr, 8 or 16 bit accesses - * memcpy (v_rom_mac, hc_mac_addr, 6); - * return(1); - */ - } + /* if eeprom contents are valid + * extract mac address into hw_mac_addr, 8 or 16 bit accesses + * memcpy (v_rom_mac, hc_mac_addr, 6); + * return(1); + */ + } memset(v_rom_mac, 0, 6); return(0); #endif diff --git a/drivers/smc91111.h b/drivers/smc91111.h index 3ac0a03..4efa256 100644 --- a/drivers/smc91111.h +++ b/drivers/smc91111.h @@ -574,7 +574,6 @@ /* Uses the same bit definitions as PHY_INT_REG */ - /*------------------------------------------------------------------------- . I define some macros to make it easier to do somewhat common . or slightly complicated, repeated tasks. @@ -616,4 +615,3 @@ IM_MDINT) #endif /* _SMC_91111_H_ */ - diff --git a/drivers/smiLynxEM.c b/drivers/smiLynxEM.c index 75d5a31..c2b98cf 100644 --- a/drivers/smiLynxEM.c +++ b/drivers/smiLynxEM.c @@ -54,9 +54,9 @@ */ #define VIDEO_MODES 7 #define DUAL_800_600 0 /* SMI710:VGA1:75Hz (pitch=1600) */ - /* VGA2:60/120Hz (pitch=1600) */ - /* SMI810:VGA1:75Hz (pitch=1600) */ - /* VGA2:75Hz (pitch=1600) */ + /* VGA2:60/120Hz (pitch=1600) */ + /* SMI810:VGA1:75Hz (pitch=1600) */ + /* VGA2:75Hz (pitch=1600) */ #define DUAL_1024_768 1 /* VGA1:75Hz VGA2:73Hz (pitch=2048) */ #define SINGLE_800_600 2 /* VGA1:75Hz (pitch=800) */ #define SINGLE_1024_768 3 /* VGA1:75Hz (pitch=1024) */ @@ -127,7 +127,6 @@ } SmiCapturePort; - /* * Register values for common video modes */ @@ -514,8 +513,8 @@ for (i=0; ivprBase + 0x0010), - ((pVP->offset / 8 * pGD->gdfBytesPP) << 16) | - (pGD->plnSizeX / 8 * pGD->gdfBytesPP)); + ((pVP->offset / 8 * pGD->gdfBytesPP) << 16) | + (pGD->plnSizeX / 8 * pGD->gdfBytesPP)); /* video window 1 */ out32r ((pGD->vprBase + 0x0014), - ((pVWin->top << 16) | pVWin->left)); + ((pVWin->top << 16) | pVWin->left)); out32r ((pGD->vprBase + 0x0018), - ((pVWin->bottom << 16) | pVWin->right)); + ((pVWin->bottom << 16) | pVWin->right)); out32r ((pGD->vprBase + 0x001c), pVWin->srcStart / 8); out32r ((pGD->vprBase + 0x0020), - (((pVWin->offset / 8) << 16) | (pVWin->width / 8))); + (((pVWin->offset / 8) << 16) | (pVWin->width / 8))); out32r ((pGD->vprBase + 0x0024), - (((pVWin->hStretch) << 8) | pVWin->vStretch)); + (((pVWin->hStretch) << 8) | pVWin->vStretch)); /* video window 2 */ out32r ((pGD->vprBase + 0x0028), - ((pVWin->top << 16) | pVWin->left)); + ((pVWin->top << 16) | pVWin->left)); out32r ((pGD->vprBase + 0x002c), - ((pVWin->bottom << 16) | pVWin->right)); + ((pVWin->bottom << 16) | pVWin->right)); out32r ((pGD->vprBase + 0x0030), - pVWin->srcStart / 8); + pVWin->srcStart / 8); out32r ((pGD->vprBase + 0x0034), - (((pVWin->offset / 8) << 16) | (pVWin->width / 8))); + (((pVWin->offset / 8) << 16) | (pVWin->width / 8))); out32r ((pGD->vprBase + 0x0038), - (((pVWin->hStretch) << 8) | pVWin->vStretch)); + (((pVWin->hStretch) << 8) | pVWin->vStretch)); /* fifo prio control */ out32r ((pGD->vprBase + 0x0054), pVP->fifoPrio); @@ -634,31 +633,31 @@ /* set clip rect */ out32r ((pGD->dprBase + 0x002c), 0); out32r ((pGD->dprBase + 0x0030), - ((pGD->winSizeY<<16) | pGD->winSizeX * pGD->gdfBytesPP )); + ((pGD->winSizeY<<16) | pGD->winSizeX * pGD->gdfBytesPP )); /* src row pitch */ val = 0xffff0000 & (in32r ((pGD->dprBase + 0x0010))); out32r ((pGD->dprBase + 0x0010), - (val | pGD->plnSizeX * pGD->gdfBytesPP)); + (val | pGD->plnSizeX * pGD->gdfBytesPP)); /* dst row pitch */ val = 0x0000ffff & (in32r ((pGD->dprBase + 0x0010))); out32r ((pGD->dprBase + 0x0010), - (((pGD->plnSizeX * pGD->gdfBytesPP)<<16) | val)); + (((pGD->plnSizeX * pGD->gdfBytesPP)<<16) | val)); /* window width src/dst */ out32r ((pGD->dprBase + 0x003c), - (((pGD->plnSizeX * pGD->gdfBytesPP & 0x0fff)<<16) | - (pGD->plnSizeX * pGD->gdfBytesPP & 0x0fff))); + (((pGD->plnSizeX * pGD->gdfBytesPP & 0x0fff)<<16) | + (pGD->plnSizeX * pGD->gdfBytesPP & 0x0fff))); out16r ((pGD->dprBase + 0x001e), 0x0000); /* src base adrs */ out32r ((pGD->dprBase + 0x0040), - (((pGD->frameAdrs/8) & 0x000fffff))); + (((pGD->frameAdrs/8) & 0x000fffff))); /* dst base adrs */ out32r ((pGD->dprBase + 0x0044), - (((pGD->frameAdrs/8) & 0x000fffff))); + (((pGD->frameAdrs/8) & 0x000fffff))); /* foreground color */ out32r ((pGD->dprBase + 0x0014), pGD->fg); @@ -702,29 +701,29 @@ unsigned int gdfTab[] = { 1, 2, 2, 4, 3, 1 }; char *penv; char *gdfModes[] = - { - "8 Bit Index Color", - "15 Bit 5-5-5 RGB", - "16 Bit 5-6-5 RGB", - "32 Bit X-8-8-8 RGB", - "24 Bit 8-8-8 RGB", - "8 Bit 3-3-2 RGB" - }; + { + "8 Bit Index Color", + "15 Bit 5-5-5 RGB", + "16 Bit 5-6-5 RGB", + "32 Bit X-8-8-8 RGB", + "24 Bit 8-8-8 RGB", + "8 Bit 3-3-2 RGB" + }; int vgaModes[16][2] = - { - {769, -1}, {771, 0x00002}, {773, 0x00003}, {775, 0x00004}, - {784, -1}, {787, 0x10002}, {790, 0x10003}, {793, 0x10004}, - {785, -1}, {788, 0x20002}, {791, 0x20003}, {794, 0x20004}, - {786, -1}, {789, 0x40002}, {792, 0x40003}, {795, 0x40004} - }; + { + {769, -1}, {771, 0x00002}, {773, 0x00003}, {775, 0x00004}, + {784, -1}, {787, 0x10002}, {790, 0x10003}, {793, 0x10004}, + {785, -1}, {788, 0x20002}, {791, 0x20003}, {794, 0x20004}, + {786, -1}, {789, 0x40002}, {792, 0x40003}, {795, 0x40004} + }; /* Search for video chip */ printf("Video: "); if ((devbusfn = pci_find_devices(supported, 0)) < 0) { - printf ("Controller not found !\n"); - return (NULL); + printf ("Controller not found !\n"); + return (NULL); } /* PCI setup */ @@ -735,29 +734,29 @@ /* Initialize the video controller */ if ((penv = getenv ("videomode")) != NULL) - videomode = (int)simple_strtoul (penv, NULL, 16); + videomode = (int)simple_strtoul (penv, NULL, 16); else - videomode = 0x303; /* Default 800x600 8 bit index color */ + videomode = 0x303; /* Default 800x600 8 bit index color */ /* Compare with common vga mode numbers */ for (i=0; i<16; i++) { - if (vgaModes[i][0] == videomode) - { - if (vgaModes[i][1] == -1) - { - printf("Videomode not supported !\n"); - return (NULL); /* mode not supported */ - } - pGD->mode = vgaModes[i][1]; /* use driver int. mode number */ - break; - } + if (vgaModes[i][0] == videomode) + { + if (vgaModes[i][1] == -1) + { + printf("Videomode not supported !\n"); + return (NULL); /* mode not supported */ + } + pGD->mode = vgaModes[i][1]; /* use driver int. mode number */ + break; + } } /* Extract graphic data format */ pGD->gdfIndex = (pGD->mode & 0x00070000) >> 16; if (pGD->gdfIndex > 5) - pGD->gdfIndex = 0; + pGD->gdfIndex = 0; pGD->gdfBytesPP = gdfTab[pGD->gdfIndex]; /* Extract graphic resolution */ @@ -766,71 +765,71 @@ /* Exit for not supported resolutions */ if (((pGD->mode==DUAL_800_600) || (pGD->mode==DUAL_1024_768)) && (pGD->gdfBytesPP > 1)) { - printf ("Dual screen for 1BPP only !\n"); - return (NULL); + printf ("Dual screen for 1BPP only !\n"); + return (NULL); } if ((pGD->mode==SINGLE_1280_1024) && (pGD->gdfBytesPP==4)) { - printf ("Out of memory !\n"); - return (NULL); + printf ("Out of memory !\n"); + return (NULL); } /* Set graphic parameters */ switch (pGD->mode) { case DUAL_800_600: - pGD->winSizeX = 800; - pGD->winSizeY = 600; - pGD->plnSizeX = 1600; - pGD->plnSizeY = 600; - sprintf (pGD->modeIdent, "Dual Screen 800x600 with %s", gdfModes[pGD->gdfIndex]); - break; + pGD->winSizeX = 800; + pGD->winSizeY = 600; + pGD->plnSizeX = 1600; + pGD->plnSizeY = 600; + sprintf (pGD->modeIdent, "Dual Screen 800x600 with %s", gdfModes[pGD->gdfIndex]); + break; case DUAL_1024_768: - pGD->winSizeX = 1024; - pGD->winSizeY = 768; - pGD->plnSizeX = 2048; - pGD->plnSizeY = 768; - sprintf (pGD->modeIdent, "Dual Screen 1024x768 with %s", gdfModes[pGD->gdfIndex]); - break; + pGD->winSizeX = 1024; + pGD->winSizeY = 768; + pGD->plnSizeX = 2048; + pGD->plnSizeY = 768; + sprintf (pGD->modeIdent, "Dual Screen 1024x768 with %s", gdfModes[pGD->gdfIndex]); + break; case SINGLE_800_600: - pGD->winSizeX = 800; - pGD->winSizeY = 600; - pGD->plnSizeX = 800; - pGD->plnSizeY = 600; - sprintf (pGD->modeIdent, "Single Screen 800x600 with %s", gdfModes[pGD->gdfIndex]); - break; + pGD->winSizeX = 800; + pGD->winSizeY = 600; + pGD->plnSizeX = 800; + pGD->plnSizeY = 600; + sprintf (pGD->modeIdent, "Single Screen 800x600 with %s", gdfModes[pGD->gdfIndex]); + break; case SINGLE_1024_768: - pGD->winSizeX = 1024; - pGD->winSizeY = 768; - pGD->plnSizeX = 1024; - pGD->plnSizeY = 768; - sprintf (pGD->modeIdent,"Single Screen 1024x768 with %s", gdfModes[pGD->gdfIndex]); - break; + pGD->winSizeX = 1024; + pGD->winSizeY = 768; + pGD->plnSizeX = 1024; + pGD->plnSizeY = 768; + sprintf (pGD->modeIdent,"Single Screen 1024x768 with %s", gdfModes[pGD->gdfIndex]); + break; case TV_MODE_CCIR: - pGD->winSizeX = 720; - pGD->winSizeY = 576; - pGD->plnSizeX = 720; - pGD->plnSizeY = 576; - sprintf (pGD->modeIdent, "TV Mode CCIR with %s", gdfModes[pGD->gdfIndex]); - break; + pGD->winSizeX = 720; + pGD->winSizeY = 576; + pGD->plnSizeX = 720; + pGD->plnSizeY = 576; + sprintf (pGD->modeIdent, "TV Mode CCIR with %s", gdfModes[pGD->gdfIndex]); + break; case TV_MODE_EIA: - pGD->winSizeX = 720; - pGD->winSizeY = 484; - pGD->plnSizeX = 720; - pGD->plnSizeY = 484; - sprintf (pGD->modeIdent, "TV Mode EIA with %s", gdfModes[pGD->gdfIndex]); - break; + pGD->winSizeX = 720; + pGD->winSizeY = 484; + pGD->plnSizeX = 720; + pGD->plnSizeY = 484; + sprintf (pGD->modeIdent, "TV Mode EIA with %s", gdfModes[pGD->gdfIndex]); + break; case SINGLE_1280_1024: - pGD->winSizeX = 1280; - pGD->winSizeY = 1024; - pGD->plnSizeX = 1280; - pGD->plnSizeY = 1024; - sprintf (pGD->modeIdent, "Single Screen 1280x1024 with %s", gdfModes[pGD->gdfIndex]); - break; + pGD->winSizeX = 1280; + pGD->winSizeY = 1024; + pGD->plnSizeX = 1280; + pGD->plnSizeY = 1024; + sprintf (pGD->modeIdent, "Single Screen 1280x1024 with %s", gdfModes[pGD->gdfIndex]); + break; default: - printf("Videomode not supported !\n"); - return (NULL); + printf("Videomode not supported !\n"); + return (NULL); } @@ -856,51 +855,51 @@ /* Sytem Control Register */ smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, - SMI_SCR, sizeof(SMI_SCR)); + SMI_SCR, sizeof(SMI_SCR)); /* extented CRT Register */ smiLoadRegs (SMI_INDX_D4, SMI_DATA_D5, - SMI_EXT_CRT[pGD->mode], sizeof(SMI_EXT_CRT)/VIDEO_MODES); + SMI_EXT_CRT[pGD->mode], sizeof(SMI_EXT_CRT)/VIDEO_MODES); /* Sequencer Register */ smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, - SMI_SEQR, sizeof(SMI_SEQR)); + SMI_SEQR, sizeof(SMI_SEQR)); /* Power Control Register */ smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, - SMI_PCR[pGD->mode], sizeof(SMI_PCR)/VIDEO_MODES); + SMI_PCR[pGD->mode], sizeof(SMI_PCR)/VIDEO_MODES); /* Memory Control Register */ smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, - SMI_MCR[pGD->mode], sizeof(SMI_MCR)/VIDEO_MODES); + SMI_MCR[pGD->mode], sizeof(SMI_MCR)/VIDEO_MODES); /* Clock Control Register */ smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, - SMI_CCR[pGD->mode], sizeof(SMI_CCR)/VIDEO_MODES); + SMI_CCR[pGD->mode], sizeof(SMI_CCR)/VIDEO_MODES); /* Shadow VGA Register */ smiLoadRegs (SMI_INDX_D4, SMI_DATA_D5, - SMI_SHVGA[pGD->mode], sizeof(SMI_SHVGA)/VIDEO_MODES); + SMI_SHVGA[pGD->mode], sizeof(SMI_SHVGA)/VIDEO_MODES); /* General Purpose Register */ smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, - SMI_GPR[pGD->mode], sizeof(SMI_GPR)/VIDEO_MODES); + SMI_GPR[pGD->mode], sizeof(SMI_GPR)/VIDEO_MODES); /* Hardware Cusor Register */ smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, - SMI_HCR[pGD->mode], sizeof(SMI_HCR)/VIDEO_MODES); + SMI_HCR[pGD->mode], sizeof(SMI_HCR)/VIDEO_MODES); /* Flat Panel Register */ smiLoadRegs (SMI_INDX_C4, SMI_DATA_C5, - SMI_FPR[pGD->mode], sizeof(SMI_FPR)/VIDEO_MODES); + SMI_FPR[pGD->mode], sizeof(SMI_FPR)/VIDEO_MODES); /* CRTC Register */ smiLoadRegs (SMI_INDX_D4, SMI_DATA_D5, - SMI_CRTCR[pGD->mode], sizeof(SMI_CRTCR)/VIDEO_MODES); + SMI_CRTCR[pGD->mode], sizeof(SMI_CRTCR)/VIDEO_MODES); /* Graphics Controller Register */ smiLoadRegs (SMI_INDX_CE, SMI_DATA_CF, - SMI_GCR, sizeof(SMI_GCR)); + SMI_GCR, sizeof(SMI_GCR)); /* Patch memory and refresh settings for SMI710 */ if (device_id == PCI_DEVICE_ID_SMI_710) diff --git a/drivers/sym53c8xx.c b/drivers/sym53c8xx.c index e03a049..ae10f80 100644 --- a/drivers/sym53c8xx.c +++ b/drivers/sym53c8xx.c @@ -38,7 +38,6 @@ #ifdef CONFIG_SCSI_SYM53C8XX #include -#include #include #include #include @@ -182,7 +181,6 @@ } - /****************************************************************************** * sets-up the SCSI controller * the base memory address is retrived via the pci_read_config_dword @@ -404,7 +402,6 @@ } - void scsi_set_script(ccb *pccb) { int busdevfunc = pccb->priv; @@ -587,7 +584,6 @@ } - void scsi_issue(ccb *pccb) { int busdevfunc = pccb->priv; @@ -750,8 +746,6 @@ } - - void scsi_chip_init(void) { /* first we issue a soft reset */ diff --git a/drivers/ti_pci1410a.c b/drivers/ti_pci1410a.c index a2b1a17..c672382 100644 --- a/drivers/ti_pci1410a.c +++ b/drivers/ti_pci1410a.c @@ -63,7 +63,6 @@ #include #include -#include #if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) && defined(CONFIG_IDE_TI_CARDBUS) @@ -94,7 +93,7 @@ #endif int rcode = 0; - + if (argc != 2) { printf ("Usage: pinit {on | off}\n"); return 1; @@ -107,7 +106,7 @@ printf ("Usage: pinit {on | off}\n"); return 1; } - + return rcode; } @@ -125,14 +124,14 @@ static u32 pcmcia_cis_ptr; int pcmcia_on(int ide_base_bus) -{ +{ u16 dev_id; u32 socket_status; int slot = 0; int cis_len; u16 io_base; u16 io_len; - + /* * Find the CardBus PCI device(s). */ @@ -140,9 +139,9 @@ printf("Ti CardBus: not found\n"); return 1; } - + pci_read_config_word(devbusfn, PCI_DEVICE_ID, &dev_id); - + if (dev_id == 0xac56) { debug("Enable PCMCIA Ti PCI1510\n"); } else { @@ -153,7 +152,7 @@ cis_len = CFG_PCMCIA_CIS_WIN_SIZE; io_base = CFG_PCMCIA_IO_WIN; - io_len = CFG_PCMCIA_IO_WIN_SIZE; + io_len = CFG_PCMCIA_IO_WIN_SIZE; /* * Setup the PCI device. @@ -164,9 +163,9 @@ socket_status = readl(socket_base+8); if ((socket_status & 6) == 0) { printf("Card Present: "); - + switch (socket_status & 0x3c00) { - + case 0x400: printf("5V "); break; @@ -188,44 +187,44 @@ printf("32bit CardBus Card\n"); break; default: - printf("8bit PC-Card\n"); + printf("8bit PC-Card\n"); break; - } + } } - - + + writeb(0x41, socket_base + 0x806); /* Enable I/O window 0 and memory window 0 */ writeb(0x0e, socket_base + 0x807); /* Reset I/O window options */ /* Careful: the linux yenta driver do not seem to reset the offset * in the i/o windows, so leaving them non-zero is a problem */ - + writeb(io_base & 0xff, socket_base + 0x808); /* I/O window 0 base address */ writeb(io_base>>8, socket_base + 0x809); writeb((io_base + io_len - 1) & 0xff, socket_base + 0x80a); /* I/O window 0 end address */ writeb((io_base + io_len - 1)>>8, socket_base + 0x80b); - writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address 0x000 */ + writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address 0x000 */ writeb(0x00, socket_base + 0x837); - - writeb((pcmcia_cis_ptr&0x000ff000) >> 12, + + writeb((pcmcia_cis_ptr&0x000ff000) >> 12, socket_base + 0x810); /* Memory window 0 start address bits 19-12 */ - writeb((pcmcia_cis_ptr&0x00f00000) >> 20, + writeb((pcmcia_cis_ptr&0x00f00000) >> 20, socket_base + 0x811); /* Memory window 0 start address bits 23-20 */ - writeb(((pcmcia_cis_ptr+cis_len-1) & 0x000ff000) >> 12, + writeb(((pcmcia_cis_ptr+cis_len-1) & 0x000ff000) >> 12, socket_base + 0x812); /* Memory window 0 end address bits 19-12*/ - writeb(((pcmcia_cis_ptr+cis_len-1) & 0x00f00000) >> 20, + writeb(((pcmcia_cis_ptr+cis_len-1) & 0x00f00000) >> 20, socket_base + 0x813); /* Memory window 0 end address bits 23-20*/ - writeb(0x00, socket_base + 0x814); /* Memory window 0 offset bits 19-12 */ - writeb(0x40, socket_base + 0x815); /* Memory window 0 offset bits 23-20 and + writeb(0x00, socket_base + 0x814); /* Memory window 0 offset bits 19-12 */ + writeb(0x40, socket_base + 0x815); /* Memory window 0 offset bits 23-20 and * options (read/write, attribute access) */ writeb(0x00, socket_base + 0x816); /* ExCA card-detect and general control */ writeb(0x00, socket_base + 0x81e); /* ExCA global control (interrupt modes) */ - - writeb((pcmcia_cis_ptr & 0xff000000) >> 24, + + writeb((pcmcia_cis_ptr & 0xff000000) >> 24, socket_base + 0x840); /* Memory window address bits 31-24 */ - + /* turn off voltage */ if (voltage_set(slot, 0, 0)) { return 1; @@ -235,11 +234,11 @@ if (hardware_enable(slot)) { return 1; } - + if (check_ide_device(slot, ide_base_bus)) { return 1; } - + return 0; } @@ -249,30 +248,30 @@ static int pcmcia_off (void) { int slot = 0; - + writeb(0x00, socket_base + 0x806); /* disable all I/O and memory windows */ - + writeb(0x00, socket_base + 0x808); /* I/O window 0 base address */ writeb(0x00, socket_base + 0x809); writeb(0x00, socket_base + 0x80a); /* I/O window 0 end address */ writeb(0x00, socket_base + 0x80b); - writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address */ + writeb(0x00, socket_base + 0x836); /* I/O window 0 offset address */ writeb(0x00, socket_base + 0x837); - + writeb(0x00, socket_base + 0x80c); /* I/O window 1 base address */ writeb(0x00, socket_base + 0x80d); writeb(0x00, socket_base + 0x80e); /* I/O window 1 end address */ writeb(0x00, socket_base + 0x80f); - writeb(0x00, socket_base + 0x838); /* I/O window 1 offset address */ + writeb(0x00, socket_base + 0x838); /* I/O window 1 offset address */ writeb(0x00, socket_base + 0x839); - + writeb(0x00, socket_base + 0x810); /* Memory window 0 start address */ writeb(0x00, socket_base + 0x811); writeb(0x00, socket_base + 0x812); /* Memory window 0 end address */ writeb(0x00, socket_base + 0x813); writeb(0x00, socket_base + 0x814); /* Memory window 0 offset */ writeb(0x00, socket_base + 0x815); - + writeb(0xc0, socket_base + 0x840); /* Memory window 0 page address */ @@ -282,7 +281,7 @@ /* disable external hardware */ printf ("Shutdown and Poweroff Ti PCI1410A\n"); hardware_disable(slot); - + return 0; } @@ -307,14 +306,14 @@ u32 socket_status; debug ("PCMCIA MEM: %08X\n", pcmcia_cis_ptr); - + socket_status = readl(socket_base+8); - + if ((socket_status & 6) != 0 || (socket_status & 0x20) != 0) { printf("no card or CardBus card\n"); return 1; } - + start = p = (volatile uchar *) pcmcia_cis_ptr; while ((p - start) < MAX_TUPEL_SZ) { @@ -327,7 +326,7 @@ len = *p; p += 2; #if defined(DEBUG) && (DEBUG > 1) - { + { volatile uchar *q = p; printf ("\nTuple code %02x length %d\n\tData:", code, len); @@ -378,28 +377,27 @@ printf("unknown card type\n"); return 1; } - + /* select config index 1 */ - writeb(1, pcmcia_cis_ptr + config_base); + writeb(1, pcmcia_cis_ptr + config_base); #if 0 printf("Confiuration Option Register: %02x\n", readb(pcmcia_cis_ptr + config_base)); printf("Card Confiuration and Status Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 2)); printf("Pin Replacement Register Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 4)); printf("Socket and Copy Register: %02x\n", readb(pcmcia_cis_ptr + config_base + 6)); -#endif +#endif ide_devices_found |= (1 << (slot+ide_base_bus)); - + return 0; } - static int voltage_set(int slot, int vcc, int vpp) { u32 socket_control; int reg=0; - + switch (slot) { case 0: reg = socket_base + 0x10; @@ -407,10 +405,10 @@ default: return 1; } - + socket_control = 0; - - + + switch (vcc) { case 50: socket_control |= 0x20; @@ -421,7 +419,7 @@ case 0: default: } - + switch (vpp) { case 120: socket_control |= 0x1; @@ -437,27 +435,27 @@ } writel(socket_control, reg); - + debug ("voltage_set: Ti PCI1410A Slot %d, Vcc=%d.%d, Vpp=%d.%d\n", slot, vcc/10, vcc%10, vpp/10, vpp%10); - + udelay(500); return 0; } - + static int hardware_enable(int slot) { u32 socket_status; u16 brg_ctrl; int is_82365sl; - + socket_status = readl(socket_base+8); - + if ((socket_status & 6) == 0) { - + switch (socket_status & 0x3c00) { - + case 0x400: printf("5V "); voltage_set(slot, 50, 0); @@ -475,25 +473,24 @@ } else { voltage_set(slot, 0, 0); } - + pci_read_config_word(devbusfn, PCI_BRIDGE_CONTROL, &brg_ctrl); brg_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET; pci_write_config_word(devbusfn, PCI_BRIDGE_CONTROL, brg_ctrl); - is_82365sl = ((readb(socket_base+0x800) & 0x0f) == 2); + is_82365sl = ((readb(socket_base+0x800) & 0x0f) == 2); writeb(is_82365sl?0x90:0x98, socket_base+0x802); writeb(0x67, socket_base+0x803); udelay(100000); -#if 0 - printf("ExCA Id %02x, Card Status %02x, Power config %02x, Interrupt Config %02x, bridge control %04x %d\n", +#if 0 + printf("ExCA Id %02x, Card Status %02x, Power config %02x, Interrupt Config %02x, bridge control %04x %d\n", readb(socket_base+0x800), readb(socket_base+0x801), readb(socket_base+0x802), readb(socket_base+0x803), brg_ctrl, is_82365sl); -#endif - +#endif + return ((readb(socket_base+0x801)&0x6c)==0x6c)?0:1; } - static int hardware_disable(int slot) { voltage_set(slot, 0, 0); @@ -546,11 +543,11 @@ return; puts(indent); - + switch (*p) { case CISTPL_FUNCE_IDE_IFACE: { uchar iface = *(p+2); - + puts ((iface == CISTPL_IDE_INTERFACE) ? " IDE" : " unknown"); puts (" interface "); break; @@ -560,43 +557,43 @@ { uchar f1 = *(p+2); uchar f2 = *(p+4); - + puts((f1 & CISTPL_IDE_SILICON) ? " [silicon]" : " [rotating]"); - + if (f1 & CISTPL_IDE_UNIQUE) { puts(" [unique]"); } - + puts((f1 & CISTPL_IDE_DUAL) ? " [dual]" : " [single]"); - + if (f2 & CISTPL_IDE_HAS_SLEEP) { puts(" [sleep]"); } - + if (f2 & CISTPL_IDE_HAS_STANDBY) { puts(" [standby]"); } - + if (f2 & CISTPL_IDE_HAS_IDLE) { puts(" [idle]"); } - + if (f2 & CISTPL_IDE_LOW_POWER) { puts(" [low power]"); } - + if (f2 & CISTPL_IDE_REG_INHIBIT) { puts(" [reg inhibit]"); } - + if (f2 & CISTPL_IDE_HAS_INDEX) { puts(" [index]"); } - + if (f2 & CISTPL_IDE_IOIS16) { puts(" [IOis16]"); } - + break; } } @@ -623,10 +620,10 @@ if (p == NULL) return (0); /* Don't know */ - + t = id_str; done =0; - + for (i=0; i<=4 && !done; ++i, p+=2) { while ((data = *p) != '\0') { if (data == 0xFF) { @@ -661,7 +658,7 @@ return 1; } } - + return 0; /* don't know */ } diff --git a/drivers/tigon3.c b/drivers/tigon3.c index c20dbe5..ec2cd2a 100644 --- a/drivers/tigon3.c +++ b/drivers/tigon3.c @@ -53,7 +53,7 @@ STATIC LM_STATUS LM_SetupCopperPhy(PLM_DEVICE_BLOCK pDevice); STATIC PLM_ADAPTER_INFO LM_GetAdapterInfoBySsid(LM_UINT16 Svid, LM_UINT16 Ssid); STATIC LM_STATUS LM_DmaTest(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pBufferVirt, - LM_PHYSICAL_ADDRESS BufferPhy, LM_UINT32 BufferSize); + LM_PHYSICAL_ADDRESS BufferPhy, LM_UINT32 BufferSize); STATIC LM_STATUS LM_HaltCpu(PLM_DEVICE_BLOCK pDevice,LM_UINT32 cpu_number); STATIC LM_STATUS LM_ResetChip(PLM_DEVICE_BLOCK pDevice); STATIC LM_STATUS LM_Test4GBoundary(PLM_DEVICE_BLOCK pDevice, PLM_PACKET pPacket, @@ -90,7 +90,6 @@ } /* LM_RegRdInd */ - /******************************************************************************/ /* Description: */ /* */ @@ -113,7 +112,6 @@ } /* LM_RegWrInd */ - /******************************************************************************/ /* Description: */ /* */ @@ -140,7 +138,6 @@ } /* LM_MemRdInd */ - /******************************************************************************/ /* Description: */ /* */ @@ -163,7 +160,6 @@ } /* LM_MemWrInd */ - /******************************************************************************/ /* Description: */ /* */ @@ -184,84 +180,84 @@ pPacket = (PLM_PACKET) QQ_PopHead(&pDevice->RxPacketFreeQ.Container); while(pPacket) { - switch(pPacket->u.Rx.RcvProdRing) { + switch(pPacket->u.Rx.RcvProdRing) { #if T3_JUMBO_RCV_RCB_ENTRY_COUNT - case T3_JUMBO_RCV_PROD_RING: /* Jumbo Receive Ring. */ - /* Initialize the buffer descriptor. */ - pRcvBd = - &pDevice->pRxJumboBdVirt[pDevice->RxJumboProdIdx]; - pRcvBd->Flags = RCV_BD_FLAG_END | RCV_BD_FLAG_JUMBO_RING; - pRcvBd->Len = (LM_UINT16) pDevice->RxJumboBufferSize; + case T3_JUMBO_RCV_PROD_RING: /* Jumbo Receive Ring. */ + /* Initialize the buffer descriptor. */ + pRcvBd = + &pDevice->pRxJumboBdVirt[pDevice->RxJumboProdIdx]; + pRcvBd->Flags = RCV_BD_FLAG_END | RCV_BD_FLAG_JUMBO_RING; + pRcvBd->Len = (LM_UINT16) pDevice->RxJumboBufferSize; - /* Initialize the receive buffer pointer */ + /* Initialize the receive buffer pointer */ #if 0 /* Jimmy, deleted in new */ - pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low; - pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High; + pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low; + pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High; #endif - MM_MapRxDma(pDevice, pPacket, &pRcvBd->HostAddr); + MM_MapRxDma(pDevice, pPacket, &pRcvBd->HostAddr); - /* The opaque field may point to an offset from a fix addr. */ - pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR(pPacket) - - MM_UINT_PTR(pDevice->pPacketDescBase)); + /* The opaque field may point to an offset from a fix addr. */ + pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR(pPacket) - + MM_UINT_PTR(pDevice->pPacketDescBase)); - /* Update the producer index. */ - pDevice->RxJumboProdIdx = (pDevice->RxJumboProdIdx + 1) & - T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK; + /* Update the producer index. */ + pDevice->RxJumboProdIdx = (pDevice->RxJumboProdIdx + 1) & + T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK; - JumboBdAdded++; - break; + JumboBdAdded++; + break; #endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - case T3_STD_RCV_PROD_RING: /* Standard Receive Ring. */ - /* Initialize the buffer descriptor. */ - pRcvBd = &pDevice->pRxStdBdVirt[pDevice->RxStdProdIdx]; - pRcvBd->Flags = RCV_BD_FLAG_END; - pRcvBd->Len = MAX_STD_RCV_BUFFER_SIZE; + case T3_STD_RCV_PROD_RING: /* Standard Receive Ring. */ + /* Initialize the buffer descriptor. */ + pRcvBd = &pDevice->pRxStdBdVirt[pDevice->RxStdProdIdx]; + pRcvBd->Flags = RCV_BD_FLAG_END; + pRcvBd->Len = MAX_STD_RCV_BUFFER_SIZE; - /* Initialize the receive buffer pointer */ + /* Initialize the receive buffer pointer */ #if 0 /* Jimmy, deleted in new replaced with MM_MapRxDma */ - pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low; - pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High; + pRcvBd->HostAddr.Low = pPacket->u.Rx.RxBufferPhy.Low; + pRcvBd->HostAddr.High = pPacket->u.Rx.RxBufferPhy.High; #endif - MM_MapRxDma(pDevice, pPacket, &pRcvBd->HostAddr); + MM_MapRxDma(pDevice, pPacket, &pRcvBd->HostAddr); - /* The opaque field may point to an offset from a fix addr. */ - pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR(pPacket) - - MM_UINT_PTR(pDevice->pPacketDescBase)); + /* The opaque field may point to an offset from a fix addr. */ + pRcvBd->Opaque = (LM_UINT32) (MM_UINT_PTR(pPacket) - + MM_UINT_PTR(pDevice->pPacketDescBase)); - /* Update the producer index. */ - pDevice->RxStdProdIdx = (pDevice->RxStdProdIdx + 1) & - T3_STD_RCV_RCB_ENTRY_COUNT_MASK; + /* Update the producer index. */ + pDevice->RxStdProdIdx = (pDevice->RxStdProdIdx + 1) & + T3_STD_RCV_RCB_ENTRY_COUNT_MASK; - StdBdAdded++; - break; + StdBdAdded++; + break; - case T3_UNKNOWN_RCV_PROD_RING: - default: - Lmstatus = LM_STATUS_FAILURE; - break; - } /* switch */ + case T3_UNKNOWN_RCV_PROD_RING: + default: + Lmstatus = LM_STATUS_FAILURE; + break; + } /* switch */ - /* Bail out if there is any error. */ - if(Lmstatus != LM_STATUS_SUCCESS) - { - break; - } + /* Bail out if there is any error. */ + if(Lmstatus != LM_STATUS_SUCCESS) + { + break; + } - pPacket = (PLM_PACKET) QQ_PopHead(&pDevice->RxPacketFreeQ.Container); + pPacket = (PLM_PACKET) QQ_PopHead(&pDevice->RxPacketFreeQ.Container); } /* while */ wmb(); /* Update the procedure index. */ if(StdBdAdded) { - MB_REG_WR(pDevice, Mailbox.RcvStdProdIdx.Low, pDevice->RxStdProdIdx); + MB_REG_WR(pDevice, Mailbox.RcvStdProdIdx.Low, pDevice->RxStdProdIdx); } #if T3_JUMBO_RCV_RCB_ENTRY_COUNT if(JumboBdAdded) { - MB_REG_WR(pDevice, Mailbox.RcvJumboProdIdx.Low, - pDevice->RxJumboProdIdx); + MB_REG_WR(pDevice, Mailbox.RcvJumboProdIdx.Low, + pDevice->RxJumboProdIdx); } #endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ @@ -283,12 +279,12 @@ /* Intialize clock period and state machine. */ Value32 = SEEPROM_ADDR_CLK_PERD(SEEPROM_CLOCK_PERIOD) | - SEEPROM_ADDR_FSM_RESET; + SEEPROM_ADDR_FSM_RESET; REG_WR(pDevice, Grc.EepromAddr, Value32); for(j = 0; j < 100; j++) { - MM_Wait(10); + MM_Wait(10); } /* Serial eeprom access using the Grc.EepromAddr/EepromData registers. */ @@ -297,16 +293,16 @@ /* Set the 5701 compatibility mode if we are using EEPROM. */ if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5700 && - T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5701) + T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5701) { - Value32 = REG_RD(pDevice, Nvram.Config1); - if((Value32 & FLASH_INTERFACE_ENABLE) == 0) - { - /* Use the new interface to read EEPROM. */ - Value32 &= ~FLASH_COMPAT_BYPASS; + Value32 = REG_RD(pDevice, Nvram.Config1); + if((Value32 & FLASH_INTERFACE_ENABLE) == 0) + { + /* Use the new interface to read EEPROM. */ + Value32 &= ~FLASH_COMPAT_BYPASS; - REG_WR(pDevice, Nvram.Config1, Value32); - } + REG_WR(pDevice, Nvram.Config1, Value32); + } } } /* LM_NvRamInit */ @@ -329,7 +325,7 @@ if(Offset > SEEPROM_CHIP_SIZE) { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } Dev = Offset / SEEPROM_CHIP_SIZE; @@ -337,33 +333,32 @@ Value32 = REG_RD(pDevice, Grc.EepromAddr); Value32 &= ~(SEEPROM_ADDR_ADDRESS_MASK | SEEPROM_ADDR_DEV_ID_MASK | - SEEPROM_ADDR_RW_MASK); + SEEPROM_ADDR_RW_MASK); REG_WR(pDevice, Grc.EepromAddr, Value32 | SEEPROM_ADDR_DEV_ID(Dev) | - SEEPROM_ADDR_ADDRESS(Addr) | SEEPROM_ADDR_START | SEEPROM_ADDR_READ); + SEEPROM_ADDR_ADDRESS(Addr) | SEEPROM_ADDR_START | SEEPROM_ADDR_READ); for(j = 0; j < 1000; j++) { - Value32 = REG_RD(pDevice, Grc.EepromAddr); - if(Value32 & SEEPROM_ADDR_COMPLETE) - { - break; - } - MM_Wait(10); + Value32 = REG_RD(pDevice, Grc.EepromAddr); + if(Value32 & SEEPROM_ADDR_COMPLETE) + { + break; + } + MM_Wait(10); } if(Value32 & SEEPROM_ADDR_COMPLETE) { - Value32 = REG_RD(pDevice, Grc.EepromData); - *pData = Value32; + Value32 = REG_RD(pDevice, Grc.EepromData); + *pData = Value32; - return LM_STATUS_SUCCESS; + return LM_STATUS_SUCCESS; } return LM_STATUS_FAILURE; } /* LM_EepromRead */ - /******************************************************************************/ /* Description: */ /* */ @@ -380,88 +375,88 @@ LM_UINT32 j; if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Status = LM_EepromRead(pDevice, Offset, pData); + Status = LM_EepromRead(pDevice, Offset, pData); } else { - /* Determine if we have flash or EEPROM. */ - Value32 = REG_RD(pDevice, Nvram.Config1); - if(Value32 & FLASH_INTERFACE_ENABLE) - { - if(Value32 & FLASH_SSRAM_BUFFERRED_MODE) - { - Offset = ((Offset/BUFFERED_FLASH_PAGE_SIZE) << - BUFFERED_FLASH_PAGE_POS) + - (Offset % BUFFERED_FLASH_PAGE_SIZE); - } - } + /* Determine if we have flash or EEPROM. */ + Value32 = REG_RD(pDevice, Nvram.Config1); + if(Value32 & FLASH_INTERFACE_ENABLE) + { + if(Value32 & FLASH_SSRAM_BUFFERRED_MODE) + { + Offset = ((Offset/BUFFERED_FLASH_PAGE_SIZE) << + BUFFERED_FLASH_PAGE_POS) + + (Offset % BUFFERED_FLASH_PAGE_SIZE); + } + } - REG_WR(pDevice, Nvram.SwArb, SW_ARB_REQ_SET1); - for (j = 0; j < 1000; j++) - { - if (REG_RD(pDevice, Nvram.SwArb) & SW_ARB_GNT1) - { - break; - } - MM_Wait(20); - } - if (j == 1000) - { - return LM_STATUS_FAILURE; - } + REG_WR(pDevice, Nvram.SwArb, SW_ARB_REQ_SET1); + for (j = 0; j < 1000; j++) + { + if (REG_RD(pDevice, Nvram.SwArb) & SW_ARB_GNT1) + { + break; + } + MM_Wait(20); + } + if (j == 1000) + { + return LM_STATUS_FAILURE; + } - /* Read from flash or EEPROM with the new 5703/02 interface. */ - REG_WR(pDevice, Nvram.Addr, Offset & NVRAM_ADDRESS_MASK); + /* Read from flash or EEPROM with the new 5703/02 interface. */ + REG_WR(pDevice, Nvram.Addr, Offset & NVRAM_ADDRESS_MASK); - REG_WR(pDevice, Nvram.Cmd, NVRAM_CMD_RD | NVRAM_CMD_DO_IT | - NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_DONE); + REG_WR(pDevice, Nvram.Cmd, NVRAM_CMD_RD | NVRAM_CMD_DO_IT | + NVRAM_CMD_FIRST | NVRAM_CMD_LAST | NVRAM_CMD_DONE); - /* Wait for the done bit to clear. */ - for(j = 0; j < 500; j++) - { - MM_Wait(10); + /* Wait for the done bit to clear. */ + for(j = 0; j < 500; j++) + { + MM_Wait(10); - Value32 = REG_RD(pDevice, Nvram.Cmd); - if(!(Value32 & NVRAM_CMD_DONE)) - { - break; - } - } + Value32 = REG_RD(pDevice, Nvram.Cmd); + if(!(Value32 & NVRAM_CMD_DONE)) + { + break; + } + } - /* Wait for the done bit. */ - if(!(Value32 & NVRAM_CMD_DONE)) - { - for(j = 0; j < 500; j++) - { - MM_Wait(10); + /* Wait for the done bit. */ + if(!(Value32 & NVRAM_CMD_DONE)) + { + for(j = 0; j < 500; j++) + { + MM_Wait(10); - Value32 = REG_RD(pDevice, Nvram.Cmd); - if(Value32 & NVRAM_CMD_DONE) - { - MM_Wait(10); + Value32 = REG_RD(pDevice, Nvram.Cmd); + if(Value32 & NVRAM_CMD_DONE) + { + MM_Wait(10); - *pData = REG_RD(pDevice, Nvram.ReadData); + *pData = REG_RD(pDevice, Nvram.ReadData); - /* Change the endianess. */ - *pData = ((*pData & 0xff) << 24)| ((*pData & 0xff00) << 8)| - ((*pData & 0xff0000) >> 8) | ((*pData >> 24) & 0xff); + /* Change the endianess. */ + *pData = ((*pData & 0xff) << 24)| ((*pData & 0xff00) << 8)| + ((*pData & 0xff0000) >> 8) | ((*pData >> 24) & 0xff); - break; - } - } - } + break; + } + } + } - REG_WR(pDevice, Nvram.SwArb, SW_ARB_REQ_CLR1); - if(Value32 & NVRAM_CMD_DONE) - { - Status = LM_STATUS_SUCCESS; - } - else - { - Status = LM_STATUS_FAILURE; - } + REG_WR(pDevice, Nvram.SwArb, SW_ARB_REQ_CLR1); + if(Value32 & NVRAM_CMD_DONE) + { + Status = LM_STATUS_SUCCESS; + } + else + { + Status = LM_STATUS_FAILURE; + } } return Status; @@ -480,53 +475,53 @@ /* Read PN from VPD */ for (j = 0; j < 256; j += 4, Vpd_dptr++ ) { - if (LM_NvramRead(pDevice, 0x100 + j, &Value32) != LM_STATUS_SUCCESS) { - printf("BCM570x: LM_ReadVPD: VPD read failed" + if (LM_NvramRead(pDevice, 0x100 + j, &Value32) != LM_STATUS_SUCCESS) { + printf("BCM570x: LM_ReadVPD: VPD read failed" " (no EEPROM onboard)\n"); - return; - } - *Vpd_dptr = cpu_to_le32(Value32); + return; + } + *Vpd_dptr = cpu_to_le32(Value32); } for (j = 0; j < 256; ) { - unsigned int Vpd_r_len; - unsigned int Vpd_r_end; + unsigned int Vpd_r_len; + unsigned int Vpd_r_end; - if ((Vpd[j] == 0x82) || (Vpd[j] == 0x91)) - { - j = j + 3 + Vpd[j + 1] + (Vpd[j + 2] << 8); - } - else if (Vpd[j] == 0x90) - { - Vpd_r_len = Vpd[j + 1] + (Vpd[j + 2] << 8); - j += 3; - Vpd_r_end = Vpd_r_len + j; - while (j < Vpd_r_end) - { - if ((Vpd[j] == 'P') && (Vpd[j + 1] == 'N')) - { - unsigned int len = Vpd[j + 2]; + if ((Vpd[j] == 0x82) || (Vpd[j] == 0x91)) + { + j = j + 3 + Vpd[j + 1] + (Vpd[j + 2] << 8); + } + else if (Vpd[j] == 0x90) + { + Vpd_r_len = Vpd[j + 1] + (Vpd[j + 2] << 8); + j += 3; + Vpd_r_end = Vpd_r_len + j; + while (j < Vpd_r_end) + { + if ((Vpd[j] == 'P') && (Vpd[j + 1] == 'N')) + { + unsigned int len = Vpd[j + 2]; - if (len <= 24) - { - memcpy(pDevice->PartNo, &Vpd[j + 3], len); - } - break; - } - else - { - if (Vpd[j + 2] == 0) - { - break; - } - j = j + Vpd[j + 2]; - } - } - break; - } - else { - break; - } + if (len <= 24) + { + memcpy(pDevice->PartNo, &Vpd[j + 3], len); + } + break; + } + else + { + if (Vpd[j + 2] == 0) + { + break; + } + j = j + Vpd[j + 2]; + } + } + break; + } + else { + break; + } } } @@ -537,59 +532,59 @@ int i; if (LM_NvramRead(pDevice, 0x0, &Value32) != LM_STATUS_SUCCESS) - return; + return; if (Value32 != 0xaa559966) - return; + return; if (LM_NvramRead(pDevice, 0xc, &offset) != LM_STATUS_SUCCESS) - return; + return; offset = ((offset & 0xff) << 24)| ((offset & 0xff00) << 8)| - ((offset & 0xff0000) >> 8) | ((offset >> 24) & 0xff); + ((offset & 0xff0000) >> 8) | ((offset >> 24) & 0xff); if (LM_NvramRead(pDevice, offset, &Value32) != LM_STATUS_SUCCESS) - return; + return; if ((Value32 == 0x0300000e) && - (LM_NvramRead(pDevice, offset + 4, &Value32) == LM_STATUS_SUCCESS) && - (Value32 == 0)) { + (LM_NvramRead(pDevice, offset + 4, &Value32) == LM_STATUS_SUCCESS) && + (Value32 == 0)) { - if (LM_NvramRead(pDevice, offset + 8, &ver_offset) != LM_STATUS_SUCCESS) - return; - ver_offset = ((ver_offset & 0xff0000) >> 8) | - ((ver_offset >> 24) & 0xff); - for (i = 0; i < 16; i += 4) { - if (LM_NvramRead(pDevice, offset + ver_offset + i, &Value32) != - LM_STATUS_SUCCESS) - { - return; - } - *((LM_UINT32 *) &pDevice->BootCodeVer[i]) = cpu_to_le32(Value32); - } + if (LM_NvramRead(pDevice, offset + 8, &ver_offset) != LM_STATUS_SUCCESS) + return; + ver_offset = ((ver_offset & 0xff0000) >> 8) | + ((ver_offset >> 24) & 0xff); + for (i = 0; i < 16; i += 4) { + if (LM_NvramRead(pDevice, offset + ver_offset + i, &Value32) != + LM_STATUS_SUCCESS) + { + return; + } + *((LM_UINT32 *) &pDevice->BootCodeVer[i]) = cpu_to_le32(Value32); + } } else { - char c; + char c; - if (LM_NvramRead(pDevice, 0x94, &Value32) != LM_STATUS_SUCCESS) - return; + if (LM_NvramRead(pDevice, 0x94, &Value32) != LM_STATUS_SUCCESS) + return; - i = 0; - c = ((Value32 & 0xff0000) >> 16); + i = 0; + c = ((Value32 & 0xff0000) >> 16); - if (c < 10) { - pDevice->BootCodeVer[i++] = c + '0'; - } - else { - pDevice->BootCodeVer[i++] = (c / 10) + '0'; - pDevice->BootCodeVer[i++] = (c % 10) + '0'; - } - pDevice->BootCodeVer[i++] = '.'; - c = (Value32 & 0xff000000) >> 24; - if (c < 10) { - pDevice->BootCodeVer[i++] = c + '0'; - } - else { - pDevice->BootCodeVer[i++] = (c / 10) + '0'; - pDevice->BootCodeVer[i++] = (c % 10) + '0'; - } - pDevice->BootCodeVer[i] = 0; + if (c < 10) { + pDevice->BootCodeVer[i++] = c + '0'; + } + else { + pDevice->BootCodeVer[i++] = (c / 10) + '0'; + pDevice->BootCodeVer[i++] = (c % 10) + '0'; + } + pDevice->BootCodeVer[i++] = '.'; + c = (Value32 & 0xff000000) >> 24; + if (c < 10) { + pDevice->BootCodeVer[i++] = c + '0'; + } + else { + pDevice->BootCodeVer[i++] = (c / 10) + '0'; + pDevice->BootCodeVer[i++] = (c % 10) + '0'; + } + pDevice->BootCodeVer[i] = 0; } } @@ -602,57 +597,57 @@ if (PciState & T3_PCI_STATE_32BIT_PCI_BUS) { - strcpy(pDevice->BusSpeedStr, "32-bit "); + strcpy(pDevice->BusSpeedStr, "32-bit "); } else { - strcpy(pDevice->BusSpeedStr, "64-bit "); + strcpy(pDevice->BusSpeedStr, "64-bit "); } if (PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) { - strcat(pDevice->BusSpeedStr, "PCI "); - if (PciState & T3_PCI_STATE_HIGH_BUS_SPEED) - { - SpeedStr = "66MHz"; - } - else - { - SpeedStr = "33MHz"; - } + strcat(pDevice->BusSpeedStr, "PCI "); + if (PciState & T3_PCI_STATE_HIGH_BUS_SPEED) + { + SpeedStr = "66MHz"; + } + else + { + SpeedStr = "33MHz"; + } } else { - strcat(pDevice->BusSpeedStr, "PCIX "); - if (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE) - { - SpeedStr = "133MHz"; - } - else - { - ClockCtrl = REG_RD(pDevice, PciCfg.ClockCtrl) & 0x1f; - switch (ClockCtrl) - { - case 0: - SpeedStr = "33MHz"; - break; + strcat(pDevice->BusSpeedStr, "PCIX "); + if (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE) + { + SpeedStr = "133MHz"; + } + else + { + ClockCtrl = REG_RD(pDevice, PciCfg.ClockCtrl) & 0x1f; + switch (ClockCtrl) + { + case 0: + SpeedStr = "33MHz"; + break; - case 2: - SpeedStr = "50MHz"; - break; + case 2: + SpeedStr = "50MHz"; + break; - case 4: - SpeedStr = "66MHz"; - break; + case 4: + SpeedStr = "66MHz"; + break; - case 6: - SpeedStr = "100MHz"; - break; + case 6: + SpeedStr = "100MHz"; + break; - case 7: - SpeedStr = "133MHz"; - break; - } - } + case 7: + SpeedStr = "133MHz"; + break; + } + } } strcat(pDevice->BusSpeedStr, SpeedStr); } @@ -682,7 +677,7 @@ Status = MM_ReadConfig32(pDevice, PCI_VENDOR_ID_REG, &Value32); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } pDevice->PciVendorId = (LM_UINT16) Value32; pDevice->PciDeviceId = (LM_UINT16) (Value32 >> 16); @@ -697,13 +692,13 @@ (Value32 != T3_PCI_ID_BCM5703x) && (Value32 != T3_PCI_ID_BCM5704)) { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } Status = MM_ReadConfig32(pDevice, PCI_REV_ID_REG, &Value32); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } pDevice->PciRevId = (LM_UINT8) Value32; @@ -711,7 +706,7 @@ Status = MM_ReadConfig32(pDevice, PCI_INT_LINE_REG, &Value32); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } pDevice->Irq = (LM_UINT8) Value32; @@ -726,7 +721,7 @@ Status = MM_ReadConfig32(pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG, &Value32); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } pDevice->SubsystemVendorId = (LM_UINT16) Value32; @@ -739,10 +734,10 @@ pDevice->SavedCacheLineReg = Value32; if(pDevice->ChipRevId != T3_CHIP_ID_5703_A1 && - pDevice->ChipRevId != T3_CHIP_ID_5703_A2 && - pDevice->ChipRevId != T3_CHIP_ID_5704_A0) + pDevice->ChipRevId != T3_CHIP_ID_5703_A2 && + pDevice->ChipRevId != T3_CHIP_ID_5704_A0) { - pDevice->UndiFix = FALSE; + pDevice->UndiFix = FALSE; } #if !PCIX_TARGET_WORKAROUND pDevice->UndiFix = FALSE; @@ -750,13 +745,13 @@ /* Map the memory base to system address space. */ if (!pDevice->UndiFix) { - Status = MM_MapMemBase(pDevice); - if(Status != LM_STATUS_SUCCESS) - { - return Status; - } - /* Initialize the memory view pointer. */ - pDevice->pMemView = (PT3_STD_MEM_MAP) pDevice->pMappedMemBase; + Status = MM_MapMemBase(pDevice); + if(Status != LM_STATUS_SUCCESS) + { + return Status; + } + /* Initialize the memory view pointer. */ + pDevice->pMemView = (PT3_STD_MEM_MAP) pDevice->pMappedMemBase; } #if PCIX_TARGET_WORKAROUND @@ -766,15 +761,15 @@ MM_ReadConfig32(pDevice, T3_PCI_STATE_REG, &Value32); if((Value32 & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) == 0) { - /* Enable PCI-X workaround only if we are running on 5700 BX. */ - if(T3_CHIP_REV(pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) - { - pDevice->EnablePciXFix = TRUE; - } + /* Enable PCI-X workaround only if we are running on 5700 BX. */ + if(T3_CHIP_REV(pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) + { + pDevice->EnablePciXFix = TRUE; + } } if (pDevice->UndiFix) { - pDevice->EnablePciXFix = TRUE; + pDevice->EnablePciXFix = TRUE; } #endif /* Bx bug: due to the "byte_enable bug" in PCI-X mode, the power */ @@ -796,30 +791,30 @@ #if PCIX_TARGET_WORKAROUND /* if we are in PCI-X mode, also make sure mem-mapping and SERR#/PERR# - are enabled */ + are enabled */ if (pDevice->EnablePciXFix == TRUE) { - Value32 |= (PCI_MEM_SPACE_ENABLE | PCI_SYSTEM_ERROR_ENABLE | - PCI_PARITY_ERROR_ENABLE); + Value32 |= (PCI_MEM_SPACE_ENABLE | PCI_SYSTEM_ERROR_ENABLE | + PCI_PARITY_ERROR_ENABLE); } if (pDevice->UndiFix) { - Value32 &= ~PCI_MEM_SPACE_ENABLE; + Value32 &= ~PCI_MEM_SPACE_ENABLE; } #endif if(pDevice->EnableMWI) { - Value32 |= PCI_MEMORY_WRITE_INVALIDATE; + Value32 |= PCI_MEMORY_WRITE_INVALIDATE; } else { - Value32 &= (~PCI_MEMORY_WRITE_INVALIDATE); + Value32 &= (~PCI_MEMORY_WRITE_INVALIDATE); } /* Error out if mem-mapping is NOT enabled for PCI systems */ if (!(Value32 | PCI_MEM_SPACE_ENABLE)) { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } /* save the value we are going to write into the PCI command word */ @@ -828,7 +823,7 @@ Status = MM_WriteConfig32(pDevice, PCI_COMMAND_REG, Value32); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } /* Set power state to D0. */ @@ -836,21 +831,21 @@ #ifdef BIG_ENDIAN_PCI pDevice->MiscHostCtrl = - MISC_HOST_CTRL_MASK_PCI_INT | - MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS | - MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP | - MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW; + MISC_HOST_CTRL_MASK_PCI_INT | + MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS | + MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP | + MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW; #else /* No CPU Swap modes for PCI IO */ /* Setup the mode registers. */ pDevice->MiscHostCtrl = - MISC_HOST_CTRL_MASK_PCI_INT | - MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP | + MISC_HOST_CTRL_MASK_PCI_INT | + MISC_HOST_CTRL_ENABLE_ENDIAN_WORD_SWAP | #ifdef BIG_ENDIAN_HOST - MISC_HOST_CTRL_ENABLE_ENDIAN_BYTE_SWAP | + MISC_HOST_CTRL_ENABLE_ENDIAN_BYTE_SWAP | #endif /* BIG_ENDIAN_HOST */ - MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS | - MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW; + MISC_HOST_CTRL_ENABLE_INDIRECT_ACCESS | + MISC_HOST_CTRL_ENABLE_PCI_STATE_REG_RW; #endif /* !BIG_ENDIAN_PCI */ /* write to PCI misc host ctr first in order to enable indirect accesses */ @@ -865,7 +860,7 @@ /* No CPU Swap modes for PCI IO */ #ifdef BIG_ENDIAN_HOST Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | - GRC_MODE_WORD_SWAP_NON_FRAME_DATA; + GRC_MODE_WORD_SWAP_NON_FRAME_DATA; #else Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | GRC_MODE_BYTE_SWAP_DATA; #endif @@ -875,8 +870,8 @@ if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) { - REG_WR(pDevice, Grc.LocalCtrl, GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1); + REG_WR(pDevice, Grc.LocalCtrl, GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 | + GRC_MISC_LOCAL_CTRL_GPIO_OE1); } MM_Wait(40); @@ -885,10 +880,10 @@ if (REG_RD(pDevice, PciCfg.ClockCtrl) & T3_PCI_44MHZ_CORE_CLOCK) { - REG_WR(pDevice, PciCfg.ClockCtrl, T3_PCI_44MHZ_CORE_CLOCK | - T3_PCI_SELECT_ALTERNATE_CLOCK); - REG_WR(pDevice, PciCfg.ClockCtrl, T3_PCI_SELECT_ALTERNATE_CLOCK); - MM_Wait(40); /* required delay is 27usec */ + REG_WR(pDevice, PciCfg.ClockCtrl, T3_PCI_44MHZ_CORE_CLOCK | + T3_PCI_SELECT_ALTERNATE_CLOCK); + REG_WR(pDevice, PciCfg.ClockCtrl, T3_PCI_SELECT_ALTERNATE_CLOCK); + MM_Wait(40); /* required delay is 27usec */ } REG_WR(pDevice, PciCfg.ClockCtrl, 0); REG_WR(pDevice, PciCfg.MemWindowBaseAddr, 0); @@ -896,21 +891,21 @@ #if PCIX_TARGET_WORKAROUND MM_ReadConfig32(pDevice, T3_PCI_STATE_REG, &Value32); if ((pDevice->EnablePciXFix == FALSE) && - ((Value32 & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) == 0)) + ((Value32 & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) == 0)) { - if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B2 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B5) - { - __raw_writel(0, &(pDevice->pMemView->uIntMem.MemBlock32K[0x300])); - __raw_writel(0, &(pDevice->pMemView->uIntMem.MemBlock32K[0x301])); - __raw_writel(0xffffffff, &(pDevice->pMemView->uIntMem.MemBlock32K[0x301])); - if (__raw_readl(&(pDevice->pMemView->uIntMem.MemBlock32K[0x300]))) - { - pDevice->EnablePciXFix = TRUE; - } - } + if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || + pDevice->ChipRevId == T3_CHIP_ID_5701_B0 || + pDevice->ChipRevId == T3_CHIP_ID_5701_B2 || + pDevice->ChipRevId == T3_CHIP_ID_5701_B5) + { + __raw_writel(0, &(pDevice->pMemView->uIntMem.MemBlock32K[0x300])); + __raw_writel(0, &(pDevice->pMemView->uIntMem.MemBlock32K[0x301])); + __raw_writel(0xffffffff, &(pDevice->pMemView->uIntMem.MemBlock32K[0x301])); + if (__raw_readl(&(pDevice->pMemView->uIntMem.MemBlock32K[0x300]))) + { + pDevice->EnablePciXFix = TRUE; + } + } } #endif #if 1 @@ -927,44 +922,44 @@ if((Value32 >> 16) == 0x484b) { - pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 8); - pDevice->NodeAddress[1] = (LM_UINT8) Value32; + pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 8); + pDevice->NodeAddress[1] = (LM_UINT8) Value32; - Value32 = MEM_RD_OFFSET(pDevice, T3_MAC_ADDR_LOW_MAILBOX); + Value32 = MEM_RD_OFFSET(pDevice, T3_MAC_ADDR_LOW_MAILBOX); - pDevice->NodeAddress[2] = (LM_UINT8) (Value32 >> 24); - pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 16); - pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 8); - pDevice->NodeAddress[5] = (LM_UINT8) Value32; + pDevice->NodeAddress[2] = (LM_UINT8) (Value32 >> 24); + pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 16); + pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 8); + pDevice->NodeAddress[5] = (LM_UINT8) Value32; - Status = LM_STATUS_SUCCESS; + Status = LM_STATUS_SUCCESS; } else { - Status = LM_NvramRead(pDevice, 0x7c, &Value32); - if(Status == LM_STATUS_SUCCESS) - { - pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 16); - pDevice->NodeAddress[1] = (LM_UINT8) (Value32 >> 24); + Status = LM_NvramRead(pDevice, 0x7c, &Value32); + if(Status == LM_STATUS_SUCCESS) + { + pDevice->NodeAddress[0] = (LM_UINT8) (Value32 >> 16); + pDevice->NodeAddress[1] = (LM_UINT8) (Value32 >> 24); - Status = LM_NvramRead(pDevice, 0x80, &Value32); + Status = LM_NvramRead(pDevice, 0x80, &Value32); - pDevice->NodeAddress[2] = (LM_UINT8) Value32; - pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 8); - pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 16); - pDevice->NodeAddress[5] = (LM_UINT8) (Value32 >> 24); - } + pDevice->NodeAddress[2] = (LM_UINT8) Value32; + pDevice->NodeAddress[3] = (LM_UINT8) (Value32 >> 8); + pDevice->NodeAddress[4] = (LM_UINT8) (Value32 >> 16); + pDevice->NodeAddress[5] = (LM_UINT8) (Value32 >> 24); + } } /* Assign a default address. */ if(Status != LM_STATUS_SUCCESS) { #ifndef EMBEDDED - printk(KERN_ERR "Cannot get MAC addr from NVRAM. Using default.\n"); + printk(KERN_ERR "Cannot get MAC addr from NVRAM. Using default.\n"); #endif - pDevice->NodeAddress[0] = 0x00; pDevice->NodeAddress[1] = 0x10; - pDevice->NodeAddress[2] = 0x18; pDevice->NodeAddress[3] = 0x68; - pDevice->NodeAddress[4] = 0x61; pDevice->NodeAddress[5] = 0x76; + pDevice->NodeAddress[0] = 0x00; pDevice->NodeAddress[1] = 0x10; + pDevice->NodeAddress[2] = 0x18; pDevice->NodeAddress[3] = 0x68; + pDevice->NodeAddress[4] = 0x61; pDevice->NodeAddress[5] = 0x76; } pDevice->PermanentNodeAddress[0] = pDevice->NodeAddress[0]; @@ -1016,13 +1011,13 @@ switch (T3_ASIC_REV(pDevice->ChipRevId)) { case T3_ASIC_REV_5704: - pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR; - pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE64; - break; + pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR; + pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE64; + break; default: - pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR; - pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE96; - break; + pDevice->MbufBase = T3_NIC_MBUF_POOL_ADDR; + pDevice->MbufSize = T3_NIC_MBUF_POOL_SIZE96; + break; } pDevice->LinkStatus = LM_STATUS_LINK_DOWN; @@ -1036,117 +1031,117 @@ /* Make this is a known adapter. */ pAdapterInfo = LM_GetAdapterInfoBySsid(pDevice->SubsystemVendorId, - pDevice->SubsystemId); + pDevice->SubsystemId); pDevice->BondId = REG_RD(pDevice, Grc.MiscCfg) & GRC_MISC_BD_ID_MASK; if (pDevice->BondId != GRC_MISC_BD_ID_5700 && - pDevice->BondId != GRC_MISC_BD_ID_5701 && - pDevice->BondId != GRC_MISC_BD_ID_5702FE && - pDevice->BondId != GRC_MISC_BD_ID_5703 && - pDevice->BondId != GRC_MISC_BD_ID_5703S && - pDevice->BondId != GRC_MISC_BD_ID_5704 && - pDevice->BondId != GRC_MISC_BD_ID_5704CIOBE) + pDevice->BondId != GRC_MISC_BD_ID_5701 && + pDevice->BondId != GRC_MISC_BD_ID_5702FE && + pDevice->BondId != GRC_MISC_BD_ID_5703 && + pDevice->BondId != GRC_MISC_BD_ID_5703S && + pDevice->BondId != GRC_MISC_BD_ID_5704 && + pDevice->BondId != GRC_MISC_BD_ID_5704CIOBE) { - return LM_STATUS_UNKNOWN_ADAPTER; + return LM_STATUS_UNKNOWN_ADAPTER; } pDevice->SplitModeEnable = SPLIT_MODE_DISABLE; if ((pDevice->ChipRevId == T3_CHIP_ID_5704_A0) && - (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE)) + (pDevice->BondId == GRC_MISC_BD_ID_5704CIOBE)) { - pDevice->SplitModeEnable = SPLIT_MODE_ENABLE; - pDevice->SplitModeMaxReq = SPLIT_MODE_5704_MAX_REQ; + pDevice->SplitModeEnable = SPLIT_MODE_ENABLE; + pDevice->SplitModeMaxReq = SPLIT_MODE_5704_MAX_REQ; } /* Get Eeprom info. */ Value32 = MEM_RD_OFFSET(pDevice, T3_NIC_DATA_SIG_ADDR); if (Value32 == T3_NIC_DATA_SIG) { - EeSigFound = TRUE; - Value32 = MEM_RD_OFFSET(pDevice, T3_NIC_DATA_NIC_CFG_ADDR); + EeSigFound = TRUE; + Value32 = MEM_RD_OFFSET(pDevice, T3_NIC_DATA_NIC_CFG_ADDR); - /* Determine PHY type. */ - switch (Value32 & T3_NIC_CFG_PHY_TYPE_MASK) - { - case T3_NIC_CFG_PHY_TYPE_COPPER: - EePhyTypeSerdes = FALSE; - break; + /* Determine PHY type. */ + switch (Value32 & T3_NIC_CFG_PHY_TYPE_MASK) + { + case T3_NIC_CFG_PHY_TYPE_COPPER: + EePhyTypeSerdes = FALSE; + break; - case T3_NIC_CFG_PHY_TYPE_FIBER: - EePhyTypeSerdes = TRUE; - break; + case T3_NIC_CFG_PHY_TYPE_FIBER: + EePhyTypeSerdes = TRUE; + break; - default: - EePhyTypeSerdes = FALSE; - break; - } + default: + EePhyTypeSerdes = FALSE; + break; + } - /* Determine PHY led mode. */ - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) - { - switch(Value32 & T3_NIC_CFG_LED_MODE_MASK) - { - case T3_NIC_CFG_LED_MODE_TRIPLE_SPEED: - EePhyLedMode = LED_MODE_THREE_LINK; - break; + /* Determine PHY led mode. */ + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + { + switch(Value32 & T3_NIC_CFG_LED_MODE_MASK) + { + case T3_NIC_CFG_LED_MODE_TRIPLE_SPEED: + EePhyLedMode = LED_MODE_THREE_LINK; + break; - case T3_NIC_CFG_LED_MODE_LINK_SPEED: - EePhyLedMode = LED_MODE_LINK10; - break; + case T3_NIC_CFG_LED_MODE_LINK_SPEED: + EePhyLedMode = LED_MODE_LINK10; + break; - default: - EePhyLedMode = LED_MODE_AUTO; - break; - } - } - else - { - switch(Value32 & T3_NIC_CFG_LED_MODE_MASK) - { - case T3_NIC_CFG_LED_MODE_OPEN_DRAIN: - EePhyLedMode = LED_MODE_OPEN_DRAIN; - break; + default: + EePhyLedMode = LED_MODE_AUTO; + break; + } + } + else + { + switch(Value32 & T3_NIC_CFG_LED_MODE_MASK) + { + case T3_NIC_CFG_LED_MODE_OPEN_DRAIN: + EePhyLedMode = LED_MODE_OPEN_DRAIN; + break; - case T3_NIC_CFG_LED_MODE_OUTPUT: - EePhyLedMode = LED_MODE_OUTPUT; - break; + case T3_NIC_CFG_LED_MODE_OUTPUT: + EePhyLedMode = LED_MODE_OUTPUT; + break; - default: - EePhyLedMode = LED_MODE_AUTO; - break; - } - } - if(pDevice->ChipRevId == T3_CHIP_ID_5703_A1 || - pDevice->ChipRevId == T3_CHIP_ID_5703_A2) - { - /* Enable EEPROM write protection. */ - if(Value32 & T3_NIC_EEPROM_WP) - { - pDevice->EepromWp = TRUE; - } - } + default: + EePhyLedMode = LED_MODE_AUTO; + break; + } + } + if(pDevice->ChipRevId == T3_CHIP_ID_5703_A1 || + pDevice->ChipRevId == T3_CHIP_ID_5703_A2) + { + /* Enable EEPROM write protection. */ + if(Value32 & T3_NIC_EEPROM_WP) + { + pDevice->EepromWp = TRUE; + } + } - /* Get the PHY Id. */ - Value32 = MEM_RD_OFFSET(pDevice, T3_NIC_DATA_PHY_ID_ADDR); - if (Value32) - { - EePhyId = (((Value32 & T3_NIC_PHY_ID1_MASK) >> 16) & - PHY_ID1_OUI_MASK) << 10; + /* Get the PHY Id. */ + Value32 = MEM_RD_OFFSET(pDevice, T3_NIC_DATA_PHY_ID_ADDR); + if (Value32) + { + EePhyId = (((Value32 & T3_NIC_PHY_ID1_MASK) >> 16) & + PHY_ID1_OUI_MASK) << 10; - Value32 = Value32 & T3_NIC_PHY_ID2_MASK; + Value32 = Value32 & T3_NIC_PHY_ID2_MASK; - EePhyId |= ((Value32 & PHY_ID2_OUI_MASK) << 16) | - (Value32 & PHY_ID2_MODEL_MASK) | (Value32 & PHY_ID2_REV_MASK); - } - else - { - EePhyId = 0; - } + EePhyId |= ((Value32 & PHY_ID2_OUI_MASK) << 16) | + (Value32 & PHY_ID2_MODEL_MASK) | (Value32 & PHY_ID2_REV_MASK); + } + else + { + EePhyId = 0; + } } else { - EeSigFound = FALSE; + EeSigFound = FALSE; } /* Set the PHY address. */ @@ -1168,163 +1163,163 @@ /* Set the EnableTbi flag to false if we have a copper PHY. */ switch(pDevice->PhyId & PHY_ID_MASK) { - case PHY_BCM5400_PHY_ID: - pDevice->EnableTbi = FALSE; - break; + case PHY_BCM5400_PHY_ID: + pDevice->EnableTbi = FALSE; + break; - case PHY_BCM5401_PHY_ID: - pDevice->EnableTbi = FALSE; - break; + case PHY_BCM5401_PHY_ID: + pDevice->EnableTbi = FALSE; + break; - case PHY_BCM5411_PHY_ID: - pDevice->EnableTbi = FALSE; - break; + case PHY_BCM5411_PHY_ID: + pDevice->EnableTbi = FALSE; + break; - case PHY_BCM5701_PHY_ID: - pDevice->EnableTbi = FALSE; - break; + case PHY_BCM5701_PHY_ID: + pDevice->EnableTbi = FALSE; + break; - case PHY_BCM5703_PHY_ID: - pDevice->EnableTbi = FALSE; - break; + case PHY_BCM5703_PHY_ID: + pDevice->EnableTbi = FALSE; + break; - case PHY_BCM5704_PHY_ID: - pDevice->EnableTbi = FALSE; - break; + case PHY_BCM5704_PHY_ID: + pDevice->EnableTbi = FALSE; + break; - case PHY_BCM8002_PHY_ID: - pDevice->EnableTbi = TRUE; - break; + case PHY_BCM8002_PHY_ID: + pDevice->EnableTbi = TRUE; + break; - default: + default: - if (pAdapterInfo) - { - pDevice->PhyId = pAdapterInfo->PhyId; - pDevice->EnableTbi = pAdapterInfo->Serdes; - } - else if (EeSigFound) - { - pDevice->PhyId = EePhyId; - pDevice->EnableTbi = EePhyTypeSerdes; - } - break; + if (pAdapterInfo) + { + pDevice->PhyId = pAdapterInfo->PhyId; + pDevice->EnableTbi = pAdapterInfo->Serdes; + } + else if (EeSigFound) + { + pDevice->PhyId = EePhyId; + pDevice->EnableTbi = EePhyTypeSerdes; + } + break; } /* Bail out if we don't know the copper PHY id. */ if(UNKNOWN_PHY_ID(pDevice->PhyId) && !pDevice->EnableTbi) { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5703) { - if((pDevice->SavedCacheLineReg & 0xff00) < 0x4000) - { - pDevice->SavedCacheLineReg &= 0xffff00ff; - pDevice->SavedCacheLineReg |= 0x4000; - } + if((pDevice->SavedCacheLineReg & 0xff00) < 0x4000) + { + pDevice->SavedCacheLineReg &= 0xffff00ff; + pDevice->SavedCacheLineReg |= 0x4000; + } } /* Change driver parameters. */ Status = MM_GetConfig(pDevice); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } #if INCLUDE_5701_AX_FIX if (pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0) + pDevice->ChipRevId == T3_CHIP_ID_5701_B0) { - pDevice->ResetPhyOnInit = TRUE; + pDevice->ResetPhyOnInit = TRUE; } #endif /* Save the current phy link status. */ if(!pDevice->EnableTbi) { - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - /* If we don't have link reset the PHY. */ - if(!(Value32 & PHY_STATUS_LINK_PASS) || pDevice->ResetPhyOnInit) - { + /* If we don't have link reset the PHY. */ + if(!(Value32 & PHY_STATUS_LINK_PASS) || pDevice->ResetPhyOnInit) + { - LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_PHY_RESET); + LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_PHY_RESET); - for(j = 0; j < 100; j++) - { - MM_Wait(10); + for(j = 0; j < 100; j++) + { + MM_Wait(10); - LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); - if(Value32 && !(Value32 & PHY_CTRL_PHY_RESET)) - { - MM_Wait(40); - break; - } - } + LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); + if(Value32 && !(Value32 & PHY_CTRL_PHY_RESET)) + { + MM_Wait(40); + break; + } + } #if INCLUDE_5701_AX_FIX - /* 5701_AX_BX bug: only advertises 10mb speed. */ - if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0) - { + /* 5701_AX_BX bug: only advertises 10mb speed. */ + if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || + pDevice->ChipRevId == T3_CHIP_ID_5701_B0) + { - Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD | - PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL | - PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF; - Value32 |= GetPhyAdFlowCntrlSettings(pDevice); - LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; + Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD | + PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL | + PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF; + Value32 |= GetPhyAdFlowCntrlSettings(pDevice); + LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); + pDevice->advertising = Value32; - Value32 = BCM540X_AN_AD_1000BASET_HALF | - BCM540X_AN_AD_1000BASET_FULL | BCM540X_CONFIG_AS_MASTER | - BCM540X_ENABLE_CONFIG_AS_MASTER; - LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, Value32); - pDevice->advertising1000 = Value32; + Value32 = BCM540X_AN_AD_1000BASET_HALF | + BCM540X_AN_AD_1000BASET_FULL | BCM540X_CONFIG_AS_MASTER | + BCM540X_ENABLE_CONFIG_AS_MASTER; + LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, Value32); + pDevice->advertising1000 = Value32; - LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_AUTO_NEG_ENABLE | - PHY_CTRL_RESTART_AUTO_NEG); - } + LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_AUTO_NEG_ENABLE | + PHY_CTRL_RESTART_AUTO_NEG); + } #endif - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5703) - { - LM_WritePhy(pDevice, 0x18, 0x0c00); - LM_WritePhy(pDevice, 0x17, 0x201f); - LM_WritePhy(pDevice, 0x15, 0x2aaa); - } - if(pDevice->ChipRevId == T3_CHIP_ID_5704_A0) - { - LM_WritePhy(pDevice, 0x1c, 0x8d68); - LM_WritePhy(pDevice, 0x1c, 0x8d68); - } - /* Enable Ethernet@WireSpeed. */ - if(pDevice->EnableWireSpeed) - { - LM_WritePhy(pDevice, 0x18, 0x7007); - LM_ReadPhy(pDevice, 0x18, &Value32); - LM_WritePhy(pDevice, 0x18, Value32 | BIT_15 | BIT_4); - } - } + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5703) + { + LM_WritePhy(pDevice, 0x18, 0x0c00); + LM_WritePhy(pDevice, 0x17, 0x201f); + LM_WritePhy(pDevice, 0x15, 0x2aaa); + } + if(pDevice->ChipRevId == T3_CHIP_ID_5704_A0) + { + LM_WritePhy(pDevice, 0x1c, 0x8d68); + LM_WritePhy(pDevice, 0x1c, 0x8d68); + } + /* Enable Ethernet@WireSpeed. */ + if(pDevice->EnableWireSpeed) + { + LM_WritePhy(pDevice, 0x18, 0x7007); + LM_ReadPhy(pDevice, 0x18, &Value32); + LM_WritePhy(pDevice, 0x18, Value32 | BIT_15 | BIT_4); + } + } } /* Turn off tap power management. */ if((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID) { - LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x0c20); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1804); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1204); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0132); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0232); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0a20); + LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x0c20); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1804); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1204); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0132); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0232); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0a20); - MM_Wait(40); + MM_Wait(40); } #if INCLUDE_TBI_SUPPORT @@ -1332,110 +1327,110 @@ if(pDevice->EnableTbi) { - pDevice->WakeUpModeCap = LM_WAKE_UP_MODE_NONE; - pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY; - if ((pDevice->PollTbiLink == BAD_DEFAULT_VALUE) || - pDevice->DisableAutoNeg) - { - pDevice->PollTbiLink = FALSE; - } + pDevice->WakeUpModeCap = LM_WAKE_UP_MODE_NONE; + pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY; + if ((pDevice->PollTbiLink == BAD_DEFAULT_VALUE) || + pDevice->DisableAutoNeg) + { + pDevice->PollTbiLink = FALSE; + } } else { - pDevice->PollTbiLink = FALSE; + pDevice->PollTbiLink = FALSE; } #endif /* INCLUDE_TBI_SUPPORT */ /* UseTaggedStatus is only valid for 5701 and later. */ if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) { - pDevice->UseTaggedStatus = FALSE; + pDevice->UseTaggedStatus = FALSE; - pDevice->CoalesceMode = 0; + pDevice->CoalesceMode = 0; } else { - pDevice->CoalesceMode = HOST_COALESCE_CLEAR_TICKS_ON_RX_BD_EVENT | - HOST_COALESCE_CLEAR_TICKS_ON_TX_BD_EVENT; + pDevice->CoalesceMode = HOST_COALESCE_CLEAR_TICKS_ON_RX_BD_EVENT | + HOST_COALESCE_CLEAR_TICKS_ON_TX_BD_EVENT; } /* Set the status block size. */ if(T3_CHIP_REV(pDevice->ChipRevId) != T3_CHIP_REV_5700_AX && - T3_CHIP_REV(pDevice->ChipRevId) != T3_CHIP_REV_5700_BX) + T3_CHIP_REV(pDevice->ChipRevId) != T3_CHIP_REV_5700_BX) { - pDevice->CoalesceMode |= HOST_COALESCE_32_BYTE_STATUS_MODE; + pDevice->CoalesceMode |= HOST_COALESCE_32_BYTE_STATUS_MODE; } /* Check the DURING_INT coalescing ticks parameters. */ if(pDevice->UseTaggedStatus) { - if(pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) - { - pDevice->RxCoalescingTicksDuringInt = - DEFAULT_RX_COALESCING_TICKS_DURING_INT; - } + if(pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) + { + pDevice->RxCoalescingTicksDuringInt = + DEFAULT_RX_COALESCING_TICKS_DURING_INT; + } - if(pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) - { - pDevice->TxCoalescingTicksDuringInt = - DEFAULT_TX_COALESCING_TICKS_DURING_INT; - } + if(pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) + { + pDevice->TxCoalescingTicksDuringInt = + DEFAULT_TX_COALESCING_TICKS_DURING_INT; + } - if(pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) - { - pDevice->RxMaxCoalescedFramesDuringInt = - DEFAULT_RX_MAX_COALESCED_FRAMES_DURING_INT; - } + if(pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) + { + pDevice->RxMaxCoalescedFramesDuringInt = + DEFAULT_RX_MAX_COALESCED_FRAMES_DURING_INT; + } - if(pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) - { - pDevice->TxMaxCoalescedFramesDuringInt = - DEFAULT_TX_MAX_COALESCED_FRAMES_DURING_INT; - } + if(pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) + { + pDevice->TxMaxCoalescedFramesDuringInt = + DEFAULT_TX_MAX_COALESCED_FRAMES_DURING_INT; + } } else { - if(pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) - { - pDevice->RxCoalescingTicksDuringInt = 0; - } + if(pDevice->RxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) + { + pDevice->RxCoalescingTicksDuringInt = 0; + } - if(pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) - { - pDevice->TxCoalescingTicksDuringInt = 0; - } + if(pDevice->TxCoalescingTicksDuringInt == BAD_DEFAULT_VALUE) + { + pDevice->TxCoalescingTicksDuringInt = 0; + } - if(pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) - { - pDevice->RxMaxCoalescedFramesDuringInt = 0; - } + if(pDevice->RxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) + { + pDevice->RxMaxCoalescedFramesDuringInt = 0; + } - if(pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) - { - pDevice->TxMaxCoalescedFramesDuringInt = 0; - } + if(pDevice->TxMaxCoalescedFramesDuringInt == BAD_DEFAULT_VALUE) + { + pDevice->TxMaxCoalescedFramesDuringInt = 0; + } } #if T3_JUMBO_RCV_RCB_ENTRY_COUNT if(pDevice->RxMtu <= (MAX_STD_RCV_BUFFER_SIZE - 8 /* CRC */)) { - pDevice->RxJumboDescCnt = 0; - if(pDevice->RxMtu <= MAX_ETHERNET_PACKET_SIZE_NO_CRC) - { - pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC; - } + pDevice->RxJumboDescCnt = 0; + if(pDevice->RxMtu <= MAX_ETHERNET_PACKET_SIZE_NO_CRC) + { + pDevice->RxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC; + } } else { - pDevice->RxJumboBufferSize = (pDevice->RxMtu + 8 /* CRC + VLAN */ + - COMMON_CACHE_LINE_SIZE-1) & ~COMMON_CACHE_LINE_MASK; + pDevice->RxJumboBufferSize = (pDevice->RxMtu + 8 /* CRC + VLAN */ + + COMMON_CACHE_LINE_SIZE-1) & ~COMMON_CACHE_LINE_MASK; - if(pDevice->RxJumboBufferSize > MAX_JUMBO_RCV_BUFFER_SIZE) - { - pDevice->RxJumboBufferSize = DEFAULT_JUMBO_RCV_BUFFER_SIZE; - pDevice->RxMtu = pDevice->RxJumboBufferSize - 8 /* CRC + VLAN */; - } - pDevice->TxMtu = pDevice->RxMtu; + if(pDevice->RxJumboBufferSize > MAX_JUMBO_RCV_BUFFER_SIZE) + { + pDevice->RxJumboBufferSize = DEFAULT_JUMBO_RCV_BUFFER_SIZE; + pDevice->RxMtu = pDevice->RxJumboBufferSize - 8 /* CRC + VLAN */; + } + pDevice->TxMtu = pDevice->RxMtu; } #else @@ -1444,128 +1439,128 @@ pDevice->RxPacketDescCnt = #if T3_JUMBO_RCV_RCB_ENTRY_COUNT - pDevice->RxJumboDescCnt + + pDevice->RxJumboDescCnt + #endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - pDevice->RxStdDescCnt; + pDevice->RxStdDescCnt; if(pDevice->TxMtu < MAX_ETHERNET_PACKET_SIZE_NO_CRC) { - pDevice->TxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC; + pDevice->TxMtu = MAX_ETHERNET_PACKET_SIZE_NO_CRC; } if(pDevice->TxMtu > MAX_JUMBO_TX_BUFFER_SIZE) { - pDevice->TxMtu = MAX_JUMBO_TX_BUFFER_SIZE; + pDevice->TxMtu = MAX_JUMBO_TX_BUFFER_SIZE; } /* Configure the proper ways to get link change interrupt. */ if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO) { - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) - { - pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT; - } - else - { - pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY; - } + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) + { + pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT; + } + else + { + pDevice->PhyIntMode = T3_PHY_INT_MODE_LINK_READY; + } } else if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - /* Auto-polling does not work on 5700_AX and 5700_BX. */ - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) - { - pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT; - } + /* Auto-polling does not work on 5700_AX and 5700_BX. */ + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) + { + pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT; + } } /* Determine the method to get link change status. */ if(pDevice->LinkChngMode == T3_LINK_CHNG_MODE_AUTO) { - /* The link status bit in the status block does not work on 5700_AX */ - /* and 5700_BX chips. */ - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) - { - pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG; - } - else - { - pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_BLOCK; - } + /* The link status bit in the status block does not work on 5700_AX */ + /* and 5700_BX chips. */ + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) + { + pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG; + } + else + { + pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_BLOCK; + } } if(pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) { - pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG; + pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG; } /* Configure PHY led mode. */ if(pDevice->LedMode == LED_MODE_AUTO) { - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) - { - if(pDevice->SubsystemVendorId == T3_SVID_DELL) - { - pDevice->LedMode = LED_MODE_LINK10; - } - else - { - pDevice->LedMode = LED_MODE_THREE_LINK; + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + { + if(pDevice->SubsystemVendorId == T3_SVID_DELL) + { + pDevice->LedMode = LED_MODE_LINK10; + } + else + { + pDevice->LedMode = LED_MODE_THREE_LINK; - if(EeSigFound && EePhyLedMode != LED_MODE_AUTO) - { - pDevice->LedMode = EePhyLedMode; - } - } + if(EeSigFound && EePhyLedMode != LED_MODE_AUTO) + { + pDevice->LedMode = EePhyLedMode; + } + } - /* bug? 5701 in LINK10 mode does not seem to work when */ - /* PhyIntMode is LINK_READY. */ - if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5700 && + /* bug? 5701 in LINK10 mode does not seem to work when */ + /* PhyIntMode is LINK_READY. */ + if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5700 && #if INCLUDE_TBI_SUPPORT - pDevice->EnableTbi == FALSE && + pDevice->EnableTbi == FALSE && #endif - pDevice->LedMode == LED_MODE_LINK10) - { - pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT; - pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG; - } + pDevice->LedMode == LED_MODE_LINK10) + { + pDevice->PhyIntMode = T3_PHY_INT_MODE_MI_INTERRUPT; + pDevice->LinkChngMode = T3_LINK_CHNG_MODE_USE_STATUS_REG; + } - if(pDevice->EnableTbi) - { - pDevice->LedMode = LED_MODE_THREE_LINK; - } - } - else - { - if(EeSigFound && EePhyLedMode != LED_MODE_AUTO) - { - pDevice->LedMode = EePhyLedMode; - } - else - { - pDevice->LedMode = LED_MODE_OPEN_DRAIN; - } - } + if(pDevice->EnableTbi) + { + pDevice->LedMode = LED_MODE_THREE_LINK; + } + } + else + { + if(EeSigFound && EePhyLedMode != LED_MODE_AUTO) + { + pDevice->LedMode = EePhyLedMode; + } + else + { + pDevice->LedMode = LED_MODE_OPEN_DRAIN; + } + } } /* Enable OneDmaAtOnce. */ if(pDevice->OneDmaAtOnce == BAD_DEFAULT_VALUE) { - pDevice->OneDmaAtOnce = FALSE; + pDevice->OneDmaAtOnce = FALSE; } if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B2) + pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || + pDevice->ChipRevId == T3_CHIP_ID_5701_B0 || + pDevice->ChipRevId == T3_CHIP_ID_5701_B2) { - pDevice->WolSpeed = WOL_SPEED_10MB; + pDevice->WolSpeed = WOL_SPEED_10MB; } else { - pDevice->WolSpeed = WOL_SPEED_100MB; + pDevice->WolSpeed = WOL_SPEED_100MB; } /* Offloadings. */ @@ -1574,8 +1569,8 @@ /* Turn off task offloading on Ax. */ if(pDevice->ChipRevId == T3_CHIP_ID_5700_B0) { - pDevice->TaskOffloadCap &= ~(LM_TASK_OFFLOAD_TX_TCP_CHECKSUM | - LM_TASK_OFFLOAD_TX_UDP_CHECKSUM); + pDevice->TaskOffloadCap &= ~(LM_TASK_OFFLOAD_TX_TCP_CHECKSUM | + LM_TASK_OFFLOAD_TX_UDP_CHECKSUM); } pDevice->PciState = REG_RD(pDevice, PciCfg.PciState); LM_ReadVPD(pDevice); @@ -1592,44 +1587,44 @@ { static LM_ADAPTER_INFO AdapterArr[] = { - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A6, PHY_BCM5401_PHY_ID, 0}, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A5, PHY_BCM5701_PHY_ID, 0}, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700T6, PHY_BCM8002_PHY_ID, 1}, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A9, 0, 1 }, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T1, PHY_BCM5701_PHY_ID, 0}, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T8, PHY_BCM5701_PHY_ID, 0}, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A7, 0, 1}, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A10, PHY_BCM5701_PHY_ID, 0}, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A12, PHY_BCM5701_PHY_ID, 0}, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax1, PHY_BCM5701_PHY_ID, 0}, - { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax2, PHY_BCM5701_PHY_ID, 0}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A6, PHY_BCM5401_PHY_ID, 0}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A5, PHY_BCM5701_PHY_ID, 0}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700T6, PHY_BCM8002_PHY_ID, 1}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95700A9, 0, 1 }, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T1, PHY_BCM5701_PHY_ID, 0}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701T8, PHY_BCM5701_PHY_ID, 0}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A7, 0, 1}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A10, PHY_BCM5701_PHY_ID, 0}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95701A12, PHY_BCM5701_PHY_ID, 0}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax1, PHY_BCM5701_PHY_ID, 0}, + { T3_SVID_BROADCOM, T3_SSID_BROADCOM_BCM95703Ax2, PHY_BCM5701_PHY_ID, 0}, - { T3_SVID_3COM, T3_SSID_3COM_3C996T, PHY_BCM5401_PHY_ID, 0 }, - { T3_SVID_3COM, T3_SSID_3COM_3C996BT, PHY_BCM5701_PHY_ID, 0 }, - { T3_SVID_3COM, T3_SSID_3COM_3C996SX, 0, 1 }, - { T3_SVID_3COM, T3_SSID_3COM_3C1000T, PHY_BCM5701_PHY_ID, 0 }, - { T3_SVID_3COM, T3_SSID_3COM_3C940BR01, PHY_BCM5701_PHY_ID, 0 }, + { T3_SVID_3COM, T3_SSID_3COM_3C996T, PHY_BCM5401_PHY_ID, 0 }, + { T3_SVID_3COM, T3_SSID_3COM_3C996BT, PHY_BCM5701_PHY_ID, 0 }, + { T3_SVID_3COM, T3_SSID_3COM_3C996SX, 0, 1 }, + { T3_SVID_3COM, T3_SSID_3COM_3C1000T, PHY_BCM5701_PHY_ID, 0 }, + { T3_SVID_3COM, T3_SSID_3COM_3C940BR01, PHY_BCM5701_PHY_ID, 0 }, - { T3_SVID_DELL, T3_SSID_DELL_VIPER, PHY_BCM5401_PHY_ID, 0 }, - { T3_SVID_DELL, T3_SSID_DELL_JAGUAR, PHY_BCM5401_PHY_ID, 0 }, - { T3_SVID_DELL, T3_SSID_DELL_MERLOT, PHY_BCM5411_PHY_ID, 0 }, - { T3_SVID_DELL, T3_SSID_DELL_SLIM_MERLOT, PHY_BCM5411_PHY_ID, 0 }, + { T3_SVID_DELL, T3_SSID_DELL_VIPER, PHY_BCM5401_PHY_ID, 0 }, + { T3_SVID_DELL, T3_SSID_DELL_JAGUAR, PHY_BCM5401_PHY_ID, 0 }, + { T3_SVID_DELL, T3_SSID_DELL_MERLOT, PHY_BCM5411_PHY_ID, 0 }, + { T3_SVID_DELL, T3_SSID_DELL_SLIM_MERLOT, PHY_BCM5411_PHY_ID, 0 }, - { T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE, PHY_BCM5701_PHY_ID, 0 }, - { T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE_2, PHY_BCM5701_PHY_ID, 0 }, - { T3_SVID_COMPAQ, T3_SSID_COMPAQ_CHANGELING, 0, 1 }, - { T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780, PHY_BCM5701_PHY_ID, 0 }, - { T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780_2, PHY_BCM5701_PHY_ID, 0 }, + { T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE, PHY_BCM5701_PHY_ID, 0 }, + { T3_SVID_COMPAQ, T3_SSID_COMPAQ_BANSHEE_2, PHY_BCM5701_PHY_ID, 0 }, + { T3_SVID_COMPAQ, T3_SSID_COMPAQ_CHANGELING, 0, 1 }, + { T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780, PHY_BCM5701_PHY_ID, 0 }, + { T3_SVID_COMPAQ, T3_SSID_COMPAQ_NC7780_2, PHY_BCM5701_PHY_ID, 0 }, }; LM_UINT32 j; for(j = 0; j < sizeof(AdapterArr)/sizeof(LM_ADAPTER_INFO); j++) { - if(AdapterArr[j].Svid == Svid && AdapterArr[j].Ssid == Ssid) - { - return &AdapterArr[j]; - } + if(AdapterArr[j].Svid == Svid && AdapterArr[j].Ssid == Ssid) + { + return &AdapterArr[j]; + } } return NULL; @@ -1659,9 +1654,9 @@ /* Intialize the queues. */ QQ_InitQueue(&pDevice->RxPacketReceivedQ.Container, - MAX_RX_PACKET_DESC_COUNT); + MAX_RX_PACKET_DESC_COUNT); QQ_InitQueue(&pDevice->RxPacketFreeQ.Container, - MAX_RX_PACKET_DESC_COUNT); + MAX_RX_PACKET_DESC_COUNT); QQ_InitQueue(&pDevice->TxPacketFreeQ.Container,MAX_TX_PACKET_DESC_COUNT); QQ_InitQueue(&pDevice->TxPacketActiveQ.Container,MAX_TX_PACKET_DESC_COUNT); @@ -1670,60 +1665,60 @@ /* Allocate shared memory for: status block, the buffers for receive */ /* rings -- standard, mini, jumbo, and return rings. */ Size = T3_STATUS_BLOCK_SIZE + sizeof(T3_STATS_BLOCK) + - T3_STD_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD) + + T3_STD_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD) + #if T3_JUMBO_RCV_RCB_ENTRY_COUNT - T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD) + + T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD) + #endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ - T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD); + T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD); /* Memory for host based Send BD. */ if(pDevice->NicSendBd == FALSE) { - Size += sizeof(T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT; + Size += sizeof(T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT; } /* Allocate the memory block. */ Status = MM_AllocateSharedMemory(pDevice, Size, (PLM_VOID) &pMemVirt, &MemPhy, FALSE); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } /* Program DMA Read/Write */ if (pDevice->PciState & T3_PCI_STATE_NOT_PCI_X_BUS) { - pDevice->DmaReadWriteCtrl = 0x763f000f; + pDevice->DmaReadWriteCtrl = 0x763f000f; } else { - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5704) - { - pDevice->DmaReadWriteCtrl = 0x761f0000; - } - else - { - pDevice->DmaReadWriteCtrl = 0x761b000f; - } - if(pDevice->ChipRevId == T3_CHIP_ID_5703_A1 || - pDevice->ChipRevId == T3_CHIP_ID_5703_A2) - { - pDevice->OneDmaAtOnce = TRUE; - } + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5704) + { + pDevice->DmaReadWriteCtrl = 0x761f0000; + } + else + { + pDevice->DmaReadWriteCtrl = 0x761b000f; + } + if(pDevice->ChipRevId == T3_CHIP_ID_5703_A1 || + pDevice->ChipRevId == T3_CHIP_ID_5703_A2) + { + pDevice->OneDmaAtOnce = TRUE; + } } if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5703) { - pDevice->DmaReadWriteCtrl &= 0xfffffff0; + pDevice->DmaReadWriteCtrl &= 0xfffffff0; } if(pDevice->OneDmaAtOnce) { - pDevice->DmaReadWriteCtrl |= DMA_CTRL_WRITE_ONE_DMA_AT_ONCE; + pDevice->DmaReadWriteCtrl |= DMA_CTRL_WRITE_ONE_DMA_AT_ONCE; } REG_WR(pDevice, PciCfg.DmaReadWriteCtrl, pDevice->DmaReadWriteCtrl); if (LM_DmaTest(pDevice, pMemVirt, MemPhy, 0x400) != LM_STATUS_SUCCESS) { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } /* Status block. */ @@ -1744,7 +1739,7 @@ pMemVirt += T3_STD_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD); LM_INC_PHYSICAL_ADDRESS(&MemPhy, - T3_STD_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD)); + T3_STD_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD)); #if T3_JUMBO_RCV_RCB_ENTRY_COUNT /* Receive jumbo BD buffer. */ @@ -1753,7 +1748,7 @@ pMemVirt += T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD); LM_INC_PHYSICAL_ADDRESS(&MemPhy, - T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD)); + T3_JUMBO_RCV_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD)); #endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ /* Receive return BD buffer. */ @@ -1762,33 +1757,33 @@ pMemVirt += T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD); LM_INC_PHYSICAL_ADDRESS(&MemPhy, - T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD)); + T3_RCV_RETURN_RCB_ENTRY_COUNT * sizeof(T3_RCV_BD)); /* Set up Send BD. */ if(pDevice->NicSendBd == FALSE) { - pDevice->pSendBdVirt = (PT3_SND_BD) pMemVirt; - pDevice->SendBdPhy = MemPhy; + pDevice->pSendBdVirt = (PT3_SND_BD) pMemVirt; + pDevice->SendBdPhy = MemPhy; - pMemVirt += sizeof(T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT; - LM_INC_PHYSICAL_ADDRESS(&MemPhy, - sizeof(T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT); + pMemVirt += sizeof(T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT; + LM_INC_PHYSICAL_ADDRESS(&MemPhy, + sizeof(T3_SND_BD) * T3_SEND_RCB_ENTRY_COUNT); } else { - pDevice->pSendBdVirt = (PT3_SND_BD) - pDevice->pMemView->uIntMem.First32k.BufferDesc; - pDevice->SendBdPhy.High = 0; - pDevice->SendBdPhy.Low = T3_NIC_SND_BUFFER_DESC_ADDR; + pDevice->pSendBdVirt = (PT3_SND_BD) + pDevice->pMemView->uIntMem.First32k.BufferDesc; + pDevice->SendBdPhy.High = 0; + pDevice->SendBdPhy.Low = T3_NIC_SND_BUFFER_DESC_ADDR; } /* Allocate memory for packet descriptors. */ Size = (pDevice->RxPacketDescCnt + - pDevice->TxPacketDescCnt) * MM_PACKET_DESC_SIZE; + pDevice->TxPacketDescCnt) * MM_PACKET_DESC_SIZE; Status = MM_AllocateMemory(pDevice, Size, (PLM_VOID *) &pPacket); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } pDevice->pPacketDescBase = (PLM_VOID) pPacket; @@ -1796,54 +1791,54 @@ /* to the TxPacketFreeQ for each send ring. */ for(j = 0; j < pDevice->TxPacketDescCnt; j++) { - /* Ring index. */ - pPacket->Flags = 0; + /* Ring index. */ + pPacket->Flags = 0; - /* Queue the descriptor in the TxPacketFreeQ of the 'k' ring. */ - QQ_PushTail(&pDevice->TxPacketFreeQ.Container, pPacket); + /* Queue the descriptor in the TxPacketFreeQ of the 'k' ring. */ + QQ_PushTail(&pDevice->TxPacketFreeQ.Container, pPacket); - /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */ - /* is the total size of the packet descriptor including the */ - /* os-specific extensions in the UM_PACKET structure. */ - pPacket = (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE); + /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */ + /* is the total size of the packet descriptor including the */ + /* os-specific extensions in the UM_PACKET structure. */ + pPacket = (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE); } /* for(j.. */ /* Create receive packet descriptors from the memory block and add them */ /* to the RxPacketFreeQ. Create the Standard packet descriptors. */ for(j = 0; j < pDevice->RxStdDescCnt; j++) { - /* Receive producer ring. */ - pPacket->u.Rx.RcvProdRing = T3_STD_RCV_PROD_RING; + /* Receive producer ring. */ + pPacket->u.Rx.RcvProdRing = T3_STD_RCV_PROD_RING; - /* Receive buffer size. */ - pPacket->u.Rx.RxBufferSize = MAX_STD_RCV_BUFFER_SIZE; + /* Receive buffer size. */ + pPacket->u.Rx.RxBufferSize = MAX_STD_RCV_BUFFER_SIZE; - /* Add the descriptor to RxPacketFreeQ. */ - QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); + /* Add the descriptor to RxPacketFreeQ. */ + QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); - /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */ - /* is the total size of the packet descriptor including the */ - /* os-specific extensions in the UM_PACKET structure. */ - pPacket = (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE); + /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */ + /* is the total size of the packet descriptor including the */ + /* os-specific extensions in the UM_PACKET structure. */ + pPacket = (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE); } /* for */ #if T3_JUMBO_RCV_RCB_ENTRY_COUNT /* Create the Jumbo packet descriptors. */ for(j = 0; j < pDevice->RxJumboDescCnt; j++) { - /* Receive producer ring. */ - pPacket->u.Rx.RcvProdRing = T3_JUMBO_RCV_PROD_RING; + /* Receive producer ring. */ + pPacket->u.Rx.RcvProdRing = T3_JUMBO_RCV_PROD_RING; - /* Receive buffer size. */ - pPacket->u.Rx.RxBufferSize = pDevice->RxJumboBufferSize; + /* Receive buffer size. */ + pPacket->u.Rx.RxBufferSize = pDevice->RxJumboBufferSize; - /* Add the descriptor to RxPacketFreeQ. */ - QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); + /* Add the descriptor to RxPacketFreeQ. */ + QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); - /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */ - /* is the total size of the packet descriptor including the */ - /* os-specific extensions in the UM_PACKET structure. */ - pPacket = (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE); + /* Get the pointer to the next descriptor. MM_PACKET_DESC_SIZE */ + /* is the total size of the packet descriptor including the */ + /* os-specific extensions in the UM_PACKET structure. */ + pPacket = (PLM_PACKET) ((PLM_UINT8) pPacket + MM_PACKET_DESC_SIZE); } /* for */ #endif /* T3_JUMBO_RCV_RCB_ENTRY_COUNT */ @@ -1851,12 +1846,12 @@ Status = MM_InitializeUmPackets(pDevice); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } /* if */ /* Default receive mask. */ pDevice->ReceiveMask = LM_ACCEPT_MULTICAST | LM_ACCEPT_BROADCAST | - LM_ACCEPT_UNICAST; + LM_ACCEPT_UNICAST; /* Make sure we are in the first 32k memory window or NicSendBd. */ REG_WR(pDevice, PciCfg.MemWindowBaseAddr, 0); @@ -1865,7 +1860,7 @@ Status = LM_ResetAdapter(pDevice); if(Status != LM_STATUS_SUCCESS) { - return Status; + return Status; } /* We are done with initialization. */ @@ -1875,7 +1870,6 @@ } /* LM_InitializeAdapter */ - /******************************************************************************/ /* Description: */ /* This function Enables/Disables a given block. */ @@ -1896,399 +1890,399 @@ for(i = 0 ; i < 32; i++) { - if(!(mask & (1 << i))) - continue; + if(!(mask & (1 << i))) + continue; - switch (1 << i) - { - case T3_BLOCK_DMA_RD: - data = REG_RD(pDevice, DmaRead.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~DMA_READ_MODE_ENABLE; - REG_WR(pDevice, DmaRead.Mode, data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, DmaRead.Mode) & DMA_READ_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, DmaRead.Mode, data | DMA_READ_MODE_ENABLE); - break; + switch (1 << i) + { + case T3_BLOCK_DMA_RD: + data = REG_RD(pDevice, DmaRead.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~DMA_READ_MODE_ENABLE; + REG_WR(pDevice, DmaRead.Mode, data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, DmaRead.Mode) & DMA_READ_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, DmaRead.Mode, data | DMA_READ_MODE_ENABLE); + break; - case T3_BLOCK_DMA_COMP: - data = REG_RD(pDevice,DmaComp.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~DMA_COMP_MODE_ENABLE; - REG_WR(pDevice, DmaComp.Mode, data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, DmaComp.Mode) & DMA_COMP_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, DmaComp.Mode, data | DMA_COMP_MODE_ENABLE); - break; + case T3_BLOCK_DMA_COMP: + data = REG_RD(pDevice,DmaComp.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~DMA_COMP_MODE_ENABLE; + REG_WR(pDevice, DmaComp.Mode, data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, DmaComp.Mode) & DMA_COMP_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, DmaComp.Mode, data | DMA_COMP_MODE_ENABLE); + break; - case T3_BLOCK_RX_BD_INITIATOR: - data = REG_RD(pDevice, RcvBdIn.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~RCV_BD_IN_MODE_ENABLE; - REG_WR(pDevice, RcvBdIn.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, RcvBdIn.Mode) & RCV_BD_IN_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, RcvBdIn.Mode,data | RCV_BD_IN_MODE_ENABLE); - break; + case T3_BLOCK_RX_BD_INITIATOR: + data = REG_RD(pDevice, RcvBdIn.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~RCV_BD_IN_MODE_ENABLE; + REG_WR(pDevice, RcvBdIn.Mode,data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, RcvBdIn.Mode) & RCV_BD_IN_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, RcvBdIn.Mode,data | RCV_BD_IN_MODE_ENABLE); + break; - case T3_BLOCK_RX_BD_COMP: - data = REG_RD(pDevice, RcvBdComp.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~RCV_BD_COMP_MODE_ENABLE; - REG_WR(pDevice, RcvBdComp.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, RcvBdComp.Mode) & RCV_BD_COMP_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, RcvBdComp.Mode,data | RCV_BD_COMP_MODE_ENABLE); - break; + case T3_BLOCK_RX_BD_COMP: + data = REG_RD(pDevice, RcvBdComp.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~RCV_BD_COMP_MODE_ENABLE; + REG_WR(pDevice, RcvBdComp.Mode,data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, RcvBdComp.Mode) & RCV_BD_COMP_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, RcvBdComp.Mode,data | RCV_BD_COMP_MODE_ENABLE); + break; - case T3_BLOCK_DMA_WR: - data = REG_RD(pDevice, DmaWrite.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~DMA_WRITE_MODE_ENABLE; - REG_WR(pDevice, DmaWrite.Mode,data); + case T3_BLOCK_DMA_WR: + data = REG_RD(pDevice, DmaWrite.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~DMA_WRITE_MODE_ENABLE; + REG_WR(pDevice, DmaWrite.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, DmaWrite.Mode) & DMA_WRITE_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, DmaWrite.Mode,data | DMA_WRITE_MODE_ENABLE); - break; + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, DmaWrite.Mode) & DMA_WRITE_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, DmaWrite.Mode,data | DMA_WRITE_MODE_ENABLE); + break; - case T3_BLOCK_MSI_HANDLER: - data = REG_RD(pDevice, Msi.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~MSI_MODE_ENABLE; - REG_WR(pDevice, Msi.Mode, data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, Msi.Mode) & MSI_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, Msi.Mode, data |MSI_MODE_ENABLE); - break; + case T3_BLOCK_MSI_HANDLER: + data = REG_RD(pDevice, Msi.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~MSI_MODE_ENABLE; + REG_WR(pDevice, Msi.Mode, data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, Msi.Mode) & MSI_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, Msi.Mode, data |MSI_MODE_ENABLE); + break; - case T3_BLOCK_RX_LIST_PLMT: - data = REG_RD(pDevice, RcvListPlmt.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~RCV_LIST_PLMT_MODE_ENABLE; - REG_WR(pDevice, RcvListPlmt.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, RcvListPlmt.Mode) & RCV_LIST_PLMT_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, RcvListPlmt.Mode,data | RCV_LIST_PLMT_MODE_ENABLE); - break; + case T3_BLOCK_RX_LIST_PLMT: + data = REG_RD(pDevice, RcvListPlmt.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~RCV_LIST_PLMT_MODE_ENABLE; + REG_WR(pDevice, RcvListPlmt.Mode,data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, RcvListPlmt.Mode) & RCV_LIST_PLMT_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, RcvListPlmt.Mode,data | RCV_LIST_PLMT_MODE_ENABLE); + break; - case T3_BLOCK_RX_LIST_SELECTOR: - data = REG_RD(pDevice, RcvListSel.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~RCV_LIST_SEL_MODE_ENABLE; - REG_WR(pDevice, RcvListSel.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, RcvListSel.Mode) & RCV_LIST_SEL_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, RcvListSel.Mode,data |RCV_LIST_SEL_MODE_ENABLE); - break; + case T3_BLOCK_RX_LIST_SELECTOR: + data = REG_RD(pDevice, RcvListSel.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~RCV_LIST_SEL_MODE_ENABLE; + REG_WR(pDevice, RcvListSel.Mode,data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, RcvListSel.Mode) & RCV_LIST_SEL_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, RcvListSel.Mode,data |RCV_LIST_SEL_MODE_ENABLE); + break; - case T3_BLOCK_RX_DATA_INITIATOR: - data = REG_RD(pDevice, RcvDataBdIn.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~RCV_DATA_BD_IN_MODE_ENABLE; - REG_WR(pDevice, RcvDataBdIn.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, RcvDataBdIn.Mode) & RCV_DATA_BD_IN_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, RcvDataBdIn.Mode, data | RCV_DATA_BD_IN_MODE_ENABLE); - break; + case T3_BLOCK_RX_DATA_INITIATOR: + data = REG_RD(pDevice, RcvDataBdIn.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~RCV_DATA_BD_IN_MODE_ENABLE; + REG_WR(pDevice, RcvDataBdIn.Mode,data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, RcvDataBdIn.Mode) & RCV_DATA_BD_IN_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, RcvDataBdIn.Mode, data | RCV_DATA_BD_IN_MODE_ENABLE); + break; - case T3_BLOCK_RX_DATA_COMP: - data = REG_RD(pDevice, RcvDataComp.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~RCV_DATA_COMP_MODE_ENABLE; - REG_WR(pDevice, RcvDataComp.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, RcvDataBdIn.Mode) & RCV_DATA_COMP_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, RcvDataComp.Mode,data | RCV_DATA_COMP_MODE_ENABLE); - break; + case T3_BLOCK_RX_DATA_COMP: + data = REG_RD(pDevice, RcvDataComp.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~RCV_DATA_COMP_MODE_ENABLE; + REG_WR(pDevice, RcvDataComp.Mode,data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, RcvDataBdIn.Mode) & RCV_DATA_COMP_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, RcvDataComp.Mode,data | RCV_DATA_COMP_MODE_ENABLE); + break; - case T3_BLOCK_HOST_COALESING: - data = REG_RD(pDevice, HostCoalesce.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~HOST_COALESCE_ENABLE; - REG_WR(pDevice, HostCoalesce.Mode, data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, SndBdIn.Mode) & HOST_COALESCE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, HostCoalesce.Mode, data | HOST_COALESCE_ENABLE); - break; + case T3_BLOCK_HOST_COALESING: + data = REG_RD(pDevice, HostCoalesce.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~HOST_COALESCE_ENABLE; + REG_WR(pDevice, HostCoalesce.Mode, data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, SndBdIn.Mode) & HOST_COALESCE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, HostCoalesce.Mode, data | HOST_COALESCE_ENABLE); + break; - case T3_BLOCK_MAC_RX_ENGINE: - if(cntrl == LM_DISABLE) - { - pDevice->RxMode &= ~RX_MODE_ENABLE; - REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, MacCtrl.RxMode) & RX_MODE_ENABLE)) - { - break; - } - MM_Wait(10); - } - } - else - { - pDevice->RxMode |= RX_MODE_ENABLE; - REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode); - } - break; + case T3_BLOCK_MAC_RX_ENGINE: + if(cntrl == LM_DISABLE) + { + pDevice->RxMode &= ~RX_MODE_ENABLE; + REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, MacCtrl.RxMode) & RX_MODE_ENABLE)) + { + break; + } + MM_Wait(10); + } + } + else + { + pDevice->RxMode |= RX_MODE_ENABLE; + REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode); + } + break; - case T3_BLOCK_MBUF_CLUSTER_FREE: - data = REG_RD(pDevice, MbufClusterFree.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~MBUF_CLUSTER_FREE_MODE_ENABLE; - REG_WR(pDevice, MbufClusterFree.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, MbufClusterFree.Mode) & MBUF_CLUSTER_FREE_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, MbufClusterFree.Mode, data | MBUF_CLUSTER_FREE_MODE_ENABLE); - break; + case T3_BLOCK_MBUF_CLUSTER_FREE: + data = REG_RD(pDevice, MbufClusterFree.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~MBUF_CLUSTER_FREE_MODE_ENABLE; + REG_WR(pDevice, MbufClusterFree.Mode,data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, MbufClusterFree.Mode) & MBUF_CLUSTER_FREE_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, MbufClusterFree.Mode, data | MBUF_CLUSTER_FREE_MODE_ENABLE); + break; - case T3_BLOCK_SEND_BD_INITIATOR: - data = REG_RD(pDevice, SndBdIn.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~SND_BD_IN_MODE_ENABLE; - REG_WR(pDevice, SndBdIn.Mode, data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, SndBdIn.Mode) & SND_BD_IN_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, SndBdIn.Mode, data | SND_BD_IN_MODE_ENABLE); - break; + case T3_BLOCK_SEND_BD_INITIATOR: + data = REG_RD(pDevice, SndBdIn.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~SND_BD_IN_MODE_ENABLE; + REG_WR(pDevice, SndBdIn.Mode, data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, SndBdIn.Mode) & SND_BD_IN_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, SndBdIn.Mode, data | SND_BD_IN_MODE_ENABLE); + break; - case T3_BLOCK_SEND_BD_COMP: - data = REG_RD(pDevice, SndBdComp.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~SND_BD_COMP_MODE_ENABLE; - REG_WR(pDevice, SndBdComp.Mode, data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, SndBdComp.Mode) & SND_BD_COMP_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, SndBdComp.Mode, data | SND_BD_COMP_MODE_ENABLE); - break; + case T3_BLOCK_SEND_BD_COMP: + data = REG_RD(pDevice, SndBdComp.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~SND_BD_COMP_MODE_ENABLE; + REG_WR(pDevice, SndBdComp.Mode, data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, SndBdComp.Mode) & SND_BD_COMP_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, SndBdComp.Mode, data | SND_BD_COMP_MODE_ENABLE); + break; - case T3_BLOCK_SEND_BD_SELECTOR: - data = REG_RD(pDevice, SndBdSel.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~SND_BD_SEL_MODE_ENABLE; - REG_WR(pDevice, SndBdSel.Mode, data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, SndBdSel.Mode) & SND_BD_SEL_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, SndBdSel.Mode, data | SND_BD_SEL_MODE_ENABLE); - break; + case T3_BLOCK_SEND_BD_SELECTOR: + data = REG_RD(pDevice, SndBdSel.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~SND_BD_SEL_MODE_ENABLE; + REG_WR(pDevice, SndBdSel.Mode, data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, SndBdSel.Mode) & SND_BD_SEL_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, SndBdSel.Mode, data | SND_BD_SEL_MODE_ENABLE); + break; - case T3_BLOCK_SEND_DATA_INITIATOR: - data = REG_RD(pDevice, SndDataIn.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~T3_SND_DATA_IN_MODE_ENABLE; - REG_WR(pDevice, SndDataIn.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, SndDataIn.Mode) & T3_SND_DATA_IN_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, SndDataIn.Mode,data | T3_SND_DATA_IN_MODE_ENABLE); - break; + case T3_BLOCK_SEND_DATA_INITIATOR: + data = REG_RD(pDevice, SndDataIn.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~T3_SND_DATA_IN_MODE_ENABLE; + REG_WR(pDevice, SndDataIn.Mode,data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, SndDataIn.Mode) & T3_SND_DATA_IN_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, SndDataIn.Mode,data | T3_SND_DATA_IN_MODE_ENABLE); + break; - case T3_BLOCK_SEND_DATA_COMP: - data = REG_RD(pDevice, SndDataComp.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~SND_DATA_COMP_MODE_ENABLE; - REG_WR(pDevice, SndDataComp.Mode, data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, SndDataComp.Mode) & SND_DATA_COMP_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, SndDataComp.Mode,data | SND_DATA_COMP_MODE_ENABLE); - break; + case T3_BLOCK_SEND_DATA_COMP: + data = REG_RD(pDevice, SndDataComp.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~SND_DATA_COMP_MODE_ENABLE; + REG_WR(pDevice, SndDataComp.Mode, data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, SndDataComp.Mode) & SND_DATA_COMP_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, SndDataComp.Mode,data | SND_DATA_COMP_MODE_ENABLE); + break; - case T3_BLOCK_MAC_TX_ENGINE: - if(cntrl == LM_DISABLE) - { - pDevice->TxMode &= ~TX_MODE_ENABLE; - REG_WR(pDevice, MacCtrl.TxMode, pDevice->TxMode); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, MacCtrl.TxMode) & TX_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - { - pDevice->TxMode |= TX_MODE_ENABLE; - REG_WR(pDevice, MacCtrl.TxMode, pDevice->TxMode); - } - break; + case T3_BLOCK_MAC_TX_ENGINE: + if(cntrl == LM_DISABLE) + { + pDevice->TxMode &= ~TX_MODE_ENABLE; + REG_WR(pDevice, MacCtrl.TxMode, pDevice->TxMode); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, MacCtrl.TxMode) & TX_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + { + pDevice->TxMode |= TX_MODE_ENABLE; + REG_WR(pDevice, MacCtrl.TxMode, pDevice->TxMode); + } + break; - case T3_BLOCK_MEM_ARBITOR: - data = REG_RD(pDevice, MemArbiter.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~T3_MEM_ARBITER_MODE_ENABLE; - REG_WR(pDevice, MemArbiter.Mode, data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, MemArbiter.Mode) & T3_MEM_ARBITER_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, MemArbiter.Mode,data|T3_MEM_ARBITER_MODE_ENABLE); - break; + case T3_BLOCK_MEM_ARBITOR: + data = REG_RD(pDevice, MemArbiter.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~T3_MEM_ARBITER_MODE_ENABLE; + REG_WR(pDevice, MemArbiter.Mode, data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, MemArbiter.Mode) & T3_MEM_ARBITER_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, MemArbiter.Mode,data|T3_MEM_ARBITER_MODE_ENABLE); + break; - case T3_BLOCK_MBUF_MANAGER: - data = REG_RD(pDevice, BufMgr.Mode); - if (cntrl == LM_DISABLE) - { - data &= ~BUFMGR_MODE_ENABLE; - REG_WR(pDevice, BufMgr.Mode,data); - for(j = 0; j < MaxWaitCnt; j++) - { - if(!(REG_RD(pDevice, BufMgr.Mode) & BUFMGR_MODE_ENABLE)) - break; - MM_Wait(10); - } - } - else - REG_WR(pDevice, BufMgr.Mode,data | BUFMGR_MODE_ENABLE); - break; + case T3_BLOCK_MBUF_MANAGER: + data = REG_RD(pDevice, BufMgr.Mode); + if (cntrl == LM_DISABLE) + { + data &= ~BUFMGR_MODE_ENABLE; + REG_WR(pDevice, BufMgr.Mode,data); + for(j = 0; j < MaxWaitCnt; j++) + { + if(!(REG_RD(pDevice, BufMgr.Mode) & BUFMGR_MODE_ENABLE)) + break; + MM_Wait(10); + } + } + else + REG_WR(pDevice, BufMgr.Mode,data | BUFMGR_MODE_ENABLE); + break; - case T3_BLOCK_MAC_GLOBAL: - if(cntrl == LM_DISABLE) - { - pDevice->MacMode &= ~(MAC_MODE_ENABLE_TDE | - MAC_MODE_ENABLE_RDE | - MAC_MODE_ENABLE_FHDE); - } - else - { - pDevice->MacMode |= (MAC_MODE_ENABLE_TDE | - MAC_MODE_ENABLE_RDE | - MAC_MODE_ENABLE_FHDE); - } - REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); - break; + case T3_BLOCK_MAC_GLOBAL: + if(cntrl == LM_DISABLE) + { + pDevice->MacMode &= ~(MAC_MODE_ENABLE_TDE | + MAC_MODE_ENABLE_RDE | + MAC_MODE_ENABLE_FHDE); + } + else + { + pDevice->MacMode |= (MAC_MODE_ENABLE_TDE | + MAC_MODE_ENABLE_RDE | + MAC_MODE_ENABLE_FHDE); + } + REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); + break; - default: - return LM_STATUS_FAILURE; - } /* switch */ + default: + return LM_STATUS_FAILURE; + } /* switch */ - if(j >= MaxWaitCnt) - { - return LM_STATUS_FAILURE; - } + if(j >= MaxWaitCnt) + { + return LM_STATUS_FAILURE; + } } return LM_STATUS_SUCCESS; @@ -2318,7 +2312,7 @@ /* Disable transmit and receive DMA engines. Abort all pending requests. */ if(pDevice->InitDone) { - LM_Abort(pDevice); + LM_Abort(pDevice); } pDevice->ShuttingDown = FALSE; @@ -2329,36 +2323,36 @@ /* in other chip revisions. */ if(pDevice->DelayPciGrant) { - Value32 = REG_RD(pDevice, PciCfg.ClockCtrl); - REG_WR(pDevice, PciCfg.ClockCtrl, Value32 | BIT_31); + Value32 = REG_RD(pDevice, PciCfg.ClockCtrl); + REG_WR(pDevice, PciCfg.ClockCtrl, Value32 | BIT_31); } if(pDevice->ChipRevId == T3_CHIP_ID_5704_A0) { - if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) - { - Value32 = REG_RD(pDevice, PciCfg.PciState); - Value32 |= T3_PCI_STATE_RETRY_SAME_DMA; - REG_WR(pDevice, PciCfg.PciState, Value32); - } + if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) + { + Value32 = REG_RD(pDevice, PciCfg.PciState); + Value32 |= T3_PCI_STATE_RETRY_SAME_DMA; + REG_WR(pDevice, PciCfg.PciState, Value32); + } } /* Enable TaggedStatus mode. */ if(pDevice->UseTaggedStatus) { - pDevice->MiscHostCtrl |= MISC_HOST_CTRL_ENABLE_TAGGED_STATUS_MODE; + pDevice->MiscHostCtrl |= MISC_HOST_CTRL_ENABLE_TAGGED_STATUS_MODE; } /* Restore PCI configuration registers. */ MM_WriteConfig32(pDevice, PCI_CACHE_LINE_SIZE_REG, - pDevice->SavedCacheLineReg); + pDevice->SavedCacheLineReg); MM_WriteConfig32(pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG, - (pDevice->SubsystemId << 16) | pDevice->SubsystemVendorId); + (pDevice->SubsystemId << 16) | pDevice->SubsystemVendorId); /* Clear the statistics block. */ for(j = 0x0300; j < 0x0b00; j++) { - MEM_WR_OFFSET(pDevice, j, 0); + MEM_WR_OFFSET(pDevice, j, 0); } /* Initialize the statistis Block */ @@ -2383,8 +2377,8 @@ /* Receive jumbo BD buffer. */ for(k = 0; k < T3_JUMBO_RCV_RCB_ENTRY_COUNT; k++) { - pDevice->pRxJumboBdVirt[k].HostAddr.High = 0; - pDevice->pRxJumboBdVirt[k].HostAddr.Low = 0; + pDevice->pRxJumboBdVirt[k].HostAddr.High = 0; + pDevice->pRxJumboBdVirt[k].HostAddr.Low = 0; } #endif @@ -2393,46 +2387,46 @@ /* GRC mode control register. */ #ifdef BIG_ENDIAN_PCI /* Jimmy, this ifdef block deleted in new code! */ Value32 = - GRC_MODE_WORD_SWAP_DATA | - GRC_MODE_WORD_SWAP_NON_FRAME_DATA | - GRC_MODE_INT_ON_MAC_ATTN | - GRC_MODE_HOST_STACK_UP; + GRC_MODE_WORD_SWAP_DATA | + GRC_MODE_WORD_SWAP_NON_FRAME_DATA | + GRC_MODE_INT_ON_MAC_ATTN | + GRC_MODE_HOST_STACK_UP; #else /* No CPU Swap modes for PCI IO */ Value32 = #ifdef BIG_ENDIAN_HOST - GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | - GRC_MODE_WORD_SWAP_NON_FRAME_DATA | - GRC_MODE_BYTE_SWAP_DATA | - GRC_MODE_WORD_SWAP_DATA | + GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | + GRC_MODE_WORD_SWAP_NON_FRAME_DATA | + GRC_MODE_BYTE_SWAP_DATA | + GRC_MODE_WORD_SWAP_DATA | #else - GRC_MODE_WORD_SWAP_NON_FRAME_DATA | - GRC_MODE_BYTE_SWAP_DATA | - GRC_MODE_WORD_SWAP_DATA | + GRC_MODE_WORD_SWAP_NON_FRAME_DATA | + GRC_MODE_BYTE_SWAP_DATA | + GRC_MODE_WORD_SWAP_DATA | #endif - GRC_MODE_INT_ON_MAC_ATTN | - GRC_MODE_HOST_STACK_UP; + GRC_MODE_INT_ON_MAC_ATTN | + GRC_MODE_HOST_STACK_UP; #endif /* !BIG_ENDIAN_PCI */ /* Configure send BD mode. */ if(pDevice->NicSendBd == FALSE) { - Value32 |= GRC_MODE_HOST_SEND_BDS; + Value32 |= GRC_MODE_HOST_SEND_BDS; } else { - Value32 |= GRC_MODE_4X_NIC_BASED_SEND_RINGS; + Value32 |= GRC_MODE_4X_NIC_BASED_SEND_RINGS; } /* Configure pseudo checksum mode. */ if(pDevice->NoTxPseudoHdrChksum) { - Value32 |= GRC_MODE_TX_NO_PSEUDO_HEADER_CHKSUM; + Value32 |= GRC_MODE_TX_NO_PSEUDO_HEADER_CHKSUM; } if(pDevice->NoRxPseudoHdrChksum) { - Value32 |= GRC_MODE_RX_NO_PSEUDO_HEADER_CHKSUM; + Value32 |= GRC_MODE_RX_NO_PSEUDO_HEADER_CHKSUM; } REG_WR(pDevice, Grc.Mode, Value32); @@ -2452,60 +2446,60 @@ /* Configure the DMA read MBUF low water mark. */ if(pDevice->DmaMbufLowMark) { - REG_WR(pDevice, BufMgr.MbufReadDmaLowWaterMark, - pDevice->DmaMbufLowMark); + REG_WR(pDevice, BufMgr.MbufReadDmaLowWaterMark, + pDevice->DmaMbufLowMark); } else { - if(pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) - { - REG_WR(pDevice, BufMgr.MbufReadDmaLowWaterMark, - T3_DEF_DMA_MBUF_LOW_WMARK); - } - else - { - REG_WR(pDevice, BufMgr.MbufReadDmaLowWaterMark, - T3_DEF_DMA_MBUF_LOW_WMARK_JUMBO); - } + if(pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) + { + REG_WR(pDevice, BufMgr.MbufReadDmaLowWaterMark, + T3_DEF_DMA_MBUF_LOW_WMARK); + } + else + { + REG_WR(pDevice, BufMgr.MbufReadDmaLowWaterMark, + T3_DEF_DMA_MBUF_LOW_WMARK_JUMBO); + } } /* Configure the MAC Rx MBUF low water mark. */ if(pDevice->RxMacMbufLowMark) { - REG_WR(pDevice, BufMgr.MbufMacRxLowWaterMark, - pDevice->RxMacMbufLowMark); + REG_WR(pDevice, BufMgr.MbufMacRxLowWaterMark, + pDevice->RxMacMbufLowMark); } else { - if(pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) - { - REG_WR(pDevice, BufMgr.MbufMacRxLowWaterMark, - T3_DEF_RX_MAC_MBUF_LOW_WMARK); - } - else - { - REG_WR(pDevice, BufMgr.MbufMacRxLowWaterMark, - T3_DEF_RX_MAC_MBUF_LOW_WMARK_JUMBO); - } + if(pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) + { + REG_WR(pDevice, BufMgr.MbufMacRxLowWaterMark, + T3_DEF_RX_MAC_MBUF_LOW_WMARK); + } + else + { + REG_WR(pDevice, BufMgr.MbufMacRxLowWaterMark, + T3_DEF_RX_MAC_MBUF_LOW_WMARK_JUMBO); + } } /* Configure the MBUF high water mark. */ if(pDevice->MbufHighMark) { - REG_WR(pDevice, BufMgr.MbufHighWaterMark, pDevice->MbufHighMark); + REG_WR(pDevice, BufMgr.MbufHighWaterMark, pDevice->MbufHighMark); } else { - if(pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) - { - REG_WR(pDevice, BufMgr.MbufHighWaterMark, - T3_DEF_MBUF_HIGH_WMARK); - } - else - { - REG_WR(pDevice, BufMgr.MbufHighWaterMark, - T3_DEF_MBUF_HIGH_WMARK_JUMBO); - } + if(pDevice->TxMtu < MAX_ETHERNET_PACKET_BUFFER_SIZE) + { + REG_WR(pDevice, BufMgr.MbufHighWaterMark, + T3_DEF_MBUF_HIGH_WMARK); + } + else + { + REG_WR(pDevice, BufMgr.MbufHighWaterMark, + T3_DEF_MBUF_HIGH_WMARK_JUMBO); + } } REG_WR(pDevice, BufMgr.DmaLowWaterMark, T3_DEF_DMA_DESC_LOW_WMARK); @@ -2516,14 +2510,14 @@ for(j = 0 ;j < 2000; j++) { - if(REG_RD(pDevice, BufMgr.Mode) & BUFMGR_MODE_ENABLE) - break; - MM_Wait(10); + if(REG_RD(pDevice, BufMgr.Mode) & BUFMGR_MODE_ENABLE) + break; + MM_Wait(10); } if(j >= 2000) { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } /* Enable the FTQs. */ @@ -2533,32 +2527,32 @@ /* Wait until FTQ is ready */ for(j = 0; j < 2000; j++) { - if(REG_RD(pDevice, Ftq.Reset) == 0) - break; - MM_Wait(10); + if(REG_RD(pDevice, Ftq.Reset) == 0) + break; + MM_Wait(10); } if(j >= 2000) { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } /* Initialize the Standard Receive RCB. */ REG_WR(pDevice, RcvDataBdIn.StdRcvRcb.HostRingAddr.High, - pDevice->RxStdBdPhy.High); + pDevice->RxStdBdPhy.High); REG_WR(pDevice, RcvDataBdIn.StdRcvRcb.HostRingAddr.Low, - pDevice->RxStdBdPhy.Low); + pDevice->RxStdBdPhy.Low); REG_WR(pDevice, RcvDataBdIn.StdRcvRcb.u.MaxLen_Flags, - MAX_STD_RCV_BUFFER_SIZE << 16); + MAX_STD_RCV_BUFFER_SIZE << 16); /* Initialize the Jumbo Receive RCB. */ REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.u.MaxLen_Flags, - T3_RCB_FLAG_RING_DISABLED); + T3_RCB_FLAG_RING_DISABLED); #if T3_JUMBO_RCV_RCB_ENTRY_COUNT REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.HostRingAddr.High, - pDevice->RxJumboBdPhy.High); + pDevice->RxJumboBdPhy.High); REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.HostRingAddr.Low, - pDevice->RxJumboBdPhy.Low); + pDevice->RxJumboBdPhy.Low); REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.u.MaxLen_Flags, 0); @@ -2566,13 +2560,13 @@ /* Initialize the Mini Receive RCB. */ REG_WR(pDevice, RcvDataBdIn.MiniRcvRcb.u.MaxLen_Flags, - T3_RCB_FLAG_RING_DISABLED); + T3_RCB_FLAG_RING_DISABLED); { - REG_WR(pDevice, RcvDataBdIn.StdRcvRcb.NicRingAddr, - (LM_UINT32) T3_NIC_STD_RCV_BUFFER_DESC_ADDR); - REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.NicRingAddr, - (LM_UINT32) T3_NIC_JUMBO_RCV_BUFFER_DESC_ADDR); + REG_WR(pDevice, RcvDataBdIn.StdRcvRcb.NicRingAddr, + (LM_UINT32) T3_NIC_STD_RCV_BUFFER_DESC_ADDR); + REG_WR(pDevice, RcvDataBdIn.JumboRcvRcb.NicRingAddr, + (LM_UINT32) T3_NIC_JUMBO_RCV_BUFFER_DESC_ADDR); } /* Receive BD Ring replenish threshold. */ @@ -2583,7 +2577,7 @@ /* Disable all the unused rings. */ for(j = 0; j < T3_MAX_SEND_RCB_COUNT; j++) { - MEM_WR(pDevice, SendRcb[j].u.MaxLen_Flags, T3_RCB_FLAG_RING_DISABLED); + MEM_WR(pDevice, SendRcb[j].u.MaxLen_Flags, T3_RCB_FLAG_RING_DISABLED); } /* for */ /* Initialize the indices. */ @@ -2596,54 +2590,54 @@ /* Set up host or NIC based send RCB. */ if(pDevice->NicSendBd == FALSE) { - MEM_WR(pDevice, SendRcb[0].HostRingAddr.High, - pDevice->SendBdPhy.High); - MEM_WR(pDevice, SendRcb[0].HostRingAddr.Low, - pDevice->SendBdPhy.Low); + MEM_WR(pDevice, SendRcb[0].HostRingAddr.High, + pDevice->SendBdPhy.High); + MEM_WR(pDevice, SendRcb[0].HostRingAddr.Low, + pDevice->SendBdPhy.Low); - /* Set up the NIC ring address in the RCB. */ - MEM_WR(pDevice, SendRcb[0].NicRingAddr,T3_NIC_SND_BUFFER_DESC_ADDR); + /* Set up the NIC ring address in the RCB. */ + MEM_WR(pDevice, SendRcb[0].NicRingAddr,T3_NIC_SND_BUFFER_DESC_ADDR); - /* Setup the RCB. */ - MEM_WR(pDevice, SendRcb[0].u.MaxLen_Flags, - T3_SEND_RCB_ENTRY_COUNT << 16); + /* Setup the RCB. */ + MEM_WR(pDevice, SendRcb[0].u.MaxLen_Flags, + T3_SEND_RCB_ENTRY_COUNT << 16); - for(k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++) - { - pDevice->pSendBdVirt[k].HostAddr.High = 0; - pDevice->pSendBdVirt[k].HostAddr.Low = 0; - } + for(k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++) + { + pDevice->pSendBdVirt[k].HostAddr.High = 0; + pDevice->pSendBdVirt[k].HostAddr.Low = 0; + } } else { - MEM_WR(pDevice, SendRcb[0].HostRingAddr.High, 0); - MEM_WR(pDevice, SendRcb[0].HostRingAddr.Low, 0); - MEM_WR(pDevice, SendRcb[0].NicRingAddr, - pDevice->SendBdPhy.Low); + MEM_WR(pDevice, SendRcb[0].HostRingAddr.High, 0); + MEM_WR(pDevice, SendRcb[0].HostRingAddr.Low, 0); + MEM_WR(pDevice, SendRcb[0].NicRingAddr, + pDevice->SendBdPhy.Low); - for(k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++) - { - __raw_writel(0, &(pDevice->pSendBdVirt[k].HostAddr.High)); - __raw_writel(0, &(pDevice->pSendBdVirt[k].HostAddr.Low)); - __raw_writel(0, &(pDevice->pSendBdVirt[k].u1.Len_Flags)); - pDevice->ShadowSendBd[k].HostAddr.High = 0; - pDevice->ShadowSendBd[k].u1.Len_Flags = 0; - } + for(k = 0; k < T3_SEND_RCB_ENTRY_COUNT; k++) + { + __raw_writel(0, &(pDevice->pSendBdVirt[k].HostAddr.High)); + __raw_writel(0, &(pDevice->pSendBdVirt[k].HostAddr.Low)); + __raw_writel(0, &(pDevice->pSendBdVirt[k].u1.Len_Flags)); + pDevice->ShadowSendBd[k].HostAddr.High = 0; + pDevice->ShadowSendBd[k].u1.Len_Flags = 0; + } } atomic_set(&pDevice->SendBdLeft, T3_SEND_RCB_ENTRY_COUNT-1); /* Configure the receive return rings. */ for(j = 0; j < T3_MAX_RCV_RETURN_RCB_COUNT; j++) { - MEM_WR(pDevice, RcvRetRcb[j].u.MaxLen_Flags, T3_RCB_FLAG_RING_DISABLED); + MEM_WR(pDevice, RcvRetRcb[j].u.MaxLen_Flags, T3_RCB_FLAG_RING_DISABLED); } pDevice->RcvRetConIdx = 0; MEM_WR(pDevice, RcvRetRcb[0].HostRingAddr.High, - pDevice->RcvRetBdPhy.High); + pDevice->RcvRetBdPhy.High); MEM_WR(pDevice, RcvRetRcb[0].HostRingAddr.Low, - pDevice->RcvRetBdPhy.Low); + pDevice->RcvRetBdPhy.Low); /* Set up the NIC ring address in the RCB. */ /* Not very clear from the spec. I am guessing that for Receive */ @@ -2652,7 +2646,7 @@ /* Setup the RCB. */ MEM_WR(pDevice, RcvRetRcb[0].u.MaxLen_Flags, - T3_RCV_RETURN_RCB_ENTRY_COUNT << 16); + T3_RCV_RETURN_RCB_ENTRY_COUNT << 16); /* Reinitialize RX ring producer index */ MB_REG_WR(pDevice, Mailbox.RcvStdProdIdx.Low, 0); @@ -2677,9 +2671,9 @@ /* Initialize the transmit random backoff seed. */ Value32 = (pDevice->NodeAddress[0] + pDevice->NodeAddress[1] + - pDevice->NodeAddress[2] + pDevice->NodeAddress[3] + - pDevice->NodeAddress[4] + pDevice->NodeAddress[5]) & - MAC_TX_BACKOFF_SEED_MASK; + pDevice->NodeAddress[2] + pDevice->NodeAddress[3] + + pDevice->NodeAddress[4] + pDevice->NodeAddress[5]) & + MAC_TX_BACKOFF_SEED_MASK; REG_WR(pDevice, MacCtrl.TxBackoffSeed, Value32); /* Receive MTU. Frames larger than the MTU is marked as oversized. */ @@ -2708,88 +2702,88 @@ /* Enable Send Data Initator Statistics */ REG_WR(pDevice, SndDataIn.StatsEnableMask,0xffffff); REG_WR(pDevice, SndDataIn.StatsCtrl, - T3_SND_DATA_IN_STATS_CTRL_ENABLE | \ - T3_SND_DATA_IN_STATS_CTRL_FASTER_UPDATE); + T3_SND_DATA_IN_STATS_CTRL_ENABLE | \ + T3_SND_DATA_IN_STATS_CTRL_FASTER_UPDATE); /* Disable the host coalescing state machine before configuring it's */ /* parameters. */ REG_WR(pDevice, HostCoalesce.Mode, 0); for(j = 0; j < 2000; j++) { - Value32 = REG_RD(pDevice, HostCoalesce.Mode); - if(!(Value32 & HOST_COALESCE_ENABLE)) - { - break; - } - MM_Wait(10); + Value32 = REG_RD(pDevice, HostCoalesce.Mode); + if(!(Value32 & HOST_COALESCE_ENABLE)) + { + break; + } + MM_Wait(10); } /* Host coalescing configurations. */ REG_WR(pDevice, HostCoalesce.RxCoalescingTicks, pDevice->RxCoalescingTicks); REG_WR(pDevice, HostCoalesce.TxCoalescingTicks, pDevice->TxCoalescingTicks); REG_WR(pDevice, HostCoalesce.RxMaxCoalescedFrames, - pDevice->RxMaxCoalescedFrames); + pDevice->RxMaxCoalescedFrames); REG_WR(pDevice, HostCoalesce.TxMaxCoalescedFrames, - pDevice->TxMaxCoalescedFrames); + pDevice->TxMaxCoalescedFrames); REG_WR(pDevice, HostCoalesce.RxCoalescedTickDuringInt, - pDevice->RxCoalescingTicksDuringInt); + pDevice->RxCoalescingTicksDuringInt); REG_WR(pDevice, HostCoalesce.TxCoalescedTickDuringInt, - pDevice->TxCoalescingTicksDuringInt); + pDevice->TxCoalescingTicksDuringInt); REG_WR(pDevice, HostCoalesce.RxMaxCoalescedFramesDuringInt, - pDevice->RxMaxCoalescedFramesDuringInt); + pDevice->RxMaxCoalescedFramesDuringInt); REG_WR(pDevice, HostCoalesce.TxMaxCoalescedFramesDuringInt, - pDevice->TxMaxCoalescedFramesDuringInt); + pDevice->TxMaxCoalescedFramesDuringInt); /* Initialize the address of the status block. The NIC will DMA */ /* the status block to this memory which resides on the host. */ REG_WR(pDevice, HostCoalesce.StatusBlkHostAddr.High, - pDevice->StatusBlkPhy.High); + pDevice->StatusBlkPhy.High); REG_WR(pDevice, HostCoalesce.StatusBlkHostAddr.Low, - pDevice->StatusBlkPhy.Low); + pDevice->StatusBlkPhy.Low); /* Initialize the address of the statistics block. The NIC will DMA */ /* the statistics to this block of memory. */ REG_WR(pDevice, HostCoalesce.StatsBlkHostAddr.High, - pDevice->StatsBlkPhy.High); + pDevice->StatsBlkPhy.High); REG_WR(pDevice, HostCoalesce.StatsBlkHostAddr.Low, - pDevice->StatsBlkPhy.Low); + pDevice->StatsBlkPhy.Low); REG_WR(pDevice, HostCoalesce.StatsCoalescingTicks, - pDevice->StatsCoalescingTicks); + pDevice->StatsCoalescingTicks); REG_WR(pDevice, HostCoalesce.StatsBlkNicAddr, 0x300); REG_WR(pDevice, HostCoalesce.StatusBlkNicAddr,0xb00); /* Enable Host Coalesing state machine */ REG_WR(pDevice, HostCoalesce.Mode, HOST_COALESCE_ENABLE | - pDevice->CoalesceMode); + pDevice->CoalesceMode); /* Enable the Receive BD Completion state machine. */ REG_WR(pDevice, RcvBdComp.Mode, RCV_BD_COMP_MODE_ENABLE | - RCV_BD_COMP_MODE_ATTN_ENABLE); + RCV_BD_COMP_MODE_ATTN_ENABLE); /* Enable the Receive List Placement state machine. */ REG_WR(pDevice, RcvListPlmt.Mode, RCV_LIST_PLMT_MODE_ENABLE); /* Enable the Receive List Selector state machine. */ REG_WR(pDevice, RcvListSel.Mode, RCV_LIST_SEL_MODE_ENABLE | - RCV_LIST_SEL_MODE_ATTN_ENABLE); + RCV_LIST_SEL_MODE_ATTN_ENABLE); /* Enable transmit DMA, clear statistics. */ pDevice->MacMode = MAC_MODE_ENABLE_TX_STATISTICS | - MAC_MODE_ENABLE_RX_STATISTICS | MAC_MODE_ENABLE_TDE | - MAC_MODE_ENABLE_RDE | MAC_MODE_ENABLE_FHDE; + MAC_MODE_ENABLE_RX_STATISTICS | MAC_MODE_ENABLE_TDE | + MAC_MODE_ENABLE_RDE | MAC_MODE_ENABLE_FHDE; REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode | - MAC_MODE_CLEAR_RX_STATISTICS | MAC_MODE_CLEAR_TX_STATISTICS); + MAC_MODE_CLEAR_RX_STATISTICS | MAC_MODE_CLEAR_TX_STATISTICS); /* GRC miscellaneous local control register. */ pDevice->GrcLocalCtrl = GRC_MISC_LOCAL_CTRL_INT_ON_ATTN | - GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM; + GRC_MISC_LOCAL_CTRL_AUTO_SEEPROM; if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) { - pDevice->GrcLocalCtrl |= GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1; + pDevice->GrcLocalCtrl |= GRC_MISC_LOCAL_CTRL_GPIO_OE1 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1; } REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl); @@ -2798,13 +2792,13 @@ /* Reset RX counters. */ for(j = 0; j < sizeof(LM_RX_COUNTERS); j++) { - ((PLM_UINT8) &pDevice->RxCounters)[j] = 0; + ((PLM_UINT8) &pDevice->RxCounters)[j] = 0; } /* Reset TX counters. */ for(j = 0; j < sizeof(LM_TX_COUNTERS); j++) { - ((PLM_UINT8) &pDevice->TxCounters)[j] = 0; + ((PLM_UINT8) &pDevice->TxCounters)[j] = 0; } MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, 0); @@ -2814,53 +2808,53 @@ /* Enable the DMA Write state machine. */ Value32 = DMA_WRITE_MODE_ENABLE | - DMA_WRITE_MODE_TARGET_ABORT_ATTN_ENABLE | - DMA_WRITE_MODE_MASTER_ABORT_ATTN_ENABLE | - DMA_WRITE_MODE_PARITY_ERROR_ATTN_ENABLE | - DMA_WRITE_MODE_ADDR_OVERFLOW_ATTN_ENABLE | - DMA_WRITE_MODE_FIFO_OVERRUN_ATTN_ENABLE | - DMA_WRITE_MODE_FIFO_UNDERRUN_ATTN_ENABLE | - DMA_WRITE_MODE_FIFO_OVERREAD_ATTN_ENABLE | - DMA_WRITE_MODE_LONG_READ_ATTN_ENABLE; + DMA_WRITE_MODE_TARGET_ABORT_ATTN_ENABLE | + DMA_WRITE_MODE_MASTER_ABORT_ATTN_ENABLE | + DMA_WRITE_MODE_PARITY_ERROR_ATTN_ENABLE | + DMA_WRITE_MODE_ADDR_OVERFLOW_ATTN_ENABLE | + DMA_WRITE_MODE_FIFO_OVERRUN_ATTN_ENABLE | + DMA_WRITE_MODE_FIFO_UNDERRUN_ATTN_ENABLE | + DMA_WRITE_MODE_FIFO_OVERREAD_ATTN_ENABLE | + DMA_WRITE_MODE_LONG_READ_ATTN_ENABLE; REG_WR(pDevice, DmaWrite.Mode, Value32); if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) { - if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) - { - Value16 = REG_RD(pDevice, PciCfg.PciXCommand); - Value16 &= ~(PCIX_CMD_MAX_SPLIT_MASK | PCIX_CMD_MAX_BURST_MASK); - Value16 |= ((PCIX_CMD_MAX_BURST_CPIOB << PCIX_CMD_MAX_BURST_SHL) & - PCIX_CMD_MAX_BURST_MASK); - if (pDevice->SplitModeEnable == SPLIT_MODE_ENABLE) - { - Value16 |= (pDevice->SplitModeMaxReq << PCIX_CMD_MAX_SPLIT_SHL) - & PCIX_CMD_MAX_SPLIT_MASK; - } - REG_WR(pDevice, PciCfg.PciXCommand, Value16); - } + if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) + { + Value16 = REG_RD(pDevice, PciCfg.PciXCommand); + Value16 &= ~(PCIX_CMD_MAX_SPLIT_MASK | PCIX_CMD_MAX_BURST_MASK); + Value16 |= ((PCIX_CMD_MAX_BURST_CPIOB << PCIX_CMD_MAX_BURST_SHL) & + PCIX_CMD_MAX_BURST_MASK); + if (pDevice->SplitModeEnable == SPLIT_MODE_ENABLE) + { + Value16 |= (pDevice->SplitModeMaxReq << PCIX_CMD_MAX_SPLIT_SHL) + & PCIX_CMD_MAX_SPLIT_MASK; + } + REG_WR(pDevice, PciCfg.PciXCommand, Value16); + } } /* Enable the Read DMA state machine. */ Value32 = DMA_READ_MODE_ENABLE | - DMA_READ_MODE_TARGET_ABORT_ATTN_ENABLE | - DMA_READ_MODE_MASTER_ABORT_ATTN_ENABLE | - DMA_READ_MODE_PARITY_ERROR_ATTN_ENABLE | - DMA_READ_MODE_ADDR_OVERFLOW_ATTN_ENABLE | - DMA_READ_MODE_FIFO_OVERRUN_ATTN_ENABLE | - DMA_READ_MODE_FIFO_UNDERRUN_ATTN_ENABLE | - DMA_READ_MODE_FIFO_OVERREAD_ATTN_ENABLE | - DMA_READ_MODE_LONG_READ_ATTN_ENABLE; + DMA_READ_MODE_TARGET_ABORT_ATTN_ENABLE | + DMA_READ_MODE_MASTER_ABORT_ATTN_ENABLE | + DMA_READ_MODE_PARITY_ERROR_ATTN_ENABLE | + DMA_READ_MODE_ADDR_OVERFLOW_ATTN_ENABLE | + DMA_READ_MODE_FIFO_OVERRUN_ATTN_ENABLE | + DMA_READ_MODE_FIFO_UNDERRUN_ATTN_ENABLE | + DMA_READ_MODE_FIFO_OVERREAD_ATTN_ENABLE | + DMA_READ_MODE_LONG_READ_ATTN_ENABLE; if (pDevice->SplitModeEnable == SPLIT_MODE_ENABLE) { - Value32 |= DMA_READ_MODE_SPLIT_ENABLE; + Value32 |= DMA_READ_MODE_SPLIT_ENABLE; } REG_WR(pDevice, DmaRead.Mode, Value32); /* Enable the Receive Data Completion state machine. */ REG_WR(pDevice, RcvDataComp.Mode, RCV_DATA_COMP_MODE_ENABLE | - RCV_DATA_COMP_MODE_ATTN_ENABLE); + RCV_DATA_COMP_MODE_ATTN_ENABLE); /* Enable the Mbuf Cluster Free state machine. */ REG_WR(pDevice, MbufClusterFree.Mode, MBUF_CLUSTER_FREE_MODE_ENABLE); @@ -2870,32 +2864,32 @@ /* Enable the Send BD Completion state machine. */ REG_WR(pDevice, SndBdComp.Mode, SND_BD_COMP_MODE_ENABLE | - SND_BD_COMP_MODE_ATTN_ENABLE); + SND_BD_COMP_MODE_ATTN_ENABLE); /* Enable the Receive BD Initiator state machine. */ REG_WR(pDevice, RcvBdIn.Mode, RCV_BD_IN_MODE_ENABLE | - RCV_BD_IN_MODE_BD_IN_DIABLED_RCB_ATTN_ENABLE); + RCV_BD_IN_MODE_BD_IN_DIABLED_RCB_ATTN_ENABLE); /* Enable the Receive Data and Receive BD Initiator state machine. */ REG_WR(pDevice, RcvDataBdIn.Mode, RCV_DATA_BD_IN_MODE_ENABLE | - RCV_DATA_BD_IN_MODE_INVALID_RING_SIZE); + RCV_DATA_BD_IN_MODE_INVALID_RING_SIZE); /* Enable the Send Data Initiator state machine. */ REG_WR(pDevice, SndDataIn.Mode, T3_SND_DATA_IN_MODE_ENABLE); /* Enable the Send BD Initiator state machine. */ REG_WR(pDevice, SndBdIn.Mode, SND_BD_IN_MODE_ENABLE | - SND_BD_IN_MODE_ATTN_ENABLE); + SND_BD_IN_MODE_ATTN_ENABLE); /* Enable the Send BD Selector state machine. */ REG_WR(pDevice, SndBdSel.Mode, SND_BD_SEL_MODE_ENABLE | - SND_BD_SEL_MODE_ATTN_ENABLE); + SND_BD_SEL_MODE_ATTN_ENABLE); #if INCLUDE_5701_AX_FIX /* Load the firmware for the 5701_A0 workaround. */ if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0) { - LM_LoadRlsFirmware(pDevice); + LM_LoadRlsFirmware(pDevice); } #endif @@ -2909,9 +2903,9 @@ if (pDevice->RestoreOnWakeUp) { - pDevice->RestoreOnWakeUp = FALSE; - pDevice->DisableAutoNeg = pDevice->WakeUpDisableAutoNeg; - pDevice->RequestedMediaType = pDevice->WakeUpRequestedMediaType; + pDevice->RestoreOnWakeUp = FALSE; + pDevice->DisableAutoNeg = pDevice->WakeUpDisableAutoNeg; + pDevice->RequestedMediaType = pDevice->WakeUpRequestedMediaType; } /* Disable auto polling. */ @@ -2919,20 +2913,20 @@ REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode); if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) { - Value32 = LED_CTRL_PHY_MODE_1; + Value32 = LED_CTRL_PHY_MODE_1; } else { - if(pDevice->LedMode == LED_MODE_OUTPUT) - { - Value32 = LED_CTRL_PHY_MODE_2; - } - else - { - Value32 = LED_CTRL_PHY_MODE_1; - } + if(pDevice->LedMode == LED_MODE_OUTPUT) + { + Value32 = LED_CTRL_PHY_MODE_2; + } + else + { + Value32 = LED_CTRL_PHY_MODE_1; + } } REG_WR(pDevice, MacCtrl.LedCtrl, Value32); @@ -2941,22 +2935,22 @@ if (pDevice->EnableTbi) { - REG_WR(pDevice, MacCtrl.RxMode, RX_MODE_RESET); - MM_Wait(10); - REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode); - if (pDevice->ChipRevId == T3_CHIP_ID_5703_A1) - { - REG_WR(pDevice, MacCtrl.SerdesCfg, 0x616000); - } + REG_WR(pDevice, MacCtrl.RxMode, RX_MODE_RESET); + MM_Wait(10); + REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode); + if (pDevice->ChipRevId == T3_CHIP_ID_5703_A1) + { + REG_WR(pDevice, MacCtrl.SerdesCfg, 0x616000); + } } /* Setup the phy chip. */ LM_SetupPhy(pDevice); if (!pDevice->EnableTbi) { - /* Clear CRC stats */ - LM_ReadPhy(pDevice, 0x1e, &Value32); - LM_WritePhy(pDevice, 0x1e, Value32 | 0x8000); - LM_ReadPhy(pDevice, 0x14, &Value32); + /* Clear CRC stats */ + LM_ReadPhy(pDevice, 0x1e, &Value32); + LM_WritePhy(pDevice, 0x1e, Value32 | 0x8000); + LM_ReadPhy(pDevice, 0x14, &Value32); } /* Set up the receive mask. */ @@ -2965,13 +2959,13 @@ /* Queue Rx packet buffers. */ if(pDevice->QueueRxPackets) { - LM_QueueRxPackets(pDevice); + LM_QueueRxPackets(pDevice); } /* Enable interrupt to the host. */ if(pDevice->InitDone) { - LM_EnableInterrupt(pDevice); + LM_EnableInterrupt(pDevice); } return LM_STATUS_SUCCESS; @@ -2990,14 +2984,13 @@ PLM_DEVICE_BLOCK pDevice) { REG_WR(pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl | - MISC_HOST_CTRL_MASK_PCI_INT); + MISC_HOST_CTRL_MASK_PCI_INT); MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, 1); return LM_STATUS_SUCCESS; } - /******************************************************************************/ /* Description: */ /* This routine enables the adapter to generate interrupts. */ @@ -3010,20 +3003,19 @@ PLM_DEVICE_BLOCK pDevice) { REG_WR(pDevice, PciCfg.MiscHostCtrl, pDevice->MiscHostCtrl & - ~MISC_HOST_CTRL_MASK_PCI_INT); + ~MISC_HOST_CTRL_MASK_PCI_INT); MB_REG_WR(pDevice, Mailbox.Interrupt[0].Low, 0); if(pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_UPDATED) { - REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_SET_INT); + REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | + GRC_MISC_LOCAL_CTRL_SET_INT); } return LM_STATUS_SUCCESS; } - /******************************************************************************/ /* Description: */ /* This routine puts a packet on the wire if there is a transmit DMA */ @@ -3045,7 +3037,7 @@ LM_UINT32 Idx; if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) { - return LM_5700SendPacket(pDevice, pPacket); + return LM_5700SendPacket(pDevice, pPacket); } /* Update the SendBdLeft count. */ @@ -3059,103 +3051,103 @@ /* Next producer index. */ if (pDevice->NicSendBd == TRUE) { - T3_64BIT_HOST_ADDR paddr; + T3_64BIT_HOST_ADDR paddr; - pShadowSendBd = &pDevice->ShadowSendBd[Idx]; - for(FragCount = 0; ; ) - { - MM_MapTxDma(pDevice, pPacket, &paddr, &Len, FragCount); - /* Initialize the pointer to the send buffer fragment. */ - if (paddr.High != pShadowSendBd->HostAddr.High) - { - __raw_writel(paddr.High, &(pSendBd->HostAddr.High)); - pShadowSendBd->HostAddr.High = paddr.High; - } - __raw_writel(paddr.Low, &(pSendBd->HostAddr.Low)); + pShadowSendBd = &pDevice->ShadowSendBd[Idx]; + for(FragCount = 0; ; ) + { + MM_MapTxDma(pDevice, pPacket, &paddr, &Len, FragCount); + /* Initialize the pointer to the send buffer fragment. */ + if (paddr.High != pShadowSendBd->HostAddr.High) + { + __raw_writel(paddr.High, &(pSendBd->HostAddr.High)); + pShadowSendBd->HostAddr.High = paddr.High; + } + __raw_writel(paddr.Low, &(pSendBd->HostAddr.Low)); - /* Setup the control flags and send buffer size. */ - Value32 = (Len << 16) | pPacket->Flags; + /* Setup the control flags and send buffer size. */ + Value32 = (Len << 16) | pPacket->Flags; - Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; + Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - FragCount++; - if (FragCount >= pPacket->u.Tx.FragCount) - { - Value32 |= SND_BD_FLAG_END; - if (Value32 != pShadowSendBd->u1.Len_Flags) - { - __raw_writel(Value32, &(pSendBd->u1.Len_Flags)); - pShadowSendBd->u1.Len_Flags = Value32; - } - if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) { - __raw_writel(pPacket->VlanTag, &(pSendBd->u2.VlanTag)); - } - break; - } - else - { - if (Value32 != pShadowSendBd->u1.Len_Flags) - { - __raw_writel(Value32, &(pSendBd->u1.Len_Flags)); - pShadowSendBd->u1.Len_Flags = Value32; - } - if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) { - __raw_writel(pPacket->VlanTag, &(pSendBd->u2.VlanTag)); - } - } + FragCount++; + if (FragCount >= pPacket->u.Tx.FragCount) + { + Value32 |= SND_BD_FLAG_END; + if (Value32 != pShadowSendBd->u1.Len_Flags) + { + __raw_writel(Value32, &(pSendBd->u1.Len_Flags)); + pShadowSendBd->u1.Len_Flags = Value32; + } + if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) { + __raw_writel(pPacket->VlanTag, &(pSendBd->u2.VlanTag)); + } + break; + } + else + { + if (Value32 != pShadowSendBd->u1.Len_Flags) + { + __raw_writel(Value32, &(pSendBd->u1.Len_Flags)); + pShadowSendBd->u1.Len_Flags = Value32; + } + if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) { + __raw_writel(pPacket->VlanTag, &(pSendBd->u2.VlanTag)); + } + } - pSendBd++; - pShadowSendBd++; - if (Idx == 0) - { - pSendBd = &pDevice->pSendBdVirt[0]; - pShadowSendBd = &pDevice->ShadowSendBd[0]; - } - } /* for */ + pSendBd++; + pShadowSendBd++; + if (Idx == 0) + { + pSendBd = &pDevice->pSendBdVirt[0]; + pShadowSendBd = &pDevice->ShadowSendBd[0]; + } + } /* for */ - /* Put the packet descriptor in the ActiveQ. */ - QQ_PushTail(&pDevice->TxPacketActiveQ.Container, pPacket); + /* Put the packet descriptor in the ActiveQ. */ + QQ_PushTail(&pDevice->TxPacketActiveQ.Container, pPacket); - wmb(); - MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, Idx); + wmb(); + MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, Idx); } else { - for(FragCount = 0; ; ) - { - /* Initialize the pointer to the send buffer fragment. */ - MM_MapTxDma(pDevice, pPacket, &pSendBd->HostAddr, &Len, FragCount); + for(FragCount = 0; ; ) + { + /* Initialize the pointer to the send buffer fragment. */ + MM_MapTxDma(pDevice, pPacket, &pSendBd->HostAddr, &Len, FragCount); - pSendBd->u2.VlanTag = pPacket->VlanTag; + pSendBd->u2.VlanTag = pPacket->VlanTag; - /* Setup the control flags and send buffer size. */ - Value32 = (Len << 16) | pPacket->Flags; + /* Setup the control flags and send buffer size. */ + Value32 = (Len << 16) | pPacket->Flags; - Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; + Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - FragCount++; - if (FragCount >= pPacket->u.Tx.FragCount) - { - pSendBd->u1.Len_Flags = Value32 | SND_BD_FLAG_END; - break; - } - else - { - pSendBd->u1.Len_Flags = Value32; - } - pSendBd++; - if (Idx == 0) - { - pSendBd = &pDevice->pSendBdVirt[0]; - } - } /* for */ + FragCount++; + if (FragCount >= pPacket->u.Tx.FragCount) + { + pSendBd->u1.Len_Flags = Value32 | SND_BD_FLAG_END; + break; + } + else + { + pSendBd->u1.Len_Flags = Value32; + } + pSendBd++; + if (Idx == 0) + { + pSendBd = &pDevice->pSendBdVirt[0]; + } + } /* for */ - /* Put the packet descriptor in the ActiveQ. */ - QQ_PushTail(&pDevice->TxPacketActiveQ.Container, pPacket); + /* Put the packet descriptor in the ActiveQ. */ + QQ_PushTail(&pDevice->TxPacketActiveQ.Container, pPacket); - wmb(); - MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, Idx); + wmb(); + MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, Idx); } @@ -3176,121 +3168,121 @@ while (1) { - /* Initalize the send buffer descriptors. */ - StartIdx = Idx = pDevice->SendProdIdx; + /* Initalize the send buffer descriptors. */ + StartIdx = Idx = pDevice->SendProdIdx; - if (pDevice->NicSendBd) - { - pTmpSendBd = pSendBd = &NicSendBdArr[0]; - } - else - { - pTmpSendBd = pSendBd = &pDevice->pSendBdVirt[Idx]; - } + if (pDevice->NicSendBd) + { + pTmpSendBd = pSendBd = &NicSendBdArr[0]; + } + else + { + pTmpSendBd = pSendBd = &pDevice->pSendBdVirt[Idx]; + } - /* Next producer index. */ - for(FragCount = 0; ; ) - { - LM_UINT32 Value32, Len; + /* Next producer index. */ + for(FragCount = 0; ; ) + { + LM_UINT32 Value32, Len; - /* Initialize the pointer to the send buffer fragment. */ - MM_MapTxDma(pDevice, pPacket, &pSendBd->HostAddr, &Len, FragCount); + /* Initialize the pointer to the send buffer fragment. */ + MM_MapTxDma(pDevice, pPacket, &pSendBd->HostAddr, &Len, FragCount); - pSendBd->u2.VlanTag = pPacket->VlanTag; + pSendBd->u2.VlanTag = pPacket->VlanTag; - /* Setup the control flags and send buffer size. */ - Value32 = (Len << 16) | pPacket->Flags; + /* Setup the control flags and send buffer size. */ + Value32 = (Len << 16) | pPacket->Flags; - Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; + Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - FragCount++; - if (FragCount >= pPacket->u.Tx.FragCount) - { - pSendBd->u1.Len_Flags = Value32 | SND_BD_FLAG_END; - break; - } - else - { - pSendBd->u1.Len_Flags = Value32; - } - pSendBd++; - if ((Idx == 0) && !pDevice->NicSendBd) - { - pSendBd = &pDevice->pSendBdVirt[0]; - } - } /* for */ - if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) - { - if (LM_Test4GBoundary(pDevice, pPacket, pTmpSendBd) == - LM_STATUS_SUCCESS) - { - if (MM_CoalesceTxBuffer(pDevice, pPacket) != LM_STATUS_SUCCESS) - { - QQ_PushHead(&pDevice->TxPacketFreeQ.Container, pPacket); - return LM_STATUS_FAILURE; - } - continue; - } - } - break; + FragCount++; + if (FragCount >= pPacket->u.Tx.FragCount) + { + pSendBd->u1.Len_Flags = Value32 | SND_BD_FLAG_END; + break; + } + else + { + pSendBd->u1.Len_Flags = Value32; + } + pSendBd++; + if ((Idx == 0) && !pDevice->NicSendBd) + { + pSendBd = &pDevice->pSendBdVirt[0]; + } + } /* for */ + if (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) + { + if (LM_Test4GBoundary(pDevice, pPacket, pTmpSendBd) == + LM_STATUS_SUCCESS) + { + if (MM_CoalesceTxBuffer(pDevice, pPacket) != LM_STATUS_SUCCESS) + { + QQ_PushHead(&pDevice->TxPacketFreeQ.Container, pPacket); + return LM_STATUS_FAILURE; + } + continue; + } + } + break; } /* Put the packet descriptor in the ActiveQ. */ QQ_PushTail(&pDevice->TxPacketActiveQ.Container, pPacket); if (pDevice->NicSendBd) { - pSendBd = &pDevice->pSendBdVirt[StartIdx]; - pShadowSendBd = &pDevice->ShadowSendBd[StartIdx]; + pSendBd = &pDevice->pSendBdVirt[StartIdx]; + pShadowSendBd = &pDevice->ShadowSendBd[StartIdx]; - while (StartIdx != Idx) - { - LM_UINT32 Value32; + while (StartIdx != Idx) + { + LM_UINT32 Value32; - if ((Value32 = pTmpSendBd->HostAddr.High) != - pShadowSendBd->HostAddr.High) - { - __raw_writel(Value32, &(pSendBd->HostAddr.High)); - pShadowSendBd->HostAddr.High = Value32; - } + if ((Value32 = pTmpSendBd->HostAddr.High) != + pShadowSendBd->HostAddr.High) + { + __raw_writel(Value32, &(pSendBd->HostAddr.High)); + pShadowSendBd->HostAddr.High = Value32; + } - __raw_writel(pTmpSendBd->HostAddr.Low, &(pSendBd->HostAddr.Low)); + __raw_writel(pTmpSendBd->HostAddr.Low, &(pSendBd->HostAddr.Low)); - if ((Value32 = pTmpSendBd->u1.Len_Flags) != - pShadowSendBd->u1.Len_Flags) - { - __raw_writel(Value32, &(pSendBd->u1.Len_Flags)); - pShadowSendBd->u1.Len_Flags = Value32; - } + if ((Value32 = pTmpSendBd->u1.Len_Flags) != + pShadowSendBd->u1.Len_Flags) + { + __raw_writel(Value32, &(pSendBd->u1.Len_Flags)); + pShadowSendBd->u1.Len_Flags = Value32; + } - if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) - { - __raw_writel(pTmpSendBd->u2.VlanTag, &(pSendBd->u2.VlanTag)); - } + if (pPacket->Flags & SND_BD_FLAG_VLAN_TAG) + { + __raw_writel(pTmpSendBd->u2.VlanTag, &(pSendBd->u2.VlanTag)); + } - StartIdx = (StartIdx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - if (StartIdx == 0) - pSendBd = &pDevice->pSendBdVirt[0]; - else - pSendBd++; - pTmpSendBd++; - } - wmb(); - MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, Idx); + StartIdx = (StartIdx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; + if (StartIdx == 0) + pSendBd = &pDevice->pSendBdVirt[0]; + else + pSendBd++; + pTmpSendBd++; + } + wmb(); + MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, Idx); - if(T3_CHIP_REV(pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) - { - MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, Idx); - } + if(T3_CHIP_REV(pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) + { + MB_REG_WR(pDevice, Mailbox.SendNicProdIdx[0].Low, Idx); + } } else { - wmb(); - MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, Idx); + wmb(); + MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, Idx); - if(T3_CHIP_REV(pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) - { - MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, Idx); - } + if(T3_CHIP_REV(pDevice->ChipRevId) == T3_CHIP_REV_5700_BX) + { + MB_REG_WR(pDevice, Mailbox.SendHostProdIdx[0].Low, Idx); + } } /* Update the SendBdLeft count. */ @@ -3312,27 +3304,27 @@ Idx = pDevice->SendProdIdx; for(FragCount = 0; ; ) { - Len = pSendBd->u1.Len_Flags >> 16; - if (((Base = pSendBd->HostAddr.Low) > 0xffffdcc0) && - (pSendBd->HostAddr.High == 0) && - ((Base + 8 + Len) < Base)) - { - return LM_STATUS_SUCCESS; - } - FragCount++; - if (FragCount >= pPacket->u.Tx.FragCount) - { - break; - } - pSendBd++; - if (!pDevice->NicSendBd) - { - Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; - if (Idx == 0) - { - pSendBd = &pDevice->pSendBdVirt[0]; - } - } + Len = pSendBd->u1.Len_Flags >> 16; + if (((Base = pSendBd->HostAddr.Low) > 0xffffdcc0) && + (pSendBd->HostAddr.High == 0) && + ((Base + 8 + Len) < Base)) + { + return LM_STATUS_SUCCESS; + } + FragCount++; + if (FragCount >= pPacket->u.Tx.FragCount) + { + break; + } + pSendBd++; + if (!pDevice->NicSendBd) + { + Idx = (Idx + 1) & T3_SEND_RCB_ENTRY_COUNT_MASK; + if (Idx == 0) + { + pSendBd = &pDevice->pSendBdVirt[0]; + } + } } return LM_STATUS_FAILURE; } @@ -3354,26 +3346,25 @@ for(j = 0; j < BufferSize; j++) { - Reg ^= pBuffer[j]; + Reg ^= pBuffer[j]; - for(k = 0; k < 8; k++) - { - Tmp = Reg & 0x01; + for(k = 0; k < 8; k++) + { + Tmp = Reg & 0x01; - Reg >>= 1; + Reg >>= 1; - if(Tmp) - { - Reg ^= 0xedb88320; - } - } + if(Tmp) + { + Reg ^= 0xedb88320; + } + } } return ~Reg; } /* ComputeCrc32 */ - /******************************************************************************/ /* Description: */ /* This routine sets the receive control register according to ReceiveMask */ @@ -3395,42 +3386,42 @@ if(Mask & LM_ACCEPT_UNICAST) { - Mask &= ~LM_ACCEPT_UNICAST; + Mask &= ~LM_ACCEPT_UNICAST; } if(Mask & LM_ACCEPT_MULTICAST) { - Mask &= ~LM_ACCEPT_MULTICAST; + Mask &= ~LM_ACCEPT_MULTICAST; } if(Mask & LM_ACCEPT_ALL_MULTICAST) { - Mask &= ~LM_ACCEPT_ALL_MULTICAST; + Mask &= ~LM_ACCEPT_ALL_MULTICAST; } if(Mask & LM_ACCEPT_BROADCAST) { - Mask &= ~LM_ACCEPT_BROADCAST; + Mask &= ~LM_ACCEPT_BROADCAST; } RxMode &= ~RX_MODE_PROMISCUOUS_MODE; if(Mask & LM_PROMISCUOUS_MODE) { - RxMode |= RX_MODE_PROMISCUOUS_MODE; - Mask &= ~LM_PROMISCUOUS_MODE; + RxMode |= RX_MODE_PROMISCUOUS_MODE; + Mask &= ~LM_PROMISCUOUS_MODE; } RxMode &= ~(RX_MODE_ACCEPT_RUNTS | RX_MODE_ACCEPT_OVERSIZED); if(Mask & LM_ACCEPT_ERROR_PACKET) { - RxMode |= RX_MODE_ACCEPT_RUNTS | RX_MODE_ACCEPT_OVERSIZED; - Mask &= ~LM_ACCEPT_ERROR_PACKET; + RxMode |= RX_MODE_ACCEPT_RUNTS | RX_MODE_ACCEPT_OVERSIZED; + Mask &= ~LM_ACCEPT_ERROR_PACKET; } /* Make sure all the bits are valid before committing changes. */ if(Mask) { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } /* Commit the new filter. */ @@ -3442,90 +3433,89 @@ /* Set up the MC hash table. */ if(ReceiveMask & LM_ACCEPT_ALL_MULTICAST) { - for(k = 0; k < 4; k++) - { - REG_WR(pDevice, MacCtrl.HashReg[k], 0xffffffff); - } + for(k = 0; k < 4; k++) + { + REG_WR(pDevice, MacCtrl.HashReg[k], 0xffffffff); + } } else if(ReceiveMask & LM_ACCEPT_MULTICAST) { - LM_UINT32 HashReg[4]; + LM_UINT32 HashReg[4]; - HashReg[0] = 0; HashReg[1] = 0; HashReg[2] = 0; HashReg[3] = 0; - for(j = 0; j < pDevice->McEntryCount; j++) - { - LM_UINT32 RegIndex; - LM_UINT32 Bitpos; - LM_UINT32 Crc32; + HashReg[0] = 0; HashReg[1] = 0; HashReg[2] = 0; HashReg[3] = 0; + for(j = 0; j < pDevice->McEntryCount; j++) + { + LM_UINT32 RegIndex; + LM_UINT32 Bitpos; + LM_UINT32 Crc32; - Crc32 = ComputeCrc32(pDevice->McTable[j], ETHERNET_ADDRESS_SIZE); + Crc32 = ComputeCrc32(pDevice->McTable[j], ETHERNET_ADDRESS_SIZE); - /* The most significant 7 bits of the CRC32 (no inversion), */ - /* are used to index into one of the possible 128 bit positions. */ - Bitpos = ~Crc32 & 0x7f; + /* The most significant 7 bits of the CRC32 (no inversion), */ + /* are used to index into one of the possible 128 bit positions. */ + Bitpos = ~Crc32 & 0x7f; - /* Hash register index. */ - RegIndex = (Bitpos & 0x60) >> 5; + /* Hash register index. */ + RegIndex = (Bitpos & 0x60) >> 5; - /* Bit to turn on within a hash register. */ - Bitpos &= 0x1f; + /* Bit to turn on within a hash register. */ + Bitpos &= 0x1f; - /* Enable the multicast bit. */ - HashReg[RegIndex] |= (1 << Bitpos); - } + /* Enable the multicast bit. */ + HashReg[RegIndex] |= (1 << Bitpos); + } - /* REV_AX has problem with multicast filtering where it uses both */ - /* DA and SA to perform hashing. */ - for(k = 0; k < 4; k++) - { - REG_WR(pDevice, MacCtrl.HashReg[k], HashReg[k]); - } + /* REV_AX has problem with multicast filtering where it uses both */ + /* DA and SA to perform hashing. */ + for(k = 0; k < 4; k++) + { + REG_WR(pDevice, MacCtrl.HashReg[k], HashReg[k]); + } } else { - /* Reject all multicast frames. */ - for(j = 0; j < 4; j++) - { - REG_WR(pDevice, MacCtrl.HashReg[j], 0); - } + /* Reject all multicast frames. */ + for(j = 0; j < 4; j++) + { + REG_WR(pDevice, MacCtrl.HashReg[j], 0); + } } /* By default, Tigon3 will accept broadcast frames. We need to setup */ if(ReceiveMask & LM_ACCEPT_BROADCAST) { - REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule, - REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK); - REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value, - REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK); - REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule, - REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK); - REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value, - REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK); + REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule, + REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK); + REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value, + REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK); + REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule, + REJECT_BROADCAST_RULE1_RULE & RCV_DISABLE_RULE_MASK); + REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value, + REJECT_BROADCAST_RULE1_VALUE & RCV_DISABLE_RULE_MASK); } else { - REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule, - REJECT_BROADCAST_RULE1_RULE); - REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value, - REJECT_BROADCAST_RULE1_VALUE); - REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule, - REJECT_BROADCAST_RULE2_RULE); - REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value, - REJECT_BROADCAST_RULE2_VALUE); + REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Rule, + REJECT_BROADCAST_RULE1_RULE); + REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE1_REJECT_BROADCAST_IDX].Value, + REJECT_BROADCAST_RULE1_VALUE); + REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Rule, + REJECT_BROADCAST_RULE2_RULE); + REG_WR(pDevice, MacCtrl.RcvRules[RCV_RULE2_REJECT_BROADCAST_IDX].Value, + REJECT_BROADCAST_RULE2_VALUE); } /* disable the rest of the rules. */ for(j = RCV_LAST_RULE_IDX; j < 16; j++) { - REG_WR(pDevice, MacCtrl.RcvRules[j].Rule, 0); - REG_WR(pDevice, MacCtrl.RcvRules[j].Value, 0); + REG_WR(pDevice, MacCtrl.RcvRules[j].Rule, 0); + REG_WR(pDevice, MacCtrl.RcvRules[j].Value, 0); } return LM_STATUS_SUCCESS; } /* LM_SetReceiveMask */ - /******************************************************************************/ /* Description: */ /* Disable the interrupt and put the transmitter and receiver engines in */ @@ -3584,15 +3574,15 @@ while(pPacket) { - pPacket->PacketStatus = LM_STATUS_TRANSMIT_ABORTED; - pDevice->TxCounters.TxPacketAbortedCnt++; + pPacket->PacketStatus = LM_STATUS_TRANSMIT_ABORTED; + pDevice->TxCounters.TxPacketAbortedCnt++; - atomic_add(pPacket->u.Tx.FragCount, &pDevice->SendBdLeft); + atomic_add(pPacket->u.Tx.FragCount, &pDevice->SendBdLeft); - QQ_PushTail(&pDevice->TxPacketXmittedQ.Container, pPacket); + QQ_PushTail(&pDevice->TxPacketXmittedQ.Container, pPacket); - pPacket = (PLM_PACKET) - QQ_PopHead(&pDevice->TxPacketActiveQ.Container); + pPacket = (PLM_PACKET) + QQ_PopHead(&pDevice->TxPacketActiveQ.Container); } /* Cleanup the receive return rings. */ @@ -3602,38 +3592,38 @@ /* Doing so may cause system crash. */ if(!pDevice->ShuttingDown) { - /* Indicate packets to the protocol. */ - MM_IndicateTxPackets(pDevice); + /* Indicate packets to the protocol. */ + MM_IndicateTxPackets(pDevice); - /* Indicate received packets to the protocols. */ - MM_IndicateRxPackets(pDevice); + /* Indicate received packets to the protocols. */ + MM_IndicateRxPackets(pDevice); } else { - /* Move the receive packet descriptors in the ReceivedQ to the */ - /* free queue. */ - for(; ;) - { - pPacket = (PLM_PACKET) QQ_PopHead( - &pDevice->RxPacketReceivedQ.Container); - if(pPacket == NULL) - { - break; - } - QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); - } + /* Move the receive packet descriptors in the ReceivedQ to the */ + /* free queue. */ + for(; ;) + { + pPacket = (PLM_PACKET) QQ_PopHead( + &pDevice->RxPacketReceivedQ.Container); + if(pPacket == NULL) + { + break; + } + QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); + } } /* Clean up the Std Receive Producer ring. */ Idx = pDevice->pStatusBlkVirt->RcvStdConIdx; while(Idx != pDevice->RxStdProdIdx) { - pPacket = (PLM_PACKET) (MM_UINT_PTR(pDevice->pPacketDescBase) + - MM_UINT_PTR(pDevice->pRxStdBdVirt[Idx].Opaque)); + pPacket = (PLM_PACKET) (MM_UINT_PTR(pDevice->pPacketDescBase) + + MM_UINT_PTR(pDevice->pRxStdBdVirt[Idx].Opaque)); - QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); + QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); - Idx = (Idx + 1) & T3_STD_RCV_RCB_ENTRY_COUNT_MASK; + Idx = (Idx + 1) & T3_STD_RCV_RCB_ENTRY_COUNT_MASK; } /* while */ /* Reinitialize our copy of the indices. */ @@ -3644,12 +3634,12 @@ Idx = pDevice->pStatusBlkVirt->RcvJumboConIdx; while(Idx != pDevice->RxJumboProdIdx) { - pPacket = (PLM_PACKET) (MM_UINT_PTR(pDevice->pPacketDescBase) + - MM_UINT_PTR(pDevice->pRxJumboBdVirt[Idx].Opaque)); + pPacket = (PLM_PACKET) (MM_UINT_PTR(pDevice->pPacketDescBase) + + MM_UINT_PTR(pDevice->pRxJumboBdVirt[Idx].Opaque)); - QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); + QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); - Idx = (Idx + 1) & T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK; + Idx = (Idx + 1) & T3_JUMBO_RCV_RCB_ENTRY_COUNT_MASK; } /* while */ /* Reinitialize our copy of the indices. */ @@ -3668,7 +3658,6 @@ } /* LM_Abort */ - /******************************************************************************/ /* Description: */ /* Disable the interrupt and put the transmitter and receiver engines in */ @@ -3692,22 +3681,22 @@ /* Make sure all the packets have been accounted for. */ for(EntryCnt = 0; EntryCnt < pDevice->RxPacketDescCnt; EntryCnt++) { - pPacket = (PLM_PACKET) QQ_PopHead(&pDevice->RxPacketFreeQ.Container); - if (pPacket == 0) - break; + pPacket = (PLM_PACKET) QQ_PopHead(&pDevice->RxPacketFreeQ.Container); + if (pPacket == 0) + break; - MM_FreeRxBuffer(pDevice, pPacket); + MM_FreeRxBuffer(pDevice, pPacket); - QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); + QQ_PushTail(&pDevice->RxPacketFreeQ.Container, pPacket); } LM_ResetChip(pDevice); /* Restore PCI configuration registers. */ MM_WriteConfig32(pDevice, PCI_CACHE_LINE_SIZE_REG, - pDevice->SavedCacheLineReg); + pDevice->SavedCacheLineReg); LM_RegWrInd(pDevice, PCI_SUBSYSTEM_VENDOR_ID_REG, - (pDevice->SubsystemId << 16) | pDevice->SubsystemVendorId); + (pDevice->SubsystemId << 16) | pDevice->SubsystemVendorId); /* Reprogram the MAC address. */ LM_SetMacAddress(pDevice, pDevice->NodeAddress); @@ -3725,20 +3714,20 @@ /* Wait for access to the nvram interface before resetting. This is */ /* a workaround to prevent EEPROM corruption. */ if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5700 && - T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5701) + T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5701) { - /* Request access to the flash interface. */ - REG_WR(pDevice, Nvram.SwArb, SW_ARB_REQ_SET1); + /* Request access to the flash interface. */ + REG_WR(pDevice, Nvram.SwArb, SW_ARB_REQ_SET1); - for(j = 0; j < 100000; j++) - { - Value32 = REG_RD(pDevice, Nvram.SwArb); - if(Value32 & SW_ARB_GNT1) - { - break; - } - MM_Wait(10); - } + for(j = 0; j < 100000; j++) + { + Value32 = REG_RD(pDevice, Nvram.SwArb); + if(Value32 & SW_ARB_GNT1) + { + break; + } + MM_Wait(10); + } } /* Global reset. */ @@ -3747,22 +3736,22 @@ /* make sure we re-enable indirect accesses */ MM_WriteConfig32(pDevice, T3_PCI_MISC_HOST_CTRL_REG, - pDevice->MiscHostCtrl); + pDevice->MiscHostCtrl); /* Set MAX PCI retry to zero. */ Value32 = T3_PCI_STATE_PCI_ROM_ENABLE | T3_PCI_STATE_PCI_ROM_RETRY_ENABLE; if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) { - if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) - { - Value32 |= T3_PCI_STATE_RETRY_SAME_DMA; - } + if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) + { + Value32 |= T3_PCI_STATE_RETRY_SAME_DMA; + } } MM_WriteConfig32(pDevice, T3_PCI_STATE_REG, Value32); /* Restore PCI command register. */ MM_WriteConfig32(pDevice, PCI_COMMAND_REG, - pDevice->PciCommandStatusWords); + pDevice->PciCommandStatusWords); /* Disable PCI-X relaxed ordering bit. */ MM_ReadConfig32(pDevice, PCIX_CAP_REG, &Value32); @@ -3773,15 +3762,15 @@ REG_WR(pDevice, MemArbiter.Mode, T3_MEM_ARBITER_MODE_ENABLE); #ifdef BIG_ENDIAN_PCI /* This from jfd */ - Value32 = GRC_MODE_WORD_SWAP_DATA| - GRC_MODE_WORD_SWAP_NON_FRAME_DATA; + Value32 = GRC_MODE_WORD_SWAP_DATA| + GRC_MODE_WORD_SWAP_NON_FRAME_DATA; #else #ifdef BIG_ENDIAN_HOST /* Reconfigure the mode register. */ Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | - GRC_MODE_WORD_SWAP_NON_FRAME_DATA | - GRC_MODE_BYTE_SWAP_DATA | - GRC_MODE_WORD_SWAP_DATA; + GRC_MODE_WORD_SWAP_NON_FRAME_DATA | + GRC_MODE_BYTE_SWAP_DATA | + GRC_MODE_WORD_SWAP_DATA; #else /* Reconfigure the mode register. */ Value32 = GRC_MODE_BYTE_SWAP_NON_FRAME_DATA | GRC_MODE_BYTE_SWAP_DATA; @@ -3793,23 +3782,23 @@ MEM_WR_OFFSET(pDevice, 0x0b50, T3_MAGIC_NUM); if(pDevice->EnableTbi) { - pDevice->MacMode = MAC_MODE_PORT_MODE_TBI; - REG_WR(pDevice, MacCtrl.Mode, MAC_MODE_PORT_MODE_TBI); + pDevice->MacMode = MAC_MODE_PORT_MODE_TBI; + REG_WR(pDevice, MacCtrl.Mode, MAC_MODE_PORT_MODE_TBI); } else { - REG_WR(pDevice, MacCtrl.Mode, 0); + REG_WR(pDevice, MacCtrl.Mode, 0); } /* Wait for the firmware to finish initialization. */ for(j = 0; j < 100000; j++) { - MM_Wait(10); + MM_Wait(10); - Value32 = MEM_RD_OFFSET(pDevice, 0x0b50); - if(Value32 == ~T3_MAGIC_NUM) - { - break; - } + Value32 = MEM_RD_OFFSET(pDevice, 0x0b50); + if(Value32 == ~T3_MAGIC_NUM) + { + break; + } } return LM_STATUS_SUCCESS; } @@ -3837,25 +3826,25 @@ /* descriptors that are between SwConIdx and HwConIdx. */ while(SwConIdx != HwConIdx) { - /* Get the packet that was sent from the TxPacketActiveQ. */ - pPacket = (PLM_PACKET) QQ_PopHead( - &pDevice->TxPacketActiveQ.Container); + /* Get the packet that was sent from the TxPacketActiveQ. */ + pPacket = (PLM_PACKET) QQ_PopHead( + &pDevice->TxPacketActiveQ.Container); - /* Set the return status. */ - pPacket->PacketStatus = LM_STATUS_SUCCESS; + /* Set the return status. */ + pPacket->PacketStatus = LM_STATUS_SUCCESS; - /* Put the packet in the TxPacketXmittedQ for indication later. */ - QQ_PushTail(&pDevice->TxPacketXmittedQ.Container, pPacket); + /* Put the packet in the TxPacketXmittedQ for indication later. */ + QQ_PushTail(&pDevice->TxPacketXmittedQ.Container, pPacket); - /* Move to the next packet's BD. */ - SwConIdx = (SwConIdx + pPacket->u.Tx.FragCount) & - T3_SEND_RCB_ENTRY_COUNT_MASK; + /* Move to the next packet's BD. */ + SwConIdx = (SwConIdx + pPacket->u.Tx.FragCount) & + T3_SEND_RCB_ENTRY_COUNT_MASK; - /* Update the number of unused BDs. */ - atomic_add(pPacket->u.Tx.FragCount, &pDevice->SendBdLeft); + /* Update the number of unused BDs. */ + atomic_add(pPacket->u.Tx.FragCount, &pDevice->SendBdLeft); - /* Get the new updated HwConIdx. */ - HwConIdx = pDevice->pStatusBlkVirt->Idx[0].SendConIdx; + /* Get the new updated HwConIdx. */ + HwConIdx = pDevice->pStatusBlkVirt->Idx[0].SendConIdx; } /* while */ /* Save the new SwConIdx. */ @@ -3864,7 +3853,6 @@ } /* LM_ServiceTxInterrupt */ - /******************************************************************************/ /* Description: */ /* */ @@ -3884,89 +3872,89 @@ SwRcvRetConIdx = pDevice->RcvRetConIdx; while(SwRcvRetConIdx != HwRcvRetProdIdx) { - pRcvBd = &pDevice->pRcvRetBdVirt[SwRcvRetConIdx]; + pRcvBd = &pDevice->pRcvRetBdVirt[SwRcvRetConIdx]; - /* Get the received packet descriptor. */ - pPacket = (PLM_PACKET) (MM_UINT_PTR(pDevice->pPacketDescBase) + - MM_UINT_PTR(pRcvBd->Opaque)); + /* Get the received packet descriptor. */ + pPacket = (PLM_PACKET) (MM_UINT_PTR(pDevice->pPacketDescBase) + + MM_UINT_PTR(pRcvBd->Opaque)); - /* Check the error flag. */ - if(pRcvBd->ErrorFlag && - pRcvBd->ErrorFlag != RCV_BD_ERR_ODD_NIBBLED_RCVD_MII) - { - pPacket->PacketStatus = LM_STATUS_FAILURE; + /* Check the error flag. */ + if(pRcvBd->ErrorFlag && + pRcvBd->ErrorFlag != RCV_BD_ERR_ODD_NIBBLED_RCVD_MII) + { + pPacket->PacketStatus = LM_STATUS_FAILURE; - pDevice->RxCounters.RxPacketErrCnt++; + pDevice->RxCounters.RxPacketErrCnt++; - if(pRcvBd->ErrorFlag & RCV_BD_ERR_BAD_CRC) - { - pDevice->RxCounters.RxErrCrcCnt++; - } + if(pRcvBd->ErrorFlag & RCV_BD_ERR_BAD_CRC) + { + pDevice->RxCounters.RxErrCrcCnt++; + } - if(pRcvBd->ErrorFlag & RCV_BD_ERR_COLL_DETECT) - { - pDevice->RxCounters.RxErrCollCnt++; - } + if(pRcvBd->ErrorFlag & RCV_BD_ERR_COLL_DETECT) + { + pDevice->RxCounters.RxErrCollCnt++; + } - if(pRcvBd->ErrorFlag & RCV_BD_ERR_LINK_LOST_DURING_PKT) - { - pDevice->RxCounters.RxErrLinkLostCnt++; - } + if(pRcvBd->ErrorFlag & RCV_BD_ERR_LINK_LOST_DURING_PKT) + { + pDevice->RxCounters.RxErrLinkLostCnt++; + } - if(pRcvBd->ErrorFlag & RCV_BD_ERR_PHY_DECODE_ERR) - { - pDevice->RxCounters.RxErrPhyDecodeCnt++; - } + if(pRcvBd->ErrorFlag & RCV_BD_ERR_PHY_DECODE_ERR) + { + pDevice->RxCounters.RxErrPhyDecodeCnt++; + } - if(pRcvBd->ErrorFlag & RCV_BD_ERR_ODD_NIBBLED_RCVD_MII) - { - pDevice->RxCounters.RxErrOddNibbleCnt++; - } + if(pRcvBd->ErrorFlag & RCV_BD_ERR_ODD_NIBBLED_RCVD_MII) + { + pDevice->RxCounters.RxErrOddNibbleCnt++; + } - if(pRcvBd->ErrorFlag & RCV_BD_ERR_MAC_ABORT) - { - pDevice->RxCounters.RxErrMacAbortCnt++; - } + if(pRcvBd->ErrorFlag & RCV_BD_ERR_MAC_ABORT) + { + pDevice->RxCounters.RxErrMacAbortCnt++; + } - if(pRcvBd->ErrorFlag & RCV_BD_ERR_LEN_LT_64) - { - pDevice->RxCounters.RxErrShortPacketCnt++; - } + if(pRcvBd->ErrorFlag & RCV_BD_ERR_LEN_LT_64) + { + pDevice->RxCounters.RxErrShortPacketCnt++; + } - if(pRcvBd->ErrorFlag & RCV_BD_ERR_TRUNC_NO_RESOURCES) - { - pDevice->RxCounters.RxErrNoResourceCnt++; - } + if(pRcvBd->ErrorFlag & RCV_BD_ERR_TRUNC_NO_RESOURCES) + { + pDevice->RxCounters.RxErrNoResourceCnt++; + } - if(pRcvBd->ErrorFlag & RCV_BD_ERR_GIANT_FRAME_RCVD) - { - pDevice->RxCounters.RxErrLargePacketCnt++; - } - } - else - { - pPacket->PacketStatus = LM_STATUS_SUCCESS; - pPacket->PacketSize = pRcvBd->Len - 4; + if(pRcvBd->ErrorFlag & RCV_BD_ERR_GIANT_FRAME_RCVD) + { + pDevice->RxCounters.RxErrLargePacketCnt++; + } + } + else + { + pPacket->PacketStatus = LM_STATUS_SUCCESS; + pPacket->PacketSize = pRcvBd->Len - 4; - pPacket->Flags = pRcvBd->Flags; - if(pRcvBd->Flags & RCV_BD_FLAG_VLAN_TAG) - { - pPacket->VlanTag = pRcvBd->VlanTag; - } + pPacket->Flags = pRcvBd->Flags; + if(pRcvBd->Flags & RCV_BD_FLAG_VLAN_TAG) + { + pPacket->VlanTag = pRcvBd->VlanTag; + } - pPacket->u.Rx.TcpUdpChecksum = pRcvBd->TcpUdpCksum; - } + pPacket->u.Rx.TcpUdpChecksum = pRcvBd->TcpUdpCksum; + } - /* Put the packet descriptor containing the received packet */ - /* buffer in the RxPacketReceivedQ for indication later. */ - QQ_PushTail(&pDevice->RxPacketReceivedQ.Container, pPacket); + /* Put the packet descriptor containing the received packet */ + /* buffer in the RxPacketReceivedQ for indication later. */ + QQ_PushTail(&pDevice->RxPacketReceivedQ.Container, pPacket); - /* Go to the next buffer descriptor. */ - SwRcvRetConIdx = (SwRcvRetConIdx + 1) & - T3_RCV_RETURN_RCB_ENTRY_COUNT_MASK; + /* Go to the next buffer descriptor. */ + SwRcvRetConIdx = (SwRcvRetConIdx + 1) & + T3_RCV_RETURN_RCB_ENTRY_COUNT_MASK; - /* Get the updated HwRcvRetProdIdx. */ - HwRcvRetProdIdx = pDevice->pStatusBlkVirt->Idx[0].RcvProdIdx; + /* Get the updated HwRcvRetProdIdx. */ + HwRcvRetProdIdx = pDevice->pStatusBlkVirt->Idx[0].RcvProdIdx; } /* while */ pDevice->RcvRetConIdx = SwRcvRetConIdx; @@ -3976,7 +3964,6 @@ } /* LM_ServiceRxInterrupt */ - /******************************************************************************/ /* Description: */ /* This is the interrupt event handler routine. It acknowledges all */ @@ -3995,37 +3982,37 @@ /* Setup the phy chip whenever the link status changes. */ if(pDevice->LinkChngMode == T3_LINK_CHNG_MODE_USE_STATUS_REG) { - Value32 = REG_RD(pDevice, MacCtrl.Status); - if(pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) - { - if (Value32 & MAC_STATUS_MI_INTERRUPT) - { - ServicePhyInt = TRUE; - } - } - else if(Value32 & MAC_STATUS_LINK_STATE_CHANGED) - { - ServicePhyInt = TRUE; - } + Value32 = REG_RD(pDevice, MacCtrl.Status); + if(pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) + { + if (Value32 & MAC_STATUS_MI_INTERRUPT) + { + ServicePhyInt = TRUE; + } + } + else if(Value32 & MAC_STATUS_LINK_STATE_CHANGED) + { + ServicePhyInt = TRUE; + } } else { - if(pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_LINK_CHANGED_STATUS) - { - pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED | - (pDevice->pStatusBlkVirt->Status & ~STATUS_BLOCK_LINK_CHANGED_STATUS); - ServicePhyInt = TRUE; - } + if(pDevice->pStatusBlkVirt->Status & STATUS_BLOCK_LINK_CHANGED_STATUS) + { + pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED | + (pDevice->pStatusBlkVirt->Status & ~STATUS_BLOCK_LINK_CHANGED_STATUS); + ServicePhyInt = TRUE; + } } #if INCLUDE_TBI_SUPPORT if (pDevice->IgnoreTbiLinkChange == TRUE) { - ServicePhyInt = FALSE; + ServicePhyInt = FALSE; } #endif if (ServicePhyInt == TRUE) { - LM_SetupPhy(pDevice); + LM_SetupPhy(pDevice); } /* Service receive and transmit interrupts. */ @@ -4035,22 +4022,21 @@ /* No spinlock for this queue since this routine is serialized. */ if(!QQ_Empty(&pDevice->RxPacketReceivedQ.Container)) { - /* Indicate receive packets. */ - MM_IndicateRxPackets(pDevice); + /* Indicate receive packets. */ + MM_IndicateRxPackets(pDevice); /* LM_QueueRxPackets(pDevice); */ } /* No spinlock for this queue since this routine is serialized. */ if(!QQ_Empty(&pDevice->TxPacketXmittedQ.Container)) { - MM_IndicateTxPackets(pDevice); + MM_IndicateTxPackets(pDevice); } return LM_STATUS_SUCCESS; } /* LM_ServiceInterrupts */ - /******************************************************************************/ /* Description: */ /* */ @@ -4066,20 +4052,20 @@ pEntry = pDevice->McTable[0]; for(j = 0; j < pDevice->McEntryCount; j++) { - if(IS_ETH_ADDRESS_EQUAL(pEntry, pMcAddress)) - { - /* Found a match, increment the instance count. */ - pEntry[LM_MC_INSTANCE_COUNT_INDEX] += 1; + if(IS_ETH_ADDRESS_EQUAL(pEntry, pMcAddress)) + { + /* Found a match, increment the instance count. */ + pEntry[LM_MC_INSTANCE_COUNT_INDEX] += 1; - return LM_STATUS_SUCCESS; - } + return LM_STATUS_SUCCESS; + } - pEntry += LM_MC_ENTRY_SIZE; + pEntry += LM_MC_ENTRY_SIZE; } if(pDevice->McEntryCount >= LM_MAX_MC_TABLE_SIZE) { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } pEntry = pDevice->McTable[pDevice->McEntryCount]; @@ -4095,7 +4081,6 @@ } /* LM_MulticastAdd */ - /******************************************************************************/ /* Description: */ /* */ @@ -4111,43 +4096,42 @@ pEntry = pDevice->McTable[0]; for(j = 0; j < pDevice->McEntryCount; j++) { - if(IS_ETH_ADDRESS_EQUAL(pEntry, pMcAddress)) - { - /* Found a match, decrement the instance count. */ - pEntry[LM_MC_INSTANCE_COUNT_INDEX] -= 1; + if(IS_ETH_ADDRESS_EQUAL(pEntry, pMcAddress)) + { + /* Found a match, decrement the instance count. */ + pEntry[LM_MC_INSTANCE_COUNT_INDEX] -= 1; - /* No more instance left, remove the address from the table. */ - /* Move the last entry in the table to the delete slot. */ - if(pEntry[LM_MC_INSTANCE_COUNT_INDEX] == 0 && - pDevice->McEntryCount > 1) - { + /* No more instance left, remove the address from the table. */ + /* Move the last entry in the table to the delete slot. */ + if(pEntry[LM_MC_INSTANCE_COUNT_INDEX] == 0 && + pDevice->McEntryCount > 1) + { - COPY_ETH_ADDRESS( - pDevice->McTable[pDevice->McEntryCount-1], pEntry); - pEntry[LM_MC_INSTANCE_COUNT_INDEX] = - pDevice->McTable[pDevice->McEntryCount-1] - [LM_MC_INSTANCE_COUNT_INDEX]; - } - pDevice->McEntryCount--; + COPY_ETH_ADDRESS( + pDevice->McTable[pDevice->McEntryCount-1], pEntry); + pEntry[LM_MC_INSTANCE_COUNT_INDEX] = + pDevice->McTable[pDevice->McEntryCount-1] + [LM_MC_INSTANCE_COUNT_INDEX]; + } + pDevice->McEntryCount--; - /* Update the receive mask if the table is empty. */ - if(pDevice->McEntryCount == 0) - { - LM_SetReceiveMask(pDevice, - pDevice->ReceiveMask & ~LM_ACCEPT_MULTICAST); - } + /* Update the receive mask if the table is empty. */ + if(pDevice->McEntryCount == 0) + { + LM_SetReceiveMask(pDevice, + pDevice->ReceiveMask & ~LM_ACCEPT_MULTICAST); + } - return LM_STATUS_SUCCESS; - } + return LM_STATUS_SUCCESS; + } - pEntry += LM_MC_ENTRY_SIZE; + pEntry += LM_MC_ENTRY_SIZE; } return LM_STATUS_FAILURE; } /* LM_MulticastDel */ - /******************************************************************************/ /* Description: */ /* */ @@ -4164,7 +4148,6 @@ } /* LM_MulticastClear */ - /******************************************************************************/ /* Description: */ /* */ @@ -4179,11 +4162,11 @@ for(j = 0; j < 4; j++) { - REG_WR(pDevice, MacCtrl.MacAddr[j].High, - (pMacAddress[0] << 8) | pMacAddress[1]); - REG_WR(pDevice, MacCtrl.MacAddr[j].Low, - (pMacAddress[2] << 24) | (pMacAddress[3] << 16) | - (pMacAddress[4] << 8) | pMacAddress[5]); + REG_WR(pDevice, MacCtrl.MacAddr[j].High, + (pMacAddress[0] << 8) | pMacAddress[1]); + REG_WR(pDevice, MacCtrl.MacAddr[j].Low, + (pMacAddress[2] << 24) | (pMacAddress[3] << 16) | + (pMacAddress[4] << 8) | pMacAddress[5]); } return LM_STATUS_SUCCESS; @@ -4210,78 +4193,78 @@ /* determine media type */ switch(RequestedMediaType) { - case LM_REQUESTED_MEDIA_TYPE_BNC: - *pMediaType = LM_MEDIA_TYPE_BNC; - *pLineSpeed = LM_LINE_SPEED_10MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; + case LM_REQUESTED_MEDIA_TYPE_BNC: + *pMediaType = LM_MEDIA_TYPE_BNC; + *pLineSpeed = LM_LINE_SPEED_10MBPS; + *pDuplexMode = LM_DUPLEX_MODE_HALF; + break; - case LM_REQUESTED_MEDIA_TYPE_UTP_AUTO: - *pMediaType = LM_MEDIA_TYPE_UTP; - break; + case LM_REQUESTED_MEDIA_TYPE_UTP_AUTO: + *pMediaType = LM_MEDIA_TYPE_UTP; + break; - case LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_10MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; + case LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS: + *pMediaType = LM_MEDIA_TYPE_UTP; + *pLineSpeed = LM_LINE_SPEED_10MBPS; + *pDuplexMode = LM_DUPLEX_MODE_HALF; + break; - case LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_10MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; + case LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS_FULL_DUPLEX: + *pMediaType = LM_MEDIA_TYPE_UTP; + *pLineSpeed = LM_LINE_SPEED_10MBPS; + *pDuplexMode = LM_DUPLEX_MODE_FULL; + break; - case LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_100MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; + case LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS: + *pMediaType = LM_MEDIA_TYPE_UTP; + *pLineSpeed = LM_LINE_SPEED_100MBPS; + *pDuplexMode = LM_DUPLEX_MODE_HALF; + break; - case LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_100MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; + case LM_REQUESTED_MEDIA_TYPE_UTP_100MBPS_FULL_DUPLEX: + *pMediaType = LM_MEDIA_TYPE_UTP; + *pLineSpeed = LM_LINE_SPEED_100MBPS; + *pDuplexMode = LM_DUPLEX_MODE_FULL; + break; - case LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_1000MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; + case LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS: + *pMediaType = LM_MEDIA_TYPE_UTP; + *pLineSpeed = LM_LINE_SPEED_1000MBPS; + *pDuplexMode = LM_DUPLEX_MODE_HALF; + break; - case LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_UTP; - *pLineSpeed = LM_LINE_SPEED_1000MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; + case LM_REQUESTED_MEDIA_TYPE_UTP_1000MBPS_FULL_DUPLEX: + *pMediaType = LM_MEDIA_TYPE_UTP; + *pLineSpeed = LM_LINE_SPEED_1000MBPS; + *pDuplexMode = LM_DUPLEX_MODE_FULL; + break; - case LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS: - *pMediaType = LM_MEDIA_TYPE_FIBER; - *pLineSpeed = LM_LINE_SPEED_100MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; + case LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS: + *pMediaType = LM_MEDIA_TYPE_FIBER; + *pLineSpeed = LM_LINE_SPEED_100MBPS; + *pDuplexMode = LM_DUPLEX_MODE_HALF; + break; - case LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_FIBER; - *pLineSpeed = LM_LINE_SPEED_100MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; + case LM_REQUESTED_MEDIA_TYPE_FIBER_100MBPS_FULL_DUPLEX: + *pMediaType = LM_MEDIA_TYPE_FIBER; + *pLineSpeed = LM_LINE_SPEED_100MBPS; + *pDuplexMode = LM_DUPLEX_MODE_FULL; + break; - case LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS: - *pMediaType = LM_MEDIA_TYPE_FIBER; - *pLineSpeed = LM_LINE_SPEED_1000MBPS; - *pDuplexMode = LM_DUPLEX_MODE_HALF; - break; + case LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS: + *pMediaType = LM_MEDIA_TYPE_FIBER; + *pLineSpeed = LM_LINE_SPEED_1000MBPS; + *pDuplexMode = LM_DUPLEX_MODE_HALF; + break; - case LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX: - *pMediaType = LM_MEDIA_TYPE_FIBER; - *pLineSpeed = LM_LINE_SPEED_1000MBPS; - *pDuplexMode = LM_DUPLEX_MODE_FULL; - break; + case LM_REQUESTED_MEDIA_TYPE_FIBER_1000MBPS_FULL_DUPLEX: + *pMediaType = LM_MEDIA_TYPE_FIBER; + *pLineSpeed = LM_LINE_SPEED_1000MBPS; + *pDuplexMode = LM_DUPLEX_MODE_FULL; + break; - default: - break; + default: + break; } /* switch */ return LM_STATUS_SUCCESS; @@ -4309,92 +4292,92 @@ #endif if((pDevice->PhyId & PHY_ID_MASK) == PHY_BCM5401_PHY_ID) { - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - if(!pDevice->InitDone) - { - Value32 = 0; - } + if(!pDevice->InitDone) + { + Value32 = 0; + } - if(!(Value32 & PHY_STATUS_LINK_PASS)) - { - LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x0c20); + if(!(Value32 & PHY_STATUS_LINK_PASS)) + { + LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x0c20); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1804); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1804); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1204); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1204); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0132); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0132); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0232); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0232); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0a20); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0a20); - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - for(j = 0; j < 1000; j++) - { - MM_Wait(10); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + for(j = 0; j < 1000; j++) + { + MM_Wait(10); - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - if(Value32 & PHY_STATUS_LINK_PASS) - { - MM_Wait(40); - break; - } - } + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + if(Value32 & PHY_STATUS_LINK_PASS) + { + MM_Wait(40); + break; + } + } - if((pDevice->PhyId & PHY_ID_REV_MASK) == PHY_BCM5401_B0_REV) - { - if(!(Value32 & PHY_STATUS_LINK_PASS) && - (pDevice->OldLineSpeed == LM_LINE_SPEED_1000MBPS)) - { - LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_PHY_RESET); - for(j = 0; j < 100; j++) - { - MM_Wait(10); + if((pDevice->PhyId & PHY_ID_REV_MASK) == PHY_BCM5401_B0_REV) + { + if(!(Value32 & PHY_STATUS_LINK_PASS) && + (pDevice->OldLineSpeed == LM_LINE_SPEED_1000MBPS)) + { + LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_PHY_RESET); + for(j = 0; j < 100; j++) + { + MM_Wait(10); - LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); - if(!(Value32 & PHY_CTRL_PHY_RESET)) - { - MM_Wait(40); - break; - } - } + LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); + if(!(Value32 & PHY_CTRL_PHY_RESET)) + { + MM_Wait(40); + break; + } + } - LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x0c20); + LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x0c20); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1804); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0012); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1804); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1204); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x0013); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x1204); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0132); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0132); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0232); + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x8006); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0232); - LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f); - LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0a20); - } - } - } + LM_WritePhy(pDevice, BCM540X_DSP_ADDRESS_REG, 0x201f); + LM_WritePhy(pDevice, BCM540X_DSP_RW_PORT, 0x0a20); + } + } + } } else if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0) + pDevice->ChipRevId == T3_CHIP_ID_5701_B0) { - /* Bug: 5701 A0, B0 TX CRC workaround. */ - LM_WritePhy(pDevice, 0x15, 0x0a75); - LM_WritePhy(pDevice, 0x1c, 0x8c68); - LM_WritePhy(pDevice, 0x1c, 0x8d68); - LM_WritePhy(pDevice, 0x1c, 0x8c68); + /* Bug: 5701 A0, B0 TX CRC workaround. */ + LM_WritePhy(pDevice, 0x15, 0x0a75); + LM_WritePhy(pDevice, 0x1c, 0x8c68); + LM_WritePhy(pDevice, 0x1c, 0x8d68); + LM_WritePhy(pDevice, 0x1c, 0x8c68); } /* Acknowledge interrupts. */ @@ -4404,22 +4387,22 @@ /* Configure the interrupt mask. */ if(pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) { - LM_WritePhy(pDevice, BCM540X_INT_MASK_REG, ~BCM540X_INT_LINK_CHANGE); + LM_WritePhy(pDevice, BCM540X_INT_MASK_REG, ~BCM540X_INT_LINK_CHANGE); } /* Configure PHY led mode. */ if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701 || - (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)) + (T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700)) { - if(pDevice->LedMode == LED_MODE_THREE_LINK) - { - LM_WritePhy(pDevice, BCM540X_EXT_CTRL_REG, - BCM540X_EXT_CTRL_LINK3_LED_MODE); - } - else - { - LM_WritePhy(pDevice, BCM540X_EXT_CTRL_REG, 0); - } + if(pDevice->LedMode == LED_MODE_THREE_LINK) + { + LM_WritePhy(pDevice, BCM540X_EXT_CTRL_REG, + BCM540X_EXT_CTRL_LINK3_LED_MODE); + } + else + { + LM_WritePhy(pDevice, BCM540X_EXT_CTRL_REG, 0); + } } CurrentLinkStatus = LM_STATUS_LINK_DOWN; @@ -4427,148 +4410,148 @@ /* Get current link and duplex mode. */ for(j = 0; j < 100; j++) { - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - if(Value32 & PHY_STATUS_LINK_PASS) - { - break; - } - MM_Wait(40); + if(Value32 & PHY_STATUS_LINK_PASS) + { + break; + } + MM_Wait(40); } if(Value32 & PHY_STATUS_LINK_PASS) { - /* Determine the current line and duplex settings. */ - LM_ReadPhy(pDevice, BCM540X_AUX_STATUS_REG, &Value32); - for(j = 0; j < 2000; j++) - { - MM_Wait(10); + /* Determine the current line and duplex settings. */ + LM_ReadPhy(pDevice, BCM540X_AUX_STATUS_REG, &Value32); + for(j = 0; j < 2000; j++) + { + MM_Wait(10); - LM_ReadPhy(pDevice, BCM540X_AUX_STATUS_REG, &Value32); - if(Value32) - { - break; - } - } + LM_ReadPhy(pDevice, BCM540X_AUX_STATUS_REG, &Value32); + if(Value32) + { + break; + } + } - switch(Value32 & BCM540X_AUX_SPEED_MASK) - { - case BCM540X_AUX_10BASET_HD: - CurrentLineSpeed = LM_LINE_SPEED_10MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_HALF; - break; + switch(Value32 & BCM540X_AUX_SPEED_MASK) + { + case BCM540X_AUX_10BASET_HD: + CurrentLineSpeed = LM_LINE_SPEED_10MBPS; + CurrentDuplexMode = LM_DUPLEX_MODE_HALF; + break; - case BCM540X_AUX_10BASET_FD: - CurrentLineSpeed = LM_LINE_SPEED_10MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_FULL; - break; + case BCM540X_AUX_10BASET_FD: + CurrentLineSpeed = LM_LINE_SPEED_10MBPS; + CurrentDuplexMode = LM_DUPLEX_MODE_FULL; + break; - case BCM540X_AUX_100BASETX_HD: - CurrentLineSpeed = LM_LINE_SPEED_100MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_HALF; - break; + case BCM540X_AUX_100BASETX_HD: + CurrentLineSpeed = LM_LINE_SPEED_100MBPS; + CurrentDuplexMode = LM_DUPLEX_MODE_HALF; + break; - case BCM540X_AUX_100BASETX_FD: - CurrentLineSpeed = LM_LINE_SPEED_100MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_FULL; - break; + case BCM540X_AUX_100BASETX_FD: + CurrentLineSpeed = LM_LINE_SPEED_100MBPS; + CurrentDuplexMode = LM_DUPLEX_MODE_FULL; + break; - case BCM540X_AUX_100BASET_HD: - CurrentLineSpeed = LM_LINE_SPEED_1000MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_HALF; - break; + case BCM540X_AUX_100BASET_HD: + CurrentLineSpeed = LM_LINE_SPEED_1000MBPS; + CurrentDuplexMode = LM_DUPLEX_MODE_HALF; + break; - case BCM540X_AUX_100BASET_FD: - CurrentLineSpeed = LM_LINE_SPEED_1000MBPS; - CurrentDuplexMode = LM_DUPLEX_MODE_FULL; - break; + case BCM540X_AUX_100BASET_FD: + CurrentLineSpeed = LM_LINE_SPEED_1000MBPS; + CurrentDuplexMode = LM_DUPLEX_MODE_FULL; + break; - default: + default: - CurrentLineSpeed = LM_LINE_SPEED_UNKNOWN; - CurrentDuplexMode = LM_DUPLEX_MODE_UNKNOWN; - break; - } + CurrentLineSpeed = LM_LINE_SPEED_UNKNOWN; + CurrentDuplexMode = LM_DUPLEX_MODE_UNKNOWN; + break; + } - /* Make sure we are in auto-neg mode. */ - for (j = 0; j < 200; j++) - { - LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); - if(Value32 && Value32 != 0x7fff) - { - break; - } + /* Make sure we are in auto-neg mode. */ + for (j = 0; j < 200; j++) + { + LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); + if(Value32 && Value32 != 0x7fff) + { + break; + } - if(Value32 == 0 && pDevice->RequestedMediaType == - LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS) - { - break; - } + if(Value32 == 0 && pDevice->RequestedMediaType == + LM_REQUESTED_MEDIA_TYPE_UTP_10MBPS) + { + break; + } - MM_Wait(10); - } + MM_Wait(10); + } - /* Use the current line settings for "auto" mode. */ - if(pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO || - pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) - { - if(Value32 & PHY_CTRL_AUTO_NEG_ENABLE) - { - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; + /* Use the current line settings for "auto" mode. */ + if(pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO || + pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) + { + if(Value32 & PHY_CTRL_AUTO_NEG_ENABLE) + { + CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - /* We may be exiting low power mode and the link is in */ - /* 10mb. In this case, we need to restart autoneg. */ - LM_ReadPhy(pDevice, BCM540X_1000BASET_CTRL_REG, &Value32); - pDevice->advertising1000 = Value32; - /* 5702FE supports 10/100Mb only. */ - if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5703 || - pDevice->BondId != GRC_MISC_BD_ID_5702FE) - { - if(!(Value32 & (BCM540X_AN_AD_1000BASET_HALF | - BCM540X_AN_AD_1000BASET_FULL))) - { - CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH; - } - } - } - else - { - CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH; - } - } - else - { - /* Force line settings. */ - /* Use the current setting if it matches the user's requested */ - /* setting. */ - LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); - if((pDevice->LineSpeed == CurrentLineSpeed) && - (pDevice->DuplexMode == CurrentDuplexMode)) - { - if ((pDevice->DisableAutoNeg && - !(Value32 & PHY_CTRL_AUTO_NEG_ENABLE)) || - (!pDevice->DisableAutoNeg && - (Value32 & PHY_CTRL_AUTO_NEG_ENABLE))) - { - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - } - else - { - CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH; - } - } - else - { - CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH; - } - } + /* We may be exiting low power mode and the link is in */ + /* 10mb. In this case, we need to restart autoneg. */ + LM_ReadPhy(pDevice, BCM540X_1000BASET_CTRL_REG, &Value32); + pDevice->advertising1000 = Value32; + /* 5702FE supports 10/100Mb only. */ + if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5703 || + pDevice->BondId != GRC_MISC_BD_ID_5702FE) + { + if(!(Value32 & (BCM540X_AN_AD_1000BASET_HALF | + BCM540X_AN_AD_1000BASET_FULL))) + { + CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH; + } + } + } + else + { + CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH; + } + } + else + { + /* Force line settings. */ + /* Use the current setting if it matches the user's requested */ + /* setting. */ + LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); + if((pDevice->LineSpeed == CurrentLineSpeed) && + (pDevice->DuplexMode == CurrentDuplexMode)) + { + if ((pDevice->DisableAutoNeg && + !(Value32 & PHY_CTRL_AUTO_NEG_ENABLE)) || + (!pDevice->DisableAutoNeg && + (Value32 & PHY_CTRL_AUTO_NEG_ENABLE))) + { + CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; + } + else + { + CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH; + } + } + else + { + CurrentLinkStatus = LM_STATUS_LINK_SETTING_MISMATCH; + } + } - /* Save line settings. */ - pDevice->LineSpeed = CurrentLineSpeed; - pDevice->DuplexMode = CurrentDuplexMode; - pDevice->MediaType = LM_MEDIA_TYPE_UTP; + /* Save line settings. */ + pDevice->LineSpeed = CurrentLineSpeed; + pDevice->DuplexMode = CurrentDuplexMode; + pDevice->MediaType = LM_MEDIA_TYPE_UTP; } return CurrentLinkStatus; @@ -4593,51 +4576,51 @@ /* See Table 28B-3 of 802.3ab-1999 spec. */ if(pDevice->FlowControlCap & LM_FLOW_CONTROL_AUTO_PAUSE) { - if(LocalPhyAd & PHY_AN_AD_PAUSE_CAPABLE) - { - if(LocalPhyAd & PHY_AN_AD_ASYM_PAUSE) - { - if(RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE) - { - FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE | - LM_FLOW_CONTROL_RECEIVE_PAUSE; - } - else if(RemotePhyAd & PHY_LINK_PARTNER_ASYM_PAUSE) - { - FlowCap = LM_FLOW_CONTROL_RECEIVE_PAUSE; - } - } - else - { - if(RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE) - { - FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE | - LM_FLOW_CONTROL_RECEIVE_PAUSE; - } - } - } - else if(LocalPhyAd & PHY_AN_AD_ASYM_PAUSE) - { - if((RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE) && - (RemotePhyAd & PHY_LINK_PARTNER_ASYM_PAUSE)) - { - FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE; - } - } + if(LocalPhyAd & PHY_AN_AD_PAUSE_CAPABLE) + { + if(LocalPhyAd & PHY_AN_AD_ASYM_PAUSE) + { + if(RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE) + { + FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE | + LM_FLOW_CONTROL_RECEIVE_PAUSE; + } + else if(RemotePhyAd & PHY_LINK_PARTNER_ASYM_PAUSE) + { + FlowCap = LM_FLOW_CONTROL_RECEIVE_PAUSE; + } + } + else + { + if(RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE) + { + FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE | + LM_FLOW_CONTROL_RECEIVE_PAUSE; + } + } + } + else if(LocalPhyAd & PHY_AN_AD_ASYM_PAUSE) + { + if((RemotePhyAd & PHY_LINK_PARTNER_PAUSE_CAPABLE) && + (RemotePhyAd & PHY_LINK_PARTNER_ASYM_PAUSE)) + { + FlowCap = LM_FLOW_CONTROL_TRANSMIT_PAUSE; + } + } } else { - FlowCap = pDevice->FlowControlCap; + FlowCap = pDevice->FlowControlCap; } /* Enable/disable rx PAUSE. */ pDevice->RxMode &= ~RX_MODE_ENABLE_FLOW_CONTROL; if(FlowCap & LM_FLOW_CONTROL_RECEIVE_PAUSE && - (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE || - pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE)) + (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE || + pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE)) { - pDevice->FlowControl |= LM_FLOW_CONTROL_RECEIVE_PAUSE; - pDevice->RxMode |= RX_MODE_ENABLE_FLOW_CONTROL; + pDevice->FlowControl |= LM_FLOW_CONTROL_RECEIVE_PAUSE; + pDevice->RxMode |= RX_MODE_ENABLE_FLOW_CONTROL; } REG_WR(pDevice, MacCtrl.RxMode, pDevice->RxMode); @@ -4645,11 +4628,11 @@ /* Enable/disable tx PAUSE. */ pDevice->TxMode &= ~TX_MODE_ENABLE_FLOW_CONTROL; if(FlowCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE && - (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE || - pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE)) + (pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE || + pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE)) { - pDevice->FlowControl |= LM_FLOW_CONTROL_TRANSMIT_PAUSE; - pDevice->TxMode |= TX_MODE_ENABLE_FLOW_CONTROL; + pDevice->FlowControl |= LM_FLOW_CONTROL_TRANSMIT_PAUSE; + pDevice->TxMode |= TX_MODE_ENABLE_FLOW_CONTROL; } REG_WR(pDevice, MacCtrl.TxMode, pDevice->TxMode); @@ -4676,51 +4659,50 @@ /* Reset the SERDES during init and when we have link. */ if(!pDevice->InitDone || Value32 & MAC_STATUS_PCS_SYNCED) { - /* Set PLL lock range. */ - LM_WritePhy(pDevice, 0x16, 0x8007); + /* Set PLL lock range. */ + LM_WritePhy(pDevice, 0x16, 0x8007); - /* Software reset. */ - LM_WritePhy(pDevice, 0x00, 0x8000); + /* Software reset. */ + LM_WritePhy(pDevice, 0x00, 0x8000); - /* Wait for reset to complete. */ - for(j = 0; j < 500; j++) - { - MM_Wait(10); - } + /* Wait for reset to complete. */ + for(j = 0; j < 500; j++) + { + MM_Wait(10); + } - /* Config mode; seletct PMA/Ch 1 regs. */ - LM_WritePhy(pDevice, 0x10, 0x8411); + /* Config mode; seletct PMA/Ch 1 regs. */ + LM_WritePhy(pDevice, 0x10, 0x8411); - /* Enable auto-lock and comdet, select txclk for tx. */ - LM_WritePhy(pDevice, 0x11, 0x0a10); + /* Enable auto-lock and comdet, select txclk for tx. */ + LM_WritePhy(pDevice, 0x11, 0x0a10); - LM_WritePhy(pDevice, 0x18, 0x00a0); - LM_WritePhy(pDevice, 0x16, 0x41ff); + LM_WritePhy(pDevice, 0x18, 0x00a0); + LM_WritePhy(pDevice, 0x16, 0x41ff); - /* Assert and deassert POR. */ - LM_WritePhy(pDevice, 0x13, 0x0400); - MM_Wait(40); - LM_WritePhy(pDevice, 0x13, 0x0000); + /* Assert and deassert POR. */ + LM_WritePhy(pDevice, 0x13, 0x0400); + MM_Wait(40); + LM_WritePhy(pDevice, 0x13, 0x0000); - LM_WritePhy(pDevice, 0x11, 0x0a50); - MM_Wait(40); - LM_WritePhy(pDevice, 0x11, 0x0a10); + LM_WritePhy(pDevice, 0x11, 0x0a50); + MM_Wait(40); + LM_WritePhy(pDevice, 0x11, 0x0a10); - /* Delay for signal to stabilize. */ - for(j = 0; j < 15000; j++) - { - MM_Wait(10); - } + /* Delay for signal to stabilize. */ + for(j = 0; j < 15000; j++) + { + MM_Wait(10); + } - /* Deselect the channel register so we can read the PHY id later. */ - LM_WritePhy(pDevice, 0x10, 0x8011); + /* Deselect the channel register so we can read the PHY id later. */ + LM_WritePhy(pDevice, 0x10, 0x8011); } return LM_STATUS_SUCCESS; } - /******************************************************************************/ /* Description: */ /* */ @@ -4748,12 +4730,12 @@ /* Initialize the BCM8002 SERDES PHY. */ switch(pDevice->PhyId & PHY_ID_MASK) { - case PHY_BCM8002_PHY_ID: - LM_InitBcm800xPhy(pDevice); - break; + case PHY_BCM8002_PHY_ID: + LM_InitBcm800xPhy(pDevice); + break; - default: - break; + default: + break; } /* Enable link change interrupt. */ @@ -4766,218 +4748,218 @@ Value32 = REG_RD(pDevice, MacCtrl.Status); if(Value32 & MAC_STATUS_PCS_SYNCED) { - if((pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO) || - (pDevice->DisableAutoNeg == FALSE)) - { - /* auto-negotiation mode. */ - /* Initialize the autoneg default capaiblities. */ - AutonegInit(&pDevice->AnInfo); + if((pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO) || + (pDevice->DisableAutoNeg == FALSE)) + { + /* auto-negotiation mode. */ + /* Initialize the autoneg default capaiblities. */ + AutonegInit(&pDevice->AnInfo); - /* Set the context pointer to point to the main device structure. */ - pDevice->AnInfo.pContext = pDevice; + /* Set the context pointer to point to the main device structure. */ + pDevice->AnInfo.pContext = pDevice; - /* Setup flow control advertisement register. */ - Value32 = GetPhyAdFlowCntrlSettings(pDevice); - if(Value32 & PHY_AN_AD_PAUSE_CAPABLE) - { - pDevice->AnInfo.mr_adv_sym_pause = 1; - } - else - { - pDevice->AnInfo.mr_adv_sym_pause = 0; - } + /* Setup flow control advertisement register. */ + Value32 = GetPhyAdFlowCntrlSettings(pDevice); + if(Value32 & PHY_AN_AD_PAUSE_CAPABLE) + { + pDevice->AnInfo.mr_adv_sym_pause = 1; + } + else + { + pDevice->AnInfo.mr_adv_sym_pause = 0; + } - if(Value32 & PHY_AN_AD_ASYM_PAUSE) - { - pDevice->AnInfo.mr_adv_asym_pause = 1; - } - else - { - pDevice->AnInfo.mr_adv_asym_pause = 0; - } + if(Value32 & PHY_AN_AD_ASYM_PAUSE) + { + pDevice->AnInfo.mr_adv_asym_pause = 1; + } + else + { + pDevice->AnInfo.mr_adv_asym_pause = 0; + } - /* Try to autoneg up to six times. */ - if (pDevice->IgnoreTbiLinkChange) - { - Cnt = 1; - } - else - { - Cnt = 6; - } - for (j = 0; j < Cnt; j++) - { - REG_WR(pDevice, MacCtrl.TxAutoNeg, 0); + /* Try to autoneg up to six times. */ + if (pDevice->IgnoreTbiLinkChange) + { + Cnt = 1; + } + else + { + Cnt = 6; + } + for (j = 0; j < Cnt; j++) + { + REG_WR(pDevice, MacCtrl.TxAutoNeg, 0); - Value32 = pDevice->MacMode & ~MAC_MODE_PORT_MODE_MASK; - REG_WR(pDevice, MacCtrl.Mode, Value32); - MM_Wait(20); + Value32 = pDevice->MacMode & ~MAC_MODE_PORT_MODE_MASK; + REG_WR(pDevice, MacCtrl.Mode, Value32); + MM_Wait(20); - REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode | - MAC_MODE_SEND_CONFIGS); + REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode | + MAC_MODE_SEND_CONFIGS); - MM_Wait(20); + MM_Wait(20); - pDevice->AnInfo.State = AN_STATE_UNKNOWN; - pDevice->AnInfo.CurrentTime_us = 0; + pDevice->AnInfo.State = AN_STATE_UNKNOWN; + pDevice->AnInfo.CurrentTime_us = 0; - REG_WR(pDevice, Grc.Timer, 0); - for(k = 0; (pDevice->AnInfo.CurrentTime_us < 75000) && - (k < 75000); k++) - { - AnStatus = Autoneg8023z(&pDevice->AnInfo); + REG_WR(pDevice, Grc.Timer, 0); + for(k = 0; (pDevice->AnInfo.CurrentTime_us < 75000) && + (k < 75000); k++) + { + AnStatus = Autoneg8023z(&pDevice->AnInfo); - if((AnStatus == AUTONEG_STATUS_DONE) || - (AnStatus == AUTONEG_STATUS_FAILED)) - { - break; - } + if((AnStatus == AUTONEG_STATUS_DONE) || + (AnStatus == AUTONEG_STATUS_FAILED)) + { + break; + } - pDevice->AnInfo.CurrentTime_us = REG_RD(pDevice, Grc.Timer); + pDevice->AnInfo.CurrentTime_us = REG_RD(pDevice, Grc.Timer); - } - if((AnStatus == AUTONEG_STATUS_DONE) || - (AnStatus == AUTONEG_STATUS_FAILED)) - { - break; - } - if (j >= 1) - { - if (!(REG_RD(pDevice, MacCtrl.Status) & - MAC_STATUS_PCS_SYNCED)) { - break; - } - } - } + } + if((AnStatus == AUTONEG_STATUS_DONE) || + (AnStatus == AUTONEG_STATUS_FAILED)) + { + break; + } + if (j >= 1) + { + if (!(REG_RD(pDevice, MacCtrl.Status) & + MAC_STATUS_PCS_SYNCED)) { + break; + } + } + } - /* Stop sending configs. */ - MM_AnTxIdle(&pDevice->AnInfo); + /* Stop sending configs. */ + MM_AnTxIdle(&pDevice->AnInfo); - /* Resolve flow control settings. */ - if((AnStatus == AUTONEG_STATUS_DONE) && - pDevice->AnInfo.mr_an_complete && pDevice->AnInfo.mr_link_ok && - pDevice->AnInfo.mr_lp_adv_full_duplex) - { - LM_UINT32 RemotePhyAd; - LM_UINT32 LocalPhyAd; + /* Resolve flow control settings. */ + if((AnStatus == AUTONEG_STATUS_DONE) && + pDevice->AnInfo.mr_an_complete && pDevice->AnInfo.mr_link_ok && + pDevice->AnInfo.mr_lp_adv_full_duplex) + { + LM_UINT32 RemotePhyAd; + LM_UINT32 LocalPhyAd; - LocalPhyAd = 0; - if(pDevice->AnInfo.mr_adv_sym_pause) - { - LocalPhyAd |= PHY_AN_AD_PAUSE_CAPABLE; - } + LocalPhyAd = 0; + if(pDevice->AnInfo.mr_adv_sym_pause) + { + LocalPhyAd |= PHY_AN_AD_PAUSE_CAPABLE; + } - if(pDevice->AnInfo.mr_adv_asym_pause) - { - LocalPhyAd |= PHY_AN_AD_ASYM_PAUSE; - } + if(pDevice->AnInfo.mr_adv_asym_pause) + { + LocalPhyAd |= PHY_AN_AD_ASYM_PAUSE; + } - RemotePhyAd = 0; - if(pDevice->AnInfo.mr_lp_adv_sym_pause) - { - RemotePhyAd |= PHY_LINK_PARTNER_PAUSE_CAPABLE; - } + RemotePhyAd = 0; + if(pDevice->AnInfo.mr_lp_adv_sym_pause) + { + RemotePhyAd |= PHY_LINK_PARTNER_PAUSE_CAPABLE; + } - if(pDevice->AnInfo.mr_lp_adv_asym_pause) - { - RemotePhyAd |= PHY_LINK_PARTNER_ASYM_PAUSE; - } + if(pDevice->AnInfo.mr_lp_adv_asym_pause) + { + RemotePhyAd |= PHY_LINK_PARTNER_ASYM_PAUSE; + } - LM_SetFlowControl(pDevice, LocalPhyAd, RemotePhyAd); + LM_SetFlowControl(pDevice, LocalPhyAd, RemotePhyAd); - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - } - for (j = 0; j < 30; j++) - { - MM_Wait(20); - REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | - MAC_STATUS_CFG_CHANGED); - MM_Wait(20); - if ((REG_RD(pDevice, MacCtrl.Status) & - (MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED)) == 0) - break; - } - if (pDevice->PollTbiLink) - { - Value32 = REG_RD(pDevice, MacCtrl.Status); - if (Value32 & MAC_STATUS_RECEIVING_CFG) - { - pDevice->IgnoreTbiLinkChange = TRUE; - } - else - { - pDevice->IgnoreTbiLinkChange = FALSE; - } - } - Value32 = REG_RD(pDevice, MacCtrl.Status); - if (CurrentLinkStatus == LM_STATUS_LINK_DOWN && - (Value32 & MAC_STATUS_PCS_SYNCED) && - ((Value32 & MAC_STATUS_RECEIVING_CFG) == 0)) - { - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - } - } - else - { - /* We are forcing line speed. */ - pDevice->FlowControlCap &= ~LM_FLOW_CONTROL_AUTO_PAUSE; - LM_SetFlowControl(pDevice, 0, 0); + CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; + } + for (j = 0; j < 30; j++) + { + MM_Wait(20); + REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | + MAC_STATUS_CFG_CHANGED); + MM_Wait(20); + if ((REG_RD(pDevice, MacCtrl.Status) & + (MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED)) == 0) + break; + } + if (pDevice->PollTbiLink) + { + Value32 = REG_RD(pDevice, MacCtrl.Status); + if (Value32 & MAC_STATUS_RECEIVING_CFG) + { + pDevice->IgnoreTbiLinkChange = TRUE; + } + else + { + pDevice->IgnoreTbiLinkChange = FALSE; + } + } + Value32 = REG_RD(pDevice, MacCtrl.Status); + if (CurrentLinkStatus == LM_STATUS_LINK_DOWN && + (Value32 & MAC_STATUS_PCS_SYNCED) && + ((Value32 & MAC_STATUS_RECEIVING_CFG) == 0)) + { + CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; + } + } + else + { + /* We are forcing line speed. */ + pDevice->FlowControlCap &= ~LM_FLOW_CONTROL_AUTO_PAUSE; + LM_SetFlowControl(pDevice, 0, 0); - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode | - MAC_MODE_SEND_CONFIGS); - } + CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; + REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode | + MAC_MODE_SEND_CONFIGS); + } } /* Set the link polarity bit. */ pDevice->MacMode &= ~MAC_MODE_LINK_POLARITY; REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); pDevice->pStatusBlkVirt->Status = STATUS_BLOCK_UPDATED | - (pDevice->pStatusBlkVirt->Status & ~STATUS_BLOCK_LINK_CHANGED_STATUS); + (pDevice->pStatusBlkVirt->Status & ~STATUS_BLOCK_LINK_CHANGED_STATUS); for (j = 0; j < 100; j++) { - REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | - MAC_STATUS_CFG_CHANGED); - MM_Wait(5); - if ((REG_RD(pDevice, MacCtrl.Status) & - (MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED)) == 0) - break; + REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | + MAC_STATUS_CFG_CHANGED); + MM_Wait(5); + if ((REG_RD(pDevice, MacCtrl.Status) & + (MAC_STATUS_SYNC_CHANGED | MAC_STATUS_CFG_CHANGED)) == 0) + break; } Value32 = REG_RD(pDevice, MacCtrl.Status); if((Value32 & MAC_STATUS_PCS_SYNCED) == 0) { - CurrentLinkStatus = LM_STATUS_LINK_DOWN; - if (pDevice->DisableAutoNeg == FALSE) - { - REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode | - MAC_MODE_SEND_CONFIGS); - MM_Wait(1); - REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); - } + CurrentLinkStatus = LM_STATUS_LINK_DOWN; + if (pDevice->DisableAutoNeg == FALSE) + { + REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode | + MAC_MODE_SEND_CONFIGS); + MM_Wait(1); + REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); + } } /* Initialize the current link status. */ if(CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) { - pDevice->LineSpeed = LM_LINE_SPEED_1000MBPS; - pDevice->DuplexMode = LM_DUPLEX_MODE_FULL; - REG_WR(pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED | - LED_CTRL_1000MBPS_LED_ON); + pDevice->LineSpeed = LM_LINE_SPEED_1000MBPS; + pDevice->DuplexMode = LM_DUPLEX_MODE_FULL; + REG_WR(pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED | + LED_CTRL_1000MBPS_LED_ON); } else { - pDevice->LineSpeed = LM_LINE_SPEED_UNKNOWN; - pDevice->DuplexMode = LM_DUPLEX_MODE_UNKNOWN; - REG_WR(pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED | - LED_CTRL_OVERRIDE_TRAFFIC_LED); + pDevice->LineSpeed = LM_LINE_SPEED_UNKNOWN; + pDevice->DuplexMode = LM_DUPLEX_MODE_UNKNOWN; + REG_WR(pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED | + LED_CTRL_OVERRIDE_TRAFFIC_LED); } /* Indicate link status. */ if (pDevice->LinkStatus != CurrentLinkStatus) { - pDevice->LinkStatus = CurrentLinkStatus; - MM_IndicateStatus(pDevice, CurrentLinkStatus); + pDevice->LinkStatus = CurrentLinkStatus; + MM_IndicateStatus(pDevice, CurrentLinkStatus); } return LM_STATUS_SUCCESS; @@ -5005,7 +4987,7 @@ /* Clear link change attention. */ REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | - MAC_STATUS_CFG_CHANGED); + MAC_STATUS_CFG_CHANGED); /* Disable auto-polling for the moment. */ pDevice->MiMode = 0xc0000; @@ -5015,147 +4997,147 @@ /* Determine the requested line speed and duplex. */ pDevice->OldLineSpeed = pDevice->LineSpeed; LM_TranslateRequestedMediaType(pDevice->RequestedMediaType, - &pDevice->MediaType, &pDevice->LineSpeed, &pDevice->DuplexMode); + &pDevice->MediaType, &pDevice->LineSpeed, &pDevice->DuplexMode); /* Initialize the phy chip. */ switch(pDevice->PhyId & PHY_ID_MASK) { - case PHY_BCM5400_PHY_ID: - case PHY_BCM5401_PHY_ID: - case PHY_BCM5411_PHY_ID: - case PHY_BCM5701_PHY_ID: - case PHY_BCM5703_PHY_ID: - case PHY_BCM5704_PHY_ID: - CurrentLinkStatus = LM_InitBcm540xPhy(pDevice); - break; + case PHY_BCM5400_PHY_ID: + case PHY_BCM5401_PHY_ID: + case PHY_BCM5411_PHY_ID: + case PHY_BCM5701_PHY_ID: + case PHY_BCM5703_PHY_ID: + case PHY_BCM5704_PHY_ID: + CurrentLinkStatus = LM_InitBcm540xPhy(pDevice); + break; - default: - break; + default: + break; } if(CurrentLinkStatus == LM_STATUS_LINK_SETTING_MISMATCH) { - CurrentLinkStatus = LM_STATUS_LINK_DOWN; + CurrentLinkStatus = LM_STATUS_LINK_DOWN; } /* Setup flow control. */ pDevice->FlowControl = LM_FLOW_CONTROL_NONE; if(CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) { - LM_FLOW_CONTROL FlowCap; /* Flow control capability. */ + LM_FLOW_CONTROL FlowCap; /* Flow control capability. */ - FlowCap = LM_FLOW_CONTROL_NONE; + FlowCap = LM_FLOW_CONTROL_NONE; - if(pDevice->DuplexMode == LM_DUPLEX_MODE_FULL) - { - if(pDevice->DisableAutoNeg == FALSE || - pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO || - pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) - { - LM_UINT32 ExpectedPhyAd; - LM_UINT32 LocalPhyAd; - LM_UINT32 RemotePhyAd; + if(pDevice->DuplexMode == LM_DUPLEX_MODE_FULL) + { + if(pDevice->DisableAutoNeg == FALSE || + pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO || + pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) + { + LM_UINT32 ExpectedPhyAd; + LM_UINT32 LocalPhyAd; + LM_UINT32 RemotePhyAd; - LM_ReadPhy(pDevice, PHY_AN_AD_REG, &LocalPhyAd); + LM_ReadPhy(pDevice, PHY_AN_AD_REG, &LocalPhyAd); pDevice->advertising = LocalPhyAd; - LocalPhyAd &= (PHY_AN_AD_ASYM_PAUSE | PHY_AN_AD_PAUSE_CAPABLE); + LocalPhyAd &= (PHY_AN_AD_ASYM_PAUSE | PHY_AN_AD_PAUSE_CAPABLE); - ExpectedPhyAd = GetPhyAdFlowCntrlSettings(pDevice); + ExpectedPhyAd = GetPhyAdFlowCntrlSettings(pDevice); - if(LocalPhyAd != ExpectedPhyAd) - { - CurrentLinkStatus = LM_STATUS_LINK_DOWN; - } - else - { - LM_ReadPhy(pDevice, PHY_LINK_PARTNER_ABILITY_REG, - &RemotePhyAd); + if(LocalPhyAd != ExpectedPhyAd) + { + CurrentLinkStatus = LM_STATUS_LINK_DOWN; + } + else + { + LM_ReadPhy(pDevice, PHY_LINK_PARTNER_ABILITY_REG, + &RemotePhyAd); - LM_SetFlowControl(pDevice, LocalPhyAd, RemotePhyAd); - } - } - else - { - pDevice->FlowControlCap &= ~LM_FLOW_CONTROL_AUTO_PAUSE; - LM_SetFlowControl(pDevice, 0, 0); - } - } + LM_SetFlowControl(pDevice, LocalPhyAd, RemotePhyAd); + } + } + else + { + pDevice->FlowControlCap &= ~LM_FLOW_CONTROL_AUTO_PAUSE; + LM_SetFlowControl(pDevice, 0, 0); + } + } } if(CurrentLinkStatus == LM_STATUS_LINK_DOWN) { - LM_ForceAutoNeg(pDevice, pDevice->RequestedMediaType); + LM_ForceAutoNeg(pDevice, pDevice->RequestedMediaType); - /* If we force line speed, we make get link right away. */ - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - if(Value32 & PHY_STATUS_LINK_PASS) - { - CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; - } + /* If we force line speed, we make get link right away. */ + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + if(Value32 & PHY_STATUS_LINK_PASS) + { + CurrentLinkStatus = LM_STATUS_LINK_ACTIVE; + } } /* GMII interface. */ pDevice->MacMode &= ~MAC_MODE_PORT_MODE_MASK; if(CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) { - if(pDevice->LineSpeed == LM_LINE_SPEED_100MBPS || - pDevice->LineSpeed == LM_LINE_SPEED_10MBPS) - { - pDevice->MacMode |= MAC_MODE_PORT_MODE_MII; - } - else - { - pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII; - } + if(pDevice->LineSpeed == LM_LINE_SPEED_100MBPS || + pDevice->LineSpeed == LM_LINE_SPEED_10MBPS) + { + pDevice->MacMode |= MAC_MODE_PORT_MODE_MII; + } + else + { + pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII; + } } else { - pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII; + pDevice->MacMode |= MAC_MODE_PORT_MODE_GMII; } /* Set the MAC to operate in the appropriate duplex mode. */ pDevice->MacMode &= ~MAC_MODE_HALF_DUPLEX; if(pDevice->DuplexMode == LM_DUPLEX_MODE_HALF) { - pDevice->MacMode |= MAC_MODE_HALF_DUPLEX; + pDevice->MacMode |= MAC_MODE_HALF_DUPLEX; } /* Set the link polarity bit. */ pDevice->MacMode &= ~MAC_MODE_LINK_POLARITY; if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) { - if((pDevice->LedMode == LED_MODE_LINK10) || - (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE && - pDevice->LineSpeed == LM_LINE_SPEED_10MBPS)) - { - pDevice->MacMode |= MAC_MODE_LINK_POLARITY; - } + if((pDevice->LedMode == LED_MODE_LINK10) || + (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE && + pDevice->LineSpeed == LM_LINE_SPEED_10MBPS)) + { + pDevice->MacMode |= MAC_MODE_LINK_POLARITY; + } } else { - if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) - { - pDevice->MacMode |= MAC_MODE_LINK_POLARITY; - } + if (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) + { + pDevice->MacMode |= MAC_MODE_LINK_POLARITY; + } - /* Set LED mode. */ - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) - { - Value32 = LED_CTRL_PHY_MODE_1; - } - else - { - if(pDevice->LedMode == LED_MODE_OUTPUT) - { - Value32 = LED_CTRL_PHY_MODE_2; - } - else - { - Value32 = LED_CTRL_PHY_MODE_1; - } - } - REG_WR(pDevice, MacCtrl.LedCtrl, Value32); + /* Set LED mode. */ + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + { + Value32 = LED_CTRL_PHY_MODE_1; + } + else + { + if(pDevice->LedMode == LED_MODE_OUTPUT) + { + Value32 = LED_CTRL_PHY_MODE_2; + } + else + { + Value32 = LED_CTRL_PHY_MODE_1; + } + } + REG_WR(pDevice, MacCtrl.LedCtrl, Value32); } REG_WR(pDevice, MacCtrl.Mode, pDevice->MacMode); @@ -5163,38 +5145,38 @@ /* Enable auto polling. */ if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - pDevice->MiMode |= MI_MODE_AUTO_POLLING_ENABLE; - REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode); + pDevice->MiMode |= MI_MODE_AUTO_POLLING_ENABLE; + REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode); } /* Enable phy link change attention. */ if(pDevice->PhyIntMode == T3_PHY_INT_MODE_MI_INTERRUPT) { - REG_WR(pDevice, MacCtrl.MacEvent, MAC_EVENT_ENABLE_MI_INTERRUPT); + REG_WR(pDevice, MacCtrl.MacEvent, MAC_EVENT_ENABLE_MI_INTERRUPT); } else { - REG_WR(pDevice, MacCtrl.MacEvent, - MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN); + REG_WR(pDevice, MacCtrl.MacEvent, + MAC_EVENT_ENABLE_LINK_STATE_CHANGED_ATTN); } if ((T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) && - (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) && - (pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) && - (((pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) && - (pDevice->PciState & T3_PCI_STATE_BUS_SPEED_HIGH)) || - !(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE))) + (CurrentLinkStatus == LM_STATUS_LINK_ACTIVE) && + (pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) && + (((pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE) && + (pDevice->PciState & T3_PCI_STATE_BUS_SPEED_HIGH)) || + !(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE))) { - MM_Wait(120); - REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | - MAC_STATUS_CFG_CHANGED); - MEM_WR_OFFSET(pDevice, T3_FIRMWARE_MAILBOX, - T3_MAGIC_NUM_DISABLE_DMAW_ON_LINK_CHANGE); + MM_Wait(120); + REG_WR(pDevice, MacCtrl.Status, MAC_STATUS_SYNC_CHANGED | + MAC_STATUS_CFG_CHANGED); + MEM_WR_OFFSET(pDevice, T3_FIRMWARE_MAILBOX, + T3_MAGIC_NUM_DISABLE_DMAW_ON_LINK_CHANGE); } /* Indicate link status. */ if (pDevice->LinkStatus != CurrentLinkStatus) { - pDevice->LinkStatus = CurrentLinkStatus; - MM_IndicateStatus(pDevice, CurrentLinkStatus); + pDevice->LinkStatus = CurrentLinkStatus; + MM_IndicateStatus(pDevice, CurrentLinkStatus); } return LM_STATUS_SUCCESS; @@ -5215,30 +5197,30 @@ #if INCLUDE_TBI_SUPPORT if(pDevice->EnableTbi) { - LmStatus = LM_SetupFiberPhy(pDevice); + LmStatus = LM_SetupFiberPhy(pDevice); } else #endif /* INCLUDE_TBI_SUPPORT */ { - LmStatus = LM_SetupCopperPhy(pDevice); + LmStatus = LM_SetupCopperPhy(pDevice); } if (pDevice->ChipRevId == T3_CHIP_ID_5704_A0) { - if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) - { - Value32 = REG_RD(pDevice, PciCfg.PciState); - REG_WR(pDevice, PciCfg.PciState, - Value32 | T3_PCI_STATE_RETRY_SAME_DMA); - } + if (!(pDevice->PciState & T3_PCI_STATE_CONVENTIONAL_PCI_MODE)) + { + Value32 = REG_RD(pDevice, PciCfg.PciState); + REG_WR(pDevice, PciCfg.PciState, + Value32 | T3_PCI_STATE_RETRY_SAME_DMA); + } } if ((pDevice->LineSpeed == LM_LINE_SPEED_1000MBPS) && - (pDevice->DuplexMode == LM_DUPLEX_MODE_HALF)) + (pDevice->DuplexMode == LM_DUPLEX_MODE_HALF)) { - REG_WR(pDevice, MacCtrl.TxLengths, 0x26ff); + REG_WR(pDevice, MacCtrl.TxLengths, 0x26ff); } else { - REG_WR(pDevice, MacCtrl.TxLengths, 0x2620); + REG_WR(pDevice, MacCtrl.TxLengths, 0x2620); } return LmStatus; @@ -5259,48 +5241,47 @@ if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode & - ~MI_MODE_AUTO_POLLING_ENABLE); - MM_Wait(40); + REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode & + ~MI_MODE_AUTO_POLLING_ENABLE); + MM_Wait(40); } Value32 = (pDevice->PhyAddr << MI_COM_FIRST_PHY_ADDR_BIT) | - ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) << MI_COM_FIRST_PHY_REG_ADDR_BIT) | - MI_COM_CMD_READ | MI_COM_START; + ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) << MI_COM_FIRST_PHY_REG_ADDR_BIT) | + MI_COM_CMD_READ | MI_COM_START; REG_WR(pDevice, MacCtrl.MiCom, Value32); for(j = 0; j < 20; j++) { - MM_Wait(25); + MM_Wait(25); - Value32 = REG_RD(pDevice, MacCtrl.MiCom); + Value32 = REG_RD(pDevice, MacCtrl.MiCom); - if(!(Value32 & MI_COM_BUSY)) - { - MM_Wait(5); - Value32 = REG_RD(pDevice, MacCtrl.MiCom); - Value32 &= MI_COM_PHY_DATA_MASK; - break; - } + if(!(Value32 & MI_COM_BUSY)) + { + MM_Wait(5); + Value32 = REG_RD(pDevice, MacCtrl.MiCom); + Value32 &= MI_COM_PHY_DATA_MASK; + break; + } } if(Value32 & MI_COM_BUSY) { - Value32 = 0; + Value32 = 0; } *pData32 = Value32; if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode); - MM_Wait(40); + REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode); + MM_Wait(40); } } /* LM_ReadPhy */ - /******************************************************************************/ /* Description: */ /* */ @@ -5316,34 +5297,34 @@ if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode & - ~MI_MODE_AUTO_POLLING_ENABLE); - MM_Wait(40); + REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode & + ~MI_MODE_AUTO_POLLING_ENABLE); + MM_Wait(40); } Value32 = (pDevice->PhyAddr << MI_COM_FIRST_PHY_ADDR_BIT) | - ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) << MI_COM_FIRST_PHY_REG_ADDR_BIT) | - (Data32 & MI_COM_PHY_DATA_MASK) | MI_COM_CMD_WRITE | MI_COM_START; + ((PhyReg & MI_COM_PHY_REG_ADDR_MASK) << MI_COM_FIRST_PHY_REG_ADDR_BIT) | + (Data32 & MI_COM_PHY_DATA_MASK) | MI_COM_CMD_WRITE | MI_COM_START; REG_WR(pDevice, MacCtrl.MiCom, Value32); for(j = 0; j < 20; j++) { - MM_Wait(25); + MM_Wait(25); - Value32 = REG_RD(pDevice, MacCtrl.MiCom); + Value32 = REG_RD(pDevice, MacCtrl.MiCom); - if(!(Value32 & MI_COM_BUSY)) - { - MM_Wait(5); - break; - } + if(!(Value32 & MI_COM_BUSY)) + { + MM_Wait(5); + break; + } } if(pDevice->PhyIntMode == T3_PHY_INT_MODE_AUTO_POLLING) { - REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode); - MM_Wait(40); + REG_WR(pDevice, MacCtrl.MiMode, pDevice->MiMode); + MM_Wait(40); } } /* LM_WritePhy */ @@ -5375,33 +5356,33 @@ if(PowerLevel == LM_POWER_STATE_D0) { - /* Bring the card out of low power mode. */ - PmCtrl |= T3_PM_POWER_STATE_D0; - MM_WriteConfig32(pDevice, T3_PCI_PM_STATUS_CTRL_REG, PmCtrl); + /* Bring the card out of low power mode. */ + PmCtrl |= T3_PM_POWER_STATE_D0; + MM_WriteConfig32(pDevice, T3_PCI_PM_STATUS_CTRL_REG, PmCtrl); - REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl); - MM_Wait (40); + REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl); + MM_Wait (40); #if 0 /* Bugfix by jmb...can't call WritePhy here because pDevice not fully initialized */ - LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x02); + LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x02); #endif - return LM_STATUS_SUCCESS; + return LM_STATUS_SUCCESS; } else if(PowerLevel == LM_POWER_STATE_D1) { - PmCtrl |= T3_PM_POWER_STATE_D1; + PmCtrl |= T3_PM_POWER_STATE_D1; } else if(PowerLevel == LM_POWER_STATE_D2) { - PmCtrl |= T3_PM_POWER_STATE_D2; + PmCtrl |= T3_PM_POWER_STATE_D2; } else if(PowerLevel == LM_POWER_STATE_D3) { - PmCtrl |= T3_PM_POWER_STATE_D3; + PmCtrl |= T3_PM_POWER_STATE_D3; } else { - return LM_STATUS_FAILURE; + return LM_STATUS_FAILURE; } PmCtrl |= T3_PM_PME_ENABLE; @@ -5412,9 +5393,9 @@ if(!pDevice->RestoreOnWakeUp) { - pDevice->RestoreOnWakeUp = TRUE; - pDevice->WakeUpDisableAutoNeg = pDevice->DisableAutoNeg; - pDevice->WakeUpRequestedMediaType = pDevice->RequestedMediaType; + pDevice->RestoreOnWakeUp = TRUE; + pDevice->WakeUpDisableAutoNeg = pDevice->DisableAutoNeg; + pDevice->WakeUpRequestedMediaType = pDevice->RequestedMediaType; } /* Force auto-negotiation to 10 line speed. */ @@ -5431,168 +5412,168 @@ if (pDevice->WakeUpModeCap != LM_WAKE_UP_MODE_NONE) { - /* Enable WOL. */ - LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x5a); - MM_Wait(40); + /* Enable WOL. */ + LM_WritePhy(pDevice, BCM5401_AUX_CTRL, 0x5a); + MM_Wait(40); - /* Set LED mode. */ - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) - { - Value32 = LED_CTRL_PHY_MODE_1; - } - else - { - if(pDevice->LedMode == LED_MODE_OUTPUT) - { - Value32 = LED_CTRL_PHY_MODE_2; - } - else - { - Value32 = LED_CTRL_PHY_MODE_1; - } - } + /* Set LED mode. */ + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + { + Value32 = LED_CTRL_PHY_MODE_1; + } + else + { + if(pDevice->LedMode == LED_MODE_OUTPUT) + { + Value32 = LED_CTRL_PHY_MODE_2; + } + else + { + Value32 = LED_CTRL_PHY_MODE_1; + } + } - Value32 = MAC_MODE_PORT_MODE_MII; - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) - { - if(pDevice->LedMode == LED_MODE_LINK10 || - pDevice->WolSpeed == WOL_SPEED_10MB) - { - Value32 |= MAC_MODE_LINK_POLARITY; - } - } - else - { - Value32 |= MAC_MODE_LINK_POLARITY; - } - REG_WR(pDevice, MacCtrl.Mode, Value32); - MM_Wait(40); MM_Wait(40); MM_Wait(40); + Value32 = MAC_MODE_PORT_MODE_MII; + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700) + { + if(pDevice->LedMode == LED_MODE_LINK10 || + pDevice->WolSpeed == WOL_SPEED_10MB) + { + Value32 |= MAC_MODE_LINK_POLARITY; + } + } + else + { + Value32 |= MAC_MODE_LINK_POLARITY; + } + REG_WR(pDevice, MacCtrl.Mode, Value32); + MM_Wait(40); MM_Wait(40); MM_Wait(40); - /* Always enable magic packet wake-up if we have vaux. */ - if((PmeSupport & T3_PCI_PM_CAP_PME_D3COLD) && - (pDevice->WakeUpModeCap & LM_WAKE_UP_MODE_MAGIC_PACKET)) - { - Value32 |= MAC_MODE_DETECT_MAGIC_PACKET_ENABLE; - } + /* Always enable magic packet wake-up if we have vaux. */ + if((PmeSupport & T3_PCI_PM_CAP_PME_D3COLD) && + (pDevice->WakeUpModeCap & LM_WAKE_UP_MODE_MAGIC_PACKET)) + { + Value32 |= MAC_MODE_DETECT_MAGIC_PACKET_ENABLE; + } - REG_WR(pDevice, MacCtrl.Mode, Value32); + REG_WR(pDevice, MacCtrl.Mode, Value32); - /* Enable the receiver. */ - REG_WR(pDevice, MacCtrl.RxMode, RX_MODE_ENABLE); + /* Enable the receiver. */ + REG_WR(pDevice, MacCtrl.RxMode, RX_MODE_ENABLE); } /* Disable tx/rx clocks, and seletect an alternate clock. */ if(pDevice->WolSpeed == WOL_SPEED_100MB) { - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) - { - Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | - T3_PCI_SELECT_ALTERNATE_CLOCK; - } - else - { - Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK; - } - REG_WR(pDevice, PciCfg.ClockCtrl, Value32); + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + { + Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | + T3_PCI_SELECT_ALTERNATE_CLOCK; + } + else + { + Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK; + } + REG_WR(pDevice, PciCfg.ClockCtrl, Value32); - MM_Wait(40); + MM_Wait(40); - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) - { - Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | - T3_PCI_SELECT_ALTERNATE_CLOCK | T3_PCI_44MHZ_CORE_CLOCK; - } - else - { - Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK | - T3_PCI_44MHZ_CORE_CLOCK; - } + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + { + Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | + T3_PCI_SELECT_ALTERNATE_CLOCK | T3_PCI_44MHZ_CORE_CLOCK; + } + else + { + Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK | + T3_PCI_44MHZ_CORE_CLOCK; + } - REG_WR(pDevice, PciCfg.ClockCtrl, Value32); + REG_WR(pDevice, PciCfg.ClockCtrl, Value32); - MM_Wait(40); + MM_Wait(40); - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) - { - Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | - T3_PCI_44MHZ_CORE_CLOCK; - } - else - { - Value32 = T3_PCI_44MHZ_CORE_CLOCK; - } + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + { + Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | + T3_PCI_44MHZ_CORE_CLOCK; + } + else + { + Value32 = T3_PCI_44MHZ_CORE_CLOCK; + } - REG_WR(pDevice, PciCfg.ClockCtrl, Value32); + REG_WR(pDevice, PciCfg.ClockCtrl, Value32); } else { - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) - { - Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | - T3_PCI_SELECT_ALTERNATE_CLOCK | - T3_PCI_POWER_DOWN_PCI_PLL133; - } - else - { - Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK | - T3_PCI_POWER_DOWN_PCI_PLL133; - } + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + { + Value32 = T3_PCI_DISABLE_RX_CLOCK | T3_PCI_DISABLE_TX_CLOCK | + T3_PCI_SELECT_ALTERNATE_CLOCK | + T3_PCI_POWER_DOWN_PCI_PLL133; + } + else + { + Value32 = T3_PCI_SELECT_ALTERNATE_CLOCK | + T3_PCI_POWER_DOWN_PCI_PLL133; + } - REG_WR(pDevice, PciCfg.ClockCtrl, Value32); + REG_WR(pDevice, PciCfg.ClockCtrl, Value32); } MM_Wait(40); if(!pDevice->EepromWp && (pDevice->WakeUpModeCap != LM_WAKE_UP_MODE_NONE)) { - /* Switch adapter to auxilliary power. */ - if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || - T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) - { - /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */ - REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_GPIO_OE0 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE2 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1); - MM_Wait(40); - } - else - { - /* GPIO0 = 0, GPIO1 = 1, GPIO2 = 1. */ - REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_GPIO_OE0 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE2 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2); - MM_Wait(40); + /* Switch adapter to auxilliary power. */ + if(T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5700 || + T3_ASIC_REV(pDevice->ChipRevId) == T3_ASIC_REV_5701) + { + /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */ + REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | + GRC_MISC_LOCAL_CTRL_GPIO_OE0 | + GRC_MISC_LOCAL_CTRL_GPIO_OE1 | + GRC_MISC_LOCAL_CTRL_GPIO_OE2 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1); + MM_Wait(40); + } + else + { + /* GPIO0 = 0, GPIO1 = 1, GPIO2 = 1. */ + REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | + GRC_MISC_LOCAL_CTRL_GPIO_OE0 | + GRC_MISC_LOCAL_CTRL_GPIO_OE1 | + GRC_MISC_LOCAL_CTRL_GPIO_OE2 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2); + MM_Wait(40); - /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 1. */ - REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_GPIO_OE0 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE2 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2); - MM_Wait(40); + /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 1. */ + REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | + GRC_MISC_LOCAL_CTRL_GPIO_OE0 | + GRC_MISC_LOCAL_CTRL_GPIO_OE1 | + GRC_MISC_LOCAL_CTRL_GPIO_OE2 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT2); + MM_Wait(40); - /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */ - REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | - GRC_MISC_LOCAL_CTRL_GPIO_OE0 | - GRC_MISC_LOCAL_CTRL_GPIO_OE1 | - GRC_MISC_LOCAL_CTRL_GPIO_OE2 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 | - GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1); - MM_Wait(40); - } + /* GPIO0 = 1, GPIO1 = 1, GPIO2 = 0. */ + REG_WR(pDevice, Grc.LocalCtrl, pDevice->GrcLocalCtrl | + GRC_MISC_LOCAL_CTRL_GPIO_OE0 | + GRC_MISC_LOCAL_CTRL_GPIO_OE1 | + GRC_MISC_LOCAL_CTRL_GPIO_OE2 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT0 | + GRC_MISC_LOCAL_CTRL_GPIO_OUTPUT1); + MM_Wait(40); + } } /* Set the phy to low power mode. */ @@ -5603,7 +5584,6 @@ } /* LM_SetPowerState */ - /******************************************************************************/ /* Description: */ /* */ @@ -5619,31 +5599,30 @@ /* Auto negotiation flow control only when autonegotiation is enabled. */ if(pDevice->DisableAutoNeg == FALSE || - pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO || - pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) + pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_AUTO || + pDevice->RequestedMediaType == LM_REQUESTED_MEDIA_TYPE_UTP_AUTO) { - /* Please refer to Table 28B-3 of the 802.3ab-1999 spec. */ - if((pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE) || - ((pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE) && - (pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE))) - { - Value32 |= PHY_AN_AD_PAUSE_CAPABLE; - } - else if(pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE) - { - Value32 |= PHY_AN_AD_ASYM_PAUSE; - } - else if(pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE) - { - Value32 |= PHY_AN_AD_PAUSE_CAPABLE | PHY_AN_AD_ASYM_PAUSE; - } + /* Please refer to Table 28B-3 of the 802.3ab-1999 spec. */ + if((pDevice->FlowControlCap == LM_FLOW_CONTROL_AUTO_PAUSE) || + ((pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE) && + (pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE))) + { + Value32 |= PHY_AN_AD_PAUSE_CAPABLE; + } + else if(pDevice->FlowControlCap & LM_FLOW_CONTROL_TRANSMIT_PAUSE) + { + Value32 |= PHY_AN_AD_ASYM_PAUSE; + } + else if(pDevice->FlowControlCap & LM_FLOW_CONTROL_RECEIVE_PAUSE) + { + Value32 |= PHY_AN_AD_PAUSE_CAPABLE | PHY_AN_AD_ASYM_PAUSE; + } } return Value32; } - /******************************************************************************/ /* Description: */ /* */ @@ -5666,184 +5645,183 @@ /* Get the interface type, line speed, and duplex mode. */ LM_TranslateRequestedMediaType(RequestedMediaType, &MediaType, &LineSpeed, - &DuplexMode); + &DuplexMode); if (pDevice->RestoreOnWakeUp) { - LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, 0); - pDevice->advertising1000 = 0; - Value32 = PHY_AN_AD_10BASET_FULL | PHY_AN_AD_10BASET_HALF; - if (pDevice->WolSpeed == WOL_SPEED_100MB) - { - Value32 |= PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF; - } - Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; - Value32 |= GetPhyAdFlowCntrlSettings(pDevice); - LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; + LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, 0); + pDevice->advertising1000 = 0; + Value32 = PHY_AN_AD_10BASET_FULL | PHY_AN_AD_10BASET_HALF; + if (pDevice->WolSpeed == WOL_SPEED_100MB) + { + Value32 |= PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF; + } + Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; + Value32 |= GetPhyAdFlowCntrlSettings(pDevice); + LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); + pDevice->advertising = Value32; } /* Setup the auto-negotiation advertisement register. */ else if(LineSpeed == LM_LINE_SPEED_UNKNOWN) { - /* Setup the 10/100 Mbps auto-negotiation advertisement register. */ - Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD | - PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL | - PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF; - Value32 |= GetPhyAdFlowCntrlSettings(pDevice); + /* Setup the 10/100 Mbps auto-negotiation advertisement register. */ + Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD | + PHY_AN_AD_10BASET_HALF | PHY_AN_AD_10BASET_FULL | + PHY_AN_AD_100BASETX_FULL | PHY_AN_AD_100BASETX_HALF; + Value32 |= GetPhyAdFlowCntrlSettings(pDevice); - LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; + LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); + pDevice->advertising = Value32; - /* Advertise 1000Mbps */ - Value32 = BCM540X_AN_AD_1000BASET_HALF | BCM540X_AN_AD_1000BASET_FULL; + /* Advertise 1000Mbps */ + Value32 = BCM540X_AN_AD_1000BASET_HALF | BCM540X_AN_AD_1000BASET_FULL; #if INCLUDE_5701_AX_FIX - /* Bug: workaround for CRC error in gigabit mode when we are in */ - /* slave mode. This will force the PHY to operate in */ - /* master mode. */ - if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || - pDevice->ChipRevId == T3_CHIP_ID_5701_B0) - { - Value32 |= BCM540X_CONFIG_AS_MASTER | - BCM540X_ENABLE_CONFIG_AS_MASTER; - } + /* Bug: workaround for CRC error in gigabit mode when we are in */ + /* slave mode. This will force the PHY to operate in */ + /* master mode. */ + if(pDevice->ChipRevId == T3_CHIP_ID_5701_A0 || + pDevice->ChipRevId == T3_CHIP_ID_5701_B0) + { + Value32 |= BCM540X_CONFIG_AS_MASTER | + BCM540X_ENABLE_CONFIG_AS_MASTER; + } #endif - LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, Value32); - pDevice->advertising1000 = Value32; + LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, Value32); + pDevice->advertising1000 = Value32; } else { - if(LineSpeed == LM_LINE_SPEED_1000MBPS) - { - Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; - Value32 |= GetPhyAdFlowCntrlSettings(pDevice); + if(LineSpeed == LM_LINE_SPEED_1000MBPS) + { + Value32 = PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; + Value32 |= GetPhyAdFlowCntrlSettings(pDevice); - LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; + LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); + pDevice->advertising = Value32; - if(DuplexMode != LM_DUPLEX_MODE_FULL) - { - Value32 = BCM540X_AN_AD_1000BASET_HALF; - } - else - { - Value32 = BCM540X_AN_AD_1000BASET_FULL; - } + if(DuplexMode != LM_DUPLEX_MODE_FULL) + { + Value32 = BCM540X_AN_AD_1000BASET_HALF; + } + else + { + Value32 = BCM540X_AN_AD_1000BASET_FULL; + } - LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, Value32); - pDevice->advertising1000 = Value32; - } - else if(LineSpeed == LM_LINE_SPEED_100MBPS) - { - LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, 0); - pDevice->advertising1000 = 0; + LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, Value32); + pDevice->advertising1000 = Value32; + } + else if(LineSpeed == LM_LINE_SPEED_100MBPS) + { + LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, 0); + pDevice->advertising1000 = 0; - if(DuplexMode != LM_DUPLEX_MODE_FULL) - { - Value32 = PHY_AN_AD_100BASETX_HALF; - } - else - { - Value32 = PHY_AN_AD_100BASETX_FULL; - } + if(DuplexMode != LM_DUPLEX_MODE_FULL) + { + Value32 = PHY_AN_AD_100BASETX_HALF; + } + else + { + Value32 = PHY_AN_AD_100BASETX_FULL; + } - Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; - Value32 |= GetPhyAdFlowCntrlSettings(pDevice); + Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; + Value32 |= GetPhyAdFlowCntrlSettings(pDevice); - LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; - } - else if(LineSpeed == LM_LINE_SPEED_10MBPS) - { - LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, 0); - pDevice->advertising1000 = 0; + LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); + pDevice->advertising = Value32; + } + else if(LineSpeed == LM_LINE_SPEED_10MBPS) + { + LM_WritePhy(pDevice, BCM540X_1000BASET_CTRL_REG, 0); + pDevice->advertising1000 = 0; - if(DuplexMode != LM_DUPLEX_MODE_FULL) - { - Value32 = PHY_AN_AD_10BASET_HALF; - } - else - { - Value32 = PHY_AN_AD_10BASET_FULL; - } + if(DuplexMode != LM_DUPLEX_MODE_FULL) + { + Value32 = PHY_AN_AD_10BASET_HALF; + } + else + { + Value32 = PHY_AN_AD_10BASET_FULL; + } - Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; - Value32 |= GetPhyAdFlowCntrlSettings(pDevice); + Value32 |= PHY_AN_AD_PROTOCOL_802_3_CSMA_CD; + Value32 |= GetPhyAdFlowCntrlSettings(pDevice); - LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); - pDevice->advertising = Value32; - } + LM_WritePhy(pDevice, PHY_AN_AD_REG, Value32); + pDevice->advertising = Value32; + } } /* Force line speed if auto-negotiation is disabled. */ if(pDevice->DisableAutoNeg && LineSpeed != LM_LINE_SPEED_UNKNOWN) { - /* This code path is executed only when there is link. */ - pDevice->MediaType = MediaType; - pDevice->LineSpeed = LineSpeed; - pDevice->DuplexMode = DuplexMode; + /* This code path is executed only when there is link. */ + pDevice->MediaType = MediaType; + pDevice->LineSpeed = LineSpeed; + pDevice->DuplexMode = DuplexMode; - /* Force line seepd. */ - NewPhyCtrl = 0; - switch(LineSpeed) - { - case LM_LINE_SPEED_10MBPS: - NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_10MBPS; - break; - case LM_LINE_SPEED_100MBPS: - NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_100MBPS; - break; - case LM_LINE_SPEED_1000MBPS: - NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS; - break; - default: - NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS; - break; - } + /* Force line seepd. */ + NewPhyCtrl = 0; + switch(LineSpeed) + { + case LM_LINE_SPEED_10MBPS: + NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_10MBPS; + break; + case LM_LINE_SPEED_100MBPS: + NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_100MBPS; + break; + case LM_LINE_SPEED_1000MBPS: + NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS; + break; + default: + NewPhyCtrl |= PHY_CTRL_SPEED_SELECT_1000MBPS; + break; + } - if(DuplexMode == LM_DUPLEX_MODE_FULL) - { - NewPhyCtrl |= PHY_CTRL_FULL_DUPLEX_MODE; - } + if(DuplexMode == LM_DUPLEX_MODE_FULL) + { + NewPhyCtrl |= PHY_CTRL_FULL_DUPLEX_MODE; + } - /* Don't do anything if the PHY_CTRL is already what we wanted. */ - LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); - if(Value32 != NewPhyCtrl) - { - /* Temporary bring the link down before forcing line speed. */ - LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_LOOPBACK_MODE); + /* Don't do anything if the PHY_CTRL is already what we wanted. */ + LM_ReadPhy(pDevice, PHY_CTRL_REG, &Value32); + if(Value32 != NewPhyCtrl) + { + /* Temporary bring the link down before forcing line speed. */ + LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_LOOPBACK_MODE); - /* Wait for link to go down. */ - for(Cnt = 0; Cnt < 15000; Cnt++) - { - MM_Wait(10); + /* Wait for link to go down. */ + for(Cnt = 0; Cnt < 15000; Cnt++) + { + MM_Wait(10); - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); + LM_ReadPhy(pDevice, PHY_STATUS_REG, &Value32); - if(!(Value32 & PHY_STATUS_LINK_PASS)) - { - MM_Wait(40); - break; - } - } + if(!(Value32 & PHY_STATUS_LINK_PASS)) + { + MM_Wait(40); + break; + } + } - LM_WritePhy(pDevice, PHY_CTRL_REG, NewPhyCtrl); - MM_Wait(40); - } + LM_WritePhy(pDevice, PHY_CTRL_REG, NewPhyCtrl); + MM_Wait(40); + } } else { - LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_AUTO_NEG_ENABLE | - PHY_CTRL_RESTART_AUTO_NEG); + LM_WritePhy(pDevice, PHY_CTRL_REG, PHY_CTRL_AUTO_NEG_ENABLE | + PHY_CTRL_RESTART_AUTO_NEG); } return LM_STATUS_SUCCESS; } /* LM_ForceAutoNegBcm540xPhy */ - /******************************************************************************/ /* Description: */ /* */ @@ -5859,18 +5837,18 @@ /* Initialize the phy chip. */ switch(pDevice->PhyId & PHY_ID_MASK) { - case PHY_BCM5400_PHY_ID: - case PHY_BCM5401_PHY_ID: - case PHY_BCM5411_PHY_ID: - case PHY_BCM5701_PHY_ID: - case PHY_BCM5703_PHY_ID: - case PHY_BCM5704_PHY_ID: - LmStatus = LM_ForceAutoNegBcm540xPhy(pDevice, RequestedMediaType); - break; + case PHY_BCM5400_PHY_ID: + case PHY_BCM5401_PHY_ID: + case PHY_BCM5411_PHY_ID: + case PHY_BCM5701_PHY_ID: + case PHY_BCM5703_PHY_ID: + case PHY_BCM5704_PHY_ID: + LmStatus = LM_ForceAutoNegBcm540xPhy(pDevice, RequestedMediaType); + break; - default: - LmStatus = LM_STATUS_FAILURE; - break; + default: + LmStatus = LM_STATUS_FAILURE; + break; } return LmStatus; @@ -5882,123 +5860,123 @@ /* Return: */ /******************************************************************************/ LM_STATUS LM_LoadFirmware(PLM_DEVICE_BLOCK pDevice, - PT3_FWIMG_INFO pFwImg, - LM_UINT32 LoadCpu, - LM_UINT32 StartCpu) + PT3_FWIMG_INFO pFwImg, + LM_UINT32 LoadCpu, + LM_UINT32 StartCpu) { LM_UINT32 i; LM_UINT32 address; if (LoadCpu & T3_RX_CPU_ID) { - if (LM_HaltCpu(pDevice,T3_RX_CPU_ID) != LM_STATUS_SUCCESS) - { - return LM_STATUS_FAILURE; - } + if (LM_HaltCpu(pDevice,T3_RX_CPU_ID) != LM_STATUS_SUCCESS) + { + return LM_STATUS_FAILURE; + } - /* First of all clear scrach pad memory */ - for (i = 0; i < T3_RX_CPU_SPAD_SIZE; i+=4) - { - LM_RegWrInd(pDevice,T3_RX_CPU_SPAD_ADDR+i,0); - } + /* First of all clear scrach pad memory */ + for (i = 0; i < T3_RX_CPU_SPAD_SIZE; i+=4) + { + LM_RegWrInd(pDevice,T3_RX_CPU_SPAD_ADDR+i,0); + } - /* Copy code first */ - address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff); - for (i = 0; i <= pFwImg->Text.Length; i+=4) - { - LM_RegWrInd(pDevice,address+i, - ((LM_UINT32 *)pFwImg->Text.Buffer)[i/4]); - } + /* Copy code first */ + address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff); + for (i = 0; i <= pFwImg->Text.Length; i+=4) + { + LM_RegWrInd(pDevice,address+i, + ((LM_UINT32 *)pFwImg->Text.Buffer)[i/4]); + } - address = T3_RX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff); - for (i = 0; i <= pFwImg->ROnlyData.Length; i+=4) - { - LM_RegWrInd(pDevice,address+i, - ((LM_UINT32 *)pFwImg->ROnlyData.Buffer)[i/4]); - } + address = T3_RX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff); + for (i = 0; i <= pFwImg->ROnlyData.Length; i+=4) + { + LM_RegWrInd(pDevice,address+i, + ((LM_UINT32 *)pFwImg->ROnlyData.Buffer)[i/4]); + } - address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff); - for (i= 0; i <= pFwImg->Data.Length; i+=4) - { - LM_RegWrInd(pDevice,address+i, - ((LM_UINT32 *)pFwImg->Data.Buffer)[i/4]); - } + address = T3_RX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff); + for (i= 0; i <= pFwImg->Data.Length; i+=4) + { + LM_RegWrInd(pDevice,address+i, + ((LM_UINT32 *)pFwImg->Data.Buffer)[i/4]); + } } if (LoadCpu & T3_TX_CPU_ID) { - if (LM_HaltCpu(pDevice,T3_TX_CPU_ID) != LM_STATUS_SUCCESS) - { - return LM_STATUS_FAILURE; - } + if (LM_HaltCpu(pDevice,T3_TX_CPU_ID) != LM_STATUS_SUCCESS) + { + return LM_STATUS_FAILURE; + } - /* First of all clear scrach pad memory */ - for (i = 0; i < T3_TX_CPU_SPAD_SIZE; i+=4) - { - LM_RegWrInd(pDevice,T3_TX_CPU_SPAD_ADDR+i,0); - } + /* First of all clear scrach pad memory */ + for (i = 0; i < T3_TX_CPU_SPAD_SIZE; i+=4) + { + LM_RegWrInd(pDevice,T3_TX_CPU_SPAD_ADDR+i,0); + } - /* Copy code first */ - address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff); - for (i= 0; i <= pFwImg->Text.Length; i+=4) - { - LM_RegWrInd(pDevice,address+i, - ((LM_UINT32 *)pFwImg->Text.Buffer)[i/4]); - } + /* Copy code first */ + address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Text.Offset & 0xffff); + for (i= 0; i <= pFwImg->Text.Length; i+=4) + { + LM_RegWrInd(pDevice,address+i, + ((LM_UINT32 *)pFwImg->Text.Buffer)[i/4]); + } - address = T3_TX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff); - for (i= 0; i <= pFwImg->ROnlyData.Length; i+=4) - { - LM_RegWrInd(pDevice,address+i, - ((LM_UINT32 *)pFwImg->ROnlyData.Buffer)[i/4]); - } + address = T3_TX_CPU_SPAD_ADDR + (pFwImg->ROnlyData.Offset & 0xffff); + for (i= 0; i <= pFwImg->ROnlyData.Length; i+=4) + { + LM_RegWrInd(pDevice,address+i, + ((LM_UINT32 *)pFwImg->ROnlyData.Buffer)[i/4]); + } - address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff); - for (i= 0; i <= pFwImg->Data.Length; i+=4) - { - LM_RegWrInd(pDevice,address+i, - ((LM_UINT32 *)pFwImg->Data.Buffer)[i/4]); - } + address = T3_TX_CPU_SPAD_ADDR + (pFwImg->Data.Offset & 0xffff); + for (i= 0; i <= pFwImg->Data.Length; i+=4) + { + LM_RegWrInd(pDevice,address+i, + ((LM_UINT32 *)pFwImg->Data.Buffer)[i/4]); + } } if (StartCpu & T3_RX_CPU_ID) { - /* Start Rx CPU */ - REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); - REG_WR(pDevice,rxCpu.reg.PC,pFwImg->StartAddress); - for (i = 0 ; i < 5; i++) - { - if (pFwImg->StartAddress == REG_RD(pDevice,rxCpu.reg.PC)) - break; + /* Start Rx CPU */ + REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); + REG_WR(pDevice,rxCpu.reg.PC,pFwImg->StartAddress); + for (i = 0 ; i < 5; i++) + { + if (pFwImg->StartAddress == REG_RD(pDevice,rxCpu.reg.PC)) + break; - REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); - REG_WR(pDevice,rxCpu.reg.mode,CPU_MODE_HALT); - REG_WR(pDevice,rxCpu.reg.PC,pFwImg->StartAddress); - MM_Wait(1000); - } + REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); + REG_WR(pDevice,rxCpu.reg.mode,CPU_MODE_HALT); + REG_WR(pDevice,rxCpu.reg.PC,pFwImg->StartAddress); + MM_Wait(1000); + } - REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); - REG_WR(pDevice,rxCpu.reg.mode, 0); + REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); + REG_WR(pDevice,rxCpu.reg.mode, 0); } if (StartCpu & T3_TX_CPU_ID) { - /* Start Tx CPU */ - REG_WR(pDevice,txCpu.reg.state, 0xffffffff); - REG_WR(pDevice,txCpu.reg.PC,pFwImg->StartAddress); - for (i = 0 ; i < 5; i++) - { - if (pFwImg->StartAddress == REG_RD(pDevice,txCpu.reg.PC)) - break; + /* Start Tx CPU */ + REG_WR(pDevice,txCpu.reg.state, 0xffffffff); + REG_WR(pDevice,txCpu.reg.PC,pFwImg->StartAddress); + for (i = 0 ; i < 5; i++) + { + if (pFwImg->StartAddress == REG_RD(pDevice,txCpu.reg.PC)) + break; - REG_WR(pDevice,txCpu.reg.state, 0xffffffff); - REG_WR(pDevice,txCpu.reg.mode,CPU_MODE_HALT); - REG_WR(pDevice,txCpu.reg.PC,pFwImg->StartAddress); - MM_Wait(1000); - } + REG_WR(pDevice,txCpu.reg.state, 0xffffffff); + REG_WR(pDevice,txCpu.reg.mode,CPU_MODE_HALT); + REG_WR(pDevice,txCpu.reg.PC,pFwImg->StartAddress); + MM_Wait(1000); + } - REG_WR(pDevice,txCpu.reg.state, 0xffffffff); - REG_WR(pDevice,txCpu.reg.mode, 0); + REG_WR(pDevice,txCpu.reg.state, 0xffffffff); + REG_WR(pDevice,txCpu.reg.mode, 0); } return LM_STATUS_SUCCESS; @@ -6010,29 +5988,29 @@ if (cpu_number == T3_RX_CPU_ID) { - for (i = 0 ; i < 10000; i++) - { - REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); - REG_WR(pDevice,rxCpu.reg.mode,CPU_MODE_HALT); + for (i = 0 ; i < 10000; i++) + { + REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); + REG_WR(pDevice,rxCpu.reg.mode,CPU_MODE_HALT); - if (REG_RD(pDevice,rxCpu.reg.mode) & CPU_MODE_HALT) - break; - } + if (REG_RD(pDevice,rxCpu.reg.mode) & CPU_MODE_HALT) + break; + } - REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); - REG_WR(pDevice,rxCpu.reg.mode,CPU_MODE_HALT); - MM_Wait(10); + REG_WR(pDevice,rxCpu.reg.state, 0xffffffff); + REG_WR(pDevice,rxCpu.reg.mode,CPU_MODE_HALT); + MM_Wait(10); } else { - for (i = 0 ; i < 10000; i++) - { - REG_WR(pDevice,txCpu.reg.state, 0xffffffff); - REG_WR(pDevice,txCpu.reg.mode,CPU_MODE_HALT); + for (i = 0 ; i < 10000; i++) + { + REG_WR(pDevice,txCpu.reg.state, 0xffffffff); + REG_WR(pDevice,txCpu.reg.mode,CPU_MODE_HALT); - if (REG_RD(pDevice,txCpu.reg.mode) & CPU_MODE_HALT) - break; - } + if (REG_RD(pDevice,txCpu.reg.mode) & CPU_MODE_HALT) + break; + } } return (( i == 10000) ? LM_STATUS_FAILURE : LM_STATUS_SUCCESS); @@ -6049,10 +6027,10 @@ if(BlinkDurationSec == 0) { return 0; - } + } if(BlinkDurationSec > 120) - { - BlinkDurationSec = 120; + { + BlinkDurationSec = 120; } Oldcfg = REG_RD(pDevice, MacCtrl.LedCtrl); @@ -6060,7 +6038,7 @@ { if(j % 2) { - /* Turn on the LEDs. */ + /* Turn on the LEDs. */ REG_WR(pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED | LED_CTRL_1000MBPS_LED_ON | @@ -6072,20 +6050,20 @@ } else { - /* Turn off the LEDs. */ + /* Turn off the LEDs. */ REG_WR(pDevice, MacCtrl.LedCtrl, LED_CTRL_OVERRIDE_LINK_LED | LED_CTRL_OVERRIDE_TRAFFIC_LED); } #ifndef EMBEDDED - current->state = TASK_INTERRUPTIBLE; - if (schedule_timeout(HZ/2) != 0) { - ret = -EINTR; - break; - } + current->state = TASK_INTERRUPTIBLE; + if (schedule_timeout(HZ/2) != 0) { + ret = -EINTR; + break; + } #else - udelay(100000); /* 1s sleep */ + udelay(100000); /* 1s sleep */ #endif } REG_WR(pDevice, MacCtrl.LedCtrl, Oldcfg); @@ -6093,8 +6071,8 @@ } int t3_do_dma(PLM_DEVICE_BLOCK pDevice, - LM_PHYSICAL_ADDRESS host_addr_phy, int length, - int dma_read) + LM_PHYSICAL_ADDRESS host_addr_phy, int length, + int dma_read) { T3_DMA_DESC dma_desc; int i; @@ -6112,15 +6090,15 @@ if (dma_read) { - dma_desc.cqid_sqid = (T3_QID_RX_BD_COMP << 8) | - T3_QID_DMA_HIGH_PRI_READ; - REG_WR(pDevice, DmaRead.Mode, DMA_READ_MODE_ENABLE); + dma_desc.cqid_sqid = (T3_QID_RX_BD_COMP << 8) | + T3_QID_DMA_HIGH_PRI_READ; + REG_WR(pDevice, DmaRead.Mode, DMA_READ_MODE_ENABLE); } else { - dma_desc.cqid_sqid = (T3_QID_RX_DATA_COMP << 8) | - T3_QID_DMA_HIGH_PRI_WRITE; - REG_WR(pDevice, DmaWrite.Mode, DMA_WRITE_MODE_ENABLE); + dma_desc.cqid_sqid = (T3_QID_RX_DATA_COMP << 8) | + T3_QID_DMA_HIGH_PRI_WRITE; + REG_WR(pDevice, DmaWrite.Mode, DMA_WRITE_MODE_ENABLE); } dma_desc_addr = T3_NIC_DMA_DESC_POOL_ADDR; @@ -6128,28 +6106,28 @@ /* Writing this DMA descriptor to DMA memory */ for (i = 0; i < sizeof(T3_DMA_DESC); i += 4) { - value32 = *((PLM_UINT32) (((PLM_UINT8) &dma_desc) + i)); - MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_ADDR_REG, dma_desc_addr+i); - MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_DATA_REG, cpu_to_le32(value32)); + value32 = *((PLM_UINT32) (((PLM_UINT8) &dma_desc) + i)); + MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_ADDR_REG, dma_desc_addr+i); + MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_DATA_REG, cpu_to_le32(value32)); } MM_WriteConfig32(pDevice, T3_PCI_MEM_WIN_ADDR_REG, 0); if (dma_read) - REG_WR(pDevice, Ftq.DmaHighReadFtqFifoEnqueueDequeue, dma_desc_addr); + REG_WR(pDevice, Ftq.DmaHighReadFtqFifoEnqueueDequeue, dma_desc_addr); else - REG_WR(pDevice, Ftq.DmaHighWriteFtqFifoEnqueueDequeue, dma_desc_addr); + REG_WR(pDevice, Ftq.DmaHighWriteFtqFifoEnqueueDequeue, dma_desc_addr); for (i = 0; i < 40; i++) { - if (dma_read) - value32 = REG_RD(pDevice, Ftq.RcvBdCompFtqFifoEnqueueDequeue); - else - value32 = REG_RD(pDevice, Ftq.RcvDataCompFtqFifoEnqueueDequeue); + if (dma_read) + value32 = REG_RD(pDevice, Ftq.RcvBdCompFtqFifoEnqueueDequeue); + else + value32 = REG_RD(pDevice, Ftq.RcvDataCompFtqFifoEnqueueDequeue); - if ((value32 & 0xffff) == dma_desc_addr) - break; + if ((value32 & 0xffff) == dma_desc_addr) + break; - MM_Wait(10); + MM_Wait(10); } return LM_STATUS_SUCCESS; @@ -6157,65 +6135,65 @@ STATIC LM_STATUS LM_DmaTest(PLM_DEVICE_BLOCK pDevice, PLM_UINT8 pBufferVirt, - LM_PHYSICAL_ADDRESS BufferPhy, LM_UINT32 BufferSize) + LM_PHYSICAL_ADDRESS BufferPhy, LM_UINT32 BufferSize) { int j; LM_UINT32 *ptr; int dma_success = 0; if(T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5700 && - T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5701) + T3_ASIC_REV(pDevice->ChipRevId) != T3_ASIC_REV_5701) { - return LM_STATUS_SUCCESS; + return LM_STATUS_SUCCESS; } while (!dma_success) { - /* Fill data with incremental patterns */ - ptr = (LM_UINT32 *)pBufferVirt; - for (j = 0; j < BufferSize/4; j++) - *ptr++ = j; + /* Fill data with incremental patterns */ + ptr = (LM_UINT32 *)pBufferVirt; + for (j = 0; j < BufferSize/4; j++) + *ptr++ = j; - if (t3_do_dma(pDevice,BufferPhy,BufferSize, 1) == LM_STATUS_FAILURE) - { - return LM_STATUS_FAILURE; - } + if (t3_do_dma(pDevice,BufferPhy,BufferSize, 1) == LM_STATUS_FAILURE) + { + return LM_STATUS_FAILURE; + } - MM_Wait(40); - ptr = (LM_UINT32 *)pBufferVirt; - /* Fill data with zero */ - for (j = 0; j < BufferSize/4; j++) - *ptr++ = 0; + MM_Wait(40); + ptr = (LM_UINT32 *)pBufferVirt; + /* Fill data with zero */ + for (j = 0; j < BufferSize/4; j++) + *ptr++ = 0; - if (t3_do_dma(pDevice,BufferPhy,BufferSize, 0) == LM_STATUS_FAILURE) - { - return LM_STATUS_FAILURE; - } + if (t3_do_dma(pDevice,BufferPhy,BufferSize, 0) == LM_STATUS_FAILURE) + { + return LM_STATUS_FAILURE; + } - MM_Wait(40); - /* Check for data */ - ptr = (LM_UINT32 *)pBufferVirt; - for (j = 0; j < BufferSize/4; j++) - { - if (*ptr++ != j) - { - if ((pDevice->DmaReadWriteCtrl & DMA_CTRL_WRITE_BOUNDARY_MASK) - == DMA_CTRL_WRITE_BOUNDARY_DISABLE) - { - pDevice->DmaReadWriteCtrl = (pDevice->DmaReadWriteCtrl & - ~DMA_CTRL_WRITE_BOUNDARY_MASK) | - DMA_CTRL_WRITE_BOUNDARY_16; - REG_WR(pDevice, PciCfg.DmaReadWriteCtrl, - pDevice->DmaReadWriteCtrl); - break; - } - else - { - return LM_STATUS_FAILURE; - } - } - } - if (j == (BufferSize/4)) - dma_success = 1; + MM_Wait(40); + /* Check for data */ + ptr = (LM_UINT32 *)pBufferVirt; + for (j = 0; j < BufferSize/4; j++) + { + if (*ptr++ != j) + { + if ((pDevice->DmaReadWriteCtrl & DMA_CTRL_WRITE_BOUNDARY_MASK) + == DMA_CTRL_WRITE_BOUNDARY_DISABLE) + { + pDevice->DmaReadWriteCtrl = (pDevice->DmaReadWriteCtrl & + ~DMA_CTRL_WRITE_BOUNDARY_MASK) | + DMA_CTRL_WRITE_BOUNDARY_16; + REG_WR(pDevice, PciCfg.DmaReadWriteCtrl, + pDevice->DmaReadWriteCtrl); + break; + } + else + { + return LM_STATUS_FAILURE; + } + } + } + if (j == (BufferSize/4)) + dma_success = 1; } return LM_STATUS_SUCCESS; } diff --git a/drivers/tigon3.h b/drivers/tigon3.h index 8d30ac9..ea4367d 100644 --- a/drivers/tigon3.h +++ b/drivers/tigon3.h @@ -25,9 +25,9 @@ /* io defines */ #if !defined(BIG_ENDIAN_HOST) #define readl(addr) \ - (LONGSWAP((*(volatile unsigned int *)(addr)))) + (LONGSWAP((*(volatile unsigned int *)(addr)))) #define writel(b,addr) \ - ((*(volatile unsigned int *)(addr)) = (LONGSWAP(b))) + ((*(volatile unsigned int *)(addr)) = (LONGSWAP(b))) #else #if 0 /* !defined(PPC603) */ #define readl(addr) (*(volatile unsigned int*)(0xa0000000 + (unsigned long)(addr))) @@ -56,8 +56,6 @@ #endif - - /******************************************************************************/ /* Constants. */ /******************************************************************************/ @@ -95,7 +93,7 @@ #define BCM5700_BX_MIN_FRAG_BUF_SIZE 16 /* nice aligned size. */ #define BCM5700_BX_MIN_FRAG_BUF_SIZE_MASK (BCM5700_BX_MIN_FRAG_BUF_SIZE-1) #define BCM5700_BX_TX_COPY_BUF_SIZE (BCM5700_BX_MIN_FRAG_BUF_SIZE * \ - MAX_FRAGMENT_COUNT) + MAX_FRAGMENT_COUNT) /* MAGIC number. */ /* #define T3_MAGIC_NUM 'KevT' */ @@ -259,13 +257,13 @@ #define T3_NIC_MINI_RCV_BUFFER_DESC_ADDR_EXT_MEM 0xe000 #define T3_NIC_SND_BUFFER_DESC_SIZE (T3_SEND_RCB_ENTRY_COUNT * \ - sizeof(T3_SND_BD) / 4) + sizeof(T3_SND_BD) / 4) #define T3_NIC_STD_RCV_BUFFER_DESC_SIZE (T3_STD_RCV_RCB_ENTRY_COUNT * \ - sizeof(T3_RCV_BD) / 4) + sizeof(T3_RCV_BD) / 4) #define T3_NIC_JUMBO_RCV_BUFFER_DESC_SIZE (T3_JUMBO_RCV_RCB_ENTRY_COUNT * \ - sizeof(T3_EXT_RCV_BD) / 4) + sizeof(T3_EXT_RCV_BD) / 4) /* MBUF pool. */ @@ -321,7 +319,6 @@ } T3_FWIMG_INFO, *PT3_FWIMG_INFO; - /******************************************************************************/ /* Tigon3 PCI Registers. */ /******************************************************************************/ @@ -534,7 +531,6 @@ #define PHY_AN_EXPANSION_REG 0x06 - /******************************************************************************/ /* BCM5400 and BCM5401 phy info. */ /******************************************************************************/ @@ -559,17 +555,16 @@ #define PHY_ID_MODEL_MASK 0x000003f0 #define PHY_ID_REV_MASK 0x0000000f #define PHY_ID_MASK (PHY_ID_OUI_MASK | \ - PHY_ID_MODEL_MASK) + PHY_ID_MODEL_MASK) #define UNKNOWN_PHY_ID(x) ((((x) & PHY_ID_MASK) != PHY_BCM5400_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5401_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5411_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5701_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5703_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM5704_PHY_ID) && \ - (((x) & PHY_ID_MASK) != PHY_BCM8002_PHY_ID)) - + (((x) & PHY_ID_MASK) != PHY_BCM5401_PHY_ID) && \ + (((x) & PHY_ID_MASK) != PHY_BCM5411_PHY_ID) && \ + (((x) & PHY_ID_MASK) != PHY_BCM5701_PHY_ID) && \ + (((x) & PHY_ID_MASK) != PHY_BCM5703_PHY_ID) && \ + (((x) & PHY_ID_MASK) != PHY_BCM5704_PHY_ID) && \ + (((x) & PHY_ID_MASK) != PHY_BCM8002_PHY_ID)) /* 1000Base-T control register. */ @@ -697,7 +692,6 @@ #define BCM540X_INT_MASK_REG 0x1b - /******************************************************************************/ /* Register definitions. */ /******************************************************************************/ @@ -730,7 +724,6 @@ }T3_DMA_DESC, *PT3_DMA_DESC; - /******************************************************************************/ /* Ring control block. */ /******************************************************************************/ @@ -739,17 +732,17 @@ T3_64BIT_REGISTER HostRingAddr; union { - struct { + struct { #ifdef BIG_ENDIAN_HOST - T3_16BIT_REGISTER MaxLen; - T3_16BIT_REGISTER Flags; + T3_16BIT_REGISTER MaxLen; + T3_16BIT_REGISTER Flags; #else /* BIG_ENDIAN_HOST */ - T3_16BIT_REGISTER Flags; - T3_16BIT_REGISTER MaxLen; + T3_16BIT_REGISTER Flags; + T3_16BIT_REGISTER MaxLen; #endif - } s; + } s; - T3_32BIT_REGISTER MaxLen_Flags; + T3_32BIT_REGISTER MaxLen_Flags; } u; T3_32BIT_REGISTER NicRingAddr; @@ -759,7 +752,6 @@ #define T3_RCB_FLAG_RING_DISABLED BIT_1 - /******************************************************************************/ /* Status block. */ /******************************************************************************/ @@ -786,8 +778,8 @@ volatile LM_UINT16 RcvMiniConIdx; struct { - volatile LM_UINT16 SendConIdx; /* Send consumer index. */ - volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */ + volatile LM_UINT16 SendConIdx; /* Send consumer index. */ + volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */ } Idx[16]; #else /* BIG_ENDIAN_HOST */ volatile LM_UINT16 RcvJumboConIdx; @@ -797,14 +789,13 @@ volatile LM_UINT16 Reserved2; struct { - volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */ - volatile LM_UINT16 SendConIdx; /* Send consumer index. */ + volatile LM_UINT16 RcvProdIdx; /* Receive producer index. */ + volatile LM_UINT16 SendConIdx; /* Send consumer index. */ } Idx[16]; #endif } T3_STATUS_BLOCK, *PT3_STATUS_BLOCK; - /******************************************************************************/ /* Receive buffer descriptors. */ /******************************************************************************/ @@ -887,7 +878,6 @@ #define RCV_BD_FLAG_TCP_PACKET 0x4000 - /******************************************************************************/ /* Send buffer descriptor. */ /******************************************************************************/ @@ -896,31 +886,31 @@ T3_64BIT_HOST_ADDR HostAddr; union { - struct { + struct { #ifdef BIG_ENDIAN_HOST - LM_UINT16 Len; - LM_UINT16 Flags; + LM_UINT16 Len; + LM_UINT16 Flags; #else /* BIG_ENDIAN_HOST */ - LM_UINT16 Flags; - LM_UINT16 Len; + LM_UINT16 Flags; + LM_UINT16 Len; #endif - } s1; + } s1; - LM_UINT32 Len_Flags; + LM_UINT32 Len_Flags; } u1; union { - struct { + struct { #ifdef BIG_ENDIAN_HOST - LM_UINT16 Reserved; - LM_UINT16 VlanTag; + LM_UINT16 Reserved; + LM_UINT16 VlanTag; #else /* BIG_ENDIAN_HOST */ - LM_UINT16 VlanTag; - LM_UINT16 Reserved; + LM_UINT16 VlanTag; + LM_UINT16 Reserved; #endif - } s2; + } s2; - LM_UINT32 VlanTag; + LM_UINT32 VlanTag; } u2; } T3_SND_BD, *PT3_SND_BD; @@ -1116,7 +1106,6 @@ #define T3_MBUF_END ((T3_NIC_MBUF_POOL_ADDR + T3_NIC_MBUF_POOL_SIZE) >> 7) - /******************************************************************************/ /* Statistics block. */ /******************************************************************************/ @@ -1221,7 +1210,6 @@ } T3_STATS_BLOCK, *PT3_STATS_BLOCK; - /******************************************************************************/ /* PCI configuration registers. */ /******************************************************************************/ @@ -1463,8 +1451,8 @@ /* MAC addresses. */ struct { - T3_32BIT_REGISTER High; /* Upper 2 bytes. */ - T3_32BIT_REGISTER Low; /* Lower 4 bytes. */ + T3_32BIT_REGISTER High; /* Upper 2 bytes. */ + T3_32BIT_REGISTER Low; /* Lower 4 bytes. */ } MacAddr[4]; /* ACPI Mbuf pointer. */ @@ -1578,8 +1566,8 @@ /* Receive placement rules registers. */ struct { - T3_32BIT_REGISTER Rule; - T3_32BIT_REGISTER Value; + T3_32BIT_REGISTER Rule; + T3_32BIT_REGISTER Value; } RcvRules[16]; #define RCV_DISABLE_RULE_MASK 0x7fffffff @@ -1623,7 +1611,6 @@ } T3_MAC_CONTROL, *PT3_MAC_CONTROL; - /******************************************************************************/ /* Send data initiator control registers. */ /******************************************************************************/ @@ -1665,7 +1652,6 @@ } T3_SEND_DATA_INITIATOR, *PT3_SEND_DATA_INITIATOR; - /******************************************************************************/ /* Send data completion control registers. */ /******************************************************************************/ @@ -1680,7 +1666,6 @@ } T3_SEND_DATA_COMPLETION, *PT3_SEND_DATA_COMPLETION; - /******************************************************************************/ /* Send BD Ring Selector Control Registers. */ /******************************************************************************/ @@ -1707,7 +1692,6 @@ } T3_SEND_BD_SELECTOR, *PT3_SEND_BD_SELECTOR; - /******************************************************************************/ /* Send BD initiator control registers. */ /******************************************************************************/ @@ -1729,7 +1713,6 @@ } T3_SEND_BD_INITIATOR, *PT3_SEND_BD_INITIATOR; - /******************************************************************************/ /* Send BD Completion Control. */ /******************************************************************************/ @@ -1745,7 +1728,6 @@ } T3_SEND_BD_COMPLETION, *PT3_SEND_BD_COMPLETION; - /******************************************************************************/ /* Receive list placement control registers. */ /******************************************************************************/ @@ -1792,12 +1774,12 @@ LM_UINT8 Unused1[224]; struct { - T3_32BIT_REGISTER Head; - T3_32BIT_REGISTER Tail; - T3_32BIT_REGISTER Count; + T3_32BIT_REGISTER Head; + T3_32BIT_REGISTER Tail; + T3_32BIT_REGISTER Count; - /* Unused space. */ - LM_UINT8 Unused[4]; + /* Unused space. */ + LM_UINT8 Unused[4]; } RcvSelectorList[16]; /* Local statistics counter. */ @@ -1816,7 +1798,6 @@ } T3_RCV_LIST_PLACEMENT, *PT3_RCV_LIST_PLACEMENT; - /******************************************************************************/ /* Receive Data and Receive BD Initiator Control. */ /******************************************************************************/ @@ -1867,7 +1848,6 @@ } T3_RCV_DATA_BD_INITIATOR, *PT3_RCV_DATA_BD_INITIATOR; - /******************************************************************************/ /* Receive Data Completion Control Registes. */ /******************************************************************************/ @@ -1883,7 +1863,6 @@ } T3_RCV_DATA_COMPLETION, *PT3_RCV_DATA_COMPLETION; - /******************************************************************************/ /* Receive BD Initiator Control. */ /******************************************************************************/ @@ -1910,7 +1889,6 @@ } T3_RCV_BD_INITIATOR, *PT3_RCV_BD_INITIATOR; - /******************************************************************************/ /* Receive BD Completion Control Registers. */ /******************************************************************************/ @@ -1933,7 +1911,6 @@ } T3_RCV_BD_COMPLETION, *PT3_RCV_BD_COMPLETION; - /******************************************************************************/ /* Receive list selector control register. */ /******************************************************************************/ @@ -1952,7 +1929,6 @@ } T3_RCV_LIST_SELECTOR, *PT3_RCV_LIST_SELECTOR; - /******************************************************************************/ /* Mbuf cluster free registers. */ /******************************************************************************/ @@ -1969,7 +1945,6 @@ } T3_MBUF_CLUSTER_FREE, *PT3_MBUF_CLUSTER_FREE; - /******************************************************************************/ /* Host coalescing control registers. */ /******************************************************************************/ @@ -2056,7 +2031,6 @@ } T3_HOST_COALESCING, *PT3_HOST_COALESCING; - /******************************************************************************/ /* Memory arbiter registers. */ /******************************************************************************/ @@ -2076,7 +2050,6 @@ } T3_MEM_ARBITER, *PT3_MEM_ARBITER; - /******************************************************************************/ /* Buffer manager control register. */ /******************************************************************************/ @@ -2122,7 +2095,6 @@ } T3_BUFFER_MANAGER, *PT3_BUFFER_MANAGER; - /******************************************************************************/ /* Read DMA control registers. */ /******************************************************************************/ @@ -2215,7 +2187,6 @@ } T3_DMA_WRITE, *PT3_DMA_WRITE; - /******************************************************************************/ /* Mailbox registers. */ /******************************************************************************/ @@ -2358,7 +2329,6 @@ } T3_FTQ, *PT3_FTQ; - /******************************************************************************/ /* Message signaled interrupt registers. */ /******************************************************************************/ @@ -2376,7 +2346,6 @@ } T3_MSG_SIGNALED_INT, *PT3_MSG_SIGNALED_INT; - /******************************************************************************/ /* DMA Completion registes. */ /******************************************************************************/ @@ -2391,7 +2360,6 @@ } T3_DMA_COMPLETION, *PT3_DMA_COMPLETION; - /******************************************************************************/ /* GRC registers. */ /******************************************************************************/ @@ -2603,7 +2571,6 @@ } T3_FIRST_32K_SRAM, *PT3_FIRST_32K_SRAM; - /******************************************************************************/ /* Memory layout. */ /******************************************************************************/ @@ -2705,12 +2672,12 @@ /* Address register. This register is located */ /* in the PCI configuration space. */ union { /* 0x8000 */ - T3_FIRST_32K_SRAM First32k; + T3_FIRST_32K_SRAM First32k; - /* Use the memory window base address register to determine the */ - /* MBUF segment. */ - LM_UINT32 Mbuf[32768/4]; - LM_UINT32 MemBlock32K[32768/4]; + /* Use the memory window base address register to determine the */ + /* MBUF segment. */ + LM_UINT32 Mbuf[32768/4]; + LM_UINT32 MemBlock32K[32768/4]; } uIntMem; } T3_STD_MEM_MAP, *PT3_STD_MEM_MAP; @@ -2736,7 +2703,6 @@ DECLARE_QUEUE_TYPE(LM_TX_PACKET_Q, MAX_TX_PACKET_DESC_COUNT); - /******************************************************************************/ /* Tx counters. */ /******************************************************************************/ @@ -2752,7 +2718,6 @@ } LM_TX_COUNTERS, *PLM_TX_COUNTERS; - /******************************************************************************/ /* Rx counters. */ /******************************************************************************/ @@ -2773,7 +2738,6 @@ } LM_RX_COUNTERS, *PLM_RX_COUNTERS; - /******************************************************************************/ /* Receive producer rings. */ /******************************************************************************/ @@ -2786,7 +2750,6 @@ } T3_RCV_PROD_RING, *PT3_RCV_PROD_RING; - /******************************************************************************/ /* Packet descriptor. */ /******************************************************************************/ @@ -2806,31 +2769,30 @@ LM_UINT16 VlanTag; union { - /* Send info. */ - struct { - /* Set up by UM. */ - LM_UINT32 FragCount; + /* Send info. */ + struct { + /* Set up by UM. */ + LM_UINT32 FragCount; - } Tx; + } Tx; - /* Receive info. */ - struct { - /* This descriptor belongs to either Std, Mini, or Jumbo ring. */ - T3_RCV_PROD_RING RcvProdRing; + /* Receive info. */ + struct { + /* This descriptor belongs to either Std, Mini, or Jumbo ring. */ + T3_RCV_PROD_RING RcvProdRing; - /* Receive buffer size */ - LM_UINT32 RxBufferSize; + /* Receive buffer size */ + LM_UINT32 RxBufferSize; - /* Checksum information. */ - LM_UINT16 IpChecksum; - LM_UINT16 TcpUdpChecksum; + /* Checksum information. */ + LM_UINT16 IpChecksum; + LM_UINT16 TcpUdpChecksum; - } Rx; + } Rx; } u; } LM_PACKET; - /******************************************************************************/ /* Tigon3 device block. */ /******************************************************************************/ @@ -3322,9 +3284,9 @@ #define T3_QID_SW_TYPE2 17 LM_STATUS LM_LoadFirmware(PLM_DEVICE_BLOCK pDevice, - PT3_FWIMG_INFO pFwImg, - LM_UINT32 LoadCpu, - LM_UINT32 StartCpu); + PT3_FWIMG_INFO pFwImg, + LM_UINT32 LoadCpu, + LM_UINT32 StartCpu); /******************************************************************************/ /* NIC register read/write macros. */ @@ -3427,19 +3389,19 @@ #define MB_REG_WR(pDevice, OffsetName, Value32) \ ((pDevice)->UndiFix) ? \ - LM_RegWrInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName)+0x5600, \ - Value32) : \ - (void) __raw_writel(Value32, &((pDevice)->pMemView->OffsetName)) + LM_RegWrInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName)+0x5600, \ + Value32) : \ + (void) __raw_writel(Value32, &((pDevice)->pMemView->OffsetName)) #define MB_REG_RD(pDevice, OffsetName) \ (((pDevice)->UndiFix) ? \ - LM_RegRdInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName)+0x5600) : \ - __raw_readl(&((pDevice)->pMemView->OffsetName))) + LM_RegRdInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName)+0x5600) : \ + __raw_readl(&((pDevice)->pMemView->OffsetName))) #define REG_RD(pDevice, OffsetName) \ (((pDevice)->UndiFix) ? \ - LM_RegRdInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName)) : \ - __raw_readl(&((pDevice)->pMemView->OffsetName))) + LM_RegRdInd(pDevice, OFFSETOF(T3_STD_MEM_MAP, OffsetName)) : \ + __raw_readl(&((pDevice)->pMemView->OffsetName))) #if PCIX_TARGET_WORKAROUND @@ -3466,4 +3428,3 @@ LM_MemWrInd(pDevice, Offset, Value32) #endif /* TIGON3_H */ - diff --git a/dtt/Makefile b/dtt/Makefile index 6b9d499..0a33478 100644 --- a/dtt/Makefile +++ b/dtt/Makefile @@ -42,4 +42,3 @@ sinclude .depend ######################################################################### - diff --git a/dtt/ds1621.c b/dtt/ds1621.c index 5c25f64..bf30e9c 100644 --- a/dtt/ds1621.c +++ b/dtt/ds1621.c @@ -29,7 +29,7 @@ #ifdef CONFIG_DTT_DS1621 #if !defined(CFG_EEPROM_PAGE_WRITE_ENABLE) || \ - (CFG_EEPROM_PAGE_WRITE_BITS < 1) + (CFG_EEPROM_PAGE_WRITE_BITS < 1) # error "CFG_EEPROM_PAGE_WRITE_ENABLE must be defined and CFG_EEPROM_PAGE_WRITE_BITS must be greater than 1 to use CONFIG_DTT_DS1621" #endif #include @@ -188,4 +188,3 @@ #endif /* CONFIG_DTT_DS1621 */ - diff --git a/dtt/lm75.c b/dtt/lm75.c index 9930a8b..59daa45 100644 --- a/dtt/lm75.c +++ b/dtt/lm75.c @@ -178,4 +178,3 @@ } /* dtt_get_temp() */ #endif /* CONFIG_DTT_LM75 */ - diff --git a/examples/82559_eeprom.c b/examples/82559_eeprom.c index c710cd3..d66b3dd 100644 --- a/examples/82559_eeprom.c +++ b/examples/82559_eeprom.c @@ -188,7 +188,7 @@ static unsigned int hatoi(char *p, char **errp) { unsigned int res = 0; - + while (1) { switch (*p) { case 'a': @@ -218,7 +218,7 @@ case '8': case '9': res |= (*p - '0'); - break; + break; default: if (errp) { *errp = p; @@ -231,11 +231,11 @@ } res <<= 4; } - + if (errp) { *errp = NULL; } - + return res; } @@ -244,7 +244,7 @@ char tmp[3]; int i; char *err; - + for (i=0;i<6;i++) { if (in[i*3+2] == 0 && i == 5) { out[i] = hatoi(&in[i*3], &err); @@ -261,60 +261,59 @@ } } else { return NULL; - } + } } - + return out; } static u32 read_config_dword(int bus, int dev, int func, int reg) -{ +{ u32 res; - + outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), 0xcf8); res = inl(0xcfc); - outl(0, 0xcf8); - return res; + outl(0, 0xcf8); + return res; } static u16 read_config_word(int bus, int dev, int func, int reg) -{ +{ u32 res; - + outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), 0xcf8); res = inw(0xcfc + (reg & 2)); - outl(0, 0xcf8); - return res; + outl(0, 0xcf8); + return res; } static void write_config_word(int bus, int dev, int func, int reg, u16 data) -{ - +{ + outl(0x80000000|(bus&0xff)<<16|(dev&0x1f)<<11|(func&7)<<8|(reg&0xfc), 0xcf8); outw(data, 0xcfc + (reg & 2)); - outl(0, 0xcf8); + outl(0, 0xcf8); } - int main (int argc, char *argv[]) { unsigned char *eth_addr; char buf[6]; int instance; - + if (argc != 2) { mon_printf ("call with base Ethernet address\n"); return 1; } - - + + eth_addr = gethwaddr(argv[1], buf); if (NULL == eth_addr) { mon_printf ("Can not parse ethernet address\n"); @@ -323,8 +322,8 @@ if (eth_addr[5] & 0x01) { mon_printf("Base Ethernet address must be even\n"); } - - + + for (instance = 0; instance < 2; instance ++) { unsigned int io_addr; unsigned char mac[6]; @@ -335,19 +334,19 @@ mon_printf("ETH%d IO=0x%04x\n", instance, bar1 & ~3); } io_addr = (bar1 & (~3L)); - - - write_config_word(0, 6+instance, 0, 4, + + + write_config_word(0, 6+instance, 0, 4, read_config_word(0, 6+instance, 0, 4) | 1); mon_printf("ETH%d CMD %04x\n", instance, read_config_word(0, 6+instance, 0, 4)); - + memcpy(mac, eth_addr, 6); mac[5] += instance; - + mon_printf("got io=%04x, ha=%02x:%02x:%02x:%02x:%02x:%02x\n", - io_addr, mac[0], mac[1], mac[2], - mac[3], mac[4], mac[5]); + io_addr, mac[0], mac[1], mac[2], + mac[3], mac[4], mac[5]); reset_eeprom(io_addr, mac); } return 0; diff --git a/examples/eepro100_eeprom.c b/examples/eepro100_eeprom.c index 656b238..2302003 100644 --- a/examples/eepro100_eeprom.c +++ b/examples/eepro100_eeprom.c @@ -207,4 +207,3 @@ mon_printf("done\n"); return 0; } - diff --git a/examples/mem_to_mem_idma2intr.c b/examples/mem_to_mem_idma2intr.c index 93c6f77..3f0fd37 100644 --- a/examples/mem_to_mem_idma2intr.c +++ b/examples/mem_to_mem_idma2intr.c @@ -27,7 +27,6 @@ */ - #include #include diff --git a/examples/syscall.S b/examples/syscall.S index 2af6f48..f319409 100644 --- a/examples/syscall.S +++ b/examples/syscall.S @@ -72,7 +72,7 @@ #ifdef CONFIG_I386 /* XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX */ #define SYMBOL_NAME(X) X #define SYMBOL_NAME_LABEL(X) X##: - + #define SYSCALL(name,n) \ .globl SYMBOL_NAME(name) ; \ SYMBOL_NAME_LABEL(name) ; \ @@ -96,8 +96,8 @@ .text /* - * Make sure these functions are in the same order as they - * appear in the "include/syscall.h" header file !!! + * Make sure these functions are in the same order as they + * appear in the "include/syscall.h" header file !!! */ SYSCALL(mon_getc,SYSCALL_GETC) diff --git a/examples/timer.c b/examples/timer.c index 33f53c0..bfe3d66 100644 --- a/examples/timer.c +++ b/examples/timer.c @@ -104,7 +104,6 @@ #define CPMT_MR_CE_ANY 0x00C0 /* Capt./Interr. on any TIN edge*/ - /* * which CPM timer to use - index starts at 0 (= timer 1) */ diff --git a/fs/Makefile b/fs/Makefile index 27ee6fb..204be2c 100644 --- a/fs/Makefile +++ b/fs/Makefile @@ -27,4 +27,3 @@ .depend all: @for dir in $(SUBDIRS) ; do \ $(MAKE) -C $$dir $@ ; done - diff --git a/fs/fat/file.c b/fs/fat/file.c index d375ba2..f999ac5 100644 --- a/fs/fat/file.c +++ b/fs/fat/file.c @@ -1,5 +1,5 @@ -/* - * file.c +/* + * file.c * * Mini "VFS" by Marcus Sundberg * @@ -143,7 +143,7 @@ return 0; } - + int file_detectfs(void) { diff --git a/fs/fdos/Makefile b/fs/fdos/Makefile index af0fff1..c25e744 100644 --- a/fs/fdos/Makefile +++ b/fs/fdos/Makefile @@ -28,7 +28,7 @@ LIB = libfdos.a AOBJS = -COBJS = fat.o vfat.o dev.o fdos.o fs.o subdir.o +COBJS = fat.o vfat.o dev.o fdos.o fs.o subdir.o OBJS = $(AOBJS) $(COBJS) #CPPFLAGS += diff --git a/fs/fdos/dev.c b/fs/fdos/dev.c index 809156a..5dea5cd 100644 --- a/fs/fdos/dev.c +++ b/fs/fdos/dev.c @@ -38,7 +38,7 @@ static int lastwhere; /*----------------------------------------------------------------------------- - * dev_open -- + * dev_open -- *----------------------------------------------------------------------------- */ int dev_open (void) @@ -57,17 +57,17 @@ /* Si on ne desire pas lire a la position courante, il faut un seek */ if (where != lastwhere) { - if (!fdc_fdos_seek (where)) { - PRINTF ("seek error in dev_read"); - lastwhere = -1; - return (-1); - } + if (!fdc_fdos_seek (where)) { + PRINTF ("seek error in dev_read"); + lastwhere = -1; + return (-1); + } } - + if (!fdc_fdos_read (buffer, len)) { - PRINTF ("read error\n"); - lastwhere = -1; - return (-1); + PRINTF ("read error\n"); + lastwhere = -1; + return (-1); } lastwhere = where + len; return (0); @@ -84,110 +84,110 @@ /* Display Boot header */ PRINTF ("Jump to boot code 0x%02x 0x%02x 0x%02x\n", - boot -> jump [0], boot -> jump [1], boot -> jump[2]); + boot -> jump [0], boot -> jump [1], boot -> jump[2]); PRINTF ("OEM name & version '%*.*s'\n", - BANNER_LG, BANNER_LG, boot -> banner ); + BANNER_LG, BANNER_LG, boot -> banner ); PRINTF ("Bytes per sector hopefully 512 %d\n", - __le16_to_cpu (boot -> secsiz)); + __le16_to_cpu (boot -> secsiz)); PRINTF ("Cluster size in sectors %d\n", - boot -> clsiz); + boot -> clsiz); PRINTF ("Number of reserved (boot) sectors %d\n", - __le16_to_cpu (boot -> nrsvsect)); + __le16_to_cpu (boot -> nrsvsect)); PRINTF ("Number of FAT tables hopefully 2 %d\n", - boot -> nfat); + boot -> nfat); PRINTF ("Number of directory slots %d\n", - __le16_to_cpu (boot -> dirents)); + __le16_to_cpu (boot -> dirents)); PRINTF ("Total sectors on disk %d\n", - __le16_to_cpu (boot -> psect)); + __le16_to_cpu (boot -> psect)); PRINTF ("Media descriptor=first byte of FAT %d\n", - boot -> descr); + boot -> descr); PRINTF ("Sectors in FAT %d\n", - __le16_to_cpu (boot -> fatlen)); + __le16_to_cpu (boot -> fatlen)); PRINTF ("Sectors/track %d\n", - __le16_to_cpu (boot -> nsect)); + __le16_to_cpu (boot -> nsect)); PRINTF ("Heads %d\n", - __le16_to_cpu (boot -> nheads)); + __le16_to_cpu (boot -> nheads)); PRINTF ("number of hidden sectors %d\n", - __le32_to_cpu (boot -> nhs)); + __le32_to_cpu (boot -> nhs)); PRINTF ("big total sectors %d\n", - __le32_to_cpu (boot -> bigsect)); + __le32_to_cpu (boot -> bigsect)); PRINTF ("physical drive ? %d\n", - boot -> physdrive); + boot -> physdrive); PRINTF ("reserved %d\n", - boot -> reserved); + boot -> reserved); PRINTF ("dos > 4.0 diskette %d\n", - boot -> dos4); + boot -> dos4); PRINTF ("serial number %d\n", - __le32_to_cpu (boot -> serial)); + __le32_to_cpu (boot -> serial)); PRINTF ("disk label %*.*s\n", - LABEL_LG, LABEL_LG, boot -> label); + LABEL_LG, LABEL_LG, boot -> label); PRINTF ("FAT type %8.8s\n", - boot -> fat_type); + boot -> fat_type); PRINTF ("reserved by 2M %d\n", - boot -> res_2m); + boot -> res_2m); PRINTF ("2M checksum (not used) %d\n", - boot -> CheckSum); + boot -> CheckSum); PRINTF ("2MF format version %d\n", - boot -> fmt_2mf); + boot -> fmt_2mf); PRINTF ("1 if write track after format %d\n", - boot -> wt); + boot -> wt); PRINTF ("data transfer rate on track 0 %d\n", - boot -> rate_0); + boot -> rate_0); PRINTF ("data transfer rate on track<>0 %d\n", - boot -> rate_any); + boot -> rate_any); PRINTF ("offset to boot program %d\n", - __le16_to_cpu (boot -> BootP)); + __le16_to_cpu (boot -> BootP)); PRINTF ("T1: information for track 0 %d\n", - __le16_to_cpu (boot -> Infp0)); + __le16_to_cpu (boot -> Infp0)); PRINTF ("T2: information for track<>0 %d\n", - __le16_to_cpu (boot -> InfpX)); + __le16_to_cpu (boot -> InfpX)); PRINTF ("T3: track sectors size table %d\n", - __le16_to_cpu (boot -> InfTm)); + __le16_to_cpu (boot -> InfTm)); PRINTF ("Format date 0x%04x\n", - __le16_to_cpu (boot -> DateF)); + __le16_to_cpu (boot -> DateF)); PRINTF ("Format time 0x%04x\n", - __le16_to_cpu (boot -> TimeF)); - + __le16_to_cpu (boot -> TimeF)); + /* information is extracted from boot sector */ heads = __le16_to_cpu (boot -> nheads); sectors = __le16_to_cpu (boot -> nsect); fs -> tot_sectors = __le32_to_cpu (boot -> bigsect); if (__le16_to_cpu (boot -> psect) != 0) { - fs -> tot_sectors = __le16_to_cpu (boot -> psect); + fs -> tot_sectors = __le16_to_cpu (boot -> psect); } - + sect_per_track = heads * sectors; tracks = (fs -> tot_sectors + sect_per_track - 1) / sect_per_track; - + BootP = __le16_to_cpu (boot -> BootP); Infp0 = __le16_to_cpu (boot -> Infp0); InfpX = __le16_to_cpu (boot -> InfpX); InfTm = __le16_to_cpu (boot -> InfTm); - - if (boot -> dos4 == EXTENDED_BOOT && - strncmp( boot->banner,"2M", 2 ) == 0 && - BootP < SZ_STD_SECTOR && - Infp0 < SZ_STD_SECTOR && - InfpX < SZ_STD_SECTOR && - InfTm < SZ_STD_SECTOR && - BootP >= InfTm + 2 && - InfTm >= InfpX && - InfpX >= Infp0 && - Infp0 >= 76 ) { - return (-1); + if (boot -> dos4 == EXTENDED_BOOT && + strncmp( boot->banner,"2M", 2 ) == 0 && + BootP < SZ_STD_SECTOR && + Infp0 < SZ_STD_SECTOR && + InfpX < SZ_STD_SECTOR && + InfTm < SZ_STD_SECTOR && + BootP >= InfTm + 2 && + InfTm >= InfpX && + InfpX >= Infp0 && + Infp0 >= 76 ) { + + return (-1); } if (heads != NB_HEADS || - tracks != NB_TRACKS || - sectors != NB_SECTORS || - __le16_to_cpu (boot -> secsiz) != SZ_STD_SECTOR || - fs -> tot_sectors == 0 || - (fs -> tot_sectors % sectors) != 0) { - return (-1); + tracks != NB_TRACKS || + sectors != NB_SECTORS || + __le16_to_cpu (boot -> secsiz) != SZ_STD_SECTOR || + fs -> tot_sectors == 0 || + (fs -> tot_sectors % sectors) != 0) { + return (-1); } - + return (0); } diff --git a/fs/fdos/dos.h b/fs/fdos/dos.h index 71701c9..7b27b01 100644 --- a/fs/fdos/dos.h +++ b/fs/fdos/dos.h @@ -34,7 +34,7 @@ #define MAX_PATH 128 /* Max size of the MSDOS PATH */ #define MAX_DIR_SECS 64 /* Taille max d'un repertoire (en */ - /* secteurs) */ + /* secteurs) */ /* Misc. definitions */ #define DELMARK '\xe5' #define EXTENDED_BOOT (0x29) @@ -119,7 +119,6 @@ } __attribute__ ((packed)) Directory_t; - #define MAX_VFAT_SUBENTRIES 20 #define VSE_NAMELEN 13 @@ -145,7 +144,7 @@ struct vfat_subentry { unsigned char id; /* VSE_LAST pour la fin, VSE_MASK */ - /* pour un VSE */ + /* pour un VSE */ char text1 [VSE1SIZE * 2]; /* Caracteres encodes sur 16 bits */ unsigned char attribute; /* 0x0f pour les VFAT */ unsigned char hash1; /* toujours 0 */ @@ -161,7 +160,7 @@ int status; /* is now a bit map of 32 bits */ int subentries; unsigned char sum; /* no need to remember the sum for each */ - /* entry, it is the same anyways */ + /* entry, it is the same anyways */ } __attribute__ ((packed)) ; /* Conversion macros */ @@ -174,4 +173,3 @@ #endif - diff --git a/fs/fdos/fat.c b/fs/fdos/fat.c index 42df755..2ef2371 100644 --- a/fs/fdos/fat.c +++ b/fs/fdos/fat.c @@ -33,24 +33,24 @@ /*----------------------------------------------------------------------------- - * fat_decode -- + * fat_decode -- *----------------------------------------------------------------------------- */ unsigned int fat_decode (Fs_t *fs, unsigned int num) { unsigned int start = num * 3 / 2; unsigned char *address = fs -> fat_buf + start; - + if (num < 2 || start + 1 > (fs -> fat_len * SZ_STD_SECTOR)) - return 1; - + return 1; + if (num & 1) - return ((address [1] & 0xff) << 4) | ((address [0] & 0xf0 ) >> 4); + return ((address [1] & 0xff) << 4) | ((address [0] & 0xf0 ) >> 4); else - return ((address [1] & 0xf) << 8) | (address [0] & 0xff ); + return ((address [1] & 0xf) << 8) | (address [0] & 0xff ); } /*----------------------------------------------------------------------------- - * check_fat -- + * check_fat -- *----------------------------------------------------------------------------- */ static int check_fat (Fs_t *fs) @@ -59,48 +59,48 @@ /* Cluster verification */ for (i = 3 ; i < fs -> num_clus; i++){ - f = fat_decode (fs, i); - if (f < FAT12_LAST && f > fs -> num_clus){ - /* Wrong cluster number detected */ - return (-1); - } + f = fat_decode (fs, i); + if (f < FAT12_LAST && f > fs -> num_clus){ + /* Wrong cluster number detected */ + return (-1); + } } return (0); } /*----------------------------------------------------------------------------- - * read_one_fat -- + * read_one_fat -- *----------------------------------------------------------------------------- */ static int read_one_fat (BootSector_t *boot, Fs_t *fs, int nfat) { if (dev_read (fs -> fat_buf, - (fs -> fat_start + nfat * fs -> fat_len), - fs -> fat_len) < 0) { - return (-1); + (fs -> fat_start + nfat * fs -> fat_len), + fs -> fat_len) < 0) { + return (-1); } if (fs -> fat_buf [0] || fs -> fat_buf [1] || fs -> fat_buf [2]) { - if ((fs -> fat_buf [0] != boot -> descr && - (fs -> fat_buf [0] != 0xf9 || boot -> descr != MEDIA_STD)) || - fs -> fat_buf [0] < MEDIA_STD){ - /* Unknown Media */ - return (-1); - } - if (fs -> fat_buf [1] != 0xff || fs -> fat_buf [2] != 0xff){ - /* FAT doesn't start with good values */ - return (-1); - } + if ((fs -> fat_buf [0] != boot -> descr && + (fs -> fat_buf [0] != 0xf9 || boot -> descr != MEDIA_STD)) || + fs -> fat_buf [0] < MEDIA_STD){ + /* Unknown Media */ + return (-1); + } + if (fs -> fat_buf [1] != 0xff || fs -> fat_buf [2] != 0xff){ + /* FAT doesn't start with good values */ + return (-1); + } } if (fs -> num_clus >= FAT12_MAX_NB) { - /* Too much clusters */ - return (-1); + /* Too much clusters */ + return (-1); } return check_fat (fs); } /*----------------------------------------------------------------------------- - * read_fat -- + * read_fat -- *----------------------------------------------------------------------------- */ int read_fat (BootSector_t *boot, Fs_t *fs) @@ -111,35 +111,32 @@ /* Allocate Fat Buffer */ buflen = fs -> fat_len * SZ_STD_SECTOR; if (fs -> fat_buf) { - free (fs -> fat_buf); + free (fs -> fat_buf); } if ((fs -> fat_buf = malloc (buflen)) == NULL) { - return (-1); + return (-1); } /* Try to read each Fat */ for (i = 0; i< fs -> nb_fat; i++){ - if (read_one_fat (boot, fs, i) == 0) { - /* Fat is OK */ - fs -> num_fat = i; - break; - } + if (read_one_fat (boot, fs, i) == 0) { + /* Fat is OK */ + fs -> num_fat = i; + break; + } } if (i == fs -> nb_fat){ - return (-1); + return (-1); } - + if (fs -> fat_len > (((fs -> num_clus + 2) * - (FAT_BITS / 4) -1 ) / 2 / - SZ_STD_SECTOR + 1)) { - return (-1); + (FAT_BITS / 4) -1 ) / 2 / + SZ_STD_SECTOR + 1)) { + return (-1); } return (0); } - - - #endif diff --git a/fs/fdos/fdos.c b/fs/fdos/fdos.c index 8963f42..a29f43d 100644 --- a/fs/fdos/fdos.c +++ b/fs/fdos/fdos.c @@ -37,7 +37,7 @@ File_t file; /*----------------------------------------------------------------------------- - * dos_open -- + * dos_open -- *----------------------------------------------------------------------------- */ int dos_open(char *name) @@ -45,59 +45,59 @@ int lg; int entry; char *fname; - + /* We need to suppress the " char around the name */ if (name [0] == '"') { - name ++; + name ++; } lg = strlen (name); if (name [lg - 1] == '"') { - name [lg - 1] = '\0'; + name [lg - 1] = '\0'; } /* Open file system */ if (fs_init (&fs) < 0) { - return -1; + return -1; } /* Init the file descriptor */ file.name = name; file.fs = &fs; - + /* find the subdirectory containing the file */ if (open_subdir (&file) < 0) { - return (-1); + return (-1); } fname = basename (name); /* if we try to open root directory */ if (*fname == '\0') { - file.file = file.subdir; - return (0); + file.file = file.subdir; + return (0); } - + /* find the file in the subdir */ entry = 0; if (vfat_lookup (&file.subdir, - file.fs, - &file.file.dir, - &entry, - 0, - fname, - ACCEPT_DIR | ACCEPT_PLAIN | SINGLE | DO_OPEN, - 0, - &file.file) != 0) { - /* File not found */ - printf ("File not found\n"); - return (-1); + file.fs, + &file.file.dir, + &entry, + 0, + fname, + ACCEPT_DIR | ACCEPT_PLAIN | SINGLE | DO_OPEN, + 0, + &file.file) != 0) { + /* File not found */ + printf ("File not found\n"); + return (-1); } return 0; } /*----------------------------------------------------------------------------- - * dos_read -- + * dos_read -- *----------------------------------------------------------------------------- */ int dos_read (ulong addr) @@ -106,27 +106,27 @@ /* Try to boot a directory ? */ if (file.file.dir.attr & (ATTR_DIRECTORY | ATTR_VOLUME)) { - printf ("Unable to boot %s !!\n", file.name); - return (-1); + printf ("Unable to boot %s !!\n", file.name); + return (-1); } while (read < file.file.FileSize) { - PRINTF ("read_file (%ld)\n", (file.file.FileSize - read)); - nb = read_file (&fs, - &file.file, - (char *)addr + read, - read, - (file.file.FileSize - read)); - PRINTF ("read_file -> %d\n", nb); - if (nb < 0) { - printf ("read error\n"); - return (-1); - } - read += nb; + PRINTF ("read_file (%ld)\n", (file.file.FileSize - read)); + nb = read_file (&fs, + &file.file, + (char *)addr + read, + read, + (file.file.FileSize - read)); + PRINTF ("read_file -> %d\n", nb); + if (nb < 0) { + printf ("read error\n"); + return (-1); + } + read += nb; } return (read); } /*----------------------------------------------------------------------------- - * dos_dir -- + * dos_dir -- *----------------------------------------------------------------------------- */ int dos_dir (void) @@ -134,39 +134,39 @@ int entry; Directory_t dir; char *name; - - + + if ((file.file.dir.attr & ATTR_DIRECTORY) == 0) { - printf ("%s: not a directory !!\n", file.name); - return (1); + printf ("%s: not a directory !!\n", file.name); + return (1); } entry = 0; if ((name = malloc (MAX_VNAMELEN + 1)) == NULL) { - PRINTF ("Allcation error\n"); - return (1); + PRINTF ("Allcation error\n"); + return (1); } - + while (vfat_lookup (&file.file, - file.fs, - &dir, - &entry, - 0, - NULL, - ACCEPT_DIR | ACCEPT_PLAIN | MATCH_ANY, - name, - NULL) == 0) { - /* Display file info */ - printf ("%3.3s %9d %s %02d %04d %02d:%02d:%02d %s\n", - (dir.attr & ATTR_DIRECTORY) ? "dir" : " ", - __le32_to_cpu (dir.size), - month [DOS_MONTH (&dir) - 1], - DOS_DAY (&dir), - DOS_YEAR (&dir), - DOS_HOUR (&dir), - DOS_MINUTE (&dir), - DOS_SEC (&dir), - name); - + file.fs, + &dir, + &entry, + 0, + NULL, + ACCEPT_DIR | ACCEPT_PLAIN | MATCH_ANY, + name, + NULL) == 0) { + /* Display file info */ + printf ("%3.3s %9d %s %02d %04d %02d:%02d:%02d %s\n", + (dir.attr & ATTR_DIRECTORY) ? "dir" : " ", + __le32_to_cpu (dir.size), + month [DOS_MONTH (&dir) - 1], + DOS_DAY (&dir), + DOS_YEAR (&dir), + DOS_HOUR (&dir), + DOS_MINUTE (&dir), + DOS_SEC (&dir), + name); + } free (name); return (0); diff --git a/fs/fdos/fdos.h b/fs/fdos/fdos.h index 18076d8..e28c22f 100644 --- a/fs/fdos/fdos.h +++ b/fs/fdos/fdos.h @@ -41,25 +41,25 @@ int cluster_size; int num_clus; - + int fat_start; int fat_len; int nb_fat; int num_fat; - + int dir_start; int dir_len; unsigned char *fat_buf; - + } Fs_t; /* Data structure describing one file system slot */ typedef struct slot { int (*map) (struct fs *fs, - struct slot *file, - int where, - int *len); + struct slot *file, + int where, + int *len); unsigned long FileSize; unsigned short int FirstAbsCluNr; @@ -89,24 +89,24 @@ /* vfat.c */ int vfat_lookup (Slot_t *dir, - Fs_t *fs, - Directory_t *dirent, - int *entry, - int *vfat_start, - char *filename, - int flags, - char *outname, - Slot_t *file); + Fs_t *fs, + Directory_t *dirent, + int *entry, + int *vfat_start, + char *filename, + int flags, + char *outname, + Slot_t *file); /* subdir.c */ char *basename (char *name); int open_subdir (File_t *desc); int open_file (Slot_t *file, Directory_t *dir); int read_file (Fs_t *fs, - Slot_t *file, - char *buf, - int where, - int len); + Slot_t *file, + char *buf, + int where, + int len); void init_subdir (void); /* fs.c */ @@ -114,4 +114,3 @@ #endif - diff --git a/fs/fdos/fs.c b/fs/fdos/fs.c index 68bbde0..3b9d09e 100644 --- a/fs/fdos/fs.c +++ b/fs/fdos/fs.c @@ -33,16 +33,16 @@ /*----------------------------------------------------------------------------- - * fill_fs -- Read info on file system + * fill_fs -- Read info on file system *----------------------------------------------------------------------------- */ static int fill_fs (BootSector_t *boot, Fs_t *fs) { - + fs -> fat_start = __le16_to_cpu (boot -> nrsvsect); fs -> fat_len = __le16_to_cpu (boot -> fatlen); fs -> nb_fat = boot -> nfat; - + fs -> dir_start = fs -> fat_start + fs -> nb_fat * fs -> fat_len; fs -> dir_len = __le16_to_cpu (boot -> dirents) * MDIR_SIZE / SZ_STD_SECTOR; fs -> cluster_size = boot -> clsiz; @@ -52,7 +52,7 @@ } /*----------------------------------------------------------------------------- - * fs_init -- + * fs_init -- *----------------------------------------------------------------------------- */ int fs_init (Fs_t *fs) @@ -61,60 +61,58 @@ /* Initialize physical device */ if (dev_open () < 0) { - PRINTF ("Unable to initialize the fdc\n"); - return (-1); + PRINTF ("Unable to initialize the fdc\n"); + return (-1); } init_subdir (); - + /* Allocate space for read the boot sector */ if ((boot = (BootSector_t *)malloc (sizeof (BootSector_t))) == NULL) { - PRINTF ("Unable to allocate space for boot sector\n"); - return (-1); + PRINTF ("Unable to allocate space for boot sector\n"); + return (-1); } - + /* read boot sector */ if (dev_read (boot, 0, 1)){ - PRINTF ("Error during boot sector read\n"); - free (boot); - return (-1); + PRINTF ("Error during boot sector read\n"); + free (boot); + return (-1); } /* we verify it'a a DOS diskette */ if (boot -> jump [0] != JUMP_0_1 && boot -> jump [0] != JUMP_0_2) { - PRINTF ("Not a DOS diskette\n"); - free (boot); - return (-1); + PRINTF ("Not a DOS diskette\n"); + free (boot); + return (-1); } if (boot -> descr < MEDIA_STD) { - /* We handle only recent medias (type F0) */ - PRINTF ("unrecognized diskette type\n"); - free (boot); - return (-1); + /* We handle only recent medias (type F0) */ + PRINTF ("unrecognized diskette type\n"); + free (boot); + return (-1); } if (check_dev (boot, fs) < 0) { - PRINTF ("Bad diskette\n"); - free (boot); - return (-1); + PRINTF ("Bad diskette\n"); + free (boot); + return (-1); } - - if (fill_fs (boot, fs) < 0) { - free (boot); - return (-1); + if (fill_fs (boot, fs) < 0) { + free (boot); + + return (-1); } /* Read FAT */ if (read_fat (boot, fs) < 0) { - free (boot); - return (-1); + free (boot); + return (-1); } free (boot); return (0); } - - #endif diff --git a/fs/fdos/subdir.c b/fs/fdos/subdir.c index 5911f2e..97b2504 100644 --- a/fs/fdos/subdir.c +++ b/fs/fdos/subdir.c @@ -38,11 +38,11 @@ #define min(x,y) ((x)<(y)?(x):(y)) static int descend (Slot_t *parent, - Fs_t *fs, - char *path); + Fs_t *fs, + char *path); /*----------------------------------------------------------------------------- - * init_subdir -- + * init_subdir -- *----------------------------------------------------------------------------- */ void init_subdir (void) @@ -50,7 +50,7 @@ cache_sect = -1; } /*----------------------------------------------------------------------------- - * basename -- + * basename -- *----------------------------------------------------------------------------- */ char *basename (char *name) @@ -58,32 +58,32 @@ register char *cptr; if (!name || !*name) { - return (""); + return (""); } - + for (cptr= name; *cptr++; ); while (--cptr >= name) { if (*cptr == '/') { - return (cptr + 1); + return (cptr + 1); } } return(name); } /*----------------------------------------------------------------------------- - * root_map -- + * root_map -- *----------------------------------------------------------------------------- */ static int root_map (Fs_t *fs, Slot_t *file, int where, int *len) { *len = min (*len, fs -> dir_len * SZ_STD_SECTOR - where); if (*len < 0 ) { - *len = 0; - return (-1); + *len = 0; + return (-1); } return fs -> dir_start * SZ_STD_SECTOR + where; } /*----------------------------------------------------------------------------- - * normal_map -- + * normal_map -- *----------------------------------------------------------------------------- */ static int normal_map (Fs_t *fs, Slot_t *file, int where, int *len) @@ -102,60 +102,60 @@ *len = min (*len, file -> FileSize - where); if (*len < 0 ) { - *len = 0; - return (0); + *len = 0; + return (0); } if (file -> FirstAbsCluNr < 2){ - *len = 0; - return (0); + *len = 0; + return (0); } RelCluNr = where / clus_size; - + if (RelCluNr >= file -> PreviousRelCluNr){ - CurCluNr = file -> PreviousRelCluNr; - AbsCluNr = file -> PreviousAbsCluNr; + CurCluNr = file -> PreviousRelCluNr; + AbsCluNr = file -> PreviousAbsCluNr; } else { - CurCluNr = 0; - AbsCluNr = file -> FirstAbsCluNr; + CurCluNr = 0; + AbsCluNr = file -> FirstAbsCluNr; } NrClu = (offset + *len - 1) / clus_size; while (CurCluNr <= RelCluNr + NrClu) { - if (CurCluNr == RelCluNr){ - /* we have reached the beginning of our zone. Save - * coordinates */ - file -> PreviousRelCluNr = RelCluNr; - file -> PreviousAbsCluNr = AbsCluNr; - } - NewCluNr = fat_decode (fs, AbsCluNr); - if (NewCluNr == 1 || NewCluNr == 0) { - PRINTF("Fat problem while decoding %d %x\n", - AbsCluNr, NewCluNr); - return (-1); - } - if (CurCluNr == RelCluNr + NrClu) { - break; - } + if (CurCluNr == RelCluNr){ + /* we have reached the beginning of our zone. Save + * coordinates */ + file -> PreviousRelCluNr = RelCluNr; + file -> PreviousAbsCluNr = AbsCluNr; + } + NewCluNr = fat_decode (fs, AbsCluNr); + if (NewCluNr == 1 || NewCluNr == 0) { + PRINTF("Fat problem while decoding %d %x\n", + AbsCluNr, NewCluNr); + return (-1); + } + if (CurCluNr == RelCluNr + NrClu) { + break; + } - if (CurCluNr < RelCluNr && NewCluNr == FAT12_END) { - *len = 0; - return 0; - } + if (CurCluNr < RelCluNr && NewCluNr == FAT12_END) { + *len = 0; + return 0; + } - if (CurCluNr >= RelCluNr && NewCluNr != AbsCluNr + 1) - break; - CurCluNr++; - AbsCluNr = NewCluNr; + if (CurCluNr >= RelCluNr && NewCluNr != AbsCluNr + 1) + break; + CurCluNr++; + AbsCluNr = NewCluNr; } *len = min (*len, (1 + CurCluNr - RelCluNr) * clus_size - offset); return (((file -> PreviousAbsCluNr - 2) * fs -> cluster_size + - fs -> dir_start + fs -> dir_len) * - SZ_STD_SECTOR + offset); + fs -> dir_start + fs -> dir_len) * + SZ_STD_SECTOR + offset); } /*----------------------------------------------------------------------------- * open_subdir -- open the subdir containing the file @@ -166,13 +166,13 @@ char *pathname; char *tmp, *s, *path; char terminator; - + if ((pathname = (char *)malloc (MAX_PATH)) == NULL) { - return (-1); + return (-1); } - + strcpy (pathname, desc -> name); - + /* Suppress file name */ tmp = basename (pathname); *tmp = '\0'; @@ -182,68 +182,68 @@ desc -> subdir.FileSize = -1; desc -> subdir.map = root_map; desc -> subdir.dir.attr = ATTR_DIRECTORY; - + tmp = pathname; for (s = tmp; ; ++s) { - if (*s == '/' || *s == '\0') { - path = tmp; - terminator = *s; - *s = '\0'; - if (s != tmp && strcmp (path,".")) { - if (descend (&desc -> subdir, desc -> fs, path) < 0) { - free (pathname); - return (-1); - } - } - if (terminator == 0) { - break; - } - tmp = s + 1; - } + if (*s == '/' || *s == '\0') { + path = tmp; + terminator = *s; + *s = '\0'; + if (s != tmp && strcmp (path,".")) { + if (descend (&desc -> subdir, desc -> fs, path) < 0) { + free (pathname); + return (-1); + } + } + if (terminator == 0) { + break; + } + tmp = s + 1; + } } free (pathname); return (0); } /*----------------------------------------------------------------------------- - * descend -- + * descend -- *----------------------------------------------------------------------------- */ static int descend (Slot_t *parent, - Fs_t *fs, - char *path) + Fs_t *fs, + char *path) { int entry; Slot_t SubDir; if(path[0] == '\0' || strcmp (path, ".") == 0) { - return (0); + return (0); } - + entry = 0; if (vfat_lookup (parent, - fs, - &(SubDir.dir), - &entry, - 0, - path, - ACCEPT_DIR | SINGLE | DO_OPEN, - 0, - &SubDir) == 0) { - *parent = SubDir; - return (0); + fs, + &(SubDir.dir), + &entry, + 0, + path, + ACCEPT_DIR | SINGLE | DO_OPEN, + 0, + &SubDir) == 0) { + *parent = SubDir; + return (0); } if (strcmp(path, "..") == 0) { - parent -> FileSize = -1; - parent -> FirstAbsCluNr = 0; - parent -> map = root_map; - return (0); + parent -> FileSize = -1; + parent -> FirstAbsCluNr = 0; + parent -> map = root_map; + return (0); } return (-1); } /*----------------------------------------------------------------------------- - * open_file -- + * open_file -- *----------------------------------------------------------------------------- */ int open_file (Slot_t *file, Directory_t *dir) @@ -255,17 +255,17 @@ if(first == 0 && (dir -> attr & ATTR_DIRECTORY) != 0) { - file -> FirstAbsCluNr = 0; - file -> FileSize = -1; - file -> map = root_map; - return (0); + file -> FirstAbsCluNr = 0; + file -> FileSize = -1; + file -> map = root_map; + return (0); } - + if ((dir -> attr & ATTR_DIRECTORY) != 0) { - size = (1UL << 31) - 1; + size = (1UL << 31) - 1; } else { - size = __le32_to_cpu (dir -> size); + size = __le32_to_cpu (dir -> size); } file -> map = normal_map; @@ -275,73 +275,73 @@ return (0); } /*----------------------------------------------------------------------------- - * read_file -- + * read_file -- *----------------------------------------------------------------------------- */ int read_file (Fs_t *fs, - Slot_t *file, - char *buf, - int where, - int len) + Slot_t *file, + char *buf, + int where, + int len) { int pos; int read, nb, sect, offset; - + pos = file -> map (fs, file, where, &len); if (pos < 0) { - return -1; + return -1; } if (len == 0) { - return (0); + return (0); } /* Compute sector number */ sect = pos / SZ_STD_SECTOR; offset = pos % SZ_STD_SECTOR; read = 0; - + if (offset) { - /* Read doesn't start at the sector beginning. We need to use our */ - /* cache */ - if (sect != cache_sect) { - if (dev_read (cache, sect, 1) < 0) { - return (-1); - } - cache_sect = sect; - } - nb = min (len, SZ_STD_SECTOR - offset); - - memcpy (buf, cache + offset, nb); - read += nb; - len -= nb; - sect += 1; + /* Read doesn't start at the sector beginning. We need to use our */ + /* cache */ + if (sect != cache_sect) { + if (dev_read (cache, sect, 1) < 0) { + return (-1); + } + cache_sect = sect; + } + nb = min (len, SZ_STD_SECTOR - offset); + + memcpy (buf, cache + offset, nb); + read += nb; + len -= nb; + sect += 1; } if (len > SZ_STD_SECTOR) { - nb = (len - 1) / SZ_STD_SECTOR; - if (dev_read (buf + read, sect, nb) < 0) { - return ((read) ? read : -1); - } - /* update sector position */ - sect += nb; + nb = (len - 1) / SZ_STD_SECTOR; + if (dev_read (buf + read, sect, nb) < 0) { + return ((read) ? read : -1); + } + /* update sector position */ + sect += nb; - /* Update byte position */ - nb *= SZ_STD_SECTOR; - read += nb; - len -= nb; + /* Update byte position */ + nb *= SZ_STD_SECTOR; + read += nb; + len -= nb; } if (len) { - if (sect != cache_sect) { - if (dev_read (cache, sect, 1) < 0) { - return ((read) ? read : -1); - cache_sect = -1; - } - cache_sect = sect; - } - - memcpy (buf + read, cache, len); - read += len; + if (sect != cache_sect) { + if (dev_read (cache, sect, 1) < 0) { + return ((read) ? read : -1); + cache_sect = -1; + } + cache_sect = sect; + } + + memcpy (buf + read, cache, len); + read += len; } return (read); } diff --git a/fs/fdos/vfat.c b/fs/fdos/vfat.c index f828795..46a464b 100644 --- a/fs/fdos/vfat.c +++ b/fs/fdos/vfat.c @@ -32,10 +32,10 @@ #include "fdos.h" static int dir_read (Fs_t *fs, - Slot_t *dir, - Directory_t *dirent, - int num, - struct vfat_state *v); + Slot_t *dir, + Directory_t *dirent, + int num, + struct vfat_state *v); static int unicode_read (char *in, char *out, int num); static int match (const char *s, const char *p); @@ -45,7 +45,7 @@ /*----------------------------------------------------------------------------- - * clear_vfat -- + * clear_vfat -- *----------------------------------------------------------------------------- */ static void clear_vfat (struct vfat_state *v) @@ -55,18 +55,18 @@ } /*----------------------------------------------------------------------------- - * vfat_lookup -- + * vfat_lookup -- *----------------------------------------------------------------------------- */ int vfat_lookup (Slot_t *dir, - Fs_t *fs, - Directory_t *dirent, - int *entry, - int *vfat_start, - char *filename, - int flags, - char *outname, - Slot_t *file) + Fs_t *fs, + Directory_t *dirent, + int *entry, + int *vfat_start, + char *filename, + int flags, + char *outname, + Slot_t *file) { int found; struct vfat_state vfat; @@ -74,92 +74,92 @@ int vfat_present = 0; if (*entry == -1) { - return -1; + return -1; } found = 0; clear_vfat (&vfat); while (1) { - if (dir_read (fs, dir, dirent, *entry, &vfat) < 0) { - if (vfat_start) { - *vfat_start = *entry; - } - break; - } - (*entry)++; + if (dir_read (fs, dir, dirent, *entry, &vfat) < 0) { + if (vfat_start) { + *vfat_start = *entry; + } + break; + } + (*entry)++; - /* Empty slot */ - if (dirent -> name[0] == '\0'){ - if (vfat_start == 0) { - break; - } - continue; - } + /* Empty slot */ + if (dirent -> name[0] == '\0'){ + if (vfat_start == 0) { + break; + } + continue; + } - if (dirent -> attr == ATTR_VSE) { - /* VSE entry, continue */ - continue; - } - if ( (dirent -> name [0] == DELMARK) || - ((dirent -> attr & ATTR_DIRECTORY) != 0 && - (flags & ACCEPT_DIR) == 0) || - ((dirent -> attr & ATTR_VOLUME) != 0 && - (flags & ACCEPT_LABEL) == 0) || - (((dirent -> attr & (ATTR_DIRECTORY | ATTR_VOLUME)) == 0) && - (flags & ACCEPT_PLAIN) == 0)) { - clear_vfat (&vfat); - continue; - } + if (dirent -> attr == ATTR_VSE) { + /* VSE entry, continue */ + continue; + } + if ( (dirent -> name [0] == DELMARK) || + ((dirent -> attr & ATTR_DIRECTORY) != 0 && + (flags & ACCEPT_DIR) == 0) || + ((dirent -> attr & ATTR_VOLUME) != 0 && + (flags & ACCEPT_LABEL) == 0) || + (((dirent -> attr & (ATTR_DIRECTORY | ATTR_VOLUME)) == 0) && + (flags & ACCEPT_PLAIN) == 0)) { + clear_vfat (&vfat); + continue; + } - vfat_present = check_vfat (&vfat, dirent); - if (vfat_start) { - *vfat_start = *entry - 1; - if (vfat_present) { - *vfat_start -= vfat.subentries; - } - } + vfat_present = check_vfat (&vfat, dirent); + if (vfat_start) { + *vfat_start = *entry - 1; + if (vfat_present) { + *vfat_start -= vfat.subentries; + } + } - if (dirent -> attr & ATTR_VOLUME) { - strncpy (newfile, dirent -> name, 8); - newfile [8] = '\0'; - strncat (newfile, dirent -> ext, 3); - newfile [11] = '\0'; - } - else { - conv_name (dirent -> name, dirent -> ext, dirent -> Case, newfile); - } + if (dirent -> attr & ATTR_VOLUME) { + strncpy (newfile, dirent -> name, 8); + newfile [8] = '\0'; + strncat (newfile, dirent -> ext, 3); + newfile [11] = '\0'; + } + else { + conv_name (dirent -> name, dirent -> ext, dirent -> Case, newfile); + } - if (flags & MATCH_ANY) { - found = 1; - break; - } + if (flags & MATCH_ANY) { + found = 1; + break; + } - if ((vfat_present && match (vfat.name, filename)) || - (match (newfile, filename))) { - found = 1; - break; - } - clear_vfat (&vfat); + if ((vfat_present && match (vfat.name, filename)) || + (match (newfile, filename))) { + found = 1; + break; + } + clear_vfat (&vfat); } if (found) { - if ((flags & DO_OPEN) && file) { - if (open_file (file, dirent) < 0) { - return (-1); - } - } - if (outname) { - if (vfat_present) { - strcpy (outname, vfat.name); - } - else { - strcpy (outname, newfile); - } - } - return (0); /* File found */ + if ((flags & DO_OPEN) && file) { + if (open_file (file, dirent) < 0) { + return (-1); + } + } + if (outname) { + if (vfat_present) { + strcpy (outname, vfat.name); + } + else { + strcpy (outname, newfile); + } + } + return (0); /* File found */ } else { - *entry = -1; - return -1; /* File not found */ + *entry = -1; + return -1; /* File not found */ } } @@ -168,147 +168,147 @@ *----------------------------------------------------------------------------- */ static int dir_read (Fs_t *fs, - Slot_t *dir, - Directory_t *dirent, - int num, - struct vfat_state *v) + Slot_t *dir, + Directory_t *dirent, + int num, + struct vfat_state *v) { /* read the directory entry */ if (read_file (fs, - dir, - (char *)dirent, - num * MDIR_SIZE, - MDIR_SIZE) != MDIR_SIZE) { - return (-1); + dir, + (char *)dirent, + num * MDIR_SIZE, + MDIR_SIZE) != MDIR_SIZE) { + return (-1); } if (v && (dirent -> attr == ATTR_VSE)) { - struct vfat_subentry *vse; - unsigned char id, last_flag; - char *c; + struct vfat_subentry *vse; + unsigned char id, last_flag; + char *c; - vse = (struct vfat_subentry *) dirent; - id = vse -> id & VSE_MASK; - last_flag = (vse -> id & VSE_LAST); - if (id > MAX_VFAT_SUBENTRIES) { - /* Invalid VSE entry */ - return (-1); - } + vse = (struct vfat_subentry *) dirent; + id = vse -> id & VSE_MASK; + last_flag = (vse -> id & VSE_LAST); + if (id > MAX_VFAT_SUBENTRIES) { + /* Invalid VSE entry */ + return (-1); + } - /* Decode VSE */ - if(v -> sum != vse -> sum) { - clear_vfat (v); - v -> sum = vse -> sum; - } + /* Decode VSE */ + if(v -> sum != vse -> sum) { + clear_vfat (v); + v -> sum = vse -> sum; + } - - v -> status |= 1 << (id - 1); - if (last_flag) { - v -> subentries = id; - } - c = &(v -> name [VSE_NAMELEN * (id - 1)]); - c += unicode_read (vse->text1, c, VSE1SIZE); - c += unicode_read (vse->text2, c, VSE2SIZE); - c += unicode_read (vse->text3, c, VSE3SIZE); - - if (last_flag) { - *c = '\0'; /* Null terminate long name */ - } - + v -> status |= 1 << (id - 1); + if (last_flag) { + v -> subentries = id; + } + + c = &(v -> name [VSE_NAMELEN * (id - 1)]); + c += unicode_read (vse->text1, c, VSE1SIZE); + c += unicode_read (vse->text2, c, VSE2SIZE); + c += unicode_read (vse->text3, c, VSE3SIZE); + + if (last_flag) { + *c = '\0'; /* Null terminate long name */ + } + } return (0); } /*----------------------------------------------------------------------------- - * unicode_read -- + * unicode_read -- *----------------------------------------------------------------------------- */ static int unicode_read (char *in, char *out, int num) { int j; - + for (j = 0; j < num; ++j) { - if (in [1]) - *out = '_'; - else - *out = in [0]; - out ++; - in += 2; + if (in [1]) + *out = '_'; + else + *out = in [0]; + out ++; + in += 2; } return num; } /*----------------------------------------------------------------------------- - * match -- + * match -- *----------------------------------------------------------------------------- */ static int match (const char *s, const char *p) { for (; *p != '\0'; ) { - if (toupper (*s) != toupper (*p)) { - return (0); - } - p++; - s++; + if (toupper (*s) != toupper (*p)) { + return (0); + } + p++; + s++; } - + if (*s != '\0') { - return (0); + return (0); } else { - return (1); + return (1); } } /*----------------------------------------------------------------------------- - * sum_shortname -- + * sum_shortname -- *----------------------------------------------------------------------------- */ static unsigned char sum_shortname (char *name) { unsigned char sum; int j; - + for (j = sum = 0; j < 11; ++j) { - sum = ((sum & 1) ? 0x80 : 0) + (sum >> 1) + - (name [j] ? name [j] : ' '); + sum = ((sum & 1) ? 0x80 : 0) + (sum >> 1) + + (name [j] ? name [j] : ' '); } return (sum); } /*----------------------------------------------------------------------------- - * check_vfat -- + * check_vfat -- * Return 1 if long name is valid, 0 else *----------------------------------------------------------------------------- */ static int check_vfat (struct vfat_state *v, Directory_t *dir) { char name[12]; - + if (v -> subentries == 0) { - return 0; + return 0; } - + strncpy (name, dir -> name, 8); strncpy (name + 8, dir -> ext, 3); name [11] = '\0'; - + if (v -> sum != sum_shortname (name)) { - return 0; + return 0; } - + if( (v -> status & ((1 << v -> subentries) - 1)) != - (1 << v -> subentries) - 1) { - return 0; + (1 << v -> subentries) - 1) { + return 0; } v->name [VSE_NAMELEN * v -> subentries] = 0; - + return 1; } /*----------------------------------------------------------------------------- - * conv_name -- + * conv_name -- *----------------------------------------------------------------------------- */ static char *conv_name (char *name, char *ext, char Case, char *ans) @@ -318,37 +318,37 @@ i = 0; while (i < 8 && name [i] != ' ' && name [i] != '\0') { - tname [i] = name [i]; - i++; + tname [i] = name [i]; + i++; } tname [i] = '\0'; - + if (Case & BASECASE) { - for (i = 0; i < 8 && tname [i]; i++) { - tname [i] = tolower (tname [i]); - } + for (i = 0; i < 8 && tname [i]; i++) { + tname [i] = tolower (tname [i]); + } } i = 0; while (i < 3 && ext [i] != ' ' && ext [i] != '\0') { - text [i] = ext [i]; - i++; + text [i] = ext [i]; + i++; } text [i] = '\0'; if (Case & EXTCASE){ - for (i = 0; i < 3 && text [i]; i++) { - text [i] = tolower (text [i]); - } + for (i = 0; i < 3 && text [i]; i++) { + text [i] = tolower (text [i]); + } } if (*text) { - strcpy (ans, tname); - strcat (ans, "."); - strcat (ans, text); + strcpy (ans, tname); + strcat (ans, "."); + strcat (ans, text); } else { - strcpy(ans, tname); + strcpy(ans, tname); } return (ans); } diff --git a/fs/jffs2/jffs2_1pass.c b/fs/jffs2/jffs2_1pass.c index a5d9583..3fd4e52 100644 --- a/fs/jffs2/jffs2_1pass.c +++ b/fs/jffs2/jffs2_1pass.c @@ -802,7 +802,7 @@ putLabeledWord("\tbuild_list: compr = ", jNode->compr); putLabeledWord("\tbuild_list: usercompr = ", jNode->usercompr); putLabeledWord("\tbuild_list: flags = ", jNode->flags); - putLabeledWord("\tbuild_list: offset = ", b->offset); // FIXME: ? [RS] + putLabeledWord("\tbuild_list: offset = ", b->offset); /* FIXME: ? [RS] */ b = b->next; } } @@ -832,7 +832,7 @@ putLabeledWord("\tbuild_list: type = ", jDir->type); putLabeledWord("\tbuild_list: node_crc = ", jDir->node_crc); putLabeledWord("\tbuild_list: name_crc = ", jDir->name_crc); - putLabeledWord("\tbuild_list: offset = ", b->offset); // FIXME: ? [RS] + putLabeledWord("\tbuild_list: offset = ", b->offset); /* FIXME: ? [RS] */ b = b->next; } } @@ -935,9 +935,6 @@ } - - - static u32 jffs2_1pass_fill_info(struct b_lists * pL, struct b_jffs2_info * piL) { @@ -965,7 +962,6 @@ } - static struct b_lists * jffs2_get_list(struct part_info * part, const char *who) { @@ -1005,9 +1001,6 @@ } - - - /* Load a file from flash into memory. fname can be a full path */ u32 jffs2_1pass_load(char *dest, struct part_info * part, const char *fname) diff --git a/fs/jffs2/jffs2_private.h b/fs/jffs2/jffs2_private.h index c6d5fe3..d53e576 100644 --- a/fs/jffs2/jffs2_private.h +++ b/fs/jffs2/jffs2_private.h @@ -42,48 +42,48 @@ hdr_crc(struct jffs2_unknown_node *node) { #if 1 - u32 crc = crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_unknown_node) - 4); + u32 crc = crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_unknown_node) - 4); #else /* what's the semantics of this? why is this here? */ - u32 crc = crc32_no_comp(~0, (unsigned char *)node, sizeof(struct jffs2_unknown_node) - 4); + u32 crc = crc32_no_comp(~0, (unsigned char *)node, sizeof(struct jffs2_unknown_node) - 4); - crc ^= ~0; + crc ^= ~0; #endif - if (node->hdr_crc != crc) { - return 0; - } else { - return 1; - } + if (node->hdr_crc != crc) { + return 0; + } else { + return 1; + } } static inline int dirent_crc(struct jffs2_raw_dirent *node) { - if (node->node_crc != crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_raw_dirent) - 8)) { - return 0; - } else { - return 1; - } + if (node->node_crc != crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_raw_dirent) - 8)) { + return 0; + } else { + return 1; + } } static inline int dirent_name_crc(struct jffs2_raw_dirent *node) { - if (node->name_crc != crc32_no_comp(0, (unsigned char *)&(node->name), node->nsize)) { - return 0; - } else { - return 1; - } + if (node->name_crc != crc32_no_comp(0, (unsigned char *)&(node->name), node->nsize)) { + return 0; + } else { + return 1; + } } static inline int inode_crc(struct jffs2_raw_inode *node) { - if (node->node_crc != crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_raw_inode) - 8)) { - return 0; - } else { - return 1; - } + if (node->node_crc != crc32_no_comp(0, (unsigned char *)node, sizeof(struct jffs2_raw_inode) - 8)) { + return 0; + } else { + return 1; + } } #endif /* jffs2_private.h */ diff --git a/include/405_dimm.h b/include/405_dimm.h index b2bbe87..103a349 100644 --- a/include/405_dimm.h +++ b/include/405_dimm.h @@ -2,4 +2,3 @@ #define _405_dimm_h_ long int walnut_dimm(void); #endif - diff --git a/include/405_mal.h b/include/405_mal.h index 459924b..020874f 100644 --- a/include/405_mal.h +++ b/include/405_mal.h @@ -103,4 +103,3 @@ } mal_desc_t; #endif - diff --git a/include/405gp_enet.h b/include/405gp_enet.h index 52a2f33..2244521 100644 --- a/include/405gp_enet.h +++ b/include/405gp_enet.h @@ -236,8 +236,6 @@ #define EMAC_RX_ERRORS 0x03FF - - /*-----------------------------------------------------------------------------+ | Function prototypes for device table. +-----------------------------------------------------------------------------*/ diff --git a/include/440_i2c.h b/include/440_i2c.h index d049766..b0ac592 100644 --- a/include/440_i2c.h +++ b/include/440_i2c.h @@ -1,6 +1,3 @@ - - - #ifndef _440_i2c_h_ #define _440_i2c_h_ diff --git a/include/SA-1100.h b/include/SA-1100.h index f1f9625..9985783 100644 --- a/include/SA-1100.h +++ b/include/SA-1100.h @@ -54,13 +54,13 @@ #define StMemBnkSp MemBnkSp /* Static Memory Bank Space [byte] */ #define StMemBnk0Sp StMemBnkSp /* Static Memory Bank 0 Space */ - /* [byte] */ + /* [byte] */ #define StMemBnk1Sp StMemBnkSp /* Static Memory Bank 1 Space */ - /* [byte] */ + /* [byte] */ #define StMemBnk2Sp StMemBnkSp /* Static Memory Bank 2 Space */ - /* [byte] */ + /* [byte] */ #define StMemBnk3Sp StMemBnkSp /* Static Memory Bank 3 Space */ - /* [byte] */ + /* [byte] */ #define DRAMBnkSp MemBnkSp /* DRAM Bank Space [byte] */ #define DRAMBnk0Sp DRAMBnkSp /* DRAM Bank 0 Space [byte] */ @@ -71,7 +71,7 @@ #define ZeroMemSp MemBnkSp /* Zero Memory bank Space [byte] */ #define _StMemBnk(Nb) /* Static Memory Bank [0..3] */ \ - (0x00000000 + (Nb)*StMemBnkSp) + (0x00000000 + (Nb)*StMemBnkSp) #define _StMemBnk0 _StMemBnk (0) /* Static Memory Bank 0 */ #define _StMemBnk1 _StMemBnk (1) /* Static Memory Bank 1 */ #define _StMemBnk2 _StMemBnk (2) /* Static Memory Bank 2 */ @@ -80,7 +80,7 @@ #if LANGUAGE == C typedef Quad StMemBnkType [StMemBnkSp/sizeof (Quad)] ; #define StMemBnk /* Static Memory Bank [0..3] */ \ - ((StMemBnkType *) io_p2v (_StMemBnk (0))) + ((StMemBnkType *) io_p2v (_StMemBnk (0))) #define StMemBnk0 (StMemBnk [0]) /* Static Memory Bank 0 */ #define StMemBnk1 (StMemBnk [1]) /* Static Memory Bank 1 */ #define StMemBnk2 (StMemBnk [2]) /* Static Memory Bank 2 */ @@ -88,7 +88,7 @@ #endif /* LANGUAGE == C */ #define _DRAMBnk(Nb) /* DRAM Bank [0..3] */ \ - (0xC0000000 + (Nb)*DRAMBnkSp) + (0xC0000000 + (Nb)*DRAMBnkSp) #define _DRAMBnk0 _DRAMBnk (0) /* DRAM Bank 0 */ #define _DRAMBnk1 _DRAMBnk (1) /* DRAM Bank 1 */ #define _DRAMBnk2 _DRAMBnk (2) /* DRAM Bank 2 */ @@ -97,7 +97,7 @@ #if LANGUAGE == C typedef Quad DRAMBnkType [DRAMBnkSp/sizeof (Quad)] ; #define DRAMBnk /* DRAM Bank [0..3] */ \ - ((DRAMBnkType *) io_p2v (_DRAMBnk (0))) + ((DRAMBnkType *) io_p2v (_DRAMBnk (0))) #define DRAMBnk0 (DRAMBnk [0]) /* DRAM Bank 0 */ #define DRAMBnk1 (DRAMBnk [1]) /* DRAM Bank 1 */ #define DRAMBnk2 (DRAMBnk [2]) /* DRAM Bank 2 */ @@ -109,7 +109,7 @@ #if LANGUAGE == C typedef Quad ZeroMemType [ZeroMemSp/sizeof (Quad)] ; #define ZeroMem /* Zero Memory bank */ \ - (*((ZeroMemType *) io_p2v (_ZeroMem))) + (*((ZeroMemType *) io_p2v (_ZeroMem))) #endif /* LANGUAGE == C */ @@ -134,12 +134,12 @@ #define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */ #define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ - (0x20000000 + (Nb)*PCMCIASp) + (0x20000000 + (Nb)*PCMCIASp) #define _PCMCIAIO(Nb) _PCMCIA (Nb) /* PCMCIA I/O [0..1] */ #define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \ - (_PCMCIA (Nb) + 2*PCMCIAPrtSp) + (_PCMCIA (Nb) + 2*PCMCIAPrtSp) #define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ - (_PCMCIA (Nb) + 3*PCMCIAPrtSp) + (_PCMCIA (Nb) + 3*PCMCIAPrtSp) #define _PCMCIA0 _PCMCIA (0) /* PCMCIA 0 */ #define _PCMCIA0IO _PCMCIAIO (0) /* PCMCIA 0 I/O */ @@ -157,22 +157,22 @@ typedef PCMCIAPrtType PCMCIAType [PCMCIASp/PCMCIAPrtSp] ; #define PCMCIA0 /* PCMCIA 0 */ \ - (*((PCMCIAType *) io_p2v (_PCMCIA0))) + (*((PCMCIAType *) io_p2v (_PCMCIA0))) #define PCMCIA0IO /* PCMCIA 0 I/O */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA0IO))) + (*((PCMCIAPrtType *) io_p2v (_PCMCIA0IO))) #define PCMCIA0Attr /* PCMCIA 0 Attribute */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA0Attr))) + (*((PCMCIAPrtType *) io_p2v (_PCMCIA0Attr))) #define PCMCIA0Mem /* PCMCIA 0 Memory */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA0Mem))) + (*((PCMCIAPrtType *) io_p2v (_PCMCIA0Mem))) #define PCMCIA1 /* PCMCIA 1 */ \ - (*((PCMCIAType *) io_p2v (_PCMCIA1))) + (*((PCMCIAType *) io_p2v (_PCMCIA1))) #define PCMCIA1IO /* PCMCIA 1 I/O */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA1IO))) + (*((PCMCIAPrtType *) io_p2v (_PCMCIA1IO))) #define PCMCIA1Attr /* PCMCIA 1 Attribute */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA1Attr))) + (*((PCMCIAPrtType *) io_p2v (_PCMCIA1Attr))) #define PCMCIA1Mem /* PCMCIA 1 Memory */ \ - (*((PCMCIAPrtType *) io_p2v (_PCMCIA1Mem))) + (*((PCMCIAPrtType *) io_p2v (_PCMCIA1Mem))) #endif /* LANGUAGE == C */ @@ -215,81 +215,81 @@ #define _Ser0UDCCR 0x80000000 /* Ser. port 0 UDC Control Reg. */ #define _Ser0UDCAR 0x80000004 /* Ser. port 0 UDC Address Reg. */ #define _Ser0UDCOMP 0x80000008 /* Ser. port 0 UDC Output Maximum */ - /* Packet size reg. */ + /* Packet size reg. */ #define _Ser0UDCIMP 0x8000000C /* Ser. port 0 UDC Input Maximum */ - /* Packet size reg. */ + /* Packet size reg. */ #define _Ser0UDCCS0 0x80000010 /* Ser. port 0 UDC Control/Status */ - /* reg. end-point 0 */ + /* reg. end-point 0 */ #define _Ser0UDCCS1 0x80000014 /* Ser. port 0 UDC Control/Status */ - /* reg. end-point 1 (output) */ + /* reg. end-point 1 (output) */ #define _Ser0UDCCS2 0x80000018 /* Ser. port 0 UDC Control/Status */ - /* reg. end-point 2 (input) */ + /* reg. end-point 2 (input) */ #define _Ser0UDCD0 0x8000001C /* Ser. port 0 UDC Data reg. */ - /* end-point 0 */ + /* end-point 0 */ #define _Ser0UDCWC 0x80000020 /* Ser. port 0 UDC Write Count */ - /* reg. end-point 0 */ + /* reg. end-point 0 */ #define _Ser0UDCDR 0x80000028 /* Ser. port 0 UDC Data Reg. */ #define _Ser0UDCSR 0x80000030 /* Ser. port 0 UDC Status Reg. */ #if LANGUAGE == C #define Ser0UDCCR /* Ser. port 0 UDC Control Reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCCR))) + (*((volatile Word *) io_p2v (_Ser0UDCCR))) #define Ser0UDCAR /* Ser. port 0 UDC Address Reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCAR))) + (*((volatile Word *) io_p2v (_Ser0UDCAR))) #define Ser0UDCOMP /* Ser. port 0 UDC Output Maximum */ \ - /* Packet size reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCOMP))) + /* Packet size reg. */ \ + (*((volatile Word *) io_p2v (_Ser0UDCOMP))) #define Ser0UDCIMP /* Ser. port 0 UDC Input Maximum */ \ - /* Packet size reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCIMP))) + /* Packet size reg. */ \ + (*((volatile Word *) io_p2v (_Ser0UDCIMP))) #define Ser0UDCCS0 /* Ser. port 0 UDC Control/Status */ \ - /* reg. end-point 0 */ \ - (*((volatile Word *) io_p2v (_Ser0UDCCS0))) + /* reg. end-point 0 */ \ + (*((volatile Word *) io_p2v (_Ser0UDCCS0))) #define Ser0UDCCS1 /* Ser. port 0 UDC Control/Status */ \ - /* reg. end-point 1 (output) */ \ - (*((volatile Word *) io_p2v (_Ser0UDCCS1))) + /* reg. end-point 1 (output) */ \ + (*((volatile Word *) io_p2v (_Ser0UDCCS1))) #define Ser0UDCCS2 /* Ser. port 0 UDC Control/Status */ \ - /* reg. end-point 2 (input) */ \ - (*((volatile Word *) io_p2v (_Ser0UDCCS2))) + /* reg. end-point 2 (input) */ \ + (*((volatile Word *) io_p2v (_Ser0UDCCS2))) #define Ser0UDCD0 /* Ser. port 0 UDC Data reg. */ \ - /* end-point 0 */ \ - (*((volatile Word *) io_p2v (_Ser0UDCD0))) + /* end-point 0 */ \ + (*((volatile Word *) io_p2v (_Ser0UDCD0))) #define Ser0UDCWC /* Ser. port 0 UDC Write Count */ \ - /* reg. end-point 0 */ \ - (*((volatile Word *) io_p2v (_Ser0UDCWC))) + /* reg. end-point 0 */ \ + (*((volatile Word *) io_p2v (_Ser0UDCWC))) #define Ser0UDCDR /* Ser. port 0 UDC Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCDR))) + (*((volatile Word *) io_p2v (_Ser0UDCDR))) #define Ser0UDCSR /* Ser. port 0 UDC Status Reg. */ \ - (*((volatile Word *) io_p2v (_Ser0UDCSR))) + (*((volatile Word *) io_p2v (_Ser0UDCSR))) #endif /* LANGUAGE == C */ #define UDCCR_UDD 0x00000001 /* UDC Disable */ #define UDCCR_UDA 0x00000002 /* UDC Active (read) */ #define UDCCR_RESIM 0x00000004 /* Resume Interrupt Mask, per errata */ #define UDCCR_EIM 0x00000008 /* End-point 0 Interrupt Mask */ - /* (disable) */ + /* (disable) */ #define UDCCR_RIM 0x00000010 /* Receive Interrupt Mask */ - /* (disable) */ + /* (disable) */ #define UDCCR_TIM 0x00000020 /* Transmit Interrupt Mask */ - /* (disable) */ + /* (disable) */ #define UDCCR_SRM 0x00000040 /* Suspend/Resume interrupt Mask */ - /* (disable) */ + /* (disable) */ #define UDCCR_SUSIM UDCCR_SRM /* Per errata, SRM just masks suspend */ #define UDCCR_REM 0x00000080 /* REset interrupt Mask (disable) */ #define UDCAR_ADD Fld (7, 0) /* function ADDress */ #define UDCOMP_OUTMAXP Fld (8, 0) /* OUTput MAXimum Packet size - 1 */ - /* [byte] */ + /* [byte] */ #define UDCOMP_OutMaxPkt(Size) /* Output Maximum Packet size */ \ - /* [1..256 byte] */ \ - (((Size) - 1) << FShft (UDCOMP_OUTMAXP)) + /* [1..256 byte] */ \ + (((Size) - 1) << FShft (UDCOMP_OUTMAXP)) #define UDCIMP_INMAXP Fld (8, 0) /* INput MAXimum Packet size - 1 */ - /* [byte] */ + /* [byte] */ #define UDCIMP_InMaxPkt(Size) /* Input Maximum Packet size */ \ - /* [1..256 byte] */ \ - (((Size) - 1) << FShft (UDCIMP_INMAXP)) + /* [1..256 byte] */ \ + (((Size) - 1) << FShft (UDCIMP_INMAXP)) #define UDCCS0_OPR 0x00000001 /* Output Packet Ready (read) */ #define UDCCS0_IPR 0x00000002 /* Input Packet Ready */ @@ -298,11 +298,11 @@ #define UDCCS0_DE 0x00000010 /* Data End */ #define UDCCS0_SE 0x00000020 /* Setup End (read) */ #define UDCCS0_SO 0x00000040 /* Serviced Output packet ready */ - /* (write) */ + /* (write) */ #define UDCCS0_SSE 0x00000080 /* Serviced Setup End (write) */ #define UDCCS1_RFS 0x00000001 /* Receive FIFO 12-bytes or more */ - /* Service request (read) */ + /* Service request (read) */ #define UDCCS1_RPC 0x00000002 /* Receive Packet Complete */ #define UDCCS1_RPE 0x00000004 /* Receive Packet Error (read) */ #define UDCCS1_SST 0x00000008 /* Sent STall */ @@ -310,7 +310,7 @@ #define UDCCS1_RNE 0x00000020 /* Receive FIFO Not Empty (read) */ #define UDCCS2_TFS 0x00000001 /* Transmit FIFO 8-bytes or less */ - /* Service request (read) */ + /* Service request (read) */ #define UDCCS2_TPC 0x00000002 /* Transmit Packet Complete */ #define UDCCS2_TPE 0x00000004 /* Transmit Packet Error (read) */ #define UDCCS2_TUR 0x00000008 /* Transmit FIFO Under-Run */ @@ -408,21 +408,21 @@ */ #define _UTCR0(Nb) /* UART Control Reg. 0 [1..3] */ \ - (0x80010000 + ((Nb) - 1)*0x00020000) + (0x80010000 + ((Nb) - 1)*0x00020000) #define _UTCR1(Nb) /* UART Control Reg. 1 [1..3] */ \ - (0x80010004 + ((Nb) - 1)*0x00020000) + (0x80010004 + ((Nb) - 1)*0x00020000) #define _UTCR2(Nb) /* UART Control Reg. 2 [1..3] */ \ - (0x80010008 + ((Nb) - 1)*0x00020000) + (0x80010008 + ((Nb) - 1)*0x00020000) #define _UTCR3(Nb) /* UART Control Reg. 3 [1..3] */ \ - (0x8001000C + ((Nb) - 1)*0x00020000) + (0x8001000C + ((Nb) - 1)*0x00020000) #define _UTCR4(Nb) /* UART Control Reg. 4 [2] */ \ - (0x80010010 + ((Nb) - 1)*0x00020000) + (0x80010010 + ((Nb) - 1)*0x00020000) #define _UTDR(Nb) /* UART Data Reg. [1..3] */ \ - (0x80010014 + ((Nb) - 1)*0x00020000) + (0x80010014 + ((Nb) - 1)*0x00020000) #define _UTSR0(Nb) /* UART Status Reg. 0 [1..3] */ \ - (0x8001001C + ((Nb) - 1)*0x00020000) + (0x8001001C + ((Nb) - 1)*0x00020000) #define _UTSR1(Nb) /* UART Status Reg. 1 [1..3] */ \ - (0x80010020 + ((Nb) - 1)*0x00020000) + (0x80010020 + ((Nb) - 1)*0x00020000) #define _Ser1UTCR0 _UTCR0 (1) /* Ser. port 1 UART Control Reg. 0 */ #define _Ser1UTCR1 _UTCR1 (1) /* Ser. port 1 UART Control Reg. 1 */ @@ -452,51 +452,51 @@ #if LANGUAGE == C #define Ser1UTCR0 /* Ser. port 1 UART Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser1UTCR0))) + (*((volatile Word *) io_p2v (_Ser1UTCR0))) #define Ser1UTCR1 /* Ser. port 1 UART Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser1UTCR1))) + (*((volatile Word *) io_p2v (_Ser1UTCR1))) #define Ser1UTCR2 /* Ser. port 1 UART Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser1UTCR2))) + (*((volatile Word *) io_p2v (_Ser1UTCR2))) #define Ser1UTCR3 /* Ser. port 1 UART Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_Ser1UTCR3))) + (*((volatile Word *) io_p2v (_Ser1UTCR3))) #define Ser1UTDR /* Ser. port 1 UART Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser1UTDR))) + (*((volatile Word *) io_p2v (_Ser1UTDR))) #define Ser1UTSR0 /* Ser. port 1 UART Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser1UTSR0))) + (*((volatile Word *) io_p2v (_Ser1UTSR0))) #define Ser1UTSR1 /* Ser. port 1 UART Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser1UTSR1))) + (*((volatile Word *) io_p2v (_Ser1UTSR1))) #define Ser2UTCR0 /* Ser. port 2 UART Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR0))) + (*((volatile Word *) io_p2v (_Ser2UTCR0))) #define Ser2UTCR1 /* Ser. port 2 UART Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR1))) + (*((volatile Word *) io_p2v (_Ser2UTCR1))) #define Ser2UTCR2 /* Ser. port 2 UART Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR2))) + (*((volatile Word *) io_p2v (_Ser2UTCR2))) #define Ser2UTCR3 /* Ser. port 2 UART Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR3))) + (*((volatile Word *) io_p2v (_Ser2UTCR3))) #define Ser2UTCR4 /* Ser. port 2 UART Control Reg. 4 */ \ - (*((volatile Word *) io_p2v (_Ser2UTCR4))) + (*((volatile Word *) io_p2v (_Ser2UTCR4))) #define Ser2UTDR /* Ser. port 2 UART Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser2UTDR))) + (*((volatile Word *) io_p2v (_Ser2UTDR))) #define Ser2UTSR0 /* Ser. port 2 UART Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser2UTSR0))) + (*((volatile Word *) io_p2v (_Ser2UTSR0))) #define Ser2UTSR1 /* Ser. port 2 UART Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser2UTSR1))) + (*((volatile Word *) io_p2v (_Ser2UTSR1))) #define Ser3UTCR0 /* Ser. port 3 UART Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser3UTCR0))) + (*((volatile Word *) io_p2v (_Ser3UTCR0))) #define Ser3UTCR1 /* Ser. port 3 UART Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser3UTCR1))) + (*((volatile Word *) io_p2v (_Ser3UTCR1))) #define Ser3UTCR2 /* Ser. port 3 UART Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser3UTCR2))) + (*((volatile Word *) io_p2v (_Ser3UTCR2))) #define Ser3UTCR3 /* Ser. port 3 UART Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_Ser3UTCR3))) + (*((volatile Word *) io_p2v (_Ser3UTCR3))) #define Ser3UTDR /* Ser. port 3 UART Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser3UTDR))) + (*((volatile Word *) io_p2v (_Ser3UTDR))) #define Ser3UTSR0 /* Ser. port 3 UART Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser3UTSR0))) + (*((volatile Word *) io_p2v (_Ser3UTSR0))) #define Ser3UTSR1 /* Ser. port 3 UART Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser3UTSR1))) + (*((volatile Word *) io_p2v (_Ser3UTSR1))) #elif LANGUAGE == Assembly #define Ser1UTCR0 ( io_p2v (_Ser1UTCR0)) @@ -537,8 +537,8 @@ #define UTCR0_7BitData (UTCR0_DSS*0) /* 7-Bit Data */ #define UTCR0_8BitData (UTCR0_DSS*1) /* 8-Bit Data */ #define UTCR0_SCE 0x00000010 /* Sample Clock Enable */ - /* (ser. port 1: GPIO [18], */ - /* ser. port 3: GPIO [20]) */ + /* (ser. port 1: GPIO [18], */ + /* ser. port 3: GPIO [20]) */ #define UTCR0_RCE 0x00000020 /* Receive Clock Edge select */ #define UTCR0_RcRsEdg (UTCR0_RCE*0) /* Receive clock Rising-Edge */ #define UTCR0_RcFlEdg (UTCR0_RCE*1) /* Receive clock Falling-Edge */ @@ -546,43 +546,43 @@ #define UTCR0_TrRsEdg (UTCR0_TCE*0) /* Transmit clock Rising-Edge */ #define UTCR0_TrFlEdg (UTCR0_TCE*1) /* Transmit clock Falling-Edge */ #define UTCR0_Ser2IrDA /* Ser. port 2 IrDA settings */ \ - (UTCR0_1StpBit + UTCR0_8BitData) + (UTCR0_1StpBit + UTCR0_8BitData) #define UTCR1_BRD Fld (4, 0) /* Baud Rate Divisor/16 - 1 [11:8] */ #define UTCR2_BRD Fld (8, 0) /* Baud Rate Divisor/16 - 1 [7:0] */ - /* fua = fxtl/(16*(BRD[11:0] + 1)) */ - /* Tua = 16*(BRD [11:0] + 1)*Txtl */ + /* fua = fxtl/(16*(BRD[11:0] + 1)) */ + /* Tua = 16*(BRD [11:0] + 1)*Txtl */ #define UTCR1_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 >> FSize (UTCR2_BRD) << \ - FShft (UTCR1_BRD)) + (((Div) - 16)/16 >> FSize (UTCR2_BRD) << \ + FShft (UTCR1_BRD)) #define UTCR2_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 & FAlnMsk (UTCR2_BRD) << \ - FShft (UTCR2_BRD)) - /* fua = fxtl/(16*Floor (Div/16)) */ - /* Tua = 16*Floor (Div/16)*Txtl */ + (((Div) - 16)/16 & FAlnMsk (UTCR2_BRD) << \ + FShft (UTCR2_BRD)) + /* fua = fxtl/(16*Floor (Div/16)) */ + /* Tua = 16*Floor (Div/16)*Txtl */ #define UTCR1_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 >> FSize (UTCR2_BRD) << \ - FShft (UTCR1_BRD)) + (((Div) - 1)/16 >> FSize (UTCR2_BRD) << \ + FShft (UTCR1_BRD)) #define UTCR2_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 & FAlnMsk (UTCR2_BRD) << \ - FShft (UTCR2_BRD)) - /* fua = fxtl/(16*Ceil (Div/16)) */ - /* Tua = 16*Ceil (Div/16)*Txtl */ + (((Div) - 1)/16 & FAlnMsk (UTCR2_BRD) << \ + FShft (UTCR2_BRD)) + /* fua = fxtl/(16*Ceil (Div/16)) */ + /* Tua = 16*Ceil (Div/16)*Txtl */ #define UTCR3_RXE 0x00000001 /* Receive Enable */ #define UTCR3_TXE 0x00000002 /* Transmit Enable */ #define UTCR3_BRK 0x00000004 /* BReaK mode */ #define UTCR3_RIE 0x00000008 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Interrupt Enable */ + /* more Interrupt Enable */ #define UTCR3_TIE 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ + /* Interrupt Enable */ #define UTCR3_LBM 0x00000020 /* Look-Back Mode */ #define UTCR3_Ser2IrDA /* Ser. port 2 IrDA settings (RIE, */ \ - /* TIE, LBM can be set or cleared) */ \ - (UTCR3_RXE + UTCR3_TXE) + /* TIE, LBM can be set or cleared) */ \ + (UTCR3_RXE + UTCR3_TXE) #define UTCR4_HSE 0x00000001 /* Hewlett-Packard Serial InfraRed */ - /* (HP-SIR) modulation Enable */ + /* (HP-SIR) modulation Enable */ #define UTCR4_NRZ (UTCR4_HSE*0) /* Non-Return to Zero modulation */ #define UTCR4_HPSIR (UTCR4_HSE*1) /* HP-SIR modulation */ #define UTCR4_LPM 0x00000002 /* Low-Power Mode */ @@ -597,9 +597,9 @@ #endif /* 0 */ #define UTSR0_TFS 0x00000001 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ + /* Service request (read) */ #define UTSR0_RFS 0x00000002 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Service request (read) */ + /* more Service request (read) */ #define UTSR0_RID 0x00000004 /* Receiver IDle */ #define UTSR0_RBB 0x00000008 /* Receive Beginning of Break */ #define UTSR0_REB 0x00000010 /* Receive End of Break */ @@ -651,21 +651,21 @@ #if LANGUAGE == C #define Ser1SDCR0 /* Ser. port 1 SDLC Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR0))) + (*((volatile Word *) io_p2v (_Ser1SDCR0))) #define Ser1SDCR1 /* Ser. port 1 SDLC Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR1))) + (*((volatile Word *) io_p2v (_Ser1SDCR1))) #define Ser1SDCR2 /* Ser. port 1 SDLC Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR2))) + (*((volatile Word *) io_p2v (_Ser1SDCR2))) #define Ser1SDCR3 /* Ser. port 1 SDLC Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR3))) + (*((volatile Word *) io_p2v (_Ser1SDCR3))) #define Ser1SDCR4 /* Ser. port 1 SDLC Control Reg. 4 */ \ - (*((volatile Word *) io_p2v (_Ser1SDCR4))) + (*((volatile Word *) io_p2v (_Ser1SDCR4))) #define Ser1SDDR /* Ser. port 1 SDLC Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser1SDDR))) + (*((volatile Word *) io_p2v (_Ser1SDDR))) #define Ser1SDSR0 /* Ser. port 1 SDLC Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser1SDSR0))) + (*((volatile Word *) io_p2v (_Ser1SDSR0))) #define Ser1SDSR1 /* Ser. port 1 SDLC Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser1SDSR1))) + (*((volatile Word *) io_p2v (_Ser1SDSR1))) #endif /* LANGUAGE == C */ #define SDCR0_SUS 0x00000001 /* SDLC/UART Select */ @@ -680,7 +680,7 @@ #define SDCR0_NRZ (SDCR0_BMS*1) /* Non-Return to Zero modulation */ #define SDCR0_SCE 0x00000010 /* Sample Clock Enable (GPIO [16]) */ #define SDCR0_SCD 0x00000020 /* Sample Clock Direction select */ - /* (GPIO [16]) */ + /* (GPIO [16]) */ #define SDCR0_SClkIn (SDCR0_SCD*0) /* Sample Clock Input */ #define SDCR0_SClkOut (SDCR0_SCD*1) /* Sample Clock Output */ #define SDCR0_RCE 0x00000040 /* Receive Clock Edge select */ @@ -691,13 +691,13 @@ #define SDCR0_TrFlEdg (SDCR0_TCE*1) /* Transmit clock Falling-Edge */ #define SDCR1_AAF 0x00000001 /* Abort After Frame enable */ - /* (GPIO [17]) */ + /* (GPIO [17]) */ #define SDCR1_TXE 0x00000002 /* Transmit Enable */ #define SDCR1_RXE 0x00000004 /* Receive Enable */ #define SDCR1_RIE 0x00000008 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Interrupt Enable */ + /* more Interrupt Enable */ #define SDCR1_TIE 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ + /* Interrupt Enable */ #define SDCR1_AME 0x00000020 /* Address Match Enable */ #define SDCR1_TUS 0x00000040 /* Transmit FIFO Under-run Select */ #define SDCR1_EFrmURn (SDCR1_TUS*0) /* End Frame on Under-Run */ @@ -708,24 +708,24 @@ #define SDCR3_BRD Fld (4, 0) /* Baud Rate Divisor/16 - 1 [11:8] */ #define SDCR4_BRD Fld (8, 0) /* Baud Rate Divisor/16 - 1 [7:0] */ - /* fsd = fxtl/(16*(BRD[11:0] + 1)) */ - /* Tsd = 16*(BRD[11:0] + 1)*Txtl */ + /* fsd = fxtl/(16*(BRD[11:0] + 1)) */ + /* Tsd = 16*(BRD[11:0] + 1)*Txtl */ #define SDCR3_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 >> FSize (SDCR4_BRD) << \ - FShft (SDCR3_BRD)) + (((Div) - 16)/16 >> FSize (SDCR4_BRD) << \ + FShft (SDCR3_BRD)) #define SDCR4_BdRtDiv(Div) /* Baud Rate Divisor [16..65536] */ \ - (((Div) - 16)/16 & FAlnMsk (SDCR4_BRD) << \ - FShft (SDCR4_BRD)) - /* fsd = fxtl/(16*Floor (Div/16)) */ - /* Tsd = 16*Floor (Div/16)*Txtl */ + (((Div) - 16)/16 & FAlnMsk (SDCR4_BRD) << \ + FShft (SDCR4_BRD)) + /* fsd = fxtl/(16*Floor (Div/16)) */ + /* Tsd = 16*Floor (Div/16)*Txtl */ #define SDCR3_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 >> FSize (SDCR4_BRD) << \ - FShft (SDCR3_BRD)) + (((Div) - 1)/16 >> FSize (SDCR4_BRD) << \ + FShft (SDCR3_BRD)) #define SDCR4_CeilBdRtDiv(Div) /* Ceil. of BdRtDiv [16..65536] */ \ - (((Div) - 1)/16 & FAlnMsk (SDCR4_BRD) << \ - FShft (SDCR4_BRD)) - /* fsd = fxtl/(16*Ceil (Div/16)) */ - /* Tsd = 16*Ceil (Div/16)*Txtl */ + (((Div) - 1)/16 & FAlnMsk (SDCR4_BRD) << \ + FShft (SDCR4_BRD)) + /* fsd = fxtl/(16*Ceil (Div/16)) */ + /* Tsd = 16*Ceil (Div/16)*Txtl */ #define SDDR_DATA Fld (8, 0) /* receive/transmit DATA FIFOs */ #if 0 /* Hidden receive FIFO bits */ @@ -738,9 +738,9 @@ #define SDSR0_TUR 0x00000002 /* Transmit FIFO Under-Run */ #define SDSR0_RAB 0x00000004 /* Receive ABort */ #define SDSR0_TFS 0x00000008 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ + /* Service request (read) */ #define SDSR0_RFS 0x00000010 /* Receive FIFO 1/3-to-2/3-full or */ - /* more Service request (read) */ + /* more Service request (read) */ #define SDSR1_RSY 0x00000001 /* Receiver SYnchronized (read) */ #define SDSR1_TBY 0x00000002 /* Transmitter BusY (read) */ @@ -782,17 +782,17 @@ #if LANGUAGE == C #define Ser2HSCR0 /* Ser. port 2 HSSP Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser2HSCR0))) + (*((volatile Word *) io_p2v (_Ser2HSCR0))) #define Ser2HSCR1 /* Ser. port 2 HSSP Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser2HSCR1))) + (*((volatile Word *) io_p2v (_Ser2HSCR1))) #define Ser2HSDR /* Ser. port 2 HSSP Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser2HSDR))) + (*((volatile Word *) io_p2v (_Ser2HSDR))) #define Ser2HSSR0 /* Ser. port 2 HSSP Status Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser2HSSR0))) + (*((volatile Word *) io_p2v (_Ser2HSSR0))) #define Ser2HSSR1 /* Ser. port 2 HSSP Status Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser2HSSR1))) + (*((volatile Word *) io_p2v (_Ser2HSSR1))) #define Ser2HSCR2 /* Ser. port 2 HSSP Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_Ser2HSCR2))) + (*((volatile Word *) io_p2v (_Ser2HSCR2))) #endif /* LANGUAGE == C */ #define HSCR0_ITR 0x00000001 /* IrDA Transmission Rate */ @@ -805,9 +805,9 @@ #define HSCR0_TXE 0x00000008 /* Transmit Enable */ #define HSCR0_RXE 0x00000010 /* Receive Enable */ #define HSCR0_RIE 0x00000020 /* Receive FIFO 2/5-to-3/5-full or */ - /* more Interrupt Enable */ + /* more Interrupt Enable */ #define HSCR0_TIE 0x00000040 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ + /* Interrupt Enable */ #define HSCR0_AME 0x00000080 /* Address Match Enable */ #define HSCR1_AMV Fld (8, 0) /* Address Match Value */ @@ -823,9 +823,9 @@ #define HSSR0_TUR 0x00000002 /* Transmit FIFO Under-Run */ #define HSSR0_RAB 0x00000004 /* Receive ABort */ #define HSSR0_TFS 0x00000008 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ + /* Service request (read) */ #define HSSR0_RFS 0x00000010 /* Receive FIFO 2/5-to-3/5-full or */ - /* more Service request (read) */ + /* more Service request (read) */ #define HSSR0_FRE 0x00000020 /* receive FRaming Error */ #define HSSR1_RSY 0x00000001 /* Receiver SYnchronized (read) */ @@ -838,14 +838,14 @@ #define HSCR2_TXP 0x00040000 /* Transmit data Polarity (TXD_2) */ #define HSCR2_TrDataL (HSCR2_TXP*0) /* Transmit Data active Low */ - /* (inverted) */ + /* (inverted) */ #define HSCR2_TrDataH (HSCR2_TXP*1) /* Transmit Data active High */ - /* (non-inverted) */ + /* (non-inverted) */ #define HSCR2_RXP 0x00080000 /* Receive data Polarity (RXD_2) */ #define HSCR2_RcDataL (HSCR2_RXP*0) /* Receive Data active Low */ - /* (inverted) */ + /* (inverted) */ #define HSCR2_RcDataH (HSCR2_RXP*1) /* Receive Data active High */ - /* (non-inverted) */ + /* (non-inverted) */ /* @@ -877,87 +877,87 @@ #define _Ser4MCCR0 0x80060000 /* Ser. port 4 MCP Control Reg. 0 */ #define _Ser4MCDR0 0x80060008 /* Ser. port 4 MCP Data Reg. 0 */ - /* (audio) */ + /* (audio) */ #define _Ser4MCDR1 0x8006000C /* Ser. port 4 MCP Data Reg. 1 */ - /* (telecom) */ + /* (telecom) */ #define _Ser4MCDR2 0x80060010 /* Ser. port 4 MCP Data Reg. 2 */ - /* (CODEC reg.) */ + /* (CODEC reg.) */ #define _Ser4MCSR 0x80060018 /* Ser. port 4 MCP Status Reg. */ #define _Ser4MCCR1 0x90060030 /* Ser. port 4 MCP Control Reg. 1 */ #if LANGUAGE == C #define Ser4MCCR0 /* Ser. port 4 MCP Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser4MCCR0))) + (*((volatile Word *) io_p2v (_Ser4MCCR0))) #define Ser4MCDR0 /* Ser. port 4 MCP Data Reg. 0 */ \ - /* (audio) */ \ - (*((volatile Word *) io_p2v (_Ser4MCDR0))) + /* (audio) */ \ + (*((volatile Word *) io_p2v (_Ser4MCDR0))) #define Ser4MCDR1 /* Ser. port 4 MCP Data Reg. 1 */ \ - /* (telecom) */ \ - (*((volatile Word *) io_p2v (_Ser4MCDR1))) + /* (telecom) */ \ + (*((volatile Word *) io_p2v (_Ser4MCDR1))) #define Ser4MCDR2 /* Ser. port 4 MCP Data Reg. 2 */ \ - /* (CODEC reg.) */ \ - (*((volatile Word *) io_p2v (_Ser4MCDR2))) + /* (CODEC reg.) */ \ + (*((volatile Word *) io_p2v (_Ser4MCDR2))) #define Ser4MCSR /* Ser. port 4 MCP Status Reg. */ \ - (*((volatile Word *) io_p2v (_Ser4MCSR))) + (*((volatile Word *) io_p2v (_Ser4MCSR))) #define Ser4MCCR1 /* Ser. port 4 MCP Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser4MCCR1))) + (*((volatile Word *) io_p2v (_Ser4MCCR1))) #endif /* LANGUAGE == C */ #define MCCR0_ASD Fld (7, 0) /* Audio Sampling rate Divisor/32 */ - /* [6..127] */ - /* faud = fmc/(32*ASD) */ - /* Taud = 32*ASD*Tmc */ + /* [6..127] */ + /* faud = fmc/(32*ASD) */ + /* Taud = 32*ASD*Tmc */ #define MCCR0_AudSmpDiv(Div) /* Audio Sampling rate Divisor */ \ - /* [192..4064] */ \ - ((Div)/32 << FShft (MCCR0_ASD)) - /* faud = fmc/(32*Floor (Div/32)) */ - /* Taud = 32*Floor (Div/32)*Tmc */ + /* [192..4064] */ \ + ((Div)/32 << FShft (MCCR0_ASD)) + /* faud = fmc/(32*Floor (Div/32)) */ + /* Taud = 32*Floor (Div/32)*Tmc */ #define MCCR0_CeilAudSmpDiv(Div) /* Ceil. of AudSmpDiv [192..4064] */ \ - (((Div) + 31)/32 << FShft (MCCR0_ASD)) - /* faud = fmc/(32*Ceil (Div/32)) */ - /* Taud = 32*Ceil (Div/32)*Tmc */ + (((Div) + 31)/32 << FShft (MCCR0_ASD)) + /* faud = fmc/(32*Ceil (Div/32)) */ + /* Taud = 32*Ceil (Div/32)*Tmc */ #define MCCR0_TSD Fld (7, 8) /* Telecom Sampling rate */ - /* Divisor/32 [16..127] */ - /* ftcm = fmc/(32*TSD) */ - /* Ttcm = 32*TSD*Tmc */ + /* Divisor/32 [16..127] */ + /* ftcm = fmc/(32*TSD) */ + /* Ttcm = 32*TSD*Tmc */ #define MCCR0_TcmSmpDiv(Div) /* Telecom Sampling rate Divisor */ \ - /* [512..4064] */ \ - ((Div)/32 << FShft (MCCR0_TSD)) - /* ftcm = fmc/(32*Floor (Div/32)) */ - /* Ttcm = 32*Floor (Div/32)*Tmc */ + /* [512..4064] */ \ + ((Div)/32 << FShft (MCCR0_TSD)) + /* ftcm = fmc/(32*Floor (Div/32)) */ + /* Ttcm = 32*Floor (Div/32)*Tmc */ #define MCCR0_CeilTcmSmpDiv(Div) /* Ceil. of TcmSmpDiv [512..4064] */ \ - (((Div) + 31)/32 << FShft (MCCR0_TSD)) - /* ftcm = fmc/(32*Ceil (Div/32)) */ - /* Ttcm = 32*Ceil (Div/32)*Tmc */ + (((Div) + 31)/32 << FShft (MCCR0_TSD)) + /* ftcm = fmc/(32*Ceil (Div/32)) */ + /* Ttcm = 32*Ceil (Div/32)*Tmc */ #define MCCR0_MCE 0x00010000 /* MCP Enable */ #define MCCR0_ECS 0x00020000 /* External Clock Select */ #define MCCR0_IntClk (MCCR0_ECS*0) /* Internal Clock (10 or 12 MHz) */ #define MCCR0_ExtClk (MCCR0_ECS*1) /* External Clock (GPIO [21]) */ #define MCCR0_ADM 0x00040000 /* A/D (audio/telecom) data */ - /* sampling/storing Mode */ + /* sampling/storing Mode */ #define MCCR0_VldBit (MCCR0_ADM*0) /* Valid Bit storing mode */ #define MCCR0_SmpCnt (MCCR0_ADM*1) /* Sampling Counter storing mode */ #define MCCR0_TTE 0x00080000 /* Telecom Transmit FIFO 1/2-full */ - /* or less interrupt Enable */ + /* or less interrupt Enable */ #define MCCR0_TRE 0x00100000 /* Telecom Receive FIFO 1/2-full */ - /* or more interrupt Enable */ + /* or more interrupt Enable */ #define MCCR0_ATE 0x00200000 /* Audio Transmit FIFO 1/2-full */ - /* or less interrupt Enable */ + /* or less interrupt Enable */ #define MCCR0_ARE 0x00400000 /* Audio Receive FIFO 1/2-full or */ - /* more interrupt Enable */ + /* more interrupt Enable */ #define MCCR0_LBM 0x00800000 /* Look-Back Mode */ #define MCCR0_ECP Fld (2, 24) /* External Clock Prescaler - 1 */ #define MCCR0_ExtClkDiv(Div) /* External Clock Divisor [1..4] */ \ - (((Div) - 1) << FShft (MCCR0_ECP)) + (((Div) - 1) << FShft (MCCR0_ECP)) #define MCDR0_DATA Fld (12, 4) /* receive/transmit audio DATA */ - /* FIFOs */ + /* FIFOs */ #define MCDR1_DATA Fld (14, 2) /* receive/transmit telecom DATA */ - /* FIFOs */ + /* FIFOs */ - /* receive/transmit CODEC reg. */ - /* FIFOs: */ + /* receive/transmit CODEC reg. */ + /* FIFOs: */ #define MCDR2_DATA Fld (16, 0) /* reg. DATA */ #define MCDR2_RW 0x00010000 /* reg. Read/Write (transmit) */ #define MCDR2_Rd (MCDR2_RW*0) /* reg. Read */ @@ -965,37 +965,37 @@ #define MCDR2_ADD Fld (4, 17) /* reg. ADDress */ #define MCSR_ATS 0x00000001 /* Audio Transmit FIFO 1/2-full */ - /* or less Service request (read) */ + /* or less Service request (read) */ #define MCSR_ARS 0x00000002 /* Audio Receive FIFO 1/2-full or */ - /* more Service request (read) */ + /* more Service request (read) */ #define MCSR_TTS 0x00000004 /* Telecom Transmit FIFO 1/2-full */ - /* or less Service request (read) */ + /* or less Service request (read) */ #define MCSR_TRS 0x00000008 /* Telecom Receive FIFO 1/2-full */ - /* or more Service request (read) */ + /* or more Service request (read) */ #define MCSR_ATU 0x00000010 /* Audio Transmit FIFO Under-run */ #define MCSR_ARO 0x00000020 /* Audio Receive FIFO Over-run */ #define MCSR_TTU 0x00000040 /* Telecom Transmit FIFO Under-run */ #define MCSR_TRO 0x00000080 /* Telecom Receive FIFO Over-run */ #define MCSR_ANF 0x00000100 /* Audio transmit FIFO Not Full */ - /* (read) */ + /* (read) */ #define MCSR_ANE 0x00000200 /* Audio receive FIFO Not Empty */ - /* (read) */ + /* (read) */ #define MCSR_TNF 0x00000400 /* Telecom transmit FIFO Not Full */ - /* (read) */ + /* (read) */ #define MCSR_TNE 0x00000800 /* Telecom receive FIFO Not Empty */ - /* (read) */ + /* (read) */ #define MCSR_CWC 0x00001000 /* CODEC register Write Completed */ - /* (read) */ + /* (read) */ #define MCSR_CRC 0x00002000 /* CODEC register Read Completed */ - /* (read) */ + /* (read) */ #define MCSR_ACE 0x00004000 /* Audio CODEC Enabled (read) */ #define MCSR_TCE 0x00008000 /* Telecom CODEC Enabled (read) */ #define MCCR1_CFS 0x00100000 /* Clock Freq. Select */ #define MCCR1_F12MHz (MCCR1_CFS*0) /* Freq. (fmc) = ~ 12 MHz */ - /* (11.981 MHz) */ + /* (11.981 MHz) */ #define MCCR1_F10MHz (MCCR1_CFS*1) /* Freq. (fmc) = ~ 10 MHz */ - /* (9.585 MHz) */ + /* (9.585 MHz) */ /* @@ -1026,53 +1026,53 @@ #if LANGUAGE == C #define Ser4SSCR0 /* Ser. port 4 SSP Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_Ser4SSCR0))) + (*((volatile Word *) io_p2v (_Ser4SSCR0))) #define Ser4SSCR1 /* Ser. port 4 SSP Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_Ser4SSCR1))) + (*((volatile Word *) io_p2v (_Ser4SSCR1))) #define Ser4SSDR /* Ser. port 4 SSP Data Reg. */ \ - (*((volatile Word *) io_p2v (_Ser4SSDR))) + (*((volatile Word *) io_p2v (_Ser4SSDR))) #define Ser4SSSR /* Ser. port 4 SSP Status Reg. */ \ - (*((volatile Word *) io_p2v (_Ser4SSSR))) + (*((volatile Word *) io_p2v (_Ser4SSSR))) #endif /* LANGUAGE == C */ #define SSCR0_DSS Fld (4, 0) /* Data Size - 1 Select [3..15] */ #define SSCR0_DataSize(Size) /* Data Size Select [4..16] */ \ - (((Size) - 1) << FShft (SSCR0_DSS)) + (((Size) - 1) << FShft (SSCR0_DSS)) #define SSCR0_FRF Fld (2, 4) /* FRame Format */ #define SSCR0_Motorola /* Motorola Serial Peripheral */ \ - /* Interface (SPI) format */ \ - (0 << FShft (SSCR0_FRF)) + /* Interface (SPI) format */ \ + (0 << FShft (SSCR0_FRF)) #define SSCR0_TI /* Texas Instruments Synchronous */ \ - /* Serial format */ \ - (1 << FShft (SSCR0_FRF)) + /* Serial format */ \ + (1 << FShft (SSCR0_FRF)) #define SSCR0_National /* National Microwire format */ \ - (2 << FShft (SSCR0_FRF)) + (2 << FShft (SSCR0_FRF)) #define SSCR0_SSE 0x00000080 /* SSP Enable */ #define SSCR0_SCR Fld (8, 8) /* Serial Clock Rate divisor/2 - 1 */ - /* fss = fxtl/(2*(SCR + 1)) */ - /* Tss = 2*(SCR + 1)*Txtl */ + /* fss = fxtl/(2*(SCR + 1)) */ + /* Tss = 2*(SCR + 1)*Txtl */ #define SSCR0_SerClkDiv(Div) /* Serial Clock Divisor [2..512] */ \ - (((Div) - 2)/2 << FShft (SSCR0_SCR)) - /* fss = fxtl/(2*Floor (Div/2)) */ - /* Tss = 2*Floor (Div/2)*Txtl */ + (((Div) - 2)/2 << FShft (SSCR0_SCR)) + /* fss = fxtl/(2*Floor (Div/2)) */ + /* Tss = 2*Floor (Div/2)*Txtl */ #define SSCR0_CeilSerClkDiv(Div) /* Ceil. of SerClkDiv [2..512] */ \ - (((Div) - 1)/2 << FShft (SSCR0_SCR)) - /* fss = fxtl/(2*Ceil (Div/2)) */ - /* Tss = 2*Ceil (Div/2)*Txtl */ + (((Div) - 1)/2 << FShft (SSCR0_SCR)) + /* fss = fxtl/(2*Ceil (Div/2)) */ + /* Tss = 2*Ceil (Div/2)*Txtl */ #define SSCR1_RIE 0x00000001 /* Receive FIFO 1/2-full or more */ - /* Interrupt Enable */ + /* Interrupt Enable */ #define SSCR1_TIE 0x00000002 /* Transmit FIFO 1/2-full or less */ - /* Interrupt Enable */ + /* Interrupt Enable */ #define SSCR1_LBM 0x00000004 /* Look-Back Mode */ #define SSCR1_SPO 0x00000008 /* Sample clock (SCLK) POlarity */ #define SSCR1_SClkIactL (SSCR1_SPO*0) /* Sample Clock Inactive Low */ #define SSCR1_SClkIactH (SSCR1_SPO*1) /* Sample Clock Inactive High */ #define SSCR1_SP 0x00000010 /* Sample clock (SCLK) Phase */ #define SSCR1_SClk1P (SSCR1_SP*0) /* Sample Clock active 1 Period */ - /* after frame (SFRM, 1st edge) */ + /* after frame (SFRM, 1st edge) */ #define SSCR1_SClk1_2P (SSCR1_SP*1) /* Sample Clock active 1/2 Period */ - /* after frame (SFRM, 1st edge) */ + /* after frame (SFRM, 1st edge) */ #define SSCR1_ECS 0x00000020 /* External Clock Select */ #define SSCR1_IntClk (SSCR1_ECS*0) /* Internal Clock */ #define SSCR1_ExtClk (SSCR1_ECS*1) /* External Clock (GPIO [19]) */ @@ -1083,9 +1083,9 @@ #define SSSR_RNE 0x00000004 /* Receive FIFO Not Empty (read) */ #define SSSR_BSY 0x00000008 /* SSP BuSY (read) */ #define SSSR_TFS 0x00000010 /* Transmit FIFO 1/2-full or less */ - /* Service request (read) */ + /* Service request (read) */ #define SSSR_RFS 0x00000020 /* Receive FIFO 1/2-full or more */ - /* Service request (read) */ + /* Service request (read) */ #define SSSR_ROR 0x00000040 /* Receive FIFO Over-Run */ @@ -1112,7 +1112,7 @@ */ #define _OSMR(Nb) /* OS timer Match Reg. [0..3] */ \ - (0x90000000 + (Nb)*4) + (0x90000000 + (Nb)*4) #define _OSMR0 _OSMR (0) /* OS timer Match Reg. 0 */ #define _OSMR1 _OSMR (1) /* OS timer Match Reg. 1 */ #define _OSMR2 _OSMR (2) /* OS timer Match Reg. 2 */ @@ -1124,33 +1124,33 @@ #if LANGUAGE == C #define OSMR /* OS timer Match Reg. [0..3] */ \ - ((volatile Word *) io_p2v (_OSMR (0))) + ((volatile Word *) io_p2v (_OSMR (0))) #define OSMR0 (OSMR [0]) /* OS timer Match Reg. 0 */ #define OSMR1 (OSMR [1]) /* OS timer Match Reg. 1 */ #define OSMR2 (OSMR [2]) /* OS timer Match Reg. 2 */ #define OSMR3 (OSMR [3]) /* OS timer Match Reg. 3 */ #define OSCR /* OS timer Counter Reg. */ \ - (*((volatile Word *) io_p2v (_OSCR))) + (*((volatile Word *) io_p2v (_OSCR))) #define OSSR /* OS timer Status Reg. */ \ - (*((volatile Word *) io_p2v (_OSSR))) + (*((volatile Word *) io_p2v (_OSSR))) #define OWER /* OS timer Watch-dog Enable Reg. */ \ - (*((volatile Word *) io_p2v (_OWER))) + (*((volatile Word *) io_p2v (_OWER))) #define OIER /* OS timer Interrupt Enable Reg. */ \ - (*((volatile Word *) io_p2v (_OIER))) + (*((volatile Word *) io_p2v (_OIER))) #endif /* LANGUAGE == C */ #define OSSR_M(Nb) /* Match detected [0..3] */ \ - (0x00000001 << (Nb)) + (0x00000001 << (Nb)) #define OSSR_M0 OSSR_M (0) /* Match detected 0 */ #define OSSR_M1 OSSR_M (1) /* Match detected 1 */ #define OSSR_M2 OSSR_M (2) /* Match detected 2 */ #define OSSR_M3 OSSR_M (3) /* Match detected 3 */ #define OWER_WME 0x00000001 /* Watch-dog Match Enable */ - /* (set only) */ + /* (set only) */ #define OIER_E(Nb) /* match interrupt Enable [0..3] */ \ - (0x00000001 << (Nb)) + (0x00000001 << (Nb)) #define OIER_E0 OIER_E (0) /* match interrupt Enable 0 */ #define OIER_E1 OIER_E (1) /* match interrupt Enable 1 */ #define OIER_E2 OIER_E (2) /* match interrupt Enable 2 */ @@ -1180,21 +1180,21 @@ #if LANGUAGE == C #define RTAR /* RTC Alarm Reg. */ \ - (*((volatile Word *) io_p2v (_RTAR))) + (*((volatile Word *) io_p2v (_RTAR))) #define RCNR /* RTC CouNt Reg. */ \ - (*((volatile Word *) io_p2v (_RCNR))) + (*((volatile Word *) io_p2v (_RCNR))) #define RTTR /* RTC Trim Reg. */ \ - (*((volatile Word *) io_p2v (_RTTR))) + (*((volatile Word *) io_p2v (_RTTR))) #define RTSR /* RTC Status Reg. */ \ - (*((volatile Word *) io_p2v (_RTSR))) + (*((volatile Word *) io_p2v (_RTSR))) #endif /* LANGUAGE == C */ #define RTTR_C Fld (16, 0) /* clock divider Count - 1 */ #define RTTR_D Fld (10, 16) /* trim Delete count */ - /* frtc = (1023*(C + 1) - D)*frtx/ */ - /* (1023*(C + 1)^2) */ - /* Trtc = (1023*(C + 1)^2)*Trtx/ */ - /* (1023*(C + 1) - D) */ + /* frtc = (1023*(C + 1) - D)*frtx/ */ + /* (1023*(C + 1)^2) */ + /* Trtc = (1023*(C + 1)^2)*Trtx/ */ + /* (1023*(C + 1) - D) */ #define RTSR_AL 0x00000001 /* ALarm detected */ #define RTSR_HZ 0x00000002 /* 1 Hz clock detected */ @@ -1236,21 +1236,21 @@ #if LANGUAGE == C #define PMCR /* PM Control Reg. */ \ - (*((volatile Word *) io_p2v (_PMCR))) + (*((volatile Word *) io_p2v (_PMCR))) #define PSSR /* PM Sleep Status Reg. */ \ - (*((volatile Word *) io_p2v (_PSSR))) + (*((volatile Word *) io_p2v (_PSSR))) #define PSPR /* PM Scratch-Pad Reg. */ \ - (*((volatile Word *) io_p2v (_PSPR))) + (*((volatile Word *) io_p2v (_PSPR))) #define PWER /* PM Wake-up Enable Reg. */ \ - (*((volatile Word *) io_p2v (_PWER))) + (*((volatile Word *) io_p2v (_PWER))) #define PCFR /* PM general ConFiguration Reg. */ \ - (*((volatile Word *) io_p2v (_PCFR))) + (*((volatile Word *) io_p2v (_PCFR))) #define PPCR /* PM PLL Configuration Reg. */ \ - (*((volatile Word *) io_p2v (_PPCR))) + (*((volatile Word *) io_p2v (_PPCR))) #define PGSR /* PM GPIO Sleep state Reg. */ \ - (*((volatile Word *) io_p2v (_PGSR))) + (*((volatile Word *) io_p2v (_PGSR))) #define POSR /* PM Oscillator Status Reg. */ \ - (*((volatile Word *) io_p2v (_POSR))) + (*((volatile Word *) io_p2v (_POSR))) #elif LANGUAGE == Assembly #define PMCR (io_p2v (_PMCR)) @@ -1268,7 +1268,7 @@ #define PSSR_SS 0x00000001 /* Software Sleep */ #define PSSR_BFS 0x00000002 /* Battery Fault Status */ - /* (BATT_FAULT) */ + /* (BATT_FAULT) */ #define PSSR_VFS 0x00000004 /* Vdd Fault Status (VDD_FAULT) */ #define PSSR_DH 0x00000008 /* DRAM control Hold */ #define PSSR_PH 0x00000010 /* Peripheral control Hold */ @@ -1314,42 +1314,42 @@ #define PCFR_StMemNeg (PCFR_FS*0) /* Static Memory pins Negated (1) */ #define PCFR_StMemFlt (PCFR_FS*1) /* Static Memory pins Floating */ #define PCFR_FO 0x00000008 /* Force RTC oscillator */ - /* (32.768 kHz) enable On */ + /* (32.768 kHz) enable On */ #define PPCR_CCF Fld (5, 0) /* CPU core Clock (CCLK) Freq. */ #define PPCR_Fx16 /* Freq. x 16 (fcpu = 16*fxtl) */ \ - (0x00 << FShft (PPCR_CCF)) + (0x00 << FShft (PPCR_CCF)) #define PPCR_Fx20 /* Freq. x 20 (fcpu = 20*fxtl) */ \ - (0x01 << FShft (PPCR_CCF)) + (0x01 << FShft (PPCR_CCF)) #define PPCR_Fx24 /* Freq. x 24 (fcpu = 24*fxtl) */ \ - (0x02 << FShft (PPCR_CCF)) + (0x02 << FShft (PPCR_CCF)) #define PPCR_Fx28 /* Freq. x 28 (fcpu = 28*fxtl) */ \ - (0x03 << FShft (PPCR_CCF)) + (0x03 << FShft (PPCR_CCF)) #define PPCR_Fx32 /* Freq. x 32 (fcpu = 32*fxtl) */ \ - (0x04 << FShft (PPCR_CCF)) + (0x04 << FShft (PPCR_CCF)) #define PPCR_Fx36 /* Freq. x 36 (fcpu = 36*fxtl) */ \ - (0x05 << FShft (PPCR_CCF)) + (0x05 << FShft (PPCR_CCF)) #define PPCR_Fx40 /* Freq. x 40 (fcpu = 40*fxtl) */ \ - (0x06 << FShft (PPCR_CCF)) + (0x06 << FShft (PPCR_CCF)) #define PPCR_Fx44 /* Freq. x 44 (fcpu = 44*fxtl) */ \ - (0x07 << FShft (PPCR_CCF)) + (0x07 << FShft (PPCR_CCF)) #define PPCR_Fx48 /* Freq. x 48 (fcpu = 48*fxtl) */ \ - (0x08 << FShft (PPCR_CCF)) + (0x08 << FShft (PPCR_CCF)) #define PPCR_Fx52 /* Freq. x 52 (fcpu = 52*fxtl) */ \ - (0x09 << FShft (PPCR_CCF)) + (0x09 << FShft (PPCR_CCF)) #define PPCR_Fx56 /* Freq. x 56 (fcpu = 56*fxtl) */ \ - (0x0A << FShft (PPCR_CCF)) + (0x0A << FShft (PPCR_CCF)) #define PPCR_Fx60 /* Freq. x 60 (fcpu = 60*fxtl) */ \ - (0x0B << FShft (PPCR_CCF)) + (0x0B << FShft (PPCR_CCF)) #define PPCR_Fx64 /* Freq. x 64 (fcpu = 64*fxtl) */ \ - (0x0C << FShft (PPCR_CCF)) + (0x0C << FShft (PPCR_CCF)) #define PPCR_Fx68 /* Freq. x 68 (fcpu = 68*fxtl) */ \ - (0x0D << FShft (PPCR_CCF)) + (0x0D << FShft (PPCR_CCF)) #define PPCR_Fx72 /* Freq. x 72 (fcpu = 72*fxtl) */ \ - (0x0E << FShft (PPCR_CCF)) + (0x0E << FShft (PPCR_CCF)) #define PPCR_Fx76 /* Freq. x 76 (fcpu = 76*fxtl) */ \ - (0x0F << FShft (PPCR_CCF)) - /* 3.6864 MHz crystal (fxtl): */ + (0x0F << FShft (PPCR_CCF)) + /* 3.6864 MHz crystal (fxtl): */ #define PPCR_F59_0MHz PPCR_Fx16 /* Freq. (fcpu) = 59.0 MHz */ #define PPCR_F73_7MHz PPCR_Fx20 /* Freq. (fcpu) = 73.7 MHz */ #define PPCR_F88_5MHz PPCR_Fx24 /* Freq. (fcpu) = 88.5 MHz */ @@ -1366,7 +1366,7 @@ #define PPCR_F250_7MHz PPCR_Fx68 /* Freq. (fcpu) = 250.7 MHz */ #define PPCR_F265_4MHz PPCR_Fx72 /* Freq. (fcpu) = 265.4 MHz */ #define PPCR_F280_2MHz PPCR_Fx76 /* Freq. (fcpu) = 280.2 MHz */ - /* 3.5795 MHz crystal (fxtl): */ + /* 3.5795 MHz crystal (fxtl): */ #define PPCR_F57_3MHz PPCR_Fx16 /* Freq. (fcpu) = 57.3 MHz */ #define PPCR_F71_6MHz PPCR_Fx20 /* Freq. (fcpu) = 71.6 MHz */ #define PPCR_F85_9MHz PPCR_Fx24 /* Freq. (fcpu) = 85.9 MHz */ @@ -1401,9 +1401,9 @@ #if LANGUAGE == C #define RSRR /* RC Software Reset Reg. */ \ - (*((volatile Word *) io_p2v (_RSRR))) + (*((volatile Word *) io_p2v (_RSRR))) #define RCSR /* RC Status Reg. */ \ - (*((volatile Word *) io_p2v (_RCSR))) + (*((volatile Word *) io_p2v (_RCSR))) #endif /* LANGUAGE == C */ #define RSRR_SWR 0x00000001 /* SoftWare Reset (set only) */ @@ -1425,18 +1425,18 @@ #if LANGUAGE == C #define TUCR /* Test Unit Control Reg. */ \ - (*((volatile Word *) io_p2v (_TUCR))) + (*((volatile Word *) io_p2v (_TUCR))) #endif /* LANGUAGE == C */ #define TUCR_TIC 0x00000040 /* TIC mode */ #define TUCR_TTST 0x00000080 /* Trim TeST mode */ #define TUCR_RCRC 0x00000100 /* Richard's Cyclic Redundancy */ - /* Check */ + /* Check */ #define TUCR_PMD 0x00000200 /* Power Management Disable */ #define TUCR_MR 0x00000400 /* Memory Request mode */ #define TUCR_NoMB (TUCR_MR*0) /* No Memory Bus request & grant */ #define TUCR_MBGPIO (TUCR_MR*1) /* Memory Bus request (MBREQ) & */ - /* grant (MBGNT) on GPIO [22:21] */ + /* grant (MBGNT) on GPIO [22:21] */ #define TUCR_CTB Fld (3, 20) /* Clock Test Bits */ #define TUCR_FDC 0x00800000 /* RTC Force Delete Count */ #define TUCR_FMC 0x01000000 /* Force Michelle's Control mode */ @@ -1444,23 +1444,23 @@ #define TUCR_DPS 0x04000000 /* Disallow Pad Sleep */ #define TUCR_TSEL Fld (3, 29) /* clock Test SELect on GPIO [27] */ #define TUCR_32_768kHz /* 32.768 kHz osc. on GPIO [27] */ \ - (0 << FShft (TUCR_TSEL)) + (0 << FShft (TUCR_TSEL)) #define TUCR_3_6864MHz /* 3.6864 MHz osc. on GPIO [27] */ \ - (1 << FShft (TUCR_TSEL)) + (1 << FShft (TUCR_TSEL)) #define TUCR_VDD /* VDD ring osc./16 on GPIO [27] */ \ - (2 << FShft (TUCR_TSEL)) + (2 << FShft (TUCR_TSEL)) #define TUCR_96MHzPLL /* 96 MHz PLL/4 on GPIO [27] */ \ - (3 << FShft (TUCR_TSEL)) + (3 << FShft (TUCR_TSEL)) #define TUCR_Clock /* internal (fcpu/2) & 32.768 kHz */ \ - /* Clocks on GPIO [26:27] */ \ - (4 << FShft (TUCR_TSEL)) + /* Clocks on GPIO [26:27] */ \ + (4 << FShft (TUCR_TSEL)) #define TUCR_3_6864MHzA /* 3.6864 MHz osc. on GPIO [27] */ \ - /* (Alternative) */ \ - (5 << FShft (TUCR_TSEL)) + /* (Alternative) */ \ + (5 << FShft (TUCR_TSEL)) #define TUCR_MainPLL /* Main PLL/16 on GPIO [27] */ \ - (6 << FShft (TUCR_TSEL)) + (6 << FShft (TUCR_TSEL)) #define TUCR_VDDL /* VDDL ring osc./4 on GPIO [27] */ \ - (7 << FShft (TUCR_TSEL)) + (7 << FShft (TUCR_TSEL)) /* @@ -1499,21 +1499,21 @@ #if LANGUAGE == C #define GPLR /* GPIO Pin Level Reg. */ \ - (*((volatile Word *) io_p2v (_GPLR))) + (*((volatile Word *) io_p2v (_GPLR))) #define GPDR /* GPIO Pin Direction Reg. */ \ - (*((volatile Word *) io_p2v (_GPDR))) + (*((volatile Word *) io_p2v (_GPDR))) #define GPSR /* GPIO Pin output Set Reg. */ \ - (*((volatile Word *) io_p2v (_GPSR))) + (*((volatile Word *) io_p2v (_GPSR))) #define GPCR /* GPIO Pin output Clear Reg. */ \ - (*((volatile Word *) io_p2v (_GPCR))) + (*((volatile Word *) io_p2v (_GPCR))) #define GRER /* GPIO Rising-Edge detect Reg. */ \ - (*((volatile Word *) io_p2v (_GRER))) + (*((volatile Word *) io_p2v (_GRER))) #define GFER /* GPIO Falling-Edge detect Reg. */ \ - (*((volatile Word *) io_p2v (_GFER))) + (*((volatile Word *) io_p2v (_GFER))) #define GEDR /* GPIO Edge Detect status Reg. */ \ - (*((volatile Word *) io_p2v (_GEDR))) + (*((volatile Word *) io_p2v (_GEDR))) #define GAFR /* GPIO Alternate Function Reg. */ \ - (*((volatile Word *) io_p2v (_GAFR))) + (*((volatile Word *) io_p2v (_GAFR))) #elif LANGUAGE == Assembly #define GPLR (io_p2v (_GPLR)) @@ -1531,7 +1531,7 @@ #define GPIO_MAX (27) #define GPIO_GPIO(Nb) /* GPIO [0..27] */ \ - (0x00000001 << (Nb)) + (0x00000001 << (Nb)) #define GPIO_GPIO0 GPIO_GPIO (0) /* GPIO [0] */ #define GPIO_GPIO1 GPIO_GPIO (1) /* GPIO [1] */ #define GPIO_GPIO2 GPIO_GPIO (2) /* GPIO [2] */ @@ -1562,7 +1562,7 @@ #define GPIO_GPIO27 GPIO_GPIO (27) /* GPIO [27] */ #define GPIO_LDD(Nb) /* LCD Data [8..15] (O) */ \ - GPIO_GPIO ((Nb) - 6) + GPIO_GPIO ((Nb) - 6) #define GPIO_LDD8 GPIO_LDD (8) /* LCD Data [8] (O) */ #define GPIO_LDD9 GPIO_LDD (9) /* LCD Data [9] (O) */ #define GPIO_LDD10 GPIO_LDD (10) /* LCD Data [10] (O) */ @@ -1571,24 +1571,24 @@ #define GPIO_LDD13 GPIO_LDD (13) /* LCD Data [13] (O) */ #define GPIO_LDD14 GPIO_LDD (14) /* LCD Data [14] (O) */ #define GPIO_LDD15 GPIO_LDD (15) /* LCD Data [15] (O) */ - /* ser. port 4: */ + /* ser. port 4: */ #define GPIO_SSP_TXD GPIO_GPIO (10) /* SSP Transmit Data (O) */ #define GPIO_SSP_RXD GPIO_GPIO (11) /* SSP Receive Data (I) */ #define GPIO_SSP_SCLK GPIO_GPIO (12) /* SSP Sample CLocK (O) */ #define GPIO_SSP_SFRM GPIO_GPIO (13) /* SSP Sample FRaMe (O) */ - /* ser. port 1: */ + /* ser. port 1: */ #define GPIO_UART_TXD GPIO_GPIO (14) /* UART Transmit Data (O) */ #define GPIO_UART_RXD GPIO_GPIO (15) /* UART Receive Data (I) */ #define GPIO_SDLC_SCLK GPIO_GPIO (16) /* SDLC Sample CLocK (I/O) */ #define GPIO_SDLC_AAF GPIO_GPIO (17) /* SDLC Abort After Frame (O) */ #define GPIO_UART_SCLK1 GPIO_GPIO (18) /* UART Sample CLocK 1 (I) */ - /* ser. port 4: */ + /* ser. port 4: */ #define GPIO_SSP_CLK GPIO_GPIO (19) /* SSP external CLocK (I) */ - /* ser. port 3: */ + /* ser. port 3: */ #define GPIO_UART_SCLK3 GPIO_GPIO (20) /* UART Sample CLocK 3 (I) */ - /* ser. port 4: */ + /* ser. port 4: */ #define GPIO_MCP_CLK GPIO_GPIO (21) /* MCP CLocK (I) */ - /* test controller: */ + /* test controller: */ #define GPIO_TIC_ACK GPIO_GPIO (21) /* TIC ACKnowledge (O) */ #define GPIO_MBGNT GPIO_GPIO (21) /* Memory Bus GraNT (O) */ #define GPIO_TREQA GPIO_GPIO (22) /* TIC REQuest A (I) */ @@ -1632,21 +1632,21 @@ #if LANGUAGE == C #define ICIP /* IC IRQ Pending reg. */ \ - (*((volatile Word *) io_p2v (_ICIP))) + (*((volatile Word *) io_p2v (_ICIP))) #define ICMR /* IC Mask Reg. */ \ - (*((volatile Word *) io_p2v (_ICMR))) + (*((volatile Word *) io_p2v (_ICMR))) #define ICLR /* IC Level Reg. */ \ - (*((volatile Word *) io_p2v (_ICLR))) + (*((volatile Word *) io_p2v (_ICLR))) #define ICCR /* IC Control Reg. */ \ - (*((volatile Word *) io_p2v (_ICCR))) + (*((volatile Word *) io_p2v (_ICCR))) #define ICFP /* IC FIQ Pending reg. */ \ - (*((volatile Word *) io_p2v (_ICFP))) + (*((volatile Word *) io_p2v (_ICFP))) #define ICPR /* IC Pending Reg. */ \ - (*((volatile Word *) io_p2v (_ICPR))) + (*((volatile Word *) io_p2v (_ICPR))) #endif /* LANGUAGE == C */ #define IC_GPIO(Nb) /* GPIO [0..10] */ \ - (0x00000001 << (Nb)) + (0x00000001 << (Nb)) #define IC_GPIO0 IC_GPIO (0) /* GPIO [0] */ #define IC_GPIO1 IC_GPIO (1) /* GPIO [1] */ #define IC_GPIO2 IC_GPIO (2) /* GPIO [2] */ @@ -1668,7 +1668,7 @@ #define IC_Ser4MCP 0x00040000 /* Ser. port 4 MCP */ #define IC_Ser4SSP 0x00080000 /* Ser. port 4 SSP */ #define IC_DMA(Nb) /* DMA controller channel [0..5] */ \ - (0x00100000 << (Nb)) + (0x00100000 << (Nb)) #define IC_DMA0 IC_DMA (0) /* DMA controller channel 0 */ #define IC_DMA1 IC_DMA (1) /* DMA controller channel 1 */ #define IC_DMA2 IC_DMA (2) /* DMA controller channel 2 */ @@ -1676,7 +1676,7 @@ #define IC_DMA4 IC_DMA (4) /* DMA controller channel 4 */ #define IC_DMA5 IC_DMA (5) /* DMA controller channel 5 */ #define IC_OST(Nb) /* OS Timer match [0..3] */ \ - (0x04000000 << (Nb)) + (0x04000000 << (Nb)) #define IC_OST0 IC_OST (0) /* OS Timer match 0 */ #define IC_OST1 IC_OST (1) /* OS Timer match 1 */ #define IC_OST2 IC_OST (2) /* OS Timer match 2 */ @@ -1688,11 +1688,11 @@ #define ICLR_FIQ 1 /* Fast Interrupt reQuest */ #define ICCR_DIM 0x00000001 /* Disable Idle-mode interrupt */ - /* Mask */ + /* Mask */ #define ICCR_IdleAllInt (ICCR_DIM*0) /* Idle-mode All Interrupt enable */ - /* (ICMR ignored) */ + /* (ICMR ignored) */ #define ICCR_IdleMskInt (ICCR_DIM*1) /* Idle-mode non-Masked Interrupt */ - /* enable (ICMR used) */ + /* enable (ICMR used) */ /* @@ -1715,25 +1715,25 @@ #define _PPSR 0x90060004 /* PPC Pin State Reg. */ #define _PPAR 0x90060008 /* PPC Pin Assignment Reg. */ #define _PSDR 0x9006000C /* PPC Sleep-mode pin Direction */ - /* Reg. */ + /* Reg. */ #define _PPFR 0x90060010 /* PPC Pin Flag Reg. */ #if LANGUAGE == C #define PPDR /* PPC Pin Direction Reg. */ \ - (*((volatile Word *) io_p2v (_PPDR))) + (*((volatile Word *) io_p2v (_PPDR))) #define PPSR /* PPC Pin State Reg. */ \ - (*((volatile Word *) io_p2v (_PPSR))) + (*((volatile Word *) io_p2v (_PPSR))) #define PPAR /* PPC Pin Assignment Reg. */ \ - (*((volatile Word *) io_p2v (_PPAR))) + (*((volatile Word *) io_p2v (_PPAR))) #define PSDR /* PPC Sleep-mode pin Direction */ \ - /* Reg. */ \ - (*((volatile Word *) io_p2v (_PSDR))) + /* Reg. */ \ + (*((volatile Word *) io_p2v (_PSDR))) #define PPFR /* PPC Pin Flag Reg. */ \ - (*((volatile Word *) io_p2v (_PPFR))) + (*((volatile Word *) io_p2v (_PPFR))) #endif /* LANGUAGE == C */ #define PPC_LDD(Nb) /* LCD Data [0..7] */ \ - (0x00000001 << (Nb)) + (0x00000001 << (Nb)) #define PPC_LDD0 PPC_LDD (0) /* LCD Data [0] */ #define PPC_LDD1 PPC_LDD (1) /* LCD Data [1] */ #define PPC_LDD2 PPC_LDD (2) /* LCD Data [2] */ @@ -1746,16 +1746,16 @@ #define PPC_L_LCLK 0x00000200 /* LCD Line CLocK */ #define PPC_L_FCLK 0x00000400 /* LCD Frame CLocK */ #define PPC_L_BIAS 0x00000800 /* LCD AC BIAS */ - /* ser. port 1: */ + /* ser. port 1: */ #define PPC_TXD1 0x00001000 /* SDLC/UART Transmit Data 1 */ #define PPC_RXD1 0x00002000 /* SDLC/UART Receive Data 1 */ - /* ser. port 2: */ + /* ser. port 2: */ #define PPC_TXD2 0x00004000 /* IPC Transmit Data 2 */ #define PPC_RXD2 0x00008000 /* IPC Receive Data 2 */ - /* ser. port 3: */ + /* ser. port 3: */ #define PPC_TXD3 0x00010000 /* UART Transmit Data 3 */ #define PPC_RXD3 0x00020000 /* UART Receive Data 3 */ - /* ser. port 4: */ + /* ser. port 4: */ #define PPC_TXD4 0x00040000 /* MCP/SSP Transmit Data 4 */ #define PPC_RXD4 0x00080000 /* MCP/SSP Receive Data 4 */ #define PPC_SCLK 0x00100000 /* MCP/SSP Sample CLocK */ @@ -1764,14 +1764,14 @@ #define PPDR_In 0 /* Input */ #define PPDR_Out 1 /* Output */ - /* ser. port 1: */ + /* ser. port 1: */ #define PPAR_UPR 0x00001000 /* UART Pin Reassignment */ #define PPAR_UARTTR (PPAR_UPR*0) /* UART on TXD_1 & RXD_1 */ #define PPAR_UARTGPIO (PPAR_UPR*1) /* UART on GPIO [14:15] */ - /* ser. port 4: */ + /* ser. port 4: */ #define PPAR_SPR 0x00040000 /* SSP Pin Reassignment */ #define PPAR_SSPTRSS (PPAR_SPR*0) /* SSP on TXD_C, RXD_C, SCLK_C, */ - /* & SFRM_C */ + /* & SFRM_C */ #define PPAR_SSPGPIO (PPAR_SPR*1) /* SSP on GPIO [10:13] */ #define PSDR_OutL 0 /* Output Low in sleep mode */ @@ -1811,20 +1811,20 @@ * fcas, Tcas Frequency, period of the DRAM CAS shift registers. */ - /* Memory system: */ + /* Memory system: */ #define _MDCNFG 0xA0000000 /* DRAM CoNFiGuration reg. */ #define _MDCAS(Nb) /* DRAM CAS shift reg. [0..3] */ \ - (0xA0000004 + (Nb)*4) + (0xA0000004 + (Nb)*4) #define _MDCAS0 _MDCAS (0) /* DRAM CAS shift reg. 0 */ #define _MDCAS1 _MDCAS (1) /* DRAM CAS shift reg. 1 */ #define _MDCAS2 _MDCAS (2) /* DRAM CAS shift reg. 2 */ #if LANGUAGE == C - /* Memory system: */ + /* Memory system: */ #define MDCNFG /* DRAM CoNFiGuration reg. */ \ - (*((volatile Word *) io_p2v (_MDCNFG))) + (*((volatile Word *) io_p2v (_MDCNFG))) #define MDCAS /* DRAM CAS shift reg. [0..3] */ \ - ((volatile Word *) io_p2v (_MDCAS (0))) + ((volatile Word *) io_p2v (_MDCAS (0))) #define MDCAS0 (MDCAS [0]) /* DRAM CAS shift reg. 0 */ #define MDCAS1 (MDCAS [1]) /* DRAM CAS shift reg. 1 */ #define MDCAS2 (MDCAS [2]) /* DRAM CAS shift reg. 2 */ @@ -1837,34 +1837,34 @@ /* SA1100 MDCNFG values */ #define MDCNFG_DE(Nb) /* DRAM Enable bank [0..3] */ \ - (0x00000001 << (Nb)) + (0x00000001 << (Nb)) #define MDCNFG_DE0 MDCNFG_DE (0) /* DRAM Enable bank 0 */ #define MDCNFG_DE1 MDCNFG_DE (1) /* DRAM Enable bank 1 */ #define MDCNFG_DE2 MDCNFG_DE (2) /* DRAM Enable bank 2 */ #define MDCNFG_DE3 MDCNFG_DE (3) /* DRAM Enable bank 3 */ #define MDCNFG_DRAC Fld (2, 4) /* DRAM Row Address Count - 9 */ #define MDCNFG_RowAdd(Add) /* Row Address count [9..12] */ \ - (((Add) - 9) << FShft (MDCNFG_DRAC)) + (((Add) - 9) << FShft (MDCNFG_DRAC)) #define MDCNFG_CDB2 0x00000040 /* shift reg. Clock Divide By 2 */ - /* (fcas = fcpu/2) */ + /* (fcas = fcpu/2) */ #define MDCNFG_TRP Fld (4, 7) /* Time RAS Pre-charge - 1 [Tmem] */ #define MDCNFG_PrChrg(Tcpu) /* Pre-Charge time [2..32 Tcpu] */ \ - (((Tcpu) - 2)/2 << FShft (MDCNFG_TRP)) + (((Tcpu) - 2)/2 << FShft (MDCNFG_TRP)) #define MDCNFG_CeilPrChrg(Tcpu) /* Ceil. of PrChrg [2..32 Tcpu] */ \ - (((Tcpu) - 1)/2 << FShft (MDCNFG_TRP)) + (((Tcpu) - 1)/2 << FShft (MDCNFG_TRP)) #define MDCNFG_TRASR Fld (4, 11) /* Time RAS Refresh - 1 [Tmem] */ #define MDCNFG_Ref(Tcpu) /* Refresh time [2..32 Tcpu] */ \ - (((Tcpu) - 2)/2 << FShft (MDCNFG_TRASR)) + (((Tcpu) - 2)/2 << FShft (MDCNFG_TRASR)) #define MDCNFG_CeilRef(Tcpu) /* Ceil. of Ref [2..32 Tcpu] */ \ - (((Tcpu) - 1)/2 << FShft (MDCNFG_TRASR)) + (((Tcpu) - 1)/2 << FShft (MDCNFG_TRASR)) #define MDCNFG_TDL Fld (2, 15) /* Time Data Latch [Tcpu] */ #define MDCNFG_DataLtch(Tcpu) /* Data Latch delay [0..3 Tcpu] */ \ - ((Tcpu) << FShft (MDCNFG_TDL)) + ((Tcpu) << FShft (MDCNFG_TDL)) #define MDCNFG_DRI Fld (15, 17) /* min. DRAM Refresh Interval/4 */ - /* [Tmem] */ + /* [Tmem] */ #define MDCNFG_RefInt(Tcpu) /* min. Refresh Interval */ \ - /* [0..262136 Tcpu] */ \ - ((Tcpu)/8 << FShft (MDCNFG_DRI)) + /* [0..262136 Tcpu] */ \ + ((Tcpu)/8 << FShft (MDCNFG_DRI)) /* SA1110 MDCNFG values */ #define MDCNFG_SA1110_DE0 0x00000001 /* DRAM Enable bank 0 */ @@ -1872,22 +1872,22 @@ #define MDCNFG_SA1110_DTIM0 0x00000004 /* DRAM timing type 0/1 */ #define MDCNFG_SA1110_DWID0 0x00000008 /* DRAM bus width 0/1 */ #define MDCNFG_SA1110_DRAC0 Fld(3, 4) /* DRAM row addr bit count */ - /* bank 0/1 */ + /* bank 0/1 */ #define MDCNFG_SA1110_CDB20 0x00000080 /* Mem Clock divide by 2 0/1 */ #define MDCNFG_SA1110_TRP0 Fld(3, 8) /* RAS precharge 0/1 */ #define MDCNFG_SA1110_TDL0 Fld(2, 12) /* Data input latch after CAS*/ - /* deassertion 0/1 */ + /* deassertion 0/1 */ #define MDCNFG_SA1110_TWR0 Fld(2, 14) /* SDRAM write recovery 0/1 */ #define MDCNFG_SA1110_DE2 0x00010000 /* DRAM Enable bank 0 */ #define MDCNFG_SA1110_DE3 0x00020000 /* DRAM Enable bank 1 */ #define MDCNFG_SA1110_DTIM2 0x00040000 /* DRAM timing type 0/1 */ #define MDCNFG_SA1110_DWID2 0x00080000 /* DRAM bus width 0/1 */ #define MDCNFG_SA1110_DRAC2 Fld(3, 20) /* DRAM row addr bit count */ - /* bank 0/1 */ + /* bank 0/1 */ #define MDCNFG_SA1110_CDB22 0x00800000 /* Mem Clock divide by 2 0/1 */ #define MDCNFG_SA1110_TRP2 Fld(3, 24) /* RAS precharge 0/1 */ #define MDCNFG_SA1110_TDL2 Fld(2, 28) /* Data input latch after CAS*/ - /* deassertion 0/1 */ + /* deassertion 0/1 */ #define MDCNFG_SA1110_TWR2 Fld(2, 30) /* SDRAM write recovery 0/1 */ @@ -1905,19 +1905,19 @@ * fmem, Tmem Frequency, period of the memory clock (fmem = fcpu/2). */ - /* Memory system: */ + /* Memory system: */ #define _MSC(Nb) /* Static memory Control reg. */ \ - /* [0..1] */ \ - (0xA0000010 + (Nb)*4) + /* [0..1] */ \ + (0xA0000010 + (Nb)*4) #define _MSC0 _MSC (0) /* Static memory Control reg. 0 */ #define _MSC1 _MSC (1) /* Static memory Control reg. 1 */ #define _MSC2 0xA000002C /* Static memory Control reg. 2, not contiguous */ #if LANGUAGE == C - /* Memory system: */ + /* Memory system: */ #define MSC /* Static memory Control reg. */ \ - /* [0..1] */ \ - ((volatile Word *) io_p2v (_MSC (0))) + /* [0..1] */ \ + ((volatile Word *) io_p2v (_MSC (0))) #define MSC0 (MSC [0]) /* Static memory Control reg. 0 */ #define MSC1 (MSC [1]) /* Static memory Control reg. 1 */ #define MSC2 (*(volatile Word *) io_p2v (_MSC2)) /* Static memory Control reg. 2 */ @@ -1931,7 +1931,7 @@ #endif /* LANGUAGE == C */ #define MSC_Bnk(Nb) /* static memory Bank [0..3] */ \ - Fld (16, ((Nb) Modulo 2)*16) + Fld (16, ((Nb) Modulo 2)*16) #define MSC0_Bnk0 MSC_Bnk (0) /* static memory Bank 0 */ #define MSC0_Bnk1 MSC_Bnk (1) /* static memory Bank 1 */ #define MSC1_Bnk2 MSC_Bnk (2) /* static memory Bank 2 */ @@ -1939,46 +1939,46 @@ #define MSC_RT Fld (2, 0) /* ROM/static memory Type */ #define MSC_NonBrst /* Non-Burst static memory */ \ - (0 << FShft (MSC_RT)) + (0 << FShft (MSC_RT)) #define MSC_SRAM /* 32-bit byte-writable SRAM */ \ - (1 << FShft (MSC_RT)) + (1 << FShft (MSC_RT)) #define MSC_Brst4 /* Burst-of-4 static memory */ \ - (2 << FShft (MSC_RT)) + (2 << FShft (MSC_RT)) #define MSC_Brst8 /* Burst-of-8 static memory */ \ - (3 << FShft (MSC_RT)) + (3 << FShft (MSC_RT)) #define MSC_RBW 0x0004 /* ROM/static memory Bus Width */ #define MSC_32BitStMem (MSC_RBW*0) /* 32-Bit Static Memory */ #define MSC_16BitStMem (MSC_RBW*1) /* 16-Bit Static Memory */ #define MSC_RDF Fld (5, 3) /* ROM/static memory read Delay */ - /* First access - 1(.5) [Tmem] */ + /* First access - 1(.5) [Tmem] */ #define MSC_1stRdAcc(Tcpu) /* 1st Read Access time (burst */ \ - /* static memory) [3..65 Tcpu] */ \ - ((((Tcpu) - 3)/2) << FShft (MSC_RDF)) + /* static memory) [3..65 Tcpu] */ \ + ((((Tcpu) - 3)/2) << FShft (MSC_RDF)) #define MSC_Ceil1stRdAcc(Tcpu) /* Ceil. of 1stRdAcc [3..65 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDF)) + ((((Tcpu) - 2)/2) << FShft (MSC_RDF)) #define MSC_RdAcc(Tcpu) /* Read Access time (non-burst */ \ - /* static memory) [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDF)) + /* static memory) [2..64 Tcpu] */ \ + ((((Tcpu) - 2)/2) << FShft (MSC_RDF)) #define MSC_CeilRdAcc(Tcpu) /* Ceil. of RdAcc [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MSC_RDF)) + ((((Tcpu) - 1)/2) << FShft (MSC_RDF)) #define MSC_RDN Fld (5, 8) /* ROM/static memory read Delay */ - /* Next access - 1 [Tmem] */ + /* Next access - 1 [Tmem] */ #define MSC_NxtRdAcc(Tcpu) /* Next Read Access time (burst */ \ - /* static memory) [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDN)) + /* static memory) [2..64 Tcpu] */ \ + ((((Tcpu) - 2)/2) << FShft (MSC_RDN)) #define MSC_CeilNxtRdAcc(Tcpu) /* Ceil. of NxtRdAcc [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MSC_RDN)) + ((((Tcpu) - 1)/2) << FShft (MSC_RDN)) #define MSC_WrAcc(Tcpu) /* Write Access time (non-burst */ \ - /* static memory) [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MSC_RDN)) + /* static memory) [2..64 Tcpu] */ \ + ((((Tcpu) - 2)/2) << FShft (MSC_RDN)) #define MSC_CeilWrAcc(Tcpu) /* Ceil. of WrAcc [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MSC_RDN)) + ((((Tcpu) - 1)/2) << FShft (MSC_RDN)) #define MSC_RRR Fld (3, 13) /* ROM/static memory RecoveRy */ - /* time/2 [Tmem] */ + /* time/2 [Tmem] */ #define MSC_Rec(Tcpu) /* Recovery time [0..28 Tcpu] */ \ - (((Tcpu)/4) << FShft (MSC_RRR)) + (((Tcpu)/4) << FShft (MSC_RRR)) #define MSC_CeilRec(Tcpu) /* Ceil. of Rec [0..28 Tcpu] */ \ - ((((Tcpu) + 3)/4) << FShft (MSC_RRR)) + ((((Tcpu) + 3)/4) << FShft (MSC_RRR)) /* @@ -1995,38 +1995,38 @@ * fbclk, Tbclk Frequency, period of the PCMCIA clock (BCLK). */ - /* Memory system: */ + /* Memory system: */ #define _MECR 0xA0000018 /* Expansion memory bus (PCMCIA) */ - /* Configuration Reg. */ + /* Configuration Reg. */ #if LANGUAGE == C - /* Memory system: */ + /* Memory system: */ #define MECR /* Expansion memory bus (PCMCIA) */ \ - /* Configuration Reg. */ \ - (*((volatile Word *) io_p2v (_MECR))) + /* Configuration Reg. */ \ + (*((volatile Word *) io_p2v (_MECR))) #endif /* LANGUAGE == C */ #define MECR_PCMCIA(Nb) /* PCMCIA [0..1] */ \ - Fld (15, (Nb)*16) + Fld (15, (Nb)*16) #define MECR_PCMCIA0 MECR_PCMCIA (0) /* PCMCIA 0 */ #define MECR_PCMCIA1 MECR_PCMCIA (1) /* PCMCIA 1 */ #define MECR_BSIO Fld (5, 0) /* BCLK Select I/O - 1 [Tmem] */ #define MECR_IOClk(Tcpu) /* I/O Clock [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MECR_BSIO)) + ((((Tcpu) - 2)/2) << FShft (MECR_BSIO)) #define MECR_CeilIOClk(Tcpu) /* Ceil. of IOClk [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MECR_BSIO)) + ((((Tcpu) - 1)/2) << FShft (MECR_BSIO)) #define MECR_BSA Fld (5, 5) /* BCLK Select Attribute - 1 */ - /* [Tmem] */ + /* [Tmem] */ #define MECR_AttrClk(Tcpu) /* Attribute Clock [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MECR_BSA)) + ((((Tcpu) - 2)/2) << FShft (MECR_BSA)) #define MECR_CeilAttrClk(Tcpu) /* Ceil. of AttrClk [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MECR_BSA)) + ((((Tcpu) - 1)/2) << FShft (MECR_BSA)) #define MECR_BSM Fld (5, 10) /* BCLK Select Memory - 1 [Tmem] */ #define MECR_MemClk(Tcpu) /* Memory Clock [2..64 Tcpu] */ \ - ((((Tcpu) - 2)/2) << FShft (MECR_BSM)) + ((((Tcpu) - 2)/2) << FShft (MECR_BSM)) #define MECR_CeilMemClk(Tcpu) /* Ceil. of MemClk [2..64 Tcpu] */ \ - ((((Tcpu) - 1)/2) << FShft (MECR_BSM)) + ((((Tcpu) - 1)/2) << FShft (MECR_BSM)) /* * On SA1110 only @@ -2035,9 +2035,9 @@ #define _MDREFR 0xA000001C #if LANGUAGE == C - /* Memory system: */ + /* Memory system: */ #define MDREFR \ - (*((volatile Word *) io_p2v (_MDREFR))) + (*((volatile Word *) io_p2v (_MDREFR))) #elif LANGUAGE == Assembly @@ -2146,291 +2146,291 @@ #define DMASp 0x00000020 /* DMA control reg. Space [byte] */ #define _DDAR(Nb) /* DMA Device Address Reg. */ \ - /* channel [0..5] */ \ - (0xB0000000 + (Nb)*DMASp) + /* channel [0..5] */ \ + (0xB0000000 + (Nb)*DMASp) #define _SetDCSR(Nb) /* Set DMA Control & Status Reg. */ \ - /* channel [0..5] (write) */ \ - (0xB0000004 + (Nb)*DMASp) + /* channel [0..5] (write) */ \ + (0xB0000004 + (Nb)*DMASp) #define _ClrDCSR(Nb) /* Clear DMA Control & Status Reg. */ \ - /* channel [0..5] (write) */ \ - (0xB0000008 + (Nb)*DMASp) + /* channel [0..5] (write) */ \ + (0xB0000008 + (Nb)*DMASp) #define _RdDCSR(Nb) /* Read DMA Control & Status Reg. */ \ - /* channel [0..5] (read) */ \ - (0xB000000C + (Nb)*DMASp) + /* channel [0..5] (read) */ \ + (0xB000000C + (Nb)*DMASp) #define _DBSA(Nb) /* DMA Buffer Start address reg. A */ \ - /* channel [0..5] */ \ - (0xB0000010 + (Nb)*DMASp) + /* channel [0..5] */ \ + (0xB0000010 + (Nb)*DMASp) #define _DBTA(Nb) /* DMA Buffer Transfer count */ \ - /* reg. A channel [0..5] */ \ - (0xB0000014 + (Nb)*DMASp) + /* reg. A channel [0..5] */ \ + (0xB0000014 + (Nb)*DMASp) #define _DBSB(Nb) /* DMA Buffer Start address reg. B */ \ - /* channel [0..5] */ \ - (0xB0000018 + (Nb)*DMASp) + /* channel [0..5] */ \ + (0xB0000018 + (Nb)*DMASp) #define _DBTB(Nb) /* DMA Buffer Transfer count */ \ - /* reg. B channel [0..5] */ \ - (0xB000001C + (Nb)*DMASp) + /* reg. B channel [0..5] */ \ + (0xB000001C + (Nb)*DMASp) #define _DDAR0 _DDAR (0) /* DMA Device Address Reg. */ - /* channel 0 */ + /* channel 0 */ #define _SetDCSR0 _SetDCSR (0) /* Set DMA Control & Status Reg. */ - /* channel 0 (write) */ + /* channel 0 (write) */ #define _ClrDCSR0 _ClrDCSR (0) /* Clear DMA Control & Status Reg. */ - /* channel 0 (write) */ + /* channel 0 (write) */ #define _RdDCSR0 _RdDCSR (0) /* Read DMA Control & Status Reg. */ - /* channel 0 (read) */ + /* channel 0 (read) */ #define _DBSA0 _DBSA (0) /* DMA Buffer Start address reg. A */ - /* channel 0 */ + /* channel 0 */ #define _DBTA0 _DBTA (0) /* DMA Buffer Transfer count */ - /* reg. A channel 0 */ + /* reg. A channel 0 */ #define _DBSB0 _DBSB (0) /* DMA Buffer Start address reg. B */ - /* channel 0 */ + /* channel 0 */ #define _DBTB0 _DBTB (0) /* DMA Buffer Transfer count */ - /* reg. B channel 0 */ + /* reg. B channel 0 */ #define _DDAR1 _DDAR (1) /* DMA Device Address Reg. */ - /* channel 1 */ + /* channel 1 */ #define _SetDCSR1 _SetDCSR (1) /* Set DMA Control & Status Reg. */ - /* channel 1 (write) */ + /* channel 1 (write) */ #define _ClrDCSR1 _ClrDCSR (1) /* Clear DMA Control & Status Reg. */ - /* channel 1 (write) */ + /* channel 1 (write) */ #define _RdDCSR1 _RdDCSR (1) /* Read DMA Control & Status Reg. */ - /* channel 1 (read) */ + /* channel 1 (read) */ #define _DBSA1 _DBSA (1) /* DMA Buffer Start address reg. A */ - /* channel 1 */ + /* channel 1 */ #define _DBTA1 _DBTA (1) /* DMA Buffer Transfer count */ - /* reg. A channel 1 */ + /* reg. A channel 1 */ #define _DBSB1 _DBSB (1) /* DMA Buffer Start address reg. B */ - /* channel 1 */ + /* channel 1 */ #define _DBTB1 _DBTB (1) /* DMA Buffer Transfer count */ - /* reg. B channel 1 */ + /* reg. B channel 1 */ #define _DDAR2 _DDAR (2) /* DMA Device Address Reg. */ - /* channel 2 */ + /* channel 2 */ #define _SetDCSR2 _SetDCSR (2) /* Set DMA Control & Status Reg. */ - /* channel 2 (write) */ + /* channel 2 (write) */ #define _ClrDCSR2 _ClrDCSR (2) /* Clear DMA Control & Status Reg. */ - /* channel 2 (write) */ + /* channel 2 (write) */ #define _RdDCSR2 _RdDCSR (2) /* Read DMA Control & Status Reg. */ - /* channel 2 (read) */ + /* channel 2 (read) */ #define _DBSA2 _DBSA (2) /* DMA Buffer Start address reg. A */ - /* channel 2 */ + /* channel 2 */ #define _DBTA2 _DBTA (2) /* DMA Buffer Transfer count */ - /* reg. A channel 2 */ + /* reg. A channel 2 */ #define _DBSB2 _DBSB (2) /* DMA Buffer Start address reg. B */ - /* channel 2 */ + /* channel 2 */ #define _DBTB2 _DBTB (2) /* DMA Buffer Transfer count */ - /* reg. B channel 2 */ + /* reg. B channel 2 */ #define _DDAR3 _DDAR (3) /* DMA Device Address Reg. */ - /* channel 3 */ + /* channel 3 */ #define _SetDCSR3 _SetDCSR (3) /* Set DMA Control & Status Reg. */ - /* channel 3 (write) */ + /* channel 3 (write) */ #define _ClrDCSR3 _ClrDCSR (3) /* Clear DMA Control & Status Reg. */ - /* channel 3 (write) */ + /* channel 3 (write) */ #define _RdDCSR3 _RdDCSR (3) /* Read DMA Control & Status Reg. */ - /* channel 3 (read) */ + /* channel 3 (read) */ #define _DBSA3 _DBSA (3) /* DMA Buffer Start address reg. A */ - /* channel 3 */ + /* channel 3 */ #define _DBTA3 _DBTA (3) /* DMA Buffer Transfer count */ - /* reg. A channel 3 */ + /* reg. A channel 3 */ #define _DBSB3 _DBSB (3) /* DMA Buffer Start address reg. B */ - /* channel 3 */ + /* channel 3 */ #define _DBTB3 _DBTB (3) /* DMA Buffer Transfer count */ - /* reg. B channel 3 */ + /* reg. B channel 3 */ #define _DDAR4 _DDAR (4) /* DMA Device Address Reg. */ - /* channel 4 */ + /* channel 4 */ #define _SetDCSR4 _SetDCSR (4) /* Set DMA Control & Status Reg. */ - /* channel 4 (write) */ + /* channel 4 (write) */ #define _ClrDCSR4 _ClrDCSR (4) /* Clear DMA Control & Status Reg. */ - /* channel 4 (write) */ + /* channel 4 (write) */ #define _RdDCSR4 _RdDCSR (4) /* Read DMA Control & Status Reg. */ - /* channel 4 (read) */ + /* channel 4 (read) */ #define _DBSA4 _DBSA (4) /* DMA Buffer Start address reg. A */ - /* channel 4 */ + /* channel 4 */ #define _DBTA4 _DBTA (4) /* DMA Buffer Transfer count */ - /* reg. A channel 4 */ + /* reg. A channel 4 */ #define _DBSB4 _DBSB (4) /* DMA Buffer Start address reg. B */ - /* channel 4 */ + /* channel 4 */ #define _DBTB4 _DBTB (4) /* DMA Buffer Transfer count */ - /* reg. B channel 4 */ + /* reg. B channel 4 */ #define _DDAR5 _DDAR (5) /* DMA Device Address Reg. */ - /* channel 5 */ + /* channel 5 */ #define _SetDCSR5 _SetDCSR (5) /* Set DMA Control & Status Reg. */ - /* channel 5 (write) */ + /* channel 5 (write) */ #define _ClrDCSR5 _ClrDCSR (5) /* Clear DMA Control & Status Reg. */ - /* channel 5 (write) */ + /* channel 5 (write) */ #define _RdDCSR5 _RdDCSR (5) /* Read DMA Control & Status Reg. */ - /* channel 5 (read) */ + /* channel 5 (read) */ #define _DBSA5 _DBSA (5) /* DMA Buffer Start address reg. A */ - /* channel 5 */ + /* channel 5 */ #define _DBTA5 _DBTA (5) /* DMA Buffer Transfer count */ - /* reg. A channel 5 */ + /* reg. A channel 5 */ #define _DBSB5 _DBSB (5) /* DMA Buffer Start address reg. B */ - /* channel 5 */ + /* channel 5 */ #define _DBTB5 _DBTB (5) /* DMA Buffer Transfer count */ - /* reg. B channel 5 */ + /* reg. B channel 5 */ #if LANGUAGE == C #define DDAR0 /* DMA Device Address Reg. */ \ - /* channel 0 */ \ - (*((volatile Word *) io_p2v (_DDAR0))) + /* channel 0 */ \ + (*((volatile Word *) io_p2v (_DDAR0))) #define SetDCSR0 /* Set DMA Control & Status Reg. */ \ - /* channel 0 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR0))) + /* channel 0 (write) */ \ + (*((volatile Word *) io_p2v (_SetDCSR0))) #define ClrDCSR0 /* Clear DMA Control & Status Reg. */ \ - /* channel 0 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR0))) + /* channel 0 (write) */ \ + (*((volatile Word *) io_p2v (_ClrDCSR0))) #define RdDCSR0 /* Read DMA Control & Status Reg. */ \ - /* channel 0 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR0))) + /* channel 0 (read) */ \ + (*((volatile Word *) io_p2v (_RdDCSR0))) #define DBSA0 /* DMA Buffer Start address reg. A */ \ - /* channel 0 */ \ - (*((volatile Address *) io_p2v (_DBSA0))) + /* channel 0 */ \ + (*((volatile Address *) io_p2v (_DBSA0))) #define DBTA0 /* DMA Buffer Transfer count */ \ - /* reg. A channel 0 */ \ - (*((volatile Word *) io_p2v (_DBTA0))) + /* reg. A channel 0 */ \ + (*((volatile Word *) io_p2v (_DBTA0))) #define DBSB0 /* DMA Buffer Start address reg. B */ \ - /* channel 0 */ \ - (*((volatile Address *) io_p2v (_DBSB0))) + /* channel 0 */ \ + (*((volatile Address *) io_p2v (_DBSB0))) #define DBTB0 /* DMA Buffer Transfer count */ \ - /* reg. B channel 0 */ \ - (*((volatile Word *) io_p2v (_DBTB0))) + /* reg. B channel 0 */ \ + (*((volatile Word *) io_p2v (_DBTB0))) #define DDAR1 /* DMA Device Address Reg. */ \ - /* channel 1 */ \ - (*((volatile Word *) io_p2v (_DDAR1))) + /* channel 1 */ \ + (*((volatile Word *) io_p2v (_DDAR1))) #define SetDCSR1 /* Set DMA Control & Status Reg. */ \ - /* channel 1 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR1))) + /* channel 1 (write) */ \ + (*((volatile Word *) io_p2v (_SetDCSR1))) #define ClrDCSR1 /* Clear DMA Control & Status Reg. */ \ - /* channel 1 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR1))) + /* channel 1 (write) */ \ + (*((volatile Word *) io_p2v (_ClrDCSR1))) #define RdDCSR1 /* Read DMA Control & Status Reg. */ \ - /* channel 1 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR1))) + /* channel 1 (read) */ \ + (*((volatile Word *) io_p2v (_RdDCSR1))) #define DBSA1 /* DMA Buffer Start address reg. A */ \ - /* channel 1 */ \ - (*((volatile Address *) io_p2v (_DBSA1))) + /* channel 1 */ \ + (*((volatile Address *) io_p2v (_DBSA1))) #define DBTA1 /* DMA Buffer Transfer count */ \ - /* reg. A channel 1 */ \ - (*((volatile Word *) io_p2v (_DBTA1))) + /* reg. A channel 1 */ \ + (*((volatile Word *) io_p2v (_DBTA1))) #define DBSB1 /* DMA Buffer Start address reg. B */ \ - /* channel 1 */ \ - (*((volatile Address *) io_p2v (_DBSB1))) + /* channel 1 */ \ + (*((volatile Address *) io_p2v (_DBSB1))) #define DBTB1 /* DMA Buffer Transfer count */ \ - /* reg. B channel 1 */ \ - (*((volatile Word *) io_p2v (_DBTB1))) + /* reg. B channel 1 */ \ + (*((volatile Word *) io_p2v (_DBTB1))) #define DDAR2 /* DMA Device Address Reg. */ \ - /* channel 2 */ \ - (*((volatile Word *) io_p2v (_DDAR2))) + /* channel 2 */ \ + (*((volatile Word *) io_p2v (_DDAR2))) #define SetDCSR2 /* Set DMA Control & Status Reg. */ \ - /* channel 2 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR2))) + /* channel 2 (write) */ \ + (*((volatile Word *) io_p2v (_SetDCSR2))) #define ClrDCSR2 /* Clear DMA Control & Status Reg. */ \ - /* channel 2 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR2))) + /* channel 2 (write) */ \ + (*((volatile Word *) io_p2v (_ClrDCSR2))) #define RdDCSR2 /* Read DMA Control & Status Reg. */ \ - /* channel 2 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR2))) + /* channel 2 (read) */ \ + (*((volatile Word *) io_p2v (_RdDCSR2))) #define DBSA2 /* DMA Buffer Start address reg. A */ \ - /* channel 2 */ \ - (*((volatile Address *) io_p2v (_DBSA2))) + /* channel 2 */ \ + (*((volatile Address *) io_p2v (_DBSA2))) #define DBTA2 /* DMA Buffer Transfer count */ \ - /* reg. A channel 2 */ \ - (*((volatile Word *) io_p2v (_DBTA2))) + /* reg. A channel 2 */ \ + (*((volatile Word *) io_p2v (_DBTA2))) #define DBSB2 /* DMA Buffer Start address reg. B */ \ - /* channel 2 */ \ - (*((volatile Address *) io_p2v (_DBSB2))) + /* channel 2 */ \ + (*((volatile Address *) io_p2v (_DBSB2))) #define DBTB2 /* DMA Buffer Transfer count */ \ - /* reg. B channel 2 */ \ - (*((volatile Word *) io_p2v (_DBTB2))) + /* reg. B channel 2 */ \ + (*((volatile Word *) io_p2v (_DBTB2))) #define DDAR3 /* DMA Device Address Reg. */ \ - /* channel 3 */ \ - (*((volatile Word *) io_p2v (_DDAR3))) + /* channel 3 */ \ + (*((volatile Word *) io_p2v (_DDAR3))) #define SetDCSR3 /* Set DMA Control & Status Reg. */ \ - /* channel 3 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR3))) + /* channel 3 (write) */ \ + (*((volatile Word *) io_p2v (_SetDCSR3))) #define ClrDCSR3 /* Clear DMA Control & Status Reg. */ \ - /* channel 3 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR3))) + /* channel 3 (write) */ \ + (*((volatile Word *) io_p2v (_ClrDCSR3))) #define RdDCSR3 /* Read DMA Control & Status Reg. */ \ - /* channel 3 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR3))) + /* channel 3 (read) */ \ + (*((volatile Word *) io_p2v (_RdDCSR3))) #define DBSA3 /* DMA Buffer Start address reg. A */ \ - /* channel 3 */ \ - (*((volatile Address *) io_p2v (_DBSA3))) + /* channel 3 */ \ + (*((volatile Address *) io_p2v (_DBSA3))) #define DBTA3 /* DMA Buffer Transfer count */ \ - /* reg. A channel 3 */ \ - (*((volatile Word *) io_p2v (_DBTA3))) + /* reg. A channel 3 */ \ + (*((volatile Word *) io_p2v (_DBTA3))) #define DBSB3 /* DMA Buffer Start address reg. B */ \ - /* channel 3 */ \ - (*((volatile Address *) io_p2v (_DBSB3))) + /* channel 3 */ \ + (*((volatile Address *) io_p2v (_DBSB3))) #define DBTB3 /* DMA Buffer Transfer count */ \ - /* reg. B channel 3 */ \ - (*((volatile Word *) io_p2v (_DBTB3))) + /* reg. B channel 3 */ \ + (*((volatile Word *) io_p2v (_DBTB3))) #define DDAR4 /* DMA Device Address Reg. */ \ - /* channel 4 */ \ - (*((volatile Word *) io_p2v (_DDAR4))) + /* channel 4 */ \ + (*((volatile Word *) io_p2v (_DDAR4))) #define SetDCSR4 /* Set DMA Control & Status Reg. */ \ - /* channel 4 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR4))) + /* channel 4 (write) */ \ + (*((volatile Word *) io_p2v (_SetDCSR4))) #define ClrDCSR4 /* Clear DMA Control & Status Reg. */ \ - /* channel 4 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR4))) + /* channel 4 (write) */ \ + (*((volatile Word *) io_p2v (_ClrDCSR4))) #define RdDCSR4 /* Read DMA Control & Status Reg. */ \ - /* channel 4 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR4))) + /* channel 4 (read) */ \ + (*((volatile Word *) io_p2v (_RdDCSR4))) #define DBSA4 /* DMA Buffer Start address reg. A */ \ - /* channel 4 */ \ - (*((volatile Address *) io_p2v (_DBSA4))) + /* channel 4 */ \ + (*((volatile Address *) io_p2v (_DBSA4))) #define DBTA4 /* DMA Buffer Transfer count */ \ - /* reg. A channel 4 */ \ - (*((volatile Word *) io_p2v (_DBTA4))) + /* reg. A channel 4 */ \ + (*((volatile Word *) io_p2v (_DBTA4))) #define DBSB4 /* DMA Buffer Start address reg. B */ \ - /* channel 4 */ \ - (*((volatile Address *) io_p2v (_DBSB4))) + /* channel 4 */ \ + (*((volatile Address *) io_p2v (_DBSB4))) #define DBTB4 /* DMA Buffer Transfer count */ \ - /* reg. B channel 4 */ \ - (*((volatile Word *) io_p2v (_DBTB4))) + /* reg. B channel 4 */ \ + (*((volatile Word *) io_p2v (_DBTB4))) #define DDAR5 /* DMA Device Address Reg. */ \ - /* channel 5 */ \ - (*((volatile Word *) io_p2v (_DDAR5))) + /* channel 5 */ \ + (*((volatile Word *) io_p2v (_DDAR5))) #define SetDCSR5 /* Set DMA Control & Status Reg. */ \ - /* channel 5 (write) */ \ - (*((volatile Word *) io_p2v (_SetDCSR5))) + /* channel 5 (write) */ \ + (*((volatile Word *) io_p2v (_SetDCSR5))) #define ClrDCSR5 /* Clear DMA Control & Status Reg. */ \ - /* channel 5 (write) */ \ - (*((volatile Word *) io_p2v (_ClrDCSR5))) + /* channel 5 (write) */ \ + (*((volatile Word *) io_p2v (_ClrDCSR5))) #define RdDCSR5 /* Read DMA Control & Status Reg. */ \ - /* channel 5 (read) */ \ - (*((volatile Word *) io_p2v (_RdDCSR5))) + /* channel 5 (read) */ \ + (*((volatile Word *) io_p2v (_RdDCSR5))) #define DBSA5 /* DMA Buffer Start address reg. A */ \ - /* channel 5 */ \ - (*((volatile Address *) io_p2v (_DBSA5))) + /* channel 5 */ \ + (*((volatile Address *) io_p2v (_DBSA5))) #define DBTA5 /* DMA Buffer Transfer count */ \ - /* reg. A channel 5 */ \ - (*((volatile Word *) io_p2v (_DBTA5))) + /* reg. A channel 5 */ \ + (*((volatile Word *) io_p2v (_DBTA5))) #define DBSB5 /* DMA Buffer Start address reg. B */ \ - /* channel 5 */ \ - (*((volatile Address *) io_p2v (_DBSB5))) + /* channel 5 */ \ + (*((volatile Address *) io_p2v (_DBSB5))) #define DBTB5 /* DMA Buffer Transfer count */ \ - /* reg. B channel 5 */ \ - (*((volatile Word *) io_p2v (_DBTB5))) + /* reg. B channel 5 */ \ + (*((volatile Word *) io_p2v (_DBTB5))) #endif /* LANGUAGE == C */ #define DDAR_RW 0x00000001 /* device data Read/Write */ #define DDAR_DevWr (DDAR_RW*0) /* Device data Write */ - /* (memory -> device) */ + /* (memory -> device) */ #define DDAR_DevRd (DDAR_RW*1) /* Device data Read */ - /* (device -> memory) */ + /* (device -> memory) */ #define DDAR_E 0x00000002 /* big/little Endian device */ #define DDAR_LtlEnd (DDAR_E*0) /* Little Endian device */ #define DDAR_BigEnd (DDAR_E*1) /* Big Endian device */ @@ -2442,101 +2442,101 @@ #define DDAR_16BitDev (DDAR_DW*1) /* 16-Bit Device */ #define DDAR_DS Fld (4, 4) /* Device Select */ #define DDAR_Ser0UDCTr /* Ser. port 0 UDC Transmit */ \ - (0x0 << FShft (DDAR_DS)) + (0x0 << FShft (DDAR_DS)) #define DDAR_Ser0UDCRc /* Ser. port 0 UDC Receive */ \ - (0x1 << FShft (DDAR_DS)) + (0x1 << FShft (DDAR_DS)) #define DDAR_Ser1SDLCTr /* Ser. port 1 SDLC Transmit */ \ - (0x2 << FShft (DDAR_DS)) + (0x2 << FShft (DDAR_DS)) #define DDAR_Ser1SDLCRc /* Ser. port 1 SDLC Receive */ \ - (0x3 << FShft (DDAR_DS)) + (0x3 << FShft (DDAR_DS)) #define DDAR_Ser1UARTTr /* Ser. port 1 UART Transmit */ \ - (0x4 << FShft (DDAR_DS)) + (0x4 << FShft (DDAR_DS)) #define DDAR_Ser1UARTRc /* Ser. port 1 UART Receive */ \ - (0x5 << FShft (DDAR_DS)) + (0x5 << FShft (DDAR_DS)) #define DDAR_Ser2ICPTr /* Ser. port 2 ICP Transmit */ \ - (0x6 << FShft (DDAR_DS)) + (0x6 << FShft (DDAR_DS)) #define DDAR_Ser2ICPRc /* Ser. port 2 ICP Receive */ \ - (0x7 << FShft (DDAR_DS)) + (0x7 << FShft (DDAR_DS)) #define DDAR_Ser3UARTTr /* Ser. port 3 UART Transmit */ \ - (0x8 << FShft (DDAR_DS)) + (0x8 << FShft (DDAR_DS)) #define DDAR_Ser3UARTRc /* Ser. port 3 UART Receive */ \ - (0x9 << FShft (DDAR_DS)) + (0x9 << FShft (DDAR_DS)) #define DDAR_Ser4MCP0Tr /* Ser. port 4 MCP 0 Transmit */ \ - /* (audio) */ \ - (0xA << FShft (DDAR_DS)) + /* (audio) */ \ + (0xA << FShft (DDAR_DS)) #define DDAR_Ser4MCP0Rc /* Ser. port 4 MCP 0 Receive */ \ - /* (audio) */ \ - (0xB << FShft (DDAR_DS)) + /* (audio) */ \ + (0xB << FShft (DDAR_DS)) #define DDAR_Ser4MCP1Tr /* Ser. port 4 MCP 1 Transmit */ \ - /* (telecom) */ \ - (0xC << FShft (DDAR_DS)) + /* (telecom) */ \ + (0xC << FShft (DDAR_DS)) #define DDAR_Ser4MCP1Rc /* Ser. port 4 MCP 1 Receive */ \ - /* (telecom) */ \ - (0xD << FShft (DDAR_DS)) + /* (telecom) */ \ + (0xD << FShft (DDAR_DS)) #define DDAR_Ser4SSPTr /* Ser. port 4 SSP Transmit */ \ - (0xE << FShft (DDAR_DS)) + (0xE << FShft (DDAR_DS)) #define DDAR_Ser4SSPRc /* Ser. port 4 SSP Receive */ \ - (0xF << FShft (DDAR_DS)) + (0xF << FShft (DDAR_DS)) #define DDAR_DA Fld (24, 8) /* Device Address */ #define DDAR_DevAdd(Add) /* Device Address */ \ - (((Add) & 0xF0000000) | \ - (((Add) & 0X003FFFFC) << (FShft (DDAR_DA) - 2))) + (((Add) & 0xF0000000) | \ + (((Add) & 0X003FFFFC) << (FShft (DDAR_DA) - 2))) #define DDAR_Ser0UDCWr /* Ser. port 0 UDC Write */ \ - (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser0UDCTr + DDAR_DevAdd (_Ser0UDCDR)) + (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \ + DDAR_Ser0UDCTr + DDAR_DevAdd (_Ser0UDCDR)) #define DDAR_Ser0UDCRd /* Ser. port 0 UDC Read */ \ - (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser0UDCRc + DDAR_DevAdd (_Ser0UDCDR)) + (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \ + DDAR_Ser0UDCRc + DDAR_DevAdd (_Ser0UDCDR)) #define DDAR_Ser1UARTWr /* Ser. port 1 UART Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1UARTTr + DDAR_DevAdd (_Ser1UTDR)) + (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ + DDAR_Ser1UARTTr + DDAR_DevAdd (_Ser1UTDR)) #define DDAR_Ser1UARTRd /* Ser. port 1 UART Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1UARTRc + DDAR_DevAdd (_Ser1UTDR)) + (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ + DDAR_Ser1UARTRc + DDAR_DevAdd (_Ser1UTDR)) #define DDAR_Ser1SDLCWr /* Ser. port 1 SDLC Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1SDLCTr + DDAR_DevAdd (_Ser1SDDR)) + (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ + DDAR_Ser1SDLCTr + DDAR_DevAdd (_Ser1SDDR)) #define DDAR_Ser1SDLCRd /* Ser. port 1 SDLC Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser1SDLCRc + DDAR_DevAdd (_Ser1SDDR)) + (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ + DDAR_Ser1SDLCRc + DDAR_DevAdd (_Ser1SDDR)) #define DDAR_Ser2UARTWr /* Ser. port 2 UART Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser2ICPTr + DDAR_DevAdd (_Ser2UTDR)) + (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ + DDAR_Ser2ICPTr + DDAR_DevAdd (_Ser2UTDR)) #define DDAR_Ser2UARTRd /* Ser. port 2 UART Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser2ICPRc + DDAR_DevAdd (_Ser2UTDR)) + (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ + DDAR_Ser2ICPRc + DDAR_DevAdd (_Ser2UTDR)) #define DDAR_Ser2HSSPWr /* Ser. port 2 HSSP Write */ \ - (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser2ICPTr + DDAR_DevAdd (_Ser2HSDR)) + (DDAR_DevWr + DDAR_Brst8 + DDAR_8BitDev + \ + DDAR_Ser2ICPTr + DDAR_DevAdd (_Ser2HSDR)) #define DDAR_Ser2HSSPRd /* Ser. port 2 HSSP Read */ \ - (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \ - DDAR_Ser2ICPRc + DDAR_DevAdd (_Ser2HSDR)) + (DDAR_DevRd + DDAR_Brst8 + DDAR_8BitDev + \ + DDAR_Ser2ICPRc + DDAR_DevAdd (_Ser2HSDR)) #define DDAR_Ser3UARTWr /* Ser. port 3 UART Write */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser3UARTTr + DDAR_DevAdd (_Ser3UTDR)) + (DDAR_DevWr + DDAR_Brst4 + DDAR_8BitDev + \ + DDAR_Ser3UARTTr + DDAR_DevAdd (_Ser3UTDR)) #define DDAR_Ser3UARTRd /* Ser. port 3 UART Read */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ - DDAR_Ser3UARTRc + DDAR_DevAdd (_Ser3UTDR)) + (DDAR_DevRd + DDAR_Brst4 + DDAR_8BitDev + \ + DDAR_Ser3UARTRc + DDAR_DevAdd (_Ser3UTDR)) #define DDAR_Ser4MCP0Wr /* Ser. port 4 MCP 0 Write (audio) */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP0Tr + DDAR_DevAdd (_Ser4MCDR0)) + (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ + DDAR_Ser4MCP0Tr + DDAR_DevAdd (_Ser4MCDR0)) #define DDAR_Ser4MCP0Rd /* Ser. port 4 MCP 0 Read (audio) */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP0Rc + DDAR_DevAdd (_Ser4MCDR0)) + (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ + DDAR_Ser4MCP0Rc + DDAR_DevAdd (_Ser4MCDR0)) #define DDAR_Ser4MCP1Wr /* Ser. port 4 MCP 1 Write */ \ - /* (telecom) */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP1Tr + DDAR_DevAdd (_Ser4MCDR1)) + /* (telecom) */ \ + (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ + DDAR_Ser4MCP1Tr + DDAR_DevAdd (_Ser4MCDR1)) #define DDAR_Ser4MCP1Rd /* Ser. port 4 MCP 1 Read */ \ - /* (telecom) */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4MCP1Rc + DDAR_DevAdd (_Ser4MCDR1)) + /* (telecom) */ \ + (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ + DDAR_Ser4MCP1Rc + DDAR_DevAdd (_Ser4MCDR1)) #define DDAR_Ser4SSPWr /* Ser. port 4 SSP Write (16 bits) */ \ - (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4SSPTr + DDAR_DevAdd (_Ser4SSDR)) + (DDAR_DevWr + DDAR_Brst4 + DDAR_16BitDev + \ + DDAR_Ser4SSPTr + DDAR_DevAdd (_Ser4SSDR)) #define DDAR_Ser4SSPRd /* Ser. port 4 SSP Read (16 bits) */ \ - (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ - DDAR_Ser4SSPRc + DDAR_DevAdd (_Ser4SSDR)) + (DDAR_DevRd + DDAR_Brst4 + DDAR_16BitDev + \ + DDAR_Ser4SSPRc + DDAR_DevAdd (_Ser4SSDR)) #define DCSR_RUN 0x00000001 /* DMA RUNing */ #define DCSR_IE 0x00000002 /* DMA Interrupt Enable */ @@ -2608,14 +2608,14 @@ #define LCD_PEntrySp 2 /* LCD Palette Entry Space [byte] */ #define LCD_4BitPSp /* LCD 4-Bit pixel Palette Space */ \ - /* [byte] */ \ - (16*LCD_PEntrySp) + /* [byte] */ \ + (16*LCD_PEntrySp) #define LCD_8BitPSp /* LCD 8-Bit pixel Palette Space */ \ - /* [byte] */ \ - (256*LCD_PEntrySp) + /* [byte] */ \ + (256*LCD_PEntrySp) #define LCD_12_16BitPSp /* LCD 12/16-Bit pixel */ \ - /* dummy-Palette Space [byte] */ \ - (16*LCD_PEntrySp) + /* dummy-Palette Space [byte] */ \ + (16*LCD_PEntrySp) #define LCD_PGrey Fld (4, 0) /* LCD Palette entry Grey value */ #define LCD_PBlue Fld (4, 0) /* LCD Palette entry Blue value */ @@ -2623,11 +2623,11 @@ #define LCD_PRed Fld (4, 8) /* LCD Palette entry Red value */ #define LCD_PBS Fld (2, 12) /* LCD Pixel Bit Size */ #define LCD_4Bit /* LCD 4-Bit pixel mode */ \ - (0 << FShft (LCD_PBS)) + (0 << FShft (LCD_PBS)) #define LCD_8Bit /* LCD 8-Bit pixel mode */ \ - (1 << FShft (LCD_PBS)) + (1 << FShft (LCD_PBS)) #define LCD_12_16Bit /* LCD 12/16-Bit pixel mode */ \ - (2 << FShft (LCD_PBS)) + (2 << FShft (LCD_PBS)) #define LCD_Int0_0 0x0 /* LCD Intensity = 0.0% = 0 */ #define LCD_Int11_1 0x1 /* LCD Intensity = 11.1% = 1/9 */ @@ -2645,45 +2645,45 @@ #define LCD_Int88_9 0xD /* LCD Intensity = 88.9% = 8/9 */ #define LCD_Int100_0 0xE /* LCD Intensity = 100.0% = 1 */ #define LCD_Int100_0A 0xF /* LCD Intensity = 100.0% = 1 */ - /* (Alternative) */ + /* (Alternative) */ #define _LCCR0 0xB0100000 /* LCD Control Reg. 0 */ #define _LCSR 0xB0100004 /* LCD Status Reg. */ #define _DBAR1 0xB0100010 /* LCD DMA Base Address Reg. */ - /* channel 1 */ + /* channel 1 */ #define _DCAR1 0xB0100014 /* LCD DMA Current Address Reg. */ - /* channel 1 */ + /* channel 1 */ #define _DBAR2 0xB0100018 /* LCD DMA Base Address Reg. */ - /* channel 2 */ + /* channel 2 */ #define _DCAR2 0xB010001C /* LCD DMA Current Address Reg. */ - /* channel 2 */ + /* channel 2 */ #define _LCCR1 0xB0100020 /* LCD Control Reg. 1 */ #define _LCCR2 0xB0100024 /* LCD Control Reg. 2 */ #define _LCCR3 0xB0100028 /* LCD Control Reg. 3 */ #if LANGUAGE == C #define LCCR0 /* LCD Control Reg. 0 */ \ - (*((volatile Word *) io_p2v (_LCCR0))) + (*((volatile Word *) io_p2v (_LCCR0))) #define LCSR /* LCD Status Reg. */ \ - (*((volatile Word *) io_p2v (_LCSR))) + (*((volatile Word *) io_p2v (_LCSR))) #define DBAR1 /* LCD DMA Base Address Reg. */ \ - /* channel 1 */ \ - (*((volatile Address *) io_p2v (_DBAR1))) + /* channel 1 */ \ + (*((volatile Address *) io_p2v (_DBAR1))) #define DCAR1 /* LCD DMA Current Address Reg. */ \ - /* channel 1 */ \ - (*((volatile Address *) io_p2v (_DCAR1))) + /* channel 1 */ \ + (*((volatile Address *) io_p2v (_DCAR1))) #define DBAR2 /* LCD DMA Base Address Reg. */ \ - /* channel 2 */ \ - (*((volatile Address *) io_p2v (_DBAR2))) + /* channel 2 */ \ + (*((volatile Address *) io_p2v (_DBAR2))) #define DCAR2 /* LCD DMA Current Address Reg. */ \ - /* channel 2 */ \ - (*((volatile Address *) io_p2v (_DCAR2))) + /* channel 2 */ \ + (*((volatile Address *) io_p2v (_DCAR2))) #define LCCR1 /* LCD Control Reg. 1 */ \ - (*((volatile Word *) io_p2v (_LCCR1))) + (*((volatile Word *) io_p2v (_LCCR1))) #define LCCR2 /* LCD Control Reg. 2 */ \ - (*((volatile Word *) io_p2v (_LCCR2))) + (*((volatile Word *) io_p2v (_LCCR2))) #define LCCR3 /* LCD Control Reg. 3 */ \ - (*((volatile Word *) io_p2v (_LCCR3))) + (*((volatile Word *) io_p2v (_LCCR3))) #endif /* LANGUAGE == C */ #define LCCR0_LEN 0x00000001 /* LCD ENable */ @@ -2691,16 +2691,16 @@ #define LCCR0_Color (LCCR0_CMS*0) /* Color display */ #define LCCR0_Mono (LCCR0_CMS*1) /* Monochrome display */ #define LCCR0_SDS 0x00000004 /* Single/Dual panel display */ - /* Select */ + /* Select */ #define LCCR0_Sngl (LCCR0_SDS*0) /* Single panel display */ #define LCCR0_Dual (LCCR0_SDS*1) /* Dual panel display */ #define LCCR0_LDM 0x00000008 /* LCD Disable done (LDD) */ - /* interrupt Mask (disable) */ + /* interrupt Mask (disable) */ #define LCCR0_BAM 0x00000010 /* Base Address update (BAU) */ - /* interrupt Mask (disable) */ + /* interrupt Mask (disable) */ #define LCCR0_ERM 0x00000020 /* LCD ERror (BER, IOL, IUL, IOU, */ - /* IUU, OOL, OUL, OOU, and OUU) */ - /* interrupt Mask (disable) */ + /* IUU, OOL, OUL, OOU, and OUU) */ + /* interrupt Mask (disable) */ #define LCCR0_PAS 0x00000080 /* Passive/Active display Select */ #define LCCR0_Pas (LCCR0_PAS*0) /* Passive display (STN) */ #define LCCR0_Act (LCCR0_PAS*1) /* Active display (TFT) */ @@ -2708,127 +2708,126 @@ #define LCCR0_LtlEnd (LCCR0_BLE*0) /* Little Endian frame buffer */ #define LCCR0_BigEnd (LCCR0_BLE*1) /* Big Endian frame buffer */ #define LCCR0_DPD 0x00000200 /* Double Pixel Data (monochrome */ - /* display mode) */ + /* display mode) */ #define LCCR0_4PixMono (LCCR0_DPD*0) /* 4-Pixel/clock Monochrome */ - /* display */ + /* display */ #define LCCR0_8PixMono (LCCR0_DPD*1) /* 8-Pixel/clock Monochrome */ - /* display */ + /* display */ #define LCCR0_PDD Fld (8, 12) /* Palette DMA request Delay */ - /* [Tmem] */ + /* [Tmem] */ #define LCCR0_DMADel(Tcpu) /* palette DMA request Delay */ \ - /* [0..510 Tcpu] */ \ - ((Tcpu)/2 << FShft (LCCR0_PDD)) + /* [0..510 Tcpu] */ \ + ((Tcpu)/2 << FShft (LCCR0_PDD)) #define LCSR_LDD 0x00000001 /* LCD Disable Done */ #define LCSR_BAU 0x00000002 /* Base Address Update (read) */ #define LCSR_BER 0x00000004 /* Bus ERror */ #define LCSR_ABC 0x00000008 /* AC Bias clock Count */ #define LCSR_IOL 0x00000010 /* Input FIFO Over-run Lower */ - /* panel */ + /* panel */ #define LCSR_IUL 0x00000020 /* Input FIFO Under-run Lower */ - /* panel */ + /* panel */ #define LCSR_IOU 0x00000040 /* Input FIFO Over-run Upper */ - /* panel */ + /* panel */ #define LCSR_IUU 0x00000080 /* Input FIFO Under-run Upper */ - /* panel */ + /* panel */ #define LCSR_OOL 0x00000100 /* Output FIFO Over-run Lower */ - /* panel */ + /* panel */ #define LCSR_OUL 0x00000200 /* Output FIFO Under-run Lower */ - /* panel */ + /* panel */ #define LCSR_OOU 0x00000400 /* Output FIFO Over-run Upper */ - /* panel */ + /* panel */ #define LCSR_OUU 0x00000800 /* Output FIFO Under-run Upper */ - /* panel */ + /* panel */ #define LCCR1_PPL Fld (6, 4) /* Pixels Per Line/16 - 1 */ #define LCCR1_DisWdth(Pixel) /* Display Width [16..1024 pix.] */ \ - (((Pixel) - 16)/16 << FShft (LCCR1_PPL)) + (((Pixel) - 16)/16 << FShft (LCCR1_PPL)) #define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ - /* pulse Width - 2 [Tpix] (L_LCLK) */ + /* pulse Width - 2 [Tpix] (L_LCLK) */ #define LCCR1_HorSnchWdth(Tpix) /* Horizontal Synchronization */ \ - /* pulse Width [2..65 Tpix] */ \ - (((Tpix) - 2) << FShft (LCCR1_HSW)) + /* pulse Width [2..65 Tpix] */ \ + (((Tpix) - 2) << FShft (LCCR1_HSW)) #define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */ - /* count - 1 [Tpix] */ + /* count - 1 [Tpix] */ #define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_ELW)) + /* [1..256 Tpix] */ \ + (((Tpix) - 1) << FShft (LCCR1_ELW)) #define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ - /* Wait count - 1 [Tpix] */ + /* Wait count - 1 [Tpix] */ #define LCCR1_BegLnDel(Tpix) /* Beginning-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_BLW)) + /* [1..256 Tpix] */ \ + (((Tpix) - 1) << FShft (LCCR1_BLW)) #define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ #define LCCR2_DisHght(Line) /* Display Height [1..1024 lines] */ \ - (((Line) - 1) << FShft (LCCR2_LPP)) + (((Line) - 1) << FShft (LCCR2_LPP)) #define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse */ - /* Width - 1 [Tln] (L_FCLK) */ + /* Width - 1 [Tln] (L_FCLK) */ #define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \ - /* Width [1..64 Tln] */ \ - (((Tln) - 1) << FShft (LCCR2_VSW)) + /* Width [1..64 Tln] */ \ + (((Tln) - 1) << FShft (LCCR2_VSW)) #define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ - /* count [Tln] */ + /* count [Tln] */ #define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_EFW)) + /* [0..255 Tln] */ \ + ((Tln) << FShft (LCCR2_EFW)) #define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ - /* Wait count [Tln] */ + /* Wait count [Tln] */ #define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_BFW)) + /* [0..255 Tln] */ \ + ((Tln) << FShft (LCCR2_BFW)) #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor/2 - 2 */ - /* [1..255] (L_PCLK) */ - /* fpix = fcpu/(2*(PCD + 2)) */ - /* Tpix = 2*(PCD + 2)*Tcpu */ + /* [1..255] (L_PCLK) */ + /* fpix = fcpu/(2*(PCD + 2)) */ + /* Tpix = 2*(PCD + 2)*Tcpu */ #define LCCR3_PixClkDiv(Div) /* Pixel Clock Divisor [6..514] */ \ - (((Div) - 4)/2 << FShft (LCCR3_PCD)) - /* fpix = fcpu/(2*Floor (Div/2)) */ - /* Tpix = 2*Floor (Div/2)*Tcpu */ + (((Div) - 4)/2 << FShft (LCCR3_PCD)) + /* fpix = fcpu/(2*Floor (Div/2)) */ + /* Tpix = 2*Floor (Div/2)*Tcpu */ #define LCCR3_CeilPixClkDiv(Div) /* Ceil. of PixClkDiv [6..514] */ \ - (((Div) - 3)/2 << FShft (LCCR3_PCD)) - /* fpix = fcpu/(2*Ceil (Div/2)) */ - /* Tpix = 2*Ceil (Div/2)*Tcpu */ + (((Div) - 3)/2 << FShft (LCCR3_PCD)) + /* fpix = fcpu/(2*Ceil (Div/2)) */ + /* Tpix = 2*Ceil (Div/2)*Tcpu */ #define LCCR3_ACB Fld (8, 8) /* AC Bias clock half period - 1 */ - /* [Tln] (L_BIAS) */ + /* [Tln] (L_BIAS) */ #define LCCR3_ACBsDiv(Div) /* AC Bias clock Divisor [2..512] */ \ - (((Div) - 2)/2 << FShft (LCCR3_ACB)) - /* fac = fln/(2*Floor (Div/2)) */ - /* Tac = 2*Floor (Div/2)*Tln */ + (((Div) - 2)/2 << FShft (LCCR3_ACB)) + /* fac = fln/(2*Floor (Div/2)) */ + /* Tac = 2*Floor (Div/2)*Tln */ #define LCCR3_CeilACBsDiv(Div) /* Ceil. of ACBsDiv [2..512] */ \ - (((Div) - 1)/2 << FShft (LCCR3_ACB)) - /* fac = fln/(2*Ceil (Div/2)) */ - /* Tac = 2*Ceil (Div/2)*Tln */ + (((Div) - 1)/2 << FShft (LCCR3_ACB)) + /* fac = fln/(2*Ceil (Div/2)) */ + /* Tac = 2*Ceil (Div/2)*Tln */ #define LCCR3_API Fld (4, 16) /* AC bias Pin transitions per */ - /* Interrupt */ + /* Interrupt */ #define LCCR3_ACBsCntOff /* AC Bias clock transition Count */ \ - /* Off */ \ - (0 << FShft (LCCR3_API)) + /* Off */ \ + (0 << FShft (LCCR3_API)) #define LCCR3_ACBsCnt(Trans) /* AC Bias clock transition Count */ \ - /* [1..15] */ \ - ((Trans) << FShft (LCCR3_API)) + /* [1..15] */ \ + ((Trans) << FShft (LCCR3_API)) #define LCCR3_VSP 0x00100000 /* Vertical Synchronization pulse */ - /* Polarity (L_FCLK) */ + /* Polarity (L_FCLK) */ #define LCCR3_VrtSnchH (LCCR3_VSP*0) /* Vertical Synchronization pulse */ - /* active High */ + /* active High */ #define LCCR3_VrtSnchL (LCCR3_VSP*1) /* Vertical Synchronization pulse */ - /* active Low */ + /* active Low */ #define LCCR3_HSP 0x00200000 /* Horizontal Synchronization */ - /* pulse Polarity (L_LCLK) */ + /* pulse Polarity (L_LCLK) */ #define LCCR3_HorSnchH (LCCR3_HSP*0) /* Horizontal Synchronization */ - /* pulse active High */ + /* pulse active High */ #define LCCR3_HorSnchL (LCCR3_HSP*1) /* Horizontal Synchronization */ - /* pulse active Low */ + /* pulse active Low */ #define LCCR3_PCP 0x00400000 /* Pixel Clock Polarity (L_PCLK) */ #define LCCR3_PixRsEdg (LCCR3_PCP*0) /* Pixel clock Rising-Edge */ #define LCCR3_PixFlEdg (LCCR3_PCP*1) /* Pixel clock Falling-Edge */ #define LCCR3_OEP 0x00800000 /* Output Enable Polarity (L_BIAS, */ - /* active display mode) */ + /* active display mode) */ #define LCCR3_OutEnH (LCCR3_OEP*0) /* Output Enable active High */ #define LCCR3_OutEnL (LCCR3_OEP*1) /* Output Enable active Low */ #undef C #undef Assembly - diff --git a/include/arm920t.h b/include/arm920t.h index 4592665..95f3323 100644 --- a/include/arm920t.h +++ b/include/arm920t.h @@ -10,4 +10,3 @@ #endif /*__ARM920T_H__*/ - diff --git a/include/asm-arm/arch-arm920t/memory.h b/include/asm-arm/arch-arm920t/memory.h index 8a4e3f8..333f218 100644 --- a/include/asm-arm/arch-arm920t/memory.h +++ b/include/asm-arm/arch-arm920t/memory.h @@ -92,17 +92,17 @@ #ifdef CONFIG_DISCONTIGMEM #error "CONFIG_DISCONTIGMEM will not work on S3C2400" /* - * Because of the wide memory address space between physical RAM banks on the + * Because of the wide memory address space between physical RAM banks on the * SA1100, it's much more convenient to use Linux's NUMA support to implement - * our memory map representation. Assuming all memory nodes have equal access + * our memory map representation. Assuming all memory nodes have equal access * characteristics, we then have generic discontiguous memory support. * * Of course, all this isn't mandatory for SA1100 implementations with only * one used memory bank. For those, simply undefine CONFIG_DISCONTIGMEM. * - * The nodes are matched with the physical memory bank addresses which are + * The nodes are matched with the physical memory bank addresses which are * incidentally the same as virtual addresses. - * + * * node 0: 0xc0000000 - 0xc7ffffff * node 1: 0xc8000000 - 0xcfffffff * node 2: 0xd0000000 - 0xd7ffffff @@ -138,7 +138,7 @@ (((unsigned long)(kvaddr) & 0x07ffffff) >> PAGE_SHIFT) /* - * Given a kaddr, virt_to_page returns a pointer to the corresponding + * Given a kaddr, virt_to_page returns a pointer to the corresponding * mem_map entry. */ #define virt_to_page(kaddr) \ diff --git a/include/asm-arm/arch-at91rm9200/AT91RM9200.h b/include/asm-arm/arch-at91rm9200/AT91RM9200.h index c0e5211..60f1737 100644 --- a/include/asm-arm/arch-at91rm9200/AT91RM9200.h +++ b/include/asm-arm/arch-at91rm9200/AT91RM9200.h @@ -21,7 +21,7 @@ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, * MA 02111-1307 USA */ - + #ifndef AT91RM9200_H #define AT91RM9200_H @@ -205,13 +205,13 @@ AT91_REG PMC_SCER; /* System Clock Enable Register */ AT91_REG PMC_SCDR; /* System Clock Disable Register */ AT91_REG PMC_SCSR; /* System Clock Status Register */ - AT91_REG Reserved0[1]; /* */ + AT91_REG Reserved0[1]; /* */ AT91_REG PMC_PCER; /* Peripheral Clock Enable Register */ AT91_REG PMC_PCDR; /* Peripheral Clock Disable Register */ AT91_REG PMC_PCSR; /* Peripheral Clock Status Register */ - AT91_REG Reserved1[5]; /* */ + AT91_REG Reserved1[5]; /* */ AT91_REG PMC_MCKR; /* Master Clock Register */ - AT91_REG Reserved2[3]; /* */ + AT91_REG Reserved2[3]; /* */ AT91_REG PMC_PCKR[8]; /* Programmable Clock Register */ AT91_REG PMC_IER; /* Interrupt Enable Register */ AT91_REG PMC_IDR; /* Interrupt Disable Register */ @@ -281,9 +281,9 @@ #define AT91C_EMAC_BP ((unsigned int) 0x1 << 8) /* (EMAC) Back pressure. */ /* -------- EMAC_CFG : (EMAC Offset: 0x4) Network Configuration Register -------- */ #define AT91C_EMAC_SPD ((unsigned int) 0x1 << 0) /* (EMAC) Speed. */ -#define AT91C_EMAC_FD ((unsigned int) 0x1 << 1) /* (EMAC) Full duplex. */ +#define AT91C_EMAC_FD ((unsigned int) 0x1 << 1) /* (EMAC) Full duplex. */ #define AT91C_EMAC_BR ((unsigned int) 0x1 << 2) /* (EMAC) Bit rate. */ -#define AT91C_EMAC_CAF ((unsigned int) 0x1 << 4) /* (EMAC) Copy all frames. */ +#define AT91C_EMAC_CAF ((unsigned int) 0x1 << 4) /* (EMAC) Copy all frames. */ #define AT91C_EMAC_NBC ((unsigned int) 0x1 << 5) /* (EMAC) No broadcast. */ #define AT91C_EMAC_MTI ((unsigned int) 0x1 << 6) /* (EMAC) Multicast hash enable */ #define AT91C_EMAC_UNI ((unsigned int) 0x1 << 7) /* (EMAC) Unicast hash enable. */ @@ -328,10 +328,10 @@ #define AT91C_EMAC_ROVR ((unsigned int) 0x1 << 10) /* (EMAC) */ #define AT91C_EMAC_HRESP ((unsigned int) 0x1 << 11) /* (EMAC) */ /* -------- EMAC_IER : (EMAC Offset: 0x28) Interrupt Enable Register -------- */ -/* -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- */ +/* -------- EMAC_IDR : (EMAC Offset: 0x2c) Interrupt Disable Register -------- */ /* -------- EMAC_IMR : (EMAC Offset: 0x30) Interrupt Mask Register -------- */ /* -------- EMAC_MAN : (EMAC Offset: 0x34) PHY Maintenance Register -------- */ -#define AT91C_EMAC_DATA ((unsigned int) 0xFFFF << 0) /* (EMAC) */ +#define AT91C_EMAC_DATA ((unsigned int) 0xFFFF << 0) /* (EMAC) */ #define AT91C_EMAC_CODE ((unsigned int) 0x3 << 16) /* (EMAC) */ #define AT91C_EMAC_CODE_802_3 ((unsigned int) 0x2 << 16) /* (EMAC) Write Operation */ #define AT91C_EMAC_REGA ((unsigned int) 0x1F << 18) /* (EMAC) */ @@ -356,7 +356,7 @@ AT91_REG SPI_IMR; /* Interrupt Mask Register */ AT91_REG Reserved0[4]; /* */ AT91_REG SPI_CSR[4]; /* Chip Select Register */ - AT91_REG Reserved1[48]; /* */ + AT91_REG Reserved1[48]; /* */ AT91_REG SPI_RPR; /* Receive Pointer Register */ AT91_REG SPI_RCR; /* Receive Counter Register */ AT91_REG SPI_TPR; /* Transmit Pointer Register */ diff --git a/include/asm-arm/arch-pxa/bitfield.h b/include/asm-arm/arch-pxa/bitfield.h index f1f0e33..2ac5ea2 100644 --- a/include/asm-arm/arch-pxa/bitfield.h +++ b/include/asm-arm/arch-pxa/bitfield.h @@ -11,7 +11,6 @@ */ - #ifndef __BITFIELD_H #define __BITFIELD_H @@ -88,7 +87,7 @@ */ #define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) + (UData (Value) << FShft (Field)) /* @@ -107,7 +106,7 @@ */ #define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) + ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) #endif /* __BITFIELD_H */ diff --git a/include/asm-arm/arch-pxa/hardware.h b/include/asm-arm/arch-pxa/hardware.h index b84ea48..d40f05e 100644 --- a/include/asm-arm/arch-pxa/hardware.h +++ b/include/asm-arm/arch-pxa/hardware.h @@ -4,7 +4,7 @@ * Author: Nicolas Pitre * Created: Jun 15, 2001 * Copyright: MontaVista Software Inc. - * + * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. @@ -86,16 +86,16 @@ #endif #endif /* UBOOT_REG_FIX */ - + #ifdef UBOOT_REG_FIX # undef io_p2v # undef __REG # ifndef __ASSEMBLY__ # define io_p2v(PhAdd) (PhAdd) # define __REG(x) (*((volatile u32 *)io_p2v(x))) -# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) +# define __REG2(x,y) (*(volatile u32 *)((u32)&__REG(x) + (y))) # else -# define __REG(x) (x) +# define __REG(x) (x) #endif /* UBOOT_REG_FIX */ #include "pxa-regs.h" diff --git a/include/asm-arm/arch-pxa/mmc.h b/include/asm-arm/arch-pxa/mmc.h index 4d61ade..a62679a 100644 --- a/include/asm-arm/arch-pxa/mmc.h +++ b/include/asm-arm/arch-pxa/mmc.h @@ -1,7 +1,7 @@ /* - * linux/drivers/mmc/mmc_pxa.h + * linux/drivers/mmc/mmc_pxa.h * - * Author: Vladimir Shebordaev, Igor Oblakov + * Author: Vladimir Shebordaev, Igor Oblakov * Copyright: MontaVista Software Inc. * * $Id: mmc_pxa.h,v 0.3.1.6 2002/09/25 19:25:48 ted Exp ted $ @@ -76,7 +76,7 @@ #define MMC_BLK_LEN_MAX (0x03ffUL) /* [9:0] */ /* MMC_PRTBUF */ -#define MMC_PRTBUF_BUF_PART_FULL (0x01UL) +#define MMC_PRTBUF_BUF_PART_FULL (0x01UL) #define MMC_PRTBUF_BUF_FULL (0x00UL ) /* MMC_I_MASK */ diff --git a/include/asm-arm/arch-pxa/pxa-regs.h b/include/asm-arm/arch-pxa/pxa-regs.h index 208c110..a59838c 100644 --- a/include/asm-arm/arch-pxa/pxa-regs.h +++ b/include/asm-arm/arch-pxa/pxa-regs.h @@ -63,12 +63,12 @@ #define PCMCIA1MemSp PCMCIAMemSp /* PCMCIA 1 Memory Space [byte] */ #define _PCMCIA(Nb) /* PCMCIA [0..1] */ \ - (0x20000000 + (Nb)*PCMCIASp) + (0x20000000 + (Nb)*PCMCIASp) #define _PCMCIAIO(Nb) _PCMCIA (Nb) /* PCMCIA I/O [0..1] */ #define _PCMCIAAttr(Nb) /* PCMCIA Attribute [0..1] */ \ - (_PCMCIA (Nb) + 2*PCMCIAPrtSp) + (_PCMCIA (Nb) + 2*PCMCIAPrtSp) #define _PCMCIAMem(Nb) /* PCMCIA Memory [0..1] */ \ - (_PCMCIA (Nb) + 3*PCMCIAPrtSp) + (_PCMCIA (Nb) + 3*PCMCIAPrtSp) #define _PCMCIA0 _PCMCIA (0) /* PCMCIA 0 */ #define _PCMCIA0IO _PCMCIAIO (0) /* PCMCIA 0 I/O */ @@ -81,7 +81,6 @@ #define _PCMCIA1Mem _PCMCIAMem (1) /* PCMCIA 1 Memory */ - /* * DMA Controller */ @@ -402,18 +401,18 @@ #define IrSR_XMITIR_UART_MODE 0x0 #define IrSR_IR_RECEIVE_ON (\ - IrSR_RXPL_NEG_IS_ZERO | \ - IrSR_TXPL_POS_IS_ZERO | \ - IrSR_XMODE_PULSE_3_16 | \ - IrSR_RCVEIR_IR_MODE | \ - IrSR_XMITIR_UART_MODE) + IrSR_RXPL_NEG_IS_ZERO | \ + IrSR_TXPL_POS_IS_ZERO | \ + IrSR_XMODE_PULSE_3_16 | \ + IrSR_RCVEIR_IR_MODE | \ + IrSR_XMITIR_UART_MODE) #define IrSR_IR_TRANSMIT_ON (\ - IrSR_RXPL_NEG_IS_ZERO | \ - IrSR_TXPL_POS_IS_ZERO | \ - IrSR_XMODE_PULSE_3_16 | \ - IrSR_RCVEIR_UART_MODE | \ - IrSR_XMITIR_IR_MODE) + IrSR_RXPL_NEG_IS_ZERO | \ + IrSR_TXPL_POS_IS_ZERO | \ + IrSR_XMODE_PULSE_3_16 | \ + IrSR_RCVEIR_UART_MODE | \ + IrSR_XMITIR_IR_MODE) /* * I2C registers @@ -1198,47 +1197,47 @@ #define LCCR1_PPL Fld (10, 0) /* Pixels Per Line - 1 */ #define LCCR1_DisWdth(Pixel) /* Display Width [1..800 pix.] */ \ - (((Pixel) - 1) << FShft (LCCR1_PPL)) + (((Pixel) - 1) << FShft (LCCR1_PPL)) #define LCCR1_HSW Fld (6, 10) /* Horizontal Synchronization */ #define LCCR1_HorSnchWdth(Tpix) /* Horizontal Synchronization */ \ - /* pulse Width [1..64 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_HSW)) + /* pulse Width [1..64 Tpix] */ \ + (((Tpix) - 1) << FShft (LCCR1_HSW)) #define LCCR1_ELW Fld (8, 16) /* End-of-Line pixel clock Wait */ - /* count - 1 [Tpix] */ + /* count - 1 [Tpix] */ #define LCCR1_EndLnDel(Tpix) /* End-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_ELW)) + /* [1..256 Tpix] */ \ + (((Tpix) - 1) << FShft (LCCR1_ELW)) #define LCCR1_BLW Fld (8, 24) /* Beginning-of-Line pixel clock */ - /* Wait count - 1 [Tpix] */ + /* Wait count - 1 [Tpix] */ #define LCCR1_BegLnDel(Tpix) /* Beginning-of-Line Delay */ \ - /* [1..256 Tpix] */ \ - (((Tpix) - 1) << FShft (LCCR1_BLW)) + /* [1..256 Tpix] */ \ + (((Tpix) - 1) << FShft (LCCR1_BLW)) #define LCCR2_LPP Fld (10, 0) /* Line Per Panel - 1 */ #define LCCR2_DisHght(Line) /* Display Height [1..1024 lines] */ \ - (((Line) - 1) << FShft (LCCR2_LPP)) + (((Line) - 1) << FShft (LCCR2_LPP)) #define LCCR2_VSW Fld (6, 10) /* Vertical Synchronization pulse */ - /* Width - 1 [Tln] (L_FCLK) */ + /* Width - 1 [Tln] (L_FCLK) */ #define LCCR2_VrtSnchWdth(Tln) /* Vertical Synchronization pulse */ \ - /* Width [1..64 Tln] */ \ - (((Tln) - 1) << FShft (LCCR2_VSW)) + /* Width [1..64 Tln] */ \ + (((Tln) - 1) << FShft (LCCR2_VSW)) #define LCCR2_EFW Fld (8, 16) /* End-of-Frame line clock Wait */ - /* count [Tln] */ + /* count [Tln] */ #define LCCR2_EndFrmDel(Tln) /* End-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_EFW)) + /* [0..255 Tln] */ \ + ((Tln) << FShft (LCCR2_EFW)) #define LCCR2_BFW Fld (8, 24) /* Beginning-of-Frame line clock */ - /* Wait count [Tln] */ + /* Wait count [Tln] */ #define LCCR2_BegFrmDel(Tln) /* Beginning-of-Frame Delay */ \ - /* [0..255 Tln] */ \ - ((Tln) << FShft (LCCR2_BFW)) + /* [0..255 Tln] */ \ + ((Tln) << FShft (LCCR2_BFW)) #if 0 #define LCCR3_PCD (0xff) /* Pixel clock divisor */ @@ -1261,25 +1260,25 @@ #define LCCR3_PCD Fld (8, 0) /* Pixel Clock Divisor */ #define LCCR3_PixClkDiv(Div) /* Pixel Clock Divisor */ \ - (((Div) << FShft (LCCR3_PCD))) + (((Div) << FShft (LCCR3_PCD))) #define LCCR3_BPP Fld (3, 24) /* Bit Per Pixel */ #define LCCR3_Bpp(Bpp) /* Bit Per Pixel */ \ - (((Bpp) << FShft (LCCR3_BPP))) + (((Bpp) << FShft (LCCR3_BPP))) #define LCCR3_ACB Fld (8, 8) /* AC Bias */ #define LCCR3_Acb(Acb) /* BAC Bias */ \ - (((Acb) << FShft (LCCR3_ACB))) + (((Acb) << FShft (LCCR3_ACB))) #define LCCR3_HorSnchH (LCCR3_HSP*0) /* Horizontal Synchronization */ - /* pulse active High */ + /* pulse active High */ #define LCCR3_HorSnchL (LCCR3_HSP*1) /* Horizontal Synchronization */ #define LCCR3_VrtSnchH (LCCR3_VSP*0) /* Vertical Synchronization pulse */ - /* active High */ + /* active High */ #define LCCR3_VrtSnchL (LCCR3_VSP*1) /* Vertical Synchronization pulse */ - /* active Low */ + /* active Low */ #define LCSR_LDD (1 << 0) /* LCD Disable Done */ #define LCSR_SOF (1 << 1) /* Start of frame */ @@ -1338,7 +1337,7 @@ #define MDCNFG_DE2 0x00010000 #define MDCNFG_DE3 0x00020000 #define MDCNFG_DWID0 0x00000004 - + #define MDREFR __REG(0x48000004) /* SDRAM Refresh Control Register */ #define MSC0 __REG(0x48000008) /* Static Memory Control Register 0 */ #define MSC1 __REG(0x4800000C) /* Static Memory Control Register 1 */ diff --git a/include/asm-arm/arch-sa1100/bitfield.h b/include/asm-arm/arch-sa1100/bitfield.h index f1f0e33..2ac5ea2 100644 --- a/include/asm-arm/arch-sa1100/bitfield.h +++ b/include/asm-arm/arch-sa1100/bitfield.h @@ -11,7 +11,6 @@ */ - #ifndef __BITFIELD_H #define __BITFIELD_H @@ -88,7 +87,7 @@ */ #define FInsrt(Value, Field) \ - (UData (Value) << FShft (Field)) + (UData (Value) << FShft (Field)) /* @@ -107,7 +106,7 @@ */ #define FExtr(Data, Field) \ - ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) + ((UData (Data) >> FShft (Field)) & FAlnMsk (Field)) #endif /* __BITFIELD_H */ diff --git a/include/asm-arm/bitops.h b/include/asm-arm/bitops.h index 4733858..4b8bab2 100644 --- a/include/asm-arm/bitops.h +++ b/include/asm-arm/bitops.h @@ -106,7 +106,7 @@ if (word & 0x0f000000) { k -= 4; word <<= 4; } if (word & 0x30000000) { k -= 2; word <<= 2; } if (word & 0x40000000) { k -= 1; } - return k; + return k; } /* diff --git a/include/asm-arm/byteorder.h b/include/asm-arm/byteorder.h index d648a19..c3489f1 100644 --- a/include/asm-arm/byteorder.h +++ b/include/asm-arm/byteorder.h @@ -30,4 +30,3 @@ #endif #endif - diff --git a/include/asm-arm/proc-armv/ptrace.h b/include/asm-arm/proc-armv/ptrace.h index 51708b9..79cc644 100644 --- a/include/asm-arm/proc-armv/ptrace.h +++ b/include/asm-arm/proc-armv/ptrace.h @@ -107,4 +107,3 @@ #endif /* __ASSEMBLY__ */ #endif - diff --git a/include/asm-arm/proc-armv/system.h b/include/asm-arm/proc-armv/system.h index 479f553..e7b0fe6 100644 --- a/include/asm-arm/proc-armv/system.h +++ b/include/asm-arm/proc-armv/system.h @@ -56,7 +56,7 @@ : \ : "memory"); \ }) - + /* * Enable IRQs */ diff --git a/include/asm-arm/ptrace.h b/include/asm-arm/ptrace.h index 0e4482b..73c9087 100644 --- a/include/asm-arm/ptrace.h +++ b/include/asm-arm/ptrace.h @@ -31,4 +31,3 @@ #endif /* __ASSEMBLY__ */ #endif - diff --git a/include/asm-arm/setup.h b/include/asm-arm/setup.h index c20b448..89df4dc 100644 --- a/include/asm-arm/setup.h +++ b/include/asm-arm/setup.h @@ -76,7 +76,6 @@ }; - /* * The new way of passing information: a list of tagged entries */ diff --git a/include/asm-arm/types.h b/include/asm-arm/types.h index 39d5290..13e9806 100644 --- a/include/asm-arm/types.h +++ b/include/asm-arm/types.h @@ -48,4 +48,3 @@ #endif /* __KERNEL__ */ #endif - diff --git a/include/asm-i386/bitops.h b/include/asm-i386/bitops.h index 7d29335..b768e20 100644 --- a/include/asm-i386/bitops.h +++ b/include/asm-i386/bitops.h @@ -116,7 +116,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is atomic and cannot be reordered. + * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static __inline__ int test_and_set_bit(int nr, volatile void * addr) @@ -135,7 +135,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is non-atomic and can be reordered. + * This operation is non-atomic and can be reordered. * If two examples of this operation race, one can appear to succeed * but actually fail. You must protect multiple accesses with a lock. */ @@ -155,7 +155,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is atomic and cannot be reordered. + * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static __inline__ int test_and_clear_bit(int nr, volatile void * addr) @@ -174,7 +174,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is non-atomic and can be reordered. + * This operation is non-atomic and can be reordered. * If two examples of this operation race, one can appear to succeed * but actually fail. You must protect multiple accesses with a lock. */ @@ -206,7 +206,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is atomic and cannot be reordered. + * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ static __inline__ int test_and_change_bit(int nr, volatile void * addr) @@ -292,7 +292,7 @@ { unsigned long * p = ((unsigned long *) addr) + (offset >> 5); int set = 0, bit = offset & 31, res; - + if (bit) { /* * Look for zero in first byte diff --git a/include/asm-i386/i8254.h b/include/asm-i386/i8254.h index e13f04e..aafdfb8 100644 --- a/include/asm-i386/i8254.h +++ b/include/asm-i386/i8254.h @@ -29,7 +29,6 @@ #define _ASMI386_I8954_H_ 1 - #define PIT_T0 0x00 /* PIT channel 0 count/status */ #define PIT_T1 0x01 /* PIT channel 1 count/status */ #define PIT_T2 0x02 /* PIT channel 2 count/status */ diff --git a/include/asm-i386/i8259.h b/include/asm-i386/i8259.h index 0419e0e..774d7a3 100644 --- a/include/asm-i386/i8259.h +++ b/include/asm-i386/i8259.h @@ -78,7 +78,7 @@ /* ICW2 is the starting vector number */ -/* ICW2 is bit-mask of present slaves for a master device, +/* ICW2 is bit-mask of present slaves for a master device, * or the slave ID for a slave device */ /* ICW4 bits */ diff --git a/include/asm-i386/ibmpc.h b/include/asm-i386/ibmpc.h index abdd1d7..e35cbd8 100644 --- a/include/asm-i386/ibmpc.h +++ b/include/asm-i386/ibmpc.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * diff --git a/include/asm-i386/ic/sc520.h b/include/asm-i386/ic/sc520.h index 1836f99..d5abbbe 100644 --- a/include/asm-i386/ic/sc520.h +++ b/include/asm-i386/ic/sc520.h @@ -230,7 +230,7 @@ #define UART1_DIS 0x01 /* UART1 Disable */ /* bus mapping constants (used for PCI core initialization) */ /* bus mapping constants */ -#define SC520_REG_ADDR 0x00000cf8 +#define SC520_REG_ADDR 0x00000cf8 #define SC520_REG_DATA 0x00000cfc @@ -242,7 +242,7 @@ #define SC520_ISA_IO_BUS 0x00000000 #define SC520_ISA_IO_SIZE 0x00001000 -/* PCI I/O space from 0x1000 to 0xdfff +/* PCI I/O space from 0x1000 to 0xdfff * (make 0xe000-0xfdff available for stuff like PCCard boot) */ #define SC520_PCI_IO_PHYS 0x00001000 #define SC520_PCI_IO_BUS 0x00001000 @@ -253,7 +253,7 @@ #define SC520_PCI_MEMORY_BUS 0x00000000 #define SC520_PCI_MEMORY_SIZE 0x10000000 -/* PCI bus memory from 0x10000000 to 0x26ffffff +/* PCI bus memory from 0x10000000 to 0x26ffffff * (make 0x27000000 - 0x27ffffff available for stuff like PCCard boot) */ #define SC520_PCI_MEM_PHYS 0x10000000 #define SC520_PCI_MEM_BUS 0x10000000 @@ -275,7 +275,7 @@ #define SC520_IRQ7 22 #define SC520_IRQ8 3 #define SC520_IRQ9 4 -#define SC520_IRQ10 5 +#define SC520_IRQ10 5 #define SC520_IRQ11 6 #define SC520_IRQ12 7 #define SC520_IRQ13 8 diff --git a/include/asm-i386/io.h b/include/asm-i386/io.h index d17d45e..85d44aa 100644 --- a/include/asm-i386/io.h +++ b/include/asm-i386/io.h @@ -84,7 +84,6 @@ #define isa_memcpy_toio(a,b,c) memcpy_toio((a),(b),(c)) - static inline int check_signature(unsigned long io_addr, const unsigned char *signature, int length) { @@ -103,7 +102,7 @@ /** * isa_check_signature - find BIOS signatures - * @io_addr: mmio address to check + * @io_addr: mmio address to check * @signature: signature block * @length: length of signature * @@ -113,7 +112,7 @@ * This function is deprecated. New drivers should use ioremap and * check_signature. */ - + static inline int isa_check_signature(unsigned long io_addr, const unsigned char *signature, int length) @@ -158,7 +157,7 @@ #define __OUT(s,s1,x) \ __OUT1(s,x) __OUT2(s,s1,"w") : : "a" (value), "Nd" (port)); } \ -__OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} +__OUT1(s##_p,x) __OUT2(s,s1,"w") __FULL_SLOW_DOWN_IO : : "a" (value), "Nd" (port));} #define __IN1(s) \ static inline RETURN_TYPE in##s(unsigned short port) { RETURN_TYPE _v; @@ -168,7 +167,7 @@ #define __IN(s,s1,i...) \ __IN1(s) __IN2(s,s1,"w") : "=a" (_v) : "Nd" (port) ,##i ); return _v; } \ -__IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; } +__IN1(s##_p) __IN2(s,s1,"w") __FULL_SLOW_DOWN_IO : "=a" (_v) : "Nd" (port) ,##i ); return _v; } #define __INS(s) \ static inline void ins##s(unsigned short port, void * addr, unsigned long count) \ diff --git a/include/asm-i386/pci.h b/include/asm-i386/pci.h index 3a91f57..bde9550 100644 --- a/include/asm-i386/pci.h +++ b/include/asm-i386/pci.h @@ -32,6 +32,4 @@ void pci_remove_rom_window(struct pci_controller* hose, u32 addr); u32 pci_get_rom_window(struct pci_controller* hose, int size); - - #endif diff --git a/include/asm-i386/processor.h b/include/asm-i386/processor.h index c175193..5dedba8 100644 --- a/include/asm-i386/processor.h +++ b/include/asm-i386/processor.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * diff --git a/include/asm-i386/ptrace.h b/include/asm-i386/ptrace.h index d99e464..750e40d 100644 --- a/include/asm-i386/ptrace.h +++ b/include/asm-i386/ptrace.h @@ -20,7 +20,7 @@ #define SS 16 #define FRAME_SIZE 17 -/* this struct defines the way the registers are stored on the +/* this struct defines the way the registers are stored on the stack during a system call. */ struct pt_regs { diff --git a/include/asm-i386/realmode.h b/include/asm-i386/realmode.h index a84f128..9177e4e 100644 --- a/include/asm-i386/realmode.h +++ b/include/asm-i386/realmode.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * diff --git a/include/asm-i386/types.h b/include/asm-i386/types.h index bb100ec..69f8a5a 100644 --- a/include/asm-i386/types.h +++ b/include/asm-i386/types.h @@ -48,4 +48,3 @@ #endif /* __KERNEL__ */ #endif - diff --git a/include/asm-i386/u-boot.h b/include/asm-i386/u-boot.h index dc5dd72..3466732 100644 --- a/include/asm-i386/u-boot.h +++ b/include/asm-i386/u-boot.h @@ -2,7 +2,7 @@ * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Marius Groeger - * + * * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Alex Zuepke @@ -47,7 +47,7 @@ unsigned long bi_boot_params; /* where this board expects params */ struct environment_s *bi_env; struct /* RAM configuration */ - { + { ulong start; ulong size; }bi_dram[CONFIG_NR_DRAM_BANKS]; diff --git a/include/asm-i386/zimage.h b/include/asm-i386/zimage.h index 6886826..c7103b1 100644 --- a/include/asm-i386/zimage.h +++ b/include/asm-i386/zimage.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * @@ -24,7 +24,7 @@ #ifndef _ASM_ZIMAGE_H_ #define _ASM_ZIMAGE_H_ -/* linux i386 zImage/bzImage header. Offsets relative to +/* linux i386 zImage/bzImage header. Offsets relative to * the start of the image */ #define CMD_LINE_MAGIC_OFF 0x020 /* Magic 0xa33f if the offset below is valid */ @@ -62,10 +62,10 @@ #define SETUP_MAX_SIZE 32768 #define SETUP_START_OFFSET 0x200 -#define BZIMAGE_LOAD_ADDR 0x100000 +#define BZIMAGE_LOAD_ADDR 0x100000 #define ZIMAGE_LOAD_ADDR 0x10000 - -void *load_zimage(char *image, unsigned long kernel_size, + +void *load_zimage(char *image, unsigned long kernel_size, unsigned long initrd_addr, unsigned long initrd_size, int auto_boot); diff --git a/include/asm-mips/bitops.h b/include/asm-mips/bitops.h index edff4c0..56d7225 100644 --- a/include/asm-mips/bitops.h +++ b/include/asm-mips/bitops.h @@ -161,7 +161,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is atomic and cannot be reordered. + * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ extern __inline__ int @@ -190,7 +190,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is non-atomic and can be reordered. + * This operation is non-atomic and can be reordered. * If two examples of this operation race, one can appear to succeed * but actually fail. You must protect multiple accesses with a lock. */ @@ -212,7 +212,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is atomic and cannot be reordered. + * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ extern __inline__ int @@ -242,7 +242,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is non-atomic and can be reordered. + * This operation is non-atomic and can be reordered. * If two examples of this operation race, one can appear to succeed * but actually fail. You must protect multiple accesses with a lock. */ @@ -264,7 +264,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is atomic and cannot be reordered. + * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ extern __inline__ int @@ -293,7 +293,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is non-atomic and can be reordered. + * This operation is non-atomic and can be reordered. * If two examples of this operation race, one can appear to succeed * but actually fail. You must protect multiple accesses with a lock. */ @@ -420,7 +420,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is atomic and cannot be reordered. + * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ extern __inline__ int test_and_set_bit(int nr, volatile void * addr) @@ -444,7 +444,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is non-atomic and can be reordered. + * This operation is non-atomic and can be reordered. * If two examples of this operation race, one can appear to succeed * but actually fail. You must protect multiple accesses with a lock. */ @@ -466,7 +466,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is atomic and cannot be reordered. + * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ extern __inline__ int test_and_clear_bit(int nr, volatile void * addr) @@ -490,7 +490,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is non-atomic and can be reordered. + * This operation is non-atomic and can be reordered. * If two examples of this operation race, one can appear to succeed * but actually fail. You must protect multiple accesses with a lock. */ @@ -512,7 +512,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is atomic and cannot be reordered. + * This operation is atomic and cannot be reordered. * It also implies a memory barrier. */ extern __inline__ int test_and_change_bit(int nr, volatile void * addr) @@ -536,7 +536,7 @@ * @nr: Bit to set * @addr: Address to count from * - * This operation is non-atomic and can be reordered. + * This operation is non-atomic and can be reordered. * If two examples of this operation race, one can appear to succeed * but actually fail. You must protect multiple accesses with a lock. */ @@ -638,7 +638,7 @@ unsigned int *p = ((unsigned int *) addr) + (offset >> 5); int set = 0, bit = offset & 31, res; unsigned long dummy; - + if (bit) { /* * Look for zero in first byte @@ -789,7 +789,7 @@ #endif #define find_first_zero_bit(addr, size) \ - find_next_zero_bit((addr), (size), 0) + find_next_zero_bit((addr), (size), 0) #endif /* (__MIPSEB__) */ @@ -835,7 +835,7 @@ } #define ext2_find_first_zero_bit(addr, size) \ - ext2_find_next_zero_bit((addr), (size), 0) + ext2_find_next_zero_bit((addr), (size), 0) extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) { @@ -894,8 +894,8 @@ #define ext2_test_bit(nr, addr) test_bit((nr), (addr)) #define ext2_find_first_zero_bit(addr, size) find_first_zero_bit((addr), (size)) #define ext2_find_next_zero_bit(addr, size, offset) \ - find_next_zero_bit((addr), (size), (offset)) - + find_next_zero_bit((addr), (size), (offset)) + #endif /* !(__MIPSEB__) */ /* diff --git a/include/asm-mips/inca-ip.h b/include/asm-mips/inca-ip.h index 0c5f1d7..e787a1d 100644 --- a/include/asm-mips/inca-ip.h +++ b/include/asm-mips/inca-ip.h @@ -2,41 +2,41 @@ /****************************************************************************** Copyright (c) 2002, Infineon Technologies. All rights reserved. - No Warranty - Because the program is licensed free of charge, there is no warranty for - the program, to the extent permitted by applicable law. Except when - otherwise stated in writing the copyright holders and/or other parties - provide the program "as is" without warranty of any kind, either - expressed or implied, including, but not limited to, the implied - warranties of merchantability and fitness for a particular purpose. The - entire risk as to the quality and performance of the program is with - you. should the program prove defective, you assume the cost of all - necessary servicing, repair or correction. - - In no event unless required by applicable law or agreed to in writing - will any copyright holder, or any other party who may modify and/or - redistribute the program as permitted above, be liable to you for - damages, including any general, special, incidental or consequential - damages arising out of the use or inability to use the program - (including but not limited to loss of data or data being rendered - inaccurate or losses sustained by you or third parties or a failure of - the program to operate with any other programs), even if such holder or - other party has been advised of the possibility of such damages. + No Warranty + Because the program is licensed free of charge, there is no warranty for + the program, to the extent permitted by applicable law. Except when + otherwise stated in writing the copyright holders and/or other parties + provide the program "as is" without warranty of any kind, either + expressed or implied, including, but not limited to, the implied + warranties of merchantability and fitness for a particular purpose. The + entire risk as to the quality and performance of the program is with + you. should the program prove defective, you assume the cost of all + necessary servicing, repair or correction. + + In no event unless required by applicable law or agreed to in writing + will any copyright holder, or any other party who may modify and/or + redistribute the program as permitted above, be liable to you for + damages, including any general, special, incidental or consequential + damages arising out of the use or inability to use the program + (including but not limited to loss of data or data being rendered + inaccurate or losses sustained by you or third parties or a failure of + the program to operate with any other programs), even if such holder or + other party has been advised of the possibility of such damages. ******************************************************************************/ - - + + /***********************************************************************/ /* Module : WDT register address and bits */ /***********************************************************************/ - -#define INCA_IP_WDT (0xB8000000) -/***********************************************************************/ - -/***Reset Status Register Power On***/ +#define INCA_IP_WDT (0xB8000000) +/***********************************************************************/ + + +/***Reset Status Register Power On***/ #define INCA_IP_WDT_RST_SR ((volatile u32*)(INCA_IP_WDT+ 0x0014)) - -/***Reset Request Register***/ + +/***Reset Request Register***/ #define INCA_IP_WDT_RST_REQ ((volatile u32*)(INCA_IP_WDT+ 0x0010)) #define INCA_IP_WDT_RST_REQ_SWBOOT (1 << 24) #define INCA_IP_WDT_RST_REQ_SWCFG (1 << 16) @@ -46,37 +46,37 @@ #define INCA_IP_WDT_RST_REQ_RREXT (1 << 2) #define INCA_IP_WDT_RST_REQ_RRDSP (1 << 1) #define INCA_IP_WDT_RST_REQ_RRCPU (1 << 0) - -/***NMI Status Register***/ + +/***NMI Status Register***/ #define INCA_IP_WDT_NMISR ((volatile u32*)(INCA_IP_WDT+ 0x002C)) #define INCA_IP_WDT_NMISR_NMIWDT (1 << 2) #define INCA_IP_WDT_NMISR_NMIPLL (1 << 1) #define INCA_IP_WDT_NMISR_NMIEXT (1 << 0) - -/***Manufacturer Identification Register***/ + +/***Manufacturer Identification Register***/ #define INCA_IP_WDT_MANID ((volatile u32*)(INCA_IP_WDT+ 0x0070)) #define INCA_IP_WDT_MANID_MANUF (value) (((( 1 << 11) - 1) & (value)) << 5) - -/***Chip Identification Register***/ + +/***Chip Identification Register***/ #define INCA_IP_WDT_CHIPID ((volatile u32*)(INCA_IP_WDT+ 0x0074)) #define INCA_IP_WDT_CHIPID_VERSION (value) (((( 1 << 4) - 1) & (value)) << 28) #define INCA_IP_WDT_CHIPID_PART_NUMBER (value) (((( 1 << 16) - 1) & (value)) << 12) #define INCA_IP_WDT_CHIPID_MANID (value) (((( 1 << 11) - 1) & (value)) << 1) - -/***Redesign Tracing Identification Register***/ + +/***Redesign Tracing Identification Register***/ #define INCA_IP_WDT_RTID ((volatile u32*)(INCA_IP_WDT+ 0x0078)) #define INCA_IP_WDT_RTID_LC (1 << 15) #define INCA_IP_WDT_RTID_RIX (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***Watchdog Timer Control Register 0***/ + +/***Watchdog Timer Control Register 0***/ #define INCA_IP_WDT_WDT_CON0 ((volatile u32*)(INCA_IP_WDT+ 0x0020)) - -/***Watchdog Timer Control Register 1***/ + +/***Watchdog Timer Control Register 1***/ #define INCA_IP_WDT_WDT_CON1 ((volatile u32*)(INCA_IP_WDT+ 0x0024)) #define INCA_IP_WDT_WDT_CON1_WDTDR (1 << 3) #define INCA_IP_WDT_WDT_CON1_WDTIR (1 << 2) - -/***Watchdog Timer Status Register***/ + +/***Watchdog Timer Status Register***/ #define INCA_IP_WDT_WDT_SR ((volatile u32*)(INCA_IP_WDT+ 0x0028)) #define INCA_IP_WDT_WDT_SR_WDTTIM (value) (((( 1 << 16) - 1) & (value)) << 16) #define INCA_IP_WDT_WDT_SR_WDTPR (1 << 5) @@ -84,66 +84,66 @@ #define INCA_IP_WDT_WDT_SR_WDTDS (1 << 3) #define INCA_IP_WDT_WDT_SR_WDTIS (1 << 2) #define INCA_IP_WDT_WDT_SR_WDTOE (1 << 1) -#define INCA_IP_WDT_WDT_SR_WDTAE (1 << 0) - +#define INCA_IP_WDT_WDT_SR_WDTAE (1 << 0) + /***********************************************************************/ /* Module : CGU register address and bits */ /***********************************************************************/ - -#define INCA_IP_CGU (0xBF107000) -/***********************************************************************/ - -/***CGU PLL1 Control Register***/ +#define INCA_IP_CGU (0xBF107000) +/***********************************************************************/ + + +/***CGU PLL1 Control Register***/ #define INCA_IP_CGU_CGU_PLL1CR ((volatile u32*)(INCA_IP_CGU+ 0x0008)) #define INCA_IP_CGU_CGU_PLL1CR_SWRST (1 << 31) #define INCA_IP_CGU_CGU_PLL1CR_EN (1 << 30) #define INCA_IP_CGU_CGU_PLL1CR_NDIV (value) (((( 1 << 6) - 1) & (value)) << 16) #define INCA_IP_CGU_CGU_PLL1CR_MDIV (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***CGU PLL0 Control Register***/ + +/***CGU PLL0 Control Register***/ #define INCA_IP_CGU_CGU_PLL0CR ((volatile u32*)(INCA_IP_CGU+ 0x0000)) #define INCA_IP_CGU_CGU_PLL0CR_SWRST (1 << 31) #define INCA_IP_CGU_CGU_PLL0CR_EN (1 << 30) #define INCA_IP_CGU_CGU_PLL0CR_NDIV (value) (((( 1 << 6) - 1) & (value)) << 16) #define INCA_IP_CGU_CGU_PLL0CR_MDIV (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***CGU PLL0 Status Register***/ + +/***CGU PLL0 Status Register***/ #define INCA_IP_CGU_CGU_PLL0SR ((volatile u32*)(INCA_IP_CGU+ 0x0004)) #define INCA_IP_CGU_CGU_PLL0SR_LOCK (1 << 31) #define INCA_IP_CGU_CGU_PLL0SR_RCF (1 << 29) #define INCA_IP_CGU_CGU_PLL0SR_PLLBYP (1 << 15) - -/***CGU PLL1 Status Register***/ + +/***CGU PLL1 Status Register***/ #define INCA_IP_CGU_CGU_PLL1SR ((volatile u32*)(INCA_IP_CGU+ 0x000C)) #define INCA_IP_CGU_CGU_PLL1SR_LOCK (1 << 31) #define INCA_IP_CGU_CGU_PLL1SR_RCF (1 << 29) #define INCA_IP_CGU_CGU_PLL1SR_PLLBYP (1 << 15) - -/***CGU Divider Control Register***/ + +/***CGU Divider Control Register***/ #define INCA_IP_CGU_CGU_DIVCR ((volatile u32*)(INCA_IP_CGU+ 0x0010)) - -/***CGU Multiplexer Control Register***/ + +/***CGU Multiplexer Control Register***/ #define INCA_IP_CGU_CGU_MUXCR ((volatile u32*)(INCA_IP_CGU+ 0x0014)) #define INCA_IP_CGU_CGU_MUXCR_SWRST (1 << 31) #define INCA_IP_CGU_CGU_MUXCR_MUXII (1 << 1) #define INCA_IP_CGU_CGU_MUXCR_MUXI (1 << 0) - -/***CGU Fractional Divider Control Register***/ + +/***CGU Fractional Divider Control Register***/ #define INCA_IP_CGU_CGU_FDCR ((volatile u32*)(INCA_IP_CGU+ 0x0018)) #define INCA_IP_CGU_CGU_FDCR_FDEN (1 << 31) #define INCA_IP_CGU_CGU_FDCR_INTEGER (value) (((( 1 << 12) - 1) & (value)) << 16) -#define INCA_IP_CGU_CGU_FDCR_FRACTION (value) (((( 1 << 16) - 1) & (value)) << 0) - +#define INCA_IP_CGU_CGU_FDCR_FRACTION (value) (((( 1 << 16) - 1) & (value)) << 0) + /***********************************************************************/ /* Module : PMU register address and bits */ /***********************************************************************/ - -#define INCA_IP_PMU (0xBF102000) -/***********************************************************************/ - -/***PM Global Enable Register***/ +#define INCA_IP_PMU (0xBF102000) +/***********************************************************************/ + + +/***PM Global Enable Register***/ #define INCA_IP_PMU_PM_GEN ((volatile u32*)(INCA_IP_PMU+ 0x0000)) #define INCA_IP_PMU_PM_GEN_EN16 (1 << 16) #define INCA_IP_PMU_PM_GEN_EN15 (1 << 15) @@ -161,8 +161,8 @@ #define INCA_IP_PMU_PM_GEN_EN3 (1 << 3) #define INCA_IP_PMU_PM_GEN_EN2 (1 << 2) #define INCA_IP_PMU_PM_GEN_EN0 (1 << 0) - -/***PM Power Down Enable Register***/ + +/***PM Power Down Enable Register***/ #define INCA_IP_PMU_PM_PDEN ((volatile u32*)(INCA_IP_PMU+ 0x0008)) #define INCA_IP_PMU_PM_PDEN_EN16 (1 << 16) #define INCA_IP_PMU_PM_PDEN_EN15 (1 << 15) @@ -179,8 +179,8 @@ #define INCA_IP_PMU_PM_PDEN_EN3 (1 << 3) #define INCA_IP_PMU_PM_PDEN_EN2 (1 << 2) #define INCA_IP_PMU_PM_PDEN_EN0 (1 << 0) - -/***PM Wake-Up from Power Down Register***/ + +/***PM Wake-Up from Power Down Register***/ #define INCA_IP_PMU_PM_WUP ((volatile u32*)(INCA_IP_PMU+ 0x0010)) #define INCA_IP_PMU_PM_WUP_WUP16 (1 << 16) #define INCA_IP_PMU_PM_WUP_WUP15 (1 << 15) @@ -197,31 +197,31 @@ #define INCA_IP_PMU_PM_WUP_WUP3 (1 << 3) #define INCA_IP_PMU_PM_WUP_WUP2 (1 << 2) #define INCA_IP_PMU_PM_WUP_WUP0 (1 << 0) - -/***PM Control Register***/ + +/***PM Control Register***/ #define INCA_IP_PMU_PM_CR ((volatile u32*)(INCA_IP_PMU+ 0x0014)) #define INCA_IP_PMU_PM_CR_AWEN (1 << 31) #define INCA_IP_PMU_PM_CR_SWRST (1 << 30) #define INCA_IP_PMU_PM_CR_SWCR (1 << 2) -#define INCA_IP_PMU_PM_CR_CRD (value) (((( 1 << 2) - 1) & (value)) << 0) - +#define INCA_IP_PMU_PM_CR_CRD (value) (((( 1 << 2) - 1) & (value)) << 0) + /***********************************************************************/ /* Module : BCU register address and bits */ /***********************************************************************/ - -#define INCA_IP_BCU (0xB8000100) -/***********************************************************************/ - -/***BCU Control Register (0010H)***/ +#define INCA_IP_BCU (0xB8000100) +/***********************************************************************/ + + +/***BCU Control Register (0010H)***/ #define INCA_IP_BCU_BCU_CON ((volatile u32*)(INCA_IP_BCU+ 0x0010)) #define INCA_IP_BCU_BCU_CON_SPC (value) (((( 1 << 8) - 1) & (value)) << 24) #define INCA_IP_BCU_BCU_CON_SPE (1 << 19) #define INCA_IP_BCU_BCU_CON_PSE (1 << 18) #define INCA_IP_BCU_BCU_CON_DBG (1 << 16) #define INCA_IP_BCU_BCU_CON_TOUT (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***BCU Error Control Capture Register (0020H)***/ + +/***BCU Error Control Capture Register (0020H)***/ #define INCA_IP_BCU_BCU_ECON ((volatile u32*)(INCA_IP_BCU+ 0x0020)) #define INCA_IP_BCU_BCU_ECON_TAG (value) (((( 1 << 4) - 1) & (value)) << 24) #define INCA_IP_BCU_BCU_ECON_RDN (1 << 23) @@ -233,31 +233,31 @@ #define INCA_IP_BCU_BCU_ECON_TOUT (1 << 16) #define INCA_IP_BCU_BCU_ECON_ERRCNT (value) (((( 1 << 16) - 1) & (value)) << 0) #define INCA_IP_BCU_BCU_ECON_OPC (value) (((( 1 << 4) - 1) & (value)) << 28) - -/***BCU Error Address Capture Register (0024 H)***/ + +/***BCU Error Address Capture Register (0024 H)***/ #define INCA_IP_BCU_BCU_EADD ((volatile u32*)(INCA_IP_BCU+ 0x0024)) #define INCA_IP_BCU_BCU_EADD_FPIADR - -/***BCU Error Data Capture Register (0028H)***/ + +/***BCU Error Data Capture Register (0028H)***/ #define INCA_IP_BCU_BCU_EDAT ((volatile u32*)(INCA_IP_BCU+ 0x0028)) -#define INCA_IP_BCU_BCU_EDAT_FPIDAT - +#define INCA_IP_BCU_BCU_EDAT_FPIDAT + /***********************************************************************/ /* Module : MBC register address and bits */ /***********************************************************************/ - -#define INCA_IP_MBC (0xBF103000) -/***********************************************************************/ - -/***Mailbox CPU Configuration Register***/ +#define INCA_IP_MBC (0xBF103000) +/***********************************************************************/ + + +/***Mailbox CPU Configuration Register***/ #define INCA_IP_MBC_MBC_CFG ((volatile u32*)(INCA_IP_MBC+ 0x0080)) #define INCA_IP_MBC_MBC_CFG_SWAP (value) (((( 1 << 2) - 1) & (value)) << 6) #define INCA_IP_MBC_MBC_CFG_RES (1 << 5) #define INCA_IP_MBC_MBC_CFG_FWID (value) (((( 1 << 4) - 1) & (value)) << 1) #define INCA_IP_MBC_MBC_CFG_SIZE (1 << 0) - -/***Mailbox CPU Interrupt Status Register***/ + +/***Mailbox CPU Interrupt Status Register***/ #define INCA_IP_MBC_MBC_ISR ((volatile u32*)(INCA_IP_MBC+ 0x0084)) #define INCA_IP_MBC_MBC_ISR_B3DA (1 << 31) #define INCA_IP_MBC_MBC_ISR_B2DA (1 << 30) @@ -265,8 +265,8 @@ #define INCA_IP_MBC_MBC_ISR_B0E (1 << 28) #define INCA_IP_MBC_MBC_ISR_WDT (1 << 27) #define INCA_IP_MBC_MBC_ISR_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0) - -/***Mailbox CPU Mask Register***/ + +/***Mailbox CPU Mask Register***/ #define INCA_IP_MBC_MBC_MSK ((volatile u32*)(INCA_IP_MBC+ 0x0088)) #define INCA_IP_MBC_MBC_MSK_B3DA (1 << 31) #define INCA_IP_MBC_MBC_MSK_B2DA (1 << 30) @@ -274,8 +274,8 @@ #define INCA_IP_MBC_MBC_MSK_B0E (1 << 28) #define INCA_IP_MBC_MBC_MSK_WDT (1 << 27) #define INCA_IP_MBC_MBC_MSK_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0) - -/***Mailbox CPU Mask 01 Register***/ + +/***Mailbox CPU Mask 01 Register***/ #define INCA_IP_MBC_MBC_MSK01 ((volatile u32*)(INCA_IP_MBC+ 0x008C)) #define INCA_IP_MBC_MBC_MSK01_B3DA (1 << 31) #define INCA_IP_MBC_MBC_MSK01_B2DA (1 << 30) @@ -283,8 +283,8 @@ #define INCA_IP_MBC_MBC_MSK01_B0E (1 << 28) #define INCA_IP_MBC_MBC_MSK01_WDT (1 << 27) #define INCA_IP_MBC_MBC_MSK01_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0) - -/***Mailbox CPU Mask 10 Register***/ + +/***Mailbox CPU Mask 10 Register***/ #define INCA_IP_MBC_MBC_MSK10 ((volatile u32*)(INCA_IP_MBC+ 0x0090)) #define INCA_IP_MBC_MBC_MSK10_B3DA (1 << 31) #define INCA_IP_MBC_MBC_MSK10_B2DA (1 << 30) @@ -292,167 +292,167 @@ #define INCA_IP_MBC_MBC_MSK10_B0E (1 << 28) #define INCA_IP_MBC_MBC_MSK10_WDT (1 << 27) #define INCA_IP_MBC_MBC_MSK10_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0) - -/***Mailbox CPU Short Command Register***/ + +/***Mailbox CPU Short Command Register***/ #define INCA_IP_MBC_MBC_CMD ((volatile u32*)(INCA_IP_MBC+ 0x0094)) #define INCA_IP_MBC_MBC_CMD_CS270 (value) (((( 1 << 28) - 1) & (value)) << 0) - -/***Mailbox CPU Input Data of Buffer 0***/ + +/***Mailbox CPU Input Data of Buffer 0***/ #define INCA_IP_MBC_MBC_ID0 ((volatile u32*)(INCA_IP_MBC+ 0x0000)) #define INCA_IP_MBC_MBC_ID0_INDATA - -/***Mailbox CPU Input Data of Buffer 1***/ + +/***Mailbox CPU Input Data of Buffer 1***/ #define INCA_IP_MBC_MBC_ID1 ((volatile u32*)(INCA_IP_MBC+ 0x0020)) #define INCA_IP_MBC_MBC_ID1_INDATA - -/***Mailbox CPU Output Data of Buffer 2***/ + +/***Mailbox CPU Output Data of Buffer 2***/ #define INCA_IP_MBC_MBC_OD2 ((volatile u32*)(INCA_IP_MBC+ 0x0040)) #define INCA_IP_MBC_MBC_OD2_OUTDATA - -/***Mailbox CPU Output Data of Buffer 3***/ + +/***Mailbox CPU Output Data of Buffer 3***/ #define INCA_IP_MBC_MBC_OD3 ((volatile u32*)(INCA_IP_MBC+ 0x0060)) #define INCA_IP_MBC_MBC_OD3_OUTDATA - -/***Mailbox CPU Control Register of Buffer 0***/ + +/***Mailbox CPU Control Register of Buffer 0***/ #define INCA_IP_MBC_MBC_CR0 ((volatile u32*)(INCA_IP_MBC+ 0x0004)) #define INCA_IP_MBC_MBC_CR0_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***Mailbox CPU Control Register of Buffer 1***/ + +/***Mailbox CPU Control Register of Buffer 1***/ #define INCA_IP_MBC_MBC_CR1 ((volatile u32*)(INCA_IP_MBC+ 0x0024)) #define INCA_IP_MBC_MBC_CR1_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***Mailbox CPU Control Register of Buffer 2***/ + +/***Mailbox CPU Control Register of Buffer 2***/ #define INCA_IP_MBC_MBC_CR2 ((volatile u32*)(INCA_IP_MBC+ 0x0044)) #define INCA_IP_MBC_MBC_CR2_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***Mailbox CPU Control Register of Buffer 3***/ + +/***Mailbox CPU Control Register of Buffer 3***/ #define INCA_IP_MBC_MBC_CR3 ((volatile u32*)(INCA_IP_MBC+ 0x0064)) #define INCA_IP_MBC_MBC_CR3_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***Mailbox CPU Free Space of Buffer 0***/ + +/***Mailbox CPU Free Space of Buffer 0***/ #define INCA_IP_MBC_MBC_FS0 ((volatile u32*)(INCA_IP_MBC+ 0x0008)) #define INCA_IP_MBC_MBC_FS0_FS - -/***Mailbox CPU Free Space of Buffer 1***/ + +/***Mailbox CPU Free Space of Buffer 1***/ #define INCA_IP_MBC_MBC_FS1 ((volatile u32*)(INCA_IP_MBC+ 0x0028)) #define INCA_IP_MBC_MBC_FS1_FS - -/***Mailbox CPU Free Space of Buffer 2***/ + +/***Mailbox CPU Free Space of Buffer 2***/ #define INCA_IP_MBC_MBC_FS2 ((volatile u32*)(INCA_IP_MBC+ 0x0048)) #define INCA_IP_MBC_MBC_FS2_FS - -/***Mailbox CPU Free Space of Buffer 3***/ + +/***Mailbox CPU Free Space of Buffer 3***/ #define INCA_IP_MBC_MBC_FS3 ((volatile u32*)(INCA_IP_MBC+ 0x0068)) #define INCA_IP_MBC_MBC_FS3_FS - -/***Mailbox CPU Data Available in Buffer 0***/ + +/***Mailbox CPU Data Available in Buffer 0***/ #define INCA_IP_MBC_MBC_DA0 ((volatile u32*)(INCA_IP_MBC+ 0x000C)) #define INCA_IP_MBC_MBC_DA0_DA - -/***Mailbox CPU Data Available in Buffer 1***/ + +/***Mailbox CPU Data Available in Buffer 1***/ #define INCA_IP_MBC_MBC_DA1 ((volatile u32*)(INCA_IP_MBC+ 0x002C)) #define INCA_IP_MBC_MBC_DA1_DA - -/***Mailbox CPU Data Available in Buffer 2***/ + +/***Mailbox CPU Data Available in Buffer 2***/ #define INCA_IP_MBC_MBC_DA2 ((volatile u32*)(INCA_IP_MBC+ 0x004C)) #define INCA_IP_MBC_MBC_DA2_DA - -/***Mailbox CPU Data Available in Buffer 3***/ + +/***Mailbox CPU Data Available in Buffer 3***/ #define INCA_IP_MBC_MBC_DA3 ((volatile u32*)(INCA_IP_MBC+ 0x006C)) #define INCA_IP_MBC_MBC_DA3_DA - -/***Mailbox CPU Input Absolute Pointer of Buffer 0***/ + +/***Mailbox CPU Input Absolute Pointer of Buffer 0***/ #define INCA_IP_MBC_MBC_IABS0 ((volatile u32*)(INCA_IP_MBC+ 0x0010)) #define INCA_IP_MBC_MBC_IABS0_IABS - -/***Mailbox CPU Input Absolute Pointer of Buffer 1***/ + +/***Mailbox CPU Input Absolute Pointer of Buffer 1***/ #define INCA_IP_MBC_MBC_IABS1 ((volatile u32*)(INCA_IP_MBC+ 0x0030)) #define INCA_IP_MBC_MBC_IABS1_IABS - -/***Mailbox CPU Input Absolute Pointer of Buffer 2***/ + +/***Mailbox CPU Input Absolute Pointer of Buffer 2***/ #define INCA_IP_MBC_MBC_IABS2 ((volatile u32*)(INCA_IP_MBC+ 0x0050)) #define INCA_IP_MBC_MBC_IABS2_IABS - -/***Mailbox CPU Input Absolute Pointer of Buffer 3***/ + +/***Mailbox CPU Input Absolute Pointer of Buffer 3***/ #define INCA_IP_MBC_MBC_IABS3 ((volatile u32*)(INCA_IP_MBC+ 0x0070)) #define INCA_IP_MBC_MBC_IABS3_IABS - -/***Mailbox CPU Input Temporary Pointer of Buffer 0***/ + +/***Mailbox CPU Input Temporary Pointer of Buffer 0***/ #define INCA_IP_MBC_MBC_ITMP0 ((volatile u32*)(INCA_IP_MBC+ 0x0014)) #define INCA_IP_MBC_MBC_ITMP0_ITMP - -/***Mailbox CPU Input Temporary Pointer of Buffer 1***/ + +/***Mailbox CPU Input Temporary Pointer of Buffer 1***/ #define INCA_IP_MBC_MBC_ITMP1 ((volatile u32*)(INCA_IP_MBC+ 0x0034)) #define INCA_IP_MBC_MBC_ITMP1_ITMP - -/***Mailbox CPU Input Temporary Pointer of Buffer 2***/ + +/***Mailbox CPU Input Temporary Pointer of Buffer 2***/ #define INCA_IP_MBC_MBC_ITMP2 ((volatile u32*)(INCA_IP_MBC+ 0x0054)) #define INCA_IP_MBC_MBC_ITMP2_ITMP - -/***Mailbox CPU Input Temporary Pointer of Buffer 3***/ + +/***Mailbox CPU Input Temporary Pointer of Buffer 3***/ #define INCA_IP_MBC_MBC_ITMP3 ((volatile u32*)(INCA_IP_MBC+ 0x0074)) #define INCA_IP_MBC_MBC_ITMP3_ITMP - -/***Mailbox CPU Output Absolute Pointer of Buffer 0***/ + +/***Mailbox CPU Output Absolute Pointer of Buffer 0***/ #define INCA_IP_MBC_MBC_OABS0 ((volatile u32*)(INCA_IP_MBC+ 0x0018)) #define INCA_IP_MBC_MBC_OABS0_OABS - -/***Mailbox CPU Output Absolute Pointer of Buffer 1***/ + +/***Mailbox CPU Output Absolute Pointer of Buffer 1***/ #define INCA_IP_MBC_MBC_OABS1 ((volatile u32*)(INCA_IP_MBC+ 0x0038)) #define INCA_IP_MBC_MBC_OABS1_OABS - -/***Mailbox CPU Output Absolute Pointer of Buffer 2***/ + +/***Mailbox CPU Output Absolute Pointer of Buffer 2***/ #define INCA_IP_MBC_MBC_OABS2 ((volatile u32*)(INCA_IP_MBC+ 0x0058)) #define INCA_IP_MBC_MBC_OABS2_OABS - -/***Mailbox CPU Output Absolute Pointer of Buffer 3***/ + +/***Mailbox CPU Output Absolute Pointer of Buffer 3***/ #define INCA_IP_MBC_MBC_OABS3 ((volatile u32*)(INCA_IP_MBC+ 0x0078)) #define INCA_IP_MBC_MBC_OABS3_OABS - -/***Mailbox CPU Output Temporary Pointer of Buffer 0***/ + +/***Mailbox CPU Output Temporary Pointer of Buffer 0***/ #define INCA_IP_MBC_MBC_OTMP0 ((volatile u32*)(INCA_IP_MBC+ 0x001C)) #define INCA_IP_MBC_MBC_OTMP0_OTMP - -/***Mailbox CPU Output Temporary Pointer of Buffer 1***/ + +/***Mailbox CPU Output Temporary Pointer of Buffer 1***/ #define INCA_IP_MBC_MBC_OTMP1 ((volatile u32*)(INCA_IP_MBC+ 0x003C)) #define INCA_IP_MBC_MBC_OTMP1_OTMP - -/***Mailbox CPU Output Temporary Pointer of Buffer 2***/ + +/***Mailbox CPU Output Temporary Pointer of Buffer 2***/ #define INCA_IP_MBC_MBC_OTMP2 ((volatile u32*)(INCA_IP_MBC+ 0x005C)) #define INCA_IP_MBC_MBC_OTMP2_OTMP - -/***Mailbox CPU Output Temporary Pointer of Buffer 3***/ + +/***Mailbox CPU Output Temporary Pointer of Buffer 3***/ #define INCA_IP_MBC_MBC_OTMP3 ((volatile u32*)(INCA_IP_MBC+ 0x007C)) #define INCA_IP_MBC_MBC_OTMP3_OTMP - -/***DSP Control Register***/ + +/***DSP Control Register***/ #define INCA_IP_MBC_DCTRL ((volatile u32*)(INCA_IP_MBC+ 0x00A0)) #define INCA_IP_MBC_DCTRL_BA (1 << 0) #define INCA_IP_MBC_DCTRL_BMOD (value) (((( 1 << 3) - 1) & (value)) << 1) #define INCA_IP_MBC_DCTRL_IDL (1 << 4) #define INCA_IP_MBC_DCTRL_RES (1 << 15) - -/***DSP Status Register***/ + +/***DSP Status Register***/ #define INCA_IP_MBC_DSTA ((volatile u32*)(INCA_IP_MBC+ 0x00A4)) #define INCA_IP_MBC_DSTA_IDLE (1 << 0) #define INCA_IP_MBC_DSTA_PD (1 << 1) - -/***DSP Test 1 Register***/ + +/***DSP Test 1 Register***/ #define INCA_IP_MBC_DTST1 ((volatile u32*)(INCA_IP_MBC+ 0x00A8)) #define INCA_IP_MBC_DTST1_ABORT (1 << 0) #define INCA_IP_MBC_DTST1_HWF32 (1 << 1) #define INCA_IP_MBC_DTST1_HWF4M (1 << 2) -#define INCA_IP_MBC_DTST1_HWFOP (1 << 3) - +#define INCA_IP_MBC_DTST1_HWFOP (1 << 3) + /***********************************************************************/ /* Module : Switch register address and bits */ /***********************************************************************/ - -#define INCA_IP_Switch (0xBF104000) -/***********************************************************************/ - -/***Unknown Destination Register***/ +#define INCA_IP_Switch (0xBF104000) +/***********************************************************************/ + + +/***Unknown Destination Register***/ #define INCA_IP_Switch_UN_DEST ((volatile u32*)(INCA_IP_Switch+ 0x0000)) #define INCA_IP_Switch_UN_DEST_CB (1 << 8) #define INCA_IP_Switch_UN_DEST_LB (1 << 7) @@ -463,8 +463,8 @@ #define INCA_IP_Switch_UN_DEST_CU (1 << 2) #define INCA_IP_Switch_UN_DEST_LU (1 << 1) #define INCA_IP_Switch_UN_DEST_PU (1 << 0) - -/***VLAN Control Register***/ + +/***VLAN Control Register***/ #define INCA_IP_Switch_VLAN_CTRL ((volatile u32*)(INCA_IP_Switch+ 0x0004)) #define INCA_IP_Switch_VLAN_CTRL_SC (1 << 6) #define INCA_IP_Switch_VLAN_CTRL_SL (1 << 5) @@ -473,23 +473,23 @@ #define INCA_IP_Switch_VLAN_CTRL_TL (1 << 2) #define INCA_IP_Switch_VLAN_CTRL_TP (1 << 1) #define INCA_IP_Switch_VLAN_CTRL_VA (1 << 0) - -/***PC VLAN Configuration Register***/ + +/***PC VLAN Configuration Register***/ #define INCA_IP_Switch_PC_VLAN ((volatile u32*)(INCA_IP_Switch+ 0x0008)) #define INCA_IP_Switch_PC_VLAN_PRI (value) (((( 1 << 3) - 1) & (value)) << 12) #define INCA_IP_Switch_PC_VLAN_VLAN_ID (value) (((( 1 << 12) - 1) & (value)) << 0) - -/***LAN VLAN Configuration Register***/ + +/***LAN VLAN Configuration Register***/ #define INCA_IP_Switch_LAN_VLAN ((volatile u32*)(INCA_IP_Switch+ 0x000C)) #define INCA_IP_Switch_LAN_VLAN_PRI (value) (((( 1 << 3) - 1) & (value)) << 12) #define INCA_IP_Switch_LAN_VLAN_VLAN_ID (value) (((( 1 << 12) - 1) & (value)) << 0) - -/***CPU VLAN Configuration Register***/ + +/***CPU VLAN Configuration Register***/ #define INCA_IP_Switch_CPU_VLAN ((volatile u32*)(INCA_IP_Switch+ 0x0010)) #define INCA_IP_Switch_CPU_VLAN_PRI (value) (((( 1 << 3) - 1) & (value)) << 12) #define INCA_IP_Switch_CPU_VLAN_VLAN_ID (value) (((( 1 << 12) - 1) & (value)) << 0) - -/***Priority CoS Mapping Register***/ + +/***Priority CoS Mapping Register***/ #define INCA_IP_Switch_PRI_CoS ((volatile u32*)(INCA_IP_Switch+ 0x0014)) #define INCA_IP_Switch_PRI_CoS_P7 (1 << 7) #define INCA_IP_Switch_PRI_CoS_P6 (1 << 6) @@ -499,14 +499,14 @@ #define INCA_IP_Switch_PRI_CoS_P2 (1 << 2) #define INCA_IP_Switch_PRI_CoS_P1 (1 << 1) #define INCA_IP_Switch_PRI_CoS_P0 (1 << 0) - -/***Spanning Tree Port Status Register***/ + +/***Spanning Tree Port Status Register***/ #define INCA_IP_Switch_ST_PT ((volatile u32*)(INCA_IP_Switch+ 0x0018)) #define INCA_IP_Switch_ST_PT_CPS (value) (((( 1 << 2) - 1) & (value)) << 4) #define INCA_IP_Switch_ST_PT_LPS (value) (((( 1 << 2) - 1) & (value)) << 2) #define INCA_IP_Switch_ST_PT_PPS (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***ARL Control Register***/ + +/***ARL Control Register***/ #define INCA_IP_Switch_ARL_CTL ((volatile u32*)(INCA_IP_Switch+ 0x001C)) #define INCA_IP_Switch_ARL_CTL_CHCC (1 << 15) #define INCA_IP_Switch_ARL_CTL_CHCL (1 << 14) @@ -523,24 +523,24 @@ #define INCA_IP_Switch_ARL_CTL_MAF (1 << 1) #define INCA_IP_Switch_ARL_CTL_ENL (1 << 0) #define INCA_IP_Switch_ARL_CTL_Res (value) (((( 1 << 19) - 1) & (value)) << 13) - -/***CPU Access Control Register***/ + +/***CPU Access Control Register***/ #define INCA_IP_Switch_CPU_ACTL ((volatile u32*)(INCA_IP_Switch+ 0x0020)) #define INCA_IP_Switch_CPU_ACTL_RA (1 << 31) #define INCA_IP_Switch_CPU_ACTL_RW (1 << 30) #define INCA_IP_Switch_CPU_ACTL_Res (value) (((( 1 << 21) - 1) & (value)) << 9) #define INCA_IP_Switch_CPU_ACTL_AVA (1 << 8) #define INCA_IP_Switch_CPU_ACTL_IDX (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***CPU Access Data Register 1***/ + +/***CPU Access Data Register 1***/ #define INCA_IP_Switch_DATA1 ((volatile u32*)(INCA_IP_Switch+ 0x0024)) #define INCA_IP_Switch_DATA1_Data (value) (((( 1 << 24) - 1) & (value)) << 0) - -/***CPU Access Data Register 2***/ + +/***CPU Access Data Register 2***/ #define INCA_IP_Switch_DATA2 ((volatile u32*)(INCA_IP_Switch+ 0x0028)) #define INCA_IP_Switch_DATA2_Data - -/***CPU Port Control Register***/ + +/***CPU Port Control Register***/ #define INCA_IP_Switch_CPU_PCTL ((volatile u32*)(INCA_IP_Switch+ 0x002C)) #define INCA_IP_Switch_CPU_PCTL_DA_PORTS (value) (((( 1 << 3) - 1) & (value)) << 11) #define INCA_IP_Switch_CPU_PCTL_DAC (1 << 10) @@ -551,85 +551,85 @@ #define INCA_IP_Switch_CPU_PCTL_EML (1 << 1) #define INCA_IP_Switch_CPU_PCTL_EDL (1 << 0) #define INCA_IP_Switch_CPU_PCTL_Res (value) (((( 1 << 18) - 1) & (value)) << 14) - -/***DSCP CoS Mapping Register 1***/ + +/***DSCP CoS Mapping Register 1***/ #define INCA_IP_Switch_DSCP_COS1 ((volatile u32*)(INCA_IP_Switch+ 0x0030)) #define INCA_IP_Switch_DSCP_COS1_DSCP - -/***DSCP CoS Mapping Register 1***/ + +/***DSCP CoS Mapping Register 1***/ #define INCA_IP_Switch_DSCP_COS2 ((volatile u32*)(INCA_IP_Switch+ 0x0034)) #define INCA_IP_Switch_DSCP_COS2_DSCP - -/***PC WFQ Control Register***/ + +/***PC WFQ Control Register***/ #define INCA_IP_Switch_PC_WFQ_CTL ((volatile u32*)(INCA_IP_Switch+ 0x0080)) #define INCA_IP_Switch_PC_WFQ_CTL_P1 (1 << 9) #define INCA_IP_Switch_PC_WFQ_CTL_P0 (1 << 8) #define INCA_IP_Switch_PC_WFQ_CTL_WT1 (value) (((( 1 << 3) - 1) & (value)) << 5) #define INCA_IP_Switch_PC_WFQ_CTL_WT0 (value) (((( 1 << 3) - 1) & (value)) << 2) #define INCA_IP_Switch_PC_WFQ_CTL_SCH_SEL (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***PC TX Control Register***/ + +/***PC TX Control Register***/ #define INCA_IP_Switch_PC_TX_CTL ((volatile u32*)(INCA_IP_Switch+ 0x0084)) #define INCA_IP_Switch_PC_TX_CTL_ELR (1 << 1) #define INCA_IP_Switch_PC_TX_CTL_EER (1 << 0) - -/***LAN WFQ Control Register***/ + +/***LAN WFQ Control Register***/ #define INCA_IP_Switch_LAN_WFQ_CTL ((volatile u32*)(INCA_IP_Switch+ 0x0100)) #define INCA_IP_Switch_LAN_WFQ_CTL_P1 (1 << 9) #define INCA_IP_Switch_LAN_WFQ_CTL_P0 (1 << 8) #define INCA_IP_Switch_LAN_WFQ_CTL_WT1 (value) (((( 1 << 3) - 1) & (value)) << 5) #define INCA_IP_Switch_LAN_WFQ_CTL_WT0 (value) (((( 1 << 3) - 1) & (value)) << 2) #define INCA_IP_Switch_LAN_WFQ_CTL_SCH_SEL (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***LAN TX Control Register***/ + +/***LAN TX Control Register***/ #define INCA_IP_Switch_LAN_TX_CTL ((volatile u32*)(INCA_IP_Switch+ 0x0104)) #define INCA_IP_Switch_LAN_TX_CTL_ELR (1 << 1) #define INCA_IP_Switch_LAN_TX_CTL_EER (1 << 0) - -/***CPU WFQ Control Register***/ + +/***CPU WFQ Control Register***/ #define INCA_IP_Switch_CPU_WFQ_CTL ((volatile u32*)(INCA_IP_Switch+ 0x0180)) #define INCA_IP_Switch_CPU_WFQ_CTL_P1 (1 << 9) #define INCA_IP_Switch_CPU_WFQ_CTL_P0 (1 << 8) #define INCA_IP_Switch_CPU_WFQ_CTL_WT1 (value) (((( 1 << 3) - 1) & (value)) << 5) #define INCA_IP_Switch_CPU_WFQ_CTL_WT0 (value) (((( 1 << 3) - 1) & (value)) << 2) #define INCA_IP_Switch_CPU_WFQ_CTL_SCH_SEL (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***PM PC RX Watermark Register***/ + +/***PM PC RX Watermark Register***/ #define INCA_IP_Switch_PC_WM ((volatile u32*)(INCA_IP_Switch+ 0x0200)) #define INCA_IP_Switch_PC_WM_RX_WM1 (value) (((( 1 << 8) - 1) & (value)) << 24) #define INCA_IP_Switch_PC_WM_RX_WM2 (value) (((( 1 << 8) - 1) & (value)) << 16) #define INCA_IP_Switch_PC_WM_RX_WM3 (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_Switch_PC_WM_RX_WM4 (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***PM LAN RX Watermark Register***/ + +/***PM LAN RX Watermark Register***/ #define INCA_IP_Switch_LAN_WM ((volatile u32*)(INCA_IP_Switch+ 0x0204)) #define INCA_IP_Switch_LAN_WM_RX_WM1 (value) (((( 1 << 8) - 1) & (value)) << 24) #define INCA_IP_Switch_LAN_WM_RX_WM2 (value) (((( 1 << 8) - 1) & (value)) << 16) #define INCA_IP_Switch_LAN_WM_RX_WM3 (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_Switch_LAN_WM_RX_WM4 (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***PM CPU RX Watermark Register***/ + +/***PM CPU RX Watermark Register***/ #define INCA_IP_Switch_CPU_WM ((volatile u32*)(INCA_IP_Switch+ 0x0208)) #define INCA_IP_Switch_CPU_WM_RX_WM1 (value) (((( 1 << 8) - 1) & (value)) << 24) #define INCA_IP_Switch_CPU_WM_RX_WM2 (value) (((( 1 << 8) - 1) & (value)) << 16) #define INCA_IP_Switch_CPU_WM_RX_WM3 (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_Switch_CPU_WM_RX_WM4 (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***PM CPU RX Watermark Register***/ + +/***PM CPU RX Watermark Register***/ #define INCA_IP_Switch_GBL_WM ((volatile u32*)(INCA_IP_Switch+ 0x020C)) #define INCA_IP_Switch_GBL_WM_GBL_RX_WM1 (value) (((( 1 << 8) - 1) & (value)) << 24) #define INCA_IP_Switch_GBL_WM_GBL_RX_WM2 (value) (((( 1 << 8) - 1) & (value)) << 16) #define INCA_IP_Switch_GBL_WM_GBL_RX_WM3 (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_Switch_GBL_WM_GBL_RX_WM4 (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***PM Control Register***/ + +/***PM Control Register***/ #define INCA_IP_Switch_PM_CTL ((volatile u32*)(INCA_IP_Switch+ 0x0210)) #define INCA_IP_Switch_PM_CTL_GDN (1 << 3) #define INCA_IP_Switch_PM_CTL_CDN (1 << 2) #define INCA_IP_Switch_PM_CTL_LDN (1 << 1) #define INCA_IP_Switch_PM_CTL_PDN (1 << 0) - -/***PM Header Control Register***/ + +/***PM Header Control Register***/ #define INCA_IP_Switch_PMAC_HD_CTL ((volatile u32*)(INCA_IP_Switch+ 0x0280)) #define INCA_IP_Switch_PMAC_HD_CTL_RL2 (1 << 21) #define INCA_IP_Switch_PMAC_HD_CTL_RC (1 << 20) @@ -638,38 +638,38 @@ #define INCA_IP_Switch_PMAC_HD_CTL_TYPE_LEN (value) (((( 1 << 16) - 1) & (value)) << 2) #define INCA_IP_Switch_PMAC_HD_CTL_TAG (1 << 1) #define INCA_IP_Switch_PMAC_HD_CTL_ADD (1 << 0) - -/***PM Source Address Register 1***/ + +/***PM Source Address Register 1***/ #define INCA_IP_Switch_PMAC_SA1 ((volatile u32*)(INCA_IP_Switch+ 0x0284)) #define INCA_IP_Switch_PMAC_SA1_SA_47_32 (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***PM Source Address Register 2***/ + +/***PM Source Address Register 2***/ #define INCA_IP_Switch_PMAC_SA2 ((volatile u32*)(INCA_IP_Switch+ 0x0288)) #define INCA_IP_Switch_PMAC_SA2_SA_31_0 - -/***PM Dest Address Register 1***/ + +/***PM Dest Address Register 1***/ #define INCA_IP_Switch_PMAC_DA1 ((volatile u32*)(INCA_IP_Switch+ 0x028C)) #define INCA_IP_Switch_PMAC_DA1_DA_47_32 (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***PM Dest Address Register 2***/ + +/***PM Dest Address Register 2***/ #define INCA_IP_Switch_PMAC_DA2 ((volatile u32*)(INCA_IP_Switch+ 0x0290)) #define INCA_IP_Switch_PMAC_DA2_DA_31_0 - -/***PM VLAN Register***/ + +/***PM VLAN Register***/ #define INCA_IP_Switch_PMAC_VLAN ((volatile u32*)(INCA_IP_Switch+ 0x0294)) #define INCA_IP_Switch_PMAC_VLAN_PRI (value) (((( 1 << 3) - 1) & (value)) << 13) #define INCA_IP_Switch_PMAC_VLAN_CFI (1 << 12) #define INCA_IP_Switch_PMAC_VLAN_VLANID (value) (((( 1 << 12) - 1) & (value)) << 0) - -/***PM TX IPG Counter Register***/ + +/***PM TX IPG Counter Register***/ #define INCA_IP_Switch_PMAC_TX_IPG ((volatile u32*)(INCA_IP_Switch+ 0x0298)) #define INCA_IP_Switch_PMAC_TX_IPG_IPGCNT (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***PM RX IPG Counter Register***/ + +/***PM RX IPG Counter Register***/ #define INCA_IP_Switch_PMAC_RX_IPG ((volatile u32*)(INCA_IP_Switch+ 0x029C)) #define INCA_IP_Switch_PMAC_RX_IPG_IPGCNT (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***Mirror Register***/ + +/***Mirror Register***/ #define INCA_IP_Switch_MRR ((volatile u32*)(INCA_IP_Switch+ 0x0300)) #define INCA_IP_Switch_MRR_MRR (value) (((( 1 << 2) - 1) & (value)) << 6) #define INCA_IP_Switch_MRR_EC (1 << 5) @@ -678,21 +678,21 @@ #define INCA_IP_Switch_MRR_IC (1 << 2) #define INCA_IP_Switch_MRR_IL (1 << 1) #define INCA_IP_Switch_MRR_IP (1 << 0) - -/***Packet Length Register***/ + +/***Packet Length Register***/ #define INCA_IP_Switch_PKT_LEN ((volatile u32*)(INCA_IP_Switch+ 0x0304)) #define INCA_IP_Switch_PKT_LEN_ADD (1 << 11) #define INCA_IP_Switch_PKT_LEN_MAX_PKT_LEN (value) (((( 1 << 11) - 1) & (value)) << 0) - -/***MDIO Access Register***/ + +/***MDIO Access Register***/ #define INCA_IP_Switch_MDIO_ACC ((volatile u32*)(INCA_IP_Switch+ 0x0480)) #define INCA_IP_Switch_MDIO_ACC_RA (1 << 31) #define INCA_IP_Switch_MDIO_ACC_RW (1 << 30) #define INCA_IP_Switch_MDIO_ACC_PHY_ADDR (value) (((( 1 << 5) - 1) & (value)) << 21) #define INCA_IP_Switch_MDIO_ACC_REG_ADDR (value) (((( 1 << 5) - 1) & (value)) << 16) #define INCA_IP_Switch_MDIO_ACC_PHY_DATA (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***Ethernet PHY Register***/ + +/***Ethernet PHY Register***/ #define INCA_IP_Switch_EPHY ((volatile u32*)(INCA_IP_Switch+ 0x0484)) #define INCA_IP_Switch_EPHY_SL (1 << 7) #define INCA_IP_Switch_EPHY_SP (1 << 6) @@ -702,13 +702,13 @@ #define INCA_IP_Switch_EPHY_DP (1 << 2) #define INCA_IP_Switch_EPHY_PL (1 << 1) #define INCA_IP_Switch_EPHY_PP (1 << 0) - -/***Pause Write Enable Register***/ + +/***Pause Write Enable Register***/ #define INCA_IP_Switch_PWR_EN ((volatile u32*)(INCA_IP_Switch+ 0x0488)) #define INCA_IP_Switch_PWR_EN_PL (1 << 1) #define INCA_IP_Switch_PWR_EN_PP (1 << 0) - -/***MDIO Configuration Register***/ + +/***MDIO Configuration Register***/ #define INCA_IP_Switch_MDIO_CFG ((volatile u32*)(INCA_IP_Switch+ 0x048C)) #define INCA_IP_Switch_MDIO_CFG_MDS (value) (((( 1 << 2) - 1) & (value)) << 14) #define INCA_IP_Switch_MDIO_CFG_PHY_LAN_ADDR (value) (((( 1 << 5) - 1) & (value)) << 9) @@ -717,24 +717,24 @@ #define INCA_IP_Switch_MDIO_CFG_PS (1 << 2) #define INCA_IP_Switch_MDIO_CFG_PT (1 << 1) #define INCA_IP_Switch_MDIO_CFG_UMM (1 << 0) - -/***Clock Configuration Register***/ + +/***Clock Configuration Register***/ #define INCA_IP_Switch_CLK_CFG ((volatile u32*)(INCA_IP_Switch+ 0x0500)) #define INCA_IP_Switch_CLK_CFG_ARL_ID (1 << 9) #define INCA_IP_Switch_CLK_CFG_CPU_ID (1 << 8) #define INCA_IP_Switch_CLK_CFG_LAN_ID (1 << 7) #define INCA_IP_Switch_CLK_CFG_PC_ID (1 << 6) -#define INCA_IP_Switch_CLK_CFG_SE_ID (1 << 5) - +#define INCA_IP_Switch_CLK_CFG_SE_ID (1 << 5) + /***********************************************************************/ /* Module : SSC1 register address and bits */ /***********************************************************************/ - -#define INCA_IP_SSC1 (0xB8000500) -/***********************************************************************/ - -/***Control Register (Programming Mode)***/ +#define INCA_IP_SSC1 (0xB8000500) +/***********************************************************************/ + + +/***Control Register (Programming Mode)***/ #define INCA_IP_SSC1_SCC_CON_PRG ((volatile u32*)(INCA_IP_SSC1+ 0x0010)) #define INCA_IP_SSC1_SCC_CON_PRG_EN (1 << 15) #define INCA_IP_SSC1_SCC_CON_PRG_MS (1 << 14) @@ -748,8 +748,8 @@ #define INCA_IP_SSC1_SCC_CON_PRG_PH (1 << 5) #define INCA_IP_SSC1_SCC_CON_PRG_HB (1 << 4) #define INCA_IP_SSC1_SCC_CON_PRG_BM (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***SCC Control Register (Operating Mode)***/ + +/***SCC Control Register (Operating Mode)***/ #define INCA_IP_SSC1_SCC_CON_OPR ((volatile u32*)(INCA_IP_SSC1+ 0x0010)) #define INCA_IP_SSC1_SCC_CON_OPR_EN (1 << 15) #define INCA_IP_SSC1_SCC_CON_OPR_MS (1 << 14) @@ -759,8 +759,8 @@ #define INCA_IP_SSC1_SCC_CON_OPR_RE (1 << 9) #define INCA_IP_SSC1_SCC_CON_OPR_TE (1 << 8) #define INCA_IP_SSC1_SCC_CON_OPR_BC (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***SSC Write Hardware Modified Control Register***/ + +/***SSC Write Hardware Modified Control Register***/ #define INCA_IP_SSC1_SSC_WHBCON ((volatile u32*)(INCA_IP_SSC1+ 0x0040)) #define INCA_IP_SSC1_SSC_WHBCON_SETBE (1 << 15) #define INCA_IP_SSC1_SSC_WHBCON_SETPE (1 << 14) @@ -770,53 +770,53 @@ #define INCA_IP_SSC1_SSC_WHBCON_CLRPE (1 << 10) #define INCA_IP_SSC1_SSC_WHBCON_CLRRE (1 << 9) #define INCA_IP_SSC1_SSC_WHBCON_CLRTE (1 << 8) - -/***SSC Baudrate Timer Reload Register***/ + +/***SSC Baudrate Timer Reload Register***/ #define INCA_IP_SSC1_SSC_BR ((volatile u32*)(INCA_IP_SSC1+ 0x0014)) #define INCA_IP_SSC1_SSC_BR_BR_VALUE (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***SSC Transmitter Buffer Register***/ + +/***SSC Transmitter Buffer Register***/ #define INCA_IP_SSC1_SSC_TB ((volatile u32*)(INCA_IP_SSC1+ 0x0020)) #define INCA_IP_SSC1_SSC_TB_TB_VALUE (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***SSC Receiver Buffer Register***/ + +/***SSC Receiver Buffer Register***/ #define INCA_IP_SSC1_SSC_RB ((volatile u32*)(INCA_IP_SSC1+ 0x0024)) #define INCA_IP_SSC1_SSC_RB_RB_VALUE (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***SSC Receive FIFO Control Register***/ + +/***SSC Receive FIFO Control Register***/ #define INCA_IP_SSC1_SSC_RXFCON ((volatile u32*)(INCA_IP_SSC1+ 0x0030)) #define INCA_IP_SSC1_SSC_RXFCON_RXFITL (value) (((( 1 << 6) - 1) & (value)) << 8) #define INCA_IP_SSC1_SSC_RXFCON_RXTMEN (1 << 2) #define INCA_IP_SSC1_SSC_RXFCON_RXFLU (1 << 1) #define INCA_IP_SSC1_SSC_RXFCON_RXFEN (1 << 0) - -/***SSC Transmit FIFO Control Register***/ + +/***SSC Transmit FIFO Control Register***/ #define INCA_IP_SSC1_SSC_TXFCON ((volatile u32*)(INCA_IP_SSC1+ 0x0034)) #define INCA_IP_SSC1_SSC_TXFCON_RXFITL (value) (((( 1 << 6) - 1) & (value)) << 8) #define INCA_IP_SSC1_SSC_TXFCON_TXTMEN (1 << 2) #define INCA_IP_SSC1_SSC_TXFCON_TXFLU (1 << 1) #define INCA_IP_SSC1_SSC_TXFCON_TXFEN (1 << 0) - -/***SSC FIFO Status Register***/ + +/***SSC FIFO Status Register***/ #define INCA_IP_SSC1_SSC_FSTAT ((volatile u32*)(INCA_IP_SSC1+ 0x0038)) #define INCA_IP_SSC1_SSC_FSTAT_TXFFL (value) (((( 1 << 6) - 1) & (value)) << 8) #define INCA_IP_SSC1_SSC_FSTAT_RXFFL (value) (((( 1 << 6) - 1) & (value)) << 0) - -/***SSC Clock Control Register***/ + +/***SSC Clock Control Register***/ #define INCA_IP_SSC1_SSC_CLC ((volatile u32*)(INCA_IP_SSC1+ 0x0000)) #define INCA_IP_SSC1_SSC_CLC_RMC (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_SSC1_SSC_CLC_DISS (1 << 1) -#define INCA_IP_SSC1_SSC_CLC_DISR (1 << 0) - +#define INCA_IP_SSC1_SSC_CLC_DISR (1 << 0) + /***********************************************************************/ /* Module : SSC2 register address and bits */ /***********************************************************************/ - -#define INCA_IP_SSC2 (0xB8000600) -/***********************************************************************/ - -/***Control Register (Programming Mode)***/ +#define INCA_IP_SSC2 (0xB8000600) +/***********************************************************************/ + + +/***Control Register (Programming Mode)***/ #define INCA_IP_SSC2_SCC_CON_PRG ((volatile u32*)(INCA_IP_SSC2+ 0x0010)) #define INCA_IP_SSC2_SCC_CON_PRG_EN (1 << 15) #define INCA_IP_SSC2_SCC_CON_PRG_MS (1 << 14) @@ -830,8 +830,8 @@ #define INCA_IP_SSC2_SCC_CON_PRG_PH (1 << 5) #define INCA_IP_SSC2_SCC_CON_PRG_HB (1 << 4) #define INCA_IP_SSC2_SCC_CON_PRG_BM (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***SCC Control Register (Operating Mode)***/ + +/***SCC Control Register (Operating Mode)***/ #define INCA_IP_SSC2_SCC_CON_OPR ((volatile u32*)(INCA_IP_SSC2+ 0x0010)) #define INCA_IP_SSC2_SCC_CON_OPR_EN (1 << 15) #define INCA_IP_SSC2_SCC_CON_OPR_MS (1 << 14) @@ -841,8 +841,8 @@ #define INCA_IP_SSC2_SCC_CON_OPR_RE (1 << 9) #define INCA_IP_SSC2_SCC_CON_OPR_TE (1 << 8) #define INCA_IP_SSC2_SCC_CON_OPR_BC (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***SSC Write Hardware Modified Control Register***/ + +/***SSC Write Hardware Modified Control Register***/ #define INCA_IP_SSC2_SSC_WHBCON ((volatile u32*)(INCA_IP_SSC2+ 0x0040)) #define INCA_IP_SSC2_SSC_WHBCON_SETBE (1 << 15) #define INCA_IP_SSC2_SSC_WHBCON_SETPE (1 << 14) @@ -852,63 +852,63 @@ #define INCA_IP_SSC2_SSC_WHBCON_CLRPE (1 << 10) #define INCA_IP_SSC2_SSC_WHBCON_CLRRE (1 << 9) #define INCA_IP_SSC2_SSC_WHBCON_CLRTE (1 << 8) - -/***SSC Baudrate Timer Reload Register***/ + +/***SSC Baudrate Timer Reload Register***/ #define INCA_IP_SSC2_SSC_BR ((volatile u32*)(INCA_IP_SSC2+ 0x0014)) #define INCA_IP_SSC2_SSC_BR_BR_VALUE (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***SSC Transmitter Buffer Register***/ + +/***SSC Transmitter Buffer Register***/ #define INCA_IP_SSC2_SSC_TB ((volatile u32*)(INCA_IP_SSC2+ 0x0020)) #define INCA_IP_SSC2_SSC_TB_TB_VALUE (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***SSC Receiver Buffer Register***/ + +/***SSC Receiver Buffer Register***/ #define INCA_IP_SSC2_SSC_RB ((volatile u32*)(INCA_IP_SSC2+ 0x0024)) #define INCA_IP_SSC2_SSC_RB_RB_VALUE (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***SSC Receive FIFO Control Register***/ + +/***SSC Receive FIFO Control Register***/ #define INCA_IP_SSC2_SSC_RXFCON ((volatile u32*)(INCA_IP_SSC2+ 0x0030)) #define INCA_IP_SSC2_SSC_RXFCON_RXFITL (value) (((( 1 << 6) - 1) & (value)) << 8) #define INCA_IP_SSC2_SSC_RXFCON_RXTMEN (1 << 2) #define INCA_IP_SSC2_SSC_RXFCON_RXFLU (1 << 1) #define INCA_IP_SSC2_SSC_RXFCON_RXFEN (1 << 0) - -/***SSC Transmit FIFO Control Register***/ + +/***SSC Transmit FIFO Control Register***/ #define INCA_IP_SSC2_SSC_TXFCON ((volatile u32*)(INCA_IP_SSC2+ 0x0034)) #define INCA_IP_SSC2_SSC_TXFCON_RXFITL (value) (((( 1 << 6) - 1) & (value)) << 8) #define INCA_IP_SSC2_SSC_TXFCON_TXTMEN (1 << 2) #define INCA_IP_SSC2_SSC_TXFCON_TXFLU (1 << 1) #define INCA_IP_SSC2_SSC_TXFCON_TXFEN (1 << 0) - -/***SSC FIFO Status Register***/ + +/***SSC FIFO Status Register***/ #define INCA_IP_SSC2_SSC_FSTAT ((volatile u32*)(INCA_IP_SSC2+ 0x0038)) #define INCA_IP_SSC2_SSC_FSTAT_TXFFL (value) (((( 1 << 6) - 1) & (value)) << 8) #define INCA_IP_SSC2_SSC_FSTAT_RXFFL (value) (((( 1 << 6) - 1) & (value)) << 0) - -/***SSC Clock Control Register***/ + +/***SSC Clock Control Register***/ #define INCA_IP_SSC2_SSC_CLC ((volatile u32*)(INCA_IP_SSC2+ 0x0000)) #define INCA_IP_SSC2_SSC_CLC_RMC (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_SSC2_SSC_CLC_DISS (1 << 1) -#define INCA_IP_SSC2_SSC_CLC_DISR (1 << 0) - +#define INCA_IP_SSC2_SSC_CLC_DISR (1 << 0) + /***********************************************************************/ /* Module : EBU register address and bits */ /***********************************************************************/ - + #if defined(CONFIG_INCA_IP) #define INCA_IP_EBU (0xB8000200) #elif defined(CONFIG_PURPLE) #define INCA_IP_EBU (0xB800D800) #endif -/***********************************************************************/ +/***********************************************************************/ - -/***EBU Clock Control Register***/ + +/***EBU Clock Control Register***/ #define INCA_IP_EBU_EBU_CLC ((volatile u32*)(INCA_IP_EBU+ 0x0000)) #define INCA_IP_EBU_EBU_CLC_DISS (1 << 1) #define INCA_IP_EBU_EBU_CLC_DISR (1 << 0) - -/***EBU Global Control Register***/ + +/***EBU Global Control Register***/ #define INCA_IP_EBU_EBU_CON ((volatile u32*)(INCA_IP_EBU+ 0x0010)) #define INCA_IP_EBU_EBU_CON_DTACS (value) (((( 1 << 3) - 1) & (value)) << 20) #define INCA_IP_EBU_EBU_CON_DTARW (value) (((( 1 << 3) - 1) & (value)) << 16) @@ -916,29 +916,29 @@ #define INCA_IP_EBU_EBU_CON_ARBMODE (value) (((( 1 << 2) - 1) & (value)) << 6) #define INCA_IP_EBU_EBU_CON_ARBSYNC (1 << 5) #define INCA_IP_EBU_EBU_CON_1 (1 << 3) - -/***EBU Address Select Register 0***/ + +/***EBU Address Select Register 0***/ #define INCA_IP_EBU_EBU_ADDSEL0 ((volatile u32*)(INCA_IP_EBU+ 0x0020)) #define INCA_IP_EBU_EBU_ADDSEL0_BASE (value) (((( 1 << 20) - 1) & (value)) << 12) #define INCA_IP_EBU_EBU_ADDSEL0_MASK (value) (((( 1 << 4) - 1) & (value)) << 4) #define INCA_IP_EBU_EBU_ADDSEL0_MIRRORE (1 << 1) #define INCA_IP_EBU_EBU_ADDSEL0_REGEN (1 << 0) - -/***EBU Address Select Register 1***/ + +/***EBU Address Select Register 1***/ #define INCA_IP_EBU_EBU_ADDSEL1 ((volatile u32*)(INCA_IP_EBU+ 0x0024)) #define INCA_IP_EBU_EBU_ADDSEL1_BASE (value) (((( 1 << 20) - 1) & (value)) << 12) #define INCA_IP_EBU_EBU_ADDSEL1_MASK (value) (((( 1 << 4) - 1) & (value)) << 4) #define INCA_IP_EBU_EBU_ADDSEL1_MIRRORE (1 << 1) #define INCA_IP_EBU_EBU_ADDSEL1_REGEN (1 << 0) - -/***EBU Address Select Register 2***/ + +/***EBU Address Select Register 2***/ #define INCA_IP_EBU_EBU_ADDSEL2 ((volatile u32*)(INCA_IP_EBU+ 0x0028)) #define INCA_IP_EBU_EBU_ADDSEL2_BASE (value) (((( 1 << 20) - 1) & (value)) << 12) #define INCA_IP_EBU_EBU_ADDSEL2_MASK (value) (((( 1 << 4) - 1) & (value)) << 4) #define INCA_IP_EBU_EBU_ADDSEL2_MIRRORE (1 << 1) #define INCA_IP_EBU_EBU_ADDSEL2_REGEN (1 << 0) - -/***EBU Bus Configuration Register 0***/ + +/***EBU Bus Configuration Register 0***/ #define INCA_IP_EBU_EBU_BUSCON0 ((volatile u32*)(INCA_IP_EBU+ 0x0060)) #define INCA_IP_EBU_EBU_BUSCON0_WRDIS (1 << 31) #define INCA_IP_EBU_EBU_BUSCON0_ALEC (value) (((( 1 << 2) - 1) & (value)) << 29) @@ -954,8 +954,8 @@ #define INCA_IP_EBU_EBU_BUSCON0_HOLDC (value) (((( 1 << 2) - 1) & (value)) << 4) #define INCA_IP_EBU_EBU_BUSCON0_RECOVC (value) (((( 1 << 2) - 1) & (value)) << 2) #define INCA_IP_EBU_EBU_BUSCON0_CMULT (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***EBU Bus Configuration Register 1***/ + +/***EBU Bus Configuration Register 1***/ #define INCA_IP_EBU_EBU_BUSCON1 ((volatile u32*)(INCA_IP_EBU+ 0x0064)) #define INCA_IP_EBU_EBU_BUSCON1_WRDIS (1 << 31) #define INCA_IP_EBU_EBU_BUSCON1_ALEC (value) (((( 1 << 2) - 1) & (value)) << 29) @@ -971,8 +971,8 @@ #define INCA_IP_EBU_EBU_BUSCON1_HOLDC (value) (((( 1 << 2) - 1) & (value)) << 4) #define INCA_IP_EBU_EBU_BUSCON1_RECOVC (value) (((( 1 << 2) - 1) & (value)) << 2) #define INCA_IP_EBU_EBU_BUSCON1_CMULT (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***EBU Bus Configuration Register 2***/ + +/***EBU Bus Configuration Register 2***/ #define INCA_IP_EBU_EBU_BUSCON2 ((volatile u32*)(INCA_IP_EBU+ 0x0068)) #define INCA_IP_EBU_EBU_BUSCON2_WRDIS (1 << 31) #define INCA_IP_EBU_EBU_BUSCON2_ALEC (value) (((( 1 << 2) - 1) & (value)) << 29) @@ -987,28 +987,28 @@ #define INCA_IP_EBU_EBU_BUSCON2_WAITWRC (value) (((( 1 << 3) - 1) & (value)) << 6) #define INCA_IP_EBU_EBU_BUSCON2_HOLDC (value) (((( 1 << 2) - 1) & (value)) << 4) #define INCA_IP_EBU_EBU_BUSCON2_RECOVC (value) (((( 1 << 2) - 1) & (value)) << 2) -#define INCA_IP_EBU_EBU_BUSCON2_CMULT (value) (((( 1 << 2) - 1) & (value)) << 0) - +#define INCA_IP_EBU_EBU_BUSCON2_CMULT (value) (((( 1 << 2) - 1) & (value)) << 0) + /***********************************************************************/ /* Module : SDRAM register address and bits */ /***********************************************************************/ - -#define INCA_IP_SDRAM (0xBF800000) -/***********************************************************************/ - -/***MC Access Error Cause Register***/ +#define INCA_IP_SDRAM (0xBF800000) +/***********************************************************************/ + + +/***MC Access Error Cause Register***/ #define INCA_IP_SDRAM_MC_ERRCAUSE ((volatile u32*)(INCA_IP_SDRAM+ 0x0100)) #define INCA_IP_SDRAM_MC_ERRCAUSE_ERR (1 << 31) #define INCA_IP_SDRAM_MC_ERRCAUSE_PORT (value) (((( 1 << 4) - 1) & (value)) << 16) #define INCA_IP_SDRAM_MC_ERRCAUSE_CAUSE (value) (((( 1 << 2) - 1) & (value)) << 0) #define INCA_IP_SDRAM_MC_ERRCAUSE_Res (value) (((( 1 << NaN) - 1) & (value)) << NaN) - -/***MC Access Error Address Register***/ + +/***MC Access Error Address Register***/ #define INCA_IP_SDRAM_MC_ERRADDR ((volatile u32*)(INCA_IP_SDRAM+ 0x0108)) #define INCA_IP_SDRAM_MC_ERRADDR_ADDR - -/***MC I/O General Purpose Register***/ + +/***MC I/O General Purpose Register***/ #define INCA_IP_SDRAM_MC_IOGP ((volatile u32*)(INCA_IP_SDRAM+ 0x0800)) #define INCA_IP_SDRAM_MC_IOGP_GPR6 (value) (((( 1 << 4) - 1) & (value)) << 28) #define INCA_IP_SDRAM_MC_IOGP_GPR5 (value) (((( 1 << 4) - 1) & (value)) << 24) @@ -1019,39 +1019,39 @@ #define INCA_IP_SDRAM_MC_IOGP_CLKDELAY (value) (((( 1 << 3) - 1) & (value)) << 8) #define INCA_IP_SDRAM_MC_IOGP_CLKRAT (value) (((( 1 << 4) - 1) & (value)) << 4) #define INCA_IP_SDRAM_MC_IOGP_RDDEL (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***MC Self Refresh Register***/ + +/***MC Self Refresh Register***/ #define INCA_IP_SDRAM_MC_SELFRFSH ((volatile u32*)(INCA_IP_SDRAM+ 0x0A00)) #define INCA_IP_SDRAM_MC_SELFRFSH_PWDS (1 << 1) #define INCA_IP_SDRAM_MC_SELFRFSH_PWD (1 << 0) #define INCA_IP_SDRAM_MC_SELFRFSH_Res (value) (((( 1 << 30) - 1) & (value)) << 2) - -/***MC Enable Register***/ + +/***MC Enable Register***/ #define INCA_IP_SDRAM_MC_CTRLENA ((volatile u32*)(INCA_IP_SDRAM+ 0x1000)) #define INCA_IP_SDRAM_MC_CTRLENA_ENA (1 << 0) #define INCA_IP_SDRAM_MC_CTRLENA_Res (value) (((( 1 << 31) - 1) & (value)) << 1) - -/***MC Mode Register Setup Code***/ + +/***MC Mode Register Setup Code***/ #define INCA_IP_SDRAM_MC_MRSCODE ((volatile u32*)(INCA_IP_SDRAM+ 0x1008)) #define INCA_IP_SDRAM_MC_MRSCODE_UMC (value) (((( 1 << 5) - 1) & (value)) << 7) #define INCA_IP_SDRAM_MC_MRSCODE_CL (value) (((( 1 << 3) - 1) & (value)) << 4) #define INCA_IP_SDRAM_MC_MRSCODE_WT (1 << 3) #define INCA_IP_SDRAM_MC_MRSCODE_BL (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***MC Configuration Data-word Width Register***/ + +/***MC Configuration Data-word Width Register***/ #define INCA_IP_SDRAM_MC_CFGDW ((volatile u32*)(INCA_IP_SDRAM+ 0x1010)) #define INCA_IP_SDRAM_MC_CFGDW_DW (value) (((( 1 << 4) - 1) & (value)) << 0) #define INCA_IP_SDRAM_MC_CFGDW_Res (value) (((( 1 << 28) - 1) & (value)) << 4) - -/***MC Configuration Physical Bank 0 Register***/ + +/***MC Configuration Physical Bank 0 Register***/ #define INCA_IP_SDRAM_MC_CFGPB0 ((volatile u32*)(INCA_IP_SDRAM+ 0x1018)) #define INCA_IP_SDRAM_MC_CFGPB0_MCSEN0 (value) (((( 1 << 4) - 1) & (value)) << 12) #define INCA_IP_SDRAM_MC_CFGPB0_BANKN0 (value) (((( 1 << 4) - 1) & (value)) << 8) #define INCA_IP_SDRAM_MC_CFGPB0_ROWW0 (value) (((( 1 << 4) - 1) & (value)) << 4) #define INCA_IP_SDRAM_MC_CFGPB0_COLW0 (value) (((( 1 << 4) - 1) & (value)) << 0) #define INCA_IP_SDRAM_MC_CFGPB0_Res (value) (((( 1 << 16) - 1) & (value)) << 16) - -/***MC Latency Register***/ + +/***MC Latency Register***/ #define INCA_IP_SDRAM_MC_LATENCY ((volatile u32*)(INCA_IP_SDRAM+ 0x1038)) #define INCA_IP_SDRAM_MC_LATENCY_TRP (value) (((( 1 << 4) - 1) & (value)) << 16) #define INCA_IP_SDRAM_MC_LATENCY_TRAS (value) (((( 1 << 4) - 1) & (value)) << 12) @@ -1059,27 +1059,27 @@ #define INCA_IP_SDRAM_MC_LATENCY_TDPL (value) (((( 1 << 4) - 1) & (value)) << 4) #define INCA_IP_SDRAM_MC_LATENCY_TDAL (value) (((( 1 << 4) - 1) & (value)) << 0) #define INCA_IP_SDRAM_MC_LATENCY_Res (value) (((( 1 << 12) - 1) & (value)) << 20) - -/***MC Refresh Cycle Time Register***/ + +/***MC Refresh Cycle Time Register***/ #define INCA_IP_SDRAM_MC_TREFRESH ((volatile u32*)(INCA_IP_SDRAM+ 0x1040)) #define INCA_IP_SDRAM_MC_TREFRESH_TREF (value) (((( 1 << 13) - 1) & (value)) << 0) -#define INCA_IP_SDRAM_MC_TREFRESH_Res (value) (((( 1 << 19) - 1) & (value)) << 13) - +#define INCA_IP_SDRAM_MC_TREFRESH_Res (value) (((( 1 << 19) - 1) & (value)) << 13) + /***********************************************************************/ /* Module : GPTU register address and bits */ /***********************************************************************/ - -#define INCA_IP_GPTU (0xB8000300) -/***********************************************************************/ - -/***GPT Clock Control Register***/ +#define INCA_IP_GPTU (0xB8000300) +/***********************************************************************/ + + +/***GPT Clock Control Register***/ #define INCA_IP_GPTU_GPT_CLC ((volatile u32*)(INCA_IP_GPTU+ 0x0000)) #define INCA_IP_GPTU_GPT_CLC_RMC (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_GPTU_GPT_CLC_DISS (1 << 1) #define INCA_IP_GPTU_GPT_CLC_DISR (1 << 0) - -/***GPT Timer 3 Control Register***/ + +/***GPT Timer 3 Control Register***/ #define INCA_IP_GPTU_GPT_T3CON ((volatile u32*)(INCA_IP_GPTU+ 0x0014)) #define INCA_IP_GPTU_GPT_T3CON_T3RDIR (1 << 15) #define INCA_IP_GPTU_GPT_T3CON_T3CHDIR (1 << 14) @@ -1090,8 +1090,8 @@ #define INCA_IP_GPTU_GPT_T3CON_T3R (1 << 6) #define INCA_IP_GPTU_GPT_T3CON_T3M (value) (((( 1 << 3) - 1) & (value)) << 3) #define INCA_IP_GPTU_GPT_T3CON_T3I (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***GPT Write Hardware Modified Timer 3 Control Register + +/***GPT Write Hardware Modified Timer 3 Control Register If set and clear bit are written concurrently with 1, the associated bit is not changed.***/ #define INCA_IP_GPTU_GPT_WHBT3CON ((volatile u32*)(INCA_IP_GPTU+ 0x004C)) #define INCA_IP_GPTU_GPT_WHBT3CON_SETT3CHDIR (1 << 15) @@ -1100,8 +1100,8 @@ #define INCA_IP_GPTU_GPT_WHBT3CON_CLRT3EDGE (1 << 12) #define INCA_IP_GPTU_GPT_WHBT3CON_SETT3OTL (1 << 11) #define INCA_IP_GPTU_GPT_WHBT3CON_CLRT3OTL (1 << 10) - -/***GPT Timer 2 Control Register***/ + +/***GPT Timer 2 Control Register***/ #define INCA_IP_GPTU_GPT_T2CON ((volatile u32*)(INCA_IP_GPTU+ 0x0010)) #define INCA_IP_GPTU_GPT_T2CON_TxRDIR (1 << 15) #define INCA_IP_GPTU_GPT_T2CON_TxCHDIR (1 << 14) @@ -1112,8 +1112,8 @@ #define INCA_IP_GPTU_GPT_T2CON_TxR (1 << 6) #define INCA_IP_GPTU_GPT_T2CON_TxM (value) (((( 1 << 3) - 1) & (value)) << 3) #define INCA_IP_GPTU_GPT_T2CON_TxI (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***GPT Timer 4 Control Register***/ + +/***GPT Timer 4 Control Register***/ #define INCA_IP_GPTU_GPT_T4CON ((volatile u32*)(INCA_IP_GPTU+ 0x0018)) #define INCA_IP_GPTU_GPT_T4CON_TxRDIR (1 << 15) #define INCA_IP_GPTU_GPT_T4CON_TxCHDIR (1 << 14) @@ -1124,7 +1124,7 @@ #define INCA_IP_GPTU_GPT_T4CON_TxR (1 << 6) #define INCA_IP_GPTU_GPT_T4CON_TxM (value) (((( 1 << 3) - 1) & (value)) << 3) #define INCA_IP_GPTU_GPT_T4CON_TxI (value) (((( 1 << 3) - 1) & (value)) << 0) - + /***GPT Write HW Modified Timer 2 Control Register If set and clear bit are written concurrently with 1, the associated bit is not changed.***/ #define INCA_IP_GPTU_GPT_WHBT2CON ((volatile u32*)(INCA_IP_GPTU+ 0x0048)) @@ -1132,7 +1132,7 @@ #define INCA_IP_GPTU_GPT_WHBT2CON_CLRTxCHDIR (1 << 14) #define INCA_IP_GPTU_GPT_WHBT2CON_SETTxEDGE (1 << 13) #define INCA_IP_GPTU_GPT_WHBT2CON_CLRTxEDGE (1 << 12) - + /***GPT Write HW Modified Timer 4 Control Register If set and clear bit are written concurrently with 1, the associated bit is not changed.***/ #define INCA_IP_GPTU_GPT_WHBT4CON ((volatile u32*)(INCA_IP_GPTU+ 0x0050)) @@ -1140,32 +1140,32 @@ #define INCA_IP_GPTU_GPT_WHBT4CON_CLRTxCHDIR (1 << 14) #define INCA_IP_GPTU_GPT_WHBT4CON_SETTxEDGE (1 << 13) #define INCA_IP_GPTU_GPT_WHBT4CON_CLRTxEDGE (1 << 12) - -/***GPT Capture Reload Register***/ + +/***GPT Capture Reload Register***/ #define INCA_IP_GPTU_GPT_CAPREL ((volatile u32*)(INCA_IP_GPTU+ 0x0030)) #define INCA_IP_GPTU_GPT_CAPREL_CAPREL (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***GPT Timer 2 Register***/ + +/***GPT Timer 2 Register***/ #define INCA_IP_GPTU_GPT_T2 ((volatile u32*)(INCA_IP_GPTU+ 0x0034)) #define INCA_IP_GPTU_GPT_T2_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***GPT Timer 3 Register***/ + +/***GPT Timer 3 Register***/ #define INCA_IP_GPTU_GPT_T3 ((volatile u32*)(INCA_IP_GPTU+ 0x0038)) #define INCA_IP_GPTU_GPT_T3_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***GPT Timer 4 Register***/ + +/***GPT Timer 4 Register***/ #define INCA_IP_GPTU_GPT_T4 ((volatile u32*)(INCA_IP_GPTU+ 0x003C)) #define INCA_IP_GPTU_GPT_T4_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***GPT Timer 5 Register***/ + +/***GPT Timer 5 Register***/ #define INCA_IP_GPTU_GPT_T5 ((volatile u32*)(INCA_IP_GPTU+ 0x0040)) #define INCA_IP_GPTU_GPT_T5_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***GPT Timer 6 Register***/ + +/***GPT Timer 6 Register***/ #define INCA_IP_GPTU_GPT_T6 ((volatile u32*)(INCA_IP_GPTU+ 0x0044)) #define INCA_IP_GPTU_GPT_T6_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***GPT Timer 6 Control Register***/ + +/***GPT Timer 6 Control Register***/ #define INCA_IP_GPTU_GPT_T6CON ((volatile u32*)(INCA_IP_GPTU+ 0x0020)) #define INCA_IP_GPTU_GPT_T6CON_T6SR (1 << 15) #define INCA_IP_GPTU_GPT_T6CON_T6CLR (1 << 14) @@ -1175,14 +1175,14 @@ #define INCA_IP_GPTU_GPT_T6CON_T6R (1 << 6) #define INCA_IP_GPTU_GPT_T6CON_T6M (value) (((( 1 << 3) - 1) & (value)) << 3) #define INCA_IP_GPTU_GPT_T6CON_T6I (value) (((( 1 << 3) - 1) & (value)) << 0) - + /***GPT Write HW Modified Timer 6 Control Register If set and clear bit are written concurrently with 1, the associated bit is not changed.***/ #define INCA_IP_GPTU_GPT_WHBT6CON ((volatile u32*)(INCA_IP_GPTU+ 0x0054)) #define INCA_IP_GPTU_GPT_WHBT6CON_SETT6OTL (1 << 11) #define INCA_IP_GPTU_GPT_WHBT6CON_CLRT6OTL (1 << 10) - -/***GPT Timer 5 Control Register***/ + +/***GPT Timer 5 Control Register***/ #define INCA_IP_GPTU_GPT_T5CON ((volatile u32*)(INCA_IP_GPTU+ 0x001C)) #define INCA_IP_GPTU_GPT_T5CON_T5SC (1 << 15) #define INCA_IP_GPTU_GPT_T5CON_T5CLR (1 << 14) @@ -1194,25 +1194,25 @@ #define INCA_IP_GPTU_GPT_T5CON_T5UD (1 << 7) #define INCA_IP_GPTU_GPT_T5CON_T5R (1 << 6) #define INCA_IP_GPTU_GPT_T5CON_T5M (value) (((( 1 << 3) - 1) & (value)) << 3) -#define INCA_IP_GPTU_GPT_T5CON_T5I (value) (((( 1 << 3) - 1) & (value)) << 0) - +#define INCA_IP_GPTU_GPT_T5CON_T5I (value) (((( 1 << 3) - 1) & (value)) << 0) + /***********************************************************************/ /* Module : IOM register address and bits */ /***********************************************************************/ - -#define INCA_IP_IOM (0xBF105000) -/***********************************************************************/ - -/***Receive FIFO***/ +#define INCA_IP_IOM (0xBF105000) +/***********************************************************************/ + + +/***Receive FIFO***/ #define INCA_IP_IOM_RFIFO ((volatile u32*)(INCA_IP_IOM+ 0x0000)) #define INCA_IP_IOM_RFIFO_RXD (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***Transmit FIFO***/ + +/***Transmit FIFO***/ #define INCA_IP_IOM_XFIFO ((volatile u32*)(INCA_IP_IOM+ 0x0000)) #define INCA_IP_IOM_XFIFO_TXD (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***Interrupt Status Register HDLC***/ + +/***Interrupt Status Register HDLC***/ #define INCA_IP_IOM_ISTAH ((volatile u32*)(INCA_IP_IOM+ 0x0080)) #define INCA_IP_IOM_ISTAH_RME (1 << 7) #define INCA_IP_IOM_ISTAH_RPF (1 << 6) @@ -1220,8 +1220,8 @@ #define INCA_IP_IOM_ISTAH_XPR (1 << 4) #define INCA_IP_IOM_ISTAH_XMR (1 << 3) #define INCA_IP_IOM_ISTAH_XDU (1 << 2) - -/***Interrupt Mask Register HDLC***/ + +/***Interrupt Mask Register HDLC***/ #define INCA_IP_IOM_MASKH ((volatile u32*)(INCA_IP_IOM+ 0x0080)) #define INCA_IP_IOM_MASKH_RME (1 << 7) #define INCA_IP_IOM_MASKH_RPF (1 << 6) @@ -1229,23 +1229,23 @@ #define INCA_IP_IOM_MASKH_XPR (1 << 4) #define INCA_IP_IOM_MASKH_XMR (1 << 3) #define INCA_IP_IOM_MASKH_XDU (1 << 2) - -/***Status Register***/ + +/***Status Register***/ #define INCA_IP_IOM_STAR ((volatile u32*)(INCA_IP_IOM+ 0x0084)) #define INCA_IP_IOM_STAR_XDOV (1 << 7) #define INCA_IP_IOM_STAR_XFW (1 << 6) #define INCA_IP_IOM_STAR_RACI (1 << 3) #define INCA_IP_IOM_STAR_XACI (1 << 1) - -/***Command Register***/ + +/***Command Register***/ #define INCA_IP_IOM_CMDR ((volatile u32*)(INCA_IP_IOM+ 0x0084)) #define INCA_IP_IOM_CMDR_RMC (1 << 7) #define INCA_IP_IOM_CMDR_RRES (1 << 6) #define INCA_IP_IOM_CMDR_XTF (1 << 3) #define INCA_IP_IOM_CMDR_XME (1 << 1) #define INCA_IP_IOM_CMDR_XRES (1 << 0) - -/***Mode Register***/ + +/***Mode Register***/ #define INCA_IP_IOM_MODEH ((volatile u32*)(INCA_IP_IOM+ 0x0088)) #define INCA_IP_IOM_MODEH_MDS2 (1 << 7) #define INCA_IP_IOM_MODEH_MDS1 (1 << 6) @@ -1254,8 +1254,8 @@ #define INCA_IP_IOM_MODEH_DIM2 (1 << 2) #define INCA_IP_IOM_MODEH_DIM1 (1 << 1) #define INCA_IP_IOM_MODEH_DIM0 (1 << 0) - -/***Extended Mode Register***/ + +/***Extended Mode Register***/ #define INCA_IP_IOM_EXMR ((volatile u32*)(INCA_IP_IOM+ 0x008C)) #define INCA_IP_IOM_EXMR_XFBS (1 << 7) #define INCA_IP_IOM_EXMR_RFBS (value) (((( 1 << 2) - 1) & (value)) << 5) @@ -1263,36 +1263,36 @@ #define INCA_IP_IOM_EXMR_XCRC (1 << 3) #define INCA_IP_IOM_EXMR_RCRC (1 << 2) #define INCA_IP_IOM_EXMR_ITF (1 << 0) - -/***SAPI1 Register***/ + +/***SAPI1 Register***/ #define INCA_IP_IOM_SAP1 ((volatile u32*)(INCA_IP_IOM+ 0x0094)) #define INCA_IP_IOM_SAP1_SAPI1 (value) (((( 1 << 6) - 1) & (value)) << 2) #define INCA_IP_IOM_SAP1_MHA (1 << 0) - -/***Receive Frame Byte Count Low***/ + +/***Receive Frame Byte Count Low***/ #define INCA_IP_IOM_RBCL ((volatile u32*)(INCA_IP_IOM+ 0x0098)) #define INCA_IP_IOM_RBCL_RBC(value) (1 << value) - - -/***SAPI2 Register***/ + + +/***SAPI2 Register***/ #define INCA_IP_IOM_SAP2 ((volatile u32*)(INCA_IP_IOM+ 0x0098)) #define INCA_IP_IOM_SAP2_SAPI2 (value) (((( 1 << 6) - 1) & (value)) << 2) #define INCA_IP_IOM_SAP2_MLA (1 << 0) - -/***Receive Frame Byte Count High***/ + +/***Receive Frame Byte Count High***/ #define INCA_IP_IOM_RBCH ((volatile u32*)(INCA_IP_IOM+ 0x009C)) #define INCA_IP_IOM_RBCH_OV (1 << 4) #define INCA_IP_IOM_RBCH_RBC11 (1 << 3) #define INCA_IP_IOM_RBCH_RBC10 (1 << 2) #define INCA_IP_IOM_RBCH_RBC9 (1 << 1) #define INCA_IP_IOM_RBCH_RBC8 (1 << 0) - -/***TEI1 Register 1***/ + +/***TEI1 Register 1***/ #define INCA_IP_IOM_TEI1 ((volatile u32*)(INCA_IP_IOM+ 0x009C)) #define INCA_IP_IOM_TEI1_TEI1 (value) (((( 1 << 7) - 1) & (value)) << 1) #define INCA_IP_IOM_TEI1_EA (1 << 0) - -/***Receive Status Register***/ + +/***Receive Status Register***/ #define INCA_IP_IOM_RSTA ((volatile u32*)(INCA_IP_IOM+ 0x00A0)) #define INCA_IP_IOM_RSTA_VFR (1 << 7) #define INCA_IP_IOM_RSTA_RDO (1 << 6) @@ -1302,99 +1302,99 @@ #define INCA_IP_IOM_RSTA_SA0 (1 << 2) #define INCA_IP_IOM_RSTA_TA (1 << 0) #define INCA_IP_IOM_RSTA_CR (1 << 1) - -/***TEI2 Register***/ + +/***TEI2 Register***/ #define INCA_IP_IOM_TEI2 ((volatile u32*)(INCA_IP_IOM+ 0x00A0)) #define INCA_IP_IOM_TEI2_TEI2 (value) (((( 1 << 7) - 1) & (value)) << 1) #define INCA_IP_IOM_TEI2_EA (1 << 0) - -/***Test Mode Register HDLC***/ + +/***Test Mode Register HDLC***/ #define INCA_IP_IOM_TMH ((volatile u32*)(INCA_IP_IOM+ 0x00A4)) #define INCA_IP_IOM_TMH_TLP (1 << 0) - -/***Command/Indication Receive 0***/ + +/***Command/Indication Receive 0***/ #define INCA_IP_IOM_CIR0 ((volatile u32*)(INCA_IP_IOM+ 0x00B8)) #define INCA_IP_IOM_CIR0_CODR0 (value) (((( 1 << 4) - 1) & (value)) << 4) #define INCA_IP_IOM_CIR0_CIC0 (1 << 3) #define INCA_IP_IOM_CIR0_CIC1 (1 << 2) #define INCA_IP_IOM_CIR0_SG (1 << 1) #define INCA_IP_IOM_CIR0_BAS (1 << 0) - -/***Command/Indication Transmit 0***/ + +/***Command/Indication Transmit 0***/ #define INCA_IP_IOM_CIX0 ((volatile u32*)(INCA_IP_IOM+ 0x00B8)) #define INCA_IP_IOM_CIX0_CODX0 (value) (((( 1 << 4) - 1) & (value)) << 4) #define INCA_IP_IOM_CIX0_TBA2 (1 << 3) #define INCA_IP_IOM_CIX0_TBA1 (1 << 2) #define INCA_IP_IOM_CIX0_TBA0 (1 << 1) #define INCA_IP_IOM_CIX0_BAC (1 << 0) - -/***Command/Indication Receive 1***/ + +/***Command/Indication Receive 1***/ #define INCA_IP_IOM_CIR1 ((volatile u32*)(INCA_IP_IOM+ 0x00BC)) #define INCA_IP_IOM_CIR1_CODR1 (value) (((( 1 << 6) - 1) & (value)) << 2) - -/***Command/Indication Transmit 1***/ + +/***Command/Indication Transmit 1***/ #define INCA_IP_IOM_CIX1 ((volatile u32*)(INCA_IP_IOM+ 0x00BC)) #define INCA_IP_IOM_CIX1_CODX1 (value) (((( 1 << 6) - 1) & (value)) << 2) #define INCA_IP_IOM_CIX1_CICW (1 << 1) #define INCA_IP_IOM_CIX1_CI1E (1 << 0) - -/***Controller Data Access Reg. (CH10)***/ + +/***Controller Data Access Reg. (CH10)***/ #define INCA_IP_IOM_CDA10 ((volatile u32*)(INCA_IP_IOM+ 0x0100)) #define INCA_IP_IOM_CDA10_CDA (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***Controller Data Access Reg. (CH11)***/ + +/***Controller Data Access Reg. (CH11)***/ #define INCA_IP_IOM_CDA11 ((volatile u32*)(INCA_IP_IOM+ 0x0104)) #define INCA_IP_IOM_CDA11_CDA (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***Controller Data Access Reg. (CH20)***/ + +/***Controller Data Access Reg. (CH20)***/ #define INCA_IP_IOM_CDA20 ((volatile u32*)(INCA_IP_IOM+ 0x0108)) #define INCA_IP_IOM_CDA20_CDA (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***Controller Data Access Reg. (CH21)***/ + +/***Controller Data Access Reg. (CH21)***/ #define INCA_IP_IOM_CDA21 ((volatile u32*)(INCA_IP_IOM+ 0x010C)) #define INCA_IP_IOM_CDA21_CDA (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***Time Slot and Data Port Sel. (CH10)***/ + +/***Time Slot and Data Port Sel. (CH10)***/ #define INCA_IP_IOM_CDA_TSDP10 ((volatile u32*)(INCA_IP_IOM+ 0x0110)) #define INCA_IP_IOM_CDA_TSDP10_DPS (1 << 7) #define INCA_IP_IOM_CDA_TSDP10_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Time Slot and Data Port Sel. (CH11)***/ + +/***Time Slot and Data Port Sel. (CH11)***/ #define INCA_IP_IOM_CDA_TSDP11 ((volatile u32*)(INCA_IP_IOM+ 0x0114)) #define INCA_IP_IOM_CDA_TSDP11_DPS (1 << 7) #define INCA_IP_IOM_CDA_TSDP11_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Time Slot and Data Port Sel. (CH20)***/ + +/***Time Slot and Data Port Sel. (CH20)***/ #define INCA_IP_IOM_CDA_TSDP20 ((volatile u32*)(INCA_IP_IOM+ 0x0118)) #define INCA_IP_IOM_CDA_TSDP20_DPS (1 << 7) #define INCA_IP_IOM_CDA_TSDP20_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Time Slot and Data Port Sel. (CH21)***/ + +/***Time Slot and Data Port Sel. (CH21)***/ #define INCA_IP_IOM_CDA_TSDP21 ((volatile u32*)(INCA_IP_IOM+ 0x011C)) #define INCA_IP_IOM_CDA_TSDP21_DPS (1 << 7) #define INCA_IP_IOM_CDA_TSDP21_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Time Slot and Data Port Sel. (CH10)***/ + +/***Time Slot and Data Port Sel. (CH10)***/ #define INCA_IP_IOM_CO_TSDP10 ((volatile u32*)(INCA_IP_IOM+ 0x0120)) #define INCA_IP_IOM_CO_TSDP10_DPS (1 << 7) #define INCA_IP_IOM_CO_TSDP10_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Time Slot and Data Port Sel. (CH11)***/ + +/***Time Slot and Data Port Sel. (CH11)***/ #define INCA_IP_IOM_CO_TSDP11 ((volatile u32*)(INCA_IP_IOM+ 0x0124)) #define INCA_IP_IOM_CO_TSDP11_DPS (1 << 7) #define INCA_IP_IOM_CO_TSDP11_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Time Slot and Data Port Sel. (CH20)***/ + +/***Time Slot and Data Port Sel. (CH20)***/ #define INCA_IP_IOM_CO_TSDP20 ((volatile u32*)(INCA_IP_IOM+ 0x0128)) #define INCA_IP_IOM_CO_TSDP20_DPS (1 << 7) #define INCA_IP_IOM_CO_TSDP20_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Time Slot and Data Port Sel. (CH21)***/ + +/***Time Slot and Data Port Sel. (CH21)***/ #define INCA_IP_IOM_CO_TSDP21 ((volatile u32*)(INCA_IP_IOM+ 0x012C)) #define INCA_IP_IOM_CO_TSDP21_DPS (1 << 7) #define INCA_IP_IOM_CO_TSDP21_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Ctrl. Reg. Contr. Data Access CH1x***/ + +/***Ctrl. Reg. Contr. Data Access CH1x***/ #define INCA_IP_IOM_CDA1_CR ((volatile u32*)(INCA_IP_IOM+ 0x0138)) #define INCA_IP_IOM_CDA1_CR_EN_TBM (1 << 5) #define INCA_IP_IOM_CDA1_CR_EN_I1 (1 << 4) @@ -1402,8 +1402,8 @@ #define INCA_IP_IOM_CDA1_CR_EN_O1 (1 << 2) #define INCA_IP_IOM_CDA1_CR_EN_O0 (1 << 1) #define INCA_IP_IOM_CDA1_CR_SWAP (1 << 0) - -/***Ctrl. Reg. Contr. Data Access CH1x***/ + +/***Ctrl. Reg. Contr. Data Access CH1x***/ #define INCA_IP_IOM_CDA2_CR ((volatile u32*)(INCA_IP_IOM+ 0x013C)) #define INCA_IP_IOM_CDA2_CR_EN_TBM (1 << 5) #define INCA_IP_IOM_CDA2_CR_EN_I1 (1 << 4) @@ -1411,37 +1411,37 @@ #define INCA_IP_IOM_CDA2_CR_EN_O1 (1 << 2) #define INCA_IP_IOM_CDA2_CR_EN_O0 (1 << 1) #define INCA_IP_IOM_CDA2_CR_SWAP (1 << 0) - -/***Control Register B-Channel Data***/ + +/***Control Register B-Channel Data***/ #define INCA_IP_IOM_BCHA_CR ((volatile u32*)(INCA_IP_IOM+ 0x0144)) #define INCA_IP_IOM_BCHA_CR_EN_BC2 (1 << 4) #define INCA_IP_IOM_BCHA_CR_EN_BC1 (1 << 3) - -/***Control Register B-Channel Data***/ + +/***Control Register B-Channel Data***/ #define INCA_IP_IOM_BCHB_CR ((volatile u32*)(INCA_IP_IOM+ 0x0148)) #define INCA_IP_IOM_BCHB_CR_EN_BC2 (1 << 4) #define INCA_IP_IOM_BCHB_CR_EN_BC1 (1 << 3) - -/***Control Reg. for HDLC and CI1 Data***/ + +/***Control Reg. for HDLC and CI1 Data***/ #define INCA_IP_IOM_DCI_CR ((volatile u32*)(INCA_IP_IOM+ 0x014C)) #define INCA_IP_IOM_DCI_CR_DPS_CI1 (1 << 7) #define INCA_IP_IOM_DCI_CR_EN_CI1 (1 << 6) #define INCA_IP_IOM_DCI_CR_EN_D (1 << 5) - -/***Control Reg. for HDLC and CI1 Data***/ + +/***Control Reg. for HDLC and CI1 Data***/ #define INCA_IP_IOM_DCIC_CR ((volatile u32*)(INCA_IP_IOM+ 0x014C)) #define INCA_IP_IOM_DCIC_CR_DPS_CI0 (1 << 7) #define INCA_IP_IOM_DCIC_CR_EN_CI0 (1 << 6) #define INCA_IP_IOM_DCIC_CR_DPS_D (1 << 5) - -/***Control Reg. Serial Data Strobe x***/ + +/***Control Reg. Serial Data Strobe x***/ #define INCA_IP_IOM_SDS_CR ((volatile u32*)(INCA_IP_IOM+ 0x0154)) #define INCA_IP_IOM_SDS_CR_ENS_TSS (1 << 7) #define INCA_IP_IOM_SDS_CR_ENS_TSS_1 (1 << 6) #define INCA_IP_IOM_SDS_CR_ENS_TSS_3 (1 << 5) #define INCA_IP_IOM_SDS_CR_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Control Register IOM Data***/ + +/***Control Register IOM Data***/ #define INCA_IP_IOM_IOM_CR ((volatile u32*)(INCA_IP_IOM+ 0x015C)) #define INCA_IP_IOM_IOM_CR_SPU (1 << 7) #define INCA_IP_IOM_IOM_CR_CI_CS (1 << 5) @@ -1450,8 +1450,8 @@ #define INCA_IP_IOM_IOM_CR_CLKM (1 << 2) #define INCA_IP_IOM_IOM_CR_Res (1 << 1) #define INCA_IP_IOM_IOM_CR_DIS_IOM (1 << 0) - -/***Synchronous Transfer Interrupt***/ + +/***Synchronous Transfer Interrupt***/ #define INCA_IP_IOM_STI ((volatile u32*)(INCA_IP_IOM+ 0x0160)) #define INCA_IP_IOM_STI_STOV21 (1 << 7) #define INCA_IP_IOM_STI_STOV20 (1 << 6) @@ -1461,15 +1461,15 @@ #define INCA_IP_IOM_STI_STI20 (1 << 2) #define INCA_IP_IOM_STI_STI11 (1 << 1) #define INCA_IP_IOM_STI_STI10 (1 << 0) - -/***Acknowledge Synchronous Transfer Interrupt***/ + +/***Acknowledge Synchronous Transfer Interrupt***/ #define INCA_IP_IOM_ASTI ((volatile u32*)(INCA_IP_IOM+ 0x0160)) #define INCA_IP_IOM_ASTI_ACK21 (1 << 3) #define INCA_IP_IOM_ASTI_ACK20 (1 << 2) #define INCA_IP_IOM_ASTI_ACK11 (1 << 1) #define INCA_IP_IOM_ASTI_ACK10 (1 << 0) - -/***Mask Synchronous Transfer Interrupt***/ + +/***Mask Synchronous Transfer Interrupt***/ #define INCA_IP_IOM_MSTI ((volatile u32*)(INCA_IP_IOM+ 0x0164)) #define INCA_IP_IOM_MSTI_STOV21 (1 << 7) #define INCA_IP_IOM_MSTI_STOV20 (1 << 6) @@ -1479,36 +1479,36 @@ #define INCA_IP_IOM_MSTI_STI20 (1 << 2) #define INCA_IP_IOM_MSTI_STI11 (1 << 1) #define INCA_IP_IOM_MSTI_STI10 (1 << 0) - -/***Configuration Register for Serial Data Strobes***/ + +/***Configuration Register for Serial Data Strobes***/ #define INCA_IP_IOM_SDS_CONF ((volatile u32*)(INCA_IP_IOM+ 0x0168)) #define INCA_IP_IOM_SDS_CONF_SDS_BCL (1 << 0) - -/***Monitoring CDA Bits***/ + +/***Monitoring CDA Bits***/ #define INCA_IP_IOM_MCDA ((volatile u32*)(INCA_IP_IOM+ 0x016C)) #define INCA_IP_IOM_MCDA_MCDA21 (value) (((( 1 << 2) - 1) & (value)) << 6) #define INCA_IP_IOM_MCDA_MCDA20 (value) (((( 1 << 2) - 1) & (value)) << 4) #define INCA_IP_IOM_MCDA_MCDA11 (value) (((( 1 << 2) - 1) & (value)) << 2) -#define INCA_IP_IOM_MCDA_MCDA10 (value) (((( 1 << 2) - 1) & (value)) << 0) - +#define INCA_IP_IOM_MCDA_MCDA10 (value) (((( 1 << 2) - 1) & (value)) << 0) + /***********************************************************************/ /* Module : ASC register address and bits */ /***********************************************************************/ - + #if defined(CONFIG_INCA_IP) #define INCA_IP_ASC (0xB8000400) #elif defined(CONFIG_PURPLE) #define INCA_IP_ASC (0xBE500000) #endif -/***********************************************************************/ +/***********************************************************************/ - -/***ASC Port Input Select Register***/ + +/***ASC Port Input Select Register***/ #define INCA_IP_ASC_ASC_PISEL ((volatile u32*)(INCA_IP_ASC+ 0x0004)) #define INCA_IP_ASC_ASC_PISEL_RIS (1 << 0) - -/***ASC Control Register***/ + +/***ASC Control Register***/ #define INCA_IP_ASC_ASC_CON ((volatile u32*)(INCA_IP_ASC+ 0x0010)) #define INCA_IP_ASC_ASC_CON_R (1 << 15) #define INCA_IP_ASC_ASC_CON_LB (1 << 14) @@ -1524,8 +1524,8 @@ #define INCA_IP_ASC_ASC_CON_REN (1 << 4) #define INCA_IP_ASC_ASC_CON_STP (1 << 3) #define INCA_IP_ASC_ASC_CON_M (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***ASC Write Hardware Modified Control Register***/ + +/***ASC Write Hardware Modified Control Register***/ #define INCA_IP_ASC_ASC_WHBCON ((volatile u32*)(INCA_IP_ASC+ 0x0050)) #define INCA_IP_ASC_ASC_WHBCON_SETOE (1 << 13) #define INCA_IP_ASC_ASC_WHBCON_SETFE (1 << 12) @@ -1535,29 +1535,29 @@ #define INCA_IP_ASC_ASC_WHBCON_CLRPE (1 << 8) #define INCA_IP_ASC_ASC_WHBCON_SETREN (1 << 5) #define INCA_IP_ASC_ASC_WHBCON_CLRREN (1 << 4) - -/***ASC Baudrate Timer/Reload Register***/ + +/***ASC Baudrate Timer/Reload Register***/ #define INCA_IP_ASC_ASC_BTR ((volatile u32*)(INCA_IP_ASC+ 0x0014)) #define INCA_IP_ASC_ASC_BTR_BR_VALUE (value) (((( 1 << 13) - 1) & (value)) << 0) - -/***ASC Fractional Divider Register***/ + +/***ASC Fractional Divider Register***/ #define INCA_IP_ASC_ASC_FDV ((volatile u32*)(INCA_IP_ASC+ 0x0018)) #define INCA_IP_ASC_ASC_FDV_FD_VALUE (value) (((( 1 << 9) - 1) & (value)) << 0) - -/***ASC IrDA Pulse Mode/Width Register***/ + +/***ASC IrDA Pulse Mode/Width Register***/ #define INCA_IP_ASC_ASC_PMW ((volatile u32*)(INCA_IP_ASC+ 0x001C)) #define INCA_IP_ASC_ASC_PMW_IRPW (1 << 8) #define INCA_IP_ASC_ASC_PMW_PW_VALUE (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***ASC Transmit Buffer Register***/ + +/***ASC Transmit Buffer Register***/ #define INCA_IP_ASC_ASC_TBUF ((volatile u32*)(INCA_IP_ASC+ 0x0020)) #define INCA_IP_ASC_ASC_TBUF_TD_VALUE (value) (((( 1 << 9) - 1) & (value)) << 0) - -/***ASC Receive Buffer Register***/ + +/***ASC Receive Buffer Register***/ #define INCA_IP_ASC_ASC_RBUF ((volatile u32*)(INCA_IP_ASC+ 0x0024)) #define INCA_IP_ASC_ASC_RBUF_RD_VALUE (value) (((( 1 << 9) - 1) & (value)) << 0) - -/***ASC Autobaud Control Register***/ + +/***ASC Autobaud Control Register***/ #define INCA_IP_ASC_ASC_ABCON ((volatile u32*)(INCA_IP_ASC+ 0x0030)) #define INCA_IP_ASC_ASC_ABCON_RXINV (1 << 11) #define INCA_IP_ASC_ASC_ABCON_TXINV (1 << 10) @@ -1567,40 +1567,40 @@ #define INCA_IP_ASC_ASC_ABCON_ABSTEN (1 << 2) #define INCA_IP_ASC_ASC_ABCON_AUREN (1 << 1) #define INCA_IP_ASC_ASC_ABCON_ABEN (1 << 0) - -/***Receive FIFO Control Register***/ + +/***Receive FIFO Control Register***/ #define INCA_IP_ASC_RXFCON ((volatile u32*)(INCA_IP_ASC+ 0x0040)) #define INCA_IP_ASC_RXFCON_RXFITL (value) (((( 1 << 6) - 1) & (value)) << 8) #define INCA_IP_ASC_RXFCON_RXTMEN (1 << 2) #define INCA_IP_ASC_RXFCON_RXFFLU (1 << 1) #define INCA_IP_ASC_RXFCON_RXFEN (1 << 0) - -/***Transmit FIFO Control Register***/ + +/***Transmit FIFO Control Register***/ #define INCA_IP_ASC_TXFCON ((volatile u32*)(INCA_IP_ASC+ 0x0044)) #define INCA_IP_ASC_TXFCON_TXFITL (value) (((( 1 << 6) - 1) & (value)) << 8) #define INCA_IP_ASC_TXFCON_TXTMEN (1 << 2) #define INCA_IP_ASC_TXFCON_TXFFLU (1 << 1) #define INCA_IP_ASC_TXFCON_TXFEN (1 << 0) - -/***FIFO Status Register***/ + +/***FIFO Status Register***/ #define INCA_IP_ASC_FSTAT ((volatile u32*)(INCA_IP_ASC+ 0x0048)) #define INCA_IP_ASC_FSTAT_TXFFL (value) (((( 1 << 6) - 1) & (value)) << 8) #define INCA_IP_ASC_FSTAT_RXFFL (value) (((( 1 << 6) - 1) & (value)) << 0) - -/***ASC Write HW Modified Autobaud Control Register***/ + +/***ASC Write HW Modified Autobaud Control Register***/ #define INCA_IP_ASC_ASC_WHBABCON ((volatile u32*)(INCA_IP_ASC+ 0x0054)) #define INCA_IP_ASC_ASC_WHBABCON_SETABEN (1 << 1) #define INCA_IP_ASC_ASC_WHBABCON_CLRABEN (1 << 0) - -/***ASC Autobaud Status Register***/ + +/***ASC Autobaud Status Register***/ #define INCA_IP_ASC_ASC_ABSTAT ((volatile u32*)(INCA_IP_ASC+ 0x0034)) #define INCA_IP_ASC_ASC_ABSTAT_DETWAIT (1 << 4) #define INCA_IP_ASC_ASC_ABSTAT_SCCDET (1 << 3) #define INCA_IP_ASC_ASC_ABSTAT_SCSDET (1 << 2) #define INCA_IP_ASC_ASC_ABSTAT_FCCDET (1 << 1) #define INCA_IP_ASC_ASC_ABSTAT_FCSDET (1 << 0) - -/***ASC Write HW Modified Autobaud Status Register***/ + +/***ASC Write HW Modified Autobaud Status Register***/ #define INCA_IP_ASC_ASC_WHBABSTAT ((volatile u32*)(INCA_IP_ASC+ 0x0058)) #define INCA_IP_ASC_ASC_WHBABSTAT_SETDETWAIT (1 << 9) #define INCA_IP_ASC_ASC_WHBABSTAT_CLRDETWAIT (1 << 8) @@ -1612,86 +1612,86 @@ #define INCA_IP_ASC_ASC_WHBABSTAT_CLRFCCDET (1 << 2) #define INCA_IP_ASC_ASC_WHBABSTAT_SETFCSDET (1 << 1) #define INCA_IP_ASC_ASC_WHBABSTAT_CLRFCSDET (1 << 0) - -/***ASC Clock Control Register***/ + +/***ASC Clock Control Register***/ #define INCA_IP_ASC_ASC_CLC ((volatile u32*)(INCA_IP_ASC+ 0x0000)) #define INCA_IP_ASC_ASC_CLC_RMC (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_ASC_ASC_CLC_DISS (1 << 1) -#define INCA_IP_ASC_ASC_CLC_DISR (1 << 0) - +#define INCA_IP_ASC_ASC_CLC_DISR (1 << 0) + /***********************************************************************/ /* Module : DMA register address and bits */ /***********************************************************************/ - -#define INCA_IP_DMA (0xBF108000) -/***********************************************************************/ - -/***DMA RX Channel 0 Command Register***/ +#define INCA_IP_DMA (0xBF108000) +/***********************************************************************/ + + +/***DMA RX Channel 0 Command Register***/ #define INCA_IP_DMA_DMA_RXCCR0 ((volatile u32*)(INCA_IP_DMA+ 0x0800)) #define INCA_IP_DMA_DMA_RXCCR0_LBE (1 << 31) #define INCA_IP_DMA_DMA_RXCCR0_HPEN (1 << 30) #define INCA_IP_DMA_DMA_RXCCR0_INIT (1 << 2) #define INCA_IP_DMA_DMA_RXCCR0_OFF (1 << 1) #define INCA_IP_DMA_DMA_RXCCR0_HR (1 << 0) - -/***DMA RX Channel 1 Command Register***/ + +/***DMA RX Channel 1 Command Register***/ #define INCA_IP_DMA_DMA_RXCCR1 ((volatile u32*)(INCA_IP_DMA+ 0x0804)) #define INCA_IP_DMA_DMA_RXCCR1_LBE (1 << 31) #define INCA_IP_DMA_DMA_RXCCR1_HPEN (1 << 30) #define INCA_IP_DMA_DMA_RXCCR1_INIT (1 << 2) #define INCA_IP_DMA_DMA_RXCCR1_OFF (1 << 1) #define INCA_IP_DMA_DMA_RXCCR1_HR (1 << 0) - -/***DMA Receive Interrupt Status Register***/ + +/***DMA Receive Interrupt Status Register***/ #define INCA_IP_DMA_DMA_RXISR ((volatile u32*)(INCA_IP_DMA+ 0x0808)) #define INCA_IP_DMA_DMA_RXISR_RDERRx (value) (((( 1 << 2) - 1) & (value)) << 8) #define INCA_IP_DMA_DMA_RXISR_CMDCPTx (value) (((( 1 << 2) - 1) & (value)) << 6) #define INCA_IP_DMA_DMA_RXISR_EOPx (value) (((( 1 << 2) - 1) & (value)) << 4) #define INCA_IP_DMA_DMA_RXISR_CPTx (value) (((( 1 << 2) - 1) & (value)) << 2) #define INCA_IP_DMA_DMA_RXISR_HLDx (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***DMA Receive Interrupt Mask Register***/ + +/***DMA Receive Interrupt Mask Register***/ #define INCA_IP_DMA_DMA_RXIMR ((volatile u32*)(INCA_IP_DMA+ 0x080C)) #define INCA_IP_DMA_DMA_RXIMR_RDERRx (value) (((( 1 << 2) - 1) & (value)) << 8) #define INCA_IP_DMA_DMA_RXIMR_CMDCPTx (value) (((( 1 << 2) - 1) & (value)) << 6) #define INCA_IP_DMA_DMA_RXIMR_EOPx (value) (((( 1 << 2) - 1) & (value)) << 4) #define INCA_IP_DMA_DMA_RXIMR_CPTx (value) (((( 1 << 2) - 1) & (value)) << 2) #define INCA_IP_DMA_DMA_RXIMR_HLDx (value) (((( 1 << 2) - 1) & (value)) << 0) - + /***DMA First Receive Descriptor Addr. for Rx Channel 0 ***/ #define INCA_IP_DMA_DMA_RXFRDA0 ((volatile u32*)(INCA_IP_DMA+ 0x0810)) #define INCA_IP_DMA_DMA_RXFRDA0_RXFRDA (value) (((( 1 << 28) - 1) & (value)) << 0) - + /***DMA First Receive Descriptor Addr. for Rx Channel 1 ***/ #define INCA_IP_DMA_DMA_RXFRDA1 ((volatile u32*)(INCA_IP_DMA+ 0x0814)) #define INCA_IP_DMA_DMA_RXFRDA1_RXFRDA (value) (((( 1 << 28) - 1) & (value)) << 0) - -/***DMA Receive Channel Polling Time***/ + +/***DMA Receive Channel Polling Time***/ #define INCA_IP_DMA_DMA_RXPOLL ((volatile u32*)(INCA_IP_DMA+ 0x0818)) #define INCA_IP_DMA_DMA_RXPOLL_BSZ1 (value) (((( 1 << 2) - 1) & (value)) << 30) #define INCA_IP_DMA_DMA_RXPOLL_BSZ0 (value) (((( 1 << 2) - 1) & (value)) << 28) #define INCA_IP_DMA_DMA_RXPOLL_RXPOLLTIME (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***DMA TX Channel 0 Command Register (Voice Port)***/ + +/***DMA TX Channel 0 Command Register (Voice Port)***/ #define INCA_IP_DMA_DMA_TXCCR0 ((volatile u32*)(INCA_IP_DMA+ 0x0880)) #define INCA_IP_DMA_DMA_TXCCR0_LBE (1 << 31) #define INCA_IP_DMA_DMA_TXCCR0_HPEN (1 << 30) #define INCA_IP_DMA_DMA_TXCCR0_HR (1 << 2) #define INCA_IP_DMA_DMA_TXCCR0_OFF (1 << 1) #define INCA_IP_DMA_DMA_TXCCR0_INIT (1 << 0) - -/***DMA TX Channel 1 Command Register (Mangmt Port)***/ + +/***DMA TX Channel 1 Command Register (Mangmt Port)***/ #define INCA_IP_DMA_DMA_TXCCR1 ((volatile u32*)(INCA_IP_DMA+ 0x0884)) #define INCA_IP_DMA_DMA_TXCCR1_LBE (1 << 31) #define INCA_IP_DMA_DMA_TXCCR1_HPEN (1 << 30) #define INCA_IP_DMA_DMA_TXCCR1_HR (1 << 2) #define INCA_IP_DMA_DMA_TXCCR1_OFF (1 << 1) #define INCA_IP_DMA_DMA_TXCCR1_INIT (1 << 0) - -/***DMA TX Channel 2 Command Register (SSC Port)***/ + +/***DMA TX Channel 2 Command Register (SSC Port)***/ #define INCA_IP_DMA_DMA_TXCCR2 ((volatile u32*)(INCA_IP_DMA+ 0x0888)) #define INCA_IP_DMA_DMA_TXCCR2_LBE (1 << 31) #define INCA_IP_DMA_DMA_TXCCR2_HPEN (1 << 30) @@ -1699,60 +1699,60 @@ #define INCA_IP_DMA_DMA_TXCCR2_HR (1 << 2) #define INCA_IP_DMA_DMA_TXCCR2_OFF (1 << 1) #define INCA_IP_DMA_DMA_TXCCR2_INIT (1 << 0) - + /***DMA First Receive Descriptor Addr. for Tx Channel 0 ***/ #define INCA_IP_DMA_DMA_TXFRDA0 ((volatile u32*)(INCA_IP_DMA+ 0x08A0)) #define INCA_IP_DMA_DMA_TXFRDA0_TXFRDA (value) (((( 1 << 28) - 1) & (value)) << 0) - + /***DMA First Receive Descriptor Addr. for Tx Channel 1 ***/ #define INCA_IP_DMA_DMA_TXFRDA1 ((volatile u32*)(INCA_IP_DMA+ 0x08A4)) #define INCA_IP_DMA_DMA_TXFRDA1_TXFRDA (value) (((( 1 << 28) - 1) & (value)) << 0) - + /***DMA First Receive Descriptor Addr. for Tx Channel 2 ***/ #define INCA_IP_DMA_DMA_TXFRDA2 ((volatile u32*)(INCA_IP_DMA+ 0x08A8)) #define INCA_IP_DMA_DMA_TXFRDA2_TXFRDA (value) (((( 1 << 28) - 1) & (value)) << 0) - -/***DMA Transmit Channel Arbitration Register***/ + +/***DMA Transmit Channel Arbitration Register***/ #define INCA_IP_DMA_DMA_TXWGT ((volatile u32*)(INCA_IP_DMA+ 0x08C0)) #define INCA_IP_DMA_DMA_TXWGT_TX2PR (value) (((( 1 << 2) - 1) & (value)) << 4) #define INCA_IP_DMA_DMA_TXWGT_TX1PRI (value) (((( 1 << 2) - 1) & (value)) << 2) #define INCA_IP_DMA_DMA_TXWGT_TX0PRI (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***DMA Transmit Channel Polling Time***/ + +/***DMA Transmit Channel Polling Time***/ #define INCA_IP_DMA_DMA_TXPOLL ((volatile u32*)(INCA_IP_DMA+ 0x08C4)) #define INCA_IP_DMA_DMA_TXPOLL_BSZ2 (value) (((( 1 << 2) - 1) & (value)) << 30) #define INCA_IP_DMA_DMA_TXPOLL_BSZ1 (value) (((( 1 << 2) - 1) & (value)) << 28) #define INCA_IP_DMA_DMA_TXPOLL_BSZ0 (value) (((( 1 << 2) - 1) & (value)) << 26) #define INCA_IP_DMA_DMA_TXPOLL_TXPOLLTIME (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***DMA Transmit Interrupt Status Register***/ + +/***DMA Transmit Interrupt Status Register***/ #define INCA_IP_DMA_DMA_TXISR ((volatile u32*)(INCA_IP_DMA+ 0x08C8)) #define INCA_IP_DMA_DMA_TXISR_RDERRx (value) (((( 1 << 3) - 1) & (value)) << 12) #define INCA_IP_DMA_DMA_TXISR_HLDx (value) (((( 1 << 3) - 1) & (value)) << 9) #define INCA_IP_DMA_DMA_TXISR_CPTx (value) (((( 1 << 3) - 1) & (value)) << 6) #define INCA_IP_DMA_DMA_TXISR_EOPx (value) (((( 1 << 3) - 1) & (value)) << 3) #define INCA_IP_DMA_DMA_TXISR_CMDCPTx (value) (((( 1 << 3) - 1) & (value)) << 0) - -/***DMA Transmit Interrupt Mask Register***/ + +/***DMA Transmit Interrupt Mask Register***/ #define INCA_IP_DMA_DMA_TXIMR ((volatile u32*)(INCA_IP_DMA+ 0x08CC)) #define INCA_IP_DMA_DMA_TXIMR_RDERRx (value) (((( 1 << 3) - 1) & (value)) << 12) #define INCA_IP_DMA_DMA_TXIMR_HLDx (value) (((( 1 << 3) - 1) & (value)) << 9) #define INCA_IP_DMA_DMA_TXIMR_CPTx (value) (((( 1 << 3) - 1) & (value)) << 6) #define INCA_IP_DMA_DMA_TXIMR_EOPx (value) (((( 1 << 3) - 1) & (value)) << 3) -#define INCA_IP_DMA_DMA_TXIMR_CMDCPTx (value) (((( 1 << 3) - 1) & (value)) << 0) - +#define INCA_IP_DMA_DMA_TXIMR_CMDCPTx (value) (((( 1 << 3) - 1) & (value)) << 0) + /***********************************************************************/ /* Module : Debug register address and bits */ /***********************************************************************/ - -#define INCA_IP_Debug (0xBF106000) -/***********************************************************************/ - -/***MCD Break Bus Switch Register***/ +#define INCA_IP_Debug (0xBF106000) +/***********************************************************************/ + + +/***MCD Break Bus Switch Register***/ #define INCA_IP_Debug_MCD_BBS ((volatile u32*)(INCA_IP_Debug+ 0x0000)) #define INCA_IP_Debug_MCD_BBS_BTP1 (1 << 19) #define INCA_IP_Debug_MCD_BBS_BTP0 (1 << 18) @@ -1766,48 +1766,48 @@ #define INCA_IP_Debug_MCD_BBS_BS4EN (1 << 6) #define INCA_IP_Debug_MCD_BBS_BS5 (1 << 5) #define INCA_IP_Debug_MCD_BBS_BS4 (1 << 4) - -/***MCD Multiplexer Control Register***/ + +/***MCD Multiplexer Control Register***/ #define INCA_IP_Debug_MCD_MCR ((volatile u32*)(INCA_IP_Debug+ 0x0008)) #define INCA_IP_Debug_MCD_MCR_MUX5 (1 << 4) #define INCA_IP_Debug_MCD_MCR_MUX4 (1 << 3) -#define INCA_IP_Debug_MCD_MCR_MUX1 (1 << 0) - +#define INCA_IP_Debug_MCD_MCR_MUX1 (1 << 0) + /***********************************************************************/ /* Module : TSF register address and bits */ /***********************************************************************/ - -#define INCA_IP_TSF (0xB8000900) -/***********************************************************************/ - -/***TSF Configuration Register (0000H)***/ +#define INCA_IP_TSF (0xB8000900) +/***********************************************************************/ + + +/***TSF Configuration Register (0000H)***/ #define INCA_IP_TSF_TSF_CONF ((volatile u32*)(INCA_IP_TSF+ 0x0000)) #define INCA_IP_TSF_TSF_CONF_PWMEN (1 << 2) #define INCA_IP_TSF_TSF_CONF_LEDEN (1 << 1) #define INCA_IP_TSF_TSF_CONF_KEYEN (1 << 0) - -/***Key scan Configuration Register (0004H)***/ + +/***Key scan Configuration Register (0004H)***/ #define INCA_IP_TSF_KEY_CONF ((volatile u32*)(INCA_IP_TSF+ 0x0004)) #define INCA_IP_TSF_KEY_CONF_SL (value) (((( 1 << 4) - 1) & (value)) << 0) - -/***Scan Register Line 0 and 1 (0008H)***/ + +/***Scan Register Line 0 and 1 (0008H)***/ #define INCA_IP_TSF_SREG01 ((volatile u32*)(INCA_IP_TSF+ 0x0008)) #define INCA_IP_TSF_SREG01_RES1x (value) (((( 1 << 12) - 1) & (value)) << 16) #define INCA_IP_TSF_SREG01_RES0x (value) (((( 1 << 13) - 1) & (value)) << 0) - -/***Scan Register Line 2 and 3 (000CH)***/ + +/***Scan Register Line 2 and 3 (000CH)***/ #define INCA_IP_TSF_SREG23 ((volatile u32*)(INCA_IP_TSF+ 0x000C)) #define INCA_IP_TSF_SREG23_RES3x (value) (((( 1 << 10) - 1) & (value)) << 16) #define INCA_IP_TSF_SREG23_RES2x (value) (((( 1 << 11) - 1) & (value)) << 0) - -/***Scan Register Line 4, 5 and 6 (0010H)***/ + +/***Scan Register Line 4, 5 and 6 (0010H)***/ #define INCA_IP_TSF_SREG456 ((volatile u32*)(INCA_IP_TSF+ 0x0010)) #define INCA_IP_TSF_SREG456_RES6x (value) (((( 1 << 7) - 1) & (value)) << 24) #define INCA_IP_TSF_SREG456_RES5x (value) (((( 1 << 8) - 1) & (value)) << 16) #define INCA_IP_TSF_SREG456_RES4x (value) (((( 1 << 9) - 1) & (value)) << 0) - -/***Scan Register Line 7 to 12 (0014H)***/ + +/***Scan Register Line 7 to 12 (0014H)***/ #define INCA_IP_TSF_SREG7to12 ((volatile u32*)(INCA_IP_TSF+ 0x0014)) #define INCA_IP_TSF_SREG7to12_RES12x (1 << 28) #define INCA_IP_TSF_SREG7to12_RES11x (value) (((( 1 << 2) - 1) & (value)) << 24) @@ -1815,8 +1815,8 @@ #define INCA_IP_TSF_SREG7to12_RES9x (value) (((( 1 << 4) - 1) & (value)) << 16) #define INCA_IP_TSF_SREG7to12_RES8x (value) (((( 1 << 5) - 1) & (value)) << 8) #define INCA_IP_TSF_SREG7to12_RES7x (value) (((( 1 << 6) - 1) & (value)) << 0) - -/***LEDMUX Configuration Register (0018H)***/ + +/***LEDMUX Configuration Register (0018H)***/ #define INCA_IP_TSF_LEDMUX_CONF ((volatile u32*)(INCA_IP_TSF+ 0x0018)) #define INCA_IP_TSF_LEDMUX_CONF_ETL1 (1 << 25) #define INCA_IP_TSF_LEDMUX_CONF_ESTA1 (1 << 24) @@ -1830,194 +1830,194 @@ #define INCA_IP_TSF_LEDMUX_CONF_ESPD0 (1 << 16) #define INCA_IP_TSF_LEDMUX_CONF_INV (1 << 1) #define INCA_IP_TSF_LEDMUX_CONF_NCOL (1 << 0) - -/***LED Register (001CH)***/ + +/***LED Register (001CH)***/ #define INCA_IP_TSF_LED_REG ((volatile u32*)(INCA_IP_TSF+ 0x001C)) #define INCA_IP_TSF_LED_REG_Lxy (value) (((( 1 << 24) - 1) & (value)) << 0) - -/***Pulse Width Modulator 1 and 2 Register (0020H)***/ + +/***Pulse Width Modulator 1 and 2 Register (0020H)***/ #define INCA_IP_TSF_PWM12 ((volatile u32*)(INCA_IP_TSF+ 0x0020)) -#define INCA_IP_TSF_PWM12_PW2PW1 (value) (((( 1 << NaN) - 1) & (value)) << NaN) - +#define INCA_IP_TSF_PWM12_PW2PW1 (value) (((( 1 << NaN) - 1) & (value)) << NaN) + /***********************************************************************/ /* Module : Ports register address and bits */ /***********************************************************************/ - -#define INCA_IP_Ports (0xB8000A00) -/***********************************************************************/ - -/***Port 1 Data Output Register (0020H)***/ +#define INCA_IP_Ports (0xB8000A00) +/***********************************************************************/ + + +/***Port 1 Data Output Register (0020H)***/ #define INCA_IP_Ports_P1_OUT ((volatile u32*)(INCA_IP_Ports+ 0x0020)) #define INCA_IP_Ports_P1_OUT_P(value) (1 << value) - - -/***Port 2 Data Output Register (0040H)***/ + + +/***Port 2 Data Output Register (0040H)***/ #define INCA_IP_Ports_P2_OUT ((volatile u32*)(INCA_IP_Ports+ 0x0040)) #define INCA_IP_Ports_P2_OUT_P(value) (1 << value) - - -/***Port 1 Data Input Register (0024H)***/ + + +/***Port 1 Data Input Register (0024H)***/ #define INCA_IP_Ports_P1_IN ((volatile u32*)(INCA_IP_Ports+ 0x0024)) #define INCA_IP_Ports_P1_IN_P(value) (1 << value) - - -/***Port 2 Data Input Register (0044H)***/ + + +/***Port 2 Data Input Register (0044H)***/ #define INCA_IP_Ports_P2_IN ((volatile u32*)(INCA_IP_Ports+ 0x0044)) #define INCA_IP_Ports_P2_IN_P(value) (1 << value) - - -/***Port 1 Direction Register (0028H)***/ + + +/***Port 1 Direction Register (0028H)***/ #define INCA_IP_Ports_P1_DIR ((volatile u32*)(INCA_IP_Ports+ 0x0028)) #define INCA_IP_Ports_P1_DIR_Port1P(value) (1 << value) - + #define INCA_IP_Ports_P1_DIR_Port2Pn (value) (((( 1 << 16) - 1) & (value)) << 0) - -/***Port 2 Direction Register (0048H)***/ + +/***Port 2 Direction Register (0048H)***/ #define INCA_IP_Ports_P2_DIR ((volatile u32*)(INCA_IP_Ports+ 0x0048)) #define INCA_IP_Ports_P2_DIR_Port1P(value) (1 << value) - + #define INCA_IP_Ports_P2_DIR_Port2Pn (value) (((( 1 << 16) - 1) & (value)) << 0) - + /***Port 0 Alternate Function Select Register 0 (000C H) ***/ #define INCA_IP_Ports_P0_ALTSEL ((volatile u32*)(INCA_IP_Ports+ 0x000C)) #define INCA_IP_Ports_P0_ALTSEL_Port0P(value) (1 << value) - - + + /***Port 1 Alternate Function Select Register 0 (002C H) ***/ #define INCA_IP_Ports_P1_ALTSEL ((volatile u32*)(INCA_IP_Ports+ 0x002C)) #define INCA_IP_Ports_P1_ALTSEL_Port1P(value) (1 << value) - + #define INCA_IP_Ports_P1_ALTSEL_Port2P(value) (1 << value) - - + + /***Port 2 Alternate Function Select Register 0 (004C H) ***/ #define INCA_IP_Ports_P2_ALTSEL ((volatile u32*)(INCA_IP_Ports+ 0x004C)) #define INCA_IP_Ports_P2_ALTSEL_Port1P(value) (1 << value) - + #define INCA_IP_Ports_P2_ALTSEL_Port2P(value) (1 << value) - - + + /***Port 0 Input Schmitt-Trigger Off Register (0010 H) ***/ #define INCA_IP_Ports_P0_STOFF ((volatile u32*)(INCA_IP_Ports+ 0x0010)) #define INCA_IP_Ports_P0_STOFF_Port0P(value) (1 << value) - - + + /***Port 1 Input Schmitt-Trigger Off Register (0030 H) ***/ #define INCA_IP_Ports_P1_STOFF ((volatile u32*)(INCA_IP_Ports+ 0x0030)) #define INCA_IP_Ports_P1_STOFF_Port1P(value) (1 << value) - + #define INCA_IP_Ports_P1_STOFF_Port2P(value) (1 << value) - - + + /***Port 2 Input Schmitt-Trigger Off Register (0050 H) ***/ #define INCA_IP_Ports_P2_STOFF ((volatile u32*)(INCA_IP_Ports+ 0x0050)) #define INCA_IP_Ports_P2_STOFF_Port1P(value) (1 << value) - + #define INCA_IP_Ports_P2_STOFF_Port2P(value) (1 << value) - - -/***Port 2 Open Drain Control Register (0054H)***/ + + +/***Port 2 Open Drain Control Register (0054H)***/ #define INCA_IP_Ports_P2_OD ((volatile u32*)(INCA_IP_Ports+ 0x0054)) #define INCA_IP_Ports_P2_OD_Port2P(value) (1 << value) - - -/***Port 0 Pull Up Device Enable Register (0018 H)***/ + + +/***Port 0 Pull Up Device Enable Register (0018 H)***/ #define INCA_IP_Ports_P0_PUDEN ((volatile u32*)(INCA_IP_Ports+ 0x0018)) #define INCA_IP_Ports_P0_PUDEN_Port0P(value) (1 << value) - - -/***Port 2 Pull Up Device Enable Register (0058 H)***/ + + +/***Port 2 Pull Up Device Enable Register (0058 H)***/ #define INCA_IP_Ports_P2_PUDEN ((volatile u32*)(INCA_IP_Ports+ 0x0058)) #define INCA_IP_Ports_P2_PUDEN_Port2P(value) (1 << value) - + #define INCA_IP_Ports_P2_PUDEN_Port2P(value) (1 << value) - - -/***Port 0 Pull Up/Pull Down Select Register (001C H)***/ + + +/***Port 0 Pull Up/Pull Down Select Register (001C H)***/ #define INCA_IP_Ports_P0_PUDSEL ((volatile u32*)(INCA_IP_Ports+ 0x001C)) #define INCA_IP_Ports_P0_PUDSEL_Port0P(value) (1 << value) - - -/***Port 2 Pull Up/Pull Down Select Register (005C H)***/ + + +/***Port 2 Pull Up/Pull Down Select Register (005C H)***/ #define INCA_IP_Ports_P2_PUDSEL ((volatile u32*)(INCA_IP_Ports+ 0x005C)) #define INCA_IP_Ports_P2_PUDSEL_Port2P(value) (1 << value) - + #define INCA_IP_Ports_P2_PUDSEL_Port2P(value) (1 << value) - - + + /***********************************************************************/ /* Module : DES/3DES register address and bits */ /***********************************************************************/ - -#define INCA_IP_DES_3DES (0xB8000800) -/***********************************************************************/ - -/***DES Input Data High Register***/ +#define INCA_IP_DES_3DES (0xB8000800) +/***********************************************************************/ + + +/***DES Input Data High Register***/ #define INCA_IP_DES_3DES_DES_IHR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0000)) #define INCA_IP_DES_3DES_DES_IHR_IH(value) (1 << value) - - -/***DES Input Data Low Register***/ + + +/***DES Input Data Low Register***/ #define INCA_IP_DES_3DES_DES_ILR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0004)) #define INCA_IP_DES_3DES_DES_ILR_IL(value) (1 << value) - - -/***DES Key #1 High Register***/ + + +/***DES Key #1 High Register***/ #define INCA_IP_DES_3DES_DES_K1HR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0008)) #define INCA_IP_DES_3DES_DES_K1HR_K1H(value) (1 << value) - - -/***DES Key #1 Low Register***/ + + +/***DES Key #1 Low Register***/ #define INCA_IP_DES_3DES_DES_K1LR ((volatile u32*)(INCA_IP_DES_3DES+ 0x000C)) #define INCA_IP_DES_3DES_DES_K1LR_K1L(value) (1 << value) - - -/***DES Key #2 High Register***/ + + +/***DES Key #2 High Register***/ #define INCA_IP_DES_3DES_DES_K2HR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0010)) #define INCA_IP_DES_3DES_DES_K2HR_K2H(value) (1 << value) - - -/***DES Key #2 Low Register***/ + + +/***DES Key #2 Low Register***/ #define INCA_IP_DES_3DES_DES_K2LR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0014)) #define INCA_IP_DES_3DES_DES_K2LR_K2L(value) (1 << value) - - -/***DES Key #3 High Register***/ + + +/***DES Key #3 High Register***/ #define INCA_IP_DES_3DES_DES_K3HR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0018)) #define INCA_IP_DES_3DES_DES_K3HR_K3H(value) (1 << value) - - -/***DES Key #3 Low Register***/ + + +/***DES Key #3 Low Register***/ #define INCA_IP_DES_3DES_DES_K3LR ((volatile u32*)(INCA_IP_DES_3DES+ 0x001C)) #define INCA_IP_DES_3DES_DES_K3LR_K3L(value) (1 << value) - - -/***DES Initialization Vector High Register***/ + + +/***DES Initialization Vector High Register***/ #define INCA_IP_DES_3DES_DES_IVHR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0020)) #define INCA_IP_DES_3DES_DES_IVHR_IVH(value) (1 << value) - - -/***DES Initialization Vector Low Register***/ + + +/***DES Initialization Vector Low Register***/ #define INCA_IP_DES_3DES_DES_IVLR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0024)) #define INCA_IP_DES_3DES_DES_IVLR_IVL(value) (1 << value) - - -/***DES Control Register***/ + + +/***DES Control Register***/ #define INCA_IP_DES_3DES_DES_CONTROLR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0028)) #define INCA_IP_DES_3DES_DES_CONTROLR_KRE (1 << 31) #define INCA_IP_DES_3DES_DES_CONTROLR_DAU (1 << 16) #define INCA_IP_DES_3DES_DES_CONTROLR_F(value) (1 << value) - + #define INCA_IP_DES_3DES_DES_CONTROLR_O(value) (1 << value) - + #define INCA_IP_DES_3DES_DES_CONTROLR_GO (1 << 8) #define INCA_IP_DES_3DES_DES_CONTROLR_STP (1 << 7) #define INCA_IP_DES_3DES_DES_CONTROLR_IEN (1 << 6) @@ -2025,134 +2025,134 @@ #define INCA_IP_DES_3DES_DES_CONTROLR_SM (1 << 4) #define INCA_IP_DES_3DES_DES_CONTROLR_E_D (1 << 3) #define INCA_IP_DES_3DES_DES_CONTROLR_M(value) (1 << value) - - -/***DES Output Data High Register***/ + + +/***DES Output Data High Register***/ #define INCA_IP_DES_3DES_DES_OHR ((volatile u32*)(INCA_IP_DES_3DES+ 0x002C)) #define INCA_IP_DES_3DES_DES_OHR_OH(value) (1 << value) - - -/***DES Output Data Low Register***/ + + +/***DES Output Data Low Register***/ #define INCA_IP_DES_3DES_DES_OLR ((volatile u32*)(INCA_IP_DES_3DES+ 0x0030)) #define INCA_IP_DES_3DES_DES_OLR_OL(value) (1 << value) - - + + /***********************************************************************/ /* Module : AES register address and bits */ /***********************************************************************/ - -#define INCA_IP_AES (0xB8000880) -/***********************************************************************/ - -/***AES Input Data 3 Register***/ +#define INCA_IP_AES (0xB8000880) +/***********************************************************************/ + + +/***AES Input Data 3 Register***/ #define INCA_IP_AES_AES_ID3R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_ID3R_I(value) (1 << value) - - -/***AES Input Data 2 Register***/ + + +/***AES Input Data 2 Register***/ #define INCA_IP_AES_AES_ID2R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_ID2R_I(value) (1 << value) - - -/***AES Input Data 1 Register***/ + + +/***AES Input Data 1 Register***/ #define INCA_IP_AES_AES_ID1R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_ID1R_I(value) (1 << value) - - -/***AES Input Data 0 Register***/ + + +/***AES Input Data 0 Register***/ #define INCA_IP_AES_AES_ID0R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_ID0R_I(value) (1 << value) - - -/***AES Output Data 3 Register***/ + + +/***AES Output Data 3 Register***/ #define INCA_IP_AES_AES_OD3R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_OD3R_O(value) (1 << value) - - -/***AES Output Data 2 Register***/ + + +/***AES Output Data 2 Register***/ #define INCA_IP_AES_AES_OD2R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_OD2R_O(value) (1 << value) - - -/***AES Output Data 1 Register***/ + + +/***AES Output Data 1 Register***/ #define INCA_IP_AES_AES_OD1R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_OD1R_O(value) (1 << value) - - -/***AES Output Data 0 Register***/ + + +/***AES Output Data 0 Register***/ #define INCA_IP_AES_AES_OD0R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_OD0R_O(value) (1 << value) - - -/***AES Key 7 Register***/ + + +/***AES Key 7 Register***/ #define INCA_IP_AES_AES_K7R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_K7R_K(value) (1 << value) - - -/***AES Key 6 Register***/ + + +/***AES Key 6 Register***/ #define INCA_IP_AES_AES_K6R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_K6R_K(value) (1 << value) - - -/***AES Key 5 Register***/ + + +/***AES Key 5 Register***/ #define INCA_IP_AES_AES_K5R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_K5R_K(value) (1 << value) - - -/***AES Key 4 Register***/ + + +/***AES Key 4 Register***/ #define INCA_IP_AES_AES_K4R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_K4R_K(value) (1 << value) - - -/***AES Key 3 Register***/ + + +/***AES Key 3 Register***/ #define INCA_IP_AES_AES_K3R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_K3R_K(value) (1 << value) - - -/***AES Key 2 Register***/ + + +/***AES Key 2 Register***/ #define INCA_IP_AES_AES_K2R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_K2R_K(value) (1 << value) - - -/***AES Key 1 Register***/ + + +/***AES Key 1 Register***/ #define INCA_IP_AES_AES_K1R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_K1R_K(value) (1 << value) - - -/***AES Key 0 Register***/ + + +/***AES Key 0 Register***/ #define INCA_IP_AES_AES_K0R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_K0R_K(value) (1 << value) - - -/***AES Initialization Vector 3 Register***/ + + +/***AES Initialization Vector 3 Register***/ #define INCA_IP_AES_AES_IV3R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_IV3R_IV(value) (1 << value) - - -/***AES Initialization Vector 2 Register***/ + + +/***AES Initialization Vector 2 Register***/ #define INCA_IP_AES_AES_IV2R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_IV2R_IV(value) (1 << value) - - -/***AES Initialization Vector 1 Register***/ + + +/***AES Initialization Vector 1 Register***/ #define INCA_IP_AES_AES_IV1R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_IV1R_IV(value) (1 << value) - - -/***AES Initialization Vector 0 Register***/ + + +/***AES Initialization Vector 0 Register***/ #define INCA_IP_AES_AES_IV0R ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_IV0R_IV (value) (((( 1 << 32) - 1) &(value)) << 0) - -/***AES Control Register***/ + +/***AES Control Register***/ #define INCA_IP_AES_AES_CONTROLR ((volatile u32*)(INCA_IP_AES+ 0x0000)) #define INCA_IP_AES_AES_CONTROLR_KRE (1 << 31) #define INCA_IP_AES_AES_CONTROLR_DAU (1 << 16) #define INCA_IP_AES_AES_CONTROLR_PNK (1 << 15) #define INCA_IP_AES_AES_CONTROLR_F(value) (1 << value) - + #define INCA_IP_AES_AES_CONTROLR_O(value) (1 << value) - + #define INCA_IP_AES_AES_CONTROLR_GO (1 << 8) #define INCA_IP_AES_AES_CONTROLR_STP (1 << 7) #define INCA_IP_AES_AES_CONTROLR_IEN (1 << 6) @@ -2161,30 +2161,30 @@ #define INCA_IP_AES_AES_CONTROLR_E_D (1 << 3) #define INCA_IP_AES_AES_CONTROLR_KV (1 << 2) #define INCA_IP_AES_AES_CONTROLR_K(value) (1 << value) - - + + /***********************************************************************/ /* Module : I�C register address and bits */ /***********************************************************************/ - -#define INCA_IP_IIC (0xB8000700) -/***********************************************************************/ - -/***I�C Port Input Select Register***/ +#define INCA_IP_IIC (0xB8000700) +/***********************************************************************/ + + +/***I�C Port Input Select Register***/ #define INCA_IP_IIC_IIC_PISEL ((volatile u32*)(INCA_IP_IIC+ 0x0004)) #define INCA_IP_IIC_IIC_PISEL_SDAIS(value) (1 << value) - + #define INCA_IP_IIC_IIC_PISEL_SCLIS(value) (1 << value) - - -/***I�C Clock Control Register***/ + + +/***I�C Clock Control Register***/ #define INCA_IP_IIC_IIC_CLC ((volatile u32*)(INCA_IP_IIC+ 0x0000)) #define INCA_IP_IIC_IIC_CLC_RMC (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_IIC_IIC_CLC_DISS (1 << 1) #define INCA_IP_IIC_IIC_CLC_DISR (1 << 0) - -/***I�C System Control Register***/ + +/***I�C System Control Register***/ #define INCA_IP_IIC_IIC_SYSCON_0 ((volatile u32*)(INCA_IP_IIC+ 0x0010)) #define INCA_IP_IIC_IIC_SYSCON_0_WMEN (1 << 31) #define INCA_IP_IIC_IIC_SYSCON_0_CI (value) (((( 1 << 2) - 1) & (value)) << 26) @@ -2207,8 +2207,8 @@ #define INCA_IP_IIC_IIC_SYSCON_0_SLA (1 << 2) #define INCA_IP_IIC_IIC_SYSCON_0_AL (1 << 1) #define INCA_IP_IIC_IIC_SYSCON_0_ADR (1 << 0) - -/***I�C System Control Register***/ + +/***I�C System Control Register***/ #define INCA_IP_IIC_IIC_SYSCON_1 ((volatile u32*)(INCA_IP_IIC+ 0x0010)) #define INCA_IP_IIC_IIC_SYSCON_1_RM (value) (((( 1 << 8) - 1) & (value)) << 24) #define INCA_IP_IIC_IIC_SYSCON_1_TRX (1 << 23) @@ -2228,8 +2228,8 @@ #define INCA_IP_IIC_IIC_SYSCON_1_SLA (1 << 2) #define INCA_IP_IIC_IIC_SYSCON_1_AL (1 << 1) #define INCA_IP_IIC_IIC_SYSCON_1_ADR (1 << 0) - -/***I�C System Control Register***/ + +/***I�C System Control Register***/ #define INCA_IP_IIC_IIC_SYSCON_2 ((volatile u32*)(INCA_IP_IIC+ 0x0010)) #define INCA_IP_IIC_IIC_SYSCON_2_WMEN (1 << 31) #define INCA_IP_IIC_IIC_SYSCON_2_CI (value) (((( 1 << 2) - 1) & (value)) << 26) @@ -2251,7 +2251,7 @@ #define INCA_IP_IIC_IIC_SYSCON_2_SLA (1 << 2) #define INCA_IP_IIC_IIC_SYSCON_2_AL (1 << 1) #define INCA_IP_IIC_IIC_SYSCON_2_ADR (1 << 0) - + /***I�C Write Hardware Modified System Control Register ***/ #define INCA_IP_IIC_IIC_WHBSYSCON ((volatile u32*)(INCA_IP_IIC+ 0x0020)) @@ -2277,161 +2277,161 @@ #define INCA_IP_IIC_IIC_WHBSYSCON_CLRIRQD (1 << 5) #define INCA_IP_IIC_IIC_WHBSYSCON_SETAL (1 << 2) #define INCA_IP_IIC_IIC_WHBSYSCON_CLRAL (1 << 1) - -/***I�C Bus Control Register***/ + +/***I�C Bus Control Register***/ #define INCA_IP_IIC_IIC_BUSCON_0 ((volatile u32*)(INCA_IP_IIC+ 0x0014)) #define INCA_IP_IIC_IIC_BUSCON_0_BRPMOD (1 << 31) #define INCA_IP_IIC_IIC_BUSCON_0_PREDIV (value) (((( 1 << 2) - 1) & (value)) << 29) #define INCA_IP_IIC_IIC_BUSCON_0_ICA9_0 (value) (((( 1 << 10) - 1) & (value)) << 16) #define INCA_IP_IIC_IIC_BUSCON_0_BRP (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_IIC_IIC_BUSCON_0_SCLEN(value) (1 << value) - + #define INCA_IP_IIC_IIC_BUSCON_0_SDAEN(value) (1 << value) - - -/***I�C Bus Control Register***/ + + +/***I�C Bus Control Register***/ #define INCA_IP_IIC_IIC_BUSCON_1 ((volatile u32*)(INCA_IP_IIC+ 0x0014)) #define INCA_IP_IIC_IIC_BUSCON_1_BRPMOD (1 << 31) #define INCA_IP_IIC_IIC_BUSCON_1_PREDIV (value) (((( 1 << 2) - 1) & (value)) << 29) #define INCA_IP_IIC_IIC_BUSCON_1_ICA7_1 (value) (((( 1 << 7) - 1) & (value)) << 17) #define INCA_IP_IIC_IIC_BUSCON_1_BRP (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_IIC_IIC_BUSCON_1_SCLEN(value) (1 << value) - + #define INCA_IP_IIC_IIC_BUSCON_1_SDAEN(value) (1 << value) - - -/***I�C Receive Transmit Buffer***/ + + +/***I�C Receive Transmit Buffer***/ #define INCA_IP_IIC_IIC_RTB ((volatile u32*)(INCA_IP_IIC+ 0x0018)) #define INCA_IP_IIC_IIC_RTB_RTB(value) (1 << value) - - + + /***********************************************************************/ /* Module : FB register address and bits */ /***********************************************************************/ - -#define INCA_IP_FB (0xBF880000) -/***********************************************************************/ - -/***FB Access Error Cause Register***/ +#define INCA_IP_FB (0xBF880000) +/***********************************************************************/ + + +/***FB Access Error Cause Register***/ #define INCA_IP_FB_FB_ERRCAUSE ((volatile u32*)(INCA_IP_FB+ 0x0100)) #define INCA_IP_FB_FB_ERRCAUSE_ERR (1 << 31) #define INCA_IP_FB_FB_ERRCAUSE_PORT (value) (((( 1 << 4) - 1) & (value)) << 16) #define INCA_IP_FB_FB_ERRCAUSE_CAUSE (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***FB Access Error Address Register***/ + +/***FB Access Error Address Register***/ #define INCA_IP_FB_FB_ERRADDR ((volatile u32*)(INCA_IP_FB+ 0x0108)) #define INCA_IP_FB_FB_ERRADDR_ADDR - -/***FB Configuration Register***/ + +/***FB Configuration Register***/ #define INCA_IP_FB_FB_CFG ((volatile u32*)(INCA_IP_FB+ 0x0800)) -#define INCA_IP_FB_FB_CFG_SVM (1 << 0) - +#define INCA_IP_FB_FB_CFG_SVM (1 << 0) + /***********************************************************************/ /* Module : SRAM register address and bits */ /***********************************************************************/ - -#define INCA_IP_SRAM (0xBF980000) -/***********************************************************************/ - -/***SRAM Size Register***/ +#define INCA_IP_SRAM (0xBF980000) +/***********************************************************************/ + + +/***SRAM Size Register***/ #define INCA_IP_SRAM_SRAM_SIZE ((volatile u32*)(INCA_IP_SRAM+ 0x0800)) -#define INCA_IP_SRAM_SRAM_SIZE_SIZE (value) (((( 1 << 23) - 1) & (value)) << 0) - +#define INCA_IP_SRAM_SRAM_SIZE_SIZE (value) (((( 1 << 23) - 1) & (value)) << 0) + /***********************************************************************/ /* Module : BIU register address and bits */ /***********************************************************************/ - -#define INCA_IP_BIU (0xBFA80000) -/***********************************************************************/ - -/***BIU Identification Register***/ +#define INCA_IP_BIU (0xBFA80000) +/***********************************************************************/ + + +/***BIU Identification Register***/ #define INCA_IP_BIU_BIU_ID ((volatile u32*)(INCA_IP_BIU+ 0x0000)) #define INCA_IP_BIU_BIU_ID_ARCH (1 << 16) #define INCA_IP_BIU_BIU_ID_ID (value) (((( 1 << 8) - 1) & (value)) << 8) #define INCA_IP_BIU_BIU_ID_REV (value) (((( 1 << 8) - 1) & (value)) << 0) - -/***BIU Access Error Cause Register***/ + +/***BIU Access Error Cause Register***/ #define INCA_IP_BIU_BIU_ERRCAUSE ((volatile u32*)(INCA_IP_BIU+ 0x0100)) #define INCA_IP_BIU_BIU_ERRCAUSE_ERR (1 << 31) #define INCA_IP_BIU_BIU_ERRCAUSE_PORT (value) (((( 1 << 4) - 1) & (value)) << 16) #define INCA_IP_BIU_BIU_ERRCAUSE_CAUSE (value) (((( 1 << 2) - 1) & (value)) << 0) - -/***BIU Access Error Address Register***/ + +/***BIU Access Error Address Register***/ #define INCA_IP_BIU_BIU_ERRADDR ((volatile u32*)(INCA_IP_BIU+ 0x0108)) -#define INCA_IP_BIU_BIU_ERRADDR_ADDR - +#define INCA_IP_BIU_BIU_ERRADDR_ADDR + /***********************************************************************/ /* Module : ICU register address and bits */ /***********************************************************************/ - -#define INCA_IP_ICU (0xBF101000) -/***********************************************************************/ - -/***IM0 Interrupt Status Register***/ +#define INCA_IP_ICU (0xBF101000) +/***********************************************************************/ + + +/***IM0 Interrupt Status Register***/ #define INCA_IP_ICU_IM0_ISR ((volatile u32*)(INCA_IP_ICU+ 0x0000)) #define INCA_IP_ICU_IM0_ISR_IR(value) (1 << value) - - -/***IM1 Interrupt Status Register***/ + + +/***IM1 Interrupt Status Register***/ #define INCA_IP_ICU_IM1_ISR ((volatile u32*)(INCA_IP_ICU+ 0x0200)) #define INCA_IP_ICU_IM1_ISR_IR(value) (1 << value) - - -/***IM2 Interrupt Status Register***/ + + +/***IM2 Interrupt Status Register***/ #define INCA_IP_ICU_IM2_ISR ((volatile u32*)(INCA_IP_ICU+ 0x0400)) #define INCA_IP_ICU_IM2_ISR_IR(value) (1 << value) - - -/***IM0 Interrupt Enable Register***/ + + +/***IM0 Interrupt Enable Register***/ #define INCA_IP_ICU_IM0_IER ((volatile u32*)(INCA_IP_ICU+ 0x0008)) #define INCA_IP_ICU_IM0_IER_IR(value) (1 << value) - - -/***IM1 Interrupt Enable Register***/ + + +/***IM1 Interrupt Enable Register***/ #define INCA_IP_ICU_IM1_IER ((volatile u32*)(INCA_IP_ICU+ 0x0208)) #define INCA_IP_ICU_IM1_IER_IR(value) (1 << value) - - -/***IM2 Interrupt Enable Register***/ + + +/***IM2 Interrupt Enable Register***/ #define INCA_IP_ICU_IM2_IER ((volatile u32*)(INCA_IP_ICU+ 0x0408)) #define INCA_IP_ICU_IM2_IER_IR(value) (1 << value) - - -/***IM0 Interrupt Output Status Register***/ + + +/***IM0 Interrupt Output Status Register***/ #define INCA_IP_ICU_IM0_IOSR ((volatile u32*)(INCA_IP_ICU+ 0x0010)) #define INCA_IP_ICU_IM0_IOSR_IR(value) (1 << value) - - -/***IM1 Interrupt Output Status Register***/ + + +/***IM1 Interrupt Output Status Register***/ #define INCA_IP_ICU_IM1_IOSR ((volatile u32*)(INCA_IP_ICU+ 0x0210)) #define INCA_IP_ICU_IM1_IOSR_IR(value) (1 << value) - - -/***IM2 Interrupt Output Status Register***/ + + +/***IM2 Interrupt Output Status Register***/ #define INCA_IP_ICU_IM2_IOSR ((volatile u32*)(INCA_IP_ICU+ 0x0410)) #define INCA_IP_ICU_IM2_IOSR_IR(value) (1 << value) - - -/***IM0 Interrupt Request Set Register***/ + + +/***IM0 Interrupt Request Set Register***/ #define INCA_IP_ICU_IM0_IRSR ((volatile u32*)(INCA_IP_ICU+ 0x0018)) #define INCA_IP_ICU_IM0_IRSR_IR(value) (1 << value) - - -/***IM1 Interrupt Request Set Register***/ + + +/***IM1 Interrupt Request Set Register***/ #define INCA_IP_ICU_IM1_IRSR ((volatile u32*)(INCA_IP_ICU+ 0x0218)) #define INCA_IP_ICU_IM1_IRSR_IR(value) (1 << value) - - -/***IM2 Interrupt Request Set Register***/ + + +/***IM2 Interrupt Request Set Register***/ #define INCA_IP_ICU_IM2_IRSR ((volatile u32*)(INCA_IP_ICU+ 0x0418)) #define INCA_IP_ICU_IM2_IRSR_IR(value) (1 << value) - - -/***External Interrupt Control Register***/ + + +/***External Interrupt Control Register***/ #define INCA_IP_ICU_ICU_EICR ((volatile u32*)(INCA_IP_ICU+ 0x0B00)) #define INCA_IP_ICU_ICU_EICR_EII5 (value) (((( 1 << 3) - 1) & (value)) << 20) #define INCA_IP_ICU_ICU_EICR_EII4 (value) (((( 1 << 3) - 1) & (value)) << 16) diff --git a/include/asm-mips/io.h b/include/asm-mips/io.h index 9a7aaf7..857fb03 100644 --- a/include/asm-mips/io.h +++ b/include/asm-mips/io.h @@ -203,7 +203,7 @@ #define isa_eth_io_copy_and_sum(a,b,c,d) eth_copy_and_sum((a),(b),(c),(d)) static inline int check_signature(unsigned long io_addr, - const unsigned char *signature, int length) + const unsigned char *signature, int length) { int retval = 0; do { @@ -286,15 +286,15 @@ #define __OUTS2(m) \ if (count) \ __asm__ __volatile__ ( \ - ".set\tnoreorder\n\t" \ - ".set\tnoat\n" \ - "1:\tl" #m "\t$1,(%0)\n\t" \ - "subu\t%1,1\n\t" \ - "s" #m "\t$1,%4(%5)\n\t" \ - "bne\t$0,%1,1b\n\t" \ - "addiu\t%0,%6\n\t" \ - ".set\tat\n\t" \ - ".set\treorder" + ".set\tnoreorder\n\t" \ + ".set\tnoat\n" \ + "1:\tl" #m "\t$1,(%0)\n\t" \ + "subu\t%1,1\n\t" \ + "s" #m "\t$1,%4(%5)\n\t" \ + "bne\t$0,%1,1b\n\t" \ + "addiu\t%0,%6\n\t" \ + ".set\tat\n\t" \ + ".set\treorder" #define __OUTS(m,s,i) \ __OUTS1(s) __OUTS2(m) \ diff --git a/include/asm-mips/mipsregs.h b/include/asm-mips/mipsregs.h index 56fc3da..3100738 100644 --- a/include/asm-mips/mipsregs.h +++ b/include/asm-mips/mipsregs.h @@ -75,7 +75,7 @@ #define CP0_IWATCH $18 #define CP0_DWATCH $19 -/* +/* * Coprocessor 0 Set 1 register names */ #define CP0_S1_DERRADDR0 $26 @@ -175,69 +175,69 @@ */ #define read_32bit_cp0_register(source) \ ({ int __res; \ - __asm__ __volatile__( \ + __asm__ __volatile__( \ ".set\tpush\n\t" \ ".set\treorder\n\t" \ - "mfc0\t%0,"STR(source)"\n\t" \ + "mfc0\t%0,"STR(source)"\n\t" \ ".set\tpop" \ - : "=r" (__res)); \ - __res;}) + : "=r" (__res)); \ + __res;}) #define read_32bit_cp0_set1_register(source) \ ({ int __res; \ - __asm__ __volatile__( \ + __asm__ __volatile__( \ ".set\tpush\n\t" \ ".set\treorder\n\t" \ - "cfc0\t%0,"STR(source)"\n\t" \ + "cfc0\t%0,"STR(source)"\n\t" \ ".set\tpop" \ - : "=r" (__res)); \ - __res;}) + : "=r" (__res)); \ + __res;}) /* * For now use this only with interrupts disabled! */ #define read_64bit_cp0_register(source) \ ({ int __res; \ - __asm__ __volatile__( \ - ".set\tmips3\n\t" \ - "dmfc0\t%0,"STR(source)"\n\t" \ - ".set\tmips0" \ - : "=r" (__res)); \ - __res;}) + __asm__ __volatile__( \ + ".set\tmips3\n\t" \ + "dmfc0\t%0,"STR(source)"\n\t" \ + ".set\tmips0" \ + : "=r" (__res)); \ + __res;}) #define write_32bit_cp0_register(register,value) \ - __asm__ __volatile__( \ - "mtc0\t%0,"STR(register)"\n\t" \ + __asm__ __volatile__( \ + "mtc0\t%0,"STR(register)"\n\t" \ "nop" \ - : : "r" (value)); + : : "r" (value)); #define write_32bit_cp0_set1_register(register,value) \ - __asm__ __volatile__( \ - "ctc0\t%0,"STR(register)"\n\t" \ + __asm__ __volatile__( \ + "ctc0\t%0,"STR(register)"\n\t" \ "nop" \ - : : "r" (value)); + : : "r" (value)); #define write_64bit_cp0_register(register,value) \ - __asm__ __volatile__( \ - ".set\tmips3\n\t" \ - "dmtc0\t%0,"STR(register)"\n\t" \ - ".set\tmips0" \ - : : "r" (value)) + __asm__ __volatile__( \ + ".set\tmips3\n\t" \ + "dmtc0\t%0,"STR(register)"\n\t" \ + ".set\tmips0" \ + : : "r" (value)) -/* - * This should be changed when we get a compiler that support the MIPS32 ISA. +/* + * This should be changed when we get a compiler that support the MIPS32 ISA. */ #define read_mips32_cp0_config1() \ ({ int __res; \ - __asm__ __volatile__( \ + __asm__ __volatile__( \ ".set\tnoreorder\n\t" \ ".set\tnoat\n\t" \ - ".word\t0x40018001\n\t" \ + ".word\t0x40018001\n\t" \ "move\t%0,$1\n\t" \ ".set\tat\n\t" \ ".set\treorder" \ :"=r" (__res)); \ - __res;}) + __res;}) /* * R4x00 interrupt enable / cause bits @@ -273,11 +273,11 @@ set_cp0_##name(unsigned int set) \ { \ unsigned int res; \ - \ + \ res = read_32bit_cp0_register(register); \ res |= set; \ write_32bit_cp0_register(register, res); \ - \ + \ return res; \ } \ \ @@ -285,11 +285,11 @@ clear_cp0_##name(unsigned int clear) \ { \ unsigned int res; \ - \ + \ res = read_32bit_cp0_register(register); \ res &= ~clear; \ write_32bit_cp0_register(register, res); \ - \ + \ return res; \ } \ \ @@ -297,13 +297,13 @@ change_cp0_##name(unsigned int change, unsigned int new) \ { \ unsigned int res; \ - \ + \ res = read_32bit_cp0_register(register); \ res &= ~change; \ res |= (new & change); \ if(change) \ write_32bit_cp0_register(register, res); \ - \ + \ return res; \ } diff --git a/include/asm-mips/posix_types.h b/include/asm-mips/posix_types.h index 6c48b3f..879aae2 100644 --- a/include/asm-mips/posix_types.h +++ b/include/asm-mips/posix_types.h @@ -45,7 +45,7 @@ #endif typedef struct { - long val[2]; + long val[2]; } __kernel_fsid_t; #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) @@ -68,7 +68,7 @@ #undef __FD_ISSET static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p) -{ +{ unsigned long __tmp = __fd / __NFDBITS; unsigned long __rem = __fd % __NFDBITS; return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0; diff --git a/include/asm-mips/processor.h b/include/asm-mips/processor.h index 8c3de90..6838aee 100644 --- a/include/asm-mips/processor.h +++ b/include/asm-mips/processor.h @@ -115,8 +115,8 @@ }; union mips_fpu_union { - struct mips_fpu_hard_struct hard; - struct mips_fpu_soft_struct soft; + struct mips_fpu_hard_struct hard; + struct mips_fpu_soft_struct soft; }; #define INIT_FPU { \ @@ -173,11 +173,11 @@ #endif /* !defined (_LANGUAGE_ASSEMBLY) */ #define INIT_THREAD { \ - /* \ - * saved main processor registers \ - */ \ + /* \ + * saved main processor registers \ + */ \ 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, \ + 0, 0, 0, \ /* \ * saved cp0 stuff \ */ \ diff --git a/include/asm-mips/string.h b/include/asm-mips/string.h index 343b45e..463a111 100644 --- a/include/asm-mips/string.h +++ b/include/asm-mips/string.h @@ -27,7 +27,7 @@ ".set\tat\n\t" ".set\treorder" : "=r" (__dest), "=r" (__src) - : "0" (__dest), "1" (__src) + : "0" (__dest), "1" (__src) : "$1","memory"); return __xdest; @@ -54,9 +54,9 @@ "2:\n\t" ".set\tat\n\t" ".set\treorder" - : "=r" (__dest), "=r" (__src), "=r" (__n) - : "0" (__dest), "1" (__src), "2" (__n) - : "$1","memory"); + : "=r" (__dest), "=r" (__src), "=r" (__n) + : "0" (__dest), "1" (__src), "2" (__n) + : "$1","memory"); return __dest; } @@ -110,7 +110,7 @@ "2:\n\t" #if defined(CONFIG_CPU_R3000) "nop\n\t" -#endif +#endif "move\t%3,$1\n" "3:\tsubu\t%3,$1\n\t" ".set\tat\n\t" diff --git a/include/asm-mips/system.h b/include/asm-mips/system.h index 4b45847..b6d50e2 100644 --- a/include/asm-mips/system.h +++ b/include/asm-mips/system.h @@ -8,7 +8,7 @@ * Copyright (C) 1994 - 1999 by Ralf Baechle * * Changed set_except_vector declaration to allow return of previous - * vector address value - necessary for "borrowing" vectors. + * vector address value - necessary for "borrowing" vectors. * * Kevin D. Kissell, kevink@mips.org and Carsten Langgaard, carstenl@mips.com * Copyright (C) 2000 MIPS Technologies, Inc. @@ -124,7 +124,7 @@ extern unsigned long __global_save_flags(void); extern void __global_restore_flags(unsigned long); # define sti() __global_sti() -# define cli() __global_cli() +# define cli() __global_cli() # define save_flags(x) do { x = __global_save_flags(); } while (0) # define restore_flags(x) __global_restore_flags(x) # define save_and_cli(x) do { save_flags(x); cli(); } while(0) diff --git a/include/asm-mips/types.h b/include/asm-mips/types.h index 638f751..e757e22 100644 --- a/include/asm-mips/types.h +++ b/include/asm-mips/types.h @@ -32,12 +32,12 @@ typedef unsigned long __u64; #else - + #if defined(__GNUC__) && !defined(__STRICT_ANSI__) typedef __signed__ long long __s64; typedef unsigned long long __u64; #endif - + #endif /* diff --git a/include/asm-ppc/5xx_immap.h b/include/asm-ppc/5xx_immap.h index ffff975..8e57057 100644 --- a/include/asm-ppc/5xx_immap.h +++ b/include/asm-ppc/5xx_immap.h @@ -17,95 +17,95 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, + * Foundation, */ /* * File: 5xx_immap.h - * + * * Discription: MPC555 Internal Memory Map - * + * */ - + #ifndef __IMMAP_5XX__ #define __IMMAP_5XX__ /* System Configuration Registers. */ typedef struct sys_conf { - uint sc_siumcr; - uint sc_sypcr; - char res1[6]; - ushort sc_swsr; - uint sc_sipend; - uint sc_simask; - uint sc_siel; - uint sc_sivec; - uint sc_tesr; - uint sc_sgpiodt1; - uint sc_sgpiodt2; - uint sc_sgpiocr; - uint sc_emcr; - uint sc_res1aa; - uint sc_res1ab; - uint sc_pdmcr; - char res3[192]; + uint sc_siumcr; + uint sc_sypcr; + char res1[6]; + ushort sc_swsr; + uint sc_sipend; + uint sc_simask; + uint sc_siel; + uint sc_sivec; + uint sc_tesr; + uint sc_sgpiodt1; + uint sc_sgpiodt2; + uint sc_sgpiocr; + uint sc_emcr; + uint sc_res1aa; + uint sc_res1ab; + uint sc_pdmcr; + char res3[192]; } sysconf5xx_t; /* Memory Controller Registers. */ typedef struct mem_ctlr { - uint memc_br0; - uint memc_or0; - uint memc_br1; - uint memc_or1; - uint memc_br2; - uint memc_or2; - uint memc_br3; - uint memc_or3; - char res1[32]; - uint memc_dmbr; - uint memc_dmor; - char res2[48]; - ushort memc_mstat; - ushort memc_res4a; - char res3[132]; + uint memc_br0; + uint memc_or0; + uint memc_br1; + uint memc_or1; + uint memc_br2; + uint memc_or2; + uint memc_br3; + uint memc_or3; + char res1[32]; + uint memc_dmbr; + uint memc_dmor; + char res2[48]; + ushort memc_mstat; + ushort memc_res4a; + char res3[132]; } memctl5xx_t; /* System Integration Timers. */ typedef struct sys_int_timers { - ushort sit_tbscr; - char res1[2]; - uint sit_tbref0; - uint sit_tbref1; - char res2[20]; - ushort sit_rtcsc; - char res3[2]; - uint sit_rtc; - uint sit_rtsec; - uint sit_rtcal; - char res4[16]; - ushort sit_piscr; - char res5[2]; - uint sit_pitc; - uint sit_pitr; - char res6[52]; + ushort sit_tbscr; + char res1[2]; + uint sit_tbref0; + uint sit_tbref1; + char res2[20]; + ushort sit_rtcsc; + char res3[2]; + uint sit_rtc; + uint sit_rtsec; + uint sit_rtcal; + char res4[16]; + ushort sit_piscr; + char res5[2]; + uint sit_pitc; + uint sit_pitr; + char res6[52]; } sit5xx_t; /* Clocks and Reset */ typedef struct clk_and_reset { - uint car_sccr; - uint car_plprcr; - ushort car_rsr; - ushort car_res7a; - ushort car_colir; - ushort car_res7b; - ushort car_vsrmcr; - ushort car_res7c; - char res1[108]; + uint car_sccr; + uint car_plprcr; + ushort car_rsr; + ushort car_res7a; + ushort car_colir; + ushort car_res7b; + ushort car_vsrmcr; + ushort car_res7c; + char res1[108]; } car5xx_t; @@ -114,19 +114,19 @@ /* System Integration Timer Keys */ typedef struct sitk { - uint sitk_tbscrk; - uint sitk_tbref0k; - uint sitk_tbref1k; - uint sitk_tbk; - char res1[16]; - uint sitk_rtcsck; - uint sitk_rtck; - uint sitk_rtseck; - uint sitk_rtcalk; - char res2[16]; - uint sitk_piscrk; - uint sitk_pitck; - char res3[56]; + uint sitk_tbscrk; + uint sitk_tbref0k; + uint sitk_tbref1k; + uint sitk_tbk; + char res1[16]; + uint sitk_rtcsck; + uint sitk_rtck; + uint sitk_rtseck; + uint sitk_rtcalk; + char res2[16]; + uint sitk_piscrk; + uint sitk_pitck; + char res3[56]; } sitk5xx_t; /* Clocks and Reset Keys. @@ -145,114 +145,114 @@ /* Flash Configuration */ typedef struct fl { - uint fl_cmfmcr; - uint fl_cmftst; - uint fl_cmfctl; - char res1[52]; + uint fl_cmfmcr; + uint fl_cmftst; + uint fl_cmfctl; + char res1[52]; } fl5xx_t; /* Dpram Control */ -typedef struct dprc { - ushort dprc_dptmcr; - ushort dprc_ramtst; - ushort dprc_rambar; - ushort dprc_misrh; - ushort dprc_misrl; - ushort dprc_miscnt; +typedef struct dprc { + ushort dprc_dptmcr; + ushort dprc_ramtst; + ushort dprc_rambar; + ushort dprc_misrh; + ushort dprc_misrl; + ushort dprc_miscnt; } dprc5xx_t; /* Time Processor Unit */ typedef struct tpu { - ushort tpu_tpumcr; - ushort tpu_tcr; - ushort tpu_dscr; - ushort tpu_dssr; - ushort tpu_ticr; - ushort tpu_cier; - ushort tpu_cfsr0; - ushort tpu_cfsr1; - ushort tpu_cfsr2; - ushort tpu_cfsr3; - ushort tpu_hsqr0; - ushort tpu_hsqr1; - ushort tpu_hsrr0; - ushort tpu_hsrr1; - ushort tpu_cpr0; - ushort tpu_cpr1; - ushort tpu_cisr; - ushort tpu_lr; - ushort tpu_sglr; - ushort tpu_dcnr; - ushort tpu_tpumcr2; - ushort tpu_tpumcr3; - ushort tpu_isdr; - ushort tpu_iscr; - char res1[208]; - char tpu[16][16]; - char res2[512]; + ushort tpu_tpumcr; + ushort tpu_tcr; + ushort tpu_dscr; + ushort tpu_dssr; + ushort tpu_ticr; + ushort tpu_cier; + ushort tpu_cfsr0; + ushort tpu_cfsr1; + ushort tpu_cfsr2; + ushort tpu_cfsr3; + ushort tpu_hsqr0; + ushort tpu_hsqr1; + ushort tpu_hsrr0; + ushort tpu_hsrr1; + ushort tpu_cpr0; + ushort tpu_cpr1; + ushort tpu_cisr; + ushort tpu_lr; + ushort tpu_sglr; + ushort tpu_dcnr; + ushort tpu_tpumcr2; + ushort tpu_tpumcr3; + ushort tpu_isdr; + ushort tpu_iscr; + char res1[208]; + char tpu[16][16]; + char res2[512]; } tpu5xx_t; /* QADC */ typedef struct qadc { - ushort qadc_64mcr; - ushort qadc_64test; - ushort qadc_64int; - u_char qadc_portqa; - u_char qadc_portqb; - ushort qadc_ddrqa; - ushort qadc_qacr0; - ushort qadc_qacr1; - ushort qadc_qacr2; - ushort qadc_qasr0; - ushort qadc_qasr1; - char res1[492]; + ushort qadc_64mcr; + ushort qadc_64test; + ushort qadc_64int; + u_char qadc_portqa; + u_char qadc_portqb; + ushort qadc_ddrqa; + ushort qadc_qacr0; + ushort qadc_qacr1; + ushort qadc_qacr2; + ushort qadc_qasr0; + ushort qadc_qasr1; + char res1[492]; /* command convertion word table */ - ushort qadc_ccw[64]; + ushort qadc_ccw[64]; /* result word table, unsigned right justified */ - ushort qadc_rjurr[64]; + ushort qadc_rjurr[64]; /* result word table, signed left justified */ - ushort qadc_ljsrr[64]; + ushort qadc_ljsrr[64]; /* result word table, unsigned left justified */ - ushort qadc_ljurr[64]; + ushort qadc_ljurr[64]; } qadc5xx_t; /* QSMCM */ typedef struct qsmcm { - ushort qsmcm_qsmcr; - ushort qsmcm_qtest; - ushort qsmcm_qdsci_il; - ushort qsmcm_qspi_il; - ushort qsmcm_scc1r0; - ushort qsmcm_scc1r1; - ushort qsmcm_sc1sr; - ushort qsmcm_sc1dr; - char res1[2]; - char res2[2]; - ushort qsmcm_portqs; - u_char qsmcm_pqspar; - u_char qsmcm_ddrqs; - ushort qsmcm_spcr0; - ushort qsmcm_spcr1; - ushort qsmcm_spcr2; - u_char qsmcm_spcr3; - u_char qsmcm_spsr; - ushort qsmcm_scc2r0; - ushort qsmcm_scc2r1; - ushort qsmcm_sc2sr; - ushort qsmcm_sc2dr; - ushort qsmcm_qsci1cr; - ushort qsmcm_qsci1sr; - ushort qsmcm_sctq[16]; - ushort qsmcm_scrq[16]; - char res3[212]; - ushort qsmcm_recram[32]; - ushort qsmcm_tranram[32]; - u_char qsmcm_comdram[32]; - char res[3616]; + ushort qsmcm_qsmcr; + ushort qsmcm_qtest; + ushort qsmcm_qdsci_il; + ushort qsmcm_qspi_il; + ushort qsmcm_scc1r0; + ushort qsmcm_scc1r1; + ushort qsmcm_sc1sr; + ushort qsmcm_sc1dr; + char res1[2]; + char res2[2]; + ushort qsmcm_portqs; + u_char qsmcm_pqspar; + u_char qsmcm_ddrqs; + ushort qsmcm_spcr0; + ushort qsmcm_spcr1; + ushort qsmcm_spcr2; + u_char qsmcm_spcr3; + u_char qsmcm_spsr; + ushort qsmcm_scc2r0; + ushort qsmcm_scc2r1; + ushort qsmcm_sc2sr; + ushort qsmcm_sc2dr; + ushort qsmcm_qsci1cr; + ushort qsmcm_qsci1sr; + ushort qsmcm_sctq[16]; + ushort qsmcm_scrq[16]; + char res3[212]; + ushort qsmcm_recram[32]; + ushort qsmcm_tranram[32]; + u_char qsmcm_comdram[32]; + char res[3616]; } qsmcm5xx_t; @@ -260,136 +260,136 @@ */ typedef struct mios { - ushort mios_mpwmsm0perr; /* mpwmsm0 */ - ushort mios_mpwmsm0pulr; - ushort mios_mpwmsm0cntr; - ushort mios_mpwmsm0scr; - ushort mios_mpwmsm1perr; /* mpwmsm1 */ - ushort mios_mpwmsm1pulr; - ushort mios_mpwmsm1cntr; - ushort mios_mpwmsm1scr; - ushort mios_mpwmsm2perr; /* mpwmsm2 */ - ushort mios_mpwmsm2pulr; - ushort mios_mpwmsm2cntr; - ushort mios_mpwmsm2scr; - ushort mios_mpwmsm3perr; /* mpwmsm3 */ - ushort mios_mpwmsm3pulr; - ushort mios_mpwmsm3cntr; - ushort mios_mpwmsm3scr; - char res1[16]; - ushort mios_mmcsm6cnt; /* mmcsm6 */ - ushort mios_mmcsm6mlr; - ushort mios_mmcsm6scrd, mmcsm6scr; - char res2[32]; - ushort mios_mdasm11ar; /* mdasm11 */ - ushort mios_mdasm11br; - ushort mios_mdasm11scrd, mdasm11scr; - ushort mios_mdasm12ar; /* mdasm12 */ - ushort mios_mdasm12br; - ushort mios_mdasm12scrd, mdasm12scr; - ushort mios_mdasm13ar; /* mdasm13 */ - ushort mios_mdasm13br; - ushort mios_mdasm13scrd, mdasm13scr; - ushort mios_mdasm14ar; /* mdasm14 */ - ushort mios_mdasm14br; - ushort mios_mdasm14scrd, mdasm14scr; - ushort mios_mdasm15ar; /* mdasm15 */ - ushort mios_mdasm15br; - ushort mios_mdasm15scrd, mdasm15scr; - ushort mios_mpwmsm16perr; /* mpwmsm16 */ - ushort mios_mpwmsm16pulr; - ushort mios_mpwmsm16cntr; - ushort mios_mpwmsm16scr; - ushort mios_mpwmsm17perr; /* mpwmsm17 */ - ushort mios_mpwmsm17pulr; - ushort mios_mpwmsm17cntr; - ushort mios_mpwmsm17scr; - ushort mios_mpwmsm18perr; /* mpwmsm18 */ - ushort mios_mpwmsm18pulr; - ushort mios_mpwmsm18cntr; - ushort mios_mpwmsm18scr; - ushort mios_mpwmsm19perr; /* mpwmsm19 */ - ushort mios_mpwmsm19pulr; - ushort mios_mpwmsm19cntr; - ushort mios_mpwmsm19scr; - char res3[16]; - ushort mios_mmcsm22cnt; /* mmcsm22 */ - ushort mios_mmcsm22mlr; - ushort mios_mmcsm22scrd, mmcsm22scr; - char res4[32]; - ushort mios_mdasm27ar; /* mdasm27 */ - ushort mios_mdasm27br; - ushort mios_mdasm27scrd, mdasm27scr; - ushort mios_mdasm28ar; /*mdasm28 */ - ushort mios_mdasm28br; - ushort mios_mdasm28scrd, mdasm28scr; - ushort mios_mdasm29ar; /* mdasm29 */ - ushort mios_mdasm29br; - ushort mios_mdasm29scrd, mdasm29scr; - ushort mios_mdasm30ar; /* mdasm30 */ - ushort mios_mdasm30br; - ushort mios_mdasm30scrd, mdasm30scr; - ushort mios_mdasm31ar; /* mdasm31 */ - ushort mios_mdasm31br; - ushort mios_mdasm31scrd, mdasm31scr; - ushort mios_mpiosm32dr; - ushort mios_mpiosm32ddr; - char res5[1788]; - ushort mios_mios1tpcr; - char mios_res13[2]; - ushort mios_mios1vnr; - ushort mios_mios1mcr; - char res6[12]; - ushort mios_res42z; - ushort mios_mcpsmscr; - char res7[1000]; - ushort mios_mios1sr0; - char res12[2]; - ushort mios_mios1er0; - ushort mios_mios1rpr0; - char res8[40]; - ushort mios_mios1lvl0; - char res9[14]; - ushort mios_mios1sr1; - char res10[2]; - ushort mios_mios1er1; - ushort mios_mios1rpr1; - char res11[40]; - ushort mios_mios1lvl1; - char res13[1038]; + ushort mios_mpwmsm0perr; /* mpwmsm0 */ + ushort mios_mpwmsm0pulr; + ushort mios_mpwmsm0cntr; + ushort mios_mpwmsm0scr; + ushort mios_mpwmsm1perr; /* mpwmsm1 */ + ushort mios_mpwmsm1pulr; + ushort mios_mpwmsm1cntr; + ushort mios_mpwmsm1scr; + ushort mios_mpwmsm2perr; /* mpwmsm2 */ + ushort mios_mpwmsm2pulr; + ushort mios_mpwmsm2cntr; + ushort mios_mpwmsm2scr; + ushort mios_mpwmsm3perr; /* mpwmsm3 */ + ushort mios_mpwmsm3pulr; + ushort mios_mpwmsm3cntr; + ushort mios_mpwmsm3scr; + char res1[16]; + ushort mios_mmcsm6cnt; /* mmcsm6 */ + ushort mios_mmcsm6mlr; + ushort mios_mmcsm6scrd, mmcsm6scr; + char res2[32]; + ushort mios_mdasm11ar; /* mdasm11 */ + ushort mios_mdasm11br; + ushort mios_mdasm11scrd, mdasm11scr; + ushort mios_mdasm12ar; /* mdasm12 */ + ushort mios_mdasm12br; + ushort mios_mdasm12scrd, mdasm12scr; + ushort mios_mdasm13ar; /* mdasm13 */ + ushort mios_mdasm13br; + ushort mios_mdasm13scrd, mdasm13scr; + ushort mios_mdasm14ar; /* mdasm14 */ + ushort mios_mdasm14br; + ushort mios_mdasm14scrd, mdasm14scr; + ushort mios_mdasm15ar; /* mdasm15 */ + ushort mios_mdasm15br; + ushort mios_mdasm15scrd, mdasm15scr; + ushort mios_mpwmsm16perr; /* mpwmsm16 */ + ushort mios_mpwmsm16pulr; + ushort mios_mpwmsm16cntr; + ushort mios_mpwmsm16scr; + ushort mios_mpwmsm17perr; /* mpwmsm17 */ + ushort mios_mpwmsm17pulr; + ushort mios_mpwmsm17cntr; + ushort mios_mpwmsm17scr; + ushort mios_mpwmsm18perr; /* mpwmsm18 */ + ushort mios_mpwmsm18pulr; + ushort mios_mpwmsm18cntr; + ushort mios_mpwmsm18scr; + ushort mios_mpwmsm19perr; /* mpwmsm19 */ + ushort mios_mpwmsm19pulr; + ushort mios_mpwmsm19cntr; + ushort mios_mpwmsm19scr; + char res3[16]; + ushort mios_mmcsm22cnt; /* mmcsm22 */ + ushort mios_mmcsm22mlr; + ushort mios_mmcsm22scrd, mmcsm22scr; + char res4[32]; + ushort mios_mdasm27ar; /* mdasm27 */ + ushort mios_mdasm27br; + ushort mios_mdasm27scrd, mdasm27scr; + ushort mios_mdasm28ar; /*mdasm28 */ + ushort mios_mdasm28br; + ushort mios_mdasm28scrd, mdasm28scr; + ushort mios_mdasm29ar; /* mdasm29 */ + ushort mios_mdasm29br; + ushort mios_mdasm29scrd, mdasm29scr; + ushort mios_mdasm30ar; /* mdasm30 */ + ushort mios_mdasm30br; + ushort mios_mdasm30scrd, mdasm30scr; + ushort mios_mdasm31ar; /* mdasm31 */ + ushort mios_mdasm31br; + ushort mios_mdasm31scrd, mdasm31scr; + ushort mios_mpiosm32dr; + ushort mios_mpiosm32ddr; + char res5[1788]; + ushort mios_mios1tpcr; + char mios_res13[2]; + ushort mios_mios1vnr; + ushort mios_mios1mcr; + char res6[12]; + ushort mios_res42z; + ushort mios_mcpsmscr; + char res7[1000]; + ushort mios_mios1sr0; + char res12[2]; + ushort mios_mios1er0; + ushort mios_mios1rpr0; + char res8[40]; + ushort mios_mios1lvl0; + char res9[14]; + ushort mios_mios1sr1; + char res10[2]; + ushort mios_mios1er1; + ushort mios_mios1rpr1; + char res11[40]; + ushort mios_mios1lvl1; + char res13[1038]; } mios5xx_t; /* Toucan Module */ typedef struct tcan { - ushort tcan_tcnmcr; - ushort tcan_cantcr; - ushort tcan_canicr; - u_char tcan_canctrl0; - u_char tcan_canctrl1; - u_char tcan_presdiv; - u_char tcan_canctrl2; - ushort tcan_timer; - char res1[4]; - ushort tcan_rxgmskhi; - ushort tcan_rxgmsklo; - ushort tcan_rx14mskhi; - ushort tcan_rx14msklo; - ushort tcan_rx15mskhi; - ushort tcan_rx15msklo; - char res2[4]; - ushort tcan_estat; - ushort tcan_imask; - ushort tcan_iflag; - u_char tcan_rxectr; - u_char tcan_txectr; - char res3[88]; - struct { - ushort scr; - ushort id_high; - ushort id_low; - u_char data[8]; - char res4[2]; + ushort tcan_tcnmcr; + ushort tcan_cantcr; + ushort tcan_canicr; + u_char tcan_canctrl0; + u_char tcan_canctrl1; + u_char tcan_presdiv; + u_char tcan_canctrl2; + ushort tcan_timer; + char res1[4]; + ushort tcan_rxgmskhi; + ushort tcan_rxgmsklo; + ushort tcan_rx14mskhi; + ushort tcan_rx14msklo; + ushort tcan_rx15mskhi; + ushort tcan_rx15msklo; + char res2[4]; + ushort tcan_estat; + ushort tcan_imask; + ushort tcan_iflag; + u_char tcan_rxectr; + u_char tcan_txectr; + char res3[88]; + struct { + ushort scr; + ushort id_high; + ushort id_low; + u_char data[8]; + char res4[2]; } tcan_mbuff[16]; char res5[640]; } tcan5xx_t; @@ -397,44 +397,43 @@ /* UIMB */ typedef struct uimb { - uint uimb_umcr; - char res1[12]; - uint uimb_utstcreg; - char res2[12]; - uint uimb_uipend; + uint uimb_umcr; + char res1[12]; + uint uimb_utstcreg; + char res2[12]; + uint uimb_uipend; } uimb5xx_t; - /* Internal Memory Map MPC555 */ typedef struct immap { - char res1[262144]; /* CMF Flash A 256 Kbytes */ - char res2[196608]; /* CMF Flash B 192 Kbytes */ - char res3[2670592]; /* Reserved for Flash */ - sysconf5xx_t im_siu_conf; /* SIU Configuration */ - memctl5xx_t im_memctl; /* Memory Controller */ - sit5xx_t im_sit; /* System Integration Timers */ - car5xx_t im_clkrst; /* Clocks and Reset */ - sitk5xx_t im_sitk; /* System Integration Timer Keys*/ - cark8xx_t im_clkrstk; /* Clocks and Resert Keys */ - fl5xx_t im_fla; /* Flash Module A */ - fl5xx_t im_flb; /* Flash Module B */ - char res4[14208]; /* Reserved for SIU */ - dprc5xx_t im_dprc; /* Dpram Control Register */ - char res5[8180]; /* Reserved */ - char dptram[6144]; /* Dptram */ - char res6[2048]; /* Reserved */ - tpu5xx_t im_tpua; /* Time Proessing Unit A */ - tpu5xx_t im_tpub; /* Time Processing Unit B */ - qadc5xx_t im_qadca; /* QADC A */ - qadc5xx_t im_qadcb; /* QADC B */ - qsmcm5xx_t im_qsmcm; /* SCI and SPI */ - mios5xx_t im_mios; /* MIOS */ - tcan5xx_t im_tcana; /* Toucan A */ - tcan5xx_t im_tcanb; /* Toucan B */ - char res7[1792]; /* Reserved */ - uimb5xx_t im_uimb; /* UIMB */ + char res1[262144]; /* CMF Flash A 256 Kbytes */ + char res2[196608]; /* CMF Flash B 192 Kbytes */ + char res3[2670592]; /* Reserved for Flash */ + sysconf5xx_t im_siu_conf; /* SIU Configuration */ + memctl5xx_t im_memctl; /* Memory Controller */ + sit5xx_t im_sit; /* System Integration Timers */ + car5xx_t im_clkrst; /* Clocks and Reset */ + sitk5xx_t im_sitk; /* System Integration Timer Keys*/ + cark8xx_t im_clkrstk; /* Clocks and Resert Keys */ + fl5xx_t im_fla; /* Flash Module A */ + fl5xx_t im_flb; /* Flash Module B */ + char res4[14208]; /* Reserved for SIU */ + dprc5xx_t im_dprc; /* Dpram Control Register */ + char res5[8180]; /* Reserved */ + char dptram[6144]; /* Dptram */ + char res6[2048]; /* Reserved */ + tpu5xx_t im_tpua; /* Time Proessing Unit A */ + tpu5xx_t im_tpub; /* Time Processing Unit B */ + qadc5xx_t im_qadca; /* QADC A */ + qadc5xx_t im_qadcb; /* QADC B */ + qsmcm5xx_t im_qsmcm; /* SCI and SPI */ + mios5xx_t im_mios; /* MIOS */ + tcan5xx_t im_tcana; /* Toucan A */ + tcan5xx_t im_tcanb; /* Toucan B */ + char res7[1792]; /* Reserved */ + uimb5xx_t im_uimb; /* UIMB */ } immap_t; #endif /* __IMMAP_5XX__ */ diff --git a/include/asm-ppc/bitops.h b/include/asm-ppc/bitops.h index 5326686..3264915 100644 --- a/include/asm-ppc/bitops.h +++ b/include/asm-ppc/bitops.h @@ -285,7 +285,7 @@ */ #define ext2_find_first_zero_bit(addr, size) \ - ext2_find_next_zero_bit((addr), (size), 0) + ext2_find_next_zero_bit((addr), (size), 0) extern __inline__ unsigned long ext2_find_next_zero_bit(void *addr, unsigned long size, unsigned long offset) diff --git a/include/asm-ppc/global_data.h b/include/asm-ppc/global_data.h index f242d1b..19c7fd8 100644 --- a/include/asm-ppc/global_data.h +++ b/include/asm-ppc/global_data.h @@ -83,7 +83,7 @@ #endif #ifdef CONFIG_LWMON unsigned long kbd_status; -#endif +#endif } gd_t; /* diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h index 652b12b..8e5fe11 100644 --- a/include/asm-ppc/io.h +++ b/include/asm-ppc/io.h @@ -126,7 +126,7 @@ int ret; __asm__ __volatile__("lhbrx %0,0,%1; eieio" : "=r" (ret) : - "r" (addr), "m" (*addr)); + "r" (addr), "m" (*addr)); return ret; } @@ -141,7 +141,7 @@ extern inline void out_le16(volatile u16 *addr, int val) { __asm__ __volatile__("sthbrx %1,0,%2; eieio" : "=m" (*addr) : - "r" (val), "r" (addr)); + "r" (val), "r" (addr)); } extern inline void out_be16(volatile u16 *addr, int val) @@ -154,7 +154,7 @@ unsigned ret; __asm__ __volatile__("lwbrx %0,0,%1; eieio" : "=r" (ret) : - "r" (addr), "m" (*addr)); + "r" (addr), "m" (*addr)); return ret; } @@ -169,7 +169,7 @@ extern inline void out_le32(volatile unsigned *addr, int val) { __asm__ __volatile__("stwbrx %1,0,%2; eieio" : "=m" (*addr) : - "r" (val), "r" (addr)); + "r" (val), "r" (addr)); } extern inline void out_be32(volatile unsigned *addr, int val) diff --git a/include/asm-ppc/m8260_pci.h b/include/asm-ppc/m8260_pci.h index 26756581..45f01de 100644 --- a/include/asm-ppc/m8260_pci.h +++ b/include/asm-ppc/m8260_pci.h @@ -35,8 +35,8 @@ /* - * Outbound ATU registers (3 sets). These registers control how 60x bus (local) - * addresses are translated to PCI addresses when the MPC826x is a PCI bus + * Outbound ATU registers (3 sets). These registers control how 60x bus (local) + * addresses are translated to PCI addresses when the MPC826x is a PCI bus * master (initiator). */ @@ -87,7 +87,7 @@ #define PCIGCR_PCI_BUS_EN 0x1 /* - * Inbound ATU registers (2 sets). These registers control how PCI addresses + * Inbound ATU registers (2 sets). These registers control how PCI addresses * are translated to 60x bus (local) addresses when the MPC826x is a PCI bus target. */ diff --git a/include/asm-ppc/pci_io.h b/include/asm-ppc/pci_io.h index 0f57b53..9b738c3 100644 --- a/include/asm-ppc/pci_io.h +++ b/include/asm-ppc/pci_io.h @@ -9,20 +9,20 @@ #define pci_read_le16(addr, dest) \ __asm__ __volatile__("lhbrx %0,0,%1" : "=r" (dest) : \ - "r" (addr), "m" (*addr)); + "r" (addr), "m" (*addr)); #define pci_write_le16(addr, val) \ __asm__ __volatile__("sthbrx %1,0,%2" : "=m" (*addr) : \ - "r" (val), "r" (addr)); + "r" (val), "r" (addr)); #define pci_read_le32(addr, dest) \ __asm__ __volatile__("lwbrx %0,0,%1" : "=r" (dest) : \ - "r" (addr), "m" (*addr)); + "r" (addr), "m" (*addr)); #define pci_write_le32(addr, val) \ __asm__ __volatile__("stwbrx %1,0,%2" : "=m" (*addr) : \ - "r" (val), "r" (addr)); + "r" (val), "r" (addr)); #define pci_readb(addr,b) ((b) = *(volatile u8 *) (addr)) #define pci_writeb(b,addr) ((*(volatile u8 *) (addr)) = (b)) diff --git a/include/asm-ppc/pnp.h b/include/asm-ppc/pnp.h index 15bf7f1..22ceba2 100644 --- a/include/asm-ppc/pnp.h +++ b/include/asm-ppc/pnp.h @@ -324,8 +324,8 @@ GeneralFloppy = 0, Compatible765 = 1, NS398_Floppy = 2, /* NS Super I/O wired to use index - register at port 398 and data - register at port 399 */ + register at port 398 and data + register at port 399 */ NS26E_Floppy = 3, /* Ports 26E and 26F */ NS15C_Floppy = 4, /* Ports 15C and 15D */ NS2E_Floppy = 5, /* Ports 2E and 2F */ @@ -366,8 +366,8 @@ Compatible16450 = 2, Compatible16550 = 3, NS398SerPort = 4, /* NS Super I/O wired to use index - register at port 398 and data - register at port 399 */ + register at port 398 and data + register at port 399 */ NS26ESerPort = 5, /* Ports 26E and 26F */ NS15CSerPort = 6, /* Ports 15C and 15D */ NS2ESerPort = 7, /* Ports 2E and 2F */ @@ -375,8 +375,8 @@ GeneralParPort = 0, LPTx = 1, NS398ParPort = 2, /* NS Super I/O wired to use index - register at port 398 and data - register at port 399 */ + register at port 398 and data + register at port 399 */ NS26EParPort = 3, /* Ports 26E and 26F */ NS15CParPort = 4, /* Ports 15C and 15D */ NS2EParPort = 5, /* Ports 2E and 2F */ @@ -436,14 +436,14 @@ typedef struct _SERIAL_ID { unsigned char VendorID0; /* Bit(7)=0 */ - /* Bits(6:2)=1st character in */ - /* compressed ASCII */ - /* Bits(1:0)=2nd character in */ - /* compressed ASCII bits(4:3) */ + /* Bits(6:2)=1st character in */ + /* compressed ASCII */ + /* Bits(1:0)=2nd character in */ + /* compressed ASCII bits(4:3) */ unsigned char VendorID1; /* Bits(7:5)=2nd character in */ - /* compressed ASCII bits(2:0) */ - /* Bits(4:0)=3rd character in */ - /* compressed ASCII */ + /* compressed ASCII bits(2:0) */ + /* Bits(4:0)=3rd character in */ + /* compressed ASCII */ unsigned char VendorID2; /* Product number - vendor assigned */ unsigned char VendorID3; /* Product number - vendor assigned */ @@ -511,8 +511,8 @@ unsigned char Tag; /* small tag = 0x15 or 0x16 */ unsigned char DevId[4]; /* Logical device id */ unsigned char Flags[2]; /* bit(0) boot device; */ - /* bit(7:1) cmd in range x31-x37 */ - /* bit(7:0) cmd in range x28-x3f (opt)*/ + /* bit(7:1) cmd in range x31-x37 */ + /* bit(7:0) cmd in range x28-x3f (opt)*/ } S2_Pack; struct _S3_Pack{ /* COMPATIBLE DEVICE ID PACKET */ @@ -523,13 +523,13 @@ struct _S4_Pack{ /* IRQ PACKET */ unsigned char Tag; /* small tag = 0x22 or 0x23 */ unsigned char IRQMask[2]; /* bit(0) is IRQ0, ...; */ - /* bit(0) is IRQ8 ... */ + /* bit(0) is IRQ8 ... */ unsigned char IRQInfo; /* optional; assume bit(0)=1; else */ - /* bit(0) - high true edge sensitive */ - /* bit(1) - low true edge sensitive */ - /* bit(2) - high true level sensitive*/ - /* bit(3) - low true level sensitive */ - /* bit(7:4) - must be 0 */ + /* bit(0) - high true edge sensitive */ + /* bit(1) - low true edge sensitive */ + /* bit(2) - high true level sensitive*/ + /* bit(3) - low true level sensitive */ + /* bit(7:4) - must be 0 */ } S4_Pack; struct _S5_Pack{ /* DMA PACKET */ @@ -541,9 +541,9 @@ struct _S6_Pack{ /* START DEPENDENT FUNCTION PACKET */ unsigned char Tag; /* small tag = 0x30 or 0x31 */ unsigned char Priority; /* Optional; if missing then x01; else*/ - /* x00 = best possible */ - /* x01 = acceptible */ - /* x02 = sub-optimal but functional */ + /* x00 = best possible */ + /* x01 = acceptible */ + /* x02 = sub-optimal but functional */ } S6_Pack; struct _S7_Pack{ /* END DEPENDENT FUNCTION PACKET */ @@ -571,9 +571,9 @@ union _S14_Data{ unsigned char Data[7]; /* Vendor defined */ struct _S14_PPCPack{ /* Pr*p s14 pack */ - unsigned char Type; /* 00=non-IBM */ - unsigned char PPCData[6]; /* Vendor defined */ - } S14_PPCPack; + unsigned char Type; /* 00=non-IBM */ + unsigned char PPCData[6]; /* Vendor defined */ + } S14_PPCPack; } S14_Data; } S14_Pack; @@ -587,7 +587,7 @@ unsigned char Count0; /* x09 */ unsigned char Count1; /* x00 */ unsigned char Data[9]; /* a variable array of bytes, */ - /* count in tag */ + /* count in tag */ } L1_Pack; struct _L2_Pack{ /* ANSI ID STRING PACKET */ @@ -595,7 +595,7 @@ unsigned char Count0; /* Length of string */ unsigned char Count1; unsigned char Identifier[1]; /* a variable array of bytes, */ - /* count in tag */ + /* count in tag */ } L2_Pack; struct _L3_Pack{ /* UNICODE ID STRING PACKET */ @@ -605,7 +605,7 @@ unsigned char Country0; /* TBD */ unsigned char Country1; /* TBD */ unsigned char Identifier[1]; /* a variable array of bytes, */ - /* count in tag */ + /* count in tag */ } L3_Pack; struct _L4_Pack{ /* VENDOR DEFINED PACKET */ @@ -614,12 +614,12 @@ unsigned char Count1; union _L4_Data{ unsigned char Data[1]; /* a variable array of bytes, */ - /* count in tag */ + /* count in tag */ struct _L4_PPCPack{ /* Pr*p L4 packet */ - unsigned char Type; /* 00=non-IBM */ - unsigned char PPCData[1]; /* a variable array of bytes, */ - /* count in tag */ - } L4_PPCPack; + unsigned char Type; /* 00=non-IBM */ + unsigned char PPCData[1]; /* a variable array of bytes, */ + /* count in tag */ + } L4_PPCPack; } L4_Data; } L4_Pack; diff --git a/include/asm-ppc/ptrace.h b/include/asm-ppc/ptrace.h index 93a75bd..3c2f4e6 100644 --- a/include/asm-ppc/ptrace.h +++ b/include/asm-ppc/ptrace.h @@ -105,4 +105,3 @@ #define PT_FPSCR (PT_FPR0 + 2*32 + 1) #endif - diff --git a/include/asm-ppc/residual.h b/include/asm-ppc/residual.h index c037a4e..dc85edb 100644 --- a/include/asm-ppc/residual.h +++ b/include/asm-ppc/residual.h @@ -76,15 +76,15 @@ /* Box dependent stuff */ unsigned char PrintableModel[32]; /* Null terminated string. - Must be of the form: - vvv,<20h>,,<0x0> - where vvv is the vendor ID - e.g. IBM PPS MODEL 6015<0x0> */ + Must be of the form: + vvv,<20h>,,<0x0> + where vvv is the vendor ID + e.g. IBM PPS MODEL 6015<0x0> */ unsigned char Serial[16]; /* 12/94: - Serial Number; must be of the form: - vvv where vvv is the - vendor ID. - e.g. IBM60151234567<20h><20h> */ + Serial Number; must be of the form: + vvv where vvv is the + vendor ID. + e.g. IBM60151234567<20h><20h> */ unsigned char Reserved[48]; unsigned long FirmwareSupplier; /* See FirmwareSuppliers enum */ unsigned long FirmwareSupports; /* See FirmwareSupport enum */ @@ -103,22 +103,22 @@ unsigned long WordWidth; /* Word width in bits */ unsigned long PageSize; /* Page size in bytes */ unsigned long CoherenceBlockSize; /* Unit of transfer in/out of cache - for which coherency is maintained; - normally <= CacheLineSize. */ + for which coherency is maintained; + normally <= CacheLineSize. */ unsigned long GranuleSize; /* Unit of lock allocation to avoid */ - /* false sharing of locks. */ + /* false sharing of locks. */ /* L1 Cache variables */ unsigned long CacheSize; /* L1 Cache size in KB. This is the */ - /* total size of the L1, whether */ - /* combined or split */ + /* total size of the L1, whether */ + /* combined or split */ unsigned long CacheAttrib; /* L1CACHE_TYPE */ unsigned long CacheAssoc; /* L1 Cache associativity. Use this - for combined cache. If split, put - zeros here. */ + for combined cache. If split, put + zeros here. */ unsigned long CacheLineSize; /* L1 Cache line size in bytes. Use - for combined cache. If split, put - zeros here. */ + for combined cache. If split, put + zeros here. */ /* For split L1 Cache: (= combined if combined cache) */ unsigned long I_CacheSize; unsigned long I_CacheAssoc; @@ -131,8 +131,8 @@ unsigned long TLBSize; /* Total number of TLBs on the system */ unsigned long TLBAttrib; /* Combined I+D or split TLB */ unsigned long TLBAssoc; /* TLB Associativity. Use this for - combined TLB. If split, put zeros - here. */ + combined TLB. If split, put zeros + here. */ /* For split TLB: (= combined if combined TLB) */ unsigned long I_TLBSize; unsigned long I_TLBAssoc; @@ -140,7 +140,7 @@ unsigned long D_TLBAssoc; unsigned long ExtendedVPD; /* Offset to extended VPD area; - null if unused */ + null if unused */ } VPD; typedef enum _DEVICE_FLAGS { @@ -148,11 +148,11 @@ Integrated = 0x2000, Failed = 0x1000, /* 1 - device failed POST code tests */ Static = 0x0800, /* 0 - dynamically configurable - 1 - static */ + 1 - static */ Dock = 0x0400, /* 0 - not a docking station device - 1 - is a docking station device */ + 1 - is a docking station device */ Boot = 0x0200, /* 0 - device cannot be used for BOOT - 1 - can be a BOOT device */ + 1 - can be a BOOT device */ Configurable = 0x0100, /* 1 - device is configurable */ Disableable = 0x80, /* 1 - device can be disabled */ PowerManaged = 0x40, /* 0 - not managed; 1 - managed */ @@ -180,7 +180,7 @@ unsigned long BusId; /* See BUS_ID enum above */ unsigned long DevId; /* Big Endian format */ unsigned long SerialNum; /* For multiple usage of a single - DevId */ + DevId */ unsigned long Flags; /* See DEVICE_FLAGS enum above */ unsigned char BaseType; /* See pnp.h for bit definitions */ unsigned char SubType; /* See pnp.h for bit definitions */ @@ -196,7 +196,7 @@ } PnPAccess; struct _ISAAccess{ unsigned char SlotNumber; /* ISA Slot Number generally not - available; 0 if unknown */ + available; 0 if unknown */ unsigned char LogicalDevNumber; unsigned short ISAReserved; } ISAAccess; @@ -249,9 +249,9 @@ typedef struct _PPC_CPU { unsigned long CpuType; /* Result of mfspr from Processor - Version Register (PVR). - PVR(0-15) = Version (e.g. 601) - PVR(16-31 = EC Level */ + Version Register (PVR). + PVR(0-15) = Version (e.g. 601) + PVR(16-31 = EC Level */ unsigned char CpuNumber; /* CPU Number for this processor */ unsigned char CpuState; /* CPU State, see CPU_STATE enum */ unsigned short Reserved; @@ -259,7 +259,7 @@ typedef struct _PPC_MEM { unsigned long SIMMSize; /* 0 - absent or bad - 8M, 32M (in MB) */ + 8M, 32M (in MB) */ } PPC_MEM; typedef enum _MEM_USAGE { @@ -297,8 +297,8 @@ /* CPU */ unsigned short MaxNumCpus; /* Max CPUs in this system */ unsigned short ActualNumCpus; /* ActualNumCpus < MaxNumCpus means */ - /* that there are unpopulated or */ - /* otherwise unusable cpu locations */ + /* that there are unpopulated or */ + /* otherwise unusable cpu locations */ PPC_CPU Cpus[MAX_CPUS]; /* Memory */ unsigned long TotalMemory; /* Total amount of memory installed */ @@ -329,4 +329,3 @@ int n); #endif /* __ASSEMBLY__ */ #endif /* ndef _RESIDUAL_ */ - diff --git a/include/at91rm9200_net.h b/include/at91rm9200_net.h index e41fe3c..19f0d3e 100644 --- a/include/at91rm9200_net.h +++ b/include/at91rm9200_net.h @@ -1,7 +1,7 @@ /* * Ethernet: An implementation of the Ethernet Device Driver suite for the * uClinux 2.0.38 operating system. This Driver has been developed - * for AT75C220 board. + * for AT75C220 board. * * NOTE: The driver is implemented for one MAC * @@ -39,7 +39,7 @@ unsigned int (*IsPhyConnected)(AT91S_EMAC *pmac); unsigned char (*GetLinkSpeed)(AT91S_EMAC *pmac); unsigned char (*AutoNegotiate)(AT91S_EMAC *pmac, int *); - + } AT91S_PhyOps,*AT91PS_PhyOps; @@ -56,4 +56,3 @@ void at91rm92000_GetPhyInterface(void ); #endif /* AT91RM9200_ETHERNET */ - diff --git a/include/bedbug/tables.h b/include/bedbug/tables.h index 794741a..66cf8ea 100644 --- a/include/bedbug/tables.h +++ b/include/bedbug/tables.h @@ -599,4 +599,3 @@ * warranties of merchantability and fitness for a particular * purpose. */ - diff --git a/include/bedbug/type.h b/include/bedbug/type.h new file mode 100644 index 0000000..38ee9de --- /dev/null +++ b/include/bedbug/type.h @@ -0,0 +1,26 @@ +#ifndef _TYPE_BEDBUG_H +#define _TYPE_BEDBUG_H + +/* Supporting routines */ +int bedbug_puts (const char *); +void bedbug_init (void); +void bedbug860_init (void); +void do_bedbug_breakpoint (struct pt_regs *); +void bedbug_main_loop (unsigned long, struct pt_regs *); + + +typedef struct { + int hw_debug_enabled; + int stopped; + int current_bp; + struct pt_regs *regs; + + void (*do_break) (cmd_tbl_t *, int, int, char *[]); + void (*break_isr) (struct pt_regs *); + int (*find_empty) (void); + int (*set) (int, unsigned long); + int (*clear) (int); +} CPU_DEBUG_CTX; + + +#endif /* _TYPE_BEDBUG_H */ diff --git a/include/bmp_layout.h b/include/bmp_layout.h index 7285a26..9d90e7f 100644 --- a/include/bmp_layout.h +++ b/include/bmp_layout.h @@ -56,7 +56,7 @@ __u32 colors_used; __u32 colors_important; /* ColorTable */ - + } __attribute__((packed)) bmp_header_t; typedef struct bmp_image { diff --git a/include/cmd_autoscript.h b/include/cmd_autoscript.h index 520cfc9..ca5fdb5 100644 --- a/include/cmd_autoscript.h +++ b/include/cmd_autoscript.h @@ -28,20 +28,7 @@ #if (CONFIG_COMMANDS & CFG_CMD_AUTOSCRIPT) -#define CMD_TBL_AUTOSCRIPT MK_CMD_TBL_ENTRY( \ - "autoscr", 5, 2, 0, do_autoscript, \ - "autoscr - run script from memory\n", \ - "[addr] - run script starting at addr. " \ - "A valid autoscr header must be present\n" \ -), - int autoscript (ulong addr); -int do_autoscript (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else - -#define CMD_TBL_AUTOSCRIPT - #endif #endif /* _CMD_AUTOSCRIPT_H_ */ diff --git a/include/cmd_bedbug.h b/include/cmd_bedbug.h deleted file mode 100644 index 105441e..0000000 --- a/include/cmd_bedbug.h +++ /dev/null @@ -1,117 +0,0 @@ -/* - * BedBug Functions - */ -#ifndef _CMD_BEDBUG_H -#define _CMD_BEDBUG_H - -#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) - -#define CMD_TBL_DIS MK_CMD_TBL_ENTRY( \ - "ds", 2, 3, 1, do_bedbug_dis, \ - "ds - disassemble memory\n", \ - "ds
[# instructions]\n" \ - ), - -#define CMD_TBL_ASM MK_CMD_TBL_ENTRY( \ - "as", 2, 2, 0, do_bedbug_asm, \ - "as - assemble memory\n", \ - "as
\n" \ - ), - -#define CMD_TBL_BREAK MK_CMD_TBL_ENTRY( \ - "break", 2, 3, 0, do_bedbug_break, \ - "break - set or clear a breakpoint\n", \ - " - Set or clear a breakpoint\n" \ - "break
- Break at an address\n" \ - "break off - Disable breakpoint.\n" \ - "break show - List breakpoints.\n" \ - ), - -#define CMD_TBL_CONTINUE MK_CMD_TBL_ENTRY( \ - "continue", 4, 1, 0, do_bedbug_continue, \ - "continue- continue from a breakpoint\n", \ - " - continue from a breakpoint.\n" \ - ), - -#define CMD_TBL_STEP MK_CMD_TBL_ENTRY( \ - "step", 4, 1, 1, do_bedbug_step, \ - "step - single step execution.\n", \ - " - single step execution.\n" \ - ), - -#define CMD_TBL_NEXT MK_CMD_TBL_ENTRY( \ - "next", 4, 1, 1, do_bedbug_next, \ - "next - single step execution, stepping over subroutines.\n",\ - " - single step execution, stepping over subroutines.\n" \ - ), - -#define CMD_TBL_STACK MK_CMD_TBL_ENTRY( \ - "where", 5, 1, 1, do_bedbug_stack, \ - "where - Print the running stack.\n", \ - " - Print the running stack.\n" \ - ), - -#define CMD_TBL_RDUMP MK_CMD_TBL_ENTRY( \ - "rdump", 5, 1, 1, do_bedbug_rdump, \ - "rdump - Show registers.\n", \ - " - Show registers.\n" \ - ), - -extern int do_bedbug_dis (cmd_tbl_t *, int, int, char *[]); -extern int do_bedbug_asm (cmd_tbl_t *, int, int, char *[]); -extern int do_bedbug_break (cmd_tbl_t *, int, int, char *[]); -extern int do_bedbug_continue (cmd_tbl_t *, int, int, char *[]); -extern int do_bedbug_step (cmd_tbl_t *, int, int, char *[]); -extern int do_bedbug_next (cmd_tbl_t *, int, int, char *[]); -extern int do_bedbug_stack (cmd_tbl_t *, int, int, char *[]); -extern int do_bedbug_rdump (cmd_tbl_t *, int, int, char *[]); - -/* Supporting routines */ -extern int bedbug_puts (const char *); -extern void bedbug_init (void); -extern void do_bedbug_breakpoint (struct pt_regs *); -extern void bedbug_main_loop (unsigned long, struct pt_regs *); - - -typedef struct { - int hw_debug_enabled; - int stopped; - int current_bp; - struct pt_regs *regs; - - void (*do_break) (cmd_tbl_t *, int, int, char *[]); - void (*break_isr) (struct pt_regs *); - int (*find_empty) (void); - int (*set) (int, unsigned long); - int (*clear) (int); -} CPU_DEBUG_CTX; - -#else /* ! CFG_CMD_BEDBUG */ - -#define CMD_TBL_DIS -#define CMD_TBL_ASM -#define CMD_TBL_BREAK -#define CMD_TBL_CONTINUE -#define CMD_TBL_STEP -#define CMD_TBL_NEXT -#define CMD_TBL_STACK -#define CMD_TBL_RDUMP - -#endif /* CFG_CMD_BEDBUG */ -#endif /* _CMD_BEDBUG_H */ - - -/* - * Copyright (c) 2001 William L. Pitts - * All rights reserved. - * - * Redistribution and use in source and binary forms are freely - * permitted provided that the above copyright notice and this - * paragraph and the following disclaimer are duplicated in all - * such forms. - * - * This software is provided "AS IS" and without any express or - * implied warranties, including, without limitation, the implied - * warranties of merchantability and fitness for a particular - * purpose. - */ diff --git a/include/cmd_boot.h b/include/cmd_boot.h deleted file mode 100644 index 1bd9314..0000000 --- a/include/cmd_boot.h +++ /dev/null @@ -1,137 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Boot support - */ -#ifndef _CMD_BOOT_H -#define _CMD_BOOT_H - -#if (CONFIG_COMMANDS & CFG_CMD_BDI) -#define CMD_TBL_BDINFO MK_CMD_TBL_ENTRY( \ - "bdinfo", 2, 1, 1, do_bdinfo, \ - "bdinfo - print Board Info structure\n", \ - NULL \ -), -int do_bdinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_BDINFO -#endif - - -#define CMD_TBL_GO MK_CMD_TBL_ENTRY( \ - "go", 2, CFG_MAXARGS, 1, do_go, \ - "go - start application at address 'addr'\n", \ - "addr [arg ...]\n - start application at address 'addr'\n" \ - " passing 'arg' as arguments\n" \ -), -int do_go (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#if (CONFIG_COMMANDS & CFG_CMD_LOADS) -#ifdef CFG_LOADS_BAUD_CHANGE -#define CMD_TBL_LOADS MK_CMD_TBL_ENTRY( \ - "loads", 5, 3, 0, do_load_serial, \ - "loads - load S-Record file over serial line\n", \ - "[ off ] [ baud ]\n" \ - " - load S-Record file over serial line" \ - " with offset 'off' and baudrate 'baud'\n" \ -), -#else /* ! CFG_LOADS_BAUD_CHANGE */ -#define CMD_TBL_LOADS MK_CMD_TBL_ENTRY( \ - "loads", 5, 2, 0, do_load_serial, \ - "loads - load S-Record file over serial line\n", \ - "[ off ]\n" \ - " - load S-Record file over serial line with offset 'off'\n" \ -), -#endif /* CFG_LOADS_BAUD_CHANGE */ -int do_load_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -/* - * SAVES always requires LOADS support, but not vice versa - */ -#if (CONFIG_COMMANDS & CFG_CMD_SAVES) -#ifdef CFG_LOADS_BAUD_CHANGE -#define CMD_TBL_SAVES MK_CMD_TBL_ENTRY( \ - "saves", 5, 4, 0, do_save_serial, \ - "saves - save S-Record file over serial line\n", \ - "[ off ] [size] [ baud ]\n" \ - " - save S-Record file over serial line" \ - " with offset 'off', size 'size' and baudrate 'baud'\n" \ -), -#else /* ! CFG_LOADS_BAUD_CHANGE */ -#define CMD_TBL_SAVES MK_CMD_TBL_ENTRY( \ - "saves", 5, 3, 0, do_save_serial, \ - "saves - save S-Record file over serial line\n", \ - "[ off ] [size]\n" \ - " - save S-Record file over serial line with offset 'off' and size 'size'\n" \ -), -#endif /* CFG_LOADS_BAUD_CHANGE */ - -int do_save_serial (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else /* ! CFG_CMD_SAVES */ -#define CMD_TBL_SAVES -#endif /* CFG_CMD_SAVES */ - -#else /* ! CFG_CMD_LOADS */ -#define CMD_TBL_LOADS -#define CMD_TBL_SAVES -#endif /* CFG_CMD_LOADS */ - - -#if (CONFIG_COMMANDS & CFG_CMD_LOADB) -#define CMD_TBL_LOADB MK_CMD_TBL_ENTRY( \ - "loadb", 5, 3, 0, do_load_serial_bin, \ - "loadb - load binary file over serial line (kermit mode)\n", \ - "[ off ] [ baud ]\n" \ - " - load binary file over serial line" \ - " with offset 'off' and baudrate 'baud'\n" \ -), -int do_load_serial_bin (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_LOADB -#endif /* CFG_CMD_LOADB */ - -#define CMD_TBL_RESET MK_CMD_TBL_ENTRY( \ - "reset", 5, 1, 0, do_reset, \ - "reset - Perform RESET of the CPU\n", \ - NULL \ -), - -/* Implemented in $(CPU)/cpu.c */ -int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#if (CONFIG_COMMANDS & CFG_CMD_HWFLOW) -#define CMD_TBL_HWFLOW MK_CMD_TBL_ENTRY( \ - "hwflow [on|off]", 2, 2, 0, do_hwflow, \ - "hwflow - turn the harwdare flow control on/off\n", \ - "\n - change RTS/CTS hardware flow control over serial line\n" \ -), - -int do_hwflow (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_HWFLOW -#endif -#endif /* _CMD_BOOT_H */ diff --git a/include/cmd_boota.h b/include/cmd_boota.h deleted file mode 100644 index 3ec3118..0000000 --- a/include/cmd_boota.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * (C) Copyright 2001 - * Thomas Frieden, Hyperion Entertainment - * ThomasF@hyperion-entertainment.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _CMD_BOOTA_H -#define _CMD_BOOTA_H - -#include -#include - -#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP) -#define CMD_TBL_BOOTA MK_CMD_TBL_ENTRY( \ - "boota", 5, 3, 1, do_boota, \ - "boota - boot an Amiga kernel\n", \ - "address disk" \ -), - -int do_boota (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] ); -#else -#define CMD_TBL_BOOTA -#endif - -#endif /* _CMD_BOOTA_H */ diff --git a/include/cmd_bootm.h b/include/cmd_bootm.h deleted file mode 100644 index 20c1267..0000000 --- a/include/cmd_bootm.h +++ /dev/null @@ -1,65 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Boot support - */ -#ifndef _CMD_BOOTM_H -#define _CMD_BOOTM_H -int do_bootm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#define CMD_TBL_BOOTM MK_CMD_TBL_ENTRY( \ - "bootm", 5, CFG_MAXARGS, 1, do_bootm, \ - "bootm - boot application image from memory\n", \ - "[addr [arg ...]]\n - boot application image stored in memory\n" \ - " passing arguments 'arg ...'; when booting a Linux kernel,\n" \ - " 'arg' can be the address of an initrd image\n" \ -), - -#if (CONFIG_COMMANDS & CFG_CMD_BOOTD) -int do_bootd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#define CMD_TBL_BOOTD MK_CMD_TBL_ENTRY( \ - "bootd", 4, 1, 1, do_bootd, \ - "bootd - boot default, i.e., run 'bootcmd'\n", \ - NULL \ -), -#else -#define CMD_TBL_BOOTD -#endif - -#if (CONFIG_COMMANDS & CFG_CMD_IMI) -int do_iminfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#define CMD_TBL_IMINFO MK_CMD_TBL_ENTRY( \ - "iminfo", 3, CFG_MAXARGS, 1, do_iminfo, \ - "iminfo - print header information for application image\n", \ - "addr [addr ...]\n" \ - " - print header information for application image starting at\n" \ - " address 'addr' in memory; this includes verification of the\n" \ - " image contents (magic number, header and payload checksums)\n" \ -), -#else -#define CMD_TBL_IMINFO -#endif - -#endif /* _CMD_BOOTM_H */ diff --git a/include/cmd_bsp.h b/include/cmd_bsp.h index 008008a..417d32f 100644 --- a/include/cmd_bsp.h +++ b/include/cmd_bsp.h @@ -24,322 +24,6 @@ #ifndef _CMD_BSP_H_ #define _CMD_BSP_H_ -#include -#include - -#if (CONFIG_COMMANDS & CFG_CMD_BSP) - -/* ----- LWMON --------------------------------------------------------- - */ -#if defined(CONFIG_LWMON) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "pic", 3, 4, 1, do_pic, \ - "pic - read and write PIC registers\n", \ - "read reg - read PIC register `reg'\n" \ - "pic write reg val - write value `val' to PIC register `reg'\n" \ -), MK_CMD_TBL_ENTRY( \ - "kbd", 3, 1, 1, do_kbd, \ - "kbd - read keyboard status\n", \ - NULL \ -), MK_CMD_TBL_ENTRY( \ - "lsb", 3, 2, 1, do_lsb, \ - "lsb - check and set LSB switch\n", \ - "on - switch LSB on\n" \ - "lsb off - switch LSB off\n" \ - "lsb - print current setting\n" \ -), -int do_pic (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_lsb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_LWMON */ -/* -------------------------------------------------------------------- */ - -/* ----- PCU E -------------------------------------------------------- */ -#if defined(CONFIG_PCU_E) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "puma", 4, 4, 1, do_puma, \ - "puma - access PUMA FPGA\n", \ - "status - print PUMA status\n" \ - "puma load addr len - load PUMA configuration data\n" \ -), -int do_puma (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_PCU_E */ -/* -------------------------------------------------------------------- */ - -/* ----- CCM/SCM ------------------------------------------------------ */ -#if defined(CONFIG_CCM) || defined(CONFIG_SCM) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "fpga", 4, 4, 1, do_fpga, \ - "fpga - access FPGA(s)\n", \ - "fpga status [name] - print FPGA status\n" \ - "fpga reset [name] - reset FPGA\n" \ - "fpga load [name] addr - load FPGA configuration data\n" \ -), -int do_fpga (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_CCM, CONFIG_SCM */ -/* -------------------------------------------------------------------- */ - -/* ----- PIP405 ------------------------------------------------------- */ -#if defined(CONFIG_PIP405) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "pip405", 4, 6, 1, do_pip405, \ - "pip405 - PIP405 specific Cmds\n", \ - "flash mem [SrcAddr] - updates U-Boot with image in memory\n" \ - "pip405 flash floppy [SrcAddr] - updates U-Boot with image from floppy\n" \ - "pip405 flash mps - updates U-Boot with image from MPS\n" \ -), -int do_pip405 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_PIP405 */ -/* -------------------------------------------------------------------- */ - -/* ----- MIP405 ------------------------------------------------------- */ -#if defined(CONFIG_MIP405) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "mip405", 4, 6, 1, do_mip405, \ - "mip405 - MIP405 specific Cmds\n", \ - "flash mem [SrcAddr] - updates U-Boot with image in memory\n" \ - "mip405 flash mps - updates U-Boot with image from MPS\n" \ -), -int do_mip405 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_MIP405 */ -/* ----- VCMA9 ----------------------------------------------------------------- - */ -#if defined(CONFIG_VCMA9) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "vcma9", 4, 6, 1, do_vcma9, \ - "vcma9 - VCMA9 specific Cmds\n", \ - "flash mem [SrcAddr] - updates U-Boot with image in memory\n" \ -), -int do_vcma9 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_VCMA9 */ -/* ----------------------------------------------------------------------------*/ - -/* ----- DASA_SIM ----------------------------------------------------- */ -#if defined(CONFIG_DASA_SIM) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "pci9054", 7, 3, 1, do_pci9054, \ - "pci9054 - PLX PCI9054 EEPROM access\n", \ - "pci9054 info - print EEPROM values\n" \ - "pci9054 update - updates EEPROM with default values\n" \ -), -int do_pci9054 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_DASA_SIM */ -/* -------------------------------------------------------------------- */ - -/* ----- HYMOD -------------------------------------------------------- */ -#if defined(CONFIG_HYMOD) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "fpga", 4, 6, 1, do_fpga, \ - "fpga - FPGA sub-system\n", \ - "load [type] addr size\n" \ - " - write the configuration data at memory address `addr',\n" \ - " size `size' bytes, into the FPGA of type `type' (either\n" \ - " `main' or `mezz', default `main'). e.g.\n" \ - " `fpga load 100000 7d8f'\n" \ - " loads the main FPGA with config data at address 100000\n" \ - " HEX, size 7d8f HEX (32143 DEC) bytes\n" \ - "fpga tftp file addr\n" \ - " - transfers `file' from the tftp server into memory at\n" \ - " address `addr', then writes the entire file contents\n" \ - " into the main FPGA\n" \ - "fpga store addr\n" \ - " - read configuration data from the main FPGA (the mezz\n" \ - " FPGA is write-only), into address `addr'. There must be\n" \ - " enough memory available at `addr' to hold all the config\n"\ - " data - the size of which is determined by VC:???\n" \ - "fpga info\n" \ - " - print information about the Hymod FPGA, namely the\n" \ - " memory addresses at which the four FPGA local bus\n" \ - " address spaces appear in the physical address space\n" \ -), MK_CMD_TBL_ENTRY( \ - "eeclear", 4, 1, 0, do_eecl, \ - "eeclear - Clear the eeprom on a Hymod board\n", \ - "[type]\n" \ - " - write zeroes into the EEPROM on the board of type `type'\n"\ - " (`type' is either `main' or `mezz' - default `main')\n" \ - " Note: the EEPROM write enable jumper must be installed\n" \ -), MK_CMD_TBL_ENTRY( \ - "htest", 5, 1, 0, do_htest, \ - "htest - run HYMOD tests\n", \ - NULL \ -), - -int do_fpga (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_eecl (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_htest(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_HYMOD */ -/* -------------------------------------------------------------------- */ - -/* ----- CRAY405 (L1) ------------------------------------------------- */ -#if defined (CONFIG_CRAYL1) -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "L1cmd", 5, 4, 1, do_crayL1, \ - "L1cmd - L1 update, setup, commands \n", \ - "L1cmd update - update flash images from host\n" \ - "L1cmd boot - nfs or ramboot L1\n" \ -), -int do_crayL1 (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#endif /* CONFIG_CRAY405 */ -/* -------------------------------------------------------------------- */ - -/* ----- EVB64260 ----------------------------------------------------- */ -#if defined (CONFIG_EVB64260) -#ifdef CONFIG_ZUMA_V2 -#define CMD_TBL_BSP ZUMA_TBL_ENTRY - -#define ZUMA_TBL_ENTRY MK_CMD_TBL_ENTRY( \ - "zinit", 5, 1, 0, do_zuma_init_pbb, \ - "zinit - init zuma pbb\n", \ - "\n" \ - " - init zuma pbb\n" \ -), MK_CMD_TBL_ENTRY( \ - "zdtest", 6, 3, 1, do_zuma_test_dma, \ - "zdtest - run dma test\n", \ - "[cmd [count]]\n" \ - " - run dma cmd (w=0,v=1,cp=2,cmp=3,wi=4,vi=5), count bytes\n" \ -), MK_CMD_TBL_ENTRY( \ - "zminit", 5, 1, 0, do_zuma_init_mbox, \ - "zminit - init zuma mbox\n", \ - "\n" \ - " - init zuma mbox\n" \ -), - -int do_zuma_init_pbb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_zuma_test_dma (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_zuma_init_mbox (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -void zuma_init_pbb(void); -int zuma_mbox_init(void); -int zuma_test_dma(int cmd, int size); -#else -#define CMD_TBL_BSP -#endif /* ZUMA_NTL */ - -#endif /* CONFIG_EVB64260 */ -/* -------------------------------------------------------------------- */ - -/* -----W7O------------------------------------------------------------ */ -#if defined(CONFIG_W7O) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "vpd", 3, 2, 1, do_vpd, \ - "vpd - Read Vital Product Data\n", \ - "[dev_addr]\n" \ - " - Read VPD Data from default address, or device address 'dev_addr'.\n" \ -), - -extern int do_vpd (cmd_tbl_t *, int, int, char *[]); - -#endif /* CONFIG_W7O */ -/* -------------------------------------------------------------------- */ - -/* ---- PCIPPC2 / PCIPPC6 --------------------------------------------- */ -#if defined(CONFIG_PCIPPC2) || defined(CONFIG_PCIPPC6) -#if defined(CONFIG_WATCHDOG) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "wd", 3, 2, 1, do_wd, \ - "wd - check and set watchdog\n", \ - "on - switch watchDog on\n" \ - "wd off - switch watchdog off\n" \ - "wd - print current status\n" \ -), - -extern int do_wd (cmd_tbl_t *, int, int, char *[]); - -#else -#define CMD_TBL_BSP -#endif /* CONFIG_WATCHDOG */ - -#endif /* CONFIG_PCIPPC2 , CONFIG_PCIPPC6 */ -/* -------------------------------------------------------------------- */ - -/* ----- PN62 --------------------------------------------------------- */ -#if defined(CONFIG_PN62) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "loadpci", 5, 2, 1, do_loadpci, \ - "loadpci - load binary file over PCI\n", \ - "[addr]\n" \ - " - load binary file over PCI to address 'addr'\n" \ -), MK_CMD_TBL_ENTRY( \ - "led" , 3, 3, 1, do_led, \ - "led - set LED 0..11 on the PN62 board\n", \ - "i fun\n" \ - " - set 'i'th LED to function 'fun'\n" \ -), - -extern int do_loadpci (cmd_tbl_t *, int, int, char *[]); -extern int do_led (cmd_tbl_t *, int, int, char *[]); -#endif /* CONFIG_PN62 */ -/* -------------------------------------------------------------------- */ - -/* ----- TRAB --------------------------------------------------------- */ -#if defined(CONFIG_TRAB) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "kbd", 3, 1, 1, do_kbd, \ - "kbd - read keyboard status\n", \ - NULL \ -), - -int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_TRAB */ -/* -------------------------------------------------------------------- */ - -/* ----- R360MPI ------------------------------------------------------ */ -#if defined(CONFIG_R360MPI) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "kbd", 3, 1, 1, do_kbd, \ - "kbd - read keyboard status\n", \ - NULL \ -), - -int do_kbd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_R360MPI */ -/* -------------------------------------------------------------------- */ - -/* ------ AMIGAONEG3SE ------------------------------------------------ */ -#if defined(CONFIG_AMIGAONEG3SE) - -#define CMD_TBL_BSP /* dummy */ - -#endif /* AmigaOneG3SE */ -/* ----- PCI405 ------------------------------------------------------- */ -#if defined(CONFIG_PCI405) - -#define CMD_TBL_BSP MK_CMD_TBL_ENTRY( \ - "loadpci", 7, 1, 1, do_loadpci, \ - "loadpci - wait for sync and boot image\n", \ - NULL \ -), - -int do_loadpci (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#endif /* CONFIG_PCI405 */ -/* -------------------------------------------------------------------- */ - -#else -#define CMD_TBL_BSP -#endif /* CFG_CMD_BSP */ +/* do not edit this file */ #endif /* _CMD_BSP_H_ */ diff --git a/include/cmd_cache.h b/include/cmd_cache.h deleted file mode 100644 index 479a846..0000000 --- a/include/cmd_cache.h +++ /dev/null @@ -1,51 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Cache support: switch on or off, get status - */ -#ifndef _CMD_CACHE_H -#define _CMD_CACHE_H - -#if (CONFIG_COMMANDS & CFG_CMD_CACHE) -#define CMD_TBL_ICACHE MK_CMD_TBL_ENTRY( \ - "icache", 2, 2, 1, do_icache, \ - "icache - enable or disable instruction cache\n", \ - "[on, off]\n" \ - " - enable or disable instruction cache\n" \ -), - -#define CMD_TBL_DCACHE MK_CMD_TBL_ENTRY( \ - "dcache", 2, 2, 1, do_dcache, \ - "dcache - enable or disable data cache\n", \ - "[on, off]\n" \ - " - enable or disable data (writethrough) cache\n" \ -), -int do_icache (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_dcache (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_ICACHE -#define CMD_TBL_DCACHE -#endif /* CFG_CMD_CACHE */ - -#endif /* _CMD_CACHE_H */ diff --git a/include/cmd_confdefs.h b/include/cmd_confdefs.h index 74614eb..577826c 100644 --- a/include/cmd_confdefs.h +++ b/include/cmd_confdefs.h @@ -136,7 +136,6 @@ #endif - /* * optional BOOTP fields */ diff --git a/include/cmd_console.h b/include/cmd_console.h deleted file mode 100644 index c5f90c9..0000000 --- a/include/cmd_console.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Network boot support - */ -#ifndef _CMD_CONSOLE_H -#define _CMD_CONSOLE_H - -#if (CONFIG_COMMANDS & CFG_CMD_CONSOLE) -#define CMD_TBL_CONINFO MK_CMD_TBL_ENTRY( \ - "coninfo", 5, 3, 1, do_coninfo, \ - "coninfo - print console devices and information\n", \ - "" \ -), -int do_coninfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_CONINFO -#endif /* CFG_CMD_CONSOLE */ - -#endif diff --git a/include/cmd_dcr.h b/include/cmd_dcr.h deleted file mode 100644 index 97196ad..0000000 --- a/include/cmd_dcr.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * (C) Copyright 2001 - * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * IBM 4XX DCR Functions - */ -#ifndef _CMD_DCR_H -#define _CMD_DCR_H - -#if defined(CONFIG_4xx) && defined(CFG_CMD_SETGETDCR) -#define CMD_TBL_GETDCR MK_CMD_TBL_ENTRY( \ - "getdcr", 6, 2, 1, do_getdcr, \ - "getdcr - Get an IBM PPC 4xx DCR's value\n", \ - "dcrn - return a DCR's value.\n" \ -), -#define CMD_TBL_SETDCR MK_CMD_TBL_ENTRY( \ - "setdcr", 6, 2, 1, do_setdcr, \ - "setdcr - Set an IBM PPC 4xx DCR's value\n", \ - "dcrn - set a DCR's value.\n" \ -), -extern int do_getdcr (cmd_tbl_t *, int, int, char *[]); -extern int do_setdcr (cmd_tbl_t *, int, int, char *[]); - -/* Supporting routines */ -extern unsigned long get_dcr(unsigned short dcrn); -extern unsigned long set_dcr(unsigned short dcrn, unsigned long value); - -#else - -#define CMD_TBL_GETDCR -#define CMD_TBL_SETDCR - -#endif /* CONFIG_4xx & CFG_CMD_SETGETDCR */ - -#endif /* _CMD_DCR_H */ diff --git a/include/cmd_diag.h b/include/cmd_diag.h deleted file mode 100644 index 8834a7f..0000000 --- a/include/cmd_diag.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * (C) Copyright 2002 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Diagnostics support - */ -#ifndef _CMD_DIAG_H -#define _CMD_DIAG_H - -#include - -#if (CONFIG_COMMANDS & CFG_CMD_DIAG) && defined(CONFIG_POST) -#define CMD_TBL_DIAG MK_CMD_TBL_ENTRY( \ - "diag", 4, CFG_MAXARGS, 0, do_diag, \ - "diag - perform board diagnostics\n", \ - " - print list of available tests\n" \ - "diag [test1 [test2]]\n" \ - " - print information about specified tests\n" \ - "diag run - run all available tests\n" \ - "diag run [test1 [test2]]\n" \ - " - run specified tests\n" \ -), - -int do_diag (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_DIAG -#endif /* CFG_CMD_DIAG */ - -#endif /* _CMD_DIAG_H */ diff --git a/include/cmd_doc.h b/include/cmd_doc.h deleted file mode 100644 index 07aa864..0000000 --- a/include/cmd_doc.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Disk-On-Chip support - */ -#ifndef _CMD_DOC_H -#define _CMD_DOC_H - -#include -#include - - -#if (CONFIG_COMMANDS & CFG_CMD_DOC) -#define CMD_TBL_DOC MK_CMD_TBL_ENTRY( \ - "doc", 3, 5, 1, do_doc, \ - "doc - Disk-On-Chip sub-system\n", \ - "info - show available DOC devices\n" \ - "doc device [dev] - show or set current device\n" \ - "doc read addr off size\n" \ - "doc write addr off size - read/write `size'" \ - " bytes starting at offset `off'\n" \ - " to/from memory address `addr'\n" \ - "doc erase off size - erase `size' bytes of DOC from offset `off'\n" \ -), - -#define CMD_TBL_DOCBOOT MK_CMD_TBL_ENTRY( \ - "docboot", 4, 4, 1, do_docboot, \ - "docboot - boot from DOC device\n", \ - "loadAddr dev\n" \ -), - -int do_doc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_docboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_DOC -#define CMD_TBL_DOCBOOT -#endif - -#endif /* _CMD_DOC_H */ diff --git a/include/cmd_dtt.h b/include/cmd_dtt.h deleted file mode 100644 index 57192a3..0000000 --- a/include/cmd_dtt.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * (C) Copyright 2001 - * Erik Theisen, Wave 7 Optics, etheisen@mindspring.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Read Digital Thermometers & Thermostats - */ -#ifndef _CMD_DTT_H -#define _CMD_DTT_H - -#if (CONFIG_COMMANDS & CFG_CMD_DTT) - -#define CMD_TBL_DTT MK_CMD_TBL_ENTRY( \ - "dtt", 3, 1, 1, do_dtt, \ - "dtt - Digital Thermometer and Themostat\n", \ - " - Read temperature from digital thermometer and thermostat.\n" \ -), -extern int do_dtt (cmd_tbl_t *, int, int, char *[]); - -#else - -#define CMD_TBL_DTT - -#endif /* (CONFIG_COMMANDS & CFG_CMD_DTT) */ - -#endif /* _CMD_DTT_H */ - diff --git a/include/cmd_eeprom.h b/include/cmd_eeprom.h deleted file mode 100644 index 26d929d..0000000 --- a/include/cmd_eeprom.h +++ /dev/null @@ -1,59 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * EEPROM support - */ -#ifndef _CMD_EEPROM_H -#define _CMD_EEPROM_H - -#include -#include - -#if (CONFIG_COMMANDS & CFG_CMD_EEPROM) - -#ifdef CFG_I2C_MULTI_EEPROMS -#define CMD_TBL_EEPROM MK_CMD_TBL_ENTRY( \ - "eeprom", 3, 6, 1, do_eeprom, \ - "eeprom - EEPROM sub-system\n", \ - "read devaddr addr off cnt\n" \ - "eeprom write devaddr addr off cnt\n" \ - " - read/write `cnt' bytes from `devaddr` EEPROM at offset `off'\n" \ -), -#else /* One EEPROM */ -#define CMD_TBL_EEPROM MK_CMD_TBL_ENTRY( \ - "eeprom", 3, 5, 1, do_eeprom, \ - "eeprom - EEPROM sub-system\n", \ - "read addr off cnt\n" \ - "eeprom write addr off cnt\n" \ - " - read/write `cnt' bytes at EEPROM offset `off'\n" \ -), -#endif /* CFG_I2C_MULTI_EEPROMS */ -int do_eeprom (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else - -#define CMD_TBL_EEPROM - -#endif /* CFG_CMD_EEPROM */ - -#endif /* _CMD_EEPROM_H */ diff --git a/include/cmd_elf.h b/include/cmd_elf.h deleted file mode 100644 index 64c52bc..0000000 --- a/include/cmd_elf.h +++ /dev/null @@ -1,34 +0,0 @@ -/* - * Elf Load/Boot Functions - */ -#ifndef _CMD_ELF_H -#define _CMD_ELF_H - -#if (CONFIG_COMMANDS & CFG_CMD_ELF) - -#define CMD_TBL_BOOTELF MK_CMD_TBL_ENTRY( \ - "bootelf", 7, 2, 0, do_bootelf, \ - "bootelf - Boot from an ELF image in memory\n", \ - " [address] - load address of ELF image.\n" \ - ), - -#define CMD_TBL_BOOTVX MK_CMD_TBL_ENTRY( \ - "bootvx", 6, 2, 0, do_bootvx, \ - "bootvx - Boot vxWorks from an ELF image\n", \ - " [address] - load address of vxWorks ELF image.\n" \ - ), - -extern int do_bootelf (cmd_tbl_t *, int, int, char *[]); -extern int do_bootvx (cmd_tbl_t *, int, int, char *[]); - -/* Supporting routines */ -extern int valid_elf_image (unsigned long); -extern unsigned long load_elf_image (unsigned long); - -#else /* ! CFG_CMD_ELF */ - -#define CMD_TBL_BOOTELF -#define CMD_TBL_BOOTVX - -#endif /* CFG_CMD_ELF */ -#endif /* _CMD_ELF_H */ diff --git a/include/cmd_fdc.h b/include/cmd_fdc.h deleted file mode 100644 index f51df1f..0000000 --- a/include/cmd_fdc.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * (C) Copyright 2001 - * Denis Peter, MPL AG, d.peter@mpl.ch - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Floppy support - */ -#ifndef _CMD_FDC_H -#define _CMD_FDC_H - -#include -#include - - -#if (CONFIG_COMMANDS & CFG_CMD_FDC) - -#define CMD_TBL_FDC MK_CMD_TBL_ENTRY( \ - "fdcboot", 4, 3, 1, do_fdcboot, \ - "fdcboot - boot from floppy device\n", \ - "loadAddr drive\n" \ -), -int do_fdcboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_FDC -#endif - -#endif /* _CMD_FDC_H */ diff --git a/include/cmd_fdos.h b/include/cmd_fdos.h deleted file mode 100644 index a444c7a..0000000 --- a/include/cmd_fdos.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * (C) Copyright 2002 - * St�ubli Faverges - - * Pierre AUBERT p.aubert@staubli.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Dos floppy support - */ -#ifndef _CMD_FDOS_H -#define _CMD_FDOS_H - -#include -#include - - -#if (CONFIG_COMMANDS & CFG_CMD_FDOS) - -#define CMD_TBL_FDOS_BOOT MK_CMD_TBL_ENTRY( \ - "fdosboot", 5, 3, 0, do_fdosboot, \ - "fdosboot- boot from a dos floppy file\n", \ - "[loadAddr] [filename]\n" \ -), -#define CMD_TBL_FDOS_LS MK_CMD_TBL_ENTRY( \ - "fdosls", 5, 2, 0, do_fdosls, \ - "fdosls - list files in a directory\n", \ - "[directory]\n" \ -), -int do_fdosboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_fdosls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_FDOS_BOOT -#define CMD_TBL_FDOS_LS -#endif - -#endif /* _CMD_FDOS_H */ diff --git a/include/cmd_flash.h b/include/cmd_flash.h deleted file mode 100644 index 6f5c6cd..0000000 --- a/include/cmd_flash.h +++ /dev/null @@ -1,73 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * FLASH support - */ -#ifndef _CMD_FLASH_H -#define _CMD_FLASH_H - -#if (CONFIG_COMMANDS & CFG_CMD_FLASH) -#define CMD_TBL_FLINFO MK_CMD_TBL_ENTRY( \ - "flinfo", 3, 2, 1, do_flinfo, \ - "flinfo - print FLASH memory information\n", \ - "\n - print information for all FLASH memory banks\n" \ - "flinfo N\n - print information for FLASH memory bank # N\n" \ -), - -#define CMD_TBL_FLERASE MK_CMD_TBL_ENTRY( \ - "erase", 3, 3, 1, do_flerase, \ - "erase - erase FLASH memory\n", \ - "start end\n" \ - " - erase FLASH from addr 'start' to addr 'end'\n" \ - "erase N:SF[-SL]\n - erase sectors SF-SL in FLASH bank # N\n" \ - "erase bank N\n - erase FLASH bank # N\n" \ - "erase all\n - erase all FLASH banks\n" \ -), - -#define CMD_TBL_PROTECT MK_CMD_TBL_ENTRY( \ - "protect", 4, 4, 1, do_protect, \ - "protect - enable or disable FLASH write protection\n", \ - "on start end\n" \ - " - protect FLASH from addr 'start' to addr 'end'\n" \ - "protect on N:SF[-SL]\n" \ - " - protect sectors SF-SL in FLASH bank # N\n" \ - "protect on bank N\n - protect FLASH bank # N\n" \ - "protect on all\n - protect all FLASH banks\n" \ - "protect off start end\n" \ - " - make FLASH from addr 'start' to addr 'end' writable\n" \ - "protect off N:SF[-SL]\n" \ - " - make sectors SF-SL writable in FLASH bank # N\n" \ - "protect off bank N\n - make FLASH bank # N writable\n" \ - "protect off all\n - make all FLASH banks writable\n" \ -), -int do_flinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_flerase(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_protect(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_FLINFO -#define CMD_TBL_FLERASE -#define CMD_TBL_PROTECT -#endif /* CFG_CMD_FLASH */ - -#endif /* _CMD_FLASH_H */ diff --git a/include/cmd_fpga.h b/include/cmd_fpga.h deleted file mode 100644 index d74dbce..0000000 --- a/include/cmd_fpga.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * (C) Copyright 2001 - * Rich Ireland, Enterasys Networks, rireland@enterasys.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -/* - * FPGA support - */ -#ifndef _CMD_FPGA_H -#define _CMD_FPGA_H - -#include -#include - -#if defined(CONFIG_FPGA) && (CONFIG_COMMANDS & CFG_CMD_FPGA) - -#define CMD_TBL_FPGA MK_CMD_TBL_ENTRY( \ - "fpga", 4, 6, 1, do_fpga, \ - "fpga - loadable FPGA image support\n", \ - "fpga [operation type] [device number] [image address] [image size]\n" \ - "fpga operations:\n" \ - "\tinfo\tlist known device information.\n" \ - "\tload\tLoad device from memory buffer.\n" \ - "\tdump\tLoad device to memory buffer.\n" \ -), - -extern int do_fpga (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_FPGA -#endif /* CONFIG_FPGA && CONFIG_COMMANDS & CFG_CMD_FPGA */ - -#endif /* _CMD_FPGA_H */ diff --git a/include/cmd_i2c.h b/include/cmd_i2c.h deleted file mode 100644 index 7334fd4..0000000 --- a/include/cmd_i2c.h +++ /dev/null @@ -1,103 +0,0 @@ -/* - * (C) Copyright 2001 - * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * I2C Functions - */ -#ifndef _CMD_I2C_H -#define _CMD_I2C_H - -#if (CONFIG_COMMANDS & CFG_CMD_I2C) -#define CMD_TBL_IMD MK_CMD_TBL_ENTRY( \ - "imd", 3, 4, 1, do_i2c_md, \ - "imd - i2c memory display\n", \ - "chip address[.0, .1, .2] [# of objects]\n - i2c memory display\n" \ -), -#define CMD_TBL_IMM MK_CMD_TBL_ENTRY( \ - "imm", 3, 3, 1, do_i2c_mm, \ - "imm - i2c memory modify (auto-incrementing)\n", \ - "chip address[.0, .1, .2]\n" \ - " - memory modify, auto increment address\n" \ -), -#define CMD_TBL_INM MK_CMD_TBL_ENTRY( \ - "inm", 3, 3, 1, do_i2c_nm, \ - "inm - memory modify (constant address)\n", \ - "chip address[.0, .1, .2]\n - memory modify, read and keep address\n" \ -), -#define CMD_TBL_IMW MK_CMD_TBL_ENTRY( \ - "imw", 3, 5, 1, do_i2c_mw, \ - "imw - memory write (fill)\n", \ - "chip address[.0, .1, .2] value [count]\n - memory write (fill)\n" \ -), -#define CMD_TBL_ICRC MK_CMD_TBL_ENTRY( \ - "icrc32", 4, 5, 1, do_i2c_crc, \ - "icrc32 - checksum calculation\n", \ - "chip address[.0, .1, .2] count\n - compute CRC32 checksum\n" \ -), -#define CMD_TBL_IPROBE MK_CMD_TBL_ENTRY( \ - "iprobe", 3, 1, 1, do_i2c_probe, \ - "iprobe - probe to discover valid I2C chip addresses\n", \ - "\n -discover valid I2C chip addresses\n" \ -), -/* - * Require full name for "iloop" because it is an infinite loop! - */ -#define CMD_TBL_ILOOP MK_CMD_TBL_ENTRY( \ - "iloop", 5, 5, 1, do_i2c_loop, \ - "iloop - infinite loop on address range\n", \ - "chip address[.0, .1, .2] [# of objects]\n" \ - " - loop, reading a set of addresses\n" \ -), -#if (CONFIG_COMMANDS & CFG_CMD_SDRAM) -#define CMD_TBL_ISDRAM MK_CMD_TBL_ENTRY( \ - "isdram", 6, 2, 1, do_sdram, \ - "isdram - print SDRAM configuration information\n", \ - "chip\n - print SDRAM configuration information\n" \ - " (valid chip values 50..57)\n" \ -), -#else -#define CMD_TBL_ISDRAM -#endif - - -int do_i2c_md(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_i2c_mm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_i2c_nm(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_i2c_mw(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_i2c_crc(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_i2c_probe(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_i2c_loop(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_sdram(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_IMD -#define CMD_TBL_IMM -#define CMD_TBL_INM -#define CMD_TBL_IMW -#define CMD_TBL_ICRC -#define CMD_TBL_IPROBE -#define CMD_TBL_ILOOP -#define CMD_TBL_ISDRAM -#endif /* CFG_CMD_MEMORY */ - -#endif /* _CMD_I2C_H */ diff --git a/include/cmd_ide.h b/include/cmd_ide.h deleted file mode 100644 index 0433c20..0000000 --- a/include/cmd_ide.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * IDE support - */ -#ifndef _CMD_IDE_H -#define _CMD_IDE_H - -#include -#include - - -#if (CONFIG_COMMANDS & CFG_CMD_IDE) -#define CMD_TBL_IDE MK_CMD_TBL_ENTRY( \ - "ide", 3, 5, 1, do_ide, \ - "ide - IDE sub-system\n", \ - "reset - reset IDE controller\n" \ - "ide info - show available IDE devices\n" \ - "ide device [dev] - show or set current device\n" \ - "ide part [dev] - print partition table of one or all IDE devices\n" \ - "ide read addr blk# cnt\n" \ - "ide write addr blk# cnt - read/write `cnt'" \ - " blocks starting at block `blk#'\n" \ - " to/from memory address `addr'\n" \ -), - -#define CMD_TBL_DISK MK_CMD_TBL_ENTRY( \ - "diskboot", 4, 3, 1, do_diskboot, \ - "diskboot- boot from IDE device\n", \ - "loadAddr dev:part\n" \ -), - -int do_ide (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_diskboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_IDE -#define CMD_TBL_DISK -#endif - -#endif /* _CMD_IDE_H */ diff --git a/include/cmd_immap.h b/include/cmd_immap.h deleted file mode 100644 index 9febee2..0000000 --- a/include/cmd_immap.h +++ /dev/null @@ -1,181 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * PowerPC 8xx/8260 Internal Memory Map commands - */ -#ifndef _CMD_IMMAP_H -#define _CMD_IMMAP_H - -#if (CONFIG_COMMANDS & CFG_CMD_IMMAP) && \ - (defined(CONFIG_8xx) || defined(CONFIG_8260)) - -#define CMD_TBL_SIUINFO MK_CMD_TBL_ENTRY( \ - "siuinfo", 3, 1, 1, do_siuinfo, \ - "siuinfo - print System Interface Unit (SIU) registers\n", \ - NULL \ -), - -#define CMD_TBL_MEMCINFO MK_CMD_TBL_ENTRY( \ - "memcinfo", 4, 1, 1, do_memcinfo, \ - "memcinfo- print Memory Controller registers\n", \ - NULL \ -), - -#define CMD_TBL_SITINFO MK_CMD_TBL_ENTRY( \ - "sitinfo", 3, 1, 1, do_sitinfo, \ - "sitinfo - print System Integration Timers (SIT) registers\n", \ - NULL \ -), - -#ifdef CONFIG_8260 -#define CMD_TBL_ICINFO MK_CMD_TBL_ENTRY( \ - "icinfo", 3, 1, 1, do_icinfo, \ - "icinfo - print Interrupt Controller registers\n", \ - NULL \ -), -#endif - -#define CMD_TBL_CARINFO MK_CMD_TBL_ENTRY( \ - "carinfo", 3, 1, 1, do_carinfo, \ - "carinfo - print Clocks and Reset registers\n", \ - NULL \ -), - -#define CMD_TBL_IOPINFO MK_CMD_TBL_ENTRY( \ - "iopinfo", 4, 1, 1, do_iopinfo, \ - "iopinfo - print I/O Port registers\n", \ - NULL \ -), - -#define CMD_TBL_IOPSET MK_CMD_TBL_ENTRY( \ - "iopset", 4, 5, 0, do_iopset, \ - "iopset - set I/O Port registers\n", \ - "PORT PIN CMD VALUE\nPORT: A-D, PIN: 0-31, CMD: [dat|dir|odr|sor], VALUE: 0|1" \ -), - -#define CMD_TBL_DMAINFO MK_CMD_TBL_ENTRY( \ - "dmainfo", 3, 1, 1, do_dmainfo, \ - "dmainfo - print SDMA/IDMA registers\n", \ - NULL \ -), - -#define CMD_TBL_FCCINFO MK_CMD_TBL_ENTRY( \ - "fccinfo", 3, 1, 1, do_fccinfo, \ - "fccinfo - print FCC registers\n", \ - NULL \ -), - -#define CMD_TBL_BRGINFO MK_CMD_TBL_ENTRY( \ - "brginfo", 3, 1, 1, do_brginfo, \ - "brginfo - print Baud Rate Generator (BRG) registers\n", \ - NULL \ -), - -#define CMD_TBL_I2CINFO MK_CMD_TBL_ENTRY( \ - "i2cinfo", 4, 1, 1, do_i2cinfo, \ - "i2cinfo - print I2C registers\n", \ - NULL \ -), - -#define CMD_TBL_SCCINFO MK_CMD_TBL_ENTRY( \ - "sccinfo", 3, 1, 1, do_sccinfo, \ - "sccinfo - print SCC registers\n", \ - NULL \ -), - -#define CMD_TBL_SMCINFO MK_CMD_TBL_ENTRY( \ - "smcinfo", 3, 1, 1, do_smcinfo, \ - "smcinfo - print SMC registers\n", \ - NULL \ -), - -#define CMD_TBL_SPIINFO MK_CMD_TBL_ENTRY( \ - "spiinfo", 3, 1, 1, do_spiinfo, \ - "spiinfo - print Serial Peripheral Interface (SPI) registers\n",\ - NULL \ -), - -#define CMD_TBL_MUXINFO MK_CMD_TBL_ENTRY( \ - "muxinfo", 3, 1, 1, do_muxinfo, \ - "muxinfo - print CPM Multiplexing registers\n", \ - NULL \ -), - -#define CMD_TBL_SIINFO MK_CMD_TBL_ENTRY( \ - "siinfo", 3, 1, 1, do_siinfo, \ - "siinfo - print Serial Interface (SI) registers\n", \ - NULL \ -), - -#define CMD_TBL_MCCINFO MK_CMD_TBL_ENTRY( \ - "mccinfo", 3, 1, 1, do_mccinfo, \ - "mccinfo - print MCC registers\n", \ - NULL \ -), - -int do_siuinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_memcinfo(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_sitinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#ifdef CONFIG_8260 -int do_icinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#endif -int do_carinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_iopinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_iopset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_dmainfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_fccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_brginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_i2cinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_sccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_smcinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_spiinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_muxinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_siinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mccinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else - -#define CMD_TBL_SIUINFO -#define CMD_TBL_MEMCINFO -#define CMD_TBL_SITINFO -#ifdef CONFIG_8260 -#define CMD_TBL_ICINFO -#endif -#define CMD_TBL_CARINFO -#define CMD_TBL_IOPINFO -#define CMD_TBL_IOPSET -#define CMD_TBL_DMAINFO -#define CMD_TBL_FCCINFO -#define CMD_TBL_BRGINFO -#define CMD_TBL_I2CINFO -#define CMD_TBL_SCCINFO -#define CMD_TBL_SMCINFO -#define CMD_TBL_SPIINFO -#define CMD_TBL_MUXINFO -#define CMD_TBL_SIINFO -#define CMD_TBL_MCCINFO - -#endif /* CFG_CMD_IMMAP && (CONFIG_8xx || CONFIG_8260) */ - -#endif /* _CMD_IMMAP_H */ diff --git a/include/cmd_jffs2.h b/include/cmd_jffs2.h deleted file mode 100644 index 670455b..0000000 --- a/include/cmd_jffs2.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * JFFS2 support - */ -#ifndef _CMD_JFFS2_H -#define _CMD_JFFS2_H - -#if (CONFIG_COMMANDS & CFG_CMD_JFFS2) - -#define CMD_TBL_JFFS2_FSLOAD MK_CMD_TBL_ENTRY( \ - "fsload", 5, 3, 0, do_jffs2_fsload, \ - "fsload - load binary file from a filesystem image\n", \ - "[ off ] [ filename ]\n" \ - " - load binary file from flash bank\n" \ - " with offset 'off'\n" \ -), - -#define CMD_TBL_JFFS2_FSINFO MK_CMD_TBL_ENTRY( \ - "fsinfo", 5, 1, 1, do_jffs2_fsinfo, \ - "fsinfo - print information about filesystems\n", \ - " - print information about filesystems\n" \ -), - -#define CMD_TBL_JFFS2_LS MK_CMD_TBL_ENTRY( \ - "ls", 2, 2, 1, do_jffs2_ls, \ - "ls - list files in a directory (default /)\n", \ - "[ directory ]\n" \ - " - list files in a directory.\n" \ -), - -#define CMD_TBL_JFFS2_CHPART MK_CMD_TBL_ENTRY( \ - "chpart", 6, 2, 0, do_jffs2_chpart, \ - "chpart - change active partition\n", \ - " - change active partition\n" \ -), - -int do_jffs2_fsload (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_jffs2_fsinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_jffs2_ls (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_jffs2_chpart (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_JFFS2_FSLOAD -#define CMD_TBL_JFFS2_FSINFO -#define CMD_TBL_JFFS2_LS -#define CMD_TBL_JFFS2_CHPART -#endif /* CFG_CMD_JFFS2 */ - -#endif /* _CMD_JFFS2_H */ diff --git a/include/cmd_kgdb.h b/include/cmd_kgdb.h deleted file mode 100644 index 945c54e..0000000 --- a/include/cmd_kgdb.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * (C) Copyright 2000 - * Murray Jensen and - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * KGDB support - */ -#ifndef _CMD_KGDB_H -#define _CMD_KGDB_H - -#if (CONFIG_COMMANDS & CFG_CMD_KGDB) -#define CMD_TBL_KGDB MK_CMD_TBL_ENTRY( \ - "kgdb", 4, CFG_MAXARGS, 1, do_kgdb, \ - "kgdb - enter gdb remote debug mode\n", \ - "[arg0 arg1 .. argN]\n" \ - " - executes a breakpoint so that kgdb mode is\n" \ - " entered via the exception handler. To return\n" \ - " to the monitor, the remote gdb debugger must\n" \ - " execute a \"continue\" or \"quit\" command.\n" \ - "\n" \ - " if a program is loaded by the remote gdb, any args\n" \ - " passed to the kgdb command are given to the loaded\n" \ - " program if it is executed (see the \"hello_world\"\n" \ - " example program in the U-Boot examples directory)." \ -), - -int do_kgdb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_KGDB -#endif - -#endif /* _CMD_KGDB_H */ diff --git a/include/cmd_log.h b/include/cmd_log.h deleted file mode 100644 index c879f2f..0000000 --- a/include/cmd_log.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * (C) Copyright 2002 - * Detlev Zundel, DENX Software Engineering, dzu@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _CMD_LOG_H_ -#define _CMD_LOG_H_ - -#include -#include - -#if defined(CONFIG_LOGBUFFER) - -#define LOG_BUF_LEN 16843 -#define LOG_BU_MASK ~(LOG_BUF_LEN-1) - -#define CMD_TBL_LOG MK_CMD_TBL_ENTRY( \ - "log", 3, 255, 1, do_log, \ - "log - manipulate logbuffer\n", \ - "log info - show pointer details\n" \ - "log reset - clear contents\n" \ - "log show - show contents\n" \ - "log append - append to the logbuffer\n" \ -), -int do_log (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_LOG -#endif /* CONFIG_LOGBUFFER */ -/* ----------------------------------------------------------------------------*/ -#endif /* _CMD_LOG_H_ */ diff --git a/include/cmd_mem.h b/include/cmd_mem.h deleted file mode 100644 index aa0c540..0000000 --- a/include/cmd_mem.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Memory Functions - */ -#ifndef _CMD_MEM_H -#define _CMD_MEM_H - -#if (CONFIG_COMMANDS & CFG_CMD_MEMORY) -#define CMD_TBL_MD MK_CMD_TBL_ENTRY( \ - "md", 2, 3, 1, do_mem_md, \ - "md - memory display\n", \ - "[.b, .w, .l] address [# of objects]\n - memory display\n" \ -), -#define CMD_TBL_MM MK_CMD_TBL_ENTRY( \ - "mm", 2, 2, 1, do_mem_mm, \ - "mm - memory modify (auto-incrementing)\n", \ - "[.b, .w, .l] address\n" \ - " - memory modify, auto increment address\n" \ -), -#define CMD_TBL_NM MK_CMD_TBL_ENTRY( \ - "nm", 2, 2, 1, do_mem_nm, \ - "nm - memory modify (constant address)\n", \ - "[.b, .w, .l] address\n - memory modify, read and keep address\n" \ -), -#define CMD_TBL_MW MK_CMD_TBL_ENTRY( \ - "mw", 2, 4, 1, do_mem_mw, \ - "mw - memory write (fill)\n", \ - "[.b, .w, .l] address value [count]\n - write memory\n" \ -), -#define CMD_TBL_CP MK_CMD_TBL_ENTRY( \ - "cp", 2, 4, 1, do_mem_cp, \ - "cp - memory copy\n", \ - "[.b, .w, .l] source target count\n - copy memory\n" \ -), -#define CMD_TBL_CMP MK_CMD_TBL_ENTRY( \ - "cmp", 3, 4, 1, do_mem_cmp, \ - "cmp - memory compare\n", \ - "[.b, .w, .l] addr1 addr2 count\n - compare memory\n" \ -), -#define CMD_TBL_CRC MK_CMD_TBL_ENTRY( \ - "crc32", 3, 4, 1, do_mem_crc, \ - "crc32 - checksum calculation\n", \ - "address count [addr]\n - compute CRC32 checksum [save at addr]\n" \ -), -#define CMD_TBL_BASE MK_CMD_TBL_ENTRY( \ - "base", 2, 2, 1, do_mem_base, \ - "base - print or set address offset\n", \ - "\n - print address offset for memory commands\n" \ - "base off\n - set address offset for memory commands to 'off'\n" \ -), -/* - * Require full name for "loop" and "mtest" because these are infinite loops! - */ -#define CMD_TBL_LOOP MK_CMD_TBL_ENTRY( \ - "loop", 4, 3, 1, do_mem_loop, \ - "loop - infinite loop on address range\n", \ - "[.b, .w, .l] address number_of_objects\n" \ - " - loop on a set of addresses\n" \ -), -#define CMD_TBL_MTEST MK_CMD_TBL_ENTRY( \ - "mtest", 5, 4, 1, do_mem_mtest, \ - "mtest - simple RAM test\n", \ - "[start [end [pattern]]]\n" \ - " - simple RAM read/write test\n" \ -), -int do_mem_md (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mem_mm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mem_nm (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mem_mw (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mem_cp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mem_cmp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mem_crc (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mem_base (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mem_loop (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_mem_mtest (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_MD -#define CMD_TBL_MM -#define CMD_TBL_NM -#define CMD_TBL_MW -#define CMD_TBL_CP -#define CMD_TBL_CMP -#define CMD_TBL_CRC -#define CMD_TBL_BASE -#define CMD_TBL_LOOP -#define CMD_TBL_MTEST -#endif /* CFG_CMD_MEMORY */ - -#endif /* _CMD_MEM_H */ diff --git a/include/cmd_menu.h b/include/cmd_menu.h deleted file mode 100644 index ad1bd7f..0000000 --- a/include/cmd_menu.h +++ /dev/null @@ -1,42 +0,0 @@ -/* - * (C) Copyright 2001 - * Hans-J�rg Frieden, Hyperion Entertainment - * Hans-JoergF@hyperion-entertainment.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ -#ifndef _CMD_MENU_H -#define _CMD_MENU_H - -#include -#include - -#if defined(CONFIG_AMIGAONEG3SE) && (CONFIG_COMMANDS & CFG_CMD_BSP) -#define CMD_TBL_MENU MK_CMD_TBL_ENTRY( \ - "menu", 3, 1, 1, do_menu, \ - "menu - display BIOS setup menu\n", \ - "" \ -), - -int do_menu( cmd_tbl_t *cmdtp, int flag, int argc, char *argv[] ); -#else -#define CMD_TBL_MENU -#endif - -#endif /* _CMD_MENU_H */ diff --git a/include/cmd_mii.h b/include/cmd_mii.h deleted file mode 100644 index 7ded0cc..0000000 --- a/include/cmd_mii.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * (C) Copyright 2001 - * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * MII Functions - */ -#ifndef _CMD_MII_H -#define _CMD_MII_H - -#if (CONFIG_COMMANDS & CFG_CMD_MII) -#define CMD_TBL_MII MK_CMD_TBL_ENTRY( \ - "mii", 3, 5, 1, do_mii, \ - "mii - MII utility commands\n", \ - "\ -info - display MII PHY info\n\ -mii read - read MII PHY register \n\ -mii write - write MII PHY register \n" \ -), - -int do_mii (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_MII -#endif /* CFG_CMD_MII */ - -#endif /* _CMD_MII_H */ diff --git a/include/cmd_misc.h b/include/cmd_misc.h deleted file mode 100644 index 873f5c4..0000000 --- a/include/cmd_misc.h +++ /dev/null @@ -1,58 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Miscellanious commands - */ -#ifndef _CMD_MISC_H -#define _CMD_MISC_H - -#if (CONFIG_COMMANDS & CFG_CMD_IRQ) -#define CMD_TBL_IRQINFO MK_CMD_TBL_ENTRY( \ - "irqinfo", 3, 1, 1, do_irqinfo, \ - "irqinfo - print information about IRQs\n", \ - NULL \ -), - -/* Implemented in $(CPU)/interrupts.c */ -int do_irqinfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_IRQINFO -#endif /* CONFIG_COMMANDS & CFG_CMD_IRQ */ - -#if (CONFIG_COMMANDS & CFG_CMD_MISC) -#define CMD_TBL_MISC MK_CMD_TBL_ENTRY( \ - "sleep", 5, 2, 2, do_sleep, \ - "sleep - delay execution for some time\n", \ - "N\n" \ - " - delay execution for N seconds (N is _decimal_ !!!)\n" \ -), - -/* Implemented in common/cmd_misc.c */ -int do_sleep (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_MISC -#endif /* CFG_CMD_MISC */ - -#endif /* _CMD_MISC_H */ diff --git a/include/cmd_net.h b/include/cmd_net.h deleted file mode 100644 index 842cb3e..0000000 --- a/include/cmd_net.h +++ /dev/null @@ -1,87 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Network boot support - */ -#ifndef _CMD_NET_H -#define _CMD_NET_H - -#if (CONFIG_COMMANDS & CFG_CMD_NET) -#define CMD_TBL_BOOTP MK_CMD_TBL_ENTRY( \ - "bootp", 5, 3, 1, do_bootp, \ - "bootp - boot image via network using BootP/TFTP protocol\n", \ - "[loadAddress] [bootfilename]\n" \ -), -int do_bootp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#define CMD_TBL_TFTPB MK_CMD_TBL_ENTRY( \ - "tftpboot", 4, 3, 1, do_tftpb, \ - "tftpboot- boot image via network using TFTP protocol\n" \ - " and env variables ipaddr and serverip\n", \ - "[loadAddress] [bootfilename]\n" \ -), - -int do_tftpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - - -#define CMD_TBL_RARPB MK_CMD_TBL_ENTRY( \ - "rarpboot", 4, 3, 1, do_rarpb, \ - "rarpboot- boot image via network using RARP/TFTP protocol\n", \ - "[loadAddress] [bootfilename]\n" \ -), - -int do_rarpb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#if (CONFIG_COMMANDS & CFG_CMD_DHCP) -#define CMD_TBL_DHCP MK_CMD_TBL_ENTRY( \ - "dhcp", 4, 3, 1, do_dhcp, \ - "dhcp - invoke DHCP client to obtain IP/boot params\n", \ - "[loadAddress] [bootfilename]\n" \ -), - -int do_dhcp (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_DHCP -#endif /* CFG_CMD_DHCP */ - -#if (CONFIG_COMMANDS & CFG_CMD_PING) -#define CMD_TBL_PING MK_CMD_TBL_ENTRY( \ - "ping", 4, 2, 1, do_ping, \ - "ping - check if host is reachable\n", \ - "host\n" \ -), - -int do_ping (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_PING -#endif /* CFG_CMD_PING */ - -#else -#define CMD_TBL_BOOTP -#define CMD_TBL_TFTPB -#define CMD_TBL_RARPB -#define CMD_TBL_DHCP -#define CMD_TBL_PING -#endif /* CFG_CMD_NET */ - -#endif diff --git a/include/cmd_nvedit.h b/include/cmd_nvedit.h deleted file mode 100644 index 345127d..0000000 --- a/include/cmd_nvedit.h +++ /dev/null @@ -1,91 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Boot support - */ -#ifndef _CMD_NVEDIT_H -#define _CMD_NVEDIT_H - -#define CMD_TBL_PRINTENV MK_CMD_TBL_ENTRY( \ - "printenv", 4, CFG_MAXARGS, 1, do_printenv, \ - "printenv- print environment variables\n", \ - "\n - print values of all environment variables\n" \ - "printenv name ...\n" \ - " - print value of environment variable 'name'\n" \ -), -int do_printenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#define CMD_TBL_SETENV MK_CMD_TBL_ENTRY( \ - "setenv", 6, CFG_MAXARGS, 0, do_setenv, \ - "setenv - set environment variables\n", \ - "name value ...\n" \ - " - set environment variable 'name' to 'value ...'\n" \ - "setenv name\n" \ - " - delete environment variable 'name'\n" \ -), -int do_setenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#if ((CONFIG_COMMANDS & (CFG_CMD_ENV|CFG_CMD_FLASH)) == (CFG_CMD_ENV|CFG_CMD_FLASH)) -#define CMD_TBL_SAVEENV MK_CMD_TBL_ENTRY( \ - "saveenv", 4, 1, 0, do_saveenv, \ - "saveenv - save environment variables to persistent storage\n", \ - NULL \ -), -int do_saveenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_SAVEENV -#endif /* CFG_CMD_ENV */ - -#if (CONFIG_COMMANDS & CFG_CMD_ASKENV) -#define CMD_TBL_ASKENV MK_CMD_TBL_ENTRY( \ - "askenv", 8, CFG_MAXARGS, 1, do_askenv, \ - "askenv - get environment variables from stdin\n", \ - "name [message] [size]\n" \ - " - get environment variable 'name' from stdin (max 'size' chars)\n" \ - "askenv name\n" \ - " - get environment variable 'name' from stdin\n" \ - "askenv name size\n" \ - " - get environment variable 'name' from stdin (max 'size' chars)\n" \ - "askenv name [message] size\n" \ - " - display 'message' string and get environment variable 'name'" \ - "from stdin (max 'size' chars)\n" \ -), -int do_askenv (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_ASKENV -#endif /* CFG_CMD_ASKENV */ - -#if (CONFIG_COMMANDS & CFG_CMD_RUN) -#define CMD_TBL_RUN MK_CMD_TBL_ENTRY( \ - "run", 3, CFG_MAXARGS, 1, do_run, \ - "run - run commands in an environment variable\n", \ - "var [...]\n" \ - " - run the commands in the environment variable(s) 'var'\n" \ -), -int do_run (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_RUN -#endif /* CFG_CMD_RUN */ - -#endif /* _CMD_NVEDIT_H */ diff --git a/include/cmd_pci.h b/include/cmd_pci.h deleted file mode 100644 index 520a5c8..0000000 --- a/include/cmd_pci.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * (C) Copyright 2001 - * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * MII Functions - */ -#ifndef _CMD_PCI_H -#define _CMD_PCI_H - -#if (CONFIG_COMMANDS & CFG_CMD_PCI) -#define CMD_TBL_PCI MK_CMD_TBL_ENTRY( \ - "pci", 3, 5, 1, do_pci, \ - "pci - list and access PCI Configuraton Space\n", \ - "[bus] [long]\n" \ - " - short or long list of PCI devices on bus 'bus'\n" \ - "pci header b.d.f\n" \ - " - show header of PCI device 'bus.device.function'\n" \ - "pci display[.b, .w, .l] b.d.f [address] [# of objects]\n" \ - " - display PCI configuration space (CFG)\n" \ - "pci next[.b, .w, .l] b.d.f address\n" \ - " - modify, read and keep CFG address\n" \ - "pci modify[.b, .w, .l] b.d.f address\n" \ - " - modify, auto increment CFG address\n" \ - "pci write[.b, .w, .l] b.d.f address value\n" \ - " - write to CFG address\n" \ -), - -int do_pci (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_PCI -#endif /* CFG_CMD_PCI */ - -#endif /* _CMD_PCI_H */ diff --git a/include/cmd_pcmcia.h b/include/cmd_pcmcia.h deleted file mode 100644 index 24a207b..0000000 --- a/include/cmd_pcmcia.h +++ /dev/null @@ -1,44 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * PCMCIA support - */ -#ifndef _CMD_PCMCIA_H -#define _CMD_PCMCIA_H - -#if (CONFIG_COMMANDS & CFG_CMD_PCMCIA) -#define CMD_TBL_PINIT MK_CMD_TBL_ENTRY( \ - "pinit", 4, 2, 1, do_pinit, \ - "pinit - PCMCIA sub-system\n", \ - "on - power on PCMCIA socket\n" \ - "pinit off - power off PCMCIA socket\n" \ -), - -int do_pinit (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_PINIT -#endif - -#endif /* _CMD_PCMCIA_H */ - diff --git a/include/cmd_reginfo.h b/include/cmd_reginfo.h deleted file mode 100644 index 8d71e7e..0000000 --- a/include/cmd_reginfo.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * (C) Copyright 2000 - * Subodh Nijsure, SkyStream Networks, snijsure@skystream.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _CMD_REGINFO_H_ -#define _CMD_REGINFO_H_ - -#if (defined(CONFIG_5xx) || defined(CONFIG_8xx) || defined(CONFIG_405GP) || defined(CONFIG_405EP)) && \ - (CONFIG_COMMANDS & CFG_CMD_REGINFO) -#define CMD_TBL_REGINFO MK_CMD_TBL_ENTRY( \ - "reginfo", 3, 2, 1, do_reginfo, \ - "reginfo - print register information\n", \ -), - -int do_reginfo (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_REGINFO -#endif /* CONFIG_COMMANDS && CFG_CMD_REGINFO */ - -#endif /* _CMD_REGINFO_H_ */ diff --git a/include/cmd_rtc.h b/include/cmd_rtc.h deleted file mode 100644 index 2149f78..0000000 --- a/include/cmd_rtc.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * (C) Copyright 2001 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -#ifndef _CMD_RTC_H_ -#define _CMD_RTC_H_ - -#include -#include - -#if (CONFIG_COMMANDS & CFG_CMD_DATE) - -#define CMD_TBL_DATE MK_CMD_TBL_ENTRY( \ - "date", 3, 2, 1, do_date, \ - "date - get/set/reset date & time\n", \ - "[MMDDhhmm[[CC]YY][.ss]]\ndate reset\n" \ - " - without arguments: print date & time\n" \ - " - with numeric argument: set the system date & time\n" \ - " - with 'reset' argument: reset the RTC\n" \ -), - -int do_date (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else - -#define CMD_TBL_DATE - -#endif /* CFG_CMD_DATE */ - - -#endif /* _CMD_RTC_H_ */ diff --git a/include/cmd_scsi.h b/include/cmd_scsi.h deleted file mode 100644 index 4dca059..0000000 --- a/include/cmd_scsi.h +++ /dev/null @@ -1,62 +0,0 @@ -/* - * (C) Copyright 2001 - * Denis Peter, MPL AG Switzerland - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ -#ifndef _CMD_SCSI_H -#define _CMD_SCSI_H - -#include -#include - - -#if (CONFIG_COMMANDS & CFG_CMD_SCSI) - -#define CMD_TBL_SCSI MK_CMD_TBL_ENTRY( \ - "scsi", 4, 5, 1, do_scsi, \ - "scsi - SCSI sub-system\n", \ - "reset - reset SCSI controller\n" \ - "scsi info - show available SCSI devices\n" \ - "scsi scan - (re-)scan SCSI bus\n" \ - "scsi device [dev] - show or set current device\n" \ - "scsi part [dev] - print partition table of one or all SCSI devices\n" \ - "scsi read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n"\ - " to memory address `addr'\n" \ -), - - -#define CMD_TBL_SCSIBOOT MK_CMD_TBL_ENTRY( \ - "scsiboot", 5, 3, 1, do_scsiboot, \ - "scsiboot- boot from SCSI device\n", \ - "loadAddr dev:part\n" \ -), - -int do_scsi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_scsiboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - - -#else -#define CMD_TBL_SCSI -#define CMD_TBL_SCSIBOOT -#endif - -#endif /* _CMD_SCSI_H */ - diff --git a/include/cmd_spi.h b/include/cmd_spi.h deleted file mode 100644 index 30927c1..0000000 --- a/include/cmd_spi.h +++ /dev/null @@ -1,47 +0,0 @@ -/* - * (C) Copyright 2002 - * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * SPI Functions - */ -#ifndef _CMD_SPI_H -#define _CMD_SPI_H - -#if (CONFIG_COMMANDS & CFG_CMD_SPI) -#define CMD_TBL_SPI MK_CMD_TBL_ENTRY( \ - "sspi", 3, 5, 1, do_spi, \ - "sspi - SPI utility commands\n", \ - "\ - - Send bits from out the SPI\n\ - - Identifies the chip select of the device\n\ - - Number of bits to send (base 10)\n\ - - Hexadecimal string that gets sent\n" \ -), - -int do_spi (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - -#else -#define CMD_TBL_SPI -#endif /* CFG_CMD_SPI */ - -#endif /* _CMD_SPI_H */ diff --git a/include/cmd_usb.h b/include/cmd_usb.h deleted file mode 100644 index b7b4e83..0000000 --- a/include/cmd_usb.h +++ /dev/null @@ -1,77 +0,0 @@ -/* - * (C) Copyright 2001 - * Denis Peter, MPL AG Switzerland - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ -#ifndef _CMD_USB_H -#define _CMD_USB_H - -#include -#include - - -#if (CONFIG_COMMANDS & CFG_CMD_USB) - -#ifdef CONFIG_USB_STORAGE -#define CMD_TBL_USB MK_CMD_TBL_ENTRY( \ - "usb", 4, 5, 1, do_usb, \ - "usb - USB sub-system\n", \ - "reset - reset (rescan) USB controller\n" \ - "usb stop [f] - stop USB [f]=force stop\n" \ - "usb tree - show USB device tree\n" \ - "usb info [dev] - show available USB devices\n" \ - "usb scan - (re-)scan USB bus for storage devices\n" \ - "usb device [dev] - show or set current USB storage device\n" \ - "usb part [dev] - print partition table of one or all USB storage devices\n" \ - "usb read addr blk# cnt - read `cnt' blocks starting at block `blk#'\n"\ - " to memory address `addr'\n" \ -), - - -#define CMD_TBL_USBBOOT MK_CMD_TBL_ENTRY( \ - "usbboot", 5, 3, 1, do_usbboot, \ - "usbboot - boot from USB device\n", \ - "loadAddr dev:part\n" \ -), - -#else -#define CMD_TBL_USB MK_CMD_TBL_ENTRY( \ - "usb", 4, 5, 1, do_usb, \ - "usb - USB sub-system\n", \ - "reset - reset (rescan) USB controller\n" \ - "usb tree - show USB device tree\n" \ - "usb info [dev] - show available USB devices\n" \ -), - -#define CMD_TBL_USBBOOT -#endif - -int do_usb (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -int do_usbboot (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); - - -#else -#define CMD_TBL_USB -#define CMD_TBL_USBBOOT -#endif - -#endif /* _CMD_USB_H */ - diff --git a/include/cmd_vfd.h b/include/cmd_vfd.h deleted file mode 100644 index ad6f21a..0000000 --- a/include/cmd_vfd.h +++ /dev/null @@ -1,46 +0,0 @@ -/* - * (C) Copyright 2000 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - */ - -/* - * Miscellanious commands - */ -#ifndef _CMD_VFD_H -#define _CMD_VFD_H - -#if (CONFIG_COMMANDS & CFG_CMD_VFD) -#define CMD_TBL_VFD MK_CMD_TBL_ENTRY( \ - "vfd", 3, 2, 0, do_vfd, \ - "vfd - load a bitmap to the VFDs on TRAB\n", \ - "#N\n" \ - " - load bitmap no. N to the VFDs (N is _decimal_ !!!)\n" \ - "vfd addr\n" \ - " - load bitmap at address _addr_ to the VFDs\n" \ -), - -/* Implemented in common/cmd_misc.c */ -int do_vfd (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); -#else -#define CMD_TBL_VFD -#endif /* CFG_CMD_VFD */ - -#endif /* _CMD_VFD_H */ diff --git a/include/command.h b/include/command.h index 9453c0d..a39c12f 100644 --- a/include/command.h +++ b/include/command.h @@ -38,9 +38,9 @@ struct cmd_tbl_s { char *name; /* Command Name */ - int lmin; /* minimum abbreviated length */ int maxargs; /* maximum number of arguments */ int repeatable; /* autorepeat allowed? */ + /* Implementation function */ int (*cmd)(struct cmd_tbl_s *, int, int, char *[]); char *usage; /* Usage message (short) */ @@ -51,15 +51,9 @@ typedef struct cmd_tbl_s cmd_tbl_t; -extern cmd_tbl_t cmd_tbl[]; +extern cmd_tbl_t __u_boot_cmd_start; +extern cmd_tbl_t __u_boot_cmd_end; -#ifdef CFG_LONGHELP -#define MK_CMD_TBL_ENTRY(name,lmin,maxargs,rep,cmd,usage,help) \ - { name, lmin, maxargs, rep, cmd, usage, help } -#else /* no help info */ -#define MK_CMD_TBL_ENTRY(name,lmin,maxargs,rep,cmd,usage,help) \ - { name, lmin, maxargs, rep, cmd, usage } -#endif /* common/command.c */ cmd_tbl_t *find_cmd(const char *cmd); @@ -87,4 +81,20 @@ * to include/cmd_confdefs.h */ + +#define Struct_Section __attribute__ ((unused,section (".u_boot_cmd"))) +#define U_BOOT_CMD(x) __u_boot_cmd_##x Struct_Section + +#ifdef CFG_LONGHELP + +#define MK_CMD_ENTRY(name,maxargs,rep,cmd,usage,help) \ + { name, maxargs, rep, cmd, usage, help } + +#else /* no long help info */ + +#define MK_CMD_ENTRY(name,maxargs,rep,cmd,usage,help) \ + { name, maxargs, rep, cmd, usage } + +#endif /* CFG_LONGHELP */ + #endif /* __COMMAND_H */ diff --git a/include/common.h b/include/common.h index cc5dbe7..0bb4353 100644 --- a/include/common.h +++ b/include/common.h @@ -167,7 +167,7 @@ # include /* ARM version to be fixed! */ #endif /* CONFIG_ARM */ #ifdef CONFIG_I386 /* x86 version to be fixed! */ -# include +# include #endif /* CONFIG_I386 */ void pci_init (void); diff --git a/include/commproc.h b/include/commproc.h index c10525d..652d2ab 100644 --- a/include/commproc.h +++ b/include/commproc.h @@ -1177,8 +1177,8 @@ # endif /* CONFIG_FEC_ENET */ #endif /* CONFIG_SVM_SC8xx */ - - + + #if defined(CONFIG_NETVIA) /* Bits in parallel I/O port registers that have to be set/cleared * to configure the pins for SCC2 use. diff --git a/include/configs/A3000.h b/include/configs/A3000.h index f933ea8..b25e48c 100644 --- a/include/configs/A3000.h +++ b/include/configs/A3000.h @@ -106,7 +106,7 @@ /* #define CONFIG_TULIP */ /* #define CONFIG_EEPRO100 */ -#define CONFIG_NATSEMI +#define CONFIG_NATSEMI #define PCI_ENET0_IOADDR 0x80000000 #define PCI_ENET0_MEMADDR 0x80000000 @@ -319,6 +319,4 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/ADCIOP.h b/include/configs/ADCIOP.h index 92b4482..255942a 100644 --- a/include/configs/ADCIOP.h +++ b/include/configs/ADCIOP.h @@ -89,7 +89,7 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ diff --git a/include/configs/AR405.h b/include/configs/AR405.h index acb2fb6..632d399 100644 --- a/include/configs/AR405.h +++ b/include/configs/AR405.h @@ -67,7 +67,7 @@ #define CONFIG_PHY_ADDR 0 /* PHY address */ #define CONFIG_COMMANDS \ - (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | CFG_CMD_ASKENV) + (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_IRQ | CFG_CMD_ASKENV) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include @@ -99,8 +99,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -120,7 +120,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ diff --git a/include/configs/ASH405.h b/include/configs/ASH405.h index 4be6158..3868997 100644 --- a/include/configs/ASH405.h +++ b/include/configs/ASH405.h @@ -117,8 +117,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -175,7 +175,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_HOST /* select pci host function */ #undef CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -239,7 +239,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x100 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x700 /* 2048 bytes may be used for env vars*/ - /* total size of a CAT24WC16 is 2048 bytes */ + /* total size of a CAT24WC16 is 2048 bytes */ #define CFG_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */ #define CFG_NVRAM_SIZE 242 /* NVRAM size */ @@ -265,7 +265,7 @@ * Cache Configuration */ #define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */ - /* have only 8kB, 16kB is save here */ + /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 /* ... */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ diff --git a/include/configs/AmigaOneG3SE.h b/include/configs/AmigaOneG3SE.h index 009636b..99b42e9 100644 --- a/include/configs/AmigaOneG3SE.h +++ b/include/configs/AmigaOneG3SE.h @@ -146,7 +146,7 @@ /* Size in bytes reserved for initial data */ /* HJF: used to be 0x400000 */ -#define CFG_INIT_RAM_ADDR 0x40000000 +#define CFG_INIT_RAM_ADDR 0x40000000 #define CFG_INIT_RAM_END 0x8000 #define CFG_GBL_DATA_SIZE 128 #define CFG_GBL_DATA_OFFSET (CFG_INIT_RAM_END - CFG_GBL_DATA_SIZE) @@ -180,9 +180,9 @@ #define CFG_IBAT1L (0x80000000 | BATL_PP_RW | BATL_CACHEINHIBIT) #define CFG_IBAT1U (0x80000000 | BATU_BL_256M | BATU_VS | BATU_VP) /* HJF: -#define CFG_IBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR) | BATL_PP_RW) +#define CFG_IBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR) | BATL_PP_RW) #define CFG_IBAT1U ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR) | BATU_BL_256M | BATU_VS | BATU_VP) -#define CFG_DBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR + 0x20000) | BATL_PP_RW ) +#define CFG_DBAT1L ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR + 0x20000) | BATL_PP_RW ) #define CFG_DBAT1U ((CFG_SDRAM_BASE+CFG_INIT_RAM_ADDR + 0x20000) | BATU_BL_256M | BATU_VS | BATU_VP) */ @@ -191,9 +191,9 @@ #define CFG_DBAT2L (CFG_INIT_RAM_ADDR | BATL_PP_RW | BATL_MEMCOHERENCE) #define CFG_DBAT2U (CFG_INIT_RAM_ADDR | BATU_BL_128K | BATU_VS | BATU_VP) /* This used to be commented out */ -#define CFG_IBAT2L CFG_DBAT2L +#define CFG_IBAT2L CFG_DBAT2L /* This here too */ -#define CFG_IBAT2U CFG_DBAT2U +#define CFG_IBAT2U CFG_DBAT2U /* I/O and PCI memory at 0xf0000000 diff --git a/include/configs/BAB7xx.h b/include/configs/BAB7xx.h index d312e6b..5dd7a7e 100644 --- a/include/configs/BAB7xx.h +++ b/include/configs/BAB7xx.h @@ -71,8 +71,8 @@ #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) #define CONFIG_COMMANDS (CONFIG_CMD_DFL | CFG_CMD_PCI | CFG_CMD_JFFS2 |\ - CFG_CMD_SCSI | CFG_CMD_IDE | CFG_CMD_DATE |\ - CFG_CMD_FDC | CFG_CMD_ELF) + CFG_CMD_SCSI | CFG_CMD_IDE | CFG_CMD_DATE |\ + CFG_CMD_FDC | CFG_CMD_ELF) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include @@ -319,14 +319,14 @@ #define CFG_NS87308 /* Nat Semi super-io cntr on ISA bus */ #define CFG_NS87308_BADDR_10 1 #define CFG_NS87308_DEVS (CFG_NS87308_UART1 | \ - CFG_NS87308_UART2 | \ - CFG_NS87308_KBC1 | \ - CFG_NS87308_MOUSE | \ - CFG_NS87308_FDC | \ - CFG_NS87308_RARP | \ - CFG_NS87308_GPIO | \ - CFG_NS87308_POWRMAN | \ - CFG_NS87308_RTC_APC ) + CFG_NS87308_UART2 | \ + CFG_NS87308_KBC1 | \ + CFG_NS87308_MOUSE | \ + CFG_NS87308_FDC | \ + CFG_NS87308_RARP | \ + CFG_NS87308_GPIO | \ + CFG_NS87308_POWRMAN | \ + CFG_NS87308_RTC_APC ) #define CFG_NS87308_PS2MOD #define CFG_NS87308_GPIO_BASE 0x0220 @@ -431,7 +431,7 @@ */ #undef CFG_L2 #define L2_INIT (L2CR_L2SIZ_HM | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \ - L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) + L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) #define L2_ENABLE (L2_INIT | L2CR_L2E) #define CFG_L2_BAB7xx diff --git a/include/configs/BUBINGA405EP.h b/include/configs/BUBINGA405EP.h index f776a32..99fcbae 100644 --- a/include/configs/BUBINGA405EP.h +++ b/include/configs/BUBINGA405EP.h @@ -32,7 +32,6 @@ /*#define __DEBUG_START_FROM_SRAM__ */ - /* * High Level Configuration Options * (easy to change) @@ -220,7 +219,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CFG_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ #define CFG_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ diff --git a/include/configs/CANBT.h b/include/configs/CANBT.h index 9b8bd05..7aceb58 100644 --- a/include/configs/CANBT.h +++ b/include/configs/CANBT.h @@ -59,7 +59,7 @@ #define CONFIG_COMMANDS (( CONFIG_CMD_DFL | \ CFG_CMD_IRQ | \ CFG_CMD_EEPROM ) & \ - ~CFG_CMD_NET) + ~CFG_CMD_NET) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include @@ -91,8 +91,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -153,7 +153,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x400 /* 1024 bytes may be used for env vars */ - /* total size of a CAT24WC08 is 1024 bytes */ + /* total size of a CAT24WC08 is 1024 bytes */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/CCM.h b/include/configs/CCM.h index 0fb24db..ba15e91 100644 --- a/include/configs/CCM.h +++ b/include/configs/CCM.h @@ -60,10 +60,10 @@ #undef CONFIG_BOOTARGS #define CONFIG_BOOTCOMMAND "setenv bootargs " \ - "mem=$(mem) " \ - "root=/dev/ram rw ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off " \ - "wt_8xx=timeout:3600; " \ - "bootm" + "mem=$(mem) " \ + "root=/dev/ram rw ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off " \ + "wt_8xx=timeout:3600; " \ + "bootm" #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ diff --git a/include/configs/CPCI405.h b/include/configs/CPCI405.h index d7fbe2e..4be94ed 100644 --- a/include/configs/CPCI405.h +++ b/include/configs/CPCI405.h @@ -46,10 +46,10 @@ #if 0 #define CONFIG_PREBOOT \ - "crc32 f0207004 ffc 0;" \ - "if cmp 0 f0207000 1;" \ - "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ - "else;echo Old CRC is bad;fi" + "crc32 f0207004 ffc 0;" \ + "if cmp 0 f0207000 1;" \ + "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ + "else;echo Old CRC is bad;fi" #endif #undef CONFIG_BOOTARGS @@ -128,8 +128,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -149,7 +149,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -240,7 +240,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x200 /* 512 bytes may be used for env vars */ - /* total size of a CAT24WC08 is 1024 bytes */ + /* total size of a CAT24WC08 is 1024 bytes */ #endif /*----------------------------------------------------------------------- diff --git a/include/configs/CPCI4052.h b/include/configs/CPCI4052.h index 2671b5f..1f9d39c 100644 --- a/include/configs/CPCI4052.h +++ b/include/configs/CPCI4052.h @@ -47,10 +47,10 @@ #if 0 #define CONFIG_PREBOOT \ - "crc32 f0207004 ffc 0;" \ - "if cmp 0 f0207000 1;" \ - "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ - "else;echo Old CRC is bad;fi" + "crc32 f0207004 ffc 0;" \ + "if cmp 0 f0207000 1;" \ + "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ + "else;echo Old CRC is bad;fi" #endif #undef CONFIG_BOOTARGS @@ -135,8 +135,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -160,7 +160,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -251,7 +251,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x800 /* 2048 bytes may be used for env vars*/ - /* total size of a CAT24WC16 is 2048 bytes */ + /* total size of a CAT24WC16 is 2048 bytes */ #endif #define CFG_NVRAM_BASE_ADDR 0xf0200000 /* NVRAM base address */ @@ -279,7 +279,7 @@ * Cache Configuration */ #define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */ - /* have only 8kB, 16kB is save here */ + /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 /* ... */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ diff --git a/include/configs/CPCI405AB.h b/include/configs/CPCI405AB.h index de55e87..00adfd5 100644 --- a/include/configs/CPCI405AB.h +++ b/include/configs/CPCI405AB.h @@ -48,10 +48,10 @@ #if 0 #define CONFIG_PREBOOT \ - "crc32 f0207004 ffc 0;" \ - "if cmp 0 f0207000 1;" \ - "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ - "else;echo Old CRC is bad;fi" + "crc32 f0207004 ffc 0;" \ + "if cmp 0 f0207000 1;" \ + "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ + "else;echo Old CRC is bad;fi" #endif #undef CONFIG_BOOTARGS @@ -123,8 +123,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -148,7 +148,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -239,7 +239,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x400 /* 1024 bytes may be used for env vars*/ - /* total size of a CAT24WC08 is 1024 bytes */ + /* total size of a CAT24WC08 is 1024 bytes */ #endif #define CFG_NVRAM_BASE_ADDR 0xf0200000 /* NVRAM base address */ @@ -267,7 +267,7 @@ * Cache Configuration */ #define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */ - /* have only 8kB, 16kB is save here */ + /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 /* ... */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ diff --git a/include/configs/CPCIISER4.h b/include/configs/CPCIISER4.h index 174b0e5..bcda699 100644 --- a/include/configs/CPCIISER4.h +++ b/include/configs/CPCIISER4.h @@ -90,8 +90,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -111,7 +111,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CFG_PCI_SUBSYS_VENDORID 0x12FE /* PCI Vendor ID: esd gmbh */ #define CFG_PCI_SUBSYS_DEVICEID 0x0404 /* PCI Device ID: CPCI-ISER4 */ @@ -181,7 +181,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x300 /* 768 bytes may be used for env vars */ - /* total size of a CAT24WC08 is 1024 bytes */ + /* total size of a CAT24WC08 is 1024 bytes */ /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/CPU86.h b/include/configs/CPU86.h index 9712d47..390b796 100644 --- a/include/configs/CPU86.h +++ b/include/configs/CPU86.h @@ -361,7 +361,7 @@ * HID1 has only read-only information - nothing to set. */ #define CFG_HID0_INIT (HID0_ICE|HID0_DCE|HID0_ICFI|\ - HID0_DCI|HID0_IFEM|HID0_ABE) + HID0_DCI|HID0_IFEM|HID0_ABE) #define CFG_HID0_FINAL (HID0_IFEM|HID0_ABE) #define CFG_HID2 0 @@ -394,10 +394,10 @@ */ #if defined(CONFIG_WATCHDOG) #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) + SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) #else #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP) + SYPCR_SWRI|SYPCR_SWP) #endif /* CONFIG_WATCHDOG */ /*----------------------------------------------------------------------- @@ -498,55 +498,55 @@ /* Bank 0 - Boot ROM */ #define CFG_BR0_PRELIM ((CFG_BOOTROM_BASE & BRx_BA_MSK)|\ - BRx_PS_8 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_8 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR0_PRELIM (P2SZ_TO_AM(CFG_BOOTROM_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_3_CLK |\ - ORxU_EHTR_8IDLE) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_3_CLK |\ + ORxU_EHTR_8IDLE) /* Bank 1 - FLASH */ #define CFG_BR1_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR1_PRELIM (P2SZ_TO_AM(CFG_FLASH_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_3_CLK |\ - ORxU_EHTR_8IDLE) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_3_CLK |\ + ORxU_EHTR_8IDLE) #else /* CONFIG_BOOT_ROM */ /* Bank 0 - FLASH */ #define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR0_PRELIM (P2SZ_TO_AM(CFG_FLASH_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_3_CLK |\ - ORxU_EHTR_8IDLE) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_3_CLK |\ + ORxU_EHTR_8IDLE) /* Bank 1 - Boot ROM */ #define CFG_BR1_PRELIM ((CFG_BOOTROM_BASE & BRx_BA_MSK)|\ - BRx_PS_8 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_8 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR1_PRELIM (P2SZ_TO_AM(CFG_BOOTROM_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_3_CLK |\ - ORxU_EHTR_8IDLE) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_3_CLK |\ + ORxU_EHTR_8IDLE) #endif /* CONFIG_BOOT_ROM */ @@ -555,9 +555,9 @@ */ #ifndef CFG_RAMBOOT #define CFG_BR2_PRELIM ((CFG_SDRAM_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_SDRAM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_SDRAM_P |\ + BRx_V) #define CFG_OR2_PRELIM CFG_OR2_9COL @@ -567,88 +567,88 @@ /* Bank 3 - Dual Ported SRAM */ #define CFG_BR3_PRELIM ((CFG_DPSRAM_BASE & BRx_BA_MSK) |\ - BRx_PS_16 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_16 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR3_PRELIM (P2SZ_TO_AM(CFG_DPSRAM_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_5_CLK |\ - ORxG_SETA) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_5_CLK |\ + ORxG_SETA) /* Bank 4 - DiskOnChip */ #define CFG_BR4_PRELIM ((CFG_DOC_BASE & BRx_BA_MSK) |\ - BRx_PS_8 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_8 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR4_PRELIM (P2SZ_TO_AM(CFG_DOC_SIZE) |\ - ORxG_ACS_DIV2 |\ - ORxG_SCY_5_CLK |\ - ORxU_EHTR_8IDLE) + ORxG_ACS_DIV2 |\ + ORxG_SCY_5_CLK |\ + ORxU_EHTR_8IDLE) /* Bank 5 - FDC37C78 controller */ #define CFG_BR5_PRELIM ((CFG_FDC37C78_BASE & BRx_BA_MSK) |\ - BRx_PS_8 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_8 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR5_PRELIM (P2SZ_TO_AM(CFG_FDC37C78_SIZE) |\ - ORxG_ACS_DIV2 |\ - ORxG_SCY_8_CLK |\ - ORxU_EHTR_8IDLE) + ORxG_ACS_DIV2 |\ + ORxG_SCY_8_CLK |\ + ORxU_EHTR_8IDLE) /* Bank 6 - Board control registers */ #define CFG_BR6_PRELIM ((CFG_BCRS_BASE & BRx_BA_MSK) |\ - BRx_PS_8 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_8 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR6_PRELIM (P2SZ_TO_AM(CFG_BCRS_SIZE) |\ - ORxG_CSNT |\ - ORxG_SCY_5_CLK) + ORxG_CSNT |\ + ORxG_SCY_5_CLK) /* Bank 7 - VME Extended Access Range */ #define CFG_BR7_PRELIM ((CFG_VMEEAR_BASE & BRx_BA_MSK) |\ - BRx_PS_32 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_32 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR7_PRELIM (P2SZ_TO_AM(CFG_VMEEAR_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_5_CLK |\ - ORxG_SETA) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_5_CLK |\ + ORxG_SETA) /* Bank 8 - VME Standard Access Range */ #define CFG_BR8_PRELIM ((CFG_VMESAR_BASE & BRx_BA_MSK) |\ - BRx_PS_16 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_16 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR8_PRELIM (P2SZ_TO_AM(CFG_VMESAR_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_5_CLK |\ - ORxG_SETA) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_5_CLK |\ + ORxG_SETA) /* Bank 9 - VME Short I/O Access Range */ #define CFG_BR9_PRELIM ((CFG_VMESIOAR_BASE & BRx_BA_MSK) |\ - BRx_PS_16 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_16 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR9_PRELIM (P2SZ_TO_AM(CFG_VMESIOAR_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_5_CLK |\ - ORxG_SETA) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_5_CLK |\ + ORxG_SETA) #endif /* __CONFIG_H */ diff --git a/include/configs/CRAYL1.h b/include/configs/CRAYL1.h index 1bd6899..fd85944 100644 --- a/include/configs/CRAYL1.h +++ b/include/configs/CRAYL1.h @@ -46,7 +46,7 @@ /* set PRAM to keep U-Boot out, mem= to keep linux out, and initrd_hi to * keep possible initrd ramdisk decompression out. This is in k (1024 bytes) - #define CONFIG_PRAM 16 + #define CONFIG_PRAM 16 */ #define CONFIG_LOADADDR 0x100000 /* where TFTP images go */ #undef CONFIG_BOOTARGS @@ -56,10 +56,10 @@ #define CFG_AUTOLOAD "no" #define CONFIG_BOOTCOMMAND "dhcp" -/* +/* * ..during experiments.. #define CONFIG_SERVERIP 10.0.0.1 - #define CONFIG_ETHADDR 00:40:a6:80:14:5 + #define CONFIG_ETHADDR 00:40:a6:80:14:5 */ #define CONFIG_HARD_I2C 1 /* hardware support for i2c */ #define CONFIG_SDRAM_BANK0 1 @@ -108,13 +108,13 @@ CONFIG_BOOTP_BOOTFILESIZE|\ CONFIG_BOOTP_BOOTPATH) -/* +/* * how many time to fail & restart a net-TFTP before giving up & resetting * the board hoping that a reset of net interface might help.. */ #define CONFIG_NET_RESET 5 -/* +/* * bauds. Just to make it compile; in our case, I read the base_baud * from the DCR anyway, so its kinda-tied to the above ref. clock which in turn * drives the system clock. @@ -168,7 +168,7 @@ #define CFG_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */ /* BEG ENVIRONNEMENT FLASH: needs to be a whole FlashSector */ -#define CFG_ENV_OFFSET 0x3c8000 +#define CFG_ENV_OFFSET 0x3c8000 #define CFG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */ #define CFG_ENV_SIZE 0x1000 /* Total Size of Environment area */ #define CFG_ENV_SECT_SIZE 0x10000 /* see README - env sector total size */ @@ -184,15 +184,15 @@ #define CFG_STACK_USAGE 0x10000 /* Reserve 64k for the stack usage */ #define CFG_MALLOC_LEN (128 << 10) /* 128k for malloc space */ #define CFG_MEM_END_USAGE ( CFG_MONITOR_LEN \ - + CFG_MALLOC_LEN \ - + CFG_ENV_SECT_SIZE \ - + CFG_STACK_USAGE ) + + CFG_MALLOC_LEN \ + + CFG_ENV_SECT_SIZE \ + + CFG_STACK_USAGE ) #define CFG_MEMTEST_END (CFG_SDRAM_SIZE * 1024 * 1024 - CFG_MEM_END_USAGE) /* END ENVIRONNEMENT FLASH */ /*----------------------------------------------------------------------- - * Cache Configuration. Only used to ..?? clear it, I guess.. + * Cache Configuration. Only used to ..?? clear it, I guess.. */ #define CFG_DCACHE_SIZE 16384 #define CFG_CACHELINE_SIZE 32 diff --git a/include/configs/DASA_SIM.h b/include/configs/DASA_SIM.h index 229e458..30e978c 100644 --- a/include/configs/DASA_SIM.h +++ b/include/configs/DASA_SIM.h @@ -98,7 +98,7 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ diff --git a/include/configs/DU405.h b/include/configs/DU405.h index bac6221..3e5fc3f 100644 --- a/include/configs/DU405.h +++ b/include/configs/DU405.h @@ -97,8 +97,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -118,7 +118,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -210,7 +210,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x400 /* 1024 bytes may be used for env vars */ - /* total size of a CAT24WC08 is 1024 bytes */ + /* total size of a CAT24WC08 is 1024 bytes */ /*----------------------------------------------------------------------- * Cache Configuration diff --git a/include/configs/ELPPC.h b/include/configs/ELPPC.h index 54cdd23..7176905 100644 --- a/include/configs/ELPPC.h +++ b/include/configs/ELPPC.h @@ -319,7 +319,7 @@ #define L2_INIT 0 /* cpu 750 CXe*/ #else #define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \ - L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) + L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) #endif #define L2_ENABLE (L2_INIT | L2CR_L2E) diff --git a/include/configs/ELPT860.h b/include/configs/ELPT860.h index e9561b9..2f253b9 100644 --- a/include/configs/ELPT860.h +++ b/include/configs/ELPT860.h @@ -64,20 +64,20 @@ "echo Type \"run nfsboot\" to mount root filesystem over NFS;" \ "echo" -#undef CONFIG_BOOTARGS +#undef CONFIG_BOOTARGS #define CONFIG_EXTRA_ENV_SETTINGS \ "ramargs=setenv bootargs root=/dev/ram rw\0" \ "rootargs=setenv rootpath /tftp/$(ipaddr)\0" \ "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$(serverip):$(rootpath)\0" \ + "nfsroot=$(serverip):$(rootpath)\0" \ "addip=setenv bootargs $(bootargs) " \ - "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ - ":$(hostname):eth0:off panic=1\0" \ + "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ + ":$(hostname):eth0:off panic=1\0" \ "ramboot=tftp 400000 /home/paugaml/pMulti;" \ - "run ramargs;bootm\0" \ + "run ramargs;bootm\0" \ "nfsboot=tftp 400000 /home/paugaml/uImage;" \ - "run rootargs;run nfsargs;run addip;bootm\0" \ + "run rootargs;run nfsargs;run addip;bootm\0" \ "" #define CONFIG_BOOTCOMMAND "run ramboot" @@ -92,8 +92,8 @@ #undef CFG_LOADS_BAUD_CHANGE /* don't allow baudrate change */ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_ASKENV | \ - CFG_CMD_DATE ) + CFG_CMD_ASKENV | \ + CFG_CMD_DATE ) /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include @@ -212,7 +212,7 @@ */ #define CFG_NVRAM_BASE_ADDR CFG_NVRAM_BASE /* Base address of NVRAM area */ #define CFG_NVRAM_SIZE ((128*1024)-8) /* clock regs resident in the */ - /* 8 top NVRAM locations */ + /* 8 top NVRAM locations */ #if defined(CFG_ENV_IS_IN_NVRAM) # define CFG_ENV_ADDR CFG_NVRAM_BASE /* Base address of NVRAM area */ @@ -236,10 +236,10 @@ */ #if defined(CONFIG_WATCHDOG) # define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ - SYPCR_SWE | SYPCR_SWRI | SYPCR_SWP) + SYPCR_SWE | SYPCR_SWRI | SYPCR_SWP) #else # define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ - SYPCR_SWP) + SYPCR_SWP) #endif /*----------------------------------------------------------------------- diff --git a/include/configs/ERIC.h b/include/configs/ERIC.h index 9f6baf7..539716f 100644 --- a/include/configs/ERIC.h +++ b/include/configs/ERIC.h @@ -156,7 +156,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ #undef CONFIG_PCI_PNP /* no pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CFG_PCI_SUBSYS_VENDORID 0x1743 /* PCI Vendor ID: Peppercon AG */ #define CFG_PCI_SUBSYS_DEVICEID 0x0405 /* PCI Device ID: 405GP */ diff --git a/include/configs/ESTEEM192E.h b/include/configs/ESTEEM192E.h index 7a8fba6..b176c6f 100644 --- a/include/configs/ESTEEM192E.h +++ b/include/configs/ESTEEM192E.h @@ -113,7 +113,6 @@ #define CFG_INIT_SP_OFFSET CFG_GBL_DATA_OFFSET - /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) @@ -301,7 +300,6 @@ #define CFG_MAMR_9COL 0x18803112 /* same as 8 column because its just easier to port with*/ - /* * Internal Definitions * diff --git a/include/configs/ETX094.h b/include/configs/ETX094.h index b6e1941..137b1a7 100644 --- a/include/configs/ETX094.h +++ b/include/configs/ETX094.h @@ -282,7 +282,7 @@ /* FLASH timing: ACS = 11, TRLX = 1, CSNT = 0, SCY = 2, EHTR = 0 */ #define CFG_OR_TIMING_FLASH (OR_ACS_DIV2 | OR_BI | \ - OR_SCY_2_CLK | OR_TRLX ) + OR_SCY_2_CLK | OR_TRLX ) #define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH) #define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) diff --git a/include/configs/EVB64260.h b/include/configs/EVB64260.h index acd8538..af5122f 100644 --- a/include/configs/EVB64260.h +++ b/include/configs/EVB64260.h @@ -198,11 +198,11 @@ #define CFG_DEV2_PAR 0xc0059bd4 #define CFG_8BIT_BOOT_PAR 0xc00b5e7c #define CFG_32BIT_BOOT_PAR 0xc4a8241c - /* c 4 a 8 2 4 1 c */ - /* 33 22|2222|22 22|111 1|11 11|1 1 | | */ - /* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */ - /* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100 */ - /* 3| 0|.... ..| 2| 4 | 0 | 4 | 8 | 3 | 4 */ + /* c 4 a 8 2 4 1 c */ + /* 33 22|2222|22 22|111 1|11 11|1 1 | | */ + /* 10 98|7654|32 10|987 6|54 32|1 098|7 654|3 210 */ + /* 11|00|0100|10 10|100|0 00|10 0|100 0|001 1|100 */ + /* 3| 0|.... ..| 2| 4 | 0 | 4 | 8 | 3 | 4 */ #if 0 /* Wrong?? NTL */ #define CFG_MPP_CONTROL_0 0x53541717 /* InitAct EOT[4] DBurst TCEn[1] */ @@ -229,11 +229,11 @@ /* GPP[27:26] Int[1:0] */ #else # define CFG_MPP_CONTROL_3 0x22090066 /* MREQ MGNT */ - /* GPP[29] (PCI1Int) */ - /* BClkOut0 */ - /* GPP[27] (PCI0Int) */ - /* GPP[26] (RtcInt or PCI1Int) */ - /* CPUInt[25:24] */ + /* GPP[29] (PCI1Int) */ + /* BClkOut0 */ + /* GPP[27] (PCI0Int) */ + /* GPP[26] (RtcInt or PCI1Int) */ + /* CPUInt[25:24] */ #endif # define CFG_SERIAL_PORT_MUX 0x00000102 /* 0=hiZ 1=MPSC0 2=ETH 0 and 2 RMII */ @@ -242,9 +242,9 @@ # define CFG_GPP_LEVEL_CONTROL 0x000002c6 #else # define CFG_GPP_LEVEL_CONTROL 0x2c600000 /* 0010 1100 0110 0000 */ - /* gpp[29] */ + /* gpp[29] */ /* gpp[27:26] */ - /* gpp[22:21] */ + /* gpp[22:21] */ # define CFG_SDRAM_CONFIG 0xd8e18200 /* 0x448 */ /* idmas use buffer 1,1 @@ -295,7 +295,6 @@ #define CFG_PCI1_0_MEM_SPACE (CFG_PCI1_MEM_BASE) - /* PCI I/O MAP section */ #define CFG_PCI0_IO_BASE 0xfa000000 #define CFG_PCI0_IO_SIZE _16M diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h index 47a8786..0702c2c 100644 --- a/include/configs/GEN860T.h +++ b/include/configs/GEN860T.h @@ -50,7 +50,7 @@ * generated by the DS1337 - and the DS1337 clock can be turned off. */ #if !defined(CONFIG_SC) -#define CONFIG_8xx_GCLK_FREQ 66600000 +#define CONFIG_8xx_GCLK_FREQ 66600000 #else #define CONFIG_8xx_GCLK_FREQ 48000000 #endif @@ -204,7 +204,7 @@ * length of time, so we use an external RTC on the I2C bus instead. */ #define CONFIG_RTC_DS1337 -#define CFG_I2C_RTC_ADDR 0x68 +#define CFG_I2C_RTC_ADDR 0x68 #else /* @@ -248,7 +248,7 @@ CFG_CMD_POST_DIAG ) #if !defined(CONFIG_SC) -#define CONFIG_COMMANDS ( BASE_CONFIG_COMMANDS | CFG_CMD_DOC ) +#define CONFIG_COMMANDS ( BASE_CONFIG_COMMANDS | CFG_CMD_DOC ) #else #define CONFIG_COMMANDS BASE_CONFIG_COMMANDS #endif diff --git a/include/configs/IP860.h b/include/configs/IP860.h index fddf0ca..6490962 100644 --- a/include/configs/IP860.h +++ b/include/configs/IP860.h @@ -227,7 +227,7 @@ SIUMCR_DBGC11 | SIUMCR_MLRC10) /*----------------------------------------------------------------------- - * Clock Setting - get clock frequency from Board Revision Register + * Clock Setting - get clock frequency from Board Revision Register *----------------------------------------------------------------------- */ #ifndef __ASSEMBLY__ diff --git a/include/configs/KUP4K.h b/include/configs/KUP4K.h index b924b9c..962a468 100644 --- a/include/configs/KUP4K.h +++ b/include/configs/KUP4K.h @@ -432,7 +432,6 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ - #define CONFIG_AUTOBOOT_KEYED /* use key strings to stop autoboot */ #if 0 #define CONFIG_AUTOBOOT_PROMPT "Boote in %d Sekunden - stop mit \"2\"\n" diff --git a/include/configs/LANTEC.h b/include/configs/LANTEC.h index 56ecf0c..4c01cda 100644 --- a/include/configs/LANTEC.h +++ b/include/configs/LANTEC.h @@ -297,7 +297,7 @@ /* FLASH timing */ #define CFG_OR_TIMING_FLASH (OR_CSNT_SAM | OR_BI | \ - OR_SCY_5_CLK | OR_TRLX) + OR_SCY_5_CLK | OR_TRLX) #define CFG_OR0_REMAP (CFG_REMAP_OR_AM | CFG_OR_TIMING_FLASH) #define CFG_OR0_PRELIM (CFG_PRELIM_OR_AM | CFG_OR_TIMING_FLASH) diff --git a/include/configs/MBX.h b/include/configs/MBX.h index e62d36c..d6e3fb8 100644 --- a/include/configs/MBX.h +++ b/include/configs/MBX.h @@ -72,7 +72,7 @@ #undef CONFIG_WATCHDOG /* watchdog disabled */ #define CONFIG_COMMANDS ( CFG_CMD_NET | CONFIG_CMD_DFL | CFG_CMD_SDRAM | \ - CFG_CMD_PCMCIA | CFG_CMD_IDE ) + CFG_CMD_PCMCIA | CFG_CMD_IDE ) #define CONFIG_DOS_PARTITION diff --git a/include/configs/MHPC.h b/include/configs/MHPC.h index 78caafd..e36341f 100644 --- a/include/configs/MHPC.h +++ b/include/configs/MHPC.h @@ -116,12 +116,12 @@ #define CONFIG_BR0_WORKAROUND 1 #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_DATE | \ - CFG_CMD_EEPROM | \ - CFG_CMD_ELF | \ - CFG_CMD_I2C | \ - CFG_CMD_JFFS2 | \ - CFG_CMD_REGINFO ) + CFG_CMD_DATE | \ + CFG_CMD_EEPROM | \ + CFG_CMD_ELF | \ + CFG_CMD_I2C | \ + CFG_CMD_JFFS2 | \ + CFG_CMD_REGINFO ) #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | CONFIG_BOOTP_BOOTFILESIZE) @@ -225,7 +225,7 @@ SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) #else #define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ - SYPCR_SWP) + SYPCR_SWP) #endif /*----------------------------------------------------------------------- @@ -265,7 +265,7 @@ #define MPC8XX_XIN 5000000L /* ref clk */ #define MPC8XX_FACT (MPC8XX_SPEED/MPC8XX_XIN) #define CFG_PLPRCR (((MPC8XX_FACT-1) << PLPRCR_MF_SHIFT) | \ - PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST) + PLPRCR_SPLSS | PLPRCR_TEXPS | PLPRCR_TMIST) /*----------------------------------------------------------------------- * SCCR - System Clock and reset Control Register 15-27 diff --git a/include/configs/MIP405.h b/include/configs/MIP405.h index b29eb8b..8d79307 100644 --- a/include/configs/MIP405.h +++ b/include/configs/MIP405.h @@ -44,7 +44,7 @@ * CONFIG_BOOT_PCI is only used for first boot-up and should * NOT be enabled for production bootloader ***********************************************************/ -/*#define CONFIG_BOOT_PCI 1*/ +/*#define CONFIG_BOOT_PCI 1*/ /*********************************************************** * Clock ***********************************************************/ @@ -260,7 +260,6 @@ #define CONFIG_PORT_ADDR PER_PLD_ADDR + 5 - /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in On Chip SRAM) */ diff --git a/include/configs/ML2.h b/include/configs/ML2.h index d662661..5fe5d54 100644 --- a/include/configs/ML2.h +++ b/include/configs/ML2.h @@ -76,7 +76,6 @@ #define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ - #define CONFIG_COMMANDS ( (CONFIG_CMD_DFL & (~CFG_CMD_NET) & \ (~CFG_CMD_RTC) & ~(CFG_CMD_PCI) & ~(CFG_CMD_I2C)) | \ CFG_CMD_IRQ | \ @@ -142,7 +141,6 @@ #define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */ - /*----------------------------------------------------------------------- * Start addresses for the final memory configuration * (Set up by the startup code) diff --git a/include/configs/MOUSSE.h b/include/configs/MOUSSE.h index 109ed3d..6ad2feb 100644 --- a/include/configs/MOUSSE.h +++ b/include/configs/MOUSSE.h @@ -229,7 +229,7 @@ #define CFG_PGMAX 0x32 /* how long the 8240 reatins the currently accessed page in memory - see 8240 book for details*/ + see 8240 book for details*/ #define PCI_MEM_SPACE1_START 0x80000000 #define PCI_MEM_SPACE2_START 0xfd000000 @@ -296,7 +296,6 @@ #define CFG_CACHELINE_SIZE 16 - /* * Internal Definitions * @@ -328,5 +327,3 @@ #define CONFIG_TULIP #endif /* __CONFIG_H */ - - diff --git a/include/configs/MPC8266ADS.h b/include/configs/MPC8266ADS.h index 9e8d732..8501b2b 100644 --- a/include/configs/MPC8266ADS.h +++ b/include/configs/MPC8266ADS.h @@ -38,7 +38,7 @@ !! 0xfff00000 !! !! The CFG_HRCW_MASTER define below must also be changed to match !! !! !! - !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! + !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! */ #ifndef __CONFIG_H @@ -398,15 +398,15 @@ /* Use this HRCW for booting from address 0xfff0000 (JP3 in setting 2-3) */ /* #define CFG_HRCW_MASTER 0x0cb23645 */ -/* This value should actually be situated in the first 256 bytes of the FLASH +/* This value should actually be situated in the first 256 bytes of the FLASH which on the standard MPC8266ADS board is at address 0xFF800000 The linker script places it at 0xFFF00000 instead. - It still works, however, as long as the ADS board jumper JP3 is set to - position 2-3 so the board is using the BCSR as Hardware Configuration Word + It still works, however, as long as the ADS board jumper JP3 is set to + position 2-3 so the board is using the BCSR as Hardware Configuration Word - If you want to use the one defined here instead, ust copy the first 256 bytes from - 0xfff00000 to 0xff800000 (for 8MB flash) + If you want to use the one defined here instead, ust copy the first 256 bytes from + 0xfff00000 to 0xff800000 (for 8MB flash) - Rune @@ -514,12 +514,12 @@ #define CFG_PCI_SLV_MEM_LOCAL CFG_SDRAM_BASE /* Local base */ #define CFG_PCI_SLV_MEM_BUS 0x00000000 /* PCI base */ #define CFG_PICMR0_MASK_ATTRIB (PICMR_MASK_512MB | PICMR_ENABLE | \ - PICMR_PREFETCH_EN) + PICMR_PREFETCH_EN) -/* +/* * These are the windows that allow the CPU to access PCI address space. - * All three PCI master windows, which allow the CPU to access PCI - * prefetch, non prefetch, and IO space (see below), must all fit within + * All three PCI master windows, which allow the CPU to access PCI + * prefetch, non prefetch, and IO space (see below), must all fit within * these windows. */ @@ -530,7 +530,7 @@ #define CFG_PCI_MSTR1_LOCAL 0xF4000000 /* Local base */ #define CFG_PCIMSK1_MASK PCIMSK_64MB /* Size of window */ -/* +/* * Master window that allows the CPU to access PCI Memory (prefetch). * This window will be setup with the first set of Outbound ATU registers * in the bridge. @@ -542,7 +542,7 @@ #define CFG_PCI_MSTR_MEM_SIZE 0x20000000 /* 512MB */ #define CFG_POCMR0_MASK_ATTRIB (POCMR_MASK_512MB | POCMR_ENABLE | POCMR_PREFETCH_EN) -/* +/* * Master window that allows the CPU to access PCI Memory (non-prefetch). * This window will be setup with the second set of Outbound ATU registers * in the bridge. @@ -554,7 +554,7 @@ #define CFG_PCI_MSTR_MEMIO_SIZE 0x20000000 /* 512MB */ #define CFG_POCMR1_MASK_ATTRIB (POCMR_MASK_512MB | POCMR_ENABLE) -/* +/* * Master window that allows the CPU to access PCI IO space. * This window will be setup with the third set of Outbound ATU registers * in the bridge. diff --git a/include/configs/MUSENKI.h b/include/configs/MUSENKI.h index 03765a3..da52e0e 100644 --- a/include/configs/MUSENKI.h +++ b/include/configs/MUSENKI.h @@ -292,6 +292,4 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/MVS1.h b/include/configs/MVS1.h index d10fa8f..49bdc45 100644 --- a/include/configs/MVS1.h +++ b/include/configs/MVS1.h @@ -184,7 +184,7 @@ */ #if defined(CONFIG_WATCHDOG) #define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ - SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) + SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) #else #define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | SYPCR_SWP) #endif diff --git a/include/configs/OCRTC.h b/include/configs/OCRTC.h index 0ac456a..fb3b642 100644 --- a/include/configs/OCRTC.h +++ b/include/configs/OCRTC.h @@ -95,8 +95,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -116,7 +116,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_AUTO /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -188,7 +188,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x300 /* 768 bytes may be used for env vars */ - /* total size of a CAT24WC08 is 1024 bytes */ + /* total size of a CAT24WC08 is 1024 bytes */ #endif /*----------------------------------------------------------------------- @@ -240,32 +240,32 @@ /* Memory Bank 2 (PLD - FPGA-boot) initialization */ #define CFG_EBC_PB2AP 0x02015480 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB2CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ /* Memory Bank 3 (PLD - OSL) initialization */ #define CFG_EBC_PB3AP 0x02015480 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB3CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */ /* Memory Bank 4 (Spartan2 1) initialization */ #define CFG_EBC_PB4AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB4CR 0xF209C000 /* BAS=0xF20,BS=16MB,BU=R/W,BW=32bit*/ /* Memory Bank 5 (Spartan2 2) initialization */ #define CFG_EBC_PB5AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB5CR 0xF309C000 /* BAS=0xF30,BS=16MB,BU=R/W,BW=32bit*/ /* Memory Bank 6 (Virtex 1) initialization */ #define CFG_EBC_PB6AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB6CR 0xF409A000 /* BAS=0xF40,BS=16MB,BU=R/W,BW=16bit*/ /* Memory Bank 7 (Virtex 2) initialization */ #define CFG_EBC_PB7AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB7CR 0xF509A000 /* BAS=0xF50,BS=16MB,BU=R/W,BW=16bit*/ diff --git a/include/configs/ORSG.h b/include/configs/ORSG.h index 7c161c6..5da3fc5 100644 --- a/include/configs/ORSG.h +++ b/include/configs/ORSG.h @@ -95,8 +95,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -116,7 +116,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_ADAPTER /* select pci adapter */ #undef CONFIG_PCI_PNP /* no pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -186,7 +186,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x300 /* 768 bytes may be used for env vars */ - /* total size of a CAT24WC08 is 1024 bytes */ + /* total size of a CAT24WC08 is 1024 bytes */ #endif /*----------------------------------------------------------------------- @@ -238,32 +238,32 @@ /* Memory Bank 2 (PLD - FPGA-boot) initialization */ #define CFG_EBC_PB2AP 0x02015480 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB2CR 0xF0018000 /* BAS=0xF00,BS=1MB,BU=R/W,BW=8bit */ /* Memory Bank 3 (PLD - OSL) initialization */ #define CFG_EBC_PB3AP 0x02015480 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x0,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB3CR 0xF0118000 /* BAS=0xF01,BS=1MB,BU=R/W,BW=8bit */ /* Memory Bank 4 (Spartan2 1) initialization */ #define CFG_EBC_PB4AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB4CR 0xF209C000 /* BAS=0xF20,BS=16MB,BU=R/W,BW=32bit*/ /* Memory Bank 5 (Spartan2 2) initialization */ #define CFG_EBC_PB5AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB5CR 0xF309C000 /* BAS=0xF30,BS=16MB,BU=R/W,BW=32bit*/ /* Memory Bank 6 (Virtex 1) initialization */ #define CFG_EBC_PB6AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB6CR 0xF409A000 /* BAS=0xF40,BS=16MB,BU=R/W,BW=16bit*/ /* Memory Bank 7 (Virtex 2) initialization */ #define CFG_EBC_PB7AP 0x02015580 /* BME=0x0,TWT=0x04,CSN=0x0,OEN=0x1 */ - /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ + /* WBN=0x1,WBF=0x1,TH=0x2,RE=0x1,SOR=0x1,BEM=0x0,PEN=0x0*/ #define CFG_EBC_PB7CR 0xF509A000 /* BAS=0xF50,BS=16MB,BU=R/W,BW=16bit*/ diff --git a/include/configs/PCI405.h b/include/configs/PCI405.h index b1ed0cb..8ab253a 100644 --- a/include/configs/PCI405.h +++ b/include/configs/PCI405.h @@ -47,10 +47,10 @@ #if 0 #define CONFIG_PREBOOT \ - "crc32 f0207004 ffc 0;" \ - "if cmp 0 f0207000 1;" \ - "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ - "else;echo Old CRC is bad;fi" + "crc32 f0207004 ffc 0;" \ + "if cmp 0 f0207000 1;" \ + "then;echo Old CRC is correct;crc32 f0207004 ff4 f0207000;" \ + "else;echo Old CRC is bad;fi" #endif #undef CONFIG_BOOTARGS @@ -60,8 +60,8 @@ #else #define CONFIG_BOOTCOMMAND \ "mw.l 0 ffffffff; mw.l 4 ffffffff;" \ - "while cmp 0 4 1; do echo Waiting for Host...;done;" \ - "bootm 400000" + "while cmp 0 4 1; do echo Waiting for Host...;done;" \ + "bootm 400000" #endif #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ @@ -123,8 +123,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -144,7 +144,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_ADAPTER /* select pci host function */ #undef CONFIG_PCI_PNP /* no pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -218,7 +218,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x400 /* 1024 bytes may be used for env vars*/ - /* total size of a CAT24WC08 is 1024 bytes */ + /* total size of a CAT24WC08 is 1024 bytes */ #endif #define CFG_NVRAM_BASE_ADDR 0xf0200000 /* NVRAM base address */ diff --git a/include/configs/PCIPPC2.h b/include/configs/PCIPPC2.h index 3eb6ac3..645cdc5 100644 --- a/include/configs/PCIPPC2.h +++ b/include/configs/PCIPPC2.h @@ -56,7 +56,7 @@ #define CONFIG_BOOTDELAY 5 #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \ - CONFIG_BOOTP_BOOTFILESIZE) + CONFIG_BOOTP_BOOTFILESIZE) #define CONFIG_MAC_PARTITION #define CONFIG_DOS_PARTITION @@ -231,7 +231,7 @@ */ #undef CFG_L2 #define L2_INIT (L2CR_L2SIZ_2M | L2CR_L2CLK_3 | L2CR_L2RAM_BURST | \ - L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) + L2CR_L2OH_5 | L2CR_L2CTL | L2CR_L2WT) #define L2_ENABLE (L2_INIT | L2CR_L2E) /* diff --git a/include/configs/PCIPPC6.h b/include/configs/PCIPPC6.h index f4dfbfe..4953458 100644 --- a/include/configs/PCIPPC6.h +++ b/include/configs/PCIPPC6.h @@ -278,6 +278,4 @@ #define CONFIG_MAC_PARTITION #define CONFIG_ISO_PARTITION - - #endif /* __CONFIG_H */ diff --git a/include/configs/PIP405.h b/include/configs/PIP405.h index 8fbbe30..60e5a9a 100644 --- a/include/configs/PIP405.h +++ b/include/configs/PIP405.h @@ -239,7 +239,6 @@ #define MULTI_PURPOSE_SOCKET_ADDR 0xF8000000 - /*----------------------------------------------------------------------- * Definitions for initial stack pointer and data area (in On Chip SRAM) */ diff --git a/include/configs/PM826.h b/include/configs/PM826.h index 6ba14af..6668578 100644 --- a/include/configs/PM826.h +++ b/include/configs/PM826.h @@ -347,7 +347,7 @@ * HID1 has only read-only information - nothing to set. */ #define CFG_HID0_INIT (HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI|\ - HID0_IFEM|HID0_ABE) + HID0_IFEM|HID0_ABE) #define CFG_HID0_FINAL (HID0_ICE|HID0_IFEM|HID0_ABE) #define CFG_HID2 0 @@ -385,10 +385,10 @@ */ #if defined(CONFIG_WATCHDOG) #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) + SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) #else #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP) + SYPCR_SWRI|SYPCR_SWP) #endif /* CONFIG_WATCHDOG */ /*----------------------------------------------------------------------- @@ -482,16 +482,16 @@ * Bank 0 - Flash (64 bit wide) */ #define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR0_PRELIM (P2SZ_TO_AM(CFG_FLASH_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_3_CLK |\ - ORxG_EHTR |\ - ORxG_TRLX) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_3_CLK |\ + ORxG_EHTR |\ + ORxG_TRLX) /* * Bank 1 - Disk-On-Chip @@ -515,43 +515,43 @@ #define CFG_PSRT 0x0F #ifndef CFG_RAMBOOT #define CFG_BR2_PRELIM ((CFG_SDRAM_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_SDRAM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_SDRAM_P |\ + BRx_V) /* SDRAM initialization values for 8-column chips */ #define CFG_OR2_8COL (CFG_MIN_AM_MASK |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A9 |\ - ORxS_NUMR_12) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI0_A9 |\ + ORxS_NUMR_12) #define CFG_PSDMR_8COL (PSDMR_SDAM_A13_IS_A5 |\ - PSDMR_BSMA_A14_A16 |\ - PSDMR_SDA10_PBI0_A10 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_1W |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_1C |\ - PSDMR_CL_2) + PSDMR_BSMA_A14_A16 |\ + PSDMR_SDA10_PBI0_A10 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_1W |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_1C |\ + PSDMR_CL_2) /* SDRAM initialization values for 9-column chips */ #define CFG_OR2_9COL (CFG_MIN_AM_MASK |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A7 |\ - ORxS_NUMR_13) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI0_A7 |\ + ORxS_NUMR_13) #define CFG_PSDMR_9COL (PSDMR_SDAM_A14_IS_A5 |\ - PSDMR_BSMA_A13_A15 |\ - PSDMR_SDA10_PBI0_A9 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_1W |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_1C |\ - PSDMR_CL_2) + PSDMR_BSMA_A13_A15 |\ + PSDMR_SDA10_PBI0_A9 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_1W |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_1C |\ + PSDMR_CL_2) #define CFG_OR2_PRELIM CFG_OR2_9COL #define CFG_PSDMR CFG_PSDMR_9COL diff --git a/include/configs/PMC405.h b/include/configs/PMC405.h index e3d3785..54b53bc 100644 --- a/include/configs/PMC405.h +++ b/include/configs/PMC405.h @@ -119,8 +119,8 @@ /* The following table includes the supported baudrates */ #define CFG_BAUDRATE_TABLE \ - { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ - 57600, 115200, 230400, 460800, 921600 } + { 300, 600, 1200, 2400, 4800, 9600, 19200, 38400, \ + 57600, 115200, 230400, 460800, 921600 } #define CFG_LOAD_ADDR 0x100000 /* default load address */ #define CFG_EXTBDINFO 1 /* To use extended board_into (bd_t) */ @@ -144,7 +144,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #undef CONFIG_PCI_SCAN_SHOW /* print pci devices @ startup */ @@ -197,7 +197,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */ #define CFG_ENV_OFFSET 0x000 /* environment starts at the beginning of the EEPROM */ #define CFG_ENV_SIZE 0x800 /* 2048 bytes may be used for env vars*/ - /* total size of a CAT24WC16 is 2048 bytes */ + /* total size of a CAT24WC16 is 2048 bytes */ #define CFG_NVRAM_BASE_ADDR 0xF0000500 /* NVRAM base address */ #define CFG_NVRAM_SIZE 242 /* NVRAM size */ @@ -223,7 +223,7 @@ * Cache Configuration */ #define CFG_DCACHE_SIZE 16384 /* For IBM 405 CPUs, older 405 ppc's */ - /* have only 8kB, 16kB is save here */ + /* have only 8kB, 16kB is save here */ #define CFG_CACHELINE_SIZE 32 /* ... */ #if (CONFIG_COMMANDS & CFG_CMD_KGDB) #define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ diff --git a/include/configs/RPXClassic.h b/include/configs/RPXClassic.h index f20b8f9..959ee1a 100644 --- a/include/configs/RPXClassic.h +++ b/include/configs/RPXClassic.h @@ -182,7 +182,7 @@ #define CFG_SDRAM_BASE 0x00000000 #define CFG_FLASH_BASE 0xFF000000 -#if defined(DEBUG) || defined (CONFIG_VIDEO_SED13806) || (CONFIG_COMMANDS & CFG_CMD_IDE) +#if defined(DEBUG) || defined (CONFIG_VIDEO_SED13806) || (CONFIG_COMMANDS & CFG_CMD_IDE) #define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */ #else #define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */ @@ -370,8 +370,8 @@ /* ECCX CS settings */ #define SED13806_OR 0xFFC00108 /* - 4 Mo - - Burst inhibit - - external TA */ + - Burst inhibit + - external TA */ #define SED13806_REG_ADDR 0xa0000000 #define SED13806_ACCES 0x801 /* 16 bit access */ @@ -391,8 +391,8 @@ /* Definitions for CSR8 */ #define ECCX_ENEPSON 0x80 /* Bit 0: - 0= disable and reset SED1386 - 1= enable SED1386 */ + 0= disable and reset SED1386 + 1= enable SED1386 */ /* Bit 1: 0= SED1386 in Big Endian mode */ /* 1= SED1386 in little endian mode */ #define ECCX_LE 0x40 diff --git a/include/configs/RPXsuper.h b/include/configs/RPXsuper.h index c364672..0abff11 100644 --- a/include/configs/RPXsuper.h +++ b/include/configs/RPXsuper.h @@ -226,18 +226,18 @@ /* get the HRCW ISB field from CFG_IMMR */ #define CFG_SBC_HRCW_IMMR ( ((CFG_IMMR & 0x10000000) >> 10) |\ - ((CFG_IMMR & 0x01000000) >> 7) |\ - ((CFG_IMMR & 0x00100000) >> 4) ) + ((CFG_IMMR & 0x01000000) >> 7) |\ + ((CFG_IMMR & 0x00100000) >> 4) ) #define CFG_HRCW_MASTER (HRCW_BPS11 |\ - HRCW_DPPC11 |\ - CFG_SBC_HRCW_IMMR |\ - HRCW_MMR00 |\ - HRCW_LBPC11 |\ - HRCW_APPC10 |\ - HRCW_CS10PC00 |\ - (CFG_SBC_MODCK_H & HRCW_MODCK_H1111) |\ - CFG_SBC_HRCW_BOOT_FLAGS) + HRCW_DPPC11 |\ + CFG_SBC_HRCW_IMMR |\ + HRCW_MMR00 |\ + HRCW_LBPC11 |\ + HRCW_APPC10 |\ + HRCW_CS10PC00 |\ + (CFG_SBC_MODCK_H & HRCW_MODCK_H1111) |\ + CFG_SBC_HRCW_BOOT_FLAGS) /* no slaves */ #define CFG_HRCW_SLAVE1 0 @@ -358,8 +358,8 @@ */ #define CFG_SIUMCR (SIUMCR_L2CPC01 |\ - SIUMCR_APPC10 |\ - SIUMCR_CS10PC01) + SIUMCR_APPC10 |\ + SIUMCR_CS10PC01) /*----------------------------------------------------------------------- @@ -369,11 +369,11 @@ * Watchdog & Bus Monitor Timer max, 60x Bus Monitor enable */ #define CFG_SYPCR (SYPCR_SWTC |\ - SYPCR_BMT |\ - SYPCR_PBME |\ - SYPCR_LBME |\ - SYPCR_SWRI |\ - SYPCR_SWP) + SYPCR_BMT |\ + SYPCR_PBME |\ + SYPCR_LBME |\ + SYPCR_SWRI |\ + SYPCR_SWP) /*----------------------------------------------------------------------- * TMCNTSC - Time Counter Status and Control 4-40 @@ -382,9 +382,9 @@ * and enable Time Counter */ #define CFG_TMCNTSC (TMCNTSC_SEC |\ - TMCNTSC_ALR |\ - TMCNTSC_TCF |\ - TMCNTSC_TCE) + TMCNTSC_ALR |\ + TMCNTSC_TCF |\ + TMCNTSC_TCE) /*----------------------------------------------------------------------- * PISCR - Periodic Interrupt Status and Control 4-42 @@ -393,8 +393,8 @@ * Periodic timer */ #define CFG_PISCR (PISCR_PS |\ - PISCR_PTF |\ - PISCR_PTE) + PISCR_PTF |\ + PISCR_PTE) /*----------------------------------------------------------------------- * SCCR - System Clock Control 9-8 @@ -431,29 +431,29 @@ * */ #define CFG_BR0_PRELIM ((CFG_FLASH0_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ + BRx_PS_64 |\ BRx_DECC_NONE |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR0_PRELIM (MEG_TO_AM(CFG_FLASH0_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_6_CLK |\ - ORxG_EHTR) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_6_CLK |\ + ORxG_EHTR) /* Bank 1 - SDRAM * */ #define CFG_BR1_PRELIM ((CFG_SDRAM0_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_SDRAM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_SDRAM_P |\ + BRx_V) #define CFG_OR1_PRELIM (MEG_TO_AM(CFG_SDRAM0_SIZE) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A8 |\ - ORxS_NUMR_12 |\ + ORxS_BPD_4 |\ + ORxS_ROWST_PBI0_A8 |\ + ORxS_NUMR_12 |\ ORxS_IBID) #define CFG_PSDMR 0x014DA412 @@ -464,14 +464,14 @@ * */ #define CFG_BR2_PRELIM ((CFG_SDRAM1_BASE & BRx_BA_MSK) |\ - BRx_PS_32 |\ - BRx_MS_SDRAM_L |\ - BRx_V) + BRx_PS_32 |\ + BRx_MS_SDRAM_L |\ + BRx_V) #define CFG_OR2_PRELIM (MEG_TO_AM(CFG_SDRAM1_SIZE) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A9 |\ - ORxS_NUMR_12) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI0_A9 |\ + ORxS_NUMR_12) #define CFG_LSDMR 0x0169A512 #define CFG_LSRT 0x79 @@ -482,15 +482,15 @@ * */ #define CFG_BR4_PRELIM ((CFG_REGS_BASE & BRx_BA_MSK) |\ - BRx_PS_8 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_8 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR4_PRELIM (ORxG_AM_MSK |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_5_CLK |\ - ORxG_TRLX) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_5_CLK |\ + ORxG_TRLX) /* * Internal Definitions @@ -501,5 +501,3 @@ #define BOOTFLAG_WARM 0x02 /* Software reboot */ #endif /* __CONFIG_H */ - - diff --git a/include/configs/RRvision.h b/include/configs/RRvision.h index a1327e7..926d63a 100644 --- a/include/configs/RRvision.h +++ b/include/configs/RRvision.h @@ -135,7 +135,6 @@ #endif /* CONFIG_SOFT_I2C */ - #define CONFIG_COMMANDS ( ( CONFIG_CMD_DFL | \ CFG_CMD_DHCP | \ CFG_CMD_I2C | \ diff --git a/include/configs/SCM.h b/include/configs/SCM.h index 0dd46a0..e4533b4 100644 --- a/include/configs/SCM.h +++ b/include/configs/SCM.h @@ -287,10 +287,10 @@ */ #if defined(CONFIG_266MHz) #define CFG_HRCW_MASTER (HRCW_CIP | HRCW_ISB111 | HRCW_BMS | \ - HRCW_MODCK_H0111) + HRCW_MODCK_H0111) #elif defined(CONFIG_300MHz) #define CFG_HRCW_MASTER (HRCW_CIP | HRCW_ISB111 | HRCW_BMS | \ - HRCW_MODCK_H0110) + HRCW_MODCK_H0110) #else #define CFG_HRCW_MASTER (HRCW_CIP | HRCW_ISB111 | HRCW_BMS) #endif @@ -367,7 +367,7 @@ * HID1 has only read-only information - nothing to set. */ #define CFG_HID0_INIT (HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI|\ - HID0_IFEM|HID0_ABE) + HID0_IFEM|HID0_ABE) #define CFG_HID0_FINAL (HID0_IFEM|HID0_ABE) #define CFG_HID2 0 @@ -409,10 +409,10 @@ */ #if defined(CONFIG_WATCHDOG) #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) + SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) #else #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP) + SYPCR_SWRI|SYPCR_SWP) #endif /* CONFIG_WATCHDOG */ /*----------------------------------------------------------------------- @@ -490,16 +490,16 @@ /* Bank 0 - FLASH */ #define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR0_PRELIM (MEG_TO_AM(CFG_FLASH_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_3_CLK |\ - ORxG_EHTR |\ - ORxG_TRLX) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_3_CLK |\ + ORxG_EHTR |\ + ORxG_TRLX) /* SDRAM on TQM8260 can have either 8 or 9 columns. * The number affects configuration values. @@ -511,9 +511,9 @@ #define CFG_LSRT 0x20 #ifndef CFG_RAMBOOT #define CFG_BR1_PRELIM ((CFG_SDRAM_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_SDRAM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_SDRAM_P |\ + BRx_V) #define CFG_OR1_PRELIM CFG_OR1_8COL @@ -521,48 +521,48 @@ /* SDRAM initialization values for 8-column chips */ #define CFG_OR1_8COL ((~(CFG_GLOBAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI1_A7 |\ - ORxS_NUMR_12) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI1_A7 |\ + ORxS_NUMR_12) #define CFG_PSDMR_8COL (PSDMR_PBI |\ - PSDMR_SDAM_A15_IS_A5 |\ - PSDMR_BSMA_A12_A14 |\ - PSDMR_SDA10_PBI1_A8 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_2C |\ - PSDMR_EAMUX |\ - PSDMR_CL_2) + PSDMR_SDAM_A15_IS_A5 |\ + PSDMR_BSMA_A12_A14 |\ + PSDMR_SDA10_PBI1_A8 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_2C |\ + PSDMR_EAMUX |\ + PSDMR_CL_2) /* SDRAM initialization values for 9-column chips */ #define CFG_OR1_9COL ((~(CFG_GLOBAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI1_A5 |\ - ORxS_NUMR_13) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI1_A5 |\ + ORxS_NUMR_13) #define CFG_PSDMR_9COL (PSDMR_PBI |\ - PSDMR_SDAM_A16_IS_A5 |\ - PSDMR_BSMA_A12_A14 |\ - PSDMR_SDA10_PBI1_A7 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_2C |\ - PSDMR_EAMUX |\ - PSDMR_CL_2) + PSDMR_SDAM_A16_IS_A5 |\ + PSDMR_BSMA_A12_A14 |\ + PSDMR_SDA10_PBI1_A7 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_2C |\ + PSDMR_EAMUX |\ + PSDMR_CL_2) /* Bank 2 - Local bus SDRAM */ #ifdef CFG_INIT_LOCAL_SDRAM #define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BRx_BA_MSK) |\ - BRx_PS_32 |\ - BRx_MS_SDRAM_L |\ - BRx_V) + BRx_PS_32 |\ + BRx_MS_SDRAM_L |\ + BRx_V) #define CFG_OR2_PRELIM CFG_OR2_8COL @@ -571,40 +571,40 @@ /* SDRAM initialization values for 8-column chips */ #define CFG_OR2_8COL ((~(CFG_LOCAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI1_A8 |\ - ORxS_NUMR_12) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI1_A8 |\ + ORxS_NUMR_12) #define CFG_LSDMR_8COL (PSDMR_PBI |\ - PSDMR_SDAM_A15_IS_A5 |\ - PSDMR_BSMA_A13_A15 |\ - PSDMR_SDA10_PBI1_A9 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_BL |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_2C |\ - PSDMR_CL_2) + PSDMR_SDAM_A15_IS_A5 |\ + PSDMR_BSMA_A13_A15 |\ + PSDMR_SDA10_PBI1_A9 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_BL |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_2C |\ + PSDMR_CL_2) /* SDRAM initialization values for 9-column chips */ #define CFG_OR2_9COL ((~(CFG_LOCAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI1_A6 |\ - ORxS_NUMR_13) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI1_A6 |\ + ORxS_NUMR_13) #define CFG_LSDMR_9COL (PSDMR_PBI |\ - PSDMR_SDAM_A16_IS_A5 |\ - PSDMR_BSMA_A13_A15 |\ - PSDMR_SDA10_PBI1_A8 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_BL |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_2C |\ - PSDMR_CL_2) + PSDMR_SDAM_A16_IS_A5 |\ + PSDMR_BSMA_A13_A15 |\ + PSDMR_SDA10_PBI1_A8 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_BL |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_2C |\ + PSDMR_CL_2) #endif /* CFG_INIT_LOCAL_SDRAM */ @@ -708,4 +708,3 @@ #endif /* __CONFIG_H */ - diff --git a/include/configs/TQM8260.h b/include/configs/TQM8260.h index 1ea9a5e..2961a6a 100644 --- a/include/configs/TQM8260.h +++ b/include/configs/TQM8260.h @@ -394,7 +394,7 @@ * HID1 has only read-only information - nothing to set. */ #define CFG_HID0_INIT (HID0_ICE|HID0_DCE|HID0_ICFI|HID0_DCI|\ - HID0_IFEM|HID0_ABE) + HID0_IFEM|HID0_ABE) #define CFG_HID0_FINAL (HID0_IFEM|HID0_ABE) #define CFG_HID2 0 @@ -436,10 +436,10 @@ */ #if defined(CONFIG_WATCHDOG) #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) + SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) #else #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP) + SYPCR_SWRI|SYPCR_SWP) #endif /* CONFIG_WATCHDOG */ /*----------------------------------------------------------------------- @@ -517,16 +517,16 @@ /* Bank 0 - FLASH */ #define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR0_PRELIM (MEG_TO_AM(CFG_FLASH_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_3_CLK |\ - ORxG_EHTR |\ - ORxG_TRLX) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_3_CLK |\ + ORxG_EHTR |\ + ORxG_TRLX) /* SDRAM on TQM8260 can have either 8 or 9 columns. * The number affects configuration values. @@ -538,9 +538,9 @@ #define CFG_LSRT 0x20 #ifndef CFG_RAMBOOT #define CFG_BR1_PRELIM ((CFG_SDRAM_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_SDRAM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_SDRAM_P |\ + BRx_V) #define CFG_OR1_PRELIM CFG_OR1_8COL @@ -548,48 +548,48 @@ /* SDRAM initialization values for 8-column chips */ #define CFG_OR1_8COL ((~(CFG_GLOBAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI1_A7 |\ - ORxS_NUMR_12) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI1_A7 |\ + ORxS_NUMR_12) #define CFG_PSDMR_8COL (PSDMR_PBI |\ - PSDMR_SDAM_A15_IS_A5 |\ - PSDMR_BSMA_A12_A14 |\ - PSDMR_SDA10_PBI1_A8 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_2C |\ - PSDMR_EAMUX |\ - PSDMR_CL_2) + PSDMR_SDAM_A15_IS_A5 |\ + PSDMR_BSMA_A12_A14 |\ + PSDMR_SDA10_PBI1_A8 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_2C |\ + PSDMR_EAMUX |\ + PSDMR_CL_2) /* SDRAM initialization values for 9-column chips */ #define CFG_OR1_9COL ((~(CFG_GLOBAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI1_A5 |\ - ORxS_NUMR_13) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI1_A5 |\ + ORxS_NUMR_13) #define CFG_PSDMR_9COL (PSDMR_PBI |\ - PSDMR_SDAM_A16_IS_A5 |\ - PSDMR_BSMA_A12_A14 |\ - PSDMR_SDA10_PBI1_A7 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_2C |\ - PSDMR_EAMUX |\ - PSDMR_CL_2) + PSDMR_SDAM_A16_IS_A5 |\ + PSDMR_BSMA_A12_A14 |\ + PSDMR_SDA10_PBI1_A7 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_2C |\ + PSDMR_EAMUX |\ + PSDMR_CL_2) /* Bank 2 - Local bus SDRAM */ #ifdef CFG_INIT_LOCAL_SDRAM #define CFG_BR2_PRELIM ((SDRAM_BASE2_PRELIM & BRx_BA_MSK) |\ - BRx_PS_32 |\ - BRx_MS_SDRAM_L |\ - BRx_V) + BRx_PS_32 |\ + BRx_MS_SDRAM_L |\ + BRx_V) #define CFG_OR2_PRELIM CFG_OR2_8COL @@ -598,40 +598,40 @@ /* SDRAM initialization values for 8-column chips */ #define CFG_OR2_8COL ((~(CFG_LOCAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI1_A8 |\ - ORxS_NUMR_12) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI1_A8 |\ + ORxS_NUMR_12) #define CFG_LSDMR_8COL (PSDMR_PBI |\ - PSDMR_SDAM_A15_IS_A5 |\ - PSDMR_BSMA_A13_A15 |\ - PSDMR_SDA10_PBI1_A9 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_BL |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_2C |\ - PSDMR_CL_2) + PSDMR_SDAM_A15_IS_A5 |\ + PSDMR_BSMA_A13_A15 |\ + PSDMR_SDA10_PBI1_A9 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_BL |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_2C |\ + PSDMR_CL_2) /* SDRAM initialization values for 9-column chips */ #define CFG_OR2_9COL ((~(CFG_LOCAL_SDRAM_LIMIT-1) & ORxS_SDAM_MSK) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI1_A6 |\ - ORxS_NUMR_13) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI1_A6 |\ + ORxS_NUMR_13) #define CFG_LSDMR_9COL (PSDMR_PBI |\ - PSDMR_SDAM_A16_IS_A5 |\ - PSDMR_BSMA_A13_A15 |\ - PSDMR_SDA10_PBI1_A8 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_2W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_BL |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_2C |\ - PSDMR_CL_2) + PSDMR_SDAM_A16_IS_A5 |\ + PSDMR_BSMA_A13_A15 |\ + PSDMR_SDA10_PBI1_A8 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_2W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_BL |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_2C |\ + PSDMR_CL_2) #endif /* CFG_INIT_LOCAL_SDRAM */ diff --git a/include/configs/W7OLMC.h b/include/configs/W7OLMC.h index b5610c9..7ae1c70 100644 --- a/include/configs/W7OLMC.h +++ b/include/configs/W7OLMC.h @@ -323,4 +323,3 @@ #define CONFIG_FPGAS_BANK_SIZE 0x00100000L /* FPGAs' mmap bank size */ #endif /* __CONFIG_H */ - diff --git a/include/configs/WALNUT405.h b/include/configs/WALNUT405.h index 36674db..cdc9a3c 100644 --- a/include/configs/WALNUT405.h +++ b/include/configs/WALNUT405.h @@ -161,7 +161,7 @@ #define CONFIG_PCI /* include pci support */ #define CONFIG_PCI_HOST PCI_HOST_FORCE /* select pci host function */ #define CONFIG_PCI_PNP /* do pci plug-and-play */ - /* resource configuration */ + /* resource configuration */ #define CFG_PCI_SUBSYS_VENDORID 0x0000 /* PCI Vendor ID: to-do!!! */ #define CFG_PCI_SUBSYS_DEVICEID 0x0000 /* PCI Device ID: to-do!!! */ diff --git a/include/configs/ZUMA.h b/include/configs/ZUMA.h index 541cf92..3fde238 100644 --- a/include/configs/ZUMA.h +++ b/include/configs/ZUMA.h @@ -207,7 +207,6 @@ /* 3| 0|.... ..| 1| 5 | 5 | 5 | 5 | 8 | 5 */ - #define CFG_8BIT_BOOT_PAR 0xc00b5e7c #define CFG_MPP_CONTROL_0 0x00007777 /* GPP[7:4] : REQ0[1:0] GNT0[1:0] */ diff --git a/include/configs/at91rm9200dk.h b/include/configs/at91rm9200dk.h index e382977..415b7fb 100644 --- a/include/configs/at91rm9200dk.h +++ b/include/configs/at91rm9200dk.h @@ -49,19 +49,19 @@ #undef CONFIG_MODEM_SUPPORT /* disable modem initialization stuff */ -#define CONFIG_BOOTDELAY 3 +#define CONFIG_BOOTDELAY 3 /* #define CONFIG_ENV_OVERWRITE 1 */ #define CONFIG_COMMANDS \ ((CONFIG_CMD_DFL | \ CFG_CMD_DHCP ) & \ - ~(CFG_CMD_BDI | \ - CFG_CMD_IMI | \ - CFG_CMD_AUTOSCRIPT | \ - CFG_CMD_FPGA | \ - CFG_CMD_MISC | \ - CFG_CMD_LOADS )) - + ~(CFG_CMD_BDI | \ + CFG_CMD_IMI | \ + CFG_CMD_AUTOSCRIPT | \ + CFG_CMD_FPGA | \ + CFG_CMD_MISC | \ + CFG_CMD_LOADS )) + /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */ #include @@ -155,7 +155,7 @@ #endif #define CFG_HZ AT91C_MASTER_CLOCK/2 /* AT91C_TC0_CMR is implicitly set to - AT91C_TC_TIMER_DIV1_CLOCK */ + AT91C_TC_TIMER_DIV1_CLOCK */ #define CONFIG_STACKSIZE (32*1024) /* regular stack */ diff --git a/include/configs/atc.h b/include/configs/atc.h index 1fb6ed8..2751248 100644 --- a/include/configs/atc.h +++ b/include/configs/atc.h @@ -299,7 +299,7 @@ * HID1 has only read-only information - nothing to set. */ #define CFG_HID0_INIT (HID0_ICE|HID0_DCE|HID0_ICFI|\ - HID0_DCI|HID0_IFEM|HID0_ABE) + HID0_DCI|HID0_IFEM|HID0_ABE) #define CFG_HID0_FINAL (HID0_IFEM|HID0_ABE) #define CFG_HID2 0 @@ -332,10 +332,10 @@ */ #if defined(CONFIG_WATCHDOG) #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) + SYPCR_SWRI|SYPCR_SWP|SYPCR_SWE) #else #define CFG_SYPCR (SYPCR_SWTC|SYPCR_BMT|SYPCR_PBME|SYPCR_LBME|\ - SYPCR_SWRI|SYPCR_SWP) + SYPCR_SWRI|SYPCR_SWP) #endif /* CONFIG_WATCHDOG */ /*----------------------------------------------------------------------- @@ -437,24 +437,24 @@ /* Bank 0 - FLASH */ #define CFG_BR0_PRELIM ((CFG_FLASH_BASE & BRx_BA_MSK) |\ - BRx_PS_16 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_16 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR0_PRELIM (P2SZ_TO_AM(CFG_FLASH_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_3_CLK |\ - ORxU_EHTR_8IDLE) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_3_CLK |\ + ORxU_EHTR_8IDLE) /* Bank 2 - 60x bus SDRAM */ #ifndef CFG_RAMBOOT #define CFG_BR2_PRELIM ((CFG_SDRAM_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_SDRAM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_SDRAM_P |\ + BRx_V) #define CFG_OR2_PRELIM CFG_OR2_8COL @@ -462,12 +462,12 @@ #endif /* CFG_RAMBOOT */ #define CFG_BR4_PRELIM ((RTC_BASE_ADDR & BRx_BA_MSK) |\ - BRx_PS_8 |\ - BRx_MS_UPMA |\ - BRx_V) + BRx_PS_8 |\ + BRx_MS_UPMA |\ + BRx_V) #define CFG_OR4_PRELIM (ORxU_AM_MSK | ORxU_BI) - + /*----------------------------------------------------------------------- * PCMCIA stuff *----------------------------------------------------------------------- diff --git a/include/configs/cmi_mpc5xx.h b/include/configs/cmi_mpc5xx.h index e8b3eb5..e459919 100644 --- a/include/configs/cmi_mpc5xx.h +++ b/include/configs/cmi_mpc5xx.h @@ -17,13 +17,13 @@ * * You should have received a copy of the GNU General Public License * along with this program; if not, write to the Free Software - * Foundation, + * Foundation, */ /* * File: cmi_mpc5xx.h - * - * Discription: Config header file for cmi + * + * Discription: Config header file for cmi * board using an MPC5xx CPU * */ @@ -63,12 +63,12 @@ #define CONFIG_WATCHDOG /* turn on platform specific watchdog */ -#define CONFIG_STATUS_LED 1 /* Enable status led */ +#define CONFIG_STATUS_LED 1 /* Enable status led */ #define CONFIG_LOADS_ECHO 1 /* Echo on for serial download */ /* - * Miscellaneous configurable options + * Miscellaneous configurable options */ #define CFG_LONGHELP /* undef to save memory */ @@ -104,7 +104,7 @@ /* * Definitions for initial stack pointer and data area */ -#define CFG_INIT_RAM_ADDR (CFG_IMMR + 0x003f9800) /* Physical start adress of internal MPC555 writable RAM */ +#define CFG_INIT_RAM_ADDR (CFG_IMMR + 0x003f9800) /* Physical start adress of internal MPC555 writable RAM */ #define CFG_INIT_RAM_END (CFG_IMMR + 0x003fffff) /* Physical end adress of internal MPC555 used RAM area */ #define CFG_GBL_DATA_SIZE 64 /* Size in bytes reserved for initial global data */ #define CFG_GBL_DATA_OFFSET ((CFG_INIT_RAM_END - CFG_INIT_RAM_ADDR) - CFG_GBL_DATA_SIZE) /* Offset from the beginning of ram */ @@ -135,9 +135,9 @@ /*----------------------------------------------------------------------- - * FLASH organization + * FLASH organization *----------------------------------------------------------------------- - * + * */ #define CFG_MAX_FLASH_BANKS 1 /* Max number of memory banks */ @@ -154,7 +154,7 @@ #endif /*----------------------------------------------------------------------- - * SYPCR - System Protection Control + * SYPCR - System Protection Control * SYPCR can only be written once after reset! *----------------------------------------------------------------------- * SW Watchdog freeze @@ -164,7 +164,7 @@ SYPCR_SWE | SYPCR_SWRI| SYPCR_SWP) #else #define CFG_SYPCR (SYPCR_SWTC | SYPCR_BMT | SYPCR_BME | SYPCR_SWF | \ - SYPCR_SWP) + SYPCR_SWP) #endif /* CONFIG_WATCHDOG */ /*----------------------------------------------------------------------- @@ -202,30 +202,30 @@ * PLPRCR - PLL, Low-Power, and Reset Control Register *----------------------------------------------------------------------- * Set all bits to 40 Mhz - * + * */ #define CFG_OSC_CLK ((uint)4000000) /* Oscillator clock is 4MHz */ #define CFG_PLPRCR (PLPRCR_MF_9 | PLPRCR_DIVF_0) - + /*----------------------------------------------------------------------- * UMCR - UIMB Module Configuration Register *----------------------------------------------------------------------- - * + * */ #define CFG_UMCR (UMCR_FSPEED) /* IMB clock same as U-bus */ /*----------------------------------------------------------------------- * ICTRL - I-Bus Support Control Register */ -#define CFG_ICTRL (ICTRL_ISCT_SER_7) /* Take out of serialized mode */ +#define CFG_ICTRL (ICTRL_ISCT_SER_7) /* Take out of serialized mode */ /*----------------------------------------------------------------------- * USIU - Memory Controller Register - *----------------------------------------------------------------------- + *----------------------------------------------------------------------- */ -#define CFG_BR0_PRELIM (CFG_FLASH_BASE | BR_V | BR_BI | BR_PS_16) +#define CFG_BR0_PRELIM (CFG_FLASH_BASE | BR_V | BR_BI | BR_PS_16) #define CFG_OR0_PRELIM (OR_ADDR_MK_FF | OR_SCY_3) #define CFG_BR1_PRELIM (ANYBUS_BASE) #define CFG_OR1_PRELIM (OR_ADDR_MK_FFFF | OR_SCY_1 | OR_ETHR) @@ -238,7 +238,7 @@ #define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* We don't realign the flash */ /*----------------------------------------------------------------------- - * DER - Timer Decrementer + * DER - Timer Decrementer *----------------------------------------------------------------------- * Initialise to zero */ diff --git a/include/configs/cradle.h b/include/configs/cradle.h index 5a215e4..13996d4 100644 --- a/include/configs/cradle.h +++ b/include/configs/cradle.h @@ -100,7 +100,7 @@ #define CFG_HZ 3686400 /* incrementer freq: 3.6864 MHz */ #define CFG_CPUSPEED 0x141 /* set core clock to 200/200/100 MHz */ - /* valid baudrates */ + /* valid baudrates */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* diff --git a/include/configs/csb226.h b/include/configs/csb226.h index a257b82..879607c 100644 --- a/include/configs/csb226.h +++ b/include/configs/csb226.h @@ -122,7 +122,7 @@ #define CFG_MONITOR_LEN 0x20000 /* 128 KiB */ - /* valid baudrates */ + /* valid baudrates */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* diff --git a/include/configs/ep8260.h b/include/configs/ep8260.h index b933be9..f1b2cc1 100644 --- a/include/configs/ep8260.h +++ b/include/configs/ep8260.h @@ -370,11 +370,11 @@ /* get the HRCW ISB field from CFG_IMMR */ /* #define CFG_SBC_HRCW_IMMR ( ((CFG_IMMR & 0x10000000) >> 10) |\ - ((CFG_IMMR & 0x01000000) >> 7) |\ - ((CFG_IMMR & 0x00100000) >> 4) ) + ((CFG_IMMR & 0x01000000) >> 7) |\ + ((CFG_IMMR & 0x00100000) >> 4) ) #define CFG_HRCW_MASTER (HRCW_EBM |\ - HRCW_L2CPC01 |\ + HRCW_L2CPC01 |\ CFG_SBC_HRCW_IMMR |\ HRCW_APPC10 |\ HRCW_CS10PC01 |\ @@ -512,8 +512,8 @@ */ #define CFG_SIUMCR (SIUMCR_L2CPC01 |\ - SIUMCR_APPC10 |\ - SIUMCR_CS10PC01) + SIUMCR_APPC10 |\ + SIUMCR_CS10PC01) /*----------------------------------------------------------------------- @@ -524,15 +524,15 @@ */ #ifdef CFG_LSDRAM #define CFG_SYPCR (SYPCR_SWTC |\ - SYPCR_BMT |\ - SYPCR_PBME |\ - SYPCR_LBME |\ - SYPCR_SWP) + SYPCR_BMT |\ + SYPCR_PBME |\ + SYPCR_LBME |\ + SYPCR_SWP) #else #define CFG_SYPCR (SYPCR_SWTC |\ - SYPCR_BMT |\ - SYPCR_PBME |\ - SYPCR_SWP) + SYPCR_BMT |\ + SYPCR_PBME |\ + SYPCR_SWP) #endif /*----------------------------------------------------------------------- * TMCNTSC - Time Counter Status and Control 4-40 @@ -541,9 +541,9 @@ * and enable Time Counter */ #define CFG_TMCNTSC (TMCNTSC_SEC |\ - TMCNTSC_ALR |\ - TMCNTSC_TCF |\ - TMCNTSC_TCE) + TMCNTSC_ALR |\ + TMCNTSC_TCF |\ + TMCNTSC_TCE) /*----------------------------------------------------------------------- * PISCR - Periodic Interrupt Status and Control 4-42 @@ -552,8 +552,8 @@ * Periodic timer */ /*#define CFG_PISCR (PISCR_PS |\ - PISCR_PTF |\ - PISCR_PTE)*/ + PISCR_PTF |\ + PISCR_PTE)*/ #define CFG_PISCR 0 /*----------------------------------------------------------------------- * SCCR - System Clock Control 9-8 @@ -604,29 +604,29 @@ * */ #define CFG_BR0_PRELIM ((CFG_FLASH0_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ + BRx_PS_64 |\ BRx_DECC_NONE |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR0_PRELIM (MEG_TO_AM(CFG_FLASH0_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_6_CLK |\ - ORxG_EHTR) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_6_CLK |\ + ORxG_EHTR) /* Bank 1 - SDRAM * PSDRAM */ #define CFG_BR1_PRELIM ((CFG_SDRAM0_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_SDRAM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_SDRAM_P |\ + BRx_V) #define CFG_OR1_PRELIM (MEG_TO_AM(CFG_SDRAM0_SIZE) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI1_A6 |\ - ORxS_NUMR_12) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI1_A6 |\ + ORxS_NUMR_12) #define CFG_PSDMR 0xC34E2462 #define CFG_PSRT 0x64 @@ -638,14 +638,14 @@ */ #define CFG_BR2_PRELIM ((CFG_SDRAM1_BASE & BRx_BA_MSK) |\ - BRx_PS_32 |\ - BRx_MS_SDRAM_L |\ - BRx_V) + BRx_PS_32 |\ + BRx_MS_SDRAM_L |\ + BRx_V) #define CFG_OR2_PRELIM (MEG_TO_AM(CFG_SDRAM1_SIZE) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A9 |\ - ORxS_NUMR_12) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI0_A9 |\ + ORxS_NUMR_12) #define CFG_LSDMR 0x416A2562 #define CFG_LSRT 0x64 @@ -657,15 +657,15 @@ * NVRTC and BCSR */ #define CFG_BR4_PRELIM ((CFG_REGS_BASE & BRx_BA_MSK) |\ - BRx_PS_8 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_8 |\ + BRx_MS_GPCM_P |\ + BRx_V) /* #define CFG_OR4_PRELIM (ORxG_AM_MSK |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_10_CLK |\ - ORxG_TRLX) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_10_CLK |\ + ORxG_TRLX) */ #define CFG_OR4_PRELIM 0xfff00854 @@ -673,15 +673,15 @@ * PCMCIA (currently not working!) */ #define CFG_BR8_PRELIM ((CFG_REGS_BASE & BRx_BA_MSK) |\ - BRx_PS_16 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_16 |\ + BRx_MS_GPCM_P |\ + BRx_V) #define CFG_OR8_PRELIM (ORxG_AM_MSK |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ ORxG_SETA |\ - ORxG_SCY_10_CLK) + ORxG_SCY_10_CLK) /* * Internal Definitions diff --git a/include/configs/gw8260.h b/include/configs/gw8260.h index 0e9a4ec..3666bdb 100644 --- a/include/configs/gw8260.h +++ b/include/configs/gw8260.h @@ -219,10 +219,10 @@ #define MDIO_READ ((iop->pdat & 0x00400000) != 0) #define MDIO(bit) if(bit) iop->pdat |= 0x00400000; \ - else iop->pdat &= ~0x00400000 + else iop->pdat &= ~0x00400000 #define MDC(bit) if(bit) iop->pdat |= 0x00200000; \ - else iop->pdat &= ~0x00200000 + else iop->pdat &= ~0x00200000 #define MIIDELAY udelay(1) #endif /* CONFIG_ETHER_ON_FCC */ @@ -291,8 +291,8 @@ * - DNS */ #define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAULT | \ - CONFIG_BOOTP_BOOTFILESIZE | \ - CONFIG_BOOTP_DNS) + CONFIG_BOOTP_BOOTFILESIZE | \ + CONFIG_BOOTP_DNS) /* undef this to save memory */ #define CFG_LONGHELP @@ -302,13 +302,13 @@ /* What U-Boot subsytems do you want enabled? */ #define CONFIG_COMMANDS (((CONFIG_CMD_DFL & ~(CFG_CMD_KGDB))) | \ - CFG_CMD_BEDBUG | \ - CFG_CMD_ELF | \ - CFG_CMD_ASKENV | \ - CFG_CMD_ECHO | \ - CFG_CMD_REGINFO | \ - CFG_CMD_IMMAP | \ - CFG_CMD_MII) + CFG_CMD_BEDBUG | \ + CFG_CMD_ELF | \ + CFG_CMD_ASKENV | \ + CFG_CMD_ECHO | \ + CFG_CMD_REGINFO | \ + CFG_CMD_IMMAP | \ + CFG_CMD_MII) /* Where do the internal registers live? */ #define CFG_IMMR 0xf0000000 @@ -367,12 +367,12 @@ #define CFG_STACK_USAGE 0x10000 /* Reserve 64k for the stack usage */ #define CFG_MEM_END_USAGE ( CFG_MONITOR_LEN \ - + CFG_MALLOC_LEN \ - + CFG_ENV_SECT_SIZE \ - + CFG_STACK_USAGE ) + + CFG_MALLOC_LEN \ + + CFG_ENV_SECT_SIZE \ + + CFG_STACK_USAGE ) #define CFG_MEMTEST_END ( CFG_SDRAM_SIZE * 1024 * 1024 \ - - CFG_MEM_END_USAGE ) + - CFG_MEM_END_USAGE ) /* valid baudrates */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } @@ -399,18 +399,18 @@ /* get the HRCW ISB field from CFG_IMMR */ #define CFG_SBC_HRCW_IMMR ( ((CFG_IMMR & 0x10000000) >> 10) | \ - ((CFG_IMMR & 0x01000000) >> 7) | \ - ((CFG_IMMR & 0x00100000) >> 4) ) + ((CFG_IMMR & 0x01000000) >> 7) | \ + ((CFG_IMMR & 0x00100000) >> 4) ) #define CFG_HRCW_MASTER ( HRCW_BPS11 | \ - HRCW_DPPC11 | \ - CFG_SBC_HRCW_IMMR | \ - HRCW_MMR00 | \ - HRCW_LBPC11 | \ - HRCW_APPC10 | \ - HRCW_CS10PC00 | \ - (CFG_SBC_MODCK_H & HRCW_MODCK_H1111) | \ - CFG_SBC_HRCW_BOOT_FLAGS ) + HRCW_DPPC11 | \ + CFG_SBC_HRCW_IMMR | \ + HRCW_MMR00 | \ + HRCW_LBPC11 | \ + HRCW_APPC10 | \ + HRCW_CS10PC00 | \ + (CFG_SBC_MODCK_H & HRCW_MODCK_H1111) | \ + CFG_SBC_HRCW_BOOT_FLAGS ) /* no slaves */ #define CFG_HRCW_SLAVE1 0 @@ -488,16 +488,16 @@ * HID1 has only read-only information - nothing to set. */ #define CFG_HID0_INIT (HID0_ICE |\ - HID0_DCE |\ - HID0_ICFI |\ - HID0_DCI |\ - HID0_IFEM |\ - HID0_ABE) + HID0_DCE |\ + HID0_ICFI |\ + HID0_DCI |\ + HID0_IFEM |\ + HID0_ABE) #define CFG_HID0_FINAL (HID0_ICE |\ - HID0_IFEM |\ - HID0_ABE |\ - HID0_EMCP) + HID0_IFEM |\ + HID0_ABE |\ + HID0_EMCP) #define CFG_HID2 0 /*----------------------------------------------------------------------- @@ -517,9 +517,9 @@ *----------------------------------------------------------------------- */ #define CFG_SIUMCR (SIUMCR_DPPC11 |\ - SIUMCR_L2CPC00 |\ - SIUMCR_APPC10 |\ - SIUMCR_MMR00) + SIUMCR_L2CPC00 |\ + SIUMCR_APPC10 |\ + SIUMCR_MMR00) /*----------------------------------------------------------------------- @@ -529,11 +529,11 @@ * Watchdog & Bus Monitor Timer max, 60x Bus Monitor enable */ #define CFG_SYPCR (SYPCR_SWTC |\ - SYPCR_BMT |\ - SYPCR_PBME |\ - SYPCR_LBME |\ - SYPCR_SWRI |\ - SYPCR_SWP) + SYPCR_BMT |\ + SYPCR_PBME |\ + SYPCR_LBME |\ + SYPCR_SWRI |\ + SYPCR_SWP) /*----------------------------------------------------------------------- * TMCNTSC - Time Counter Status and Control 4-40 @@ -542,9 +542,9 @@ * and enable Time Counter */ #define CFG_TMCNTSC (TMCNTSC_SEC |\ - TMCNTSC_ALR |\ - TMCNTSC_TCF |\ - TMCNTSC_TCE) + TMCNTSC_ALR |\ + TMCNTSC_TCF |\ + TMCNTSC_TCE) /*----------------------------------------------------------------------- * PISCR - Periodic Interrupt Status and Control 4-42 @@ -553,8 +553,8 @@ * Periodic timer */ #define CFG_PISCR (PISCR_PS |\ - PISCR_PTF |\ - PISCR_PTE) + PISCR_PTF |\ + PISCR_PTE) /*----------------------------------------------------------------------- * SCCR - System Clock Control 9-8 @@ -613,9 +613,9 @@ * - Valid */ #define CFG_BR0_PRELIM ((CFG_FLASH0_BASE & BRx_BA_MSK) |\ - BRx_PS_32 |\ - BRx_MS_GPCM_P |\ - BRx_V) + BRx_PS_32 |\ + BRx_MS_GPCM_P |\ + BRx_V) /* OR0 is configured as follows: * @@ -632,11 +632,11 @@ * current bank and the next access. */ #define CFG_OR0_PRELIM (MEG_TO_AM(CFG_FLASH0_SIZE) |\ - ORxG_CSNT |\ - ORxG_ACS_DIV1 |\ - ORxG_SCY_5_CLK |\ - ORxG_TRLX |\ - ORxG_EHTR) + ORxG_CSNT |\ + ORxG_ACS_DIV1 |\ + ORxG_SCY_5_CLK |\ + ORxG_TRLX |\ + ORxG_EHTR) /*----------------------------------------------------------------------- * BR2 - Base Register @@ -668,9 +668,9 @@ * - Valid */ #define CFG_BR2_PRELIM ((CFG_SDRAM0_BASE & BRx_BA_MSK) |\ - BRx_PS_64 |\ - BRx_MS_SDRAM_P |\ - BRx_V) + BRx_PS_64 |\ + BRx_MS_SDRAM_P |\ + BRx_V) /* With a 16 MB DIMM, the OR2 is configured as follows: * @@ -683,9 +683,9 @@ */ #if (CFG_SDRAM0_SIZE == 16) #define CFG_OR2_PRELIM (MEG_TO_AM(CFG_SDRAM0_SIZE) |\ - ORxS_BPD_2 |\ - ORxS_ROWST_PBI0_A9 |\ - ORxS_NUMR_11) + ORxS_BPD_2 |\ + ORxS_ROWST_PBI0_A9 |\ + ORxS_NUMR_11) /* With a 16 MB DIMM, the PSDMR is configured as follows: * @@ -711,15 +711,15 @@ *----------------------------------------------------------------------- */ #define CFG_PSDMR (PSDMR_RFEN |\ - PSDMR_SDAM_A14_IS_A5 |\ - PSDMR_BSMA_A16_A18 |\ - PSDMR_SDA10_PBI0_A9 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_3W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_1C |\ - PSDMR_CL_2) + PSDMR_SDAM_A14_IS_A5 |\ + PSDMR_BSMA_A16_A18 |\ + PSDMR_SDA10_PBI0_A9 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_3W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_1C |\ + PSDMR_CL_2) #endif /* (CFG_SDRAM0_SIZE == 16) */ /* With a 64 MB DIMM, the OR2 is configured as follows: @@ -733,9 +733,9 @@ */ #if (CFG_SDRAM0_SIZE == 64) #define CFG_OR2_PRELIM (MEG_TO_AM(CFG_SDRAM0_SIZE) |\ - ORxS_BPD_4 |\ - ORxS_ROWST_PBI0_A8 |\ - ORxS_NUMR_12) + ORxS_BPD_4 |\ + ORxS_ROWST_PBI0_A8 |\ + ORxS_NUMR_12) /* With a 64 MB DIMM, the PSDMR is configured as follows: * @@ -761,15 +761,15 @@ *----------------------------------------------------------------------- */ #define CFG_PSDMR (PSDMR_RFEN |\ - PSDMR_SDAM_A14_IS_A5 |\ - PSDMR_BSMA_A14_A16 |\ - PSDMR_SDA10_PBI0_A9 |\ - PSDMR_RFRC_7_CLK |\ - PSDMR_PRETOACT_3W |\ - PSDMR_ACTTORW_2W |\ - PSDMR_LDOTOPRE_1C |\ - PSDMR_WRC_1C |\ - PSDMR_CL_2) + PSDMR_SDAM_A14_IS_A5 |\ + PSDMR_BSMA_A14_A16 |\ + PSDMR_SDA10_PBI0_A9 |\ + PSDMR_RFRC_7_CLK |\ + PSDMR_PRETOACT_3W |\ + PSDMR_ACTTORW_2W |\ + PSDMR_LDOTOPRE_1C |\ + PSDMR_WRC_1C |\ + PSDMR_CL_2) #endif /* (CFG_SDRAM0_SIZE == 64) */ #define CFG_PSRT 0x0e @@ -800,13 +800,13 @@ #ifdef CFG_IO_BASE # define CFG_BR4_PRELIM ((CFG_IO_BASE & BRx_BA_MSK) |\ - BRx_PS_8 |\ - BRx_MS_GPCM_L |\ - BRx_V) + BRx_PS_8 |\ + BRx_MS_GPCM_L |\ + BRx_V) # define CFG_OR4_PRELIM (ORxG_AM_MSK |\ - ORxG_SCY_11_CLK |\ - ORxG_EHTR) + ORxG_SCY_11_CLK |\ + ORxG_EHTR) #endif /* CFG_IO_BASE */ /* diff --git a/include/configs/innokom.h b/include/configs/innokom.h index 60699fe..cfe9032 100644 --- a/include/configs/innokom.h +++ b/include/configs/innokom.h @@ -113,7 +113,7 @@ #define CFG_MONITOR_LEN 0x20000 /* 128 KiB */ - /* valid baudrates */ + /* valid baudrates */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* @@ -175,7 +175,7 @@ * JFFS2 Partitions */ #define CFG_JFFS_CUSTOM_PART 1 /* see board/innokom/flash.c */ -#define CONFIG_MTD_INNOKOM_16MB 1 /* development flash */ +#define CONFIG_MTD_INNOKOM_16MB 1 /* development flash */ #undef CONFIG_MTD_INNOKOM_64MB /* production flash */ diff --git a/include/configs/logodl.h b/include/configs/logodl.h index cb737fc..2aee461 100644 --- a/include/configs/logodl.h +++ b/include/configs/logodl.h @@ -113,7 +113,7 @@ #define CFG_MONITOR_LEN 0x20000 /* 128 KiB */ - /* valid baudrates */ + /* valid baudrates */ #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } /* @@ -227,12 +227,12 @@ #define CFG_GAFR0_L_VAL (_BIT22+_BIT24+_BIT31) #define CFG_GAFR0_U_VAL (_BIT15+_BIT17+_BIT19+\ - _BIT20+_BIT22+_BIT24+_BIT26+_BIT29+_BIT31) + _BIT20+_BIT22+_BIT24+_BIT26+_BIT29+_BIT31) #define CFG_GAFR1_L_VAL (_BIT3+_BIT4+_BIT6+_BIT8+_BIT10+_BIT12+_BIT15+_BIT17+_BIT19+\ - _BIT20+_BIT23+_BIT24+_BIT27+_BIT28+_BIT31) + _BIT20+_BIT23+_BIT24+_BIT27+_BIT28+_BIT31) #define CFG_GAFR1_U_VAL (_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) #define CFG_GAFR2_L_VAL (_BIT1+_BIT3+_BIT5+_BIT7+_BIT9+_BIT11+_BIT13+_BIT15+_BIT17+\ - _BIT19+_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) + _BIT19+_BIT21+_BIT23+_BIT25+_BIT27+_BIT29+_BIT31) #define CFG_GAFR2_U_VAL (_BIT1) #define CFG_PSSR_VAL (0x20) @@ -283,4 +283,3 @@ #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */ #endif /* __CONFIG_H */ - diff --git a/include/configs/rsdproto.h b/include/configs/rsdproto.h index 95faa41..d71b3e9 100644 --- a/include/configs/rsdproto.h +++ b/include/configs/rsdproto.h @@ -211,16 +211,16 @@ /* get the HRCW ISB field from CFG_IMMR */ #define CFG_RSD_HRCW_IMMR ( ((CFG_IMMR & 0x10000000) >> 10) |\ - ((CFG_IMMR & 0x01000000) >> 7) |\ - ((CFG_IMMR & 0x00100000) >> 4) ) + ((CFG_IMMR & 0x01000000) >> 7) |\ + ((CFG_IMMR & 0x00100000) >> 4) ) #define CFG_HRCW_MASTER (HRCW_L2CPC10 | \ HRCW_DPPC11 | \ - CFG_RSD_HRCW_IMMR |\ - HRCW_MMR00 | \ - HRCW_APPC10 | \ - HRCW_CS10PC00 | \ - HRCW_MODCK_H0000 |\ + CFG_RSD_HRCW_IMMR |\ + HRCW_MMR00 | \ + HRCW_APPC10 | \ + HRCW_CS10PC00 | \ + HRCW_MODCK_H0000 |\ CFG_RSD_HRCW_BOOT_FLAGS) /* no slaves */ @@ -388,9 +388,9 @@ /* Virtex-FPGA - Register */ #define CFG_BR3_PRELIM (PHYS_VIRTEX_REGISTER | BRx_V) #define CFG_OR3_PRELIM (ORxS_SIZE_TO_AM(PHYS_VIRTEX_REGISTER_SIZE) | \ - ORxG_SCY_1_CLK | \ - ORxG_ACS_DIV2 | \ - ORxG_CSNT ) + ORxG_SCY_1_CLK | \ + ORxG_ACS_DIV2 | \ + ORxG_CSNT ) /* local bus SDRAM */ #define CFG_BR4_PRELIM (PHYS_SDRAM_LOCAL | BRx_PS_32 | BRx_MS_SDRAM_L | BRx_V) diff --git a/include/configs/sacsng.h b/include/configs/sacsng.h index 7accf74..6fd8abc 100644 --- a/include/configs/sacsng.h +++ b/include/configs/sacsng.h @@ -256,8 +256,8 @@ */ #define CONFIG_SOFT_SPI /* Enable SPI driver */ #define MAX_SPI_BYTES 4 /* Maximum number of bytes we can handle */ -#undef DEBUG_SPI /* Disable SPI debugging */ - +#undef DEBUG_SPI /* Disable SPI debugging */ + /* * Software (bit-bang) SPI driver configuration */ @@ -273,9 +273,9 @@ #undef SPI_INIT /* no port initialization needed */ #define SPI_READ ((immr->im_ioport.iop_pdatd & I2C_MISO) != 0) #define SPI_SDA(bit) if(bit) immr->im_ioport.iop_pdatd |= I2C_MOSI; \ - else immr->im_ioport.iop_pdatd &= ~I2C_MOSI + else immr->im_ioport.iop_pdatd &= ~I2C_MOSI #define SPI_SCL(bit) if(bit) immr->im_ioport.iop_pdatd |= I2C_SCLK; \ - else immr->im_ioport.iop_pdatd &= ~I2C_SCLK + else immr->im_ioport.iop_pdatd &= ~I2C_SCLK #define SPI_DELAY /* No delay is needed */ #endif /* CONFIG_SOFT_SPI */ diff --git a/include/configs/sbc8260.h b/include/configs/sbc8260.h index d47c208..1822fbc 100644 --- a/include/configs/sbc8260.h +++ b/include/configs/sbc8260.h @@ -284,7 +284,7 @@ /* What should the console's baud rate be? */ #define CONFIG_BAUDRATE 9600 -/* Ethernet MAC address +/* Ethernet MAC address * Note: We are using the EST Corporation OUI (00:a0:1e:xx:xx:xx) * http://standards.ieee.org/regauth/oui/index.shtml */ @@ -315,38 +315,38 @@ /* Define this to contain any number of null terminated strings that * will be part of the default enviroment compiled into the boot image. - * + * * Variable Usage * -------------- ------------------------------------------------------- - * serverip server IP address + * serverip server IP address * ipaddr my IP address * reprog Reload flash with a new copy of U-Boot * zapenv Erase the environment area in flash * root-on-initrd Set the bootcmd variable to allow booting of an initial * ram disk. - * root-on-nfs Set the bootcmd variable to allow booting of a NFS + * root-on-nfs Set the bootcmd variable to allow booting of a NFS * mounted root filesystem. - * boot-hook Convenient stub to do something useful before the + * boot-hook Convenient stub to do something useful before the * bootm command is executed. - * + * * Example usage of root-on-initrd and root-on-nfs : * * Note: The lines have been wrapped to improved its readability. * * => printenv bootcmd * bootcmd=version;echo;bootp;setenv bootargs root=/dev/nfs rw - * nfsroot=$(serverip):$(rootpath) + * nfsroot=$(serverip):$(rootpath) * ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;run boot-hook;bootm * * => run root-on-initrd * => printenv bootcmd * bootcmd=version;echo;bootp;setenv bootargs root=/dev/ram0 rw * ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;run boot-hook;bootm - * + * * => run root-on-nfs * => printenv bootcmd * bootcmd=version;echo;bootp;setenv bootargs root=/dev/nfs rw - * nfsroot=$(serverip):$(rootpath) + * nfsroot=$(serverip):$(rootpath) * ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off;run boot-hook;bootm * */ diff --git a/include/configs/sc520_cdp.h b/include/configs/sc520_cdp.h index 292b4bf..764efdf 100644 --- a/include/configs/sc520_cdp.h +++ b/include/configs/sc520_cdp.h @@ -37,7 +37,7 @@ #define CONFIG_SC520 1 /* Include support for AMD SC520 */ #define CONFIG_ALI152X 1 /* Include support for Ali 152x SIO */ -#define CFG_SDRAM_PRECHARGE_DELAY 6 /* 6T */ +#define CFG_SDRAM_PRECHARGE_DELAY 6 /* 6T */ #define CFG_SDRAM_REFRESH_RATE 78 /* 7.8uS (choices are 7.8, 15.6, 31.2 or 62.5uS) */ #define CFG_SDRAM_RAS_CAS_DELAY 3 /* 3T */ @@ -123,7 +123,7 @@ #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */ #define CONFIG_SPI_EEPROM /* Support for SPI EEPROMs (AT25128) */ -#define CONFIG_MW_EEPROM /* Support for MicroWire EEPROMs (AT93LC46) */ +#define CONFIG_MW_EEPROM /* Support for MicroWire EEPROMs (AT93LC46) */ /* allow to overwrite serial and ethaddr */ @@ -134,7 +134,7 @@ #define CFG_ENV_IS_IN_EEPROM 1 #define CONFIG_SPI #define CFG_ENV_SIZE 0x4000 /* Total Size of Environment EEPROM 16k is SPI is used or 128 bytes if MW is used*/ -#define CFG_ENV_OFFSET 0 +#define CFG_ENV_OFFSET 0 #define CONFIG_SC520_CDP_USE_SPI /* Store configuration in the SPI part */ #undef CONFIG_SC520_CDP_USE_MW /* Store configuration in the MicroWire part */ #define CONFIG_SPI_X 1 @@ -157,7 +157,7 @@ #define CFG_IDE_MAXDEVICE (CFG_IDE_MAXBUS*2) /* max. 2 drives per IDE bus */ #define CFG_ATA_IDE0_OFFSET 0x01F0 /* ide0 offste */ -//#define CFG_ATA_IDE1_OFFSET 0x0170 /* ide1 offset */ +/*#define CFG_ATA_IDE1_OFFSET 0x0170 /###* ide1 offset */ #define CFG_ATA_DATA_OFFSET 0 /* data reg offset */ #define CFG_ATA_REG_OFFSET 0 /* reg offset */ #define CFG_ATA_ALT_OFFSET 0x200 /* alternate register offset */ @@ -187,7 +187,6 @@ #define CFG_ISA_IO 0 - /************************************************************ * RTC ***********************************************************/ @@ -202,9 +201,8 @@ #define CONFIG_PCI_SCAN_SHOW #define CFG_FIRST_PCI_IRQ 10 -#define CFG_SECOND_PCI_IRQ 9 -#define CFG_THIRD_PCI_IRQ 11 +#define CFG_SECOND_PCI_IRQ 9 +#define CFG_THIRD_PCI_IRQ 11 #define CFG_FORTH_PCI_IRQ 15 - #endif /* __CONFIG_H */ diff --git a/include/configs/sc520_spunk.h b/include/configs/sc520_spunk.h index 0a28805..9d26beb 100644 --- a/include/configs/sc520_spunk.h +++ b/include/configs/sc520_spunk.h @@ -189,8 +189,6 @@ #define CONFIG_ISO_PARTITION /* Experimental */ - - /************************************************************ * RTC ***********************************************************/ @@ -209,5 +207,4 @@ #define CFG_THIRD_PCI_IRQ 11 #define CFG_FORTH_PCI_IRQ 12 - #endif /* __CONFIG_H */ diff --git a/include/configs/sc520_spunk_rel.h b/include/configs/sc520_spunk_rel.h index 2d53530..2e7a7e1 100644 --- a/include/configs/sc520_spunk_rel.h +++ b/include/configs/sc520_spunk_rel.h @@ -27,6 +27,6 @@ #include "sc520_spunk.h" #undef CONFIG_BOOTCOMMAND -#define CONFIG_BOOTCOMMAND "fsload boot/vmlinuz ; bootm" +#define CONFIG_BOOTCOMMAND "fsload boot/vmlinuz ; bootm" #endif diff --git a/include/configs/svm_sc8xx.h b/include/configs/svm_sc8xx.h index b46b0be..e9e86f6 100644 --- a/include/configs/svm_sc8xx.h +++ b/include/configs/svm_sc8xx.h @@ -92,22 +92,22 @@ #undef CONFIG_BOOTARGS #define CONFIG_EXTRA_ENV_SETTINGS \ - "nfsargs=setenv bootargs root=/dev/nfs rw " \ - "nfsroot=$(serverip):$(rootpath)\0" \ - "ramargs=setenv bootargs root=/dev/ram rw\0" \ - "addip=setenv bootargs $(bootargs) " \ - "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ - ":$(hostname):$(netdev):off panic=1\0" \ - "flash_nfs=run nfsargs addip;" \ - "bootm $(kernel_addr)\0" \ - "flash_self=run ramargs addip;" \ - "bootm $(kernel_addr) $(ramdisk_addr)\0" \ - "net_nfs=tftp 0x210000 $(bootfile);run nfsargs addip;bootm\0" \ - "rootpath=/opt/sinovee/ppc8xx-linux-2.0/target\0" \ - "bootfile=pImage-sc855t\0" \ - "kernel_addr=48000000\0" \ - "ramdisk_addr=48100000\0" \ - "" + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=$(serverip):$(rootpath)\0" \ + "ramargs=setenv bootargs root=/dev/ram rw\0" \ + "addip=setenv bootargs $(bootargs) " \ + "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask)" \ + ":$(hostname):$(netdev):off panic=1\0" \ + "flash_nfs=run nfsargs addip;" \ + "bootm $(kernel_addr)\0" \ + "flash_self=run ramargs addip;" \ + "bootm $(kernel_addr) $(ramdisk_addr)\0" \ + "net_nfs=tftp 0x210000 $(bootfile);run nfsargs addip;bootm\0" \ + "rootpath=/opt/sinovee/ppc8xx-linux-2.0/target\0" \ + "bootfile=pImage-sc855t\0" \ + "kernel_addr=48000000\0" \ + "ramdisk_addr=48100000\0" \ + "" #define CONFIG_BOOTCOMMAND \ "setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath) " \ "ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname)::off; " \ @@ -133,8 +133,8 @@ #define CONFIG_RTC_MPC8xx /* use internal RTC of MPC8xx */ #define CONFIG_COMMANDS ( CONFIG_CMD_DFL | \ - CFG_CMD_ASKENV | \ - CFG_CMD_DHCP | \ + CFG_CMD_ASKENV | \ + CFG_CMD_DHCP | \ CFG_CMD_DOC | \ /* CFG_CMD_IDE |*/ \ CFG_CMD_DATE ) @@ -272,7 +272,7 @@ */ #ifndef CONFIG_CAN_DRIVER /*#define CFG_SIUMCR 0x00610c00 */ -#define CFG_SIUMCR 0x00000000 +#define CFG_SIUMCR 0x00000000 #else /* we must activate GPL5 in the SIUMCR for CAN */ #define CFG_SIUMCR (SIUMCR_DBGC11 | SIUMCR_DBPC00 | SIUMCR_MLRC01) #endif /* CONFIG_CAN_DRIVER */ @@ -309,16 +309,16 @@ #elif defined (CONFIG_80MHz) #define CFG_PLPRCR 0x04f01000 #define CONFIG_8xx_GCLK_FREQ 80000000 -#elif defined(CONFIG_75MHz) -#define CFG_PLPRCR 0x04a00100 +#elif defined(CONFIG_75MHz) +#define CFG_PLPRCR 0x04a00100 #define CONFIG_8xx_GCLK_FREQ 75000000 -#elif defined(CONFIG_66MHz) -#define CFG_PLPRCR 0x04101000 +#elif defined(CONFIG_66MHz) +#define CFG_PLPRCR 0x04101000 #define CONFIG_8xx_GCLK_FREQ 66000000 -#elif defined(CONFIG_50MHz) -#define CFG_PLPRCR 0x03101000 +#elif defined(CONFIG_50MHz) +#define CFG_PLPRCR 0x03101000 #define CONFIG_8xx_GCLK_FREQ 50000000 -#endif +#endif /*----------------------------------------------------------------------- * SCCR - System Clock and reset Control Register 15-27 @@ -327,11 +327,11 @@ * power management and some other internal clocks */ #define SCCR_MASK SCCR_EBDF11 -#ifdef CONFIG_BUS_DIV2 +#ifdef CONFIG_BUS_DIV2 #define CFG_SCCR 0x02020000 | SCCR_RTSEL #else /* up to 50 MHz we use a 1:1 clock */ #define CFG_SCCR 0x02000000 | SCCR_RTSEL -#endif +#endif /*----------------------------------------------------------------------- * PCMCIA stuff @@ -370,7 +370,7 @@ */ #define CFG_ATA_ALT_OFFSET 0x0210 /* Offset for alternate registers */ -#define CONFIG_ATAPI +#define CONFIG_ATAPI #define CFG_PIO_MODE 0 /*----------------------------------------------------------------------- @@ -400,35 +400,35 @@ /* * FLASH timing: */ -#if defined(CONFIG_100MHz) -#define CFG_OR_TIMING_FLASH 0x000002f4 -#define CFG_OR_TIMING_DOC 0x000002f4 +#if defined(CONFIG_100MHz) +#define CFG_OR_TIMING_FLASH 0x000002f4 +#define CFG_OR_TIMING_DOC 0x000002f4 #define CFG_MxMR_PTx 0x61000000 #define CFG_MPTPR 0x400 #elif defined(CONFIG_80MHz) -#define CFG_OR_TIMING_FLASH 0x00000ff4 -#define CFG_OR_TIMING_DOC 0x000001f4 +#define CFG_OR_TIMING_FLASH 0x00000ff4 +#define CFG_OR_TIMING_DOC 0x000001f4 #define CFG_MxMR_PTx 0x4e000000 #define CFG_MPTPR 0x400 -#elif defined(CONFIG_75MHz) -#define CFG_OR_TIMING_FLASH 0x000008f4 -#define CFG_OR_TIMING_DOC 0x000002f4 +#elif defined(CONFIG_75MHz) +#define CFG_OR_TIMING_FLASH 0x000008f4 +#define CFG_OR_TIMING_DOC 0x000002f4 #define CFG_MxMR_PTx 0x49000000 #define CFG_MPTPR 0x400 #elif defined(CONFIG_66MHz) #define CFG_OR_TIMING_FLASH (OR_ACS_DIV1 | OR_TRLX | OR_CSNT_SAM | \ - OR_SCY_3_CLK | OR_EHTR | OR_BI) + OR_SCY_3_CLK | OR_EHTR | OR_BI) /*#define CFG_OR_TIMING_FLASH 0x000001f4 */ -#define CFG_OR_TIMING_DOC 0x000003f4 +#define CFG_OR_TIMING_DOC 0x000003f4 #define CFG_MxMR_PTx 0x40000000 #define CFG_MPTPR 0x400 #else /* 50 MHz */ #define CFG_OR_TIMING_FLASH 0x00000ff4 -#define CFG_OR_TIMING_DOC 0x000001f4 +#define CFG_OR_TIMING_DOC 0x000001f4 #define CFG_MxMR_PTx 0x30000000 #define CFG_MPTPR 0x400 #endif /*CONFIG_??MHz */ diff --git a/include/configs/v37.h b/include/configs/v37.h index f527440..6696985 100644 --- a/include/configs/v37.h +++ b/include/configs/v37.h @@ -376,6 +376,4 @@ #define BOOTFLAG_COLD 0x01 /* Normal Power-On: Boot from FLASH */ #define BOOTFLAG_WARM 0x02 /* Software reboot */ - - #endif /* __CONFIG_H */ diff --git a/include/configs/wepep250.h b/include/configs/wepep250.h index c88c4ab..ecb7215 100644 --- a/include/configs/wepep250.h +++ b/include/configs/wepep250.h @@ -1,4 +1,4 @@ -/* +/* * Copyright (C) 2003 ETC s.r.o. * * This program is free software; you can redistribute it and/or @@ -52,7 +52,7 @@ /* * Boot options. Setting delay to -1 stops autostart count down. * NOTE: Sending parameters to kernel depends on kernel version and - * 2.4.19-rmk6-pxa1 patch used while my u-boot coding didn't accept + * 2.4.19-rmk6-pxa1 patch used while my u-boot coding didn't accept * parameters at all! Do not get confused by them so. */ #define CONFIG_BOOTDELAY -1 @@ -71,7 +71,7 @@ #define CFG_BARGSIZE CFG_CBSIZE /* boot args buf size */ #define CFG_MEMTEST_START 0xa0400000 /* memtest test area */ -#define CFG_MEMTEST_END 0xa0800000 +#define CFG_MEMTEST_END 0xa0800000 #undef CFG_CLKS_IN_HZ /* use HZ for freq. display */ @@ -128,7 +128,7 @@ #define CFG_MAX_FLASH_BANKS 1 /* FLASH banks count (not chip count)*/ #define CFG_MAX_FLASH_SECT 128 /* number of sector in FLASH bank */ #define WEP_FLASH_BUS_WIDTH 4 /* we use 32 bit FLASH memory... */ -#define WEP_FLASH_INTERLEAVE 2 /* ... made of 2 chips */ +#define WEP_FLASH_INTERLEAVE 2 /* ... made of 2 chips */ #define WEP_FLASH_BANK_SIZE 0x2000000 /* size of one flash bank*/ #define WEP_FLASH_SECT_SIZE 0x0040000 /* size of erase sector */ #define WEP_FLASH_BASE 0x0000000 /* location of flash memory */ @@ -137,9 +137,9 @@ /* This should be defined if CFI FLASH device is present. Actually benefit is not so clear to me. In other words we can provide more informations - to user, but this expects more complex flash handling we do not provide + to user, but this expects more complex flash handling we do not provide now.*/ -#undef CFG_FLASH_CFI +#undef CFG_FLASH_CFI #define CFG_FLASH_ERASE_TOUT (2*CFG_HZ) /* timeout for Erase operation */ #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* timeout for Write operation */ @@ -173,7 +173,7 @@ #define CFG_MONITOR_LEN 0x20000 /* 128kb ( 1 flash sector ) */ #define CFG_ENV_IS_IN_FLASH 1 #define CFG_ENV_ADDR 0x20000 /* absolute address for now */ -#define CFG_ENV_SIZE 0x2000 +#define CFG_ENV_SIZE 0x2000 #undef CONFIG_ENV_OVERWRITE /* env is not writable now */ @@ -185,4 +185,3 @@ #define CFG_LOAD_ADDR 0x40000 #endif /* __CONFIG_H */ - diff --git a/include/dataflash.h b/include/dataflash.h index cc4badf..5e11863 100644 --- a/include/dataflash.h +++ b/include/dataflash.h @@ -91,7 +91,6 @@ } AT91S_DataFlash, *AT91PS_DataFlash; - typedef struct _AT91S_DATAFLASH_INFO { AT91S_DataflashDesc Desc; diff --git a/include/dm9161.h b/include/dm9161.h index 6299921..706e215 100644 --- a/include/dm9161.h +++ b/include/dm9161.h @@ -1,5 +1,5 @@ /* - * NOTE: DAVICOM ethernet Physical layer + * NOTE: DAVICOM ethernet Physical layer * * Version: @(#)DM9161.h 1.0.0 01/10/2001 * @@ -13,36 +13,36 @@ */ -// DAVICOM PHYSICAL LAYER TRANSCEIVER DM9161 +/* DAVICOM PHYSICAL LAYER TRANSCEIVER DM9161 */ -#define DM9161_BMCR 0 // Basic Mode Control Register -#define DM9161_BMSR 1 // Basic Mode Status Register -#define DM9161_PHYID1 2 // PHY Idendifier Register 1 -#define DM9161_PHYID2 3 // PHY Idendifier Register 2 -#define DM9161_ANAR 4 // Auto_Negotiation Advertisement Register -#define DM9161_ANLPAR 5 // Auto_negotiation Link Partner Ability Register -#define DM9161_ANER 6 // Auto-negotiation Expansion Register -#define DM9161_DSCR 16 // Specified Configuration Register -#define DM9161_DSCSR 17 // Specified Configuration and Status Register -#define DM9161_10BTCSR 18 // 10BASE-T Configuration and Satus Register -#define DM9161_MDINTR 21 // Specified Interrupt Register -#define DM9161_RECR 22 // Specified Receive Error Counter Register -#define DM9161_DISCR 23 // Specified Disconnect Counter Register -#define DM9161_RLSR 24 // Hardware Reset Latch State Register +#define DM9161_BMCR 0 /* Basic Mode Control Register */ +#define DM9161_BMSR 1 /* Basic Mode Status Register */ +#define DM9161_PHYID1 2 /* PHY Idendifier Register 1 */ +#define DM9161_PHYID2 3 /* PHY Idendifier Register 2 */ +#define DM9161_ANAR 4 /* Auto_Negotiation Advertisement Register */ +#define DM9161_ANLPAR 5 /* Auto_negotiation Link Partner Ability Register */ +#define DM9161_ANER 6 /* Auto-negotiation Expansion Register */ +#define DM9161_DSCR 16 /* Specified Configuration Register */ +#define DM9161_DSCSR 17 /* Specified Configuration and Status Register */ +#define DM9161_10BTCSR 18 /* 10BASE-T Configuration and Satus Register */ +#define DM9161_MDINTR 21 /* Specified Interrupt Register */ +#define DM9161_RECR 22 /* Specified Receive Error Counter Register */ +#define DM9161_DISCR 23 /* Specified Disconnect Counter Register */ +#define DM9161_RLSR 24 /* Hardware Reset Latch State Register */ -// --Bit definitions: DM9161_BMCR -#define DM9161_RESET (1 << 15) // 1= Software Reset; 0=Normal Operation -#define DM9161_LOOPBACK (1 << 14) // 1=loopback Enabled; 0=Normal Operation -#define DM9161_SPEED_SELECT (1 << 13) // 1=100Mbps; 0=10Mbps +/* --Bit definitions: DM9161_BMCR */ +#define DM9161_RESET (1 << 15) /* 1= Software Reset; 0=Normal Operation */ +#define DM9161_LOOPBACK (1 << 14) /* 1=loopback Enabled; 0=Normal Operation */ +#define DM9161_SPEED_SELECT (1 << 13) /* 1=100Mbps; 0=10Mbps */ #define DM9161_AUTONEG (1 << 12) #define DM9161_POWER_DOWN (1 << 11) -#define DM9161_ISOLATE (1 << 10) +#define DM9161_ISOLATE (1 << 10) #define DM9161_RESTART_AUTONEG (1 << 9) #define DM9161_DUPLEX_MODE (1 << 8) #define DM9161_COLLISION_TEST (1 << 7) -//--Bit definitions: DM9161_BMSR +/*--Bit definitions: DM9161_BMSR */ #define DM9161_100BASE_T4 (1 << 15) #define DM9161_100BASE_TX_FD (1 << 14) #define DM9161_100BASE_T4_HD (1 << 13) @@ -56,11 +56,11 @@ #define DM9161_JABBER_DETECT (1 << 1) #define DM9161_EXTEND_CAPAB (1 << 0) -//--definitions: DM9161_PHYID1 +/*--definitions: DM9161_PHYID1 */ #define DM9161_PHYID1_OUI 0x606E #define DM9161_LSB_MASK 0x3F -//--Bit definitions: DM9161_ANAR, DM9161_ANLPAR +/*--Bit definitions: DM9161_ANAR, DM9161_ANLPAR */ #define DM9161_NP (1 << 15) #define DM9161_ACK (1 << 14) #define DM9161_RF (1 << 13) @@ -72,14 +72,14 @@ #define DM9161_10_HDX (1 << 5) #define DM9161_AN_IEEE_802_3 0x0001 -//--Bit definitions: DM9161_ANER +/*--Bit definitions: DM9161_ANER */ #define DM9161_PDF (1 << 4) #define DM9161_LP_NP_ABLE (1 << 3) #define DM9161_NP_ABLE (1 << 2) #define DM9161_PAGE_RX (1 << 1) #define DM9161_LP_AN_ABLE (1 << 0) -//--Bit definitions: DM9161_DSCR +/*--Bit definitions: DM9161_DSCR */ #define DM9161_BP4B5B (1 << 15) #define DM9161_BP_SCR (1 << 14) #define DM9161_BP_ALIGN (1 << 13) @@ -96,13 +96,13 @@ #define DM9161_SLEEP (1 << 1) #define DM9161_RLOUT (1 << 0) -//--Bit definitions: DM9161_DSCSR +/*--Bit definitions: DM9161_DSCSR */ #define DM9161_100FDX (1 << 15) #define DM9161_100HDX (1 << 14) #define DM9161_10FDX (1 << 13) #define DM9161_10HDX (1 << 12) -//--Bit definitions: DM9161_10BTCSR +/*--Bit definitions: DM9161_10BTCSR */ #define DM9161_LP_EN (1 << 14) #define DM9161_HBE (1 << 13) #define DM9161_SQUELCH (1 << 12) @@ -111,7 +111,7 @@ #define DM9161_POLR (1 << 0) -//--Bit definitions: DM9161_MDINTR +/*--Bit definitions: DM9161_MDINTR */ #define DM9161_INTR_PEND (1 << 15) #define DM9161_FDX_MASK (1 << 11) #define DM9161_SPD_MASK (1 << 10) diff --git a/include/elf.h b/include/elf.h index ed238c3..1be294a 100644 --- a/include/elf.h +++ b/include/elf.h @@ -115,9 +115,9 @@ /* e_ident */ #define IS_ELF(ehdr) ((ehdr).e_ident[EI_MAG0] == ELFMAG0 && \ - (ehdr).e_ident[EI_MAG1] == ELFMAG1 && \ - (ehdr).e_ident[EI_MAG2] == ELFMAG2 && \ - (ehdr).e_ident[EI_MAG3] == ELFMAG3) + (ehdr).e_ident[EI_MAG1] == ELFMAG1 && \ + (ehdr).e_ident[EI_MAG2] == ELFMAG2 && \ + (ehdr).e_ident[EI_MAG3] == ELFMAG3) /* ELF Header */ typedef struct elfhdr{ @@ -531,7 +531,7 @@ /* Cygnus local bits below */ #define EF_PPC_RELOCATABLE 0x00010000 /* PowerPC -mrelocatable flag*/ #define EF_PPC_RELOCATABLE_LIB 0x00008000 /* PowerPC -mrelocatable-lib - flag */ + flag */ /* PowerPC relocations defined by the ABIs */ #define R_PPC_NONE 0 @@ -606,4 +606,3 @@ #define R_PPC_TOC16 255 #endif /* _ELF_H */ - diff --git a/include/fdc.h b/include/fdc.h index 7892b0e..b66f202 100644 --- a/include/fdc.h +++ b/include/fdc.h @@ -25,8 +25,6 @@ #ifndef _FDC_H_ #define _FDC_H_ - - /* Functions prototype */ int fdc_fdos_init (int drive); int fdc_fdos_seek (int where); @@ -36,6 +34,4 @@ int dos_read (ulong addr); int dos_dir (void); - - #endif diff --git a/include/galileo/core.h b/include/galileo/core.h index 56db097..0735d07 100644 --- a/include/galileo/core.h +++ b/include/galileo/core.h @@ -123,18 +123,18 @@ #define SHORT_SWAP(X) ((X <<8 ) | (X >> 8)) #define WORD_SWAP(X) (((X)&0xff)<<24)+ \ - (((X)&0xff00)<<8)+ \ - (((X)&0xff0000)>>8)+ \ - (((X)&0xff000000)>>24) + (((X)&0xff00)<<8)+ \ + (((X)&0xff0000)>>8)+ \ + (((X)&0xff000000)>>24) #define LONG_SWAP(X) ( (l64) (((X)&0xffULL)<<56)+ \ - (((X)&0xff00ULL)<<40)+ \ - (((X)&0xff0000ULL)<<24)+ \ - (((X)&0xff000000ULL)<<8)+ \ - (((X)&0xff00000000ULL)>>8)+ \ - (((X)&0xff0000000000ULL)>>24)+ \ - (((X)&0xff000000000000ULL)>>40)+ \ - (((X)&0xff00000000000000ULL)>>56)) + (((X)&0xff00ULL)<<40)+ \ + (((X)&0xff0000ULL)<<24)+ \ + (((X)&0xff000000ULL)<<8)+ \ + (((X)&0xff00000000ULL)>>8)+ \ + (((X)&0xff0000000000ULL)>>24)+ \ + (((X)&0xff000000000000ULL)>>40)+ \ + (((X)&0xff00000000000000ULL)>>56)) #endif @@ -154,44 +154,44 @@ /* Read/Write to/from GT`s internal registers */ #define GT_REG_READ(offset, pData) \ *pData = ( *((volatile unsigned int *)(NONE_CACHEABLE | \ - INTERNAL_REG_BASE_ADDR | (offset))) ) ; \ + INTERNAL_REG_BASE_ADDR | (offset))) ) ; \ *pData = WORD_SWAP(*pData) #define GTREGREAD(offset) \ - (WORD_SWAP( *((volatile unsigned int *)(NONE_CACHEABLE | \ - INTERNAL_REG_BASE_ADDR | (offset))) )) + (WORD_SWAP( *((volatile unsigned int *)(NONE_CACHEABLE | \ + INTERNAL_REG_BASE_ADDR | (offset))) )) #define GT_REG_WRITE(offset, data) \ *((unsigned int *)( INTERNAL_REG_BASE_ADDR | (offset))) = \ - WORD_SWAP(data) + WORD_SWAP(data) /* Write 32/16/8 bit */ #define WRITE_CHAR(address, data) \ - *((unsigned char *)(address)) = data + *((unsigned char *)(address)) = data #define WRITE_SHORT(address, data) \ - *((unsigned short *)(address)) = data + *((unsigned short *)(address)) = data #define WRITE_WORD(address, data) \ - *((unsigned int *)(address)) = data + *((unsigned int *)(address)) = data /* Read 32/16/8 bits - returns data in variable. */ #define READ_CHAR(address, pData) \ - *pData = *((volatile unsigned char *)(address)) + *pData = *((volatile unsigned char *)(address)) #define READ_SHORT(address, pData) \ - *pData = *((volatile unsigned short *)(address)) + *pData = *((volatile unsigned short *)(address)) #define READ_WORD(address, pData) \ - *pData = *((volatile unsigned int *)(address)) + *pData = *((volatile unsigned int *)(address)) /* Read 32/16/8 bit - returns data direct. */ #define READCHAR(address) \ - *((volatile unsigned char *)((address) | NONE_CACHEABLE)) + *((volatile unsigned char *)((address) | NONE_CACHEABLE)) #define READSHORT(address) \ - *((volatile unsigned short *)((address) | NONE_CACHEABLE)) + *((volatile unsigned short *)((address) | NONE_CACHEABLE)) #define READWORD(address) \ - *((volatile unsigned int *)((address) | NONE_CACHEABLE)) + *((volatile unsigned int *)((address) | NONE_CACHEABLE)) /* Those two Macros were defined to be compatible with MIPS */ #define VIRTUAL_TO_PHY(x) (((unsigned int)x) & 0xffffffff) @@ -203,8 +203,8 @@ SET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic '1' in register 0x840 while the other bits stays as is. */ #define SET_REG_BITS(regOffset,bits) \ - *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR | \ - regOffset) |= (unsigned int)WORD_SWAP(bits) + *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR | \ + regOffset) |= (unsigned int)WORD_SWAP(bits) /* RESET_REG_BITS(regOffset,bits) - gets register offset and bits: a 32bit value. It set to logic '0' in the @@ -212,7 +212,7 @@ RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic '0' in register 0x840 while the other bits stays as is. */ #define RESET_REG_BITS(regOffset,bits) \ - *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR \ - | regOffset) &= ~( (unsigned int)WORD_SWAP(bits) ) + *(unsigned int*)(NONE_CACHEABLE | INTERNAL_REG_BASE_ADDR \ + | regOffset) &= ~( (unsigned int)WORD_SWAP(bits) ) #endif /* __INCcoreh */ diff --git a/include/galileo/gt64260R.h b/include/galileo/gt64260R.h index 1e6f58b..ebf087a 100644 --- a/include/galileo/gt64260R.h +++ b/include/galileo/gt64260R.h @@ -89,8 +89,6 @@ #define PCI_1MEMORY3_HIGH_ADDRESS_REMAP 0x358 - - /****************************************/ /* CPU Sync Barrier */ /****************************************/ @@ -231,7 +229,6 @@ #define X1_SNOOP_COMMAND 0x54c - /****************************************/ /* Device Parameters */ /****************************************/ diff --git a/include/galileo/memory.h b/include/galileo/memory.h index 99bd79b..0c46c24 100644 --- a/include/galileo/memory.h +++ b/include/galileo/memory.h @@ -36,20 +36,20 @@ typedef enum __memDevice{DEVICE0,DEVICE1,DEVICE2,DEVICE3,BOOT_DEVICE} DEVICE; typedef enum __memoryProtectRegion{MEM_REGION0,MEM_REGION1,MEM_REGION2, \ - MEM_REGION3,MEM_REGION4,MEM_REGION5, \ - MEM_REGION6,MEM_REGION7} \ - MEMORY_PROTECT_REGION; + MEM_REGION3,MEM_REGION4,MEM_REGION5, \ + MEM_REGION6,MEM_REGION7} \ + MEMORY_PROTECT_REGION; typedef enum __memoryAccess{MEM_ACCESS_ALLOWED,MEM_ACCESS_FORBIDEN} \ - MEMORY_ACCESS; + MEMORY_ACCESS; typedef enum __memoryWrite{MEM_WRITE_ALLOWED,MEM_WRITE_FORBIDEN} \ - MEMORY_ACCESS_WRITE; + MEMORY_ACCESS_WRITE; typedef enum __memoryCacheProtect{MEM_CACHE_ALLOWED,MEM_CACHE_FORBIDEN} \ - MEMORY_CACHE_PROTECT; + MEMORY_CACHE_PROTECT; typedef enum __memorySnoopType{MEM_NO_SNOOP,MEM_SNOOP_WT,MEM_SNOOP_WB} \ - MEMORY_SNOOP_TYPE; + MEMORY_SNOOP_TYPE; typedef enum __memorySnoopRegion{MEM_SNOOP_REGION0,MEM_SNOOP_REGION1, \ - MEM_SNOOP_REGION2,MEM_SNOOP_REGION3} \ - MEMORY_SNOOP_REGION; + MEM_SNOOP_REGION2,MEM_SNOOP_REGION3} \ + MEMORY_SNOOP_REGION; /* functions */ unsigned int memoryGetBankBaseAddress(MEMORY_BANK bank); @@ -68,19 +68,18 @@ unsigned int memoryGetInternalRegistersSpace(void); /* Configurate the protection feature to a given space. */ bool memorySetProtectRegion(MEMORY_PROTECT_REGION region, - MEMORY_ACCESS memoryAccess, - MEMORY_ACCESS_WRITE memoryWrite, - MEMORY_CACHE_PROTECT cacheProtection, - unsigned int baseAddress, - unsigned int regionLength); + MEMORY_ACCESS memoryAccess, + MEMORY_ACCESS_WRITE memoryWrite, + MEMORY_CACHE_PROTECT cacheProtection, + unsigned int baseAddress, + unsigned int regionLength); /* Configurate the snoop feature to a given space. */ bool memorySetRegionSnoopMode(MEMORY_SNOOP_REGION region, - MEMORY_SNOOP_TYPE snoopType, - unsigned int baseAddress, - unsigned int regionLength); + MEMORY_SNOOP_TYPE snoopType, + unsigned int baseAddress, + unsigned int regionLength); bool memoryRemapAddress(unsigned int remapReg, unsigned int remapValue); bool memoryGetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum); bool memorySetDeviceParam(DEVICE_PARAM *deviceParam, DEVICE deviceNum); #endif /* __INCmemoryh */ - diff --git a/include/galileo/pci.h b/include/galileo/pci.h index f45dd36..6ed8b95 100644 --- a/include/galileo/pci.h +++ b/include/galileo/pci.h @@ -41,20 +41,20 @@ /* typedefs */ typedef enum __pciAccessRegions{REGION0,REGION1,REGION2,REGION3,REGION4,REGION5, - REGION6,REGION7} PCI_ACCESS_REGIONS; + REGION6,REGION7} PCI_ACCESS_REGIONS; typedef enum __pciAgentPrio{LOW_AGENT_PRIO,HI_AGENT_PRIO} PCI_AGENT_PRIO; typedef enum __pciAgentPark{PARK_ON_AGENT,DONT_PARK_ON_AGENT} PCI_AGENT_PARK; typedef enum __pciSnoopType{PCI_NO_SNOOP,PCI_SNOOP_WT,PCI_SNOOP_WB} - PCI_SNOOP_TYPE; + PCI_SNOOP_TYPE; typedef enum __pciSnoopRegion{PCI_SNOOP_REGION0,PCI_SNOOP_REGION1, - PCI_SNOOP_REGION2,PCI_SNOOP_REGION3} - PCI_SNOOP_REGION; + PCI_SNOOP_REGION2,PCI_SNOOP_REGION3} + PCI_SNOOP_REGION; typedef enum __memPciHost{PCI_HOST0,PCI_HOST1} PCI_HOST; typedef enum __memPciRegion{PCI_REGION0,PCI_REGION1, - PCI_REGION2,PCI_REGION3, + PCI_REGION2,PCI_REGION3, PCI_IO} PCI_REGION; @@ -62,23 +62,23 @@ void pciWriteConfigReg(PCI_HOST host, unsigned int regOffset, unsigned int pciDevNum, unsigned int data); unsigned int pciReadConfigReg (PCI_HOST host, unsigned int regOffset, - unsigned int pciDevNum); + unsigned int pciDevNum); /* read/write configuration registers on another PCI bus. */ void pciOverBridgeWriteConfigReg(PCI_HOST host, unsigned int regOffset, - unsigned int pciDevNum, - unsigned int busNum,unsigned int data); + unsigned int pciDevNum, + unsigned int busNum,unsigned int data); unsigned int pciOverBridgeReadConfigReg(PCI_HOST host, unsigned int regOffset, - unsigned int pciDevNum, - unsigned int busNum); + unsigned int pciDevNum, + unsigned int busNum); /* Master`s memory space */ bool pciMapSpace(PCI_HOST host, PCI_REGION region, unsigned int remapBase, unsigned int deviceBase, - unsigned int deviceLength); + unsigned int deviceLength); unsigned int pciGetSpaceBase(PCI_HOST host, PCI_REGION region); unsigned int pciGetSpaceSize(PCI_HOST host, PCI_REGION region); @@ -99,15 +99,15 @@ bool pciArbiterEnable(PCI_HOST host); bool pciArbiterDisable(PCI_HOST host); bool pciParkingDisable(PCI_HOST host, PCI_AGENT_PARK internalAgent, - PCI_AGENT_PARK externalAgent0, - PCI_AGENT_PARK externalAgent1, - PCI_AGENT_PARK externalAgent2, - PCI_AGENT_PARK externalAgent3, - PCI_AGENT_PARK externalAgent4, - PCI_AGENT_PARK externalAgent5); + PCI_AGENT_PARK externalAgent0, + PCI_AGENT_PARK externalAgent1, + PCI_AGENT_PARK externalAgent2, + PCI_AGENT_PARK externalAgent3, + PCI_AGENT_PARK externalAgent4, + PCI_AGENT_PARK externalAgent5); bool pciSetRegionSnoopMode(PCI_HOST host, PCI_SNOOP_REGION region, PCI_SNOOP_TYPE snoopType, - unsigned int baseAddress, - unsigned int regionLength); + unsigned int baseAddress, + unsigned int regionLength); #endif /* __INCpcih */ diff --git a/include/jffs2/jffs2.h b/include/jffs2/jffs2.h index 9098690..fc3a841 100644 --- a/include/jffs2/jffs2.h +++ b/include/jffs2/jffs2.h @@ -201,8 +201,4 @@ long zlib_decompress(unsigned char *data_in, unsigned char *cpage_out, __u32 srclen, __u32 destlen); - - - - #endif /* __LINUX_JFFS2_H__ */ diff --git a/include/linux/bitops.h b/include/linux/bitops.h index b155b77..7d41ae6 100644 --- a/include/linux/bitops.h +++ b/include/linux/bitops.h @@ -44,26 +44,26 @@ static inline unsigned int generic_hweight32(unsigned int w) { - unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555); - res = (res & 0x33333333) + ((res >> 2) & 0x33333333); - res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F); - res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF); - return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF); + unsigned int res = (w & 0x55555555) + ((w >> 1) & 0x55555555); + res = (res & 0x33333333) + ((res >> 2) & 0x33333333); + res = (res & 0x0F0F0F0F) + ((res >> 4) & 0x0F0F0F0F); + res = (res & 0x00FF00FF) + ((res >> 8) & 0x00FF00FF); + return (res & 0x0000FFFF) + ((res >> 16) & 0x0000FFFF); } static inline unsigned int generic_hweight16(unsigned int w) { - unsigned int res = (w & 0x5555) + ((w >> 1) & 0x5555); - res = (res & 0x3333) + ((res >> 2) & 0x3333); - res = (res & 0x0F0F) + ((res >> 4) & 0x0F0F); - return (res & 0x00FF) + ((res >> 8) & 0x00FF); + unsigned int res = (w & 0x5555) + ((w >> 1) & 0x5555); + res = (res & 0x3333) + ((res >> 2) & 0x3333); + res = (res & 0x0F0F) + ((res >> 4) & 0x0F0F); + return (res & 0x00FF) + ((res >> 8) & 0x00FF); } static inline unsigned int generic_hweight8(unsigned int w) { - unsigned int res = (w & 0x55) + ((w >> 1) & 0x55); - res = (res & 0x33) + ((res >> 2) & 0x33); - return (res & 0x0F) + ((res >> 4) & 0x0F); + unsigned int res = (w & 0x55) + ((w >> 1) & 0x55); + res = (res & 0x33) + ((res >> 2) & 0x33); + return (res & 0x0F) + ((res >> 4) & 0x0F); } #include diff --git a/include/linux/byteorder/swab.h b/include/linux/byteorder/swab.h index 813df46..755a821 100644 --- a/include/linux/byteorder/swab.h +++ b/include/linux/byteorder/swab.h @@ -34,7 +34,7 @@ (__u64)(((__u64)(x) & (__u64)0x000000000000ff00ULL) << 40) | \ (__u64)(((__u64)(x) & (__u64)0x0000000000ff0000ULL) << 24) | \ (__u64)(((__u64)(x) & (__u64)0x00000000ff000000ULL) << 8) | \ - (__u64)(((__u64)(x) & (__u64)0x000000ff00000000ULL) >> 8) | \ + (__u64)(((__u64)(x) & (__u64)0x000000ff00000000ULL) >> 8) | \ (__u64)(((__u64)(x) & (__u64)0x0000ff0000000000ULL) >> 24) | \ (__u64)(((__u64)(x) & (__u64)0x00ff000000000000ULL) >> 40) | \ (__u64)(((__u64)(x) & (__u64)0xff00000000000000ULL) >> 56) )) @@ -127,8 +127,8 @@ { # ifdef __SWAB_64_THRU_32__ __u32 h = x >> 32; - __u32 l = x & ((1ULL<<32)-1); - return (((__u64)__swab32(l)) << 32) | ((__u64)(__swab32(h))); + __u32 l = x & ((1ULL<<32)-1); + return (((__u64)__swab32(l)) << 32) | ((__u64)(__swab32(h))); # else return __arch__swab64(x); # endif diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 678bef7..d37055f 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -24,7 +24,7 @@ * bat later if I did something naughty. * 10-11-2000 SJH Added private NAND flash structure for driver * 10-24-2000 SJH Added prototype for 'nand_scan' function - * 10-29-2001 TG changed nand_chip structure to support + * 10-29-2001 TG changed nand_chip structure to support * hardwarespecific function for accessing control lines * 02-21-2002 TG added support for different read/write adress and * ready/busy line access function @@ -67,7 +67,7 @@ * * Structure overview: * - * IO_ADDR - address to access the 8 I/O lines of the flash device + * IO_ADDR - address to access the 8 I/O lines of the flash device * * hwcontrol - hardwarespecific function for accesing control-lines * @@ -119,8 +119,8 @@ char pageadrlen; unsigned long IO_ADDR; /* address to access the 8 I/O lines to the flash device */ unsigned long totlen; - uint oobblock; // Size of OOB blocks (e.g. 512) - uint oobsize; // Amount of OOB data per block (e.g. 16) + uint oobblock; /* Size of OOB blocks (e.g. 512) */ + uint oobsize; /* Amount of OOB data per block (e.g. 16) */ uint eccsize; }; diff --git a/include/linux/mtd/nftl.h b/include/linux/mtd/nftl.h index 3751758..4381306 100644 --- a/include/linux/mtd/nftl.h +++ b/include/linux/mtd/nftl.h @@ -31,8 +31,8 @@ } __attribute__((packed)); struct nftl_uci2 { - __u16 FoldMark; - __u16 FoldMark1; + __u16 FoldMark; + __u16 FoldMark1; __u32 unused; } __attribute__((packed)); @@ -94,8 +94,8 @@ int head,sect,cyl; __u16 *EUNtable; /* [numvunits]: First EUN for each virtual unit */ __u16 *ReplUnitTable; /* [numEUNs]: ReplUnitNumber for each */ - unsigned int nb_blocks; /* number of physical blocks */ - unsigned int nb_boot_blocks; /* number of blocks used by the bios */ + unsigned int nb_blocks; /* number of physical blocks */ + unsigned int nb_boot_blocks; /* number of blocks used by the bios */ }; #define MAX_NFTLS 16 diff --git a/include/lists.h b/include/lists.h index b42a2fa..804b5cd 100644 --- a/include/lists.h +++ b/include/lists.h @@ -3,7 +3,7 @@ #define LIST_START -1 /* Handy Constants that substitute for item positions */ #define LIST_END 0 /* END_OF_LIST means one past current length of list when */ - /* inserting. Otherwise it refers the last item in the list. */ + /* inserting. Otherwise it refers the last item in the list. */ typedef struct { diff --git a/include/malloc.h b/include/malloc.h index 08469bc..47154b0 100644 --- a/include/malloc.h +++ b/include/malloc.h @@ -6,8 +6,8 @@ * VERSION 2.6.6 Sun Mar 5 19:10:03 2000 Doug Lea (dl at gee) Note: There may be an updated version of this malloc obtainable at - ftp://g.oswego.edu/pub/misc/malloc.c - Check before installing! + ftp://g.oswego.edu/pub/misc/malloc.c + Check before installing! * Why use this malloc? @@ -84,7 +84,7 @@ and status information. Minimum allocated size: 4-byte ptrs: 16 bytes (including 4 overhead) - 8-byte ptrs: 24/32 bytes (including, 4/8 overhead) + 8-byte ptrs: 24/32 bytes (including, 4/8 overhead) When a chunk is freed, 12 (for 4byte ptrs) or 20 (for 8 byte ptrs but 4 byte size) or 24 (for 8/8) additional bytes are @@ -96,7 +96,7 @@ pointer to something of the minimum allocatable size. Maximum allocated size: 4-byte size_t: 2^31 - 8 bytes - 8-byte size_t: 2^63 - 16 bytes + 8-byte size_t: 2^63 - 16 bytes It is assumed that (possibly signed) size_t bit values suffice to represent chunk sizes. `Possibly signed' is due to the fact @@ -112,11 +112,11 @@ make the normal worst-case wastage 15 bytes (i.e., up to 15 more bytes will be allocated than were requested in malloc), with two exceptions: - 1. Because requests for zero bytes allocate non-zero space, - the worst case wastage for a request of zero bytes is 24 bytes. - 2. For requests >= mmap_threshold that are serviced via - mmap(), the worst case wastage is 8 bytes plus the remainder - from a system page (the minimal mmap unit); typically 4096 bytes. + 1. Because requests for zero bytes allocate non-zero space, + the worst case wastage for a request of zero bytes is 24 bytes. + 2. For requests >= mmap_threshold that are serviced via + mmap(), the worst case wastage is 8 bytes plus the remainder + from a system page (the minimal mmap unit); typically 4096 bytes. * Limitations @@ -372,8 +372,8 @@ void* memcpy(void*, const void*, size_t); #else #ifdef WIN32 -// On Win32 platforms, 'memset()' and 'memcpy()' are already declared in -// 'windows.h' +/* On Win32 platforms, 'memset()' and 'memcpy()' are already declared in */ +/* 'windows.h' */ #else Void_t* memset(); Void_t* memcpy(); @@ -393,14 +393,14 @@ if(mzsz <= 9*sizeof(mzsz)) { \ INTERNAL_SIZE_T* mz = (INTERNAL_SIZE_T*) (charp); \ if(mzsz >= 5*sizeof(mzsz)) { *mz++ = 0; \ - *mz++ = 0; \ + *mz++ = 0; \ if(mzsz >= 7*sizeof(mzsz)) { *mz++ = 0; \ - *mz++ = 0; \ - if(mzsz >= 9*sizeof(mzsz)) { *mz++ = 0; \ - *mz++ = 0; }}} \ - *mz++ = 0; \ - *mz++ = 0; \ - *mz = 0; \ + *mz++ = 0; \ + if(mzsz >= 9*sizeof(mzsz)) { *mz++ = 0; \ + *mz++ = 0; }}} \ + *mz++ = 0; \ + *mz++ = 0; \ + *mz = 0; \ } else memset((charp), 0, mzsz); \ } while(0) @@ -411,14 +411,14 @@ INTERNAL_SIZE_T* mcsrc = (INTERNAL_SIZE_T*) (src); \ INTERNAL_SIZE_T* mcdst = (INTERNAL_SIZE_T*) (dest); \ if(mcsz >= 5*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; \ + *mcdst++ = *mcsrc++; \ if(mcsz >= 7*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; \ - if(mcsz >= 9*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; }}} \ - *mcdst++ = *mcsrc++; \ - *mcdst++ = *mcsrc++; \ - *mcdst = *mcsrc ; \ + *mcdst++ = *mcsrc++; \ + if(mcsz >= 9*sizeof(mcsz)) { *mcdst++ = *mcsrc++; \ + *mcdst++ = *mcsrc++; }}} \ + *mcdst++ = *mcsrc++; \ + *mcdst++ = *mcsrc++; \ + *mcdst = *mcsrc ; \ } else memcpy(dest, src, mcsz); \ } while(0) @@ -567,7 +567,6 @@ #endif - /* This version of malloc supports the standard SVID/XPG mallinfo @@ -631,7 +630,6 @@ #define M_MMAP_MAX -4 - #ifndef DEFAULT_TRIM_THRESHOLD #define DEFAULT_TRIM_THRESHOLD (128 * 1024) #endif @@ -695,11 +693,11 @@ retain whenever sbrk is called. It is used in two ways internally: * When sbrk is called to extend the top of the arena to satisfy - a new malloc request, this much padding is added to the sbrk - request. + a new malloc request, this much padding is added to the sbrk + request. * When malloc_trim is called automatically from free(), - it is used as the `pad' argument. + it is used as the `pad' argument. In both cases, the actual amount of padding is rounded so that the end of the arena is always a system page boundary. @@ -745,15 +743,15 @@ However, it has the disadvantages that: - 1. The space cannot be reclaimed, consolidated, and then - used to service later requests, as happens with normal chunks. - 2. It can lead to more wastage because of mmap page alignment - requirements - 3. It causes malloc performance to be more dependent on host - system memory management support routines which may vary in - implementation quality and may impose arbitrary - limitations. Generally, servicing a request via normal - malloc steps is faster than going through a system's mmap. + 1. The space cannot be reclaimed, consolidated, and then + used to service later requests, as happens with normal chunks. + 2. It can lead to more wastage because of mmap page alignment + requirements + 3. It causes malloc performance to be more dependent on host + system memory management support routines which may vary in + implementation quality and may impose arbitrary + limitations. Generally, servicing a request via normal + malloc steps is faster than going through a system's mmap. All together, these considerations should lead you to use mmap only for relatively large requests. @@ -762,7 +760,6 @@ */ - #ifndef DEFAULT_MMAP_MAX #if HAVE_MMAP #define DEFAULT_MMAP_MAX (64) @@ -775,15 +772,15 @@ M_MMAP_MAX is the maximum number of requests to simultaneously service using mmap. This parameter exists because: - 1. Some systems have a limited number of internal tables for - use by mmap. - 2. In most systems, overreliance on mmap can degrade overall - performance. - 3. If a program allocates many large regions, it is probably - better off using normal sbrk-based allocation routines that - can reclaim and reallocate normal heap memory. Using a - small value allows transition into this mode after the - first few allocations. + 1. Some systems have a limited number of internal tables for + use by mmap. + 2. In most systems, overreliance on mmap can degrade overall + performance. + 3. If a program allocates many large regions, it is probably + better off using normal sbrk-based allocation routines that + can reclaim and reallocate normal heap memory. Using a + small value allows transition into this mode after the + first few allocations. Setting to 0 disables all use of mmap. If HAVE_MMAP is not set, the default value is 0, and attempts to set it to non-zero values @@ -791,8 +788,6 @@ */ - - /* USE_DL_PREFIX will prefix all public routines with the string 'dl'. Useful to quickly avoid procedure declaration conflicts and linker @@ -803,8 +798,6 @@ /* #define USE_DL_PREFIX */ - - /* Special defines for linux libc diff --git a/include/mii_phy.h b/include/mii_phy.h index a65bd66..f0d3e62 100644 --- a/include/mii_phy.h +++ b/include/mii_phy.h @@ -6,4 +6,3 @@ void mii_phy_write(unsigned short reg, unsigned short val); #endif - diff --git a/include/miiphy.h b/include/miiphy.h index f1840ae..5122b09 100644 --- a/include/miiphy.h +++ b/include/miiphy.h @@ -42,7 +42,7 @@ int miiphy_read(unsigned char addr, unsigned char reg, unsigned short * value); int miiphy_write(unsigned char addr, unsigned char reg, unsigned short value); int miiphy_info(unsigned char addr, unsigned int *oui, unsigned char *model, - unsigned char *rev); + unsigned char *rev); int miiphy_reset(unsigned char addr); int miiphy_speed(unsigned char addr); int miiphy_duplex(unsigned char addr); diff --git a/include/mpc106.h b/include/mpc106.h index 3926f8b..ab6d57e 100644 --- a/include/mpc106.h +++ b/include/mpc106.h @@ -155,4 +155,3 @@ #define MBER_BANK3 0x8 #endif - diff --git a/include/mpc5xx.h b/include/mpc5xx.h index 8541ef6..345fca8 100644 --- a/include/mpc5xx.h +++ b/include/mpc5xx.h @@ -23,7 +23,7 @@ /* * File: mpc5xx.h - * + * * Discription: mpc5xx specific definitions * */ @@ -88,7 +88,7 @@ #define SIUMCR_MTSC 0x00000100 /* Memory transfer */ /*----------------------------------------------------------------------- - * TBSCR - Time Base Status and Control Register + * TBSCR - Time Base Status and Control Register */ #define TBSCR_REFA ((ushort)0x0080) /* Reference Interrupt Status A */ #define TBSCR_REFB ((ushort)0x0040) /* Reference Interrupt Status B */ @@ -113,13 +113,13 @@ #define PLPRCR_CSR 0x00000080 /* CheskStop Reset value */ /*----------------------------------------------------------------------- - * SCCR - System Clock and reset Control Register + * SCCR - System Clock and reset Control Register */ #define SCCR_DFNL_MSK 0x00000070 /* DFNL mask */ #define SCCR_DFNH_MSK 0x00000007 /* DFNH mask */ #define SCCR_DFNL_SHIFT 0x0000004 /* DFNL shift value */ #define SCCR_RTSEL 0x00100000 /* RTC circuit input source select */ -#define SCCR_EBDF00 0x00000000 /* Division factor 1. CLKOUT is GCLK2 */ +#define SCCR_EBDF00 0x00000000 /* Division factor 1. CLKOUT is GCLK2 */ #define SCCR_EBDF11 0x00060000 /* reserved */ #define SCCR_TBS 0x02000000 /* Time Base Source */ #define SCCR_RTDIV 0x01000000 /* RTC Clock Divide */ diff --git a/include/net.h b/include/net.h index 2a1d336..b9bf133 100644 --- a/include/net.h +++ b/include/net.h @@ -64,7 +64,6 @@ typedef ulong IPaddr_t; - /* * The current receive packet handler. Called with a pointer to the * application packet, and a protocol type (PORT_BOOTPC or PORT_TFTP). @@ -184,9 +183,9 @@ # define RARPOP_REPLY 4 /* Response to previous request */ /* - * The remaining fields are variable in size, according to - * the sizes above, and are defined as appropriate for - * specific hardware/protocol combinations. + * The remaining fields are variable in size, according to + * the sizes above, and are defined as appropriate for + * specific hardware/protocol combinations. */ uchar ar_data[0]; #if 0 @@ -228,7 +227,6 @@ } ICMP_t; - /* * Maximum packet size; used to allocate packet storage. * TFTP packets can be 524 bytes + IP header + ethernet header. diff --git a/include/part.h b/include/part.h index 9aa9f5a..35afa28 100644 --- a/include/part.h +++ b/include/part.h @@ -104,5 +104,3 @@ #endif #endif /* _PART_H */ - - diff --git a/include/pcmcia/i82365.h b/include/pcmcia/i82365.h index 27ee583..0b432a8 100644 --- a/include/pcmcia/i82365.h +++ b/include/pcmcia/i82365.h @@ -9,7 +9,7 @@ * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and - * limitations under the License. + * limitations under the License. * * The initial developer of the original code is David A. Hinds * . Portions created by David A. Hinds diff --git a/include/pcmcia/ss.h b/include/pcmcia/ss.h index d197e42..aafae8a 100644 --- a/include/pcmcia/ss.h +++ b/include/pcmcia/ss.h @@ -9,7 +9,7 @@ * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and - * limitations under the License. + * limitations under the License. * * The initial developer of the original code is David A. Hinds * . Portions created by David A. Hinds diff --git a/include/pcmcia/ti113x.h b/include/pcmcia/ti113x.h index 26c5764..5453588 100644 --- a/include/pcmcia/ti113x.h +++ b/include/pcmcia/ti113x.h @@ -9,7 +9,7 @@ * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and - * limitations under the License. + * limitations under the License. * * The initial developer of the original code is David A. Hinds * . Portions created by David A. Hinds @@ -115,7 +115,7 @@ #define TI113X_SCR_CDMA_EN 0x00000008 #define TI113X_SCR_ASYNC_IRQ 0x00000004 #define TI113X_SCR_KEEPCLK 0x00000002 -#define TI113X_SCR_CLKRUN_ENA 0x00000001 +#define TI113X_SCR_CLKRUN_ENA 0x00000001 #define TI122X_SCR_SER_STEP 0xc0000000 #define TI122X_SCR_INTRTIE 0x20000000 diff --git a/include/pcmcia/yenta.h b/include/pcmcia/yenta.h index 525d8ec..5cd58a7 100644 --- a/include/pcmcia/yenta.h +++ b/include/pcmcia/yenta.h @@ -9,7 +9,7 @@ * Software distributed under the License is distributed on an "AS IS" * basis, WITHOUT WARRANTY OF ANY KIND, either express or implied. See * the License for the specific language governing rights and - * limitations under the License. + * limitations under the License. * * The initial developer of the original code is David A. Hinds * . Portions created by David A. Hinds diff --git a/include/ppc405.h b/include/ppc405.h index 243a22d..a0dbbc3 100644 --- a/include/ppc405.h +++ b/include/ppc405.h @@ -25,8 +25,8 @@ /*--------------------------------------------------------------------- */ /* Special Purpose Registers */ /*--------------------------------------------------------------------- */ - #define srr2 0x3de /* save/restore register 2 */ - #define srr3 0x3df /* save/restore register 3 */ + #define srr2 0x3de /* save/restore register 2 */ + #define srr3 0x3df /* save/restore register 3 */ #define dbsr 0x3f0 /* debug status register */ #define dbcr0 0x3f2 /* debug control register 0 */ #define dbcr1 0x3bd /* debug control register 1 */ @@ -44,9 +44,9 @@ #define tsr 0x3d8 /* timer status register */ #define tcr 0x3da /* timer control register */ #define pit 0x3db /* programmable interval timer */ - #define sgr 0x3b9 /* storage guarded reg */ - #define dcwr 0x3ba /* data cache write-thru reg*/ - #define sler 0x3bb /* storage little-endian reg */ + #define sgr 0x3b9 /* storage guarded reg */ + #define dcwr 0x3ba /* data cache write-thru reg*/ + #define sler 0x3bb /* storage little-endian reg */ #define cdbcr 0x3d7 /* cache debug cntrl reg */ #define icdbdr 0x3d3 /* instr cache dbug data reg*/ #define ccr0 0x3b3 /* core configuration register */ @@ -56,8 +56,8 @@ #define su0r 0x3bc /* storage user-defined register 0 */ #define zpr 0x3b0 /* zone protection regsiter */ - #define tbl 0x11c /* time base lower - privileged write */ - #define tbu 0x11d /* time base upper - privileged write */ + #define tbl 0x11c /* time base lower - privileged write */ + #define tbu 0x11d /* time base upper - privileged write */ #define sprg4r 0x104 /* Special purpose general 4 - read only */ #define sprg5r 0x105 /* Special purpose general 5 - read only */ @@ -448,30 +448,30 @@ *------------------------------------------------------------------------------- */ #define PLLMR0_266_133_66 (PLL_CPUDIV_1 | PLL_PLBDIV_2 | \ - PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 | \ - PLL_MALDIV_1 | PLL_PCIDIV_4) + PLL_OPBDIV_2 | PLL_EXTBUSDIV_2 | \ + PLL_MALDIV_1 | PLL_PCIDIV_4) #define PLLMR1_266_133_66 (PLL_FBKDIV_8 | \ - PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \ - PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW) + PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \ + PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW) #define PLLMR0_133_66_66_33 (PLL_CPUDIV_1 | PLL_PLBDIV_1 | \ - PLL_OPBDIV_2 | PLL_EXTBUSDIV_4 | \ - PLL_MALDIV_1 | PLL_PCIDIV_4) + PLL_OPBDIV_2 | PLL_EXTBUSDIV_4 | \ + PLL_MALDIV_1 | PLL_PCIDIV_4) #define PLLMR1_133_66_66_33 (PLL_FBKDIV_4 | \ - PLL_FWDDIVA_6 | PLL_FWDDIVB_6 | \ - PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW) + PLL_FWDDIVA_6 | PLL_FWDDIVB_6 | \ + PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW) #define PLLMR0_200_100_50_33 (PLL_CPUDIV_1 | PLL_PLBDIV_2 | \ - PLL_OPBDIV_2 | PLL_EXTBUSDIV_3 | \ - PLL_MALDIV_1 | PLL_PCIDIV_4) + PLL_OPBDIV_2 | PLL_EXTBUSDIV_3 | \ + PLL_MALDIV_1 | PLL_PCIDIV_4) #define PLLMR1_200_100_50_33 (PLL_FBKDIV_6 | \ - PLL_FWDDIVA_4 | PLL_FWDDIVB_4 | \ - PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW) + PLL_FWDDIVA_4 | PLL_FWDDIVB_4 | \ + PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW) #define PLLMR0_266_133_66_33 (PLL_CPUDIV_1 | PLL_PLBDIV_2 | \ - PLL_OPBDIV_2 | PLL_EXTBUSDIV_4 | \ - PLL_MALDIV_1 | PLL_PCIDIV_4) + PLL_OPBDIV_2 | PLL_EXTBUSDIV_4 | \ + PLL_MALDIV_1 | PLL_PCIDIV_4) #define PLLMR1_266_133_66_33 (PLL_FBKDIV_8 | \ - PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \ - PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW) + PLL_FWDDIVA_3 | PLL_FWDDIVB_3 | \ + PLL_TUNE_15_M_40 | PLL_TUNE_VCO_LOW) /* * PLL Voltage Controlled Oscillator (VCO) definitions @@ -672,4 +672,3 @@ line aligned data. */ #endif /* __PPC405_H__ */ - diff --git a/include/ppc440.h b/include/ppc440.h index 32c5b52..76930a5 100644 --- a/include/ppc440.h +++ b/include/ppc440.h @@ -551,4 +551,3 @@ line aligned data. */ #endif /* __PPC440_H__ */ - diff --git a/include/ppc4xx.h b/include/ppc4xx.h index 5750902..67759c7 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -30,4 +30,3 @@ #endif #endif /* __PPC4XX_H__ */ - diff --git a/include/ppc_asm.tmpl b/include/ppc_asm.tmpl index f99d7b2..0e0bde5 100644 --- a/include/ppc_asm.tmpl +++ b/include/ppc_asm.tmpl @@ -248,31 +248,31 @@ * code except that it uses SRR2 and SRR3 instead of SRR0 and SRR1. */ #define CRITICAL_EXCEPTION_PROLOG \ - mtspr SPRG0,r20; \ - mtspr SPRG1,r21; \ - mfcr r20; \ - subi r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD; /* alloc exc. frame */\ - stw r20,_CCR(r21); /* save registers */ \ - stw r22,GPR22(r21); \ - stw r23,GPR23(r21); \ - mfspr r20,SPRG0; \ - stw r20,GPR20(r21); \ - mfspr r22,SPRG1; \ - stw r22,GPR21(r21); \ - mflr r20; \ - stw r20,_LINK(r21); \ - mfctr r22; \ - stw r22,_CTR(r21); \ - mfspr r20,XER; \ - stw r20,_XER(r21); \ - mfspr r22,990; /* SRR2 */ \ - mfspr r23,991; /* SRR3 */ \ - stw r0,GPR0(r21); \ - stw r1,GPR1(r21); \ - stw r2,GPR2(r21); \ - stw r1,0(r21); \ - mr r1,r21; /* set new kernel sp */ \ - SAVE_4GPRS(3, r21); + mtspr SPRG0,r20; \ + mtspr SPRG1,r21; \ + mfcr r20; \ + subi r21,r1,INT_FRAME_SIZE+STACK_UNDERHEAD; /* alloc exc. frame */\ + stw r20,_CCR(r21); /* save registers */ \ + stw r22,GPR22(r21); \ + stw r23,GPR23(r21); \ + mfspr r20,SPRG0; \ + stw r20,GPR20(r21); \ + mfspr r22,SPRG1; \ + stw r22,GPR21(r21); \ + mflr r20; \ + stw r20,_LINK(r21); \ + mfctr r22; \ + stw r22,_CTR(r21); \ + mfspr r20,XER; \ + stw r20,_XER(r21); \ + mfspr r22,990; /* SRR2 */ \ + mfspr r23,991; /* SRR3 */ \ + stw r0,GPR0(r21); \ + stw r1,GPR1(r21); \ + stw r2,GPR2(r21); \ + stw r1,0(r21); \ + mr r1,r21; /* set new kernel sp */ \ + SAVE_4GPRS(3, r21); /* * Note: code which follows this uses cr0.eq (set if from kernel), * r21, r22 (SRR2), and r23 (SRR3). @@ -301,17 +301,17 @@ #define CRIT_EXCEPTION(n, label, hdlr) \ - . = n; \ + . = n; \ label: \ - CRITICAL_EXCEPTION_PROLOG; \ - lwz r3,GOT(transfer_to_handler); \ - mtlr r3; \ - addi r3,r1,STACK_FRAME_OVERHEAD; \ - li r20,MSR_KERNEL; \ - rlwimi r20,r23,0,25,25; \ - blrl ; \ + CRITICAL_EXCEPTION_PROLOG; \ + lwz r3,GOT(transfer_to_handler); \ + mtlr r3; \ + addi r3,r1,STACK_FRAME_OVERHEAD; \ + li r20,MSR_KERNEL; \ + rlwimi r20,r23,0,25,25; \ + blrl ; \ .L_ ## label : \ - .long hdlr - _start + EXC_OFF_SYS_RESET; \ - .long crit_return - _start + EXC_OFF_SYS_RESET + .long hdlr - _start + EXC_OFF_SYS_RESET; \ + .long crit_return - _start + EXC_OFF_SYS_RESET #endif /* __PPC_ASM_TMPL__ */ diff --git a/include/s3c2400.h b/include/s3c2400.h index 6269117..bc1f1e9 100644 --- a/include/s3c2400.h +++ b/include/s3c2400.h @@ -465,7 +465,6 @@ #define rMMDAT (*(volatile unsigned *)0x15a0003C) - /* ISR */ #define pISR_RESET (*(unsigned *)(_ISR_STARTADDRESS+0x0)) #define pISR_UNDEF (*(unsigned *)(_ISR_STARTADDRESS+0x4)) diff --git a/include/s3c24x0.h b/include/s3c24x0.h index 78a7981..71f35a5 100644 --- a/include/s3c24x0.h +++ b/include/s3c24x0.h @@ -371,7 +371,7 @@ #ifdef CONFIG_S3C2400 S3C24X0_REG32 PACON; S3C24X0_REG32 PADAT; - + S3C24X0_REG32 PBCON; S3C24X0_REG32 PBDAT; S3C24X0_REG32 PBUP; diff --git a/include/scsi.h b/include/scsi.h index 8929318..2be4d40 100644 --- a/include/scsi.h +++ b/include/scsi.h @@ -187,7 +187,6 @@ void scsi_init(void); - #define SCSI_IDENTIFY 0xC0 /* not used */ /* Hardware errors */ @@ -199,7 +198,6 @@ #define SCSI_INT_STATE 0x00010000 /* unknown Interrupt number is stored in 16 LSB */ - #ifndef TRUE #define TRUE 1 #endif @@ -207,9 +205,4 @@ #define FALSE 0 #endif - - - - #endif /* _SCSI_H */ - diff --git a/include/sed13806.h b/include/sed13806.h index 70e8e87..216e788 100644 --- a/include/sed13806.h +++ b/include/sed13806.h @@ -35,7 +35,7 @@ #define DEFAULT_VIDEO_MEMORY_SIZE 0x140000 /* Video Memory Size */ #define HWCURSORSIZE 1024 /* Size of memory reserved - for HW cursor*/ + for HW cursor*/ /* Offset of chipset registers */ #define BLT_CTRL0 (0x0100) @@ -87,7 +87,6 @@ } S1D_REGS; - /* Board specific functions */ unsigned int board_video_init (void); void board_validate_screen (unsigned int base); diff --git a/include/smiLynxEM.h b/include/smiLynxEM.h index cdd2f24..017964b 100644 --- a/include/smiLynxEM.h +++ b/include/smiLynxEM.h @@ -44,9 +44,9 @@ */ #define VIDEO_MODES 7 #define DUAL_800_600 0 /* SMI710:VGA1:75Hz (pitch=1600) */ - /* VGA2:60/120Hz (pitch=1600) */ - /* SMI810:VGA1:75Hz (pitch=1600) */ - /* VGA2:75Hz (pitch=1600) */ + /* VGA2:60/120Hz (pitch=1600) */ + /* SMI810:VGA1:75Hz (pitch=1600) */ + /* VGA2:75Hz (pitch=1600) */ #define DUAL_1024_768 1 /* VGA1:75Hz VGA2:73Hz (pitch=2048) */ #define SINGLE_800_600 2 /* VGA1:75Hz (pitch=800) */ #define SINGLE_1024_768 3 /* VGA1:75Hz (pitch=1024) */ diff --git a/include/spartan2.h b/include/spartan2.h index a04aaca..9725d4b 100644 --- a/include/spartan2.h +++ b/include/spartan2.h @@ -89,4 +89,3 @@ { Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie } #endif /* _SPARTAN2_H_ */ - diff --git a/include/spd_sdram.h b/include/spd_sdram.h index feb1bbd..4e754ec 100644 --- a/include/spd_sdram.h +++ b/include/spd_sdram.h @@ -3,4 +3,4 @@ long int spd_sdram(int(read_spd)(uint addr)); -#endif +#endif diff --git a/include/status_led.h b/include/status_led.h index e8ba9fd..47f7c35 100644 --- a/include/status_led.h +++ b/include/status_led.h @@ -258,8 +258,8 @@ /***** CMI ********************************************************/ #elif defined(CONFIG_CMI) -# define STATUS_LED_DIR im_mios.mios_mpiosm32ddr -# define STATUS_LED_DAT im_mios.mios_mpiosm32dr +# define STATUS_LED_DIR im_mios.mios_mpiosm32ddr +# define STATUS_LED_DAT im_mios.mios_mpiosm32dr # define STATUS_LED_BIT 0x2000 /* Select one of the 16 possible*/ /* MIOS outputs */ diff --git a/include/sym53c8xx.h b/include/sym53c8xx.h index 821e1f8..0734fe4 100644 --- a/include/sym53c8xx.h +++ b/include/sym53c8xx.h @@ -172,7 +172,7 @@ #define IRQM 0x08 /* mod: irq mode (1 = totem pole !) */ #define STD 0x04 /* cmd: start dma mode */ #define IRQD 0x02 /* mod: irq disable */ - #define NOCOM 0x01 /* cmd: protect sfbr while reselect */ + #define NOCOM 0x01 /* cmd: protect sfbr while reselect */ /* bits 0-1 rsvd for C1010 */ #define ADDER 0x3c @@ -231,8 +231,6 @@ #define SBDL 0x58 /* Lowlevel: data from scsi data */ - - /*----------------------------------------------------------- ** ** Utility macros for the script. @@ -356,8 +354,6 @@ #define SCR_ATN 0x00000008 - - /*----------------------------------------------------------- ** ** Memory to memory move @@ -408,13 +404,13 @@ #define SCR_REG_OFS(ofs) ((((ofs) & 0x7f) << 16ul)) /* + ((ofs) & 0x80)) */ #define SCR_SFBR_REG(reg,op,data) \ - (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) + (0x68000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) #define SCR_REG_SFBR(reg,op,data) \ - (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) + (0x70000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) #define SCR_REG_REG(reg,op,data) \ - (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) + (0x78000000 | (SCR_REG_OFS(REG(reg))) | (op) | (((data)&0xff)<<8ul)) #define SCR_LOAD 0x00000000 @@ -455,7 +451,7 @@ SCR_REG_REG(reg,SCR_LOAD,data) #define SCR_LOAD_SFBR(data) \ - (SCR_REG_SFBR (gpreg, SCR_LOAD, data)) + (SCR_REG_SFBR (gpreg, SCR_LOAD, data)) /*----------------------------------------------------------- ** @@ -480,10 +476,10 @@ #define SCR_DSA_REL2 0x10000000 #define SCR_LOAD_R(reg, how, n) \ - (0xe1000000 | how | (SCR_REG_OFS2(REG(reg))) | (n)) + (0xe1000000 | how | (SCR_REG_OFS2(REG(reg))) | (n)) #define SCR_STORE_R(reg, how, n) \ - (0xe0000000 | how | (SCR_REG_OFS2(REG(reg))) | (n)) + (0xe0000000 | how | (SCR_REG_OFS2(REG(reg))) | (n)) #define SCR_LOAD_ABS(reg, n) SCR_LOAD_R(reg, SCR_NO_FLUSH2, n) #define SCR_LOAD_REL(reg, n) SCR_LOAD_R(reg, SCR_NO_FLUSH2|SCR_DSA_REL2, n) @@ -554,7 +550,6 @@ #define CARRYSET (0x00200000) - #define SIR_COMPLETE 0x10000000 /* script errors */ #define SIR_SEL_ATN_NO_MSG_OUT 0x00000001 diff --git a/include/usb.h b/include/usb.h index c3cc890..edb6120 100644 --- a/include/usb.h +++ b/include/usb.h @@ -59,7 +59,6 @@ } __attribute__ ((packed)); - /* All standard descriptors have these 2 fields in common */ struct usb_descriptor_header { unsigned char bLength; @@ -141,7 +140,7 @@ int maxpacketsize; /* Maximum packet size; encoded as 0,1,2,3 = 8,16,32,64 */ unsigned int toggle[2]; /* one bit for each endpoint ([0] = IN, [1] = OUT) */ unsigned int halted[2]; /* endpoint halts; one bit per endpoint # & direction; */ - /* [0] = IN, [1] = OUT */ + /* [0] = IN, [1] = OUT */ int epmaxpacketin[16]; /* INput endpoint specific maximums */ int epmaxpacketout[16]; /* OUTput endpoint specific maximums */ diff --git a/include/usb_defs.h b/include/usb_defs.h index 00a31e9..33d1e46 100644 --- a/include/usb_defs.h +++ b/include/usb_defs.h @@ -189,7 +189,6 @@ #define USB_ST_NOT_PROC 0x80000000L /* Not yet processed */ - /************************************************************************* * Hub defines */ diff --git a/include/version.h b/include/version.h index 3f228c8..fee1b69 100644 --- a/include/version.h +++ b/include/version.h @@ -24,6 +24,6 @@ #ifndef __VERSION_H__ #define __VERSION_H__ -#define U_BOOT_VERSION "U-Boot 0.4.0" +#define U_BOOT_VERSION "U-Boot 0.4.1" #endif /* __VERSION_H__ */ diff --git a/include/video_ad7176.h b/include/video_ad7176.h index 88007ce..5b8b010 100644 --- a/include/video_ad7176.h +++ b/include/video_ad7176.h @@ -49,56 +49,56 @@ static unsigned char video_encoder_data[] = { #ifdef VIDEO_MODE_NTSC - 0x04, /* Mode Register 0 */ + 0x04, /* Mode Register 0 */ #ifdef VIDEO_DEBUG_COLORBARS 0x82, #else - 0x02, /* Mode Register 1 */ + 0x02, /* Mode Register 1 */ #endif - 0x16, /* Subcarrier Freq 0 */ - 0x7c, /* Subcarrier Freq 1 */ - 0xf0, /* Subcarrier Freq 2 */ - 0x21, /* Subcarrier Freq 3 */ - 0x00, /* Subcarrier phase */ - 0x02, /* Timing Register 0 */ - 0x00, /* Extended Captioning 0 */ - 0x00, /* Extended Captioning 1 */ - 0x00, /* Closed Captioning 0 */ - 0x00, /* Closed Captioning 1 */ - 0x00, /* Timing Register 1 */ - 0x08, /* Mode Register 2 */ - 0x00, /* Pedestal Register 0 */ - 0x00, /* Pedestal Register 1 */ - 0x00, /* Pedestal Register 2 */ - 0x00, /* Pedestal Register 3 */ - 0x00 /* Mode Register 3 */ + 0x16, /* Subcarrier Freq 0 */ + 0x7c, /* Subcarrier Freq 1 */ + 0xf0, /* Subcarrier Freq 2 */ + 0x21, /* Subcarrier Freq 3 */ + 0x00, /* Subcarrier phase */ + 0x02, /* Timing Register 0 */ + 0x00, /* Extended Captioning 0 */ + 0x00, /* Extended Captioning 1 */ + 0x00, /* Closed Captioning 0 */ + 0x00, /* Closed Captioning 1 */ + 0x00, /* Timing Register 1 */ + 0x08, /* Mode Register 2 */ + 0x00, /* Pedestal Register 0 */ + 0x00, /* Pedestal Register 1 */ + 0x00, /* Pedestal Register 2 */ + 0x00, /* Pedestal Register 3 */ + 0x00 /* Mode Register 3 */ #endif /* VIDEO_MODE_NTSC */ #ifdef VIDEO_MODE_PAL - 0x05, /* Mode Register 0 */ + 0x05, /* Mode Register 0 */ #ifdef VIDEO_DEBUG_COLORBARS 0x82, #else - 0x02, /* Mode Register 1 (2) */ + 0x02, /* Mode Register 1 (2) */ #endif - 0xcb, /* Subcarrier Freq 0 */ - 0x8a, /* Subcarrier Freq 1 */ - 0x09, /* Subcarrier Freq 2 */ - 0x2a, /* Subcarrier Freq 3 */ - 0x00, /* Subcarrier phase */ - 0x0a, /* Timing Register 0 (a) */ - 0x00, /* Extended Captioning 0 */ - 0x00, /* Extended Captioning 1 */ - 0x00, /* Closed Captioning 0 */ - 0x00, /* Closed Captioning 1 */ - 0x00, /* Timing Register 1 */ - 0x08, /* Mode Register 2 (8) */ - 0x00, /* Pedestal Register 0 */ - 0x00, /* Pedestal Register 1 */ - 0x00, /* Pedestal Register 2 */ - 0x00, /* Pedestal Register 3 */ - 0x00 /* Mode Register 3 */ + 0xcb, /* Subcarrier Freq 0 */ + 0x8a, /* Subcarrier Freq 1 */ + 0x09, /* Subcarrier Freq 2 */ + 0x2a, /* Subcarrier Freq 3 */ + 0x00, /* Subcarrier phase */ + 0x0a, /* Timing Register 0 (a) */ + 0x00, /* Extended Captioning 0 */ + 0x00, /* Extended Captioning 1 */ + 0x00, /* Closed Captioning 0 */ + 0x00, /* Closed Captioning 1 */ + 0x00, /* Timing Register 1 */ + 0x08, /* Mode Register 2 (8) */ + 0x00, /* Pedestal Register 0 */ + 0x00, /* Pedestal Register 1 */ + 0x00, /* Pedestal Register 2 */ + 0x00, /* Pedestal Register 3 */ + 0x00 /* Mode Register 3 */ #endif /* VIDEO_MODE_PAL */ } ; diff --git a/include/video_ad7177.h b/include/video_ad7177.h index 68a6b8d..3f35f33 100644 --- a/include/video_ad7177.h +++ b/include/video_ad7177.h @@ -52,95 +52,95 @@ static unsigned char video_encoder_data[] = { #ifdef VIDEO_MODE_NTSC - 0x04, /* Mode Register 0 */ + 0x04, /* Mode Register 0 */ #ifdef VIDEO_DEBUG_COLORBARS 0xc2, #else - 0x42, /* Mode Register 1 */ + 0x42, /* Mode Register 1 */ #endif - 0x16, /* Subcarrier Freq 0 */ - 0x7c, /* Subcarrier Freq 1 */ - 0xf0, /* Subcarrier Freq 2 */ - 0x21, /* Subcarrier Freq 3 */ - 0x00, /* Subcarrier phase */ - 0x02, /* Timing Register 0 */ - 0x00, /* Extended Captioning 0 */ - 0x00, /* Extended Captioning 1 */ - 0x00, /* Closed Captioning 0 */ - 0x00, /* Closed Captioning 1 */ - 0x00, /* Timing Register 1 */ - 0x08, /* Mode Register 2 */ - 0x00, /* Pedestal Register 0 */ - 0x00, /* Pedestal Register 1 */ - 0x00, /* Pedestal Register 2 */ - 0x00, /* Pedestal Register 3 */ - 0x08 /* Mode Register 3 */ + 0x16, /* Subcarrier Freq 0 */ + 0x7c, /* Subcarrier Freq 1 */ + 0xf0, /* Subcarrier Freq 2 */ + 0x21, /* Subcarrier Freq 3 */ + 0x00, /* Subcarrier phase */ + 0x02, /* Timing Register 0 */ + 0x00, /* Extended Captioning 0 */ + 0x00, /* Extended Captioning 1 */ + 0x00, /* Closed Captioning 0 */ + 0x00, /* Closed Captioning 1 */ + 0x00, /* Timing Register 1 */ + 0x08, /* Mode Register 2 */ + 0x00, /* Pedestal Register 0 */ + 0x00, /* Pedestal Register 1 */ + 0x00, /* Pedestal Register 2 */ + 0x00, /* Pedestal Register 3 */ + 0x08 /* Mode Register 3 */ #endif #ifdef VIDEO_MODE_PAL #ifdef VIDEO_MODE_RGB_OUT - 0x69, /* Mode Register 0 */ + 0x69, /* Mode Register 0 */ #ifdef VIDEO_DEBUG_COLORBARS 0xc0, /* Mode Register 1 (c0) */ #else 0x40, /* Mode Register 1 (c0) */ #endif - 0xcb, /* Subcarrier Freq 0 */ - 0x8a, /* Subcarrier Freq 1 */ - 0x09, /* Subcarrier Freq 2 */ - 0x2a, /* Subcarrier Freq 3 */ - 0x00, /* Subcarrier phase */ - 0x02, /* Timing Register 0 */ - 0x00, /* Extended Captioning 0 */ - 0x00, /* Extended Captioning 1 */ - 0x00, /* Closed Captioning 0 */ - 0x00, /* Closed Captioning 1 */ - 0x00, /* Timing Register 1 */ - 0x28, /* Mode Register 2 */ - 0x00, /* Pedestal Register 0 */ - 0x00, /* Pedestal Register 1 */ - 0x00, /* Pedestal Register 2 */ - 0x00, /* Pedestal Register 3 */ - 0x08 /* Mode Register 3 */ + 0xcb, /* Subcarrier Freq 0 */ + 0x8a, /* Subcarrier Freq 1 */ + 0x09, /* Subcarrier Freq 2 */ + 0x2a, /* Subcarrier Freq 3 */ + 0x00, /* Subcarrier phase */ + 0x02, /* Timing Register 0 */ + 0x00, /* Extended Captioning 0 */ + 0x00, /* Extended Captioning 1 */ + 0x00, /* Closed Captioning 0 */ + 0x00, /* Closed Captioning 1 */ + 0x00, /* Timing Register 1 */ + 0x28, /* Mode Register 2 */ + 0x00, /* Pedestal Register 0 */ + 0x00, /* Pedestal Register 1 */ + 0x00, /* Pedestal Register 2 */ + 0x00, /* Pedestal Register 3 */ + 0x08 /* Mode Register 3 */ #else - 0x09, /* Mode Register 0 (was 01) */ + 0x09, /* Mode Register 0 (was 01) */ #ifdef VIDEO_DEBUG_COLORBARS 0xd8, /* */ #else - 0x59, /* Mode Register 1 (was 58) */ + 0x59, /* Mode Register 1 (was 58) */ #endif - 0xcb, /* Subcarrier Freq 0 */ - 0x8a, /* Subcarrier Freq 1 */ - 0x09, /* Subcarrier Freq 2 */ - 0x2a, /* Subcarrier Freq 3 */ - 0x00, /* Subcarrier phase */ - 0x02, /* Timing Register 0 (was a) */ - 0x00, /* Extended Captioning 0 */ - 0x00, /* Extended Captioning 1 */ - 0x00, /* Closed Captioning 0 */ - 0x00, /* Closed Captioning 1 */ - 0x00, /* Timing Register 1 */ + 0xcb, /* Subcarrier Freq 0 */ + 0x8a, /* Subcarrier Freq 1 */ + 0x09, /* Subcarrier Freq 2 */ + 0x2a, /* Subcarrier Freq 3 */ + 0x00, /* Subcarrier phase */ + 0x02, /* Timing Register 0 (was a) */ + 0x00, /* Extended Captioning 0 */ + 0x00, /* Extended Captioning 1 */ + 0x00, /* Closed Captioning 0 */ + 0x00, /* Closed Captioning 1 */ + 0x00, /* Timing Register 1 */ #ifdef VIDEO_DEBUG_LOWPOWER #ifdef VIDEO_DEBUG_DISABLE_COLORS - 0x98, /* Mode Register 2 */ + 0x98, /* Mode Register 2 */ #else - 0x88, /* Mode Register 2 */ + 0x88, /* Mode Register 2 */ #endif #else #ifdef VIDEO_DEBUG_DISABLE_COLORS - 0x18, /* Mode Register 2 */ + 0x18, /* Mode Register 2 */ #else - 0x08, /* Mode Register 2 */ + 0x08, /* Mode Register 2 */ #endif #endif - 0x00, /* Pedestal Register 0 */ - 0x00, /* Pedestal Register 1 */ - 0x00, /* Pedestal Register 2 */ - 0x00, /* Pedestal Register 3 */ - 0x08 /* Mode Register 3 */ + 0x00, /* Pedestal Register 0 */ + 0x00, /* Pedestal Register 1 */ + 0x00, /* Pedestal Register 2 */ + 0x00, /* Pedestal Register 3 */ + 0x08 /* Mode Register 3 */ #endif #endif } ; diff --git a/include/video_fb.h b/include/video_fb.h index a9e4275..9825f0c 100644 --- a/include/video_fb.h +++ b/include/video_fb.h @@ -1,4 +1,4 @@ - /* + /* * (C) Copyright 1997-2002 ELTEC Elektronik AG * Frank Gottschling * diff --git a/include/watchdog.h b/include/watchdog.h index dc26e6a..b9ae916 100644 --- a/include/watchdog.h +++ b/include/watchdog.h @@ -98,4 +98,3 @@ #endif /* CONFIG_MPC8260 && !__ASSEMBLY__ */ #endif /* _WATCHDOG_H_ */ - diff --git a/include/zlib.h b/include/zlib.h index 6958ab8..e441494 100644 --- a/include/zlib.h +++ b/include/zlib.h @@ -93,7 +93,7 @@ #endif /* The memory requirements for deflate are (in bytes): - 1 << (windowBits+2) + 1 << (memLevel+9) + 1 << (windowBits+2) + 1 << (memLevel+9) that is: 128K for windowBits=15 + 128K for memLevel = 8 (default values) plus a few kilobytes for small objects. For example, if you want to reduce the default memory requirements from 256K to 128K, compile with @@ -105,7 +105,7 @@ for small objects. */ - /* Type declarations */ + /* Type declarations */ #ifndef OF /* function prototypes */ # ifdef STDC @@ -214,7 +214,7 @@ a single step). */ - /* constants */ + /* constants */ #define Z_NO_FLUSH 0 #define Z_PARTIAL_FLUSH 1 @@ -255,7 +255,7 @@ not compatible with the zlib.h header file used by the application. */ - /* basic functions */ + /* basic functions */ extern int inflateInit OF((z_stream *strm)); /* @@ -333,10 +333,10 @@ static string (which must not be deallocated). */ - /* advanced functions */ + /* advanced functions */ extern int inflateInit2 OF((z_stream *strm, - int windowBits)); + int windowBits)); /* This is another version of inflateInit with more compression options. The fields next_out, zalloc and zfree must be initialized before by the caller. @@ -402,7 +402,7 @@ containing the data at next_in (except that the data is not output). */ - /* checksum functions */ + /* checksum functions */ /* This function is not related to compression but is exported diff --git a/lib_arm/armlinux.c b/lib_arm/armlinux.c index 0305803..8e06bd6 100644 --- a/lib_arm/armlinux.c +++ b/lib_arm/armlinux.c @@ -23,7 +23,6 @@ #include #include -#include #include #include #include @@ -35,6 +34,9 @@ #define tag_size(type) ((sizeof(struct tag_header) + sizeof(struct type)) >> 2) #define tag_next(t) ((struct tag *)((u32 *)(t) + (t)->hdr.size)) +/*cmd_boot.c*/ +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + #if defined (CONFIG_SETUP_MEMORY_TAGS) || \ defined (CONFIG_CMDLINE_TAG) || \ defined (CONFIG_INITRD_TAG) || \ @@ -101,7 +103,7 @@ if (addr_dataflash(addr)){ read_dataflash(addr, sizeof(image_header_t), (char *)&header); } else -#endif +#endif memcpy (&header, (char *)addr, sizeof(image_header_t)); if (ntohl(hdr->ih_magic) != IH_MAGIC) { @@ -143,7 +145,7 @@ csum = crc32 (0, (char *)data, len); if (csum != ntohl(hdr->ih_dcrc)) { printf ("Bad Data CRC\n"); - SHOW_BOOT_PROGRESS (-12); + SHOW_BOOT_PROGRESS (-12); do_reset (cmdtp, flag, argc, argv); } printf ("OK\n"); @@ -185,7 +187,7 @@ /* * no initrd image */ - SHOW_BOOT_PROGRESS (14); + SHOW_BOOT_PROGRESS (14); data = 0; } diff --git a/lib_generic/ldiv.c b/lib_generic/ldiv.c index 437b160..5d231a2 100644 --- a/lib_generic/ldiv.c +++ b/lib_generic/ldiv.c @@ -17,8 +17,8 @@ Boston, MA 02111-1307, USA. */ typedef struct { - long quot; - long rem; + long quot; + long rem; } ldiv_t; /* Return the `ldiv_t' representation of NUMER over DENOM. */ ldiv_t diff --git a/lib_generic/string.c b/lib_generic/string.c index f4d2457..d06a645 100644 --- a/lib_generic/string.c +++ b/lib_generic/string.c @@ -207,8 +207,8 @@ { const char *p = s + strlen(s); do { - if (*p == (char)c) - return (char *)p; + if (*p == (char)c) + return (char *)p; } while (--p >= s); return NULL; } @@ -498,7 +498,7 @@ p++; size--; } - return (void *) p; + return (void *) p; } #endif @@ -540,7 +540,7 @@ { const unsigned char *p = s; while (n-- != 0) { - if ((unsigned char)c == *p++) { + if ((unsigned char)c == *p++) { return (void *)(p-1); } } diff --git a/lib_generic/vsprintf.c b/lib_generic/vsprintf.c index b9e6e1b..6b04453 100644 --- a/lib_generic/vsprintf.c +++ b/lib_generic/vsprintf.c @@ -17,7 +17,8 @@ #include #if !defined (CONFIG_PANIC_HANG) #include -#include /* for do_reset() prototype */ +/*cmd_boot.c*/ +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); #endif unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base) diff --git a/lib_generic/zlib.c b/lib_generic/zlib.c index 3b7ab25..668ac8f 100644 --- a/lib_generic/zlib.c +++ b/lib_generic/zlib.c @@ -51,7 +51,7 @@ #define NULL ((void *) 0) #endif - /* common constants */ + /* common constants */ #define DEFLATED 8 @@ -76,7 +76,7 @@ #define MAX_MATCH 258 /* The minimum and maximum match lengths */ - /* functions */ + /* functions */ #include #define zmemcpy memcpy @@ -110,7 +110,7 @@ /* void zcfree OF((voidpf opaque, voidpf ptr)); */ #define ZALLOC(strm, items, size) \ - (*((strm)->zalloc))((strm)->opaque, (items), (size)) + (*((strm)->zalloc))((strm)->opaque, (items), (size)) #define ZFREE(strm, addr, size) \ (*((strm)->zfree))((strm)->opaque, (voidpf)(addr), (size)) #define TRY_FREE(s, p, n) {if (p) ZFREE(s, p, n);} @@ -402,34 +402,34 @@ NEEDBYTE if (((z->state->sub.method = NEXTBYTE) & 0xf) != DEFLATED) { - z->state->mode = BAD; - z->msg = "unknown compression method"; - z->state->sub.marker = 5; /* can't try inflateSync */ - break; + z->state->mode = BAD; + z->msg = "unknown compression method"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; } if ((z->state->sub.method >> 4) + 8 > z->state->wbits) { - z->state->mode = BAD; - z->msg = "invalid window size"; - z->state->sub.marker = 5; /* can't try inflateSync */ - break; + z->state->mode = BAD; + z->msg = "invalid window size"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; } z->state->mode = FLAG; case FLAG: NEEDBYTE if ((b = NEXTBYTE) & 0x20) { - z->state->mode = BAD; - z->msg = "invalid reserved bit"; - z->state->sub.marker = 5; /* can't try inflateSync */ - break; + z->state->mode = BAD; + z->msg = "invalid reserved bit"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; } if (((z->state->sub.method << 8) + b) % 31) { - z->state->mode = BAD; - z->msg = "incorrect header check"; - z->state->sub.marker = 5; /* can't try inflateSync */ - break; + z->state->mode = BAD; + z->msg = "incorrect header check"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; } Trace((stderr, "inflate: zlib header ok\n")); z->state->mode = BLOCKS; @@ -439,18 +439,18 @@ r = inflate_packet_flush(z->state->blocks); if (r == Z_DATA_ERROR) { - z->state->mode = BAD; - z->state->sub.marker = 0; /* can try inflateSync */ - break; + z->state->mode = BAD; + z->state->sub.marker = 0; /* can try inflateSync */ + break; } if (r != Z_STREAM_END) - return r; + return r; r = Z_OK; inflate_blocks_reset(z->state->blocks, z, &z->state->sub.check.was); if (z->state->nowrap) { - z->state->mode = DONE; - break; + z->state->mode = DONE; + break; } z->state->mode = CHECK4; case CHECK4: @@ -471,10 +471,10 @@ if (z->state->sub.check.was != z->state->sub.check.need) { - z->state->mode = BAD; - z->msg = "incorrect data check"; - z->state->sub.marker = 5; /* can't try inflateSync */ - break; + z->state->mode = BAD; + z->msg = "incorrect data check"; + z->state->sub.marker = 5; /* can't try inflateSync */ + break; } Trace((stderr, "inflate: zlib check ok\n")); z->state->mode = DONE; @@ -606,7 +606,7 @@ struct { inflate_huft *tl, *td; /* trees to free */ inflate_codes_statef - *codes; + *codes; } decode; /* if CODES, current state */ } sub; /* submode */ uInt last; /* true if this block is the last block */ @@ -695,7 +695,7 @@ /* Table for deflate from PKZIP's appnote.txt. */ local uInt border[] = { /* Order of the bit length code lengths */ - 16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15}; + 16, 17, 18, 0, 8, 7, 9, 6, 10, 5, 11, 4, 12, 3, 13, 2, 14, 1, 15}; /* Notes beyond the 1.93a appnote.txt: @@ -819,56 +819,56 @@ s->last = t & 1; switch (t >> 1) { - case 0: /* stored */ - Trace((stderr, "inflate: stored block%s\n", - s->last ? " (last)" : "")); - DUMPBITS(3) - t = k & 7; /* go to byte boundary */ - DUMPBITS(t) - s->mode = LENS; /* get length of stored block */ - break; - case 1: /* fixed */ - Trace((stderr, "inflate: fixed codes block%s\n", - s->last ? " (last)" : "")); - { - uInt bl, bd; - inflate_huft *tl, *td; + case 0: /* stored */ + Trace((stderr, "inflate: stored block%s\n", + s->last ? " (last)" : "")); + DUMPBITS(3) + t = k & 7; /* go to byte boundary */ + DUMPBITS(t) + s->mode = LENS; /* get length of stored block */ + break; + case 1: /* fixed */ + Trace((stderr, "inflate: fixed codes block%s\n", + s->last ? " (last)" : "")); + { + uInt bl, bd; + inflate_huft *tl, *td; - inflate_trees_fixed(&bl, &bd, &tl, &td); - s->sub.decode.codes = inflate_codes_new(bl, bd, tl, td, z); - if (s->sub.decode.codes == Z_NULL) - { - r = Z_MEM_ERROR; - LEAVE - } - s->sub.decode.tl = Z_NULL; /* don't try to free these */ - s->sub.decode.td = Z_NULL; - } - DUMPBITS(3) - s->mode = CODES; - break; - case 2: /* dynamic */ - Trace((stderr, "inflate: dynamic codes block%s\n", - s->last ? " (last)" : "")); - DUMPBITS(3) - s->mode = TABLE; - break; - case 3: /* illegal */ - DUMPBITS(3) - s->mode = BADB; - z->msg = "invalid block type"; - r = Z_DATA_ERROR; - LEAVE + inflate_trees_fixed(&bl, &bd, &tl, &td); + s->sub.decode.codes = inflate_codes_new(bl, bd, tl, td, z); + if (s->sub.decode.codes == Z_NULL) + { + r = Z_MEM_ERROR; + LEAVE + } + s->sub.decode.tl = Z_NULL; /* don't try to free these */ + s->sub.decode.td = Z_NULL; + } + DUMPBITS(3) + s->mode = CODES; + break; + case 2: /* dynamic */ + Trace((stderr, "inflate: dynamic codes block%s\n", + s->last ? " (last)" : "")); + DUMPBITS(3) + s->mode = TABLE; + break; + case 3: /* illegal */ + DUMPBITS(3) + s->mode = BADB; + z->msg = "invalid block type"; + r = Z_DATA_ERROR; + LEAVE } break; case LENS: NEEDBITS(32) if (((~b) >> 16) != (b & 0xffff)) { - s->mode = BADB; - z->msg = "invalid stored block lengths"; - r = Z_DATA_ERROR; - LEAVE + s->mode = BADB; + z->msg = "invalid stored block lengths"; + r = Z_DATA_ERROR; + LEAVE } s->sub.left = (uInt)b & 0xffff; b = k = 0; /* dump bits */ @@ -877,7 +877,7 @@ break; case STORED: if (n == 0) - LEAVE + LEAVE NEEDOUT t = s->sub.left; if (t > n) t = n; @@ -886,10 +886,10 @@ p += t; n -= t; q += t; m -= t; if ((s->sub.left -= t) != 0) - break; + break; Tracev((stderr, "inflate: stored end, %lu total out\n", - z->total_out + (q >= s->read ? q - s->read : - (s->end - s->read) + (q - s->window)))); + z->total_out + (q >= s->read ? q - s->read : + (s->end - s->read) + (q - s->window)))); s->mode = s->last ? DRY : TYPE; break; case TABLE: @@ -898,19 +898,19 @@ #ifndef PKZIP_BUG_WORKAROUND if ((t & 0x1f) > 29 || ((t >> 5) & 0x1f) > 29) { - s->mode = BADB; - z->msg = "too many length or distance symbols"; - r = Z_DATA_ERROR; - LEAVE + s->mode = BADB; + z->msg = "too many length or distance symbols"; + r = Z_DATA_ERROR; + LEAVE } #endif t = 258 + (t & 0x1f) + ((t >> 5) & 0x1f); if (t < 19) - t = 19; + t = 19; if ((s->sub.trees.blens = (uIntf*)ZALLOC(z, t, sizeof(uInt))) == Z_NULL) { - r = Z_MEM_ERROR; - LEAVE + r = Z_MEM_ERROR; + LEAVE } s->sub.trees.nblens = t; DUMPBITS(14) @@ -920,129 +920,129 @@ case BTREE: while (s->sub.trees.index < 4 + (s->sub.trees.table >> 10)) { - NEEDBITS(3) - s->sub.trees.blens[border[s->sub.trees.index++]] = (uInt)b & 7; - DUMPBITS(3) + NEEDBITS(3) + s->sub.trees.blens[border[s->sub.trees.index++]] = (uInt)b & 7; + DUMPBITS(3) } while (s->sub.trees.index < 19) - s->sub.trees.blens[border[s->sub.trees.index++]] = 0; + s->sub.trees.blens[border[s->sub.trees.index++]] = 0; s->sub.trees.bb = 7; t = inflate_trees_bits(s->sub.trees.blens, &s->sub.trees.bb, - &s->sub.trees.tb, z); + &s->sub.trees.tb, z); if (t != Z_OK) { - r = t; - if (r == Z_DATA_ERROR) - s->mode = BADB; - LEAVE + r = t; + if (r == Z_DATA_ERROR) + s->mode = BADB; + LEAVE } s->sub.trees.index = 0; Tracev((stderr, "inflate: bits tree ok\n")); s->mode = DTREE; case DTREE: while (t = s->sub.trees.table, - s->sub.trees.index < 258 + (t & 0x1f) + ((t >> 5) & 0x1f)) + s->sub.trees.index < 258 + (t & 0x1f) + ((t >> 5) & 0x1f)) { - inflate_huft *h; - uInt i, j, c; + inflate_huft *h; + uInt i, j, c; - t = s->sub.trees.bb; - NEEDBITS(t) - h = s->sub.trees.tb + ((uInt)b & inflate_mask[t]); - t = h->word.what.Bits; - c = h->more.Base; - if (c < 16) - { - DUMPBITS(t) - s->sub.trees.blens[s->sub.trees.index++] = c; - } - else /* c == 16..18 */ - { - i = c == 18 ? 7 : c - 14; - j = c == 18 ? 11 : 3; - NEEDBITS(t + i) - DUMPBITS(t) - j += (uInt)b & inflate_mask[i]; - DUMPBITS(i) - i = s->sub.trees.index; - t = s->sub.trees.table; - if (i + j > 258 + (t & 0x1f) + ((t >> 5) & 0x1f) || - (c == 16 && i < 1)) - { - s->mode = BADB; - z->msg = "invalid bit length repeat"; - r = Z_DATA_ERROR; - LEAVE - } - c = c == 16 ? s->sub.trees.blens[i - 1] : 0; - do { - s->sub.trees.blens[i++] = c; - } while (--j); - s->sub.trees.index = i; - } + t = s->sub.trees.bb; + NEEDBITS(t) + h = s->sub.trees.tb + ((uInt)b & inflate_mask[t]); + t = h->word.what.Bits; + c = h->more.Base; + if (c < 16) + { + DUMPBITS(t) + s->sub.trees.blens[s->sub.trees.index++] = c; + } + else /* c == 16..18 */ + { + i = c == 18 ? 7 : c - 14; + j = c == 18 ? 11 : 3; + NEEDBITS(t + i) + DUMPBITS(t) + j += (uInt)b & inflate_mask[i]; + DUMPBITS(i) + i = s->sub.trees.index; + t = s->sub.trees.table; + if (i + j > 258 + (t & 0x1f) + ((t >> 5) & 0x1f) || + (c == 16 && i < 1)) + { + s->mode = BADB; + z->msg = "invalid bit length repeat"; + r = Z_DATA_ERROR; + LEAVE + } + c = c == 16 ? s->sub.trees.blens[i - 1] : 0; + do { + s->sub.trees.blens[i++] = c; + } while (--j); + s->sub.trees.index = i; + } } inflate_trees_free(s->sub.trees.tb, z); s->sub.trees.tb = Z_NULL; { - uInt bl, bd; - inflate_huft *tl, *td; - inflate_codes_statef *c; + uInt bl, bd; + inflate_huft *tl, *td; + inflate_codes_statef *c; - bl = 9; /* must be <= 9 for lookahead assumptions */ - bd = 6; /* must be <= 9 for lookahead assumptions */ - t = s->sub.trees.table; - t = inflate_trees_dynamic(257 + (t & 0x1f), 1 + ((t >> 5) & 0x1f), - s->sub.trees.blens, &bl, &bd, &tl, &td, z); - if (t != Z_OK) - { - if (t == (uInt)Z_DATA_ERROR) - s->mode = BADB; - r = t; - LEAVE - } - Tracev((stderr, "inflate: trees ok\n")); - if ((c = inflate_codes_new(bl, bd, tl, td, z)) == Z_NULL) - { - inflate_trees_free(td, z); - inflate_trees_free(tl, z); - r = Z_MEM_ERROR; - LEAVE - } - ZFREE(z, s->sub.trees.blens, s->sub.trees.nblens * sizeof(uInt)); - s->sub.decode.codes = c; - s->sub.decode.tl = tl; - s->sub.decode.td = td; + bl = 9; /* must be <= 9 for lookahead assumptions */ + bd = 6; /* must be <= 9 for lookahead assumptions */ + t = s->sub.trees.table; + t = inflate_trees_dynamic(257 + (t & 0x1f), 1 + ((t >> 5) & 0x1f), + s->sub.trees.blens, &bl, &bd, &tl, &td, z); + if (t != Z_OK) + { + if (t == (uInt)Z_DATA_ERROR) + s->mode = BADB; + r = t; + LEAVE + } + Tracev((stderr, "inflate: trees ok\n")); + if ((c = inflate_codes_new(bl, bd, tl, td, z)) == Z_NULL) + { + inflate_trees_free(td, z); + inflate_trees_free(tl, z); + r = Z_MEM_ERROR; + LEAVE + } + ZFREE(z, s->sub.trees.blens, s->sub.trees.nblens * sizeof(uInt)); + s->sub.decode.codes = c; + s->sub.decode.tl = tl; + s->sub.decode.td = td; } s->mode = CODES; case CODES: UPDATE if ((r = inflate_codes(s, z, r)) != Z_STREAM_END) - return inflate_flush(s, z, r); + return inflate_flush(s, z, r); r = Z_OK; inflate_codes_free(s->sub.decode.codes, z); inflate_trees_free(s->sub.decode.td, z); inflate_trees_free(s->sub.decode.tl, z); LOAD Tracev((stderr, "inflate: codes end, %lu total out\n", - z->total_out + (q >= s->read ? q - s->read : - (s->end - s->read) + (q - s->window)))); + z->total_out + (q >= s->read ? q - s->read : + (s->end - s->read) + (q - s->window)))); if (!s->last) { - s->mode = TYPE; - break; + s->mode = TYPE; + break; } if (k > 7) /* return unused byte, if any */ { - Assert(k < 16, "inflate_codes grabbed too many bytes") - k -= 8; - n++; - p--; /* can always return one */ + Assert(k < 16, "inflate_codes grabbed too many bytes") + k -= 8; + n++; + p--; /* can always return one */ } s->mode = DRY; case DRY: FLUSH if (s->read != s->write) - LEAVE + LEAVE s->mode = DONEB; case DONEB: r = Z_STREAM_END; @@ -1175,20 +1175,20 @@ /* Tables for deflate from PKZIP's appnote.txt. */ local uInt cplens[] = { /* Copy lengths for literal codes 257..285 */ - 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31, - 35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0}; - /* actually lengths - 2; also see note #13 above about 258 */ + 3, 4, 5, 6, 7, 8, 9, 10, 11, 13, 15, 17, 19, 23, 27, 31, + 35, 43, 51, 59, 67, 83, 99, 115, 131, 163, 195, 227, 258, 0, 0}; + /* actually lengths - 2; also see note #13 above about 258 */ local uInt cplext[] = { /* Extra bits for literal codes 257..285 */ - 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, - 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0, 192, 192}; /* 192==invalid */ + 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 1, 2, 2, 2, 2, + 3, 3, 3, 3, 4, 4, 4, 4, 5, 5, 5, 5, 0, 192, 192}; /* 192==invalid */ local uInt cpdist[] = { /* Copy offsets for distance codes 0..29 */ - 1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193, - 257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145, - 8193, 12289, 16385, 24577}; + 1, 2, 3, 4, 5, 7, 9, 13, 17, 25, 33, 49, 65, 97, 129, 193, + 257, 385, 513, 769, 1025, 1537, 2049, 3073, 4097, 6145, + 8193, 12289, 16385, 24577}; local uInt cpdext[] = { /* Extra bits for distance codes */ - 0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, - 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, - 12, 12, 13, 13}; + 0, 0, 0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, + 7, 7, 8, 8, 9, 9, 10, 10, 11, 11, + 12, 12, 13, 13}; /* Huffman code decoding is performed using a multi-level table lookup. @@ -1347,83 +1347,83 @@ /* make tables up to required level */ while (k > w + l) { - h++; - w += l; /* previous table always l bits */ + h++; + w += l; /* previous table always l bits */ - /* compute minimum size table less than or equal to l bits */ - z = (z = g - w) > (uInt)l ? l : z; /* table size upper limit */ - if ((f = 1 << (j = k - w)) > a + 1) /* try a k-w bit table */ - { /* too few codes for k-w bit table */ - f -= a + 1; /* deduct codes from patterns left */ - xp = c + k; - if (j < z) - while (++j < z) /* try smaller tables up to z bits */ - { - if ((f <<= 1) <= *++xp) - break; /* enough codes to use up j bits */ - f -= *xp; /* else deduct codes from patterns */ - } - } - z = 1 << j; /* table entries for j-bit table */ + /* compute minimum size table less than or equal to l bits */ + z = (z = g - w) > (uInt)l ? l : z; /* table size upper limit */ + if ((f = 1 << (j = k - w)) > a + 1) /* try a k-w bit table */ + { /* too few codes for k-w bit table */ + f -= a + 1; /* deduct codes from patterns left */ + xp = c + k; + if (j < z) + while (++j < z) /* try smaller tables up to z bits */ + { + if ((f <<= 1) <= *++xp) + break; /* enough codes to use up j bits */ + f -= *xp; /* else deduct codes from patterns */ + } + } + z = 1 << j; /* table entries for j-bit table */ - /* allocate and link in new table */ - if ((q = (inflate_huft *)ZALLOC - (zs,z + 1,sizeof(inflate_huft))) == Z_NULL) - { - if (h) - inflate_trees_free(u[0], zs); - return Z_MEM_ERROR; /* not enough memory */ - } + /* allocate and link in new table */ + if ((q = (inflate_huft *)ZALLOC + (zs,z + 1,sizeof(inflate_huft))) == Z_NULL) + { + if (h) + inflate_trees_free(u[0], zs); + return Z_MEM_ERROR; /* not enough memory */ + } q->word.Nalloc = z + 1; #ifdef DEBUG_ZLIB - inflate_hufts += z + 1; + inflate_hufts += z + 1; #endif - *t = q + 1; /* link to list for huft_free() */ - *(t = &(q->next)) = Z_NULL; - u[h] = ++q; /* table starts after link */ + *t = q + 1; /* link to list for huft_free() */ + *(t = &(q->next)) = Z_NULL; + u[h] = ++q; /* table starts after link */ - /* connect to last table, if there is one */ - if (h) - { - x[h] = i; /* save pattern for backing up */ - r.bits = (Byte)l; /* bits to dump before this table */ - r.exop = (Byte)j; /* bits in this table */ - r.next = q; /* pointer to this table */ - j = i >> (w - l); /* (get around Turbo C bug) */ - u[h-1][j] = r; /* connect to last table */ - } + /* connect to last table, if there is one */ + if (h) + { + x[h] = i; /* save pattern for backing up */ + r.bits = (Byte)l; /* bits to dump before this table */ + r.exop = (Byte)j; /* bits in this table */ + r.next = q; /* pointer to this table */ + j = i >> (w - l); /* (get around Turbo C bug) */ + u[h-1][j] = r; /* connect to last table */ + } } /* set up table entry in r */ r.bits = (Byte)(k - w); if (p >= v + n) - r.exop = 128 + 64; /* out of values--invalid code */ + r.exop = 128 + 64; /* out of values--invalid code */ else if (*p < s) { - r.exop = (Byte)(*p < 256 ? 0 : 32 + 64); /* 256 is end-of-block */ - r.base = *p++; /* simple code is just the value */ + r.exop = (Byte)(*p < 256 ? 0 : 32 + 64); /* 256 is end-of-block */ + r.base = *p++; /* simple code is just the value */ } else { - r.exop = (Byte)e[*p - s] + 16 + 64; /* non-simple--look up in lists */ - r.base = d[*p++ - s]; + r.exop = (Byte)e[*p - s] + 16 + 64; /* non-simple--look up in lists */ + r.base = d[*p++ - s]; } /* fill code-like entries with r */ f = 1 << (k - w); for (j = i >> w; j < z; j += f) - q[j] = r; + q[j] = r; /* backwards increment the k-bit code i */ for (j = 1 << (k - 1); i & j; j >>= 1) - i ^= j; + i ^= j; i ^= j; /* backup over finished tables */ while ((i & ((1 << w) - 1)) != x[h]) { - h--; /* don't need to update q */ - w -= l; + h--; /* don't need to update q */ + w -= l; } } } @@ -1523,7 +1523,7 @@ uInt s; /* size of item */ { Assert(s == sizeof(inflate_huft) && n <= fixed_left, - "inflate_trees falloc overflow"); + "inflate_trees falloc overflow"); if (q) s++; /* to make some compilers happy */ fixed_left -= n; return (voidpf)(fixed_mem + fixed_left); @@ -1710,14 +1710,14 @@ #ifndef SLOW if (m >= 258 && n >= 10) { - UPDATE - r = inflate_fast(c->lbits, c->dbits, c->ltree, c->dtree, s, z); - LOAD - if (r != Z_OK) - { - c->mode = r == Z_STREAM_END ? WASH : BADCODE; - break; - } + UPDATE + r = inflate_fast(c->lbits, c->dbits, c->ltree, c->dtree, s, z); + LOAD + if (r != Z_OK) + { + c->mode = r == Z_STREAM_END ? WASH : BADCODE; + break; + } } #endif /* !SLOW */ c->sub.code.need = c->lbits; @@ -1731,31 +1731,31 @@ e = (uInt)(t->exop); if (e == 0) /* literal */ { - c->sub.lit = t->base; - Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ? - "inflate: literal '%c'\n" : - "inflate: literal 0x%02x\n", t->base)); - c->mode = LIT; - break; + c->sub.lit = t->base; + Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ? + "inflate: literal '%c'\n" : + "inflate: literal 0x%02x\n", t->base)); + c->mode = LIT; + break; } if (e & 16) /* length */ { - c->sub.copy.get = e & 15; - c->len = t->base; - c->mode = LENEXT; - break; + c->sub.copy.get = e & 15; + c->len = t->base; + c->mode = LENEXT; + break; } if ((e & 64) == 0) /* next table */ { - c->sub.code.need = e; - c->sub.code.tree = t->next; - break; + c->sub.code.need = e; + c->sub.code.tree = t->next; + break; } if (e & 32) /* end of block */ { - Tracevv((stderr, "inflate: end of block\n")); - c->mode = WASH; - break; + Tracevv((stderr, "inflate: end of block\n")); + c->mode = WASH; + break; } c->mode = BADCODE; /* invalid code */ z->msg = "invalid literal/length code"; @@ -1778,16 +1778,16 @@ e = (uInt)(t->exop); if (e & 16) /* distance */ { - c->sub.copy.get = e & 15; - c->sub.copy.dist = t->base; - c->mode = DISTEXT; - break; + c->sub.copy.get = e & 15; + c->sub.copy.dist = t->base; + c->mode = DISTEXT; + break; } if ((e & 64) == 0) /* next table */ { - c->sub.code.need = e; - c->sub.code.tree = t->next; - break; + c->sub.code.need = e; + c->sub.code.tree = t->next; + break; } c->mode = BADCODE; /* invalid code */ z->msg = "invalid distance code"; @@ -1803,20 +1803,20 @@ case COPY: /* o: copying bytes in window, waiting for space */ #ifndef __TURBOC__ /* Turbo C bug for following expression */ f = (uInt)(q - s->window) < c->sub.copy.dist ? - s->end - (c->sub.copy.dist - (q - s->window)) : - q - c->sub.copy.dist; + s->end - (c->sub.copy.dist - (q - s->window)) : + q - c->sub.copy.dist; #else f = q - c->sub.copy.dist; if ((uInt)(q - s->window) < c->sub.copy.dist) - f = s->end - (c->sub.copy.dist - (q - s->window)); + f = s->end - (c->sub.copy.dist - (q - s->window)); #endif while (c->len) { - NEEDOUT - OUTBYTE(*f++) - if (f == s->end) - f = s->window; - c->len--; + NEEDOUT + OUTBYTE(*f++) + if (f == s->end) + f = s->window; + c->len--; } c->mode = START; break; @@ -1828,7 +1828,7 @@ case WASH: /* o: got eob, possibly more output */ FLUSH if (s->read != s->write) - LEAVE + LEAVE c->mode = END; case END: r = Z_STREAM_END; @@ -1988,8 +1988,8 @@ { DUMPBITS(t->bits) Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ? - "inflate: * literal '%c'\n" : - "inflate: * literal 0x%02x\n", t->base)); + "inflate: * literal '%c'\n" : + "inflate: * literal 0x%02x\n", t->base)); *q++ = (Byte)t->base; m--; continue; @@ -1998,90 +1998,90 @@ DUMPBITS(t->bits) if (e & 16) { - /* get extra bits for length */ - e &= 15; - c = t->base + ((uInt)b & inflate_mask[e]); - DUMPBITS(e) - Tracevv((stderr, "inflate: * length %u\n", c)); + /* get extra bits for length */ + e &= 15; + c = t->base + ((uInt)b & inflate_mask[e]); + DUMPBITS(e) + Tracevv((stderr, "inflate: * length %u\n", c)); - /* decode distance base of block to copy */ - GRABBITS(15); /* max bits for distance code */ - e = (t = td + ((uInt)b & md))->exop; - do { - DUMPBITS(t->bits) - if (e & 16) - { - /* get extra bits to add to distance base */ - e &= 15; - GRABBITS(e) /* get extra bits (up to 13) */ - d = t->base + ((uInt)b & inflate_mask[e]); - DUMPBITS(e) - Tracevv((stderr, "inflate: * distance %u\n", d)); + /* decode distance base of block to copy */ + GRABBITS(15); /* max bits for distance code */ + e = (t = td + ((uInt)b & md))->exop; + do { + DUMPBITS(t->bits) + if (e & 16) + { + /* get extra bits to add to distance base */ + e &= 15; + GRABBITS(e) /* get extra bits (up to 13) */ + d = t->base + ((uInt)b & inflate_mask[e]); + DUMPBITS(e) + Tracevv((stderr, "inflate: * distance %u\n", d)); - /* do the copy */ - m -= c; - if ((uInt)(q - s->window) >= d) /* offset before dest */ - { /* just copy */ - r = q - d; - *q++ = *r++; c--; /* minimum count is three, */ - *q++ = *r++; c--; /* so unroll loop a little */ - } - else /* else offset after destination */ - { - e = d - (q - s->window); /* bytes from offset to end */ - r = s->end - e; /* pointer to offset */ - if (c > e) /* if source crosses, */ - { - c -= e; /* copy to end of window */ - do { - *q++ = *r++; - } while (--e); - r = s->window; /* copy rest from start of window */ - } - } - do { /* copy all or what's left */ - *q++ = *r++; - } while (--c); - break; - } - else if ((e & 64) == 0) - e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop; - else - { - z->msg = "invalid distance code"; - UNGRAB - UPDATE - return Z_DATA_ERROR; - } - } while (1); - break; + /* do the copy */ + m -= c; + if ((uInt)(q - s->window) >= d) /* offset before dest */ + { /* just copy */ + r = q - d; + *q++ = *r++; c--; /* minimum count is three, */ + *q++ = *r++; c--; /* so unroll loop a little */ + } + else /* else offset after destination */ + { + e = d - (q - s->window); /* bytes from offset to end */ + r = s->end - e; /* pointer to offset */ + if (c > e) /* if source crosses, */ + { + c -= e; /* copy to end of window */ + do { + *q++ = *r++; + } while (--e); + r = s->window; /* copy rest from start of window */ + } + } + do { /* copy all or what's left */ + *q++ = *r++; + } while (--c); + break; + } + else if ((e & 64) == 0) + e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop; + else + { + z->msg = "invalid distance code"; + UNGRAB + UPDATE + return Z_DATA_ERROR; + } + } while (1); + break; } if ((e & 64) == 0) { - if ((e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop) == 0) - { - DUMPBITS(t->bits) - Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ? - "inflate: * literal '%c'\n" : - "inflate: * literal 0x%02x\n", t->base)); - *q++ = (Byte)t->base; - m--; - break; - } + if ((e = (t = t->next + ((uInt)b & inflate_mask[e]))->exop) == 0) + { + DUMPBITS(t->bits) + Tracevv((stderr, t->base >= 0x20 && t->base < 0x7f ? + "inflate: * literal '%c'\n" : + "inflate: * literal 0x%02x\n", t->base)); + *q++ = (Byte)t->base; + m--; + break; + } } else if (e & 32) { - Tracevv((stderr, "inflate: * end of block\n")); - UNGRAB - UPDATE - return Z_STREAM_END; + Tracevv((stderr, "inflate: * end of block\n")); + UNGRAB + UPDATE + return Z_STREAM_END; } else { - z->msg = "invalid literal/length code"; - UNGRAB - UPDATE - return Z_DATA_ERROR; + z->msg = "invalid literal/length code"; + UNGRAB + UPDATE + return Z_DATA_ERROR; } } while (1); } while (m >= 258 && n >= 10); @@ -2145,17 +2145,17 @@ if (buf == Z_NULL) return 1L; while (len > 0) { - k = len < NMAX ? len : NMAX; - len -= k; - while (k >= 16) { - DO16(buf); - k -= 16; - } - if (k != 0) do { - DO1(buf); - } while (--k); - s1 %= BASE; - s2 %= BASE; + k = len < NMAX ? len : NMAX; + len -= k; + while (k >= 16) { + DO16(buf); + k -= 16; + } + if (k != 0) do { + DO1(buf); + } while (--k); + s1 %= BASE; + s2 %= BASE; } return (s2 << 16) | s1; } diff --git a/lib_i386/Makefile b/lib_i386/Makefile index 47c5d2c..e5925e5 100644 --- a/lib_i386/Makefile +++ b/lib_i386/Makefile @@ -25,11 +25,11 @@ LIB = lib$(ARCH).a -AOBJS = bios.o bios_pci.o realmode_switch.o +AOBJS = bios.o bios_pci.o realmode_switch.o COBJS = board.o bios_setup.o i386_linux.o zimage.o realmode.o \ - pci_type1.o pci.o video_bios.o video.o - + pci_type1.o pci.o video_bios.o video.o + OBJS = $(AOBJS) $(COBJS) $(LIB): .depend $(OBJS) diff --git a/lib_i386/bios.S b/lib_i386/bios.S index ce6e94c..4606419 100644 --- a/lib_i386/bios.S +++ b/lib_i386/bios.S @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * @@ -46,9 +46,9 @@ .section .bios, "ax" .code16 .org 0 - /* a call to f000:0 should warmboot */ + /* a call to f000:0 should warmboot */ jmp realmode_reset - + .globl rm_int00 rm_int00: pushw $0 @@ -181,18 +181,18 @@ rm_def_int: iret - + /* * All interrupt jumptable entries jump to here * after pushing the interrupt vector number onto the * stack. */ any_interrupt16: - MAKE_BIOS_STACK + MAKE_BIOS_STACK gs movw OFFS_VECTOR(%bp), %ax cmpw $0x10, %ax - je Lint_10h + je Lint_10h cmpw $0x11, %ax je Lint_11h cmpw $0x12, %ax @@ -210,10 +210,10 @@ Lint_10h: /* VGA BIOS services */ call bios_10h jmp Lout -Lint_11h: +Lint_11h: call bios_11h jmp Lout -Lint_12h: +Lint_12h: call bios_12h jmp Lout Lint_13h: /* BIOS disk services */ @@ -228,13 +228,13 @@ Lint_1ah: /* PCI bios */ call bios_1ah jmp Lout -Lout: +Lout: cmpw $0, %ax je Lhandeled - + /* Insert code for unhandeled INTs here. * - * ROLO prints a message to the console + * ROLO prints a message to the console * (we could do that but then we're in 16bit mode * so we'll have to get back into 32bit mode * to use the console I/O routines (if we do this @@ -286,7 +286,7 @@ bios_11h: cs movw bios_equipment, %ax -gs movw %ax, OFFS_AX(%bp) +gs movw %ax, OFFS_AX(%bp) xorw %ax, %ax ret @@ -327,14 +327,13 @@ je Lfunc_15h movw $0xffff, %ax ret -Lfunc_15h: +Lfunc_15h: gs movw OFFS_AX(%bp), %ax andw $0xff, %ax /* return AH=0->drive not present */ gs movw %ax, OFFS_AX(%bp) xorw %ax, %ax ret - - + /* *********************************************************** @@ -359,7 +358,7 @@ gs movw %ax, OFFS_FLAGS(%bp) xorw %ax, %ax ret - + Lfunc_e8h: gs movw OFFS_AX(%bp), %ax andw $0xff, %ax @@ -370,31 +369,31 @@ gs movw %ax, OFFS_FLAGS(%bp) xorw %ax, %ax ret - + Lfunc_e801h: /* Get memory size for >64M Configurations */ cs movw ram_in_64kb_chunks, %ax cmpw $0x100, %ax ja e801_more_than_16mb shlw $6, %ax /* multiply by 64 */ subw $0x400, %ax /* 1st meg does not count */ - + gs movw %ax, OFFS_AX(%bp) /* return memory size between 1M and 16M in 1kb chunks in AX and CX */ gs movw %ax, OFFS_CX(%bp) gs movw $0, OFFS_BX(%bp) /* set BX and DX to 0*/ -gs movw $0, OFFS_DX(%bp) +gs movw $0, OFFS_DX(%bp) gs movw OFFS_FLAGS(%bp), %ax andw $0xfffe, %ax /* clear carry -- function succeeded */ gs movw %ax, OFFS_FLAGS(%bp) xorw %ax, %ax ret - + e801_more_than_16mb: - subw $0x100, %ax /* subtract 16MB */ - + subw $0x100, %ax /* subtract 16MB */ + gs movw $0x3c00, OFFS_AX(%bp) /* return 0x3c00 (16MB-1MB) in AX and CX */ gs movw $0x3c00, OFFS_CX(%bp) gs movw %ax, OFFS_BX(%bp) /* set BX and DX to number of 64kb chunks above 16MB */ -gs movw %ax, OFFS_DX(%bp) +gs movw %ax, OFFS_DX(%bp) gs movw OFFS_FLAGS(%bp), %ax andw $0xfffe, %ax /* clear carry -- function succeeded */ @@ -410,7 +409,7 @@ b88_not_more_than16: shlw $6, %ax subw $0x400, %ax /* 1st meg does not count */ - + gs movw %ax, OFFS_AX(%bp) /* return number of kilobytes between 16MB and 16MB in ax */ gs movw OFFS_FLAGS(%bp), %ax @@ -461,4 +460,3 @@ .globl bios_equipment bios_equipment: .word 0 - diff --git a/lib_i386/bios.h b/lib_i386/bios.h index 876fe31..59143dd 100644 --- a/lib_i386/bios.h +++ b/lib_i386/bios.h @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * @@ -28,9 +28,9 @@ #define OFFS_GS 2 /* 16bit */ #define OFFS_DS 4 /* 16bit */ #define OFFS_EDI 6 /* 32bit */ -#define OFFS_DI 6 /* low 16 bits of EDI */ +#define OFFS_DI 6 /* low 16 bits of EDI */ #define OFFS_ESI 10 /* 32bit */ -#define OFFS_SI 10 /* low 16 bits of ESI */ +#define OFFS_SI 10 /* low 16 bits of ESI */ #define OFFS_EBP 14 /* 32bit */ #define OFFS_BP 14 /* low 16 bits of EBP */ #define OFFS_ESP 18 /* 32bit */ @@ -54,7 +54,7 @@ #define OFFS_VECTOR 38 /* 16bit */ #define OFFS_IP 40 /* 16bit */ #define OFFS_CS 42 /* 16bit */ -#define OFFS_FLAGS 44 /* 16bit */ +#define OFFS_FLAGS 44 /* 16bit */ #define SEGMENT 0x40 #define STACK 0x800 /* stack at 0x40:0x800 -> 0x800 */ @@ -63,9 +63,9 @@ /* save some segments */ /* save callers stack segment .. */ /* ... in gs */ - /* setup my segments */ - /* setup BIOS stackpointer */ - + /* setup my segments */ + /* setup BIOS stackpointer */ + #define MAKE_BIOS_STACK \ pushal ; \ pushw %ds ; \ @@ -89,6 +89,6 @@ popw %gs ; \ popw %ds ; \ \ - popal /* restore GP registers */ + popal /* restore GP registers */ #endif diff --git a/lib_i386/bios_pci.S b/lib_i386/bios_pci.S index e53791a..b57b726 100644 --- a/lib_i386/bios_pci.S +++ b/lib_i386/bios_pci.S @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * @@ -23,10 +23,10 @@ /* * x86 realmode assembly implementation of a PCI BIOS - * for platforms that use one PCI hose and configuration + * for platforms that use one PCI hose and configuration * access type 1. (The common case for low-end PC's) */ - + #include "bios.h" #define PCI_BIOS_DEBUG @@ -39,8 +39,8 @@ call realmode_pci_bios RESTORE_CALLERS_STACK ret - - + + .globl realmode_pci_bios realmode_pci_bios: gs movw OFFS_AX(%bp), %ax @@ -69,7 +69,7 @@ cmpb $15, %al je pci_bios_set_irq jmp unknown_function - + /*****************************************************************************/ pci_bios_present: @@ -77,31 +77,31 @@ cs incl num_pci_bios_present #endif movl $0x20494350, %eax -gs movl %eax, OFFS_EDX(%bp) +gs movl %eax, OFFS_EDX(%bp) movb $0x01, %al -gs movb %al, OFFS_AL(%bp) /* We support cfg type 1 */ - movw $0x0210, %ax /* version 2.10 */ -gs movw %ax, OFFS_BX(%bp) +gs movb %al, OFFS_AL(%bp) /* We support cfg type 1 */ + movw $0x0210, %ax /* version 2.10 */ +gs movw %ax, OFFS_BX(%bp) cs movb pci_last_bus, %al /* last bus number */ -gs movb %al, OFFS_CL(%bp) +gs movb %al, OFFS_CL(%bp) jmp clear_carry /*****************************************************************************/ /* device 0-31, function 0-7 */ -pci_bios_find_device: +pci_bios_find_device: #ifdef PCI_BIOS_DEBUG cs incl num_pci_bios_find_device #endif -gs movw OFFS_CX(%bp), %di +gs movw OFFS_CX(%bp), %di shll $16, %edi -gs movw OFFS_DX(%bp), %di /* edi now holds device in upper 16 - * bits and vendor in lower 16 bits */ -gs movw OFFS_SI(%bp), %si +gs movw OFFS_DX(%bp), %di /* edi now holds device in upper 16 + * bits and vendor in lower 16 bits */ +gs movw OFFS_SI(%bp), %si xorw %bx, %bx /* start at bus 0 dev 0 function 0 */ -pfd_loop: - xorw %ax, %ax /* dword 0 is vendor/device */ - call __pci_bios_select_register +pfd_loop: + xorw %ax, %ax /* dword 0 is vendor/device */ + call __pci_bios_select_register movw $0xcfc, %dx inl %dx, %eax cmpl %edi, %eax /* our device ? */ @@ -111,8 +111,8 @@ movw %bx, %ax andw $3, %ax jnz pfd_function_not_zero - movw $0x000c, %ax - call __pci_bios_select_register + movw $0x000c, %ax + call __pci_bios_select_register movw $0xcfe, %dx inb %dx, %al andb $0x80, %al @@ -121,11 +121,11 @@ incw %bx /* next function, overflows in to * device number, then bus number */ jmp pfd_check_bus - + pfd_not_multi_function: andw $0xfff8, %bx /* remove function bits */ addw $0x0008, %bx /* next device, overflows in to bus number */ -pfd_check_bus: +pfd_check_bus: cs movb pci_last_bus, %ah cmpb %ah, %bh ja pfd_not_found @@ -136,7 +136,7 @@ jmp pfd_next_dev pfd_done: -gs movw %bx, OFFS_BX(%bp) +gs movw %bx, OFFS_BX(%bp) jmp clear_carry pfd_not_found: @@ -149,13 +149,13 @@ #ifdef PCI_BIOS_DEBUG cs incl num_pci_bios_find_class #endif -gs movl OFFS_ECX(%bp), %edi - andl $0x00ffffff, %edi /* edi now holds class-code in lower 24 bits */ -gs movw OFFS_SI(%bp), %si +gs movl OFFS_ECX(%bp), %edi + andl $0x00ffffff, %edi /* edi now holds class-code in lower 24 bits */ +gs movw OFFS_SI(%bp), %si xorw %bx, %bx /* start at bus 0 dev 0 function 0 */ -pfc_loop: - movw $8, %ax /* dword 8 is class-code high 24bits */ - call __pci_bios_select_register +pfc_loop: + movw $8, %ax /* dword 8 is class-code high 24bits */ + call __pci_bios_select_register movw $0xcfc, %dx inl %dx, %eax shrl $8, %eax @@ -166,8 +166,8 @@ /* check for multi function devices */ andw $3, %bx jnz pfc_function_not_zero - movw $0x000c, %ax - call __pci_bios_select_register + movw $0x000c, %ax + call __pci_bios_select_register movw $0xcfe, %dx inb %dx, %al andb $0x80, %al @@ -176,11 +176,11 @@ incw %bx /* next function, overflows in to * device number, then bus number */ jmp pfc_check_bus - + pfc_not_multi_function: andw $0xfff8, %bx /* remove function bits */ addw $0x0008, %bx /* next device, overflows in to bus number */ -pfc_check_bus: +pfc_check_bus: cs movb pci_last_bus, %ah cmpb %ah, %bh ja pfc_not_found @@ -191,7 +191,7 @@ jmp pfc_next_dev pfc_done: -gs movw %bx, OFFS_BX(%bp) +gs movw %bx, OFFS_BX(%bp) jmp clear_carry pfc_not_found: @@ -206,24 +206,24 @@ #endif movb $0x81, %ah /* function not supported */ jmp set_carry - + /*****************************************************************************/ -pci_bios_read_cfg_byte: +pci_bios_read_cfg_byte: #ifdef PCI_BIOS_DEBUG cs incl num_pci_bios_read_cfg_byte #endif - call pci_bios_select_register + call pci_bios_select_register gs movw OFFS_DI(%bp), %dx andw $3, %dx addw $0xcfc, %dx inb %dx, %al -gs movb %al, OFFS_CL(%bp) +gs movb %al, OFFS_CL(%bp) jmp clear_carry /*****************************************************************************/ -pci_bios_read_cfg_word: +pci_bios_read_cfg_word: #ifdef PCI_BIOS_DEBUG cs incl num_pci_bios_read_cfg_word #endif @@ -232,20 +232,20 @@ andw $2, %dx addw $0xcfc, %dx inw %dx, %ax -gs movw %ax, OFFS_CX(%bp) +gs movw %ax, OFFS_CX(%bp) jmp clear_carry /*****************************************************************************/ -pci_bios_read_cfg_dword: +pci_bios_read_cfg_dword: #ifdef PCI_BIOS_DEBUG cs incl num_pci_bios_read_cfg_dword #endif call pci_bios_select_register movw $0xcfc, %dx inl %dx, %eax -gs movl %eax, OFFS_ECX(%bp) +gs movl %eax, OFFS_ECX(%bp) jmp clear_carry /*****************************************************************************/ @@ -254,35 +254,35 @@ #ifdef PCI_BIOS_DEBUG cs incl num_pci_bios_write_cfg_byte #endif - call pci_bios_select_register + call pci_bios_select_register gs movw OFFS_DI(%bp), %dx gs movb OFFS_CL(%bp), %al andw $3, %dx addw $0xcfc, %dx outb %al, %dx jmp clear_carry - + /*****************************************************************************/ pci_bios_write_cfg_word: #ifdef PCI_BIOS_DEBUG cs incl num_pci_bios_write_cfg_word #endif - call pci_bios_select_register + call pci_bios_select_register gs movw OFFS_DI(%bp), %dx gs movw OFFS_CX(%bp), %ax andw $2, %dx addw $0xcfc, %dx outw %ax, %dx jmp clear_carry - + /*****************************************************************************/ pci_bios_write_cfg_dword: #ifdef PCI_BIOS_DEBUG cs incl num_pci_bios_write_cfg_dword #endif - call pci_bios_select_register + call pci_bios_select_register gs movl OFFS_ECX(%bp), %eax movw $0xcfc, %dx outl %eax, %dx @@ -296,7 +296,7 @@ #endif movb $0x81, %ah /* function not supported */ jmp set_carry - + /*****************************************************************************/ pci_bios_set_irq: @@ -316,7 +316,7 @@ jmp set_carry /*****************************************************************************/ - + pci_bios_select_register: gs movw OFFS_BX(%bp), %bx gs movw OFFS_DI(%bp), %ax @@ -339,11 +339,11 @@ andw $0xfffe, %ax /* clear carry -- function succeeded */ gs movw %ax, OFFS_FLAGS(%bp) xorw %ax, %ax -gs movb %ah, OFFS_AH(%bp) +gs movb %ah, OFFS_AH(%bp) ret set_carry: -gs movb %ah, OFFS_AH(%bp) +gs movb %ah, OFFS_AH(%bp) gs movw OFFS_FLAGS(%bp), %ax orw $1, %ax /* return carry -- function not supported */ gs movw %ax, OFFS_FLAGS(%bp) @@ -360,7 +360,7 @@ .globl num_pci_bios_present num_pci_bios_present: .long 0 - + .globl num_pci_bios_find_device num_pci_bios_find_device: .long 0 @@ -370,9 +370,9 @@ .long 0 .globl num_pci_bios_generate_special_cycle -num_pci_bios_generate_special_cycle: +num_pci_bios_generate_special_cycle: .long 0 - + .globl num_pci_bios_read_cfg_byte num_pci_bios_read_cfg_byte: .long 0 diff --git a/lib_i386/bios_setup.c b/lib_i386/bios_setup.c index 3da7858..bc97815 100644 --- a/lib_i386/bios_setup.c +++ b/lib_i386/bios_setup.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * @@ -87,27 +87,27 @@ extern void *realmode_reset; extern void *realmode_pci_bios_call_entry; -static int set_jmp_vector(int entry_point, void *target) +static int set_jmp_vector(int entry_point, void *target) { if (entry_point & ~0xffff) { return -1; } - + if (((u32)target-0xf0000) & ~0xffff) { return -1; } printf("set_jmp_vector: 0xf000:%04x -> %p\n", entry_point, target); - + /* jmp opcode */ writeb(0xea, 0xf0000 + entry_point); - + /* offset */ writew(((u32)target-0xf0000), 0xf0000 + entry_point + 1); - + /* segment */ writew(0xf000, 0xf0000 + entry_point + 3); - + return 0; } @@ -123,40 +123,40 @@ u16 *ptr = (u16*)(vector*4); ptr[0] = ((u32)handler - (segment << 4))&0xffff; ptr[1] = segment; - -#if 0 + +#if 0 printf("setvector: int%02x -> %04x:%04x\n", vector, ptr[1], ptr[0]); -#endif +#endif } -#define RELOC_16_LONG(seg, off) *(u32*)(seg << 4 | (u32)&off) -#define RELOC_16_WORD(seg, off) *(u16*)(seg << 4 | (u32)&off) -#define RELOC_16_BYTE(seg, off) *(u8*)(seg << 4 | (u32)&off) +#define RELOC_16_LONG(seg, off) *(u32*)(seg << 4 | (u32)&off) +#define RELOC_16_WORD(seg, off) *(u16*)(seg << 4 | (u32)&off) +#define RELOC_16_BYTE(seg, off) *(u8*)(seg << 4 | (u32)&off) int bios_setup(void) { DECLARE_GLOBAL_DATA_PTR; - static int done=0; + static int done=0; int vector; struct pci_controller *pri_hose; - + if (done) { return 0; } done = 1; - + if (i386boot_bios_size > 65536) { - printf("BIOS too large (%ld bytes, max is 65536)\n", + printf("BIOS too large (%ld bytes, max is 65536)\n", i386boot_bios_size); return -1; } - + memcpy(BIOS_BASE, (void*)i386boot_bios, i386boot_bios_size); /* clear bda */ memset(BIOS_DATA, 0, BIOS_DATA_SIZE); - + /* enter some values to the bda */ writew(0x3f8, BIOS_DATA); /* com1 addr */ writew(0x2f8, BIOS_DATA+2); /* com2 addr */ @@ -169,12 +169,12 @@ */ writew(0, BIOS_DATA+0x13); /* base memory size */ - - /* setup realmode interrupt vectors */ + + /* setup realmode interrupt vectors */ for (vector = 0; vector < NUMVECTS; vector++) { setvector(vector, BIOS_CS, &rm_def_int); } - + setvector(0x00, BIOS_CS, &rm_int00); setvector(0x01, BIOS_CS, &rm_int01); setvector(0x02, BIOS_CS, &rm_int02); @@ -210,25 +210,24 @@ set_jmp_vector(0xfff0, &realmode_reset); set_jmp_vector(0xfe6e, &realmode_pci_bios_call_entry); - + /* fill in data area */ RELOC_16_WORD(0xf000, ram_in_64kb_chunks) = gd->ram_size >> 16; RELOC_16_WORD(0xf000, bios_equipment) = 0; /* FixMe */ - + /* If we assume only one PCI hose, this PCI hose - * will own PCI bus #0, and the last PCI bus of - * that PCI hose will be the last PCI bus in the - * system. + * will own PCI bus #0, and the last PCI bus of + * that PCI hose will be the last PCI bus in the + * system. * (This, ofcause break on multi hose systems, - * but our PCI BIOS only support one hose anyway) + * but our PCI BIOS only support one hose anyway) */ pri_hose = pci_bus_to_hose(0); if (NULL != pri_hose) { - /* fill in last pci bus number for use by the realmode + /* fill in last pci bus number for use by the realmode * PCI BIOS */ RELOC_16_BYTE(0xf000, pci_last_bus) = pri_hose->last_busno; } - + return 0; } - diff --git a/lib_i386/board.c b/lib_i386/board.c index 85d7d7f..5d1c1fb 100644 --- a/lib_i386/board.c +++ b/lib_i386/board.c @@ -1,10 +1,10 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * (C) Copyright 2002 * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * + * * (C) Copyright 2002 * Sysgo Real-Time Solutions, GmbH * Marius Groeger @@ -39,18 +39,18 @@ #include #include -extern long _i386boot_start; -extern long _i386boot_end; +extern long _i386boot_start; +extern long _i386boot_end; extern long _i386boot_romdata_start; -extern long _i386boot_romdata_dest; -extern long _i386boot_romdata_size; -extern long _i386boot_bss_start; -extern long _i386boot_bss_size; +extern long _i386boot_romdata_dest; +extern long _i386boot_romdata_size; +extern long _i386boot_bss_start; +extern long _i386boot_bss_size; -extern long _i386boot_realmode; +extern long _i386boot_realmode; extern long _i386boot_realmode_size; -extern long _i386boot_bios; -extern long _i386boot_bios_size; +extern long _i386boot_bios; +extern long _i386boot_bios_size; /* The symbols defined by the linker script becomes pointers * which is somewhat inconveient ... */ @@ -82,15 +82,15 @@ static int mem_malloc_init(void) { DECLARE_GLOBAL_DATA_PTR; - + /* start malloc area right after the stack */ - mem_malloc_start = i386boot_bss_start + + mem_malloc_start = i386boot_bss_start + i386boot_bss_size + CFG_STACK_SIZE; mem_malloc_start = (mem_malloc_start+3)&~3; - + /* Use all available RAM for malloc() */ mem_malloc_end = gd->ram_size; - + mem_malloc_brk = mem_malloc_start; return 0; @@ -162,9 +162,9 @@ i386boot_start, i386boot_romdata_start-1, i386boot_romdata_dest, i386boot_romdata_dest+i386boot_romdata_size-1, i386boot_bss_start, i386boot_bss_start+i386boot_bss_size-1, - i386boot_bss_start+i386boot_bss_size, + i386boot_bss_start+i386boot_bss_size, i386boot_bss_start+i386boot_bss_size+CFG_STACK_SIZE-1); - + return (0); } @@ -187,7 +187,7 @@ printf ("Bank #%d: %08lx ", i, gd->bd->bi_dram[i].start); print_size (gd->bd->bi_dram[i].size, "\n"); } - + return (0); } @@ -198,7 +198,6 @@ } - /* * Breath some life into the board... * @@ -230,7 +229,7 @@ dram_init, /* configure available RAM banks */ mem_malloc_init, /* dependant on dram_init */ interrupt_init, /* set up exceptions */ - timer_init, + timer_init, serial_init, env_init, /* initialize environment */ init_baudrate, /* initialze baudrate settings */ @@ -252,18 +251,18 @@ static gd_t gd_data; static bd_t bd_data; init_fnc_t **init_fnc_ptr; - + show_boot_progress(0x21); gd = global_data = &gd_data; - + memset (gd, 0, sizeof (gd_t)); gd->bd = &bd_data; memset (gd->bd, 0, sizeof (bd_t)); show_boot_progress(0x22); gd->baudrate = CONFIG_BAUDRATE; - + for (init_fnc_ptr = init_sequence, i=0; *init_fnc_ptr; ++init_fnc_ptr, i++) { show_boot_progress(0xa130|i); @@ -320,7 +319,7 @@ /* allocate syscalls table (console_init_r will fill it in */ syscall_tbl = (void **) malloc (NR_SYSCALLS * sizeof (void *)); memset(syscall_tbl, 0, NR_SYSCALLS * sizeof (void *)); - + /* Initialize the console (after the relocation and devices init) */ console_init_r(); syscalls_init(); @@ -361,7 +360,7 @@ #ifdef CONFIG_SERIAL_SOFTWARE_FIFO serial_buffered_init(); #endif - + #ifdef CONFIG_STATUS_LED status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING); #endif @@ -417,7 +416,6 @@ #endif - #ifdef CONFIG_POST post_run (NULL, POST_RAM | post_bootmode_get(0)); if (post_bootmode_get(0) & POST_POWERFAIL) { @@ -425,10 +423,10 @@ board_poweroff(); } #endif - - + + show_boot_progress(0x29); - + /* main_loop() can return to retry autoboot, if so just run it again. */ for (;;) { main_loop(); @@ -442,5 +440,3 @@ puts ("### ERROR ### Please RESET the board ###\n"); for (;;); } - - diff --git a/lib_i386/i386_linux.c b/lib_i386/i386_linux.c index 5a596ff..e5d8eea 100644 --- a/lib_i386/i386_linux.c +++ b/lib_i386/i386_linux.c @@ -23,12 +23,13 @@ #include #include -#include #include #include #include #include +/*cmd_boot.c*/ +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); extern image_header_t header; /* from cmd_bootm.c */ @@ -39,7 +40,7 @@ if (NULL != fake_zimage_header(hdr, ptr, size)) { return hdr; } - + return NULL; } @@ -48,47 +49,47 @@ ulong addr, ulong *len_ptr, int verify) { void *base_ptr; - + ulong len = 0, checksum; ulong initrd_start, initrd_end; ulong data; image_header_t *hdr = &header; - + /* * Check if there is an initrd image */ if (argc >= 3) { addr = simple_strtoul(argv[2], NULL, 16); - + printf ("## Loading Ramdisk Image at %08lx ...\n", addr); - + /* Copy header so we can blank CRC field for re-calculation */ memcpy (&header, (char *)addr, sizeof(image_header_t)); - + if (ntohl(hdr->ih_magic) != IH_MAGIC) { printf ("Bad Magic Number\n"); do_reset (cmdtp, flag, argc, argv); } - + data = (ulong)&header; len = sizeof(image_header_t); - + checksum = ntohl(hdr->ih_hcrc); hdr->ih_hcrc = 0; - + if (crc32 (0, (char *)data, len) != checksum) { printf ("Bad Header Checksum\n"); do_reset (cmdtp, flag, argc, argv); } - + print_image_hdr (hdr); - + data = addr + sizeof(image_header_t); len = ntohl(hdr->ih_size); - + if (verify) { ulong csum = 0; - + printf (" Verifying Checksum ... "); csum = crc32 (0, (char *)data, len); if (csum != ntohl(hdr->ih_dcrc)) { @@ -97,21 +98,21 @@ } printf ("OK\n"); } - + if ((hdr->ih_os != IH_OS_LINUX) || (hdr->ih_arch != IH_CPU_I386) || (hdr->ih_type != IH_TYPE_RAMDISK) ) { printf ("No Linux i386 Ramdisk Image\n"); do_reset (cmdtp, flag, argc, argv); } - + /* * Now check if we have a multifile image */ } else if ((hdr->ih_type==IH_TYPE_MULTI) && (len_ptr[1])) { ulong tail = ntohl(len_ptr[0]) % 4; int i; - + /* skip kernel length and terminator */ data = (ulong)(&len_ptr[2]); /* skip any additional image length fields */ @@ -122,22 +123,22 @@ if (tail) { data += 4 - tail; } - + len = ntohl(len_ptr[1]); - + } else { /* * no initrd image */ data = 0; } - + #ifdef DEBUG if (!data) { printf ("No initrd\n"); } #endif - + if (data) { initrd_start = data; initrd_end = initrd_start + len; @@ -149,26 +150,24 @@ initrd_start = 0; initrd_end = 0; } - - base_ptr = load_zimage((void*)addr + sizeof(image_header_t), ntohl(hdr->ih_size), + + base_ptr = load_zimage((void*)addr + sizeof(image_header_t), ntohl(hdr->ih_size), initrd_start, initrd_end-initrd_start, 0); if (NULL == base_ptr) { printf ("## Kernel loading failed ...\n"); do_reset(cmdtp, flag, argc, argv); - + } - + #ifdef DEBUG printf ("## Transferring control to Linux (at address %08x) ...\n", (u32)base_ptr); #endif - + /* we assume that the kernel is in place */ printf("\nStarting kernel ...\n\n"); - + boot_zimage(base_ptr); - + } - - diff --git a/lib_i386/pci.c b/lib_i386/pci.c index acd1d25..a7f16aa 100644 --- a/lib_i386/pci.c +++ b/lib_i386/pci.c @@ -21,24 +21,24 @@ * MA 02111-1307 USA */ -#include -#include -#include -#include +#include +#include +#include +#include #ifdef CONFIG_PCI #undef PCI_ROM_SCAN_VERBOSE -int pci_shadow_rom(pci_dev_t dev, unsigned char *dest) +int pci_shadow_rom(pci_dev_t dev, unsigned char *dest) { struct pci_controller *hose; int res = -1; int i; - + u32 rom_addr; u32 addr_reg; u32 size; - + u16 vendor; u16 device; u32 class_code; @@ -47,18 +47,18 @@ #if 0 printf("pci_shadow_rom() asked to shadow device %x to %x\n", dev, (u32)dest); -#endif +#endif pci_read_config_word(dev, PCI_VENDOR_ID, &vendor); pci_read_config_word(dev, PCI_DEVICE_ID, &device); pci_read_config_dword(dev, PCI_CLASS_REVISION, &class_code); - + class_code &= 0xffffff00; class_code >>= 8; -#if 0 +#if 0 printf("PCI Header Vendor %04x device %04x class %06x\n", vendor, device, class_code); -#endif +#endif /* Enable the rom addess decoder */ pci_write_config_dword(dev, PCI_ROM_ADDRESS, PCI_ROM_ADDRESS_MASK); pci_read_config_dword(dev, PCI_ROM_ADDRESS, &addr_reg); @@ -68,40 +68,39 @@ printf("pci_chadow_rom: device do not seem to have a rom\n"); return -1; } - - size = (~(addr_reg&PCI_ROM_ADDRESS_MASK))+1; - -#if 0 + + size = (~(addr_reg&PCI_ROM_ADDRESS_MASK))+1; + +#if 0 printf("ROM is %d bytes\n", size); -#endif +#endif rom_addr = pci_get_rom_window(hose, size); -#if 0 +#if 0 printf("ROM mapped at %x \n", rom_addr); -#endif - pci_write_config_dword(dev, PCI_ROM_ADDRESS, +#endif + pci_write_config_dword(dev, PCI_ROM_ADDRESS, pci_phys_to_mem(dev, rom_addr) |PCI_ROM_ADDRESS_ENABLE); - for (i=rom_addr;i (REALMODE_MAILBOX-REALMODE_BASE)) { - printf("realmode switch too large (%ld bytes, max is %d)\n", + printf("realmode switch too large (%ld bytes, max is %d)\n", i386boot_realmode_size, (REALMODE_MAILBOX-REALMODE_BASE)); return -1; } - + memcpy(REALMODE_BASE, (void*)i386boot_realmode, i386boot_realmode_size); asm("wbinvd\n"); - + return 0; } - + int enter_realmode(u16 seg, u16 off, struct pt_regs *in, struct pt_regs *out) { - + /* setup out thin bios emulation */ if (bios_setup()) { return -1; } - + if (realmode_setup()) { return -1; } - + in->eip = off; in->xcs = seg; if (3>(in->esp & 0xffff)) { printf("Warning: entering realmode with sp < 4 will fail\n"); } - + memcpy(REALMODE_MAILBOX, in, sizeof(struct pt_regs)); asm("wbinvd\n"); - - __asm__ volatile ( + + __asm__ volatile ( "lcall $0x20,%0\n" : : "i" (&realmode_enter) ); asm("wbinvd\n"); @@ -88,9 +88,8 @@ writeb(lvl, 0x701); writeb(0xcb, 0x702); /* lret */ asm("wbinvd\n"); - - enter_realmode(0x00, 0x700, in, out); - + + enter_realmode(0x00, 0x700, in, out); + return out->eflags&1; } - diff --git a/lib_i386/realmode_switch.S b/lib_i386/realmode_switch.S index 17adcbd..0433cd4 100644 --- a/lib_i386/realmode_switch.S +++ b/lib_i386/realmode_switch.S @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * @@ -31,11 +31,11 @@ * e08 edx; * e0c esi; * e10 edi; - * e14 ebp; + * e14 ebp; * e18 eax; - * e1c ds; + * e1c ds; * e20 es; - * e24 fs; + * e24 fs; * e28 gs; * e2c orig_eax; * e30 eip; @@ -46,7 +46,7 @@ */ #define a32 .byte 0x67; /* address size prefix 32 */ -#define o32 .byte 0x66; /* operand size prefix 32 */ +#define o32 .byte 0x66; /* operand size prefix 32 */ .section .realmode, "ax" .code16 @@ -56,11 +56,11 @@ o32 pusha o32 pushf cli - sidt saved_idt - sgdt saved_gdt - movl %esp, %eax - movl %eax, saved_protected_mode_esp - + sidt saved_idt + sgdt saved_gdt + movl %esp, %eax + movl %eax, saved_protected_mode_esp + movl $0x10, %eax movl %eax, %esp movw $0x28, %ax @@ -74,21 +74,21 @@ andl $0x7ffffffe, %eax /* clearing PE to 0 */ movl %eax, %cr0 ljmp $0x0,$do_realmode /* switch to real mode */ - -do_realmode: /* realmode code from here */ + +do_realmode: /* realmode code from here */ movw %cs,%ax movw %ax,%ds movw %ax,%es movw %ax,%fs movw %ax,%gs - + /* create a temporary stack */ - - movw $0xc0, %ax - movw %ax, %ss - movw $0x200, %ax - movw %ax, %sp - + + movw $0xc0, %ax + movw %ax, %ss + movw $0x200, %ax + movw %ax, %sp + popl %ebx popl %ecx popl %edx @@ -117,11 +117,11 @@ cs movl temp_eax, %eax wbinvd /* self-modifying code, * better flush the cache */ - + .byte 0x9a /* lcall */ temp_ip: .word 0 /* new ip */ -temp_cs: +temp_cs: .word 0 /* new cs */ realmode_ret: /* save eax, esp and ss */ @@ -130,16 +130,16 @@ cs movl %eax, saved_esp movw %ss, %ax cs movw %ax, saved_ss - + /* restore the stack, note that we set sp to 0x244; * pt_regs is 0x44 bytes long and we push the structure * backwards on to the stack, bottom first */ - - movw $0xc0, %ax - movw %ax, %ss - movw $0x244, %ax - movw %ax, %sp - + + movw $0xc0, %ax + movw %ax, %ss + movw $0x244, %ax + movw %ax, %sp + xorl %eax,%eax cs movw saved_ss, %ax pushl %eax @@ -172,28 +172,28 @@ o32 cs lidt saved_idt o32 cs lgdt saved_gdt /* Set GDTR */ - movl %cr0, %eax /* Go back into protected mode */ - orl $1,%eax /* reset PE to 1 */ - movl %eax, %cr0 - jmp next_line /* flush prefetch queue */ -next_line: - movw $return_ptr, %ax - movw %ax,%bp + movl %cr0, %eax /* Go back into protected mode */ + orl $1,%eax /* reset PE to 1 */ + movl %eax, %cr0 + jmp next_line /* flush prefetch queue */ +next_line: + movw $return_ptr, %ax + movw %ax,%bp o32 cs ljmp *(%bp) .code32 protected_mode: - movl $0x18,%eax /* reload GDT[3] */ - movw %ax,%fs /* reset FS */ + movl $0x18,%eax /* reload GDT[3] */ + movw %ax,%fs /* reset FS */ movw %ax,%ds /* reset DS */ - movw %ax,%gs /* reset GS */ - movw %ax,%es /* reset ES */ - movw %ax,%ss /* reset SS */ - movl saved_protected_mode_esp, %eax + movw %ax,%gs /* reset GS */ + movw %ax,%es /* reset ES */ + movw %ax,%ss /* reset SS */ + movl saved_protected_mode_esp, %eax movl %eax, %esp popf popa - ret + ret temp_eax: .long 0 @@ -204,19 +204,19 @@ .long 0 saved_eax: .long 0 - + realmode_idt_ptr: - .word 0x400 - .word 0x0, 0x0 - -saved_gdt: - .word 0, 0, 0, 0 + .word 0x400 + .word 0x0, 0x0 + +saved_gdt: + .word 0, 0, 0, 0 saved_idt: - .word 0, 0, 0, 0 + .word 0, 0, 0, 0 saved_protected_mode_esp: .long 0 - + return_ptr: .long protected_mode .word 0x10 diff --git a/lib_i386/video.c b/lib_i386/video.c index 776022e..cd89457 100644 --- a/lib_i386/video.c +++ b/lib_i386/video.c @@ -21,14 +21,14 @@ * MA 02111-1307 USA */ -#include -#include +#include +#include #include #include -#include -#include -#include -#include +#include +#include +#include +#include /* basic textmode I/O from linux kernel */ @@ -40,7 +40,7 @@ static void beep(int dur) { int i; - + outb_p(3, 0x61); for (i=0;i<10*dur;i++) { udelay(1000); @@ -60,23 +60,23 @@ static void __video_putc(const char c, int *x, int *y) { if (c == '\n') { - (*x) = 0; + (*x) = 0; if ( ++(*y) >= lines ) { scroll(); (*y)--; } - } else if (c == '\b') { + } else if (c == '\b') { if ((*x) != 0) { --(*x); - vidmem [ ( (*x) + cols * (*y) ) * 2 ] = ' '; + vidmem [ ( (*x) + cols * (*y) ) * 2 ] = ' '; } - } else if (c == '\r') { + } else if (c == '\r') { (*x) = 0; - - } else if (c == '\a') { + + } else if (c == '\a') { beep(3); - - } else if (c == '\t') { + + } else if (c == '\t') { __video_putc(' ', x, y); __video_putc(' ', x, y); __video_putc(' ', x, y); @@ -85,7 +85,7 @@ __video_putc(' ', x, y); __video_putc(' ', x, y); __video_putc(' ', x, y); - } else if (c == '\v') { + } else if (c == '\v') { switch ((*x) % 8) { case 0: __video_putc(' ', x, y); @@ -104,7 +104,7 @@ case 1: __video_putc(' ', x, y); } - } else if (c == '\f') { + } else if (c == '\f') { int i; for (i=0;i= cols ) { (*x) = 0; if ( ++(*y) >= lines ) { @@ -126,15 +126,15 @@ static void video_putc(const char c) { int x,y,pos; - + x = orig_x; y = orig_y; - + __video_putc(c, &x, &y); orig_x = x; orig_y = y; - + pos = (x + cols * y) * 2; /* Update cursor position */ outb_p(14, vidport); outb_p(0xff & (pos >> 9), vidport+1); @@ -167,72 +167,71 @@ int video_init(void) { u16 pos; - + static device_t vga_dev; static device_t kbd_dev; - + vidmem = (char *) 0xb8000; vidport = 0x3d4; lines = 25; cols = 80; - + outb_p(14, vidport); pos = inb_p(vidport+1); pos <<= 8; outb_p(15, vidport); pos |= inb_p(vidport+1); - + orig_x = pos%cols; orig_y = pos/cols; -#if 0 +#if 0 printf("pos %x %d %d\n", pos, orig_x, orig_y); -#endif +#endif if (orig_y > lines) { orig_x = orig_y =0; } - - - memset(&vga_dev, 0, sizeof(vga_dev)); - strcpy(vga_dev.name, "vga"); - vga_dev.ext = 0; - vga_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM; - vga_dev.putc = video_putc; /* 'putc' function */ - vga_dev.puts = video_puts; /* 'puts' function */ - vga_dev.tstc = NULL; /* 'tstc' function */ - vga_dev.getc = NULL; /* 'getc' function */ - if (device_register(&vga_dev) == 0) { - return 1; + + memset(&vga_dev, 0, sizeof(vga_dev)); + strcpy(vga_dev.name, "vga"); + vga_dev.ext = 0; + vga_dev.flags = DEV_FLAGS_OUTPUT | DEV_FLAGS_SYSTEM; + vga_dev.putc = video_putc; /* 'putc' function */ + vga_dev.puts = video_puts; /* 'puts' function */ + vga_dev.tstc = NULL; /* 'tstc' function */ + vga_dev.getc = NULL; /* 'getc' function */ + + if (device_register(&vga_dev) == 0) { + return 1; } - + if (i8042_kbd_init()) { return 1; } - - memset(&kbd_dev, 0, sizeof(kbd_dev)); - strcpy(kbd_dev.name, "kbd"); - kbd_dev.ext = 0; - kbd_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM; - kbd_dev.putc = NULL; /* 'putc' function */ - kbd_dev.puts = NULL; /* 'puts' function */ - kbd_dev.tstc = i8042_tstc; /* 'tstc' function */ - kbd_dev.getc = i8042_getc; /* 'getc' function */ - if (device_register(&kbd_dev) == 0) { - return 1; + memset(&kbd_dev, 0, sizeof(kbd_dev)); + strcpy(kbd_dev.name, "kbd"); + kbd_dev.ext = 0; + kbd_dev.flags = DEV_FLAGS_INPUT | DEV_FLAGS_SYSTEM; + kbd_dev.putc = NULL; /* 'putc' function */ + kbd_dev.puts = NULL; /* 'puts' function */ + kbd_dev.tstc = i8042_tstc; /* 'tstc' function */ + kbd_dev.getc = i8042_getc; /* 'getc' function */ + + if (device_register(&kbd_dev) == 0) { + return 1; } return 0; } -int drv_video_init(void) +int drv_video_init(void) { if (video_bios_init()) { return 1; } - - return video_init(); + + return video_init(); } - diff --git a/lib_i386/video_bios.c b/lib_i386/video_bios.c index d9709b9..45f78e2 100644 --- a/lib_i386/video_bios.c +++ b/lib_i386/video_bios.c @@ -21,13 +21,13 @@ * MA 02111-1307 USA */ -#include -#include -#include -#include -#include -#include -#include +#include +#include +#include +#include +#include +#include +#include #undef PCI_BIOS_DEBUG #undef VGA_BIOS_DEBUG @@ -41,7 +41,7 @@ #ifdef CONFIG_PCI #ifdef PCI_BIOS_DEBUG -#define RELOC_16(seg, off) *(u32*)(seg << 4 | (u32)&off) +#define RELOC_16(seg, off) *(u32*)(seg << 4 | (u32)&off) extern u32 num_pci_bios_present; extern u32 num_pci_bios_find_device; extern u32 num_pci_bios_find_class; @@ -62,7 +62,7 @@ printf("pci_bios_present: %d\n", RELOC_16(0xf000, num_pci_bios_present)); printf("pci_bios_find_device: %d\n", RELOC_16(0xf000, num_pci_bios_find_device)); printf("pci_bios_find_class: %d\n", RELOC_16(0xf000, num_pci_bios_find_class)); - printf("pci_bios_generate_special_cycle: %d\n", RELOC_16(0xf000, num_pci_bios_generate_special_cycle)); + printf("pci_bios_generate_special_cycle: %d\n", RELOC_16(0xf000, num_pci_bios_generate_special_cycle)); printf("pci_bios_read_cfg_byte: %d\n", RELOC_16(0xf000, num_pci_bios_read_cfg_byte)); printf("pci_bios_read_cfg_word: %d\n", RELOC_16(0xf000, num_pci_bios_read_cfg_word)); printf("pci_bios_read_cfg_dword: %d\n", RELOC_16(0xf000, num_pci_bios_read_cfg_dword)); @@ -84,52 +84,52 @@ static u32 probe_pci_video(void) { pci_dev_t devbusfn; - - if ((devbusfn = pci_find_class(PCI_CLASS_VIDEO, - PCI_CLASS_VIDEO_STD, + + if ((devbusfn = pci_find_class(PCI_CLASS_VIDEO, + PCI_CLASS_VIDEO_STD, PCI_CLASS_VIDEO_PROG_IF_VGA, 0)) != -1) { u32 old; u32 addr; - + /* PCI video device detected */ - printf("Found PCI VGA device at %02x.%02x.%x\n", + printf("Found PCI VGA device at %02x.%02x.%x\n", PCI_BUS(devbusfn), PCI_DEV(devbusfn), PCI_FUNC(devbusfn)); - + /* Enable I/O decoding as well, PCI viudeo boards * support I/O accesses, but they provide no * bar register for this since the ports are fixed. */ pci_write_config_word(devbusfn, PCI_COMMAND, PCI_COMMAND_MEMORY | PCI_COMMAND_IO | PCI_COMMAND_MASTER); - + /* Test the ROM decoder, do the device support a rom? */ - pci_read_config_dword(devbusfn, PCI_ROM_ADDRESS, &old); + pci_read_config_dword(devbusfn, PCI_ROM_ADDRESS, &old); pci_write_config_dword(devbusfn, PCI_ROM_ADDRESS, PCI_ROM_ADDRESS_MASK); pci_read_config_dword(devbusfn, PCI_ROM_ADDRESS, &addr); pci_write_config_dword(devbusfn, PCI_ROM_ADDRESS, old); - + if (!addr) { printf("PCI VGA have no ROM?\n"); return 0; } - + /* device have a rom */ - if (pci_shadow_rom(devbusfn, (void*)0xc0000)) { + if (pci_shadow_rom(devbusfn, (void*)0xc0000)) { printf("Shadowing of PCI VGA BIOS failed\n"); return 0; } - + /* Now enable lagacy VGA port access */ if (pci_enable_legacy_video_ports(pci_bus_to_hose(PCI_BUS(devbusfn)))) { printf("PCI VGA enable failed\n"); return 0; } - - + + /* return the pci device info, that we'll need later */ - return PCI_BUS(devbusfn) << 8 | + return PCI_BUS(devbusfn) << 8 | PCI_DEV(devbusfn) << 3 | (PCI_FUNC(devbusfn)&7); } - + return 0; } @@ -139,8 +139,8 @@ static int probe_isa_video(void) { u32 ptr; - char *buf; - + char *buf; + if (0 == (ptr = isa_map_rom(0xc0000, 0x8000))) { return -1; } @@ -153,14 +153,14 @@ isa_unmap_rom(ptr); return -1; } - + /* shadow the rom */ memcpy(buf, (void*)ptr, 0x8000); isa_unmap_rom(ptr); memcpy((void*)0xc0000, buf, 0x8000); - + free(buf); - + return 0; } @@ -169,20 +169,20 @@ struct pt_regs regs; /* clear the video bios area in case we warmbooted */ - memset((void*)0xc0000, 0, 0x8000); + memset((void*)0xc0000, 0, 0x8000); memset(®s, 0, sizeof(struct pt_regs)); - + if (probe_isa_video()) { /* No ISA board found, try the PCI bus */ regs.eax = probe_pci_video(); } - + /* Did we succeed in mapping any video bios */ if (readw(0xc0000) == 0xaa55) { int size; int i; u8 sum; - + PRINTF("Found video bios signature\n"); size = 512*readb(0xc0002); PRINTF("size %d\n", size); @@ -194,28 +194,26 @@ if (sum) { return 1; } - + /* some video bioses (ATI Mach64) seem to think that * the original int 10 handler is always at * 0xf000:0xf065 , place an iret instruction there */ writeb(0xcf, 0xff065); - + regs.esp = 0x8000; regs.xss = 0x2000; enter_realmode(0xc000, 3, ®s, ®s); PRINTF("INT 0x10 vector after: %04x:%04x\n", - readw(0x42), readw(0x40)); + readw(0x42), readw(0x40)); PRINTF("BIOS returned %scarry\n", regs.eflags & 1?"":"NOT "); -#ifdef PCI_BIOS_DEBUG +#ifdef PCI_BIOS_DEBUG print_bios_bios_stat(); -#endif +#endif return (regs.eflags & 1); - + } - + return 1; - + } - - diff --git a/lib_i386/zimage.c b/lib_i386/zimage.c index 9d33b2d..3510f2f 100644 --- a/lib_i386/zimage.c +++ b/lib_i386/zimage.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se - * + * * See file CREDITS for list of people who contributed to this * project. * @@ -21,10 +21,10 @@ * MA 02111-1307 USA */ -/* +/* * Linux i386 zImage and bzImage loading - * - * based on the procdure described in + * + * based on the procdure described in * linux/Documentation/i386/boot.txt */ @@ -37,10 +37,10 @@ /* * Memory lay-out: - * + * * relative to setup_base (which is 0x90000 currently) - * - * 0x0000-0x7FFF Real mode kernel + * + * 0x0000-0x7FFF Real mode kernel * 0x8000-0x8FFF Stack and heap * 0x9000-0x90FF Kernel command line */ @@ -53,53 +53,53 @@ static void build_command_line(char *command_line, int auto_boot) { char *env_command_line; - + command_line[0] = '\0'; - + env_command_line = getenv("bootargs"); - + /* set console= argument if we use a serial console */ if (NULL == strstr(env_command_line, "console=")) { if (0==strcmp(getenv("stdout"), "serial")) { - + /* We seem to use serial console */ - sprintf(command_line, "console=ttyS0,%s ", + sprintf(command_line, "console=ttyS0,%s ", getenv("baudrate")); } } - + if (auto_boot) { strcat(command_line, "auto "); } - + if (NULL != env_command_line) { strcat(command_line, env_command_line); - } - - + } + + printf("Kernel command line: \"%s\"\n", command_line); } -void *load_zimage(char *image, unsigned long kernel_size, +void *load_zimage(char *image, unsigned long kernel_size, unsigned long initrd_addr, unsigned long initrd_size, int auto_boot) { - void *setup_base; + void *setup_base; int setup_size; int bootproto; int big_image; void *load_address; - - + + setup_base = (void*)DEFAULT_SETUP_BASE; /* base address for real-mode segment */ - - if (KERNEL_MAGIC != *(u16*)(image + BOOT_FLAG_OFF)) { + + if (KERNEL_MAGIC != *(u16*)(image + BOOT_FLAG_OFF)) { printf("Error: Invalid kernel magic (found 0x%04x, expected 0xaa55)\n", *(u16*)(image + BOOT_FLAG_OFF)); return 0; } - - + + /* determine boot protocol version */ if (KERNEL_V2_MAGIC == *(u32*)(image+HEADER_OFF)) { bootproto = *(u16*)(image+VERSION_OFF); @@ -107,108 +107,107 @@ /* Very old kernel */ bootproto = 0x0100; } - + /* determine size of setup */ if (0 == *(u8*)(image + SETUP_SECTS_OFF)) { setup_size = 5 * 512; } else { setup_size = (*(u8*)(image + SETUP_SECTS_OFF) + 1) * 512; } - + if (setup_size > SETUP_MAX_SIZE) { printf("Error: Setup is too large (%d bytes)\n", setup_size); } - + /* Determine image type */ - big_image = (bootproto >= 0x0200) && (*(u8*)(image + LOADFLAGS_OFF) & BIG_KERNEL_FLAG); - + big_image = (bootproto >= 0x0200) && (*(u8*)(image + LOADFLAGS_OFF) & BIG_KERNEL_FLAG); + /* Derermine load address */ load_address = (void*)(big_image ? BZIMAGE_LOAD_ADDR:ZIMAGE_LOAD_ADDR); - + /* load setup */ memmove(setup_base, image, setup_size); - - printf("Using boot protocol version %x.%02x\n", + + printf("Using boot protocol version %x.%02x\n", (bootproto & 0xff00) >> 8, bootproto & 0xff); - - - if (bootproto == 0x0100) { - + + + if (bootproto == 0x0100) { + *(u16*)(setup_base + CMD_LINE_MAGIC_OFF) = COMMAND_LINE_MAGIC; - *(u16*)(setup_base + CMD_LINE_OFFSET_OFF) = COMMAND_LINE_OFFSET; - + *(u16*)(setup_base + CMD_LINE_OFFSET_OFF) = COMMAND_LINE_OFFSET; + /* A very old kernel MUST have its real-mode code * loaded at 0x90000 */ - + if ((u32)setup_base != 0x90000) { /* Copy the real-mode kernel */ memmove((void*)0x90000, setup_base, setup_size); /* Copy the command line */ - memmove((void*)0x99000, setup_base+COMMAND_LINE_OFFSET, + memmove((void*)0x99000, setup_base+COMMAND_LINE_OFFSET, COMMAND_LINE_SIZE); - + setup_base = (void*)0x90000; /* Relocated */ } - + /* It is recommended to clear memory up to the 32K mark */ memset((void*)0x90000 + setup_size, 0, SETUP_MAX_SIZE-setup_size); } - + if (bootproto >= 0x0200) { *(u8*)(setup_base + TYPE_OF_LOADER_OFF) = 0xff; - printf("Linux kernel version %s\n", - (char*)(setup_base + SETUP_START_OFFSET + + printf("Linux kernel version %s\n", + (char*)(setup_base + SETUP_START_OFFSET + *(u16*)(setup_base + START_SYS_OFF + 2))); - + if (initrd_addr) { printf("Initial RAM disk at linear address 0x%08lx, size %ld bytes\n", initrd_addr, initrd_size); - + *(u32*)(setup_base + RAMDISK_IMAGE_OFF) = initrd_addr; *(u32*)(setup_base + RAMDISK_SIZE_OFF)=initrd_size; } } - + if (bootproto >= 0x0201) { *(u16*)(setup_base + HEAP_END_PTR_OFF) = HEAP_END_OFFSET; - + /* CAN_USE_HEAP */ - *(u8*)(setup_base + LOADFLAGS_OFF) = + *(u8*)(setup_base + LOADFLAGS_OFF) = *(u8*)(setup_base + LOADFLAGS_OFF) | HEAP_FLAG; } - + if (bootproto >= 0x0202) { *(u32*)(setup_base + CMD_LINE_PTR_OFF) = (u32)setup_base + COMMAND_LINE_OFFSET; } else if (bootproto >= 0x0200) { *(u16*)(setup_base + CMD_LINE_MAGIC_OFF) = COMMAND_LINE_MAGIC; - *(u16*)(setup_base + CMD_LINE_OFFSET_OFF) = COMMAND_LINE_OFFSET; + *(u16*)(setup_base + CMD_LINE_OFFSET_OFF) = COMMAND_LINE_OFFSET; *(u16*)(setup_base + SETUP_MOVE_SIZE_OFF) = 0x9100; } - - + if (big_image) { - if ((kernel_size - setup_size) > BZIMAGE_MAX_SIZE) { + if ((kernel_size - setup_size) > BZIMAGE_MAX_SIZE) { printf("Error: bzImage kernel too big! (size: %ld, max: %d)\n", kernel_size - setup_size, BZIMAGE_MAX_SIZE); return 0; } - + } else if ((kernel_size - setup_size) > ZIMAGE_MAX_SIZE) { printf("Error: zImage kernel too big! (size: %ld, max: %d)\n", kernel_size - setup_size, ZIMAGE_MAX_SIZE); return 0; } - + /* build command line at COMMAND_LINE_OFFSET */ build_command_line(setup_base + COMMAND_LINE_OFFSET, auto_boot); - - printf("Loading %czImage at address 0x%08x (%ld bytes)\n", big_image ? 'b' : ' ', + + printf("Loading %czImage at address 0x%08x (%ld bytes)\n", big_image ? 'b' : ' ', (u32)load_address, kernel_size - setup_size); - + memmove(load_address, image + setup_size, kernel_size - setup_size); - + /* ready for booting */ return setup_base; } @@ -217,7 +216,7 @@ void boot_zimage(void *setup_base) { struct pt_regs regs; - + memset(®s, 0, sizeof(struct pt_regs)); regs.xds = (u32)setup_base >> 4; regs.xss = 0x9000; @@ -228,18 +227,18 @@ image_header_t *fake_zimage_header(image_header_t *hdr, void *ptr, int size) -{ +{ /* There is no way to know the size of a zImage ... * * so we assume that 2MB will be enough for now */ #define ZIMAGE_SIZE 0x200000 - + /* load a 1MB, the loaded will have to be moved to its final * position again later... */ #define ZIMAGE_LOAD 0x100000 - + ulong checksum; - - if (KERNEL_MAGIC != *(u16*)(ptr + BOOT_FLAG_OFF)) { + + if (KERNEL_MAGIC != *(u16*)(ptr + BOOT_FLAG_OFF)) { /* not a zImage or bzImage */ return NULL; } @@ -247,13 +246,13 @@ if (-1 == size) { size = ZIMAGE_SIZE; } -#if 0 +#if 0 checksum = crc32 (0, ptr, size); #else checksum = 0; -#endif +#endif memset(hdr, 0, sizeof(image_header_t)); - + /* Build new header */ hdr->ih_magic = htonl(IH_MAGIC); hdr->ih_time = 0; @@ -271,6 +270,6 @@ checksum = crc32(0,(const char *)hdr,sizeof(image_header_t)); hdr->ih_hcrc = htonl(checksum); - + return hdr; } diff --git a/lib_mips/Makefile b/lib_mips/Makefile index 540383d..d5980e6 100644 --- a/lib_mips/Makefile +++ b/lib_mips/Makefile @@ -25,7 +25,7 @@ LIB = lib$(ARCH).a -AOBJS = +AOBJS = COBJS = board.o time.o mips_linux.o diff --git a/lib_mips/board.c b/lib_mips/board.c index 2bbf029..11e5011 100644 --- a/lib_mips/board.c +++ b/lib_mips/board.c @@ -212,7 +212,7 @@ #ifdef DEBUG printf ("Top of RAM usable for U-Boot at: %08lx\n", addr); #endif - + /* Reserve memory for U-Boot code, data & bss * round down to next 16 kB limit */ @@ -304,7 +304,6 @@ void board_init_r (gd_t *id, ulong dest_addr) { DECLARE_GLOBAL_DATA_PTR; - cmd_tbl_t *cmdtp; ulong size; extern void malloc_bin_reloc (void); @@ -329,7 +328,7 @@ /* * We have to relocate the command table manually */ - for (cmdtp = &cmd_tbl[0]; cmdtp->name; cmdtp++) { + for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { ulong addr; addr = (ulong) (cmdtp->cmd) + gd->reloc_off; @@ -358,7 +357,7 @@ #ifndef CFG_ENV_IS_NOWHERE env_name_spec += gd->reloc_off; #endif - + /* configure available FLASH banks */ size = flash_init(); display_flash_config (size); @@ -434,4 +433,3 @@ puts ("### ERROR ### Please RESET the board ###\n"); for (;;); } - diff --git a/lib_mips/mips_linux.c b/lib_mips/mips_linux.c index e73d4d8..5469d50 100644 --- a/lib_mips/mips_linux.c +++ b/lib_mips/mips_linux.c @@ -23,7 +23,6 @@ #include #include -#include #include #include #include @@ -41,6 +40,8 @@ extern image_header_t header; /* from cmd_bootm.c */ +extern int do_reset (cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]); + static int linux_argc; static char ** linux_argv; @@ -112,7 +113,7 @@ csum = crc32 (0, (char *)data, len); if (csum != ntohl(hdr->ih_dcrc)) { printf ("Bad Data CRC\n"); - SHOW_BOOT_PROGRESS (-12); + SHOW_BOOT_PROGRESS (-12); do_reset (cmdtp, flag, argc, argv); } printf ("OK\n"); @@ -154,7 +155,7 @@ /* * no initrd image */ - SHOW_BOOT_PROGRESS (14); + SHOW_BOOT_PROGRESS (14); data = 0; } @@ -219,19 +220,19 @@ quote = strchr (line, '"'); next = strchr (line, ' '); - while (next != NULL && quote != NULL && quote < next) + while (next != NULL && quote != NULL && quote < next) { /* we found a left quote before the next blank - * now we have to find the matching right quote - */ - next = strchr (quote + 1, '"'); - if (next != NULL) + * now we have to find the matching right quote + */ + next = strchr (quote + 1, '"'); + if (next != NULL) { - quote = strchr (next + 1, '"'); - next = strchr (next + 1, ' '); - } - } - + quote = strchr (next + 1, '"'); + next = strchr (next + 1, ' '); + } + } + if (next == NULL) { next = line + strlen (line); @@ -243,9 +244,9 @@ argp += next - line + 1; linux_argc ++; - + if (*next) next ++; - + line = next; } @@ -269,7 +270,7 @@ strcpy (linux_env_p, env_val); linux_env_p += strlen (env_val); - + linux_env_p ++; linux_env [++ linux_env_idx] = 0; } diff --git a/lib_mips/time.c b/lib_mips/time.c index 9e6138d..0cb733c 100644 --- a/lib_mips/time.c +++ b/lib_mips/time.c @@ -99,5 +99,3 @@ { return CFG_HZ; } - - diff --git a/lib_ppc/board.c b/lib_ppc/board.c index 9bc77b5..044d8f8 100644 --- a/lib_ppc/board.c +++ b/lib_ppc/board.c @@ -46,9 +46,6 @@ #include #endif #include -#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) -#include -#endif #ifdef CFG_ALLOC_DPRAM #if !defined(CONFIG_8260) #include @@ -95,9 +92,12 @@ extern ulong __init_end; extern ulong _end; - ulong monitor_flash_len; +#if (CONFIG_COMMANDS & CFG_CMD_BEDBUG) +#include +#endif + /* * Begin and End of memory area for malloc(), and current "brk" */ @@ -382,7 +382,7 @@ * relocate the code and continue running from DRAM. * * Reserve memory at end of RAM for (top down in that order): - * - kernel log buffer + * - kernel log buffer * - protected RAM * - LCD framebuffer * - monitor code @@ -570,7 +570,6 @@ void board_init_r (gd_t *id, ulong dest_addr) { DECLARE_GLOBAL_DATA_PTR; - cmd_tbl_t *cmdtp; char *s, *e; bd_t *bd; @@ -596,15 +595,14 @@ WATCHDOG_RESET (); gd->reloc_off = dest_addr - CFG_MONITOR_BASE; - + monitor_flash_len = (ulong)&__init_end - dest_addr; /* * We have to relocate the command table manually */ - for (cmdtp = &cmd_tbl[0]; cmdtp->name; cmdtp++) { + for (cmdtp = &__u_boot_cmd_start; cmdtp != &__u_boot_cmd_end; cmdtp++) { ulong addr; - addr = (ulong) (cmdtp->cmd) + gd->reloc_off; #if 0 printf ("Command \"%s\": 0x%08lx => 0x%08lx\n", @@ -737,10 +735,10 @@ /* * Fill in missing fields of bd_info. - * We do this here, where we have "normal" access to the - * environment; we used to do this still running from ROM, - * where had to use getenv_r(), which can be pretty slow when - * the environment is in EEPROM. + * We do this here, where we have "normal" access to the + * environment; we used to do this still running from ROM, + * where had to use getenv_r(), which can be pretty slow when + * the environment is in EEPROM. */ s = getenv ("ethaddr"); #if defined (CONFIG_MBX) || defined (CONFIG_RPXCLASSIC) || defined(CONFIG_IAD210) diff --git a/lib_ppc/extable.c b/lib_ppc/extable.c index 2f90df0..d92f142 100644 --- a/lib_ppc/extable.c +++ b/lib_ppc/extable.c @@ -50,20 +50,20 @@ const struct exception_table_entry *last, unsigned long value) { - while (first <= last) { + while (first <= last) { const struct exception_table_entry *mid; long diff; mid = (last - first) / 2 + first; diff = mid->insn - value; - if (diff == 0) - return mid->fixup; - else if (diff < 0) - first = mid+1; - else - last = mid-1; - } - return 0; + if (diff == 0) + return mid->fixup; + else if (diff < 0) + first = mid+1; + else + last = mid-1; + } + return 0; } int ex_tab_message = 1; diff --git a/lib_ppc/kgdb.c b/lib_ppc/kgdb.c index cef35d3..4c5d79a 100644 --- a/lib_ppc/kgdb.c +++ b/lib_ppc/kgdb.c @@ -320,7 +320,7 @@ { asm(" .globl breakinst\n\ breakinst: .long 0x7d821008\n\ - "); + "); } #endif /* CFG_CMD_KGDB */ diff --git a/lib_ppc/time.c b/lib_ppc/time.c index 3b3c50e..51e8e840 100644 --- a/lib_ppc/time.c +++ b/lib_ppc/time.c @@ -97,4 +97,3 @@ return (0); } /* ------------------------------------------------------------------------- */ - diff --git a/net/bootp.c b/net/bootp.c index 8e0f332..31b2243 100644 --- a/net/bootp.c +++ b/net/bootp.c @@ -124,7 +124,7 @@ debug ("Bootfile: %s\n", BootFile); /* Propagate to environment: - * don't delete exising entry when BOOTP / DHCP reply does + * don't delete exising entry when BOOTP / DHCP reply does * not contain a new value */ if (*BootFile) { @@ -213,16 +213,16 @@ break; case 18: /* Extension path - Not yet supported */ /* - * This can be used to send the information of the - * vendor area in another file that the client can - * access via TFTP. + * This can be used to send the information of the + * vendor area in another file that the client can + * access via TFTP. */ break; /* IP host layer fields */ case 40: /* NIS Domain name */ if (NetOurNISDomain[0] == 0) { size = truncate_sz ("NIS Domain Name", - sizeof(NetOurNISDomain), + sizeof(NetOurNISDomain), size); memcpy(&NetOurNISDomain, ext+2, size); NetOurNISDomain[size] = 0 ; @@ -231,8 +231,8 @@ /* Application layer fields */ case 43: /* Vendor specific info - Not yet supported */ /* - * Binary information to exchange specific - * product information. + * Binary information to exchange specific + * product information. */ break; /* Reserved (custom) fields (128..254) */ @@ -283,7 +283,7 @@ } if (NetOurNISDomain[0]) { - printf("NetOurNISDomain : %s\n", NetOurNISDomain); + printf("NetOurNISDomain : %s\n", NetOurNISDomain); } if (NetBootFileSize) { @@ -381,7 +381,7 @@ *e++ = (576-312+OPT_SIZE) & 0xff; if ( ServerID ) { - int tmp = ntohl(ServerID); + int tmp = ntohl(ServerID); *e++ = 54; /* ServerID */ *e++ = 4; @@ -392,7 +392,7 @@ } if ( RequestedIP ) { - int tmp = ntohl(RequestedIP); + int tmp = ntohl(RequestedIP); *e++ = 50; /* Requested IP */ *e++ = 4; @@ -404,7 +404,7 @@ #if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX) if ((x = dhcp_vendorex_prep (e))) - return x - start ; + return x - start ; #endif *e++ = 55; /* Parameter Request List */ @@ -590,7 +590,7 @@ sum = seed1 + seed2; if (sum < seed1 || sum < seed2) sum++; - seed2 = seed1; + seed2 = seed1; seed1 = sum; if (BootpTry<=2) { /* Start with max 1024 * 1ms */ @@ -722,7 +722,7 @@ default: #if (CONFIG_BOOTP_MASK & CONFIG_BOOTP_VENDOREX) if (dhcp_vendorex_proc(popt)) - break; + break; #endif printf("*** Unhandled DHCP Option in OFFER/ACK: %d\n", *popt); diff --git a/net/eth.c b/net/eth.c index 5f9c3a6..468b84c 100644 --- a/net/eth.c +++ b/net/eth.c @@ -100,7 +100,7 @@ eth_current = NULL; #if defined(CONFIG_405GP) || defined(CONFIG_440) || defined(CONFIG_405EP) - ppc_4xx_eth_initialize(bis); + ppc_4xx_eth_initialize(bis); #endif #ifdef CONFIG_INCA_IP_SWITCH inca_switch_initialize(bis); diff --git a/net/net.c b/net/net.c index 3081829..ce79341 100644 --- a/net/net.c +++ b/net/net.c @@ -175,9 +175,9 @@ } NetArpWaitReplyIP = NetOurGatewayIP; } else - NetArpWaitReplyIP = NetArpWaitPacketIP; + NetArpWaitReplyIP = NetArpWaitPacketIP; - NetWriteIP((uchar*)&arp->ar_data[16], NetArpWaitReplyIP); + NetWriteIP((uchar*)&arp->ar_data[16], NetArpWaitReplyIP); (void) eth_send(NetTxPacket, ETHER_HDR_SIZE + ARP_HDR_SIZE); } @@ -295,8 +295,8 @@ case BOOTP: case RARP: /* - * initialize our IP addr to 0 in order to accept ANY - * IP addr assigned to us by the BOOTP / RARP server + * initialize our IP addr to 0 in order to accept ANY + * IP addr assigned to us by the BOOTP / RARP server */ NetOurIP = 0; NetServerIP = 0; @@ -380,7 +380,7 @@ * Abort if ctrl-c was pressed. */ if (ctrlc()) { - eth_halt(); + eth_halt(); printf("\nAbort\n"); return (-1); } @@ -671,12 +671,12 @@ case PROT_ARP: /* * We have to deal with two types of ARP packets: - * - REQUEST packets will be answered by sending our - * IP address - if we know it. - * - REPLY packates are expected only after we asked - * for the TFTP server's or the gateway's ethernet - * address; so if we receive such a packet, we set - * the server ethernet address + * - REQUEST packets will be answered by sending our + * IP address - if we know it. + * - REPLY packates are expected only after we asked + * for the TFTP server's or the gateway's ethernet + * address; so if we receive such a packet, we set + * the server ethernet address */ #ifdef ET_DEBUG printf("Got ARP\n"); @@ -818,19 +818,19 @@ /* * watch for ICMP host redirects * - * There is no real handler code (yet). We just watch - * for ICMP host redirect messages. In case anybody - * sees these messages: please contact me - * (wd@denx.de), or - even better - send me the - * necessary fixes :-) + * There is no real handler code (yet). We just watch + * for ICMP host redirect messages. In case anybody + * sees these messages: please contact me + * (wd@denx.de), or - even better - send me the + * necessary fixes :-) * - * Note: in all cases where I have seen this so far - * it was a problem with the router configuration, - * for instance when a router was configured in the - * BOOTP reply, but the TFTP server was on the same - * subnet. So this is probably a warning that your - * configuration might be wrong. But I'm not really - * sure if there aren't any other situations. + * Note: in all cases where I have seen this so far + * it was a problem with the router configuration, + * for instance when a router was configured in the + * BOOTP reply, but the TFTP server was on the same + * subnet. So this is probably a warning that your + * configuration might be wrong. But I'm not really + * sure if there aren't any other situations. */ if (ip->ip_p == IPPROTO_ICMP) { ICMP_t *icmph = (ICMP_t *)&(ip->udp_src); @@ -918,7 +918,7 @@ puts ("*** ERROR: `ethaddr' not set\n"); break; default: - printf ("*** ERROR: `eth%daddr' not set\n", + printf ("*** ERROR: `eth%daddr' not set\n", num); break; } @@ -1023,7 +1023,7 @@ { x = ntohl(x); sprintf (s,"%d.%d.%d.%d", - (int)((x >> 24) & 0xff), + (int)((x >> 24) & 0xff), (int)((x >> 16) & 0xff), (int)((x >> 8) & 0xff), (int)((x >> 0) & 0xff) diff --git a/post/cpu/b.c b/post/cpu/b.c index 1ae22cc..b4b17c8 100644 --- a/post/cpu/b.c +++ b/post/cpu/b.c @@ -84,8 +84,8 @@ } if (ret == 0) { - if (link) - ret = lr == (ulong) code + 24 ? 0 : -1; + if (link) + ret = lr == (ulong) code + 24 ? 0 : -1; else ret = lr == 0 ? 0 : -1; } @@ -100,7 +100,7 @@ if (ret == 0) { - ulong code[] = + ulong code[] = { ASM_MFLR(4), ASM_MTLR(3), @@ -115,15 +115,15 @@ ret = res == 0 ? 0 : -1; - if (ret != 0) - { - post_log ("Error at b1 test !\n"); - } + if (ret != 0) + { + post_log ("Error at b1 test !\n"); + } } if (ret == 0) { - ulong code[] = + ulong code[] = { ASM_MFLR(4), ASM_MTLR(3), @@ -138,15 +138,15 @@ ret = res == (ulong)code + 12 ? 0 : -1; - if (ret != 0) - { - post_log ("Error at b2 test !\n"); - } + if (ret != 0) + { + post_log ("Error at b2 test !\n"); + } } if (ret == 0) { - ulong cc, cd; + ulong cc, cd; int cond; ulong ctr; int link; @@ -157,30 +157,30 @@ { for (cd = 0; cd < 4 && ret == 0; cd++) { - for (link = 0; link <= 1 && ret == 0; link++) + for (link = 0; link <= 1 && ret == 0; link++) { for (cond = 0; cond <= 1 && ret == 0; cond++) { - for (ctr = 1; ctr <= 2 && ret == 0; ctr++) + for (ctr = 1; ctr <= 2 && ret == 0; ctr++) { int dec = cd < 2; int cr = cond ? 0x80000000 : 0x00000000; int jumpc = cc >= 2 || - (cc == 0 && !cond) || - (cc == 1 && cond); + (cc == 0 && !cond) || + (cc == 1 && cond); int jumpd = cd >= 2 || - (cd == 0 && ctr != 1) || - (cd == 1 && ctr == 1); + (cd == 0 && ctr != 1) || + (cd == 1 && ctr == 1); int jump = jumpc && jumpd; ret = cpu_post_test_bc (link ? OP_BCL : OP_BC, - (cc << 3) + (cd << 1), 0, jump, dec, link, + (cc << 3) + (cd << 1), 0, jump, dec, link, ctr, cr); - if (ret != 0) - { - post_log ("Error at b3 test %d !\n", i); - } + if (ret != 0) + { + post_log ("Error at b3 test %d !\n", i); + } i++; } diff --git a/post/cpu/complex.c b/post/cpu/complex.c index dc8b080..033584b 100644 --- a/post/cpu/complex.c +++ b/post/cpu/complex.c @@ -116,7 +116,7 @@ if (ret != 0) { - post_log ("Error at complex test !\n"); + post_log ("Error at complex test !\n"); } return ret; diff --git a/post/cpu/cr.c b/post/cpu/cr.c index 8e38729..da6ef37 100644 --- a/post/cpu/cr.c +++ b/post/cpu/cr.c @@ -70,11 +70,11 @@ } cpu_post_cr_table2[] = { { - 0xa0000000, + 0xa0000000, 1 }, { - 0x40000000, + 0x40000000, 5 }, }; @@ -89,13 +89,13 @@ } cpu_post_cr_table3[] = { { - 0x01234567, + 0x01234567, 0, 4, 0x01230567 }, { - 0x01234567, + 0x01234567, 7, 0, 0x71234567 @@ -115,131 +115,131 @@ { { OP_CRAND, - 0x0000ffff, + 0x0000ffff, 0, 16, 0, - 0x0000ffff + 0x0000ffff }, { OP_CRAND, - 0x0000ffff, + 0x0000ffff, 16, 17, 0, - 0x8000ffff + 0x8000ffff }, { OP_CRANDC, - 0x0000ffff, + 0x0000ffff, 0, 16, 0, - 0x0000ffff + 0x0000ffff }, { OP_CRANDC, - 0x0000ffff, + 0x0000ffff, 16, 0, 0, - 0x8000ffff + 0x8000ffff }, { OP_CROR, - 0x0000ffff, + 0x0000ffff, 0, 16, 0, - 0x8000ffff + 0x8000ffff }, { OP_CROR, - 0x0000ffff, + 0x0000ffff, 0, 1, 0, - 0x0000ffff + 0x0000ffff }, { OP_CRORC, - 0x0000ffff, + 0x0000ffff, 0, 16, 0, - 0x0000ffff + 0x0000ffff }, { OP_CRORC, - 0x0000ffff, + 0x0000ffff, 0, 0, 0, - 0x8000ffff + 0x8000ffff }, { OP_CRXOR, - 0x0000ffff, + 0x0000ffff, 0, 0, 0, - 0x0000ffff + 0x0000ffff }, { OP_CRXOR, - 0x0000ffff, + 0x0000ffff, 0, 16, 0, - 0x8000ffff + 0x8000ffff }, { OP_CRNAND, - 0x0000ffff, + 0x0000ffff, 0, 16, 0, - 0x8000ffff + 0x8000ffff }, { OP_CRNAND, - 0x0000ffff, + 0x0000ffff, 16, 17, 0, - 0x0000ffff + 0x0000ffff }, { OP_CRNOR, - 0x0000ffff, + 0x0000ffff, 0, 16, 0, - 0x0000ffff + 0x0000ffff }, { OP_CRNOR, - 0x0000ffff, + 0x0000ffff, 0, 1, 0, - 0x8000ffff + 0x8000ffff }, { OP_CREQV, - 0x0000ffff, + 0x0000ffff, 0, 0, 0, - 0x8000ffff + 0x8000ffff }, { OP_CREQV, - 0x0000ffff, + 0x0000ffff, 0, 16, 0, - 0x0000ffff + 0x0000ffff }, }; static unsigned int cpu_post_cr_size4 = @@ -258,7 +258,7 @@ ulong cr = cpu_post_cr_table1[i]; ulong res; - unsigned long code[] = + unsigned long code[] = { ASM_MTCR(3), ASM_MFCR(3), @@ -269,10 +269,10 @@ ret = res == cr ? 0 : -1; - if (ret != 0) - { - post_log ("Error at cr1 test %d !\n", i); - } + if (ret != 0) + { + post_log ("Error at cr1 test %d !\n", i); + } } for (i = 0; i < cpu_post_cr_size2 && ret == 0; i++) @@ -281,7 +281,7 @@ ulong res; ulong xer; - unsigned long code[] = + unsigned long code[] = { ASM_MTXER(3), ASM_MCRXR(test->cr), @@ -295,10 +295,10 @@ ret = xer == 0 && ((res << (4 * test->cr)) & 0xe0000000) == test->xer ? 0 : -1; - if (ret != 0) - { - post_log ("Error at cr2 test %d !\n", i); - } + if (ret != 0) + { + post_log ("Error at cr2 test %d !\n", i); + } } for (i = 0; i < cpu_post_cr_size3 && ret == 0; i++) @@ -306,7 +306,7 @@ struct cpu_post_cr_s3 *test = cpu_post_cr_table3 + i; ulong res; - unsigned long code[] = + unsigned long code[] = { ASM_MTCR(3), ASM_MCRF(test->cd, test->cs), @@ -318,10 +318,10 @@ ret = res == test->res ? 0 : -1; - if (ret != 0) - { - post_log ("Error at cr3 test %d !\n", i); - } + if (ret != 0) + { + post_log ("Error at cr3 test %d !\n", i); + } } for (i = 0; i < cpu_post_cr_size4 && ret == 0; i++) @@ -329,7 +329,7 @@ struct cpu_post_cr_s4 *test = cpu_post_cr_table4 + i; ulong res; - unsigned long code[] = + unsigned long code[] = { ASM_MTCR(3), ASM_12F(test->cmd, test->op3, test->op1, test->op2), @@ -341,10 +341,10 @@ ret = res == test->res ? 0 : -1; - if (ret != 0) - { - post_log ("Error at cr4 test %d !\n", i); - } + if (ret != 0) + { + post_log ("Error at cr4 test %d !\n", i); + } } asm ( "mtcr %0" : : "r" (cr_sav)); diff --git a/post/cpu/load.c b/post/cpu/load.c index b3418ef..393c568 100644 --- a/post/cpu/load.c +++ b/post/cpu/load.c @@ -61,112 +61,112 @@ } cpu_post_load_table[] = { { - OP_LWZ, + OP_LWZ, 4, 0, 0, 4 }, { - OP_LHA, + OP_LHA, 3, 0, 0, 2 }, { - OP_LHZ, + OP_LHZ, 2, 0, 0, 2 }, { - OP_LBZ, + OP_LBZ, 1, 0, 0, 1 }, { - OP_LWZU, + OP_LWZU, 4, 1, 0, 4 }, { - OP_LHAU, + OP_LHAU, 3, 1, 0, 2 }, { - OP_LHZU, + OP_LHZU, 2, 1, 0, 2 }, { - OP_LBZU, + OP_LBZU, 1, 1, 0, 1 }, { - OP_LWZX, + OP_LWZX, 4, 0, 1, 4 }, { - OP_LHAX, + OP_LHAX, 3, 0, 1, 2 }, { - OP_LHZX, + OP_LHZX, 2, 0, 1, 2 }, { - OP_LBZX, + OP_LBZX, 1, 0, 1, 1 }, { - OP_LWZUX, + OP_LWZUX, 4, 1, 1, 4 }, { - OP_LHAUX, + OP_LHAUX, 3, 1, 1, 2 }, { - OP_LHZUX, + OP_LHZUX, 2, 1, 1, 2 }, { - OP_LBZUX, + OP_LBZUX, 1, 1, 1, @@ -186,7 +186,7 @@ struct cpu_post_load_s *test = cpu_post_load_table + i; uchar data[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; - ulong base0 = (ulong) (data + 8); + ulong base0 = (ulong) (data + 8); ulong base = base0; ulong value; @@ -194,7 +194,7 @@ { ulong code[] = { - ASM_12(test->cmd, 5, 3, 4), + ASM_12(test->cmd, 5, 3, 4), ASM_BLR, }; @@ -204,7 +204,7 @@ { ulong code[] = { - ASM_11I(test->cmd, 4, 3, test->offset), + ASM_11I(test->cmd, 4, 3, test->offset), ASM_BLR, }; @@ -224,27 +224,27 @@ switch (test->width) { case 1: - ret = *(uchar *)(base0 + test->offset) == value ? + ret = *(uchar *)(base0 + test->offset) == value ? 0 : -1; - break; + break; case 2: - ret = *(ushort *)(base0 + test->offset) == value ? + ret = *(ushort *)(base0 + test->offset) == value ? 0 : -1; - break; + break; case 3: - ret = *(short *)(base0 + test->offset) == value ? + ret = *(short *)(base0 + test->offset) == value ? 0 : -1; - break; + break; case 4: - ret = *(ulong *)(base0 + test->offset) == value ? + ret = *(ulong *)(base0 + test->offset) == value ? 0 : -1; - break; + break; } } if (ret != 0) { - post_log ("Error at load test %d !\n", i); + post_log ("Error at load test %d !\n", i); } } diff --git a/post/cpu/multi.c b/post/cpu/multi.c index bdad5d9..8724384 100644 --- a/post/cpu/multi.c +++ b/post/cpu/multi.c @@ -51,7 +51,7 @@ { ulong src [26], dst [26]; - ulong code[] = + ulong code[] = { ASM_LMW(5, 3, 0), ASM_STMW(5, 4, 0), @@ -71,7 +71,7 @@ if (ret != 0) { - post_log ("Error at multi test !\n"); + post_log ("Error at multi test !\n"); } return ret; diff --git a/post/cpu/store.c b/post/cpu/store.c index e5189c7..f495bf2 100644 --- a/post/cpu/store.c +++ b/post/cpu/store.c @@ -62,7 +62,7 @@ } cpu_post_store_table[] = { { - OP_STW, + OP_STW, 4, 0, 0, @@ -70,7 +70,7 @@ 0xff00ff00 }, { - OP_STH, + OP_STH, 2, 0, 0, @@ -78,7 +78,7 @@ 0xff00 }, { - OP_STB, + OP_STB, 1, 0, 0, @@ -86,7 +86,7 @@ 0xff }, { - OP_STWU, + OP_STWU, 4, 1, 0, @@ -94,7 +94,7 @@ 0xff00ff00 }, { - OP_STHU, + OP_STHU, 2, 1, 0, @@ -102,7 +102,7 @@ 0xff00 }, { - OP_STBU, + OP_STBU, 1, 1, 0, @@ -110,7 +110,7 @@ 0xff }, { - OP_STWX, + OP_STWX, 4, 0, 1, @@ -118,7 +118,7 @@ 0xff00ff00 }, { - OP_STHX, + OP_STHX, 2, 0, 1, @@ -126,7 +126,7 @@ 0xff00 }, { - OP_STBX, + OP_STBX, 1, 0, 1, @@ -134,7 +134,7 @@ 0xff }, { - OP_STWUX, + OP_STWUX, 4, 1, 1, @@ -142,7 +142,7 @@ 0xff00ff00 }, { - OP_STHUX, + OP_STHUX, 2, 1, 1, @@ -150,7 +150,7 @@ 0xff00 }, { - OP_STBUX, + OP_STBUX, 1, 1, 1, @@ -171,14 +171,14 @@ struct cpu_post_store_s *test = cpu_post_store_table + i; uchar data[16] = { 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15 }; - ulong base0 = (ulong) (data + 8); + ulong base0 = (ulong) (data + 8); ulong base = base0; if (test->index) { ulong code[] = { - ASM_12(test->cmd, 5, 3, 4), + ASM_12(test->cmd, 5, 3, 4), ASM_BLR, }; @@ -188,7 +188,7 @@ { ulong code[] = { - ASM_11I(test->cmd, 4, 3, test->offset), + ASM_11I(test->cmd, 4, 3, test->offset), ASM_BLR, }; @@ -208,23 +208,23 @@ switch (test->width) { case 1: - ret = *(uchar *)(base0 + test->offset) == test->value ? + ret = *(uchar *)(base0 + test->offset) == test->value ? 0 : -1; - break; + break; case 2: - ret = *(ushort *)(base0 + test->offset) == test->value ? + ret = *(ushort *)(base0 + test->offset) == test->value ? 0 : -1; - break; + break; case 4: - ret = *(ulong *)(base0 + test->offset) == test->value ? + ret = *(ulong *)(base0 + test->offset) == test->value ? 0 : -1; - break; + break; } } if (ret != 0) { - post_log ("Error at store test %d !\n", i); + post_log ("Error at store test %d !\n", i); } } diff --git a/post/cpu/string.c b/post/cpu/string.c index a19a755..bd83bd1 100644 --- a/post/cpu/string.c +++ b/post/cpu/string.c @@ -54,7 +54,7 @@ { char src [31], dst [31]; - ulong code[] = + ulong code[] = { ASM_LSWI(5, 3, 31), ASM_STSWI(5, 4, 31), @@ -76,7 +76,7 @@ { char src [95], dst [95]; - ulong code[] = + ulong code[] = { ASM_LSWX(8, 3, 5), ASM_STSWX(8, 4, 5), @@ -96,7 +96,7 @@ if (ret != 0) { - post_log ("Error at string test !\n"); + post_log ("Error at string test !\n"); } return ret; diff --git a/post/cpu/two.c b/post/cpu/two.c index 6075714..cfbac5e 100644 --- a/post/cpu/two.c +++ b/post/cpu/two.c @@ -53,32 +53,32 @@ } cpu_post_two_table[] = { { - OP_NEG, + OP_NEG, 3, -3 }, { - OP_NEG, + OP_NEG, 5, -5 }, { - OP_ADDME, + OP_ADDME, 6, 5 }, { - OP_ADDZE, + OP_ADDZE, 5, 5 }, { - OP_SUBFME, + OP_SUBFME, 6, ~6 - 1 }, { - OP_SUBFZE, + OP_SUBFZE, 5, ~5 }, @@ -101,7 +101,7 @@ unsigned int reg0 = (reg + 0) % 32; unsigned int reg1 = (reg + 1) % 32; unsigned int stk = reg < 16 ? 31 : 15; - unsigned long code[] = + unsigned long code[] = { ASM_STW(stk, 1, -4), ASM_ADDI(stk, 1, -16), @@ -118,7 +118,7 @@ ASM_LWZ(stk, 1, -4), ASM_BLR, }; - unsigned long codecr[] = + unsigned long codecr[] = { ASM_STW(stk, 1, -4), ASM_ADDI(stk, 1, -16), @@ -140,34 +140,34 @@ if (ret == 0) { - cr = 0; - cpu_post_exec_21 (code, & cr, & res, test->op); + cr = 0; + cpu_post_exec_21 (code, & cr, & res, test->op); - ret = res == test->res && cr == 0 ? 0 : -1; + ret = res == test->res && cr == 0 ? 0 : -1; - if (ret != 0) - { - post_log ("Error at two test %d !\n", i); - } + if (ret != 0) + { + post_log ("Error at two test %d !\n", i); + } } if (ret == 0) { - cpu_post_exec_21 (codecr, & cr, & res, test->op); + cpu_post_exec_21 (codecr, & cr, & res, test->op); - ret = res == test->res && + ret = res == test->res && (cr & 0xe0000000) == cpu_post_makecr (res) ? 0 : -1; - if (ret != 0) - { - post_log ("Error at two test %d !\n", i); - } + if (ret != 0) + { + post_log ("Error at two test %d !\n", i); + } } } } if (flag) - enable_interrupts(); + enable_interrupts(); return ret; } diff --git a/post/post.c b/post/post.c index d512533..9d62f40 100644 --- a/post/post.c +++ b/post/post.c @@ -50,7 +50,7 @@ res = -1; } } - + gd->post_init_f_time = post_time_ms(0); if (!gd->post_init_f_time) { @@ -398,7 +398,7 @@ if (test->reloc) { addr = (ulong) (test->reloc) + gd->reloc_off; test->reloc = (void (*)(void)) addr; - + test->reloc(); } } diff --git a/post/spr.c b/post/spr.c index 97f7610..330b977 100644 --- a/post/spr.c +++ b/post/spr.c @@ -48,66 +48,66 @@ } spr_test_list [] = { /* Standard Special-Purpose Registers */ - {1, "XER", 0x00000000, 0x00000000}, - {8, "LR", 0x00000000, 0x00000000}, - {9, "CTR", 0x00000000, 0x00000000}, - {18, "DSISR", 0x00000000, 0x00000000}, - {19, "DAR", 0x00000000, 0x00000000}, - {22, "DEC", 0x00000000, 0x00000000}, - {26, "SRR0", 0x00000000, 0x00000000}, - {27, "SRR1", 0x00000000, 0x00000000}, - {272, "SPRG0", 0x00000000, 0x00000000}, - {273, "SPRG1", 0x00000000, 0x00000000}, - {274, "SPRG2", 0x00000000, 0x00000000}, - {275, "SPRG3", 0x00000000, 0x00000000}, - {287, "PVR", 0xFFFF0000, 0x00500000}, + {1, "XER", 0x00000000, 0x00000000}, + {8, "LR", 0x00000000, 0x00000000}, + {9, "CTR", 0x00000000, 0x00000000}, + {18, "DSISR", 0x00000000, 0x00000000}, + {19, "DAR", 0x00000000, 0x00000000}, + {22, "DEC", 0x00000000, 0x00000000}, + {26, "SRR0", 0x00000000, 0x00000000}, + {27, "SRR1", 0x00000000, 0x00000000}, + {272, "SPRG0", 0x00000000, 0x00000000}, + {273, "SPRG1", 0x00000000, 0x00000000}, + {274, "SPRG2", 0x00000000, 0x00000000}, + {275, "SPRG3", 0x00000000, 0x00000000}, + {287, "PVR", 0xFFFF0000, 0x00500000}, /* Additional Special-Purpose Registers */ - {144, "CMPA", 0x00000000, 0x00000000}, - {145, "CMPB", 0x00000000, 0x00000000}, - {146, "CMPC", 0x00000000, 0x00000000}, - {147, "CMPD", 0x00000000, 0x00000000}, - {148, "ICR", 0xFFFFFFFF, 0x00000000}, - {149, "DER", 0x00000000, 0x00000000}, - {150, "COUNTA", 0xFFFFFFFF, 0x00000000}, - {151, "COUNTB", 0xFFFFFFFF, 0x00000000}, - {152, "CMPE", 0x00000000, 0x00000000}, - {153, "CMPF", 0x00000000, 0x00000000}, - {154, "CMPG", 0x00000000, 0x00000000}, - {155, "CMPH", 0x00000000, 0x00000000}, - {156, "LCTRL1", 0xFFFFFFFF, 0x00000000}, - {157, "LCTRL2", 0xFFFFFFFF, 0x00000000}, - {158, "ICTRL", 0xFFFFFFFF, 0x00000007}, - {159, "BAR", 0x00000000, 0x00000000}, - {630, "DPDR", 0x00000000, 0x00000000}, - {631, "DPIR", 0x00000000, 0x00000000}, - {638, "IMMR", 0xFFFF0000, CFG_IMMR }, - {560, "IC_CST", 0x8E380000, 0x00000000}, - {561, "IC_ADR", 0x00000000, 0x00000000}, - {562, "IC_DAT", 0x00000000, 0x00000000}, - {568, "DC_CST", 0xEF380000, 0x00000000}, - {569, "DC_ADR", 0x00000000, 0x00000000}, - {570, "DC_DAT", 0x00000000, 0x00000000}, - {784, "MI_CTR", 0xFFFFFFFF, 0x00000000}, - {786, "MI_AP", 0x00000000, 0x00000000}, - {787, "MI_EPN", 0x00000000, 0x00000000}, - {789, "MI_TWC", 0xFFFFFE02, 0x00000000}, - {790, "MI_RPN", 0x00000000, 0x00000000}, - {816, "MI_DBCAM", 0x00000000, 0x00000000}, - {817, "MI_DBRAM0", 0x00000000, 0x00000000}, - {818, "MI_DBRAM1", 0x00000000, 0x00000000}, - {792, "MD_CTR", 0xFFFFFFFF, 0x04000000}, - {793, "M_CASID", 0xFFFFFFF0, 0x00000000}, - {794, "MD_AP", 0x00000000, 0x00000000}, - {795, "MD_EPN", 0x00000000, 0x00000000}, - {796, "M_TWB", 0x00000003, 0x00000000}, - {797, "MD_TWC", 0x00000003, 0x00000000}, - {798, "MD_RPN", 0x00000000, 0x00000000}, - {799, "M_TW", 0x00000000, 0x00000000}, - {824, "MD_DBCAM", 0x00000000, 0x00000000}, - {825, "MD_DBRAM0", 0x00000000, 0x00000000}, - {826, "MD_DBRAM1", 0x00000000, 0x00000000}, + {144, "CMPA", 0x00000000, 0x00000000}, + {145, "CMPB", 0x00000000, 0x00000000}, + {146, "CMPC", 0x00000000, 0x00000000}, + {147, "CMPD", 0x00000000, 0x00000000}, + {148, "ICR", 0xFFFFFFFF, 0x00000000}, + {149, "DER", 0x00000000, 0x00000000}, + {150, "COUNTA", 0xFFFFFFFF, 0x00000000}, + {151, "COUNTB", 0xFFFFFFFF, 0x00000000}, + {152, "CMPE", 0x00000000, 0x00000000}, + {153, "CMPF", 0x00000000, 0x00000000}, + {154, "CMPG", 0x00000000, 0x00000000}, + {155, "CMPH", 0x00000000, 0x00000000}, + {156, "LCTRL1", 0xFFFFFFFF, 0x00000000}, + {157, "LCTRL2", 0xFFFFFFFF, 0x00000000}, + {158, "ICTRL", 0xFFFFFFFF, 0x00000007}, + {159, "BAR", 0x00000000, 0x00000000}, + {630, "DPDR", 0x00000000, 0x00000000}, + {631, "DPIR", 0x00000000, 0x00000000}, + {638, "IMMR", 0xFFFF0000, CFG_IMMR }, + {560, "IC_CST", 0x8E380000, 0x00000000}, + {561, "IC_ADR", 0x00000000, 0x00000000}, + {562, "IC_DAT", 0x00000000, 0x00000000}, + {568, "DC_CST", 0xEF380000, 0x00000000}, + {569, "DC_ADR", 0x00000000, 0x00000000}, + {570, "DC_DAT", 0x00000000, 0x00000000}, + {784, "MI_CTR", 0xFFFFFFFF, 0x00000000}, + {786, "MI_AP", 0x00000000, 0x00000000}, + {787, "MI_EPN", 0x00000000, 0x00000000}, + {789, "MI_TWC", 0xFFFFFE02, 0x00000000}, + {790, "MI_RPN", 0x00000000, 0x00000000}, + {816, "MI_DBCAM", 0x00000000, 0x00000000}, + {817, "MI_DBRAM0", 0x00000000, 0x00000000}, + {818, "MI_DBRAM1", 0x00000000, 0x00000000}, + {792, "MD_CTR", 0xFFFFFFFF, 0x04000000}, + {793, "M_CASID", 0xFFFFFFF0, 0x00000000}, + {794, "MD_AP", 0x00000000, 0x00000000}, + {795, "MD_EPN", 0x00000000, 0x00000000}, + {796, "M_TWB", 0x00000003, 0x00000000}, + {797, "MD_TWC", 0x00000003, 0x00000000}, + {798, "MD_RPN", 0x00000000, 0x00000000}, + {799, "M_TW", 0x00000000, 0x00000000}, + {824, "MD_DBCAM", 0x00000000, 0x00000000}, + {825, "MD_DBRAM0", 0x00000000, 0x00000000}, + {826, "MD_DBRAM1", 0x00000000, 0x00000000}, }; static int spr_test_list_size = diff --git a/post/sysmon.c b/post/sysmon.c index f069caa..30a5cb2 100644 --- a/post/sysmon.c +++ b/post/sysmon.c @@ -32,7 +32,7 @@ * This test performs the system hardware monitoring. * The test passes when all the following voltages and temperatures * are within allowed ranges: - * + * * Board temperature * Front temperature * +3.3V CPU logic @@ -40,7 +40,7 @@ * +12V PCMCIA * +12V CCFL * +5V standby - * + * * CCFL is not enabled if temperature values are not within allowed ranges * * See the list off all parameters in the sysmon_table below @@ -150,7 +150,7 @@ { (*l)->init(*l); } - + return 0; } @@ -185,24 +185,24 @@ int dec, frac; sprintf(buf, "%+d", unit_val / s->unit_div); - + frac = (unit_val > 0 ? unit_val : -unit_val) % s->unit_div; p = buf + strlen(buf); - + dec = s->unit_div; - + if (dec != 1) { *p++ = '.'; } - + for (dec /= 10; dec != 0; dec /= 10) { *p++ = '0' + frac / dec % 10; } - + strcpy(p, s->unit_name); - + return buf; } @@ -217,7 +217,7 @@ printf("Error: LM87 not found at 0x%02X\n", this->chip); return; } - + /* Configure pins 5,6 as AIN */ val = 0x03; if (i2c_write(this->chip, 0x16, 1, &val, 1)) diff --git a/post/tests.c b/post/tests.c index 5b2c7e2..55da927 100644 --- a/post/tests.c +++ b/post/tests.c @@ -53,146 +53,146 @@ { #if CONFIG_POST & CFG_POST_CACHE { - "Cache test", - "cache", - "This test verifies the CPU cache operation.", - POST_RAM | POST_ALWAYS, - &cache_post_test, - NULL, - NULL, + "Cache test", + "cache", + "This test verifies the CPU cache operation.", + POST_RAM | POST_ALWAYS, + &cache_post_test, + NULL, + NULL, CFG_POST_CACHE }, #endif #if CONFIG_POST & CFG_POST_WATCHDOG { - "Watchdog timer test", - "watchdog", - "This test checks the watchdog timer.", - POST_RAM | POST_POWERON | POST_POWERFAIL | POST_MANUAL | POST_REBOOT, - &watchdog_post_test, - NULL, - NULL, + "Watchdog timer test", + "watchdog", + "This test checks the watchdog timer.", + POST_RAM | POST_POWERON | POST_POWERFAIL | POST_MANUAL | POST_REBOOT, + &watchdog_post_test, + NULL, + NULL, CFG_POST_WATCHDOG }, #endif #if CONFIG_POST & CFG_POST_I2C { - "I2C test", - "i2c", - "This test verifies the I2C operation.", - POST_RAM | POST_ALWAYS, - &i2c_post_test, - NULL, - NULL, + "I2C test", + "i2c", + "This test verifies the I2C operation.", + POST_RAM | POST_ALWAYS, + &i2c_post_test, + NULL, + NULL, CFG_POST_I2C }, #endif #if CONFIG_POST & CFG_POST_RTC { - "RTC test", - "rtc", - "This test verifies the RTC operation.", - POST_RAM | POST_POWERFAIL | POST_MANUAL, - &rtc_post_test, - NULL, - NULL, + "RTC test", + "rtc", + "This test verifies the RTC operation.", + POST_RAM | POST_POWERFAIL | POST_MANUAL, + &rtc_post_test, + NULL, + NULL, CFG_POST_RTC }, #endif #if CONFIG_POST & CFG_POST_MEMORY { - "Memory test", - "memory", - "This test checks RAM.", - POST_ROM | POST_POWERON | POST_POWERFAIL | POST_PREREL, - &memory_post_test, - NULL, - NULL, + "Memory test", + "memory", + "This test checks RAM.", + POST_ROM | POST_POWERON | POST_POWERFAIL | POST_PREREL, + &memory_post_test, + NULL, + NULL, CFG_POST_MEMORY }, #endif #if CONFIG_POST & CFG_POST_CPU { - "CPU test", - "cpu", - "This test verifies the arithmetic logic unit of" - " CPU.", - POST_RAM | POST_ALWAYS, - &cpu_post_test, - NULL, - NULL, + "CPU test", + "cpu", + "This test verifies the arithmetic logic unit of" + " CPU.", + POST_RAM | POST_ALWAYS, + &cpu_post_test, + NULL, + NULL, CFG_POST_CPU }, #endif #if CONFIG_POST & CFG_POST_UART { - "UART test", - "uart", - "This test verifies the UART operation.", - POST_RAM | POST_POWERFAIL | POST_MANUAL, - &uart_post_test, - NULL, - NULL, + "UART test", + "uart", + "This test verifies the UART operation.", + POST_RAM | POST_POWERFAIL | POST_MANUAL, + &uart_post_test, + NULL, + NULL, CFG_POST_UART }, #endif #if CONFIG_POST & CFG_POST_ETHER { - "ETHERNET test", - "ethernet", - "This test verifies the ETHERNET operation.", - POST_RAM | POST_ALWAYS | POST_MANUAL, - ðer_post_test, - NULL, - NULL, + "ETHERNET test", + "ethernet", + "This test verifies the ETHERNET operation.", + POST_RAM | POST_ALWAYS | POST_MANUAL, + ðer_post_test, + NULL, + NULL, CFG_POST_ETHER }, #endif #if CONFIG_POST & CFG_POST_SPI { - "SPI test", - "spi", - "This test verifies the SPI operation.", - POST_RAM | POST_ALWAYS | POST_MANUAL, - &spi_post_test, - NULL, - NULL, + "SPI test", + "spi", + "This test verifies the SPI operation.", + POST_RAM | POST_ALWAYS | POST_MANUAL, + &spi_post_test, + NULL, + NULL, CFG_POST_SPI }, #endif #if CONFIG_POST & CFG_POST_USB { - "USB test", - "usb", - "This test verifies the USB operation.", - POST_RAM | POST_ALWAYS | POST_MANUAL, - &usb_post_test, - NULL, - NULL, + "USB test", + "usb", + "This test verifies the USB operation.", + POST_RAM | POST_ALWAYS | POST_MANUAL, + &usb_post_test, + NULL, + NULL, CFG_POST_USB }, #endif #if CONFIG_POST & CFG_POST_SPR { - "SPR test", - "spr", - "This test checks SPR contents.", - POST_ROM | POST_ALWAYS | POST_PREREL, - &spr_post_test, - NULL, - NULL, + "SPR test", + "spr", + "This test checks SPR contents.", + POST_ROM | POST_ALWAYS | POST_PREREL, + &spr_post_test, + NULL, + NULL, CFG_POST_SPR }, #endif #if CONFIG_POST & CFG_POST_SYSMON { - "SYSMON test", - "sysmon", - "This test monitors system hardware.", - POST_RAM | POST_ALWAYS, - &sysmon_post_test, - &sysmon_init_f, - &sysmon_reloc, + "SYSMON test", + "sysmon", + "This test monitors system hardware.", + POST_RAM | POST_ALWAYS, + &sysmon_post_test, + &sysmon_init_f, + &sysmon_reloc, CFG_POST_SYSMON }, #endif diff --git a/post/watchdog.c b/post/watchdog.c index 0cdfbf0..48c4282 100644 --- a/post/watchdog.c +++ b/post/watchdog.c @@ -66,8 +66,8 @@ if (ints) enable_interrupts (); - /* - * If we have reached this point, the watchdog timer + /* + * If we have reached this point, the watchdog timer * does not work */ return -1; diff --git a/rtc/ds12887.c b/rtc/ds12887.c index cf572cc..8b12893 100644 --- a/rtc/ds12887.c +++ b/rtc/ds12887.c @@ -56,7 +56,7 @@ { uchar val; - *(volatile unsigned char*)(RTC_PORT_ADDR) = reg; + *(volatile unsigned char*)(RTC_PORT_ADDR) = reg; __asm__ __volatile__ ("sync"); val = *(volatile unsigned char*)(RTC_PORT_DATA); @@ -65,7 +65,7 @@ static void rtc_write (uchar reg, uchar val) { - *(volatile unsigned char*)(RTC_PORT_ADDR) = reg; + *(volatile unsigned char*)(RTC_PORT_ADDR) = reg; __asm__ __volatile__ ("sync"); *(volatile unsigned char*)(RTC_PORT_DATA) = val; @@ -218,14 +218,14 @@ tmp.tm_sec = 0; #ifdef RTC_DEBUG - printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n", - tmp.tm_year, tmp.tm_mon, tmp.tm_mday, + printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n", + tmp.tm_year, tmp.tm_mon, tmp.tm_mday, tmp.tm_hour, tmp.tm_min, tmp.tm_sec); #endif ctrl_rg = RTC_CB_SET | RTC_CB_24_12 | RTC_CB_DM; rtc_write(RTC_CONTROL_B,ctrl_rg); - rtc_set(&tmp); + rtc_set(&tmp); rtc_write(RTC_HOURS_ALARM, 0), rtc_write(RTC_MINUTES_ALARM, 0), diff --git a/rtc/ds1307.c b/rtc/ds1307.c index d2b6bbe..4b6d8ac 100644 --- a/rtc/ds1307.c +++ b/rtc/ds1307.c @@ -105,7 +105,7 @@ rtc_write (RTC_SEC_REG_ADDR, rtc_read (RTC_SEC_REG_ADDR) & ~RTC_SEC_BIT_CH); } - + tmp->tm_sec = bcd2bin (sec & 0x7F); tmp->tm_min = bcd2bin (min & 0x7F); tmp->tm_hour = bcd2bin (hour & 0x3F); @@ -133,7 +133,7 @@ if (tmp->tm_year < 1970 || tmp->tm_year > 2069) printf("WARNING: year should be between 1970 and 2069!\n"); - + rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100)); rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon)); rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday + 1)); @@ -145,8 +145,8 @@ /* - * Reset the RTC. We setting the date back to 1970-01-01. - * We also enable the oscillator output on the SQW/OUT pin and program + * Reset the RTC. We setting the date back to 1970-01-01. + * We also enable the oscillator output on the SQW/OUT pin and program * it for 32,768 Hz output. Note that according to the datasheet, turning * on the square wave output increases the current drain on the backup * battery to something between 480nA and 800nA. diff --git a/rtc/ds164x.c b/rtc/ds164x.c index 3f329c7..3cc76ab 100644 --- a/rtc/ds164x.c +++ b/rtc/ds164x.c @@ -1,7 +1,7 @@ /* * (C) Copyright 2002 * ARIO Data Networks, Inc. dchiu@ariodata.com - * + * * modified for DS164x: * The LEOX team , http://www.leox.org * diff --git a/rtc/m41t11.c b/rtc/m41t11.c index 30a101c..11a1b08 100644 --- a/rtc/m41t11.c +++ b/rtc/m41t11.c @@ -98,36 +98,36 @@ void rtc_get (struct rtc_time *tmp) { - uchar data[RTC_REG_CNT]; + uchar data[RTC_REG_CNT]; - i2c_read(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); + i2c_read(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); - if( data[RTC_SEC_ADDR] & 0x80 ){ - printf( "m41t11 RTC Clock stopped!!!\n" ); - } + if( data[RTC_SEC_ADDR] & 0x80 ){ + printf( "m41t11 RTC Clock stopped!!!\n" ); + } tmp->tm_sec = bcd2bin (data[RTC_SEC_ADDR] & 0x7F); tmp->tm_min = bcd2bin (data[RTC_MIN_ADDR] & 0x7F); tmp->tm_hour = bcd2bin (data[RTC_HOUR_ADDR] & 0x3F); tmp->tm_mday = bcd2bin (data[RTC_DATE_ADDR] & 0x3F); tmp->tm_mon = bcd2bin (data[RTC_MONTH_ADDR]& 0x1F); #ifndef CFG_M41T11_EXT_CENTURY_DATA - tmp->tm_year = CFG_M41T11_BASE_YEAR - + bcd2bin(data[RTC_YEARS_ADDR]) - + ((data[RTC_HOUR_ADDR]&0x40) ? 100 : 0); + tmp->tm_year = CFG_M41T11_BASE_YEAR + + bcd2bin(data[RTC_YEARS_ADDR]) + + ((data[RTC_HOUR_ADDR]&0x40) ? 100 : 0); #else - { - unsigned char cent; - i2c_read(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); - if( !(data[RTC_HOUR_ADDR] & 0x80) ){ - printf( "m41t11 RTC: cann't keep track of years without CEB set\n" ); - } - if( (cent & 0x1) != ((data[RTC_HOUR_ADDR]&0x40)>>7) ){ - /*century flip store off new year*/ - cent += 1; - i2c_write(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); - } - tmp->tm_year =((int)cent*100)+bcd2bin(data[RTC_YEARS_ADDR]); - } + { + unsigned char cent; + i2c_read(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); + if( !(data[RTC_HOUR_ADDR] & 0x80) ){ + printf( "m41t11 RTC: cann't keep track of years without CEB set\n" ); + } + if( (cent & 0x1) != ((data[RTC_HOUR_ADDR]&0x40)>>7) ){ + /*century flip store off new year*/ + cent += 1; + i2c_write(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); + } + tmp->tm_year =((int)cent*100)+bcd2bin(data[RTC_YEARS_ADDR]); + } #endif tmp->tm_wday = bcd2bin (data[RTC_DAY_ADDR] & 0x07); tmp->tm_yday = 0; @@ -140,7 +140,7 @@ void rtc_set (struct rtc_time *tmp) { - uchar data[RTC_REG_CNT]; + uchar data[RTC_REG_CNT]; debug ( "Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n", tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday, @@ -153,50 +153,50 @@ data[RTC_MONTH_ADDR] = bin2bcd(tmp->tm_mon); data[RTC_DAY_ADDR] = bin2bcd(tmp->tm_wday) & 0x07; - data[RTC_HOUR_ADDR] |= 0x80;/*we will always use CEB*/ + data[RTC_HOUR_ADDR] |= 0x80;/*we will always use CEB*/ - data[RTC_YEARS_ADDR] = bin2bcd(tmp->tm_year%100);/*same thing either way*/ + data[RTC_YEARS_ADDR] = bin2bcd(tmp->tm_year%100);/*same thing either way*/ #ifndef CFG_M41T11_EXT_CENTURY_DATA - if( ((tmp->tm_year - CFG_M41T11_BASE_YEAR) > 200) || - (tmp->tm_year < CFG_M41T11_BASE_YEAR) ){ - printf( "m41t11 RTC setting year out of range!!need recompile\n" ); - } - data[RTC_HOUR_ADDR] |= (tmp->tm_year - CFG_M41T11_BASE_YEAR) > 100 ? 0x40 : 0; + if( ((tmp->tm_year - CFG_M41T11_BASE_YEAR) > 200) || + (tmp->tm_year < CFG_M41T11_BASE_YEAR) ){ + printf( "m41t11 RTC setting year out of range!!need recompile\n" ); + } + data[RTC_HOUR_ADDR] |= (tmp->tm_year - CFG_M41T11_BASE_YEAR) > 100 ? 0x40 : 0; #else - { - unsigned char cent; - cent = tmp->tm_year ? tmp->tm_year / 100 : 0; - data[RTC_HOUR_ADDR] |= (cent & 0x1) ? 0x40 : 0; - i2c_write(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); - } + { + unsigned char cent; + cent = tmp->tm_year ? tmp->tm_year / 100 : 0; + data[RTC_HOUR_ADDR] |= (cent & 0x1) ? 0x40 : 0; + i2c_write(CFG_I2C_RTC_ADDR, M41T11_YEAR_DATA, 1, ¢, M41T11_YEAR_SIZE); + } #endif - i2c_write(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); + i2c_write(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, data, RTC_REG_CNT); } void rtc_reset (void) { - unsigned char val; + unsigned char val; /* clear all control & status registers */ - i2c_read(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, 1); - val = val & 0x7F;/*make sure we are running*/ - i2c_write(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, RTC_REG_CNT); + i2c_read(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, 1); + val = val & 0x7F;/*make sure we are running*/ + i2c_write(CFG_I2C_RTC_ADDR, RTC_SEC_ADDR, 1, &val, RTC_REG_CNT); - i2c_read(CFG_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); - val = val & 0x3F;/*turn off freq test keep calibration*/ - i2c_write(CFG_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); + i2c_read(CFG_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); + val = val & 0x3F;/*turn off freq test keep calibration*/ + i2c_write(CFG_I2C_RTC_ADDR, RTC_CONTROL_ADDR, 1, &val, 1); } int rtc_store(int addr, unsigned char* data, int size) { - /*don't let things wrap onto the time on a write*/ - if( (addr+size) >= M41T11_STORAGE_SZ ) - return 1; - return i2c_write( CFG_I2C_RTC_ADDR, REG_CNT+addr, 1, data, size ); + /*don't let things wrap onto the time on a write*/ + if( (addr+size) >= M41T11_STORAGE_SZ ) + return 1; + return i2c_write( CFG_I2C_RTC_ADDR, REG_CNT+addr, 1, data, size ); } int rtc_recall(int addr, unsigned char* data, int size) { - return i2c_read( CFG_I2C_RTC_ADDR, REG_CNT+addr, 1, data, size ); + return i2c_read( CFG_I2C_RTC_ADDR, REG_CNT+addr, 1, data, size ); } #endif /* CONFIG_RTC_M41T11 && CFG_I2C_RTC_ADDR && CFG_CMD_DATE */ diff --git a/tools/Makefile b/tools/Makefile index 35c60b6..de6f7dd 100644 --- a/tools/Makefile +++ b/tools/Makefile @@ -186,4 +186,3 @@ sinclude .depend ######################################################################### - diff --git a/tools/bmp_logo.c b/tools/bmp_logo.c index 54fdcff..2421b82 100644 --- a/tools/bmp_logo.c +++ b/tools/bmp_logo.c @@ -68,8 +68,8 @@ exit (EXIT_FAILURE); } - /* - * read width and height of the image, and the number of colors used; + /* + * read width and height of the image, and the number of colors used; * ignore the rest */ skip_bytes (fp, 16); @@ -174,4 +174,3 @@ return (0); } - diff --git a/tools/easylogo/easylogo.c b/tools/easylogo/easylogo.c index 3111068..cbec70b 100644 --- a/tools/easylogo/easylogo.c +++ b/tools/easylogo/easylogo.c @@ -107,7 +107,7 @@ printf(" "); else printf("X"); - printf("\n"); + printf("\n"); } } @@ -121,7 +121,7 @@ printf(" "); else printf("X"); - printf("\n"); + printf("\n"); } } @@ -134,7 +134,7 @@ rgb_t *p ; if( ( file = fopen( filename, "rb" ) ) == NULL ) - return -1; + return -1; fread(&header, sizeof(header), 1, file); @@ -146,7 +146,7 @@ image->yuyv = 0 ; image->palette_size = 0 ; image->palette = NULL ; - break; + break; default: printf("Format not supported!\n"); @@ -181,19 +181,19 @@ if(!(header.ImageDescriptorByte & 0x20)) { - unsigned char *temp = malloc(image->size); - int linesize = image->pixel_size * image->width ; + unsigned char *temp = malloc(image->size); + int linesize = image->pixel_size * image->width ; void *dest = image->data, *source = temp + image->size - linesize ; - printf("S"); + printf("S"); if (temp == NULL) { printf("Cannot alloc temp buffer!\n"); return -1; } - memcpy(temp, image->data, image->size); + memcpy(temp, image->data, image->size); for(i = 0; iheight; i++, dest+=linesize, source-=linesize) memcpy(dest, source, linesize); @@ -242,7 +242,7 @@ pixel_rgb_to_yuyv (rgb_ptr++, &yuyv); if ((count & 1)==0) /* Was == 0 */ - memcpy (dest, ((void *)&yuyv) + 2, sizeof(short)); + memcpy (dest, ((void *)&yuyv) + 2, sizeof(short)); else memcpy (dest, (void *)&yuyv, sizeof(short)); @@ -346,7 +346,7 @@ case 2: case 3: case 4: - strcpy (inputfile, argv[1]); + strcpy (inputfile, argv[1]); if (argc > 2) strcpy (varname, argv[2]); @@ -375,14 +375,14 @@ sprintf(outputfile, "%s.h", app); } } - break; + break; default: - printf("EasyLogo 1.0 (C) 2000 by Paolo Scaffardi\n\n"); + printf("EasyLogo 1.0 (C) 2000 by Paolo Scaffardi\n\n"); - printf("Syntax: easylogo inputfile [outputvar {outputfile}] \n"); - printf("\n"); - printf("Where: 'inputfile' is the TGA image to load\n"); + printf("Syntax: easylogo inputfile [outputvar {outputfile}] \n"); + printf("\n"); + printf("Where: 'inputfile' is the TGA image to load\n"); printf(" 'outputvar' is the variable name to create\n"); printf(" 'outputfile' is the output header file (default is 'inputfile.h')\n"); @@ -398,7 +398,7 @@ if (image_load_tga (&rgb_logo, inputfile)<0) { printf("input file not found!\n"); - exit(1); + exit(1); } /* Convert it to YUYV format */ diff --git a/tools/env/Makefile b/tools/env/Makefile index 7da1d2b..9ce477c 100644 --- a/tools/env/Makefile +++ b/tools/env/Makefile @@ -43,4 +43,3 @@ sinclude .depend ######################################################################### - diff --git a/tools/env/fw_env.h b/tools/env/fw_env.h index 2cc7724..cc2ff09 100644 --- a/tools/env/fw_env.h +++ b/tools/env/fw_env.h @@ -21,8 +21,8 @@ * MA 02111-1307 USA */ -/* - * To build the utility with the run-time configuration +/* + * To build the utility with the run-time configuration * uncomment the next line. * See included "fw_env.config" sample file (TRAB board) * for notes on configuration. diff --git a/tools/envcrc.c b/tools/envcrc.c index 19fe17c..5f13a63 100644 --- a/tools/envcrc.c +++ b/tools/envcrc.c @@ -94,4 +94,3 @@ #endif return EXIT_SUCCESS; } - diff --git a/tools/gdb/remote.c b/tools/gdb/remote.c index b8b2470..f40b6c6 100644 --- a/tools/gdb/remote.c +++ b/tools/gdb/remote.c @@ -171,7 +171,7 @@ reply OK for success ENN for an error - write reg Pn...=r... Write register n... with value r..., + write reg Pn...=r... Write register n... with value r..., which contains two hex digits for each byte in the register (target byte order). @@ -194,12 +194,12 @@ where only part of the data was written). - write mem XAA..AA,LLLL:XX..XX - (binary) AA..AA is address, - LLLL is number of bytes, - XX..XX is binary data - reply OK for success - ENN for an error + write mem XAA..AA,LLLL:XX..XX + (binary) AA..AA is address, + LLLL is number of bytes, + XX..XX is binary data + reply OK for success + ENN for an error continue cAA..AA AA..AA is address to resume If AA..AA is omitted, @@ -217,7 +217,7 @@ signal last signal ? Reply the current reason for stopping. - This is the same reply as is generated + This is the same reply as is generated for step or cont : SAA where AA is the signal number. @@ -256,7 +256,7 @@ the 'N' packet may arrive spontaneously whereas the 'qOffsets' is a query initiated by the host debugger. - or... OXX..XX XX..XX is hex encoding of ASCII data. This + or... OXX..XX XX..XX is hex encoding of ASCII data. This can happen at any time while the program is running and the debugger should continue to wait for @@ -416,7 +416,7 @@ && remote_address_size < (sizeof (ULONGEST) * 8)) { /* Only create a mask when that mask can safely be constructed - in a ULONGEST variable. */ + in a ULONGEST variable. */ ULONGEST mask = 1; mask = (mask << remote_address_size) - 1; addr &= mask; @@ -529,8 +529,8 @@ *p = '\0'; /* We send target system values byte by byte, in increasing byte - addresses, each byte encoded as two hex characters (or one - binary character). */ + addresses, each byte encoded as two hex characters (or one + binary character). */ if (remote_binary_download) { int escaped = 0; @@ -557,11 +557,11 @@ if (i < todo) { /* Escape chars have filled up the buffer prematurely, - and we have actually sent fewer bytes than planned. - Fix-up the length field of the packet. */ + and we have actually sent fewer bytes than planned. + Fix-up the length field of the packet. */ /* FIXME: will fail if new len is a shorter string than - old len. */ + old len. */ plen += hexnumstr ((char *)plen, (ULONGEST) i); *plen++ = ':'; @@ -591,7 +591,7 @@ } /* Increment by i, not by todo, in case escape chars - caused us to send fewer bytes than we'd planned. */ + caused us to send fewer bytes than we'd planned. */ myaddr += i; memaddr += i; len -= i; @@ -743,10 +743,10 @@ #if 0 /* This is wrong. If doing a long backtrace, the user should be - able to get out next time we call QUIT, without anything as - violent as interrupt_query. If we want to provide a way out of - here without getting to the next QUIT, it should be based on - hitting ^C twice as in remote_wait. */ + able to get out next time we call QUIT, without anything as + violent as interrupt_query. If we want to provide a way out of + here without getting to the next QUIT, it should be based on + hitting ^C twice as in remote_wait. */ if (quit_flag) { quit_flag = 0; @@ -875,12 +875,12 @@ for (tries = 1; tries <= MAX_TRIES; tries++) { /* This can loop forever if the remote side sends us characters - continuously, but if it pauses, we'll get a zero from readchar - because of timeout. Then we'll count that as a retry. */ + continuously, but if it pauses, we'll get a zero from readchar + because of timeout. Then we'll count that as a retry. */ /* Note that we will only wait forever prior to the start of a packet. - After that, we expect characters to arrive at a brisk pace. They - should show up within remote_timeout intervals. */ + After that, we expect characters to arrive at a brisk pace. They + should show up within remote_timeout intervals. */ do { diff --git a/tools/img2srec.c b/tools/img2srec.c index 330ae02..b04abbd 100644 --- a/tools/img2srec.c +++ b/tools/img2srec.c @@ -351,34 +351,34 @@ loadAddr = 0; for (i = 0; i < elfHeader.e_shnum; i++) { if ( (sectHeader[i].sh_type == SHT_PROGBITS) - && (sectHeader[i].sh_size != 0) - ) { + && (sectHeader[i].sh_size != 0) + ) { loadSize = sectHeader[i].sh_size; if (sectHeader[i].sh_flags != 0) { - loadAddr = sectHeader[i].sh_addr; - loadDiff = loadAddr - sectHeader[i].sh_offset; + loadAddr = sectHeader[i].sh_addr; + loadDiff = loadAddr - sectHeader[i].sh_offset; } /* if */ else { - loadAddr = sectHeader[i].sh_offset + loadDiff; + loadAddr = sectHeader[i].sh_offset + loadDiff; } /* else */ if (loadAddr < firstAddr) - firstAddr = loadAddr; + firstAddr = loadAddr; /* build s-records */ loadSize = sectHeader[i].sh_size; fseek(file, sectHeader[i].sh_offset, SEEK_SET); while (loadSize) { - rxCount = fread(rxBlock, 1, (loadSize > 32) ? 32 : loadSize, file); - if (rxCount < 0) { - fclose(file); - fprintf (stderr, "*** illegal file format\n"); - return; - } /* if */ - (void)BuildSRecord(srecLine, 3, loadAddr + loadOffset, rxBlock, rxCount); - loadSize -= rxCount; - loadAddr += rxCount; - printf("%s\r\n",srecLine); + rxCount = fread(rxBlock, 1, (loadSize > 32) ? 32 : loadSize, file); + if (rxCount < 0) { + fclose(file); + fprintf (stderr, "*** illegal file format\n"); + return; + } /* if */ + (void)BuildSRecord(srecLine, 3, loadAddr + loadOffset, rxBlock, rxCount); + loadSize -= rxCount; + loadAddr += rxCount; + printf("%s\r\n",srecLine); } /* while */ } /* if */ } /* for */ diff --git a/tools/scripts/README b/tools/scripts/README index cda10a8..046c1d4 100644 --- a/tools/scripts/README +++ b/tools/scripts/README @@ -28,7 +28,6 @@ have to modify them before use. - Short description: ================== @@ -40,11 +39,11 @@ flash_param: - "kermit" script to automatically initialize the environment - variables on your target. This is most useful during - development when your environment variables are stored in an - embedded flash sector which is erased whenever you install a - new U-Boot image. + "kermit" script to automatically initialize the environment + variables on your target. This is most useful during + development when your environment variables are stored in an + embedded flash sector which is erased whenever you install a + new U-Boot image. by Swen Anderson, 10 May 2001 @@ -52,9 +51,9 @@ send_cmd U_BOOT_COMMAND - "kermit" script to send a U-Boot command and print the - results. When used from a shell with history (like the bash) - this indirectly adds kind of history to U-Boot ;-) + "kermit" script to send a U-Boot command and print the + results. When used from a shell with history (like the bash) + this indirectly adds kind of history to U-Boot ;-) by Swen Anderson, 10 May 2001 @@ -62,7 +61,7 @@ send_image FILE_NAME OFFSET - "kermit" script to automatically download a file to the - target using the "loadb" command (kermit binary protocol) + "kermit" script to automatically download a file to the + target using the "loadb" command (kermit binary protocol) by Swen Anderson, 10 May 2001 diff --git a/tools/scripts/send_cmd b/tools/scripts/send_cmd index d01efe2..4131331 100644 --- a/tools/scripts/send_cmd +++ b/tools/scripts/send_cmd @@ -19,4 +19,3 @@ in 10 => quit exit 0 - diff --git a/tools/updater/Makefile b/tools/updater/Makefile index a8fb4ce..21b11ca 100644 --- a/tools/updater/Makefile +++ b/tools/updater/Makefile @@ -29,9 +29,9 @@ IMAGE = updater.image SRC = update.c flash.c flash_hw.c utils.c cmd_flash.c string.c ctype.c dummy.c ASRC = ppcstring.S -OBJS = $(SRC:.c=.o) $(ASRC:.S=.o) +OBJS = $(SRC:.c=.o) $(ASRC:.S=.o) -LIB = $(TOPDIR)/examples/libsyscall.a +LIB = $(TOPDIR)/examples/libsyscall.a LIBAOBJS= $(TOPDIR)/examples/syscall.o LIBCOBJS= LIBOBJS = $(LIBAOBJS) $(LIBCOBJS) @@ -50,14 +50,14 @@ $(OBJCOPY) -O srec $(<:.o=) $@ %.o: %.c - $(CC) $(CPPFLAGS) -c $< + $(CC) $(CPPFLAGS) -c $< %.o: %.S $(CC) $(CPPFLAGS) -c $< ######################################################################### -updater: $(OBJS) $(LIB) $(TOPDIR)/board/MAI/AmigaOneG3SE/memio.o +updater: $(OBJS) $(LIB) $(TOPDIR)/board/MAI/AmigaOneG3SE/memio.o $(LD) -g -Ttext $(LOAD_ADDR) -o updater -e _main $(OBJS) $(LIB) \ $(TOPDIR)/board/MAI/AmigaOneG3SE/memio.o $(OBJCOPY) -O binary updater updater.bin diff --git a/tools/updater/cmd_flash.c b/tools/updater/cmd_flash.c index f3465f1..573546d 100644 --- a/tools/updater/cmd_flash.c +++ b/tools/updater/cmd_flash.c @@ -26,7 +26,6 @@ */ #include #include -#include #include #if (CONFIG_COMMANDS & CFG_CMD_FLASH) @@ -227,7 +226,7 @@ } } if (erased) { - // mon_printf ("Erased %d sectors\n", erased); + /* mon_printf ("Erased %d sectors\n", erased); */ } else { mon_printf ("Error: start and/or end address" " not on sector boundary\n"); @@ -264,8 +263,8 @@ if (info->flash_id == FLASH_UNKNOWN) { continue; } - //mon_printf ("%sProtect Flash Bank # %ld\n", - // p ? "" : "Un-", bank); + /*mon_printf ("%sProtect Flash Bank # %ld\n", */ + /* p ? "" : "Un-", bank); */ for (i=0; isector_count; ++i) { #if defined(CFG_FLASH_PROTECTION) @@ -290,9 +289,9 @@ mon_printf("Bad sector specification\n"); return 1; } - //mon_printf("%sProtect Flash Sectors %d-%d in Bank # %d\n", - // p ? "" : "Un-", sect_first, sect_last, - // (info-flash_info)+1); + /*mon_printf("%sProtect Flash Sectors %d-%d in Bank # %d\n", */ + /* p ? "" : "Un-", sect_first, sect_last, */ + /* (info-flash_info)+1); */ for (i = sect_first; i <= sect_last; i++) { #if defined(CFG_FLASH_PROTECTION) if (flash_real_protect(info, i, p)) @@ -418,8 +417,8 @@ } if (protected) { - // mon_printf ("%sProtected %d sectors\n", - // p ? "" : "Un-", protected); + /* mon_printf ("%sProtected %d sectors\n", */ + /* p ? "" : "Un-", protected); */ } else { mon_printf ("Error: start and/or end address" " not on sector boundary\n"); diff --git a/tools/updater/flash_hw.c b/tools/updater/flash_hw.c index ec11589..1d782c6 100644 --- a/tools/updater/flash_hw.c +++ b/tools/updater/flash_hw.c @@ -31,7 +31,6 @@ /*---------------------------------------------------------------------*/ #undef DEBUG_FLASH -//#define DEBUG_FLASH #ifdef DEBUG_FLASH #define DEBUGF(fmt,args...) mon_printf(fmt ,##args) @@ -68,7 +67,7 @@ unsigned char x; flash_xd_nest --; - + if (flash_xd_nest == 0) { DEBUGF("Flash on memory bus\n"); @@ -327,7 +326,7 @@ /* set sector offsets for uniform sector type */ for (i = 0; i < info->sector_count; i++) { info->start[i] = base + i * info->size / - info->sector_count; + info->sector_count; } break; default: @@ -479,7 +478,7 @@ } if ((rc = write_word(info, wp, data)) != 0) { - flash_to_mem(); + flash_to_mem(); return (rc); } wp += 4; @@ -491,7 +490,7 @@ * handle word aligned part */ while (cnt >= 4) { - if (out_cnt>26214) + if (out_cnt>26214) { mon_putc(219); out_cnt = 0; @@ -590,7 +589,7 @@ */ static void flash_reset (ulong addr) { - flash_to_xd(); + flash_to_xd(); out8(addr, 0xF0); /* reset bank */ iobarrier_rw(); flash_to_mem(); @@ -641,10 +640,10 @@ info->size / 0x100000, info->sector_count); } else if (info->size % 0x400 == 0) { mon_printf (" Size: %ld KB in %d Sectors\n", - info->size / 0x400, info->sector_count); + info->size / 0x400, info->sector_count); } else { mon_printf (" Size: %ld B in %d Sectors\n", - info->size, info->sector_count); + info->size, info->sector_count); } mon_printf (" Sector Start Addresses:"); diff --git a/tools/updater/string.c b/tools/updater/string.c index 50537a6..8a8edec 100644 --- a/tools/updater/string.c +++ b/tools/updater/string.c @@ -129,8 +129,8 @@ { const char *p = s + strlen(s); do { - if (*p == (char)c) - return (char *)p; + if (*p == (char)c) + return (char *)p; } while (--p >= s); return NULL; } @@ -316,7 +316,7 @@ p++; size--; } - return (void *) p; + return (void *) p; } #endif diff --git a/tools/updater/update.c b/tools/updater/update.c index 66c6dfc..26204fb 100644 --- a/tools/updater/update.c +++ b/tools/updater/update.c @@ -35,7 +35,7 @@ mon_printf("\nUpdate done. Please remove diskette.\n"); mon_printf("The machine will automatically reset in %d seconds\n", i); mon_printf("You can switch off/reset now when the floppy is removed\n\n"); - + while (i) { mon_printf("Resetting in %d\r", i); diff --git a/tools/updater/utils.c b/tools/updater/utils.c index e230e19..0304f94 100644 --- a/tools/updater/utils.c +++ b/tools/updater/utils.c @@ -15,7 +15,7 @@ static __inline__ void set_msr(unsigned long msr) { - asm volatile("mtmsr %0" : : "r" (msr)); + asm volatile("mtmsr %0" : : "r" (msr)); } static __inline__ unsigned long @@ -31,7 +31,7 @@ static __inline__ void set_dec(unsigned long val) { - asm volatile("mtdec %0" : : "r" (val)); + asm volatile("mtdec %0" : : "r" (val)); } @@ -69,80 +69,80 @@ unsigned long simple_strtoul(const char *cp,char **endp,unsigned int base) { - unsigned long result = 0,value; + unsigned long result = 0,value; - if (*cp == '0') { - cp++; - if ((*cp == 'x') && isxdigit(cp[1])) { - base = 16; - cp++; - } - if (!base) { - base = 8; - } - } - if (!base) { - base = 10; - } - while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp) - ? toupper(*cp) : *cp)-'A'+10) < base) { - result = result*base + value; - cp++; - } - if (endp) - *endp = (char *)cp; - return result; + if (*cp == '0') { + cp++; + if ((*cp == 'x') && isxdigit(cp[1])) { + base = 16; + cp++; + } + if (!base) { + base = 8; + } + } + if (!base) { + base = 10; + } + while (isxdigit(*cp) && (value = isdigit(*cp) ? *cp-'0' : (islower(*cp) + ? toupper(*cp) : *cp)-'A'+10) < base) { + result = result*base + value; + cp++; + } + if (endp) + *endp = (char *)cp; + return result; } long simple_strtol(const char *cp,char **endp,unsigned int base) { - if(*cp=='-') - return -simple_strtoul(cp+1,endp,base); - return simple_strtoul(cp,endp,base); + if(*cp=='-') + return -simple_strtoul(cp+1,endp,base); + return simple_strtoul(cp,endp,base); } static inline void soft_restart(unsigned long addr) { - /* SRR0 has system reset vector, SRR1 has default MSR value */ - /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */ + /* SRR0 has system reset vector, SRR1 has default MSR value */ + /* rfi restores MSR from SRR1 and sets the PC to the SRR0 value */ - __asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr)); - __asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4"); - __asm__ __volatile__ ("mtspr 27, 4"); - __asm__ __volatile__ ("rfi"); + __asm__ __volatile__ ("mtspr 26, %0" :: "r" (addr)); + __asm__ __volatile__ ("li 4, (1 << 6)" ::: "r4"); + __asm__ __volatile__ ("mtspr 27, 4"); + __asm__ __volatile__ ("rfi"); - while(1); /* not reached */ + while(1); /* not reached */ } void do_reset (void) { - ulong addr; - /* flush and disable I/D cache */ - __asm__ __volatile__ ("mfspr 3, 1008" ::: "r3"); - __asm__ __volatile__ ("ori 5, 5, 0xcc00" ::: "r5"); - __asm__ __volatile__ ("ori 4, 3, 0xc00" ::: "r4"); - __asm__ __volatile__ ("andc 5, 3, 5" ::: "r5"); - __asm__ __volatile__ ("sync"); - __asm__ __volatile__ ("mtspr 1008, 4"); - __asm__ __volatile__ ("isync"); - __asm__ __volatile__ ("sync"); - __asm__ __volatile__ ("mtspr 1008, 5"); - __asm__ __volatile__ ("isync"); - __asm__ __volatile__ ("sync"); + ulong addr; + /* flush and disable I/D cache */ + __asm__ __volatile__ ("mfspr 3, 1008" ::: "r3"); + __asm__ __volatile__ ("ori 5, 5, 0xcc00" ::: "r5"); + __asm__ __volatile__ ("ori 4, 3, 0xc00" ::: "r4"); + __asm__ __volatile__ ("andc 5, 3, 5" ::: "r5"); + __asm__ __volatile__ ("sync"); + __asm__ __volatile__ ("mtspr 1008, 4"); + __asm__ __volatile__ ("isync"); + __asm__ __volatile__ ("sync"); + __asm__ __volatile__ ("mtspr 1008, 5"); + __asm__ __volatile__ ("isync"); + __asm__ __volatile__ ("sync"); #ifdef CFG_RESET_ADDRESS - addr = CFG_RESET_ADDRESS; + addr = CFG_RESET_ADDRESS; #else - /* - * note: when CFG_MONITOR_BASE points to a RAM address, - * CFG_MONITOR_BASE - sizeof (ulong) is usually a valid - * address. Better pick an address known to be invalid on your - * system and assign it to CFG_RESET_ADDRESS. - */ - addr = CFG_MONITOR_BASE - sizeof (ulong); + /* + * note: when CFG_MONITOR_BASE points to a RAM address, + * CFG_MONITOR_BASE - sizeof (ulong) is usually a valid + * address. Better pick an address known to be invalid on your + * system and assign it to CFG_RESET_ADDRESS. + */ + addr = CFG_MONITOR_BASE - sizeof (ulong); #endif - soft_restart(addr); - while(1); /* not reached */ + soft_restart(addr); + while(1); /* not reached */ }