diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index b4d4e79..f3875a5 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -77,7 +77,6 @@ struct atmel_nand_host { struct nand_chip nand_chip; - struct mtd_info mtd; void __iomem *io_base; struct atmel_nand_data *board; struct device_d *dev; @@ -130,7 +129,7 @@ */ static void atmel_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; if (ctrl & NAND_CTRL_CHANGE) { @@ -153,7 +152,7 @@ */ static int atmel_nand_device_ready(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; return gpio_get_value(host->board->rdy_pin); @@ -164,28 +163,28 @@ */ static void atmel_read_buf(struct mtd_info *mtd, u8 *buf, int len) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); readsb(nand_chip->IO_ADDR_R, buf, len); } static void atmel_read_buf16(struct mtd_info *mtd, u8 *buf, int len) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); readsw(nand_chip->IO_ADDR_R, buf, len / 2); } static void atmel_write_buf(struct mtd_info *mtd, const u8 *buf, int len) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); writesb(nand_chip->IO_ADDR_W, buf, len); } static void atmel_write_buf16(struct mtd_info *mtd, const u8 *buf, int len) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); writesw(nand_chip->IO_ADDR_W, buf, len / 2); } @@ -277,7 +276,7 @@ static void pmecc_gen_syndrome(struct mtd_info *mtd, int sector) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; int i; uint32_t value; @@ -294,7 +293,7 @@ static void pmecc_substitute(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; int16_t __iomem *alpha_to = host->pmecc_alpha_to; int16_t __iomem *index_of = host->pmecc_index_of; @@ -336,7 +335,7 @@ static void pmecc_get_sigma(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; int16_t *lmu = host->pmecc_lmu; @@ -494,7 +493,7 @@ static int pmecc_err_location(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; const int cap = host->board->pmecc_corr_cap; const int num = 2 * cap + 1; @@ -543,7 +542,7 @@ static void pmecc_correct_data(struct mtd_info *mtd, uint8_t *buf, uint8_t *ecc, int sector_num, int extra_bytes, int err_nbr) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; int i = 0; int byte_pos, bit_pos, sector_size, pos; @@ -589,7 +588,7 @@ static int pmecc_correction(struct mtd_info *mtd, u32 pmecc_stat, uint8_t *buf, u8 *ecc) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; int i, err_nbr, eccbytes; uint8_t *buf_pos; @@ -706,7 +705,7 @@ static void atmel_pmecc_core_init(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; uint32_t val = 0; struct nand_ecclayout *ecc_layout; @@ -862,8 +861,8 @@ struct atmel_nand_host *host) { struct resource *iores; - struct mtd_info *mtd = &host->mtd; struct nand_chip *nand_chip = &host->nand_chip; + struct mtd_info *mtd = &nand_chip->mtd; int cap, sector_size, err_no; int ret; @@ -983,7 +982,7 @@ static int atmel_nand_calculate(struct mtd_info *mtd, const u_char *dat, unsigned char *ecc_code) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; unsigned int ecc_value; @@ -1086,7 +1085,7 @@ static int atmel_nand_correct(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *isnull) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; unsigned int ecc_status; unsigned int ecc_word, ecc_bit; @@ -1154,7 +1153,7 @@ { #if 0 if (cpu_is_at32ap7000()) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct atmel_nand_host *host = nand_chip->priv; ecc_writel(host->ecc, CR, ATMEL_ECC_RST); } @@ -1251,8 +1250,8 @@ struct atmel_nand_host *host) { struct resource *iores; - struct mtd_info *mtd = &host->mtd; struct nand_chip *nand_chip = &host->nand_chip; + struct mtd_info *mtd = &nand_chip->mtd; iores = dev_request_mem_resource(dev, 1); if (IS_ERR(iores)) @@ -1328,8 +1327,8 @@ return PTR_ERR(iores); host->io_base = IOMEM(iores->start); - mtd = &host->mtd; nand_chip = &host->nand_chip; + mtd = &nand_chip->mtd; host->board = pdata; host->dev = dev; @@ -1342,7 +1341,6 @@ } nand_chip->priv = host; /* link the private data structures */ - mtd->priv = nand_chip; mtd->parent = dev; /* Set address of NAND IO lines */ diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 515353e..7698b59 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -464,7 +464,6 @@ #define DT 3 struct denali_nand_info { - struct mtd_info mtd; struct nand_chip nand; int flash_bank; /* currently selected chip */ int status; diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 9c0c016..6b7d019 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -97,7 +97,7 @@ static int check_offs_len(struct mtd_info *mtd, loff_t ofs, uint64_t len) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); int ret = 0; /* Start address must align on block boundary */ @@ -123,7 +123,7 @@ */ static void nand_release_device(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); /* Release the controller and the chip */ chip->controller->active = NULL; @@ -138,7 +138,7 @@ */ static uint8_t nand_read_byte(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); return readb(chip->IO_ADDR_R); } @@ -152,7 +152,7 @@ */ static uint8_t nand_read_byte16(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); } @@ -164,7 +164,7 @@ */ static u16 nand_read_word(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); return readw(chip->IO_ADDR_R); } @@ -177,7 +177,7 @@ */ static void nand_select_chip(struct mtd_info *mtd, int chipnr) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); switch (chipnr) { case -1: @@ -203,7 +203,7 @@ const uint8_t *buf, int len) { int i; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); for (i = 0; i < len; i++) writeb(buf[i], chip->IO_ADDR_W); @@ -220,7 +220,7 @@ static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) { int i; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); for (i = 0; i < len; i++) buf[i] = readb(chip->IO_ADDR_R); @@ -238,7 +238,7 @@ const uint8_t *buf, int len) { int i; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); u16 *p = (u16 *) buf; len >>= 1; @@ -258,7 +258,7 @@ static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len) { int i; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); u16 *p = (u16 *) buf; len >>= 1; @@ -277,7 +277,7 @@ static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) { int page, chipnr, res = 0, i = 0; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); u16 bad; if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) @@ -337,7 +337,7 @@ */ static __maybe_unused int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mtd_oob_ops ops; uint8_t buf[2] = { 0, 0 }; int ret = 0, res, i = 0; @@ -387,7 +387,7 @@ */ static int nand_block_markbad_lowlevel(struct mtd_info *mtd, loff_t ofs) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); int res, ret = 0; if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) { @@ -431,7 +431,7 @@ */ static int nand_block_markgood_lowlevel(struct mtd_info *mtd, loff_t ofs) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); bool allow_erasebad; int ret; @@ -479,7 +479,7 @@ */ static int nand_check_wp(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); /* Broken xD cards report WP despite being writable */ if (chip->options & NAND_BROKEN_XD) @@ -503,7 +503,7 @@ static int nand_block_checkbad(struct mtd_info *mtd, loff_t ofs, int getchip, int allowbbt) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); if (IS_ENABLED(CONFIG_NAND_BBT) && chip->bbt) { /* Return info from the table */ @@ -516,7 +516,7 @@ /* Wait for the ready pin, after a command. The timeout is caught later. */ void nand_wait_ready(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); uint64_t start = get_time_ns(); /* wait until command is processed or timeout occures */ @@ -539,7 +539,7 @@ static void nand_command(struct mtd_info *mtd, unsigned int command, int column, int page_addr) { - register struct nand_chip *chip = mtd->priv; + register struct nand_chip *chip = mtd_to_nand(mtd); int ctrl = NAND_CTRL_CLE | NAND_CTRL_CHANGE; /* Write out the command to the device */ @@ -641,7 +641,7 @@ static void nand_command_lp(struct mtd_info *mtd, unsigned int command, int column, int page_addr) { - register struct nand_chip *chip = mtd->priv; + register struct nand_chip *chip = mtd_to_nand(mtd); /* Emulate NAND_CMD_READOOB */ if (command == NAND_CMD_READOOB) { @@ -748,7 +748,7 @@ static int nand_get_device(struct mtd_info *mtd, int new_state) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); retry: /* Hardware controller shared among independent devices */ @@ -826,7 +826,7 @@ { int ret = 0; int status, page; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); /* Submit address of first page to unlock */ page = ofs >> chip->page_shift; @@ -861,7 +861,7 @@ { int ret = 0; int chipnr; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); pr_debug("%s: start = 0x%012llx, len = %llu\n", __func__, (unsigned long long)ofs, len); @@ -924,7 +924,7 @@ { int ret = 0; int chipnr, status, page; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); pr_debug("%s: start = 0x%012llx, len = %llu\n", __func__, (unsigned long long)ofs, len); @@ -1537,7 +1537,7 @@ struct mtd_oob_ops *ops) { int chipnr, page, realpage, col, bytes, aligned, oob_required; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mtd_ecc_stats stats; int ret = 0; uint32_t readlen = ops->len; @@ -1854,7 +1854,7 @@ struct mtd_oob_ops *ops) { int page, realpage, chipnr; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mtd_ecc_stats stats; int readlen = ops->ooblen; int len; @@ -2317,7 +2317,7 @@ static uint8_t *nand_fill_oob(struct mtd_info *mtd, uint8_t *oob, size_t len, struct mtd_oob_ops *ops) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); /* * Initialise to all 0xFF, to avoid the possibility of left over OOB @@ -2377,7 +2377,7 @@ struct mtd_oob_ops *ops) { int chipnr, realpage, page, blockmask, column; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); uint32_t writelen = ops->len; uint32_t oobwritelen = ops->ooblen; @@ -2522,7 +2522,7 @@ struct mtd_oob_ops *ops) { int chipnr, page, status, len; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); if (!IS_ENABLED(CONFIG_MTD_WRITE)) return -ENOTSUPP; @@ -2653,7 +2653,7 @@ */ static void single_erase_cmd(struct mtd_info *mtd, int page) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); if (!IS_ENABLED(CONFIG_MTD_WRITE)) return; @@ -2690,7 +2690,7 @@ int allowbbt) { int page, status, pages_per_block, ret, chipnr; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); loff_t len; if (!IS_ENABLED(CONFIG_MTD_WRITE)) @@ -3517,7 +3517,7 @@ */ void nand_of_parse_node(struct mtd_info *mtd, struct device_node *np) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); int ecc_strength, ecc_size; if (!IS_ENABLED(CONFIG_OFDEVICE)) @@ -3548,7 +3548,7 @@ struct nand_flash_dev *table) { int i, busw, nand_maf_id, nand_dev_id; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct nand_flash_dev *type; /* Get buswidth to select the correct functions */ @@ -3607,7 +3607,7 @@ int nand_scan_tail(struct mtd_info *mtd) { int i; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); /* New bad blocks should be marked in OOB, flash-based BBT, or both */ BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && @@ -3908,7 +3908,7 @@ */ void nand_release(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); if (chip->ecc.mode == NAND_ECC_SOFT_BCH) nand_bch_free((struct nand_bch_control *)chip->ecc.priv); @@ -3960,7 +3960,7 @@ static int mtd_get_bbt_type(struct param_d *p, void *priv) { struct mtd_info *mtd = priv; - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); enum bbt_type type; if (!chip->bbt) @@ -3978,7 +3978,7 @@ int add_mtd_nand_device(struct mtd_info *mtd, char *devname) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); int ret; ret = add_mtd_device(mtd, devname, DEVICE_ID_DYNAMIC); diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index a908a36..ed41046 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -177,7 +177,7 @@ struct nand_bbt_descr *td, int offs) { int res, ret = 0, i, j, act = 0; - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); size_t retlen, len, totlen; loff_t from; int bits = td->options & NAND_BBT_NRBITS_MSK; @@ -264,7 +264,7 @@ */ static int read_abs_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, int chip) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); int res = 0, i; if (td->options & NAND_BBT_PERCHIP) { @@ -389,7 +389,7 @@ static void read_abs_bbts(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td, struct nand_bbt_descr *md) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); /* Read the primary version, if available */ if (td->options & NAND_BBT_VERSION) { @@ -455,7 +455,7 @@ static int create_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd, int chip) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); int i, numblocks, numpages; int startblock; loff_t from; @@ -524,7 +524,7 @@ */ static int search_bbt(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *td) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); int i, chips; int startblock, block, dir; int scanlen = mtd->writesize + mtd->oobsize; @@ -684,7 +684,7 @@ struct nand_bbt_descr *td, int chip, int block) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); loff_t to; int res; @@ -713,7 +713,7 @@ struct nand_bbt_descr *td, struct nand_bbt_descr *md, int chipsel) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); struct erase_info einfo; int i, res, chip = 0; int bits, page, offs, numblocks, sft, sftmsk; @@ -897,7 +897,7 @@ */ static inline int nand_memory_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); return create_bbt(mtd, this->buffers->databuf, bd, -1); } @@ -916,7 +916,7 @@ static int check_create(struct mtd_info *mtd, uint8_t *buf, struct nand_bbt_descr *bd) { int i, chips, writeops, create, chipsel, res, res2; - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); struct nand_bbt_descr *td = this->bbt_td; struct nand_bbt_descr *md = this->bbt_md; struct nand_bbt_descr *rd, *rd2; @@ -1040,7 +1040,7 @@ */ static void mark_bbt_region(struct mtd_info *mtd, struct nand_bbt_descr *td) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); int i, j, chips, block, nrblocks, update; uint8_t oldval; @@ -1100,7 +1100,7 @@ */ static void verify_bbt_descr(struct mtd_info *mtd, struct nand_bbt_descr *bd) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); u32 pattern_len; u32 bits; u32 table_size; @@ -1152,7 +1152,7 @@ */ static int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); int len, res; uint8_t *buf; struct nand_bbt_descr *td = this->bbt_td; @@ -1225,7 +1225,7 @@ */ int nand_update_bbt(struct mtd_info *mtd, loff_t offs) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); int len, res = 0; int chip, chipsel; uint8_t *buf; @@ -1359,7 +1359,7 @@ */ int nand_default_bbt(struct mtd_info *mtd) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); int ret; /* Is a flash based bad block table requested? */ @@ -1396,7 +1396,7 @@ */ int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); int block; uint8_t res; @@ -1419,7 +1419,7 @@ static int nand_mark_bbt(struct mtd_info *mtd, loff_t offs, uint8_t mark) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); int block, ret = 0; block = (int)(offs >> this->bbt_erase_shift); diff --git a/drivers/mtd/nand/nand_bch.c b/drivers/mtd/nand/nand_bch.c index d4f2a8c..b94ecdf 100644 --- a/drivers/mtd/nand/nand_bch.c +++ b/drivers/mtd/nand/nand_bch.c @@ -49,7 +49,7 @@ int nand_bch_calculate_ecc(struct mtd_info *mtd, const unsigned char *buf, unsigned char *code) { - const struct nand_chip *chip = mtd->priv; + const struct nand_chip *chip = mtd_to_nand(mtd); struct nand_bch_control *nbc = chip->ecc.priv; unsigned int i; @@ -76,7 +76,7 @@ int nand_bch_correct_data(struct mtd_info *mtd, unsigned char *buf, unsigned char *read_ecc, unsigned char *calc_ecc) { - const struct nand_chip *chip = mtd->priv; + const struct nand_chip *chip = mtd_to_nand(mtd); struct nand_bch_control *nbc = chip->ecc.priv; unsigned int *errloc = nbc->errloc; int i, count; @@ -119,7 +119,7 @@ */ struct nand_bch_control *nand_bch_init(struct mtd_info *mtd) { - struct nand_chip *nand = mtd->priv; + struct nand_chip *nand = mtd_to_nand(mtd); unsigned int m, t, eccsteps, i; struct nand_ecclayout *layout = nand->ecc.layout; struct nand_bch_control *nbc = NULL; diff --git a/drivers/mtd/nand/nand_denali.c b/drivers/mtd/nand/nand_denali.c index 2561966..ddb0381 100644 --- a/drivers/mtd/nand/nand_denali.c +++ b/drivers/mtd/nand/nand_denali.c @@ -76,7 +76,12 @@ * this macro allows us to convert from an MTD structure to our own * device context (denali) structure. */ -#define mtd_to_denali(m) container_of(m, struct denali_nand_info, mtd) +static inline struct denali_nand_info *mtd_to_denali(struct mtd_info *mtd) +{ + struct nand_chip *nand = mtd_to_nand(mtd); + + return container_of(nand, struct denali_nand_info, nand); +} /* * These constants are defined by the driver to enable common driver @@ -929,7 +934,7 @@ err_device; /* correct the ECC error */ buf[offset] ^= err_correction_value; - denali->mtd.ecc_stats.corrected++; + denali->nand.mtd.ecc_stats.corrected++; bitflips++; } } else { @@ -997,7 +1002,7 @@ { struct denali_nand_info *denali = mtd_to_denali(mtd); dma_addr_t addr = (unsigned long)denali->buf.buf; - size_t size = denali->mtd.writesize + denali->mtd.oobsize; + size_t size = mtd->writesize + mtd->oobsize; uint32_t irq_status; uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP | INTR_STATUS__PROGRAM_FAIL; @@ -1094,7 +1099,7 @@ struct denali_nand_info *denali = mtd_to_denali(mtd); dma_addr_t addr = (unsigned long)denali->buf.buf; - size_t size = denali->mtd.writesize + denali->mtd.oobsize; + size_t size = mtd->writesize + mtd->oobsize; uint32_t irq_status; uint32_t irq_mask = denali->have_hw_ecc_fixup ? @@ -1132,19 +1137,19 @@ /* When we have hw ecc fixup, don't check oob. * That code below looks jacked up anyway. I mean, * look at it, wtf? */ - if (!is_erased(buf, denali->mtd.writesize)) - denali->mtd.ecc_stats.failed++; + if (!is_erased(buf, mtd->writesize)) + mtd->ecc_stats.failed++; } else { - read_oob_data(&denali->mtd, chip->oob_poi, + read_oob_data(&denali->nand.mtd, chip->oob_poi, denali->page); /* check ECC failures that may have occurred on * erased pages */ if (check_erased_page) { - if (!is_erased(buf, denali->mtd.writesize)) - denali->mtd.ecc_stats.failed++; - if (!is_erased(buf, denali->mtd.oobsize)) - denali->mtd.ecc_stats.failed++; + if (!is_erased(buf, mtd->writesize)) + mtd->ecc_stats.failed++; + if (!is_erased(buf, mtd->oobsize)) + mtd->ecc_stats.failed++; } } } @@ -1156,7 +1161,7 @@ { struct denali_nand_info *denali = mtd_to_denali(mtd); dma_addr_t addr = (unsigned long)denali->buf.buf; - size_t size = denali->mtd.writesize + denali->mtd.oobsize; + size_t size = mtd->writesize + mtd->oobsize; uint32_t irq_mask = INTR_STATUS__DMA_CMD_COMP; if (page != denali->page) { @@ -1372,6 +1377,8 @@ int denali_init(struct denali_nand_info *denali) { + struct nand_chip *nand = &denali->nand; + struct mtd_info *mtd = &nand->mtd; int ret = 0; uint32_t val; @@ -1391,34 +1398,33 @@ if (!denali->buf.buf) return -ENOMEM; - denali->mtd.parent = denali->dev; + mtd->parent = denali->dev; denali_hw_init(denali); denali_drv_init(denali); denali_set_intr_modes(denali, true); - denali->mtd.name = "denali-nand"; - denali->mtd.priv = &denali->nand; + mtd->name = "denali-nand"; /* register the driver with the NAND core subsystem */ - denali->nand.read_buf = denali_read_buf; - denali->nand.select_chip = denali_select_chip; - denali->nand.cmdfunc = denali_cmdfunc; - denali->nand.read_byte = denali_read_byte; - denali->nand.waitfunc = denali_waitfunc; + nand->read_buf = denali_read_buf; + nand->select_chip = denali_select_chip; + nand->cmdfunc = denali_cmdfunc; + nand->read_byte = denali_read_byte; + nand->waitfunc = denali_waitfunc; /* * scan for NAND devices attached to the controller * this is the first stage in a two step process to register * with the nand subsystem */ - if (nand_scan_ident(&denali->mtd, denali->max_banks, NULL)) { + if (nand_scan_ident(mtd, denali->max_banks, NULL)) { ret = -ENXIO; goto failed_req_irq; } /* allocate the right size buffer now */ kfree(denali->buf.buf); - denali->buf.buf = kzalloc(denali->mtd.writesize + denali->mtd.oobsize, + denali->buf.buf = kzalloc(mtd->writesize + mtd->oobsize, GFP_KERNEL); if (!denali->buf.buf) { ret = -ENOMEM; @@ -1431,17 +1437,16 @@ * the real pagesize and anything necessery */ denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED); - denali->nand.chipsize <<= (denali->devnum - 1); - denali->nand.page_shift += (denali->devnum - 1); - denali->nand.pagemask = (denali->nand.chipsize >> - denali->nand.page_shift) - 1; - denali->nand.bbt_erase_shift += (denali->devnum - 1); - denali->nand.phys_erase_shift = denali->nand.bbt_erase_shift; - denali->nand.chip_shift += (denali->devnum - 1); - denali->mtd.writesize <<= (denali->devnum - 1); - denali->mtd.oobsize <<= (denali->devnum - 1); - denali->mtd.erasesize <<= (denali->devnum - 1); - denali->mtd.size = denali->nand.numchips * denali->nand.chipsize; + nand->chipsize <<= (denali->devnum - 1); + nand->page_shift += (denali->devnum - 1); + nand->pagemask = (nand->chipsize >> nand->page_shift) - 1; + nand->bbt_erase_shift += (denali->devnum - 1); + nand->phys_erase_shift = nand->bbt_erase_shift; + nand->chip_shift += (denali->devnum - 1); + mtd->writesize <<= (denali->devnum - 1); + mtd->oobsize <<= (denali->devnum - 1); + mtd->erasesize <<= (denali->devnum - 1); + mtd->size = nand->numchips * nand->chipsize; denali->bbtskipbytes *= denali->devnum; /* @@ -1453,19 +1458,19 @@ /* Bad block table description is set by nand framework, see nand_bbt.c */ - denali->nand.bbt_options |= NAND_BBT_USE_FLASH; - denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME; + nand->bbt_options |= NAND_BBT_USE_FLASH; + nand->ecc.mode = NAND_ECC_HW_SYNDROME; if (denali->have_hw_ecc_fixup) { /* We have OOB support, so allow scan of BBT and leave the OOB alone */ - denali->nand.bbt_options |= NAND_BBT_NO_OOB; + nand->bbt_options |= NAND_BBT_NO_OOB; } else { /* skip the scan for now until we have OOB read and write support */ - denali->nand.options |= NAND_SKIP_BBTSCAN; + nand->options |= NAND_SKIP_BBTSCAN; } /* no subpage writes on denali */ - denali->nand.options |= NAND_NO_SUBPAGE_WRITE; + nand->options |= NAND_NO_SUBPAGE_WRITE; /* * Denali Controller only support 15bit and 8bit ECC in MRST, @@ -1473,34 +1478,34 @@ * SLC if possible. * */ if (!nand_is_slc(&denali->nand) && - (denali->mtd.oobsize > (denali->bbtskipbytes + - ECC_15BITS * (denali->mtd.writesize / + (mtd->oobsize > (denali->bbtskipbytes + + ECC_15BITS * (mtd->writesize / ECC_SECTOR_SIZE)))) { /* if MLC OOB size is large enough, use 15bit ECC*/ - denali->nand.ecc.strength = 15; - denali->nand.ecc.layout = &nand_15bit_oob; - denali->nand.ecc.bytes = ECC_15BITS; + nand->ecc.strength = 15; + nand->ecc.layout = &nand_15bit_oob; + nand->ecc.bytes = ECC_15BITS; iowrite32(15, denali->flash_reg + ECC_CORRECTION); - } else if (denali->mtd.oobsize < (denali->bbtskipbytes + - ECC_8BITS * (denali->mtd.writesize / + } else if (mtd->oobsize < (denali->bbtskipbytes + + ECC_8BITS * (mtd->writesize / ECC_SECTOR_SIZE))) { pr_err("Your NAND chip OOB is not large enough to contain 8bit ECC correction codes"); goto failed_req_irq; } else { - denali->nand.ecc.strength = 8; - denali->nand.ecc.layout = &nand_8bit_oob; - denali->nand.ecc.bytes = ECC_8BITS; + nand->ecc.strength = 8; + nand->ecc.layout = &nand_8bit_oob; + nand->ecc.bytes = ECC_8BITS; iowrite32(8, denali->flash_reg + ECC_CORRECTION); } - denali->nand.ecc.bytes *= denali->devnum; - denali->nand.ecc.strength *= denali->devnum; - denali->nand.ecc.layout->eccbytes *= - denali->mtd.writesize / ECC_SECTOR_SIZE; - denali->nand.ecc.layout->oobfree[0].offset = - denali->bbtskipbytes + denali->nand.ecc.layout->eccbytes; - denali->nand.ecc.layout->oobfree[0].length = - denali->mtd.oobsize - denali->nand.ecc.layout->eccbytes - + nand->ecc.bytes *= denali->devnum; + nand->ecc.strength *= denali->devnum; + nand->ecc.layout->eccbytes *= + mtd->writesize / ECC_SECTOR_SIZE; + nand->ecc.layout->oobfree[0].offset = + denali->bbtskipbytes + nand->ecc.layout->eccbytes; + nand->ecc.layout->oobfree[0].length = + mtd->oobsize - nand->ecc.layout->eccbytes - denali->bbtskipbytes; /* @@ -1508,17 +1513,17 @@ * contained by each nand chip. blksperchip will help driver to * know how many blocks is taken by FW. */ - denali->totalblks = denali->mtd.size >> denali->nand.phys_erase_shift; - denali->blksperchip = denali->totalblks / denali->nand.numchips; + denali->totalblks = mtd->size >> nand->phys_erase_shift; + denali->blksperchip = denali->totalblks / nand->numchips; /* override the default read operations */ - denali->nand.ecc.size = ECC_SECTOR_SIZE * denali->devnum; - denali->nand.ecc.read_page = denali_read_page; - denali->nand.ecc.read_page_raw = denali_read_page_raw; - denali->nand.ecc.write_page = denali_write_page; - denali->nand.ecc.write_page_raw = denali_write_page_raw; - denali->nand.ecc.read_oob = denali_read_oob; - denali->nand.ecc.write_oob = denali_write_oob; + nand->ecc.size = ECC_SECTOR_SIZE * denali->devnum; + nand->ecc.read_page = denali_read_page; + nand->ecc.read_page_raw = denali_read_page_raw; + nand->ecc.write_page = denali_write_page; + nand->ecc.write_page_raw = denali_write_page_raw; + nand->ecc.read_oob = denali_read_oob; + nand->ecc.write_oob = denali_write_oob; /* Occasionally the controller is in SPARE or MAIN+SPARE mode upon startup, and we want it to be MAIN only */ @@ -1534,12 +1539,12 @@ MAIN_ACCESS); } - if (nand_scan_tail(&denali->mtd)) { + if (nand_scan_tail(mtd)) { ret = -ENXIO; goto failed_req_irq; } - return add_mtd_nand_device(&denali->mtd, "nand"); + return add_mtd_nand_device(mtd, "nand"); failed_req_irq: denali_irq_cleanup(denali->irq, denali); diff --git a/drivers/mtd/nand/nand_imx.c b/drivers/mtd/nand/nand_imx.c index e0d840b..1a065cb 100644 --- a/drivers/mtd/nand/nand_imx.c +++ b/drivers/mtd/nand/nand_imx.c @@ -32,7 +32,6 @@ #include struct imx_nand_host { - struct mtd_info mtd; struct nand_chip nand; struct mtd_partition *parts; struct device_d *dev; @@ -478,7 +477,7 @@ static int imx_nand_correct_data_v1(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; if (host->eccstatus_v1 < 0) @@ -494,7 +493,7 @@ static int imx_nand_correct_data_v2_v3(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; u32 ecc_stat, err; int no_subpages; @@ -537,7 +536,7 @@ */ static u_char imx_nand_read_byte(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; u_char ret; @@ -568,7 +567,7 @@ */ static u16 imx_nand_read_word(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; uint16_t ret; @@ -590,7 +589,7 @@ static void imx_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; u16 col = host->buf_start; int n = mtd->oobsize + mtd->writesize - col; @@ -613,7 +612,7 @@ */ static void imx_nand_read_buf(struct mtd_info *mtd, u_char * buf, int len) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; u16 col = host->buf_start; int n = mtd->oobsize + mtd->writesize - col; @@ -634,7 +633,7 @@ */ static void copy_spare(struct mtd_info *mtd, int bfrom, void *buf) { - struct nand_chip *this = mtd->priv; + struct nand_chip *this = mtd_to_nand(mtd); struct imx_nand_host *host = this->priv; u16 i, j; u16 n = mtd->writesize >> 9; @@ -672,7 +671,7 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; /* @@ -738,7 +737,7 @@ static void preset_v1(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; uint16_t config1 = 0; @@ -760,7 +759,7 @@ static void preset_v2(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; uint16_t config1 = 0; int mode; @@ -820,7 +819,7 @@ static void preset_v3(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct imx_nand_host *host = chip->priv; uint32_t config2, config3; int i, addr_phases; @@ -962,7 +961,7 @@ static void imx_nand_command(struct mtd_info *mtd, unsigned command, int column, int page_addr) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct imx_nand_host *host = nand_chip->priv; dev_dbg(host->dev, @@ -1237,8 +1236,7 @@ /* structures must be linked */ this = &host->nand; - mtd = &host->mtd; - mtd->priv = this; + mtd = &this->mtd; mtd->parent = dev; mtd->name = "imx_nand"; diff --git a/drivers/mtd/nand/nand_imx_bbm.c b/drivers/mtd/nand/nand_imx_bbm.c index 23722a9..c005482 100644 --- a/drivers/mtd/nand/nand_imx_bbm.c +++ b/drivers/mtd/nand/nand_imx_bbm.c @@ -77,7 +77,7 @@ static void *create_bbt(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); int len, i, numblocks, ret; loff_t from = 0; uint8_t *bbt; @@ -122,7 +122,7 @@ static int attach_bbt(struct mtd_info *mtd, void *bbt) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); chip->bbt_td->options |= NAND_BBT_WRITE | NAND_BBT_CREATE; chip->bbt_md->options |= NAND_BBT_WRITE | NAND_BBT_CREATE; diff --git a/drivers/mtd/nand/nand_mrvl_nfc.c b/drivers/mtd/nand/nand_mrvl_nfc.c index f48403d..15d052b 100644 --- a/drivers/mtd/nand/nand_mrvl_nfc.c +++ b/drivers/mtd/nand/nand_mrvl_nfc.c @@ -137,7 +137,6 @@ }; struct mrvl_nand_host { - struct mtd_info mtd; struct nand_chip chip; struct mtd_partition *parts; struct device_d *dev; @@ -342,7 +341,7 @@ static void mrvl_nand_set_timing(struct mrvl_nand_host *host, bool use_default) { - struct mtd_info *mtd = &host->mtd; + struct mtd_info *mtd = &host->chip.mtd; unsigned long nand_clk = clk_get_rate(host->core_clk); struct mrvl_nand_timing *t; uint32_t ndtr0, ndtr1; @@ -420,7 +419,7 @@ { unsigned int datasize; - datasize = host->mtd.writesize; + datasize = host->chip.mtd.writesize; if (host->use_spare) { datasize += host->spare_size; if (!host->use_ecc) @@ -572,7 +571,7 @@ if (command == NAND_CMD_READ0 || command == NAND_CMD_READOOB || command == NAND_CMD_SEQIN) { - host->buf_count = host->mtd.writesize + host->mtd.oobsize; + host->buf_count = host->chip.mtd.writesize + host->chip.mtd.oobsize; memset(host->data_buff, 0xFF, host->buf_count); } @@ -592,7 +591,7 @@ int addr_cycle, exec_cmd; struct mtd_info *mtd; - mtd = &host->mtd; + mtd = &host->chip.mtd; exec_cmd = 1; if (host->cs != 0) @@ -878,7 +877,7 @@ static void mrvl_nand_config_flash(struct mrvl_nand_host *host) { struct nand_chip *chip = &host->chip; - struct mtd_info *mtd = &host->mtd; + struct mtd_info *mtd = &host->chip.mtd; uint32_t ndcr = host->reg_ndcr; /* calculate flash information */ @@ -1036,7 +1035,7 @@ static int mrvl_nand_scan(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mrvl_nand_host *host = chip->priv; int ret; unsigned int ndcr; @@ -1115,8 +1114,7 @@ host = xzalloc(sizeof(*host)); host->num_cs = 1; host->cs = 0; - mtd = &host->mtd; - mtd->priv = &host->chip; + mtd = &host->chip.mtd; mtd->parent = dev; mtd->name = "mrvl_nand"; @@ -1216,14 +1214,14 @@ return ret; host->chip.controller = &host->chip.hwcontrol; - ret = mrvl_nand_scan(&host->mtd); + ret = mrvl_nand_scan(&host->chip.mtd); if (ret) { dev_warn(dev, "failed to scan nand at cs %d\n", host->cs); return -ENODEV; } - ret = add_mtd_nand_device(&host->mtd, "nand"); + ret = add_mtd_nand_device(&host->chip.mtd, "nand"); return ret; } diff --git a/drivers/mtd/nand/nand_mxs.c b/drivers/mtd/nand/nand_mxs.c index b016c5b..36b6e7a 100644 --- a/drivers/mtd/nand/nand_mxs.c +++ b/drivers/mtd/nand/nand_mxs.c @@ -200,7 +200,6 @@ void __iomem *io_base; void __iomem *bch_base; struct clk *clk; - struct mtd_info mtd; enum gpmi_type type; int dma_channel_base; u32 version; @@ -284,7 +283,7 @@ static uint32_t mxs_nand_get_mark_offset(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); uint32_t chunk_data_size_in_bits; uint32_t chunk_ecc_size_in_bits; uint32_t chunk_total_size_in_bits; @@ -333,7 +332,7 @@ static int mxs_nand_calc_geo(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; int ecc_chunk_count = mxs_nand_ecc_chunk_cnt(mtd->writesize); int gf_len = 13; /* length of Galois Field for non-DDR nand */ @@ -380,7 +379,7 @@ if (!mxs_nand_mtd) return -ENODEV; - chip = mxs_nand_mtd->priv; + chip = mtd_to_nand(mxs_nand_mtd); nand_info = chip->priv; *ecc_strength = chip->ecc.strength; @@ -423,7 +422,7 @@ */ static void mxs_nand_cmd_ctrl(struct mtd_info *mtd, int data, unsigned int ctrl) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; struct mxs_dma_desc *d; uint32_t channel = nand_info->dma_channel_base + nand_info->cur_chip; @@ -499,7 +498,7 @@ */ static int mxs_nand_device_ready(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; void __iomem *gpmi_regs = nand_info->io_base; uint32_t tmp; @@ -525,7 +524,7 @@ */ static void mxs_nand_select_chip(struct mtd_info *mtd, int chipnum) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; nand_info->cur_chip = chipnum; @@ -541,7 +540,7 @@ static void mxs_nand_swap_block_mark(struct mtd_info *mtd, uint8_t *data_buf, uint8_t *oob_buf) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; uint32_t bit_offset; @@ -582,7 +581,7 @@ */ static void mxs_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int length) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; struct mxs_dma_desc *d; uint32_t channel = nand_info->dma_channel_base + nand_info->cur_chip; @@ -660,7 +659,7 @@ static void mxs_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int length) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; struct mxs_dma_desc *d; uint32_t channel = nand_info->dma_channel_base + nand_info->cur_chip; @@ -717,7 +716,7 @@ static void mxs_nand_config_bch(struct mtd_info *mtd, int readlen) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; int chunk_size; void __iomem *bch_regs = nand_info->bch_base; @@ -1031,7 +1030,7 @@ static int mxs_nand_hook_read_oob(struct mtd_info *mtd, loff_t from, struct mtd_oob_ops *ops) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; int ret; @@ -1056,7 +1055,7 @@ static int mxs_nand_hook_write_oob(struct mtd_info *mtd, loff_t to, struct mtd_oob_ops *ops) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; int ret; @@ -1080,7 +1079,7 @@ */ static int mxs_nand_hook_block_markbad(struct mtd_info *mtd, loff_t ofs) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; int ret; @@ -1242,7 +1241,7 @@ */ static int mxs_nand_scan_bbt(struct mtd_info *mtd) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct mxs_nand_info *nand_info = chip->priv; void __iomem *bch_regs = nand_info->bch_base; int ret; @@ -2030,7 +2029,7 @@ static int mxs_nand_enable_edo_mode(struct mxs_nand_info *info) { struct nand_chip *chip = &info->nand_chip; - struct mtd_info *mtd = &info->mtd; + struct mtd_info *mtd = &chip->mtd; uint8_t feature[ONFI_SUBFEATURE_PARAM_LEN] = {}; int ret, mode; @@ -2196,8 +2195,7 @@ /* structures must be linked */ chip = &nand_info->nand_chip; - mtd = &nand_info->mtd; - mtd->priv = chip; + mtd = &nand_info->nand_chip.mtd; mtd->parent = dev; chip->priv = nand_info; diff --git a/drivers/mtd/nand/nand_omap_gpmc.c b/drivers/mtd/nand/nand_omap_gpmc.c index 2dcf7e7..9c7f5a0 100644 --- a/drivers/mtd/nand/nand_omap_gpmc.c +++ b/drivers/mtd/nand/nand_omap_gpmc.c @@ -139,7 +139,7 @@ */ static int omap_dev_ready(struct mtd_info *mtd) { - struct nand_chip *nand = (struct nand_chip *)(mtd->priv); + struct nand_chip *nand = mtd_to_nand(mtd); struct gpmc_nand_info *oinfo = (struct gpmc_nand_info *)(nand->priv); if (readl(oinfo->gpmc_base + GPMC_STATUS) & oinfo->wait_mon_mask) @@ -185,7 +185,7 @@ */ static void omap_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - struct nand_chip *nand = (struct nand_chip *)(mtd->priv); + struct nand_chip *nand = mtd_to_nand(mtd); struct gpmc_nand_info *oinfo = (struct gpmc_nand_info *)(nand->priv); switch (ctrl) { @@ -230,7 +230,7 @@ static int __omap_calculate_ecc(struct mtd_info *mtd, uint8_t *ecc_code, int sblock) { - struct nand_chip *nand = (struct nand_chip *)(mtd->priv); + struct nand_chip *nand = mtd_to_nand(mtd); struct gpmc_nand_info *oinfo = (struct gpmc_nand_info *)(nand->priv); unsigned int reg; unsigned int val1 = 0x0, val2 = 0x0; @@ -290,7 +290,7 @@ static int omap_correct_bch(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc) { - struct nand_chip *nand = (struct nand_chip *)(mtd->priv); + struct nand_chip *nand = mtd_to_nand(mtd); struct gpmc_nand_info *oinfo = (struct gpmc_nand_info *)(nand->priv); int j, actual_eccsize; const uint8_t *erased_ecc_vec; @@ -362,7 +362,7 @@ unsigned int orig_ecc, new_ecc, res, hm; unsigned short parity_bits, byte; unsigned char bit; - struct nand_chip *nand = (struct nand_chip *)(mtd->priv); + struct nand_chip *nand = mtd_to_nand(mtd); struct gpmc_nand_info *oinfo = (struct gpmc_nand_info *)(nand->priv); if (read_ecc[0] == 0xff && read_ecc[1] == 0xff && @@ -416,7 +416,7 @@ static int omap_correct_data(struct mtd_info *mtd, uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc) { - struct nand_chip *nand = (struct nand_chip *)(mtd->priv); + struct nand_chip *nand = mtd_to_nand(mtd); struct gpmc_nand_info *oinfo = (struct gpmc_nand_info *)(nand->priv); if (oinfo->ecc_mode != OMAP_ECC_HAMMING_CODE_HW_ROMCODE) @@ -429,7 +429,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int mode) { - struct nand_chip *nand = (struct nand_chip *)(mtd->priv); + struct nand_chip *nand = mtd_to_nand(mtd); struct gpmc_nand_info *oinfo = (struct gpmc_nand_info *)(nand->priv); unsigned int bch_mod = 0, bch_wrapmode = 0, eccsize1 = 0, eccsize0 = 0; unsigned int ecc_conf_val = 0, ecc_size_conf_val = 0; @@ -883,7 +883,6 @@ nand->priv = (void *)oinfo; minfo = &oinfo->minfo; - minfo->priv = (void *)nand; minfo->parent = pdev; if (pdata->cs >= GPMC_NUM_CS) { diff --git a/drivers/mtd/nand/nand_orion.c b/drivers/mtd/nand/nand_orion.c index 881ffee..c8b89cd 100644 --- a/drivers/mtd/nand/nand_orion.c +++ b/drivers/mtd/nand/nand_orion.c @@ -21,7 +21,6 @@ #include struct orion_nand { - struct mtd_info mtd; struct nand_chip chip; u8 ale; /* address line number connected to ALE */ @@ -30,7 +29,7 @@ static void orion_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); struct orion_nand *priv = chip->priv; u32 offs; @@ -52,7 +51,7 @@ static void orion_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); void __iomem *io_base = chip->IO_ADDR_R; uint64_t *buf64; int i = 0; @@ -91,7 +90,7 @@ u32 val = 0; priv = xzalloc(sizeof(struct orion_nand)); - mtd = &priv->mtd; + mtd = &priv->chip.mtd; chip = &priv->chip; iores = dev_request_mem_resource(dev, 0); @@ -118,7 +117,6 @@ chip->chip_delay = (u8)val; mtd->parent = dev; - mtd->priv = chip; chip->priv = priv; chip->IO_ADDR_R = chip->IO_ADDR_W = io_base; chip->cmd_ctrl = orion_nand_cmd_ctrl; diff --git a/drivers/mtd/nand/nand_s3c24xx.c b/drivers/mtd/nand/nand_s3c24xx.c index df22735..9fbc0f9 100644 --- a/drivers/mtd/nand/nand_s3c24xx.c +++ b/drivers/mtd/nand/nand_s3c24xx.c @@ -88,7 +88,6 @@ struct s3c24x0_nand_host { - struct mtd_info mtd; struct nand_chip nand; struct mtd_partition *parts; struct device_d *dev; @@ -203,7 +202,7 @@ */ static void s3c2440_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct s3c24x0_nand_host *host = nand_chip->priv; readsl(host->base + NFDATA, buf, len >> 2); @@ -228,7 +227,7 @@ static void s3c2440_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct s3c24x0_nand_host *host = nand_chip->priv; writesl(host->base + NFDATA, buf, len >> 2); @@ -316,7 +315,7 @@ static void s3c2410_nand_enable_hwecc(struct mtd_info *mtd, int mode) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct s3c24x0_nand_host *host = nand_chip->priv; #ifdef CONFIG_CPU_S3C2410 @@ -329,7 +328,7 @@ static int s3c2410_nand_calculate_ecc(struct mtd_info *mtd, const uint8_t *dat, uint8_t *ecc_code) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct s3c24x0_nand_host *host = nand_chip->priv; #ifdef CONFIG_CPU_S3C2410 @@ -349,7 +348,7 @@ static void s3c24x0_nand_select_chip(struct mtd_info *mtd, int chip) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct s3c24x0_nand_host *host = nand_chip->priv; if (chip == -1) @@ -360,7 +359,7 @@ static int s3c24x0_nand_devready(struct mtd_info *mtd) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct s3c24x0_nand_host *host = nand_chip->priv; return readw(host->base + NFSTAT) & NFSTAT_BUSY; @@ -369,7 +368,7 @@ static void s3c24x0_nand_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - struct nand_chip *nand_chip = mtd->priv; + struct nand_chip *nand_chip = mtd_to_nand(mtd); struct s3c24x0_nand_host *host = nand_chip->priv; if (cmd == NAND_CMD_NONE) @@ -428,8 +427,7 @@ /* structures must be linked */ chip = &host->nand; - mtd = &host->mtd; - mtd->priv = chip; + mtd = &chip->mtd; mtd->parent = dev; /* init the default settings */ diff --git a/drivers/mtd/nand/nomadik_nand.c b/drivers/mtd/nand/nomadik_nand.c index 8f37345..31bc2ef 100644 --- a/drivers/mtd/nand/nomadik_nand.c +++ b/drivers/mtd/nand/nomadik_nand.c @@ -38,7 +38,6 @@ #include struct nomadik_nand_host { - struct mtd_info mtd; struct nand_chip nand; void __iomem *cmd_va; void __iomem *addr_va; @@ -105,7 +104,7 @@ static int nomadik_ecc512_correct(struct mtd_info *mtd, uint8_t *dat, uint8_t *r_ecc, uint8_t *c_ecc) { - struct nand_chip *chip = mtd->priv; + struct nand_chip *chip = mtd_to_nand(mtd); uint32_t r, c, d, diff; /*read, calculated, xor of them */ if (!memcmp(r_ecc, c_ecc, chip->ecc.bytes)) @@ -157,7 +156,7 @@ static void nomadik_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) { - struct nand_chip *nand = mtd->priv; + struct nand_chip *nand = mtd_to_nand(mtd); struct nomadik_nand_host *host = nand->priv; if (cmd == NAND_CMD_NONE) @@ -198,9 +197,8 @@ return PTR_ERR(host->addr_va); /* Link all private pointers */ - mtd = &host->mtd; nand = &host->nand; - mtd->priv = nand; + mtd = &nand->mtd; nand->priv = host; mtd->parent = dev; @@ -223,7 +221,7 @@ /* * Scan to find existance of the device */ - if (nand_scan(&host->mtd, 1)) { + if (nand_scan(mtd, 1)) { ret = -ENXIO; goto err; } diff --git a/drivers/mtd/spi-nor/spi-nor.c b/drivers/mtd/spi-nor/spi-nor.c index 0855455..b251035 100644 --- a/drivers/mtd/spi-nor/spi-nor.c +++ b/drivers/mtd/spi-nor/spi-nor.c @@ -726,6 +726,9 @@ { "n25q512a", INFO(0x20bb20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, { "n25q512ax3", INFO(0x20ba20, 0, 64 * 1024, 1024, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, { "n25q00", INFO(0x20ba21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ) }, + { "n25q00a", INFO(0x20bb21, 0, 64 * 1024, 2048, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, + { "mt25qu02g", INFO(0x20bb22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, + { "mt25ql02g", INFO(0x20ba22, 0, 64 * 1024, 4096, SECT_4K | USE_FSR | SPI_NOR_QUAD_READ | NO_CHIP_ERASE) }, /* PMC */ { "pm25lv512", INFO(0, 0, 32 * 1024, 2, SECT_4K_PMC) }, @@ -737,6 +740,10 @@ */ { "s25sl032p", INFO(0x010215, 0x4d00, 64 * 1024, 64, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "s25sl064p", INFO(0x010216, 0x4d00, 64 * 1024, 128, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, + { "s25fl128s0", INFO6(0x012018, 0x4d0080, 256 * 1024, 64, + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, + { "s25fl128s1", INFO6(0x012018, 0x4d0180, 64 * 1024, 256, + SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ | USE_CLSR) }, { "s25fl256s0", INFO(0x010219, 0x4d00, 256 * 1024, 128, 0) }, { "s25fl256s1", INFO(0x010219, 0x4d01, 64 * 1024, 512, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, { "s25fl512s", INFO(0x010220, 0x4d00, 256 * 1024, 256, SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ) }, diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 7f17767..762f9c4 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -543,6 +543,8 @@ void *priv; unsigned int bbt_type; + + struct mtd_info mtd; }; /* @@ -799,4 +801,9 @@ /* get timing characteristics from ONFI timing mode. */ const struct nand_sdr_timings *onfi_async_timing_mode_to_sdr_timings(int mode); +static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd) +{ + return mtd->priv; +} + #endif /* __LINUX_MTD_NAND_H */