diff --git a/drivers/net/macb.c b/drivers/net/macb.c
index a0411d6..0b3c909 100644
--- a/drivers/net/macb.c
+++ b/drivers/net/macb.c
@@ -322,6 +322,29 @@
 	}
 }
 
+static int gmac_init_dummy_tx_queues(struct macb_device *macb)
+{
+	int i, num_queues = 1;
+	u32 queue_mask;
+
+	/* bit 0 is never set but queue 0 always exists */
+	queue_mask = gem_readl(macb, DCFG6) & 0xff;
+	queue_mask |= 0x1;
+
+	for (i = 1; i < MACB_MAX_QUEUES; i++)
+		if (queue_mask & (1 << i))
+			num_queues++;
+
+	macb->gem_q1_descs[0].addr = 0;
+	macb->gem_q1_descs[0].ctrl = MACB_BIT(TX_WRAP) |
+		MACB_BIT(TX_LAST) | MACB_BIT(TX_USED);
+
+	for (i = 1; i < num_queues; i++)
+		gem_writel_queue_TBQP(macb, &macb->gem_q1_descs[0], i - 1);
+
+	return 0;
+}
+
 static void macb_init(struct macb_device *macb)
 {
 	unsigned long paddr, val = 0;
@@ -357,16 +380,13 @@
 	macb_writel(macb, TBQP, (ulong)macb->tx_ring);
 
 	if (macb->is_gem && macb->gem_q1_descs) {
-		/* Disable the second priority queue */
-		macb->gem_q1_descs[0].addr = 0;
-		macb->gem_q1_descs[0].ctrl = MACB_BIT(TX_WRAP) |
-				MACB_BIT(TX_LAST) |
-				MACB_BIT(TX_USED);
+		gmac_init_dummy_tx_queues(macb);
+
+		/* Disable the second priority rx queue */
 		macb->gem_q1_descs[1].addr = MACB_BIT(RX_USED) |
 				MACB_BIT(RX_WRAP);
 		macb->gem_q1_descs[1].ctrl = 0;
 
-		gem_writel(macb, TQ1, (ulong)&macb->gem_q1_descs[0]);
 		gem_writel(macb, RQ1, (ulong)&macb->gem_q1_descs[1]);
 	}
 
diff --git a/drivers/net/macb.h b/drivers/net/macb.h
index fda4d08..2e5b64e 100644
--- a/drivers/net/macb.h
+++ b/drivers/net/macb.h
@@ -5,6 +5,8 @@
 #ifndef __DRIVERS_MACB_H__
 #define __DRIVERS_MACB_H__
 
+#define MACB_MAX_QUEUES 8
+
 /* MACB register offsets */
 #define MACB_NCR				0x0000
 #define MACB_NCFGR				0x0004
@@ -75,6 +77,8 @@
 #define GEM_TQ1					0x0440
 #define GEM_RQ1					0x0480
 
+#define GEM_TBQP(hw_q)				(0x0440 + ((hw_q) << 2))
+
 /* Bitfields in NCR */
 #define MACB_LB_OFFSET				0
 #define MACB_LB_SIZE				1
@@ -436,4 +440,7 @@
 #define MACB_TX_USED_OFFSET			31
 #define MACB_TX_USED_SIZE			1
 
+#define gem_writel_queue_TBQP(port, value, queue_num)	\
+	writel((value), (port)->regs + GEM_TBQP(queue_num))
+
 #endif /* __DRIVERS_MACB_H__ */