diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index 73176fb..ed69d9b 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -561,7 +561,7 @@
  */
 int genphy_restart_aneg(struct phy_device *phydev)
 {
-	int ctl;
+	int ctl, pdown;
 
 	ctl = phy_read(phydev, MII_BMCR);
 
@@ -574,6 +574,7 @@
 	ctl &= ~(BMCR_ISOLATE);
 
 	/* Clear powerdown bit which eventually is set on some phys */
+	pdown = ctl & BMCR_PDOWN;
 	ctl &= ~BMCR_PDOWN;
 
 	ctl = phy_write(phydev, MII_BMCR, ctl);
@@ -581,6 +582,12 @@
 	if (ctl < 0)
 		return ctl;
 
+	/* Micrel's ksz9031 (and perhaps others?): Changing the PDOWN bit
+	 * from '1' to '0' generates an internal reset. Must wait a minimum
+	 * of 1ms before read/write access to the PHY registers. */
+	if (pdown)
+		mdelay(1);
+
 	return 0;
 }