diff --git a/cmsis/device/rtos/source/mbed_boot.c b/cmsis/device/rtos/source/mbed_boot.c index dcaf7fd..4142816 100644 --- a/cmsis/device/rtos/source/mbed_boot.c +++ b/cmsis/device/rtos/source/mbed_boot.c @@ -128,7 +128,7 @@ VTOR register and for A9 for which CMSIS doesn't define NVIC_SetVector; in both cases target code is responsible for correctly handling the vectors. */ -#if !defined(__CORTEX_M0) && !defined(__CORTEX_A9) +#if !defined(__CORTEX_M0) && !defined(__CORTEX_A) #ifdef NVIC_RAM_VECTOR_ADDRESS uint32_t *old_vectors = (uint32_t *)SCB->VTOR; uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS; @@ -137,5 +137,5 @@ } SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS; #endif /* NVIC_RAM_VECTOR_ADDRESS */ -#endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A9) */ +#endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A) */ } diff --git a/hal/source/mbed_critical_section_api.c b/hal/source/mbed_critical_section_api.c index d9bbc7b..bb1e6dc 100644 --- a/hal/source/mbed_critical_section_api.c +++ b/hal/source/mbed_critical_section_api.c @@ -26,7 +26,7 @@ static bool are_interrupts_enabled(void) { -#if defined(__CORTEX_A9) +#if defined(__CORTEX_A) return ((__get_CPSR() & 0x80) == 0); #else return ((__get_PRIMASK() & 0x1) == 0); diff --git a/hal/tests/TESTS/mbed_hal/critical_section/main.cpp b/hal/tests/TESTS/mbed_hal/critical_section/main.cpp index 0741b0f..f1c5e85 100644 --- a/hal/tests/TESTS/mbed_hal/critical_section/main.cpp +++ b/hal/tests/TESTS/mbed_hal/critical_section/main.cpp @@ -29,7 +29,7 @@ bool test_are_interrupts_enabled(void) { -#if defined(__CORTEX_A9) +#if defined(__CORTEX_A) return ((__get_CPSR() & 0x80) == 0); #else return ((__get_PRIMASK() & 0x1) == 0); diff --git a/platform/include/platform/mbed_application.h b/platform/include/platform/mbed_application.h index 37619e2..c4036e8 100644 --- a/platform/include/platform/mbed_application.h +++ b/platform/include/platform/mbed_application.h @@ -21,7 +21,7 @@ #include #if defined(__CORTEX_M0PLUS) || defined(__CORTEX_M3) || defined(__CORTEX_M4) || defined(__CORTEX_M7)\ - || defined(__CORTEX_M23) || defined(__CORTEX_A9) || defined(__CORTEX_M33) + || defined(__CORTEX_M23) || defined(__CORTEX_A9) || defined(__CORTEX_A5) || defined(__CORTEX_M33) #define MBED_APPLICATION_SUPPORT 1 #else #define MBED_APPLICATION_SUPPORT 0 diff --git a/platform/source/mbed_application.c b/platform/source/mbed_application.c index 0d7b7c7..0f3a720 100644 --- a/platform/source/mbed_application.c +++ b/platform/source/mbed_application.c @@ -23,7 +23,7 @@ #if MBED_APPLICATION_SUPPORT -#if defined(__CORTEX_A9) +#if defined(__CORTEX_A9) || defined(__CORTEX_A5) static void powerdown_gic(void); diff --git a/platform/source/mbed_critical.c b/platform/source/mbed_critical.c index 8d2ded8..8456030 100644 --- a/platform/source/mbed_critical.c +++ b/platform/source/mbed_critical.c @@ -27,7 +27,7 @@ bool core_util_are_interrupts_enabled(void) { -#if defined(__CORTEX_A9) +#if defined(__CORTEX_A) return ((__get_CPSR() & 0x80) == 0); #else return ((__get_PRIMASK() & 0x1) == 0); @@ -36,7 +36,7 @@ bool core_util_is_isr_active(void) { -#if defined(__CORTEX_A9) +#if defined(__CORTEX_A) switch (__get_CPSR() & 0x1FU) { case CPSR_M_USR: case CPSR_M_SYS: diff --git a/platform/source/mbed_sdk_boot.c b/platform/source/mbed_sdk_boot.c index d77c7d1..0d0f3b6 100644 --- a/platform/source/mbed_sdk_boot.c +++ b/platform/source/mbed_sdk_boot.c @@ -63,7 +63,7 @@ VTOR register and for A9 for which CMSIS doesn't define NVIC_SetVector; in both cases target code is responsible for correctly handling the vectors. */ -#if !defined(__CORTEX_M0) && !defined(__CORTEX_A9) +#if !defined(__CORTEX_M0) && !defined(__CORTEX_A) #ifdef NVIC_RAM_VECTOR_ADDRESS uint32_t *old_vectors = (uint32_t *)SCB->VTOR; uint32_t *vectors = (uint32_t *)NVIC_RAM_VECTOR_ADDRESS; @@ -72,7 +72,7 @@ } SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS; #endif /* NVIC_RAM_VECTOR_ADDRESS */ -#endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A9) */ +#endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A) */ } void mbed_init(void) diff --git a/platform/source/mbed_wait_api_no_rtos.c b/platform/source/mbed_wait_api_no_rtos.c index ccac08d..b3228dc 100644 --- a/platform/source/mbed_wait_api_no_rtos.c +++ b/platform/source/mbed_wait_api_no_rtos.c @@ -91,7 +91,7 @@ #define LOOP_SCALER 2000 #endif #elif defined __CORTEX_A -#if __CORTEX_A == 9 +#if __CORTEX_A == 9 || __CORTEX_A == 5 // Cortex-A9 can dual issue for 3 cycles per iteration (SUB,NOP) = 1, (NOP,BCS) = 2 #define LOOP_SCALER 3000 #endif diff --git a/platform/tests/TESTS/mbed_platform/stats_cpu/main.cpp b/platform/tests/TESTS/mbed_platform/stats_cpu/main.cpp index 8b6dcd8..1af5504 100644 --- a/platform/tests/TESTS/mbed_platform/stats_cpu/main.cpp +++ b/platform/tests/TESTS/mbed_platform/stats_cpu/main.cpp @@ -33,7 +33,7 @@ #endif // Targets with these cores have their RAM enough size to create threads with bigger stacks -#if defined(__CORTEX_A9) || defined(__CORTEX_M23) || defined(__CORTEX_M33) || defined(__CORTEX_M7) +#if defined(__CORTEX_A9) || defined(__CORTEX_A5) || defined(__CORTEX_M23) || defined(__CORTEX_M33) || defined(__CORTEX_M7) #define MAX_THREAD_STACK 512 #else #define MAX_THREAD_STACK 384 diff --git a/rtos/tests/TESTS/mbed_rtos/malloc/main.cpp b/rtos/tests/TESTS/mbed_rtos/malloc/main.cpp index bc8678f..a470547 100644 --- a/rtos/tests/TESTS/mbed_rtos/malloc/main.cpp +++ b/rtos/tests/TESTS/mbed_rtos/malloc/main.cpp @@ -32,7 +32,7 @@ #define NUM_THREADS 4 #define THREAD_MALLOC_SIZE 100 -#if defined(__CORTEX_A9) +#if defined(__CORTEX_A9) || defined(__CORTEX_A5) #define THREAD_STACK_SIZE 512 #elif defined(__CORTEX_M23) || defined(__CORTEX_M33) #define THREAD_STACK_SIZE 512 diff --git a/rtos/tests/TESTS/mbed_rtos/threads/main.cpp b/rtos/tests/TESTS/mbed_rtos/threads/main.cpp index 6cd9f3b..3b27ab0 100644 --- a/rtos/tests/TESTS/mbed_rtos/threads/main.cpp +++ b/rtos/tests/TESTS/mbed_rtos/threads/main.cpp @@ -32,7 +32,7 @@ #include #define THREAD_STACK_SIZE 512 -#if defined(__CORTEX_A9) || defined(__CORTEX_M23) || defined(__CORTEX_M33) || defined(TARGET_ARM_FM) || defined(TARGET_CY8CKIT_062_WIFI_BT_PSA) +#if defined(__CORTEX_A9) || defined(__CORTEX_A5) || defined(__CORTEX_M23) || defined(__CORTEX_M33) || defined(TARGET_ARM_FM) || defined(TARGET_CY8CKIT_062_WIFI_BT_PSA) #define PARALLEL_THREAD_STACK_SIZE 512 #define CHILD_THREAD_STACK_SIZE 512 #else diff --git a/tools/cmake/cores/Cortex-A.cmake b/tools/cmake/cores/Cortex-A.cmake new file mode 100644 index 0000000..e911487 --- /dev/null +++ b/tools/cmake/cores/Cortex-A.cmake @@ -0,0 +1,30 @@ +# Copyright (c) 2020-2021 ARM Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") + list(APPEND common_options + "-mthumb-interwork" + "-marm" + "-mfpu=vfpv3" + "-mfloat-abi=softfp" + "-mno-unaligned-access" + "-mcpu=${CMAKE_SYSTEM_PROCESSOR}" + ) +elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") + list(APPEND common_options + "-mfpu=vfpv3" + "-mfloat-abi=hard" + "-mcpu=${CMAKE_SYSTEM_PROCESSOR}" + ) +endif() + +function(mbed_set_cpu_core_definitions target) + target_compile_definitions(${target} + INTERFACE + __CORTEX_${MBED_CPU_CORE_CODE} + ARM_MATH_C${MBED_CPU_CORE_CODE} + __FPU_PRESENT + __CMSIS_RTOS + __EVAL + ) +endfunction() diff --git a/tools/cmake/cores/Cortex-A9.cmake b/tools/cmake/cores/Cortex-A9.cmake deleted file mode 100644 index 228588e..0000000 --- a/tools/cmake/cores/Cortex-A9.cmake +++ /dev/null @@ -1,31 +0,0 @@ -# Copyright (c) 2020-2021 ARM Limited. All rights reserved. -# SPDX-License-Identifier: Apache-2.0 - -if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") - list(APPEND common_options - "-mthumb-interwork" - "-marm" - "-mfpu=vfpv3" - "-mfloat-abi=softfp" - "-mno-unaligned-access" - "-mcpu=cortex-a9" - ) -elseif(${MBED_TOOLCHAIN} STREQUAL "ARM") - list(APPEND common_options - "-mfpu=vfpv3" - "-mfloat-abi=hard" - "-mcpu=cortex-a9" - ) -endif() - -function(mbed_set_cpu_core_definitions target) - target_compile_definitions(${target} - INTERFACE - __CORTEX_A9 - ARM_MATH_CA9 - __FPU_PRESENT - __CMSIS_RTOS - __EVAL - __MBED_CMSIS_RTOS_CA9 - ) -endfunction() diff --git a/tools/cmake/cores/Cortex-M0+.cmake b/tools/cmake/cores/Cortex-M0+.cmake index 7756a48..c853e71 100644 --- a/tools/cmake/cores/Cortex-M0+.cmake +++ b/tools/cmake/cores/Cortex-M0+.cmake @@ -19,6 +19,5 @@ __CORTEX_M0PLUS ARM_MATH_CM0PLUS __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M0.cmake b/tools/cmake/cores/Cortex-M0.cmake index 56ec0e4..864d9be 100644 --- a/tools/cmake/cores/Cortex-M0.cmake +++ b/tools/cmake/cores/Cortex-M0.cmake @@ -19,6 +19,5 @@ __CORTEX_M0 ARM_MATH_CM0 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M1.cmake b/tools/cmake/cores/Cortex-M1.cmake index 229a02a..a6ad18d 100644 --- a/tools/cmake/cores/Cortex-M1.cmake +++ b/tools/cmake/cores/Cortex-M1.cmake @@ -19,6 +19,5 @@ __CORTEX_M3 ARM_MATH_CM1 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M23-NS.cmake b/tools/cmake/cores/Cortex-M23-NS.cmake index c71f582..fbec9c1 100644 --- a/tools/cmake/cores/Cortex-M23-NS.cmake +++ b/tools/cmake/cores/Cortex-M23-NS.cmake @@ -21,6 +21,5 @@ ARM_MATH_ARMV8MBL DOMAIN_NS=1 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M23.cmake b/tools/cmake/cores/Cortex-M23.cmake index b3ff18a..e50efcb 100644 --- a/tools/cmake/cores/Cortex-M23.cmake +++ b/tools/cmake/cores/Cortex-M23.cmake @@ -20,6 +20,5 @@ __CORTEX_M23 ARM_MATH_ARMV8MBL __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M3.cmake b/tools/cmake/cores/Cortex-M3.cmake index f260799..c90a29e 100644 --- a/tools/cmake/cores/Cortex-M3.cmake +++ b/tools/cmake/cores/Cortex-M3.cmake @@ -19,6 +19,5 @@ __CORTEX_M3 ARM_MATH_CM3 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M33-NS.cmake b/tools/cmake/cores/Cortex-M33-NS.cmake index 40a074b..8ba132b 100644 --- a/tools/cmake/cores/Cortex-M33-NS.cmake +++ b/tools/cmake/cores/Cortex-M33-NS.cmake @@ -28,6 +28,5 @@ ARM_MATH_ARMV8MML DOMAIN_NS=1 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M33.cmake b/tools/cmake/cores/Cortex-M33.cmake index 2a36927..ce9db87 100644 --- a/tools/cmake/cores/Cortex-M33.cmake +++ b/tools/cmake/cores/Cortex-M33.cmake @@ -27,6 +27,5 @@ __CORTEX_M33 ARM_MATH_ARMV8MML __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M33F-NS.cmake b/tools/cmake/cores/Cortex-M33F-NS.cmake index f070591..b77ec94 100644 --- a/tools/cmake/cores/Cortex-M33F-NS.cmake +++ b/tools/cmake/cores/Cortex-M33F-NS.cmake @@ -26,6 +26,5 @@ DOMAIN_NS=1 __FPU_PRESENT=1U __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M33F.cmake b/tools/cmake/cores/Cortex-M33F.cmake index 38c0ecb..3f68c16 100644 --- a/tools/cmake/cores/Cortex-M33F.cmake +++ b/tools/cmake/cores/Cortex-M33F.cmake @@ -24,6 +24,5 @@ ARM_MATH_ARMV8MML __FPU_PRESENT=1U __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M33FE-NS.cmake b/tools/cmake/cores/Cortex-M33FE-NS.cmake index a75d1c8..1fc679e 100644 --- a/tools/cmake/cores/Cortex-M33FE-NS.cmake +++ b/tools/cmake/cores/Cortex-M33FE-NS.cmake @@ -25,7 +25,6 @@ DOMAIN_NS=1 __FPU_PRESENT=1U __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM __DSP_PRESENT=1U ) endfunction() diff --git a/tools/cmake/cores/Cortex-M33FE.cmake b/tools/cmake/cores/Cortex-M33FE.cmake index 2ef0441..a4b8a93 100644 --- a/tools/cmake/cores/Cortex-M33FE.cmake +++ b/tools/cmake/cores/Cortex-M33FE.cmake @@ -24,7 +24,6 @@ ARM_MATH_ARMV8MML __FPU_PRESENT=1U __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM __DSP_PRESENT=1U ) endfunction() diff --git a/tools/cmake/cores/Cortex-M4.cmake b/tools/cmake/cores/Cortex-M4.cmake index 0ba56db..533da38 100644 --- a/tools/cmake/cores/Cortex-M4.cmake +++ b/tools/cmake/cores/Cortex-M4.cmake @@ -25,6 +25,5 @@ __CORTEX_M4 ARM_MATH_CM4 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M4F.cmake b/tools/cmake/cores/Cortex-M4F.cmake index 5caaf39..66fb4b8 100644 --- a/tools/cmake/cores/Cortex-M4F.cmake +++ b/tools/cmake/cores/Cortex-M4F.cmake @@ -24,6 +24,5 @@ ARM_MATH_CM4 __FPU_PRESENT=1 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M55.cmake b/tools/cmake/cores/Cortex-M55.cmake index 37410aa..855106e 100644 --- a/tools/cmake/cores/Cortex-M55.cmake +++ b/tools/cmake/cores/Cortex-M55.cmake @@ -24,6 +24,5 @@ __CORTEX_M55 __FPU_PRESENT=1 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M7.cmake b/tools/cmake/cores/Cortex-M7.cmake index 4f33f42..647e9c2 100644 --- a/tools/cmake/cores/Cortex-M7.cmake +++ b/tools/cmake/cores/Cortex-M7.cmake @@ -20,6 +20,5 @@ __CORTEX_M7 ARM_MATH_CM7 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M7F.cmake b/tools/cmake/cores/Cortex-M7F.cmake index 4e38752..e8a47b3 100644 --- a/tools/cmake/cores/Cortex-M7F.cmake +++ b/tools/cmake/cores/Cortex-M7F.cmake @@ -25,6 +25,5 @@ ARM_MATH_CM7 __FPU_PRESENT=1 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/cores/Cortex-M7FD.cmake b/tools/cmake/cores/Cortex-M7FD.cmake index 72f5eb2..db2f6d6 100644 --- a/tools/cmake/cores/Cortex-M7FD.cmake +++ b/tools/cmake/cores/Cortex-M7FD.cmake @@ -24,6 +24,5 @@ ARM_MATH_CM7 __FPU_PRESENT=1 __CMSIS_RTOS - __MBED_CMSIS_RTOS_CM ) endfunction() diff --git a/tools/cmake/mbed_toolchain.cmake b/tools/cmake/mbed_toolchain.cmake index 7a61a0d..818aee4 100644 --- a/tools/cmake/mbed_toolchain.cmake +++ b/tools/cmake/mbed_toolchain.cmake @@ -25,6 +25,8 @@ # Set the system processor depending on the CPU core type if (MBED_CPU_CORE STREQUAL Cortex-A9) set(CMAKE_SYSTEM_PROCESSOR cortex-a9) +elseif (MBED_CPU_CORE STREQUAL Cortex-A5) + set(CMAKE_SYSTEM_PROCESSOR cortex-a5) elseif (MBED_CPU_CORE STREQUAL Cortex-M0+) set(CMAKE_SYSTEM_PROCESSOR cortex-m0plus) elseif (MBED_CPU_CORE STREQUAL Cortex-M0) @@ -102,7 +104,14 @@ set(asm_compile_options "") # compile options only for ASM include(toolchains/${MBED_TOOLCHAIN}) -include(cores/${MBED_CPU_CORE}) + +set(MBED_CPU_CORE_TAG ${MBED_CPU_CORE}) +if (MBED_CPU_CORE MATCHES "Cortex-A[0-9]+$") + set(MBED_CPU_CORE_TAG "Cortex-A") + string(REPLACE "Cortex-" "" MBED_CPU_CORE_CODE "${MBED_CPU_CORE}") +endif() + +include(cores/${MBED_CPU_CORE_TAG}) #converts a list into a string with each of its elements seperated by a space macro(list_to_space_separated OUTPUT_VAR)# 2nd arg: LIST... diff --git a/tools/export/gnuarmeclipse/__init__.py b/tools/export/gnuarmeclipse/__init__.py index 5e65e18..c8697fc 100644 --- a/tools/export/gnuarmeclipse/__init__.py +++ b/tools/export/gnuarmeclipse/__init__.py @@ -428,6 +428,7 @@ 'Cortex-M7': {'mcpu': 'cortex-m7', 'fpu_unit': None}, 'Cortex-M7F': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv4spd16'}, 'Cortex-M7FD': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv5d16'}, + 'Cortex-A5': {'mcpu': 'cortex-a5', 'fpu_unit': 'vfpv3'}, 'Cortex-A9': {'mcpu': 'cortex-a9', 'fpu_unit': 'vfpv3'} } diff --git a/tools/export/mcuxpresso/__init__.py b/tools/export/mcuxpresso/__init__.py index 47d9dac..b54c835 100644 --- a/tools/export/mcuxpresso/__init__.py +++ b/tools/export/mcuxpresso/__init__.py @@ -353,6 +353,7 @@ 'Cortex-M7': {'mcpu': 'cortex-m7', 'fpu_unit': None}, 'Cortex-M7F': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv4spd16'}, 'Cortex-M7FD': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv5d16'}, + 'Cortex-A5': {'mcpu': 'cortex-a5', 'fpu_unit': 'vfpv3'}, 'Cortex-A9': {'mcpu': 'cortex-a9', 'fpu_unit': 'vfpv3'} } diff --git a/tools/targets/__init__.py b/tools/targets/__init__.py index fdf7613..8c8633d 100644 --- a/tools/targets/__init__.py +++ b/tools/targets/__init__.py @@ -49,6 +49,7 @@ "Cortex-M7F": ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7", "CORTEX"], "Cortex-M7FD": ["M7", "CORTEX_M", "RTOS_M4_M7", "LIKE_CORTEX_M7", "CORTEX"], + "Cortex-A5": ["A5", "CORTEX_A", "LIKE_CORTEX_A5", "CORTEX"], "Cortex-A9": ["A9", "CORTEX_A", "LIKE_CORTEX_A9", "CORTEX"], "Cortex-M23": ["M23", "CORTEX_M", "LIKE_CORTEX_M23", "CORTEX"], "Cortex-M23-NS": ["M23", "M23_NS", "CORTEX_M", "LIKE_CORTEX_M23", @@ -74,6 +75,7 @@ "Cortex-M7": 7, "Cortex-M7F": 7, "Cortex-M7FD": 7, + "Cortex-A5": 7, "Cortex-A9": 7, "Cortex-M23": 8, "Cortex-M23-NS": 8, diff --git a/tools/toolchains/arm.py b/tools/toolchains/arm.py index f8f81af..bc85658 100644 --- a/tools/toolchains/arm.py +++ b/tools/toolchains/arm.py @@ -57,7 +57,7 @@ SHEBANG = "#! armcc -E" SUPPORTED_CORES = [ "Cortex-M0", "Cortex-M0+", "Cortex-M3", "Cortex-M4", "Cortex-M4F", - "Cortex-M7", "Cortex-M7F", "Cortex-M7FD", "Cortex-A9" + "Cortex-M7", "Cortex-M7F", "Cortex-M7FD", "Cortex-A5", "Cortex-A9" ] ARMCC_RANGE = (LooseVersion("5.06"), LooseVersion("5.07")) ARMCC_PRODUCT_RE = re.compile(b"Product: (.*)") @@ -544,7 +544,7 @@ "Cortex-M4F", "Cortex-M7", "Cortex-M7F", "Cortex-M7FD", "Cortex-M23", "Cortex-M23-NS", "Cortex-M33", "Cortex-M33F", "Cortex-M33-NS", "Cortex-M33F-NS", "Cortex-M33FE-NS", "Cortex-M33FE", - "Cortex-A9" + "Cortex-A5", "Cortex-A9" ] ARMCC_RANGE = (LooseVersion("6.10"), LooseVersion("7.0")) LD_DIAGNOSTIC_PATTERN = re.compile( diff --git a/tools/toolchains/gcc.py b/tools/toolchains/gcc.py index c3a4ef8..762f4ee 100644 --- a/tools/toolchains/gcc.py +++ b/tools/toolchains/gcc.py @@ -131,7 +131,7 @@ self.cpu.append("-mfpu=fpv5-d16") self.cpu.append("-mfloat-abi=softfp") - if target.core == "Cortex-A9": + if target.core == "Cortex-A9" or target.core == "Cortex-A5": self.cpu.append("-mthumb-interwork") self.cpu.append("-marm") self.cpu.append("-march=armv7-a") diff --git a/tools/toolchains/mbed_toolchain.py b/tools/toolchains/mbed_toolchain.py index 47668b5..51429c0 100755 --- a/tools/toolchains/mbed_toolchain.py +++ b/tools/toolchains/mbed_toolchain.py @@ -86,6 +86,8 @@ "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], "Cortex-M7FD": ["__CORTEX_M7", "ARM_MATH_CM7", "__FPU_PRESENT=1", "__CMSIS_RTOS", "__MBED_CMSIS_RTOS_CM"], + "Cortex-A5": ["__CORTEX_A5", "ARM_MATH_CA5", "__FPU_PRESENT", + "__CMSIS_RTOS", "__EVAL"], "Cortex-A9": ["__CORTEX_A9", "ARM_MATH_CA9", "__FPU_PRESENT", "__CMSIS_RTOS", "__EVAL", "__MBED_CMSIS_RTOS_CA9"], "Cortex-M23-NS": ["__CORTEX_M23", "ARM_MATH_ARMV8MBL", "DOMAIN_NS=1",