diff --git a/targets/TARGET_STM/PinNamesTypes.h b/targets/TARGET_STM/PinNamesTypes.h index d51be19..673f5f5 100644 --- a/targets/TARGET_STM/PinNamesTypes.h +++ b/targets/TARGET_STM/PinNamesTypes.h @@ -37,7 +37,7 @@ #endif /* STM PIN data as used in pin_function is coded on 32 bits as below - * [2:0] Function (like in MODER reg) : Input / Output / Alt / Analog + * [2:0] Function (like in MODER reg) : Input / Output / Alt / Analog * [3] Output Push-Pull / Open Drain (as in OTYPER reg) * [5:4] as in PUPDR reg: No Pull, Pull-up, Pull-Donc * [7:6] Reserved for speed config (as in OSPEEDR), but not used yet diff --git a/targets/TARGET_STM/can_api.c b/targets/TARGET_STM/can_api.c index 246f5d1..ecada7b 100644 --- a/targets/TARGET_STM/can_api.c +++ b/targets/TARGET_STM/can_api.c @@ -45,7 +45,7 @@ can_init_freq(obj, rd, td, 100000); } -void can_init_freq (can_t *obj, PinName rd, PinName td, int hz) +void can_init_freq(can_t *obj, PinName rd, PinName td, int hz) { CANName can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD); CANName can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD); @@ -278,14 +278,14 @@ } else if ((can->TSR & CAN_TSR_TME2) == CAN_TSR_TME2) { transmitmailbox = 2; } else { - return 0; + return 0; } can->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ; if (!(msg.format)) { - can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 21) | (msg.type << 1)); + can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 21) | (msg.type << 1)); } else { - can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 3) | CAN_ID_EXT | (msg.type << 1)); + can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 3) | CAN_ID_EXT | (msg.type << 1)); } /* Set up the DLC */ @@ -294,13 +294,13 @@ /* Set up the data field */ can->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)msg.data[3] << 24) | - ((uint32_t)msg.data[2] << 16) | - ((uint32_t)msg.data[1] << 8) | - ((uint32_t)msg.data[0])); + ((uint32_t)msg.data[2] << 16) | + ((uint32_t)msg.data[1] << 8) | + ((uint32_t)msg.data[0])); can->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)msg.data[7] << 24) | - ((uint32_t)msg.data[6] << 16) | - ((uint32_t)msg.data[5] << 8) | - ((uint32_t)msg.data[4])); + ((uint32_t)msg.data[6] << 16) | + ((uint32_t)msg.data[5] << 8) | + ((uint32_t)msg.data[4])); /* Request transmission */ can->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ; @@ -382,7 +382,7 @@ { CanMode mode = MODE_NORMAL; /* Update current state w/ or w/o silent */ - if(silent) { + if (silent) { switch (obj->CanHandle.Init.Mode) { case CAN_MODE_LOOPBACK: case CAN_MODE_SILENT_LOOPBACK: diff --git a/targets/TARGET_STM/gpio_api.c b/targets/TARGET_STM/gpio_api.c index 60d300d..02e6a5c 100644 --- a/targets/TARGET_STM/gpio_api.c +++ b/targets/TARGET_STM/gpio_api.c @@ -36,7 +36,8 @@ extern const uint32_t ll_pin_defines[16]; // Enable GPIO clock and return GPIO base address -GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx) { +GPIO_TypeDef *Set_GPIO_Clock(uint32_t port_idx) +{ uint32_t gpio_add = 0; switch (port_idx) { case PortA: @@ -112,7 +113,8 @@ return (GPIO_TypeDef *) gpio_add; } -uint32_t gpio_set(PinName pin) { +uint32_t gpio_set(PinName pin) +{ MBED_ASSERT(pin != (PinName)NC); pin_function(pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); @@ -121,7 +123,8 @@ } -void gpio_init(gpio_t *obj, PinName pin) { +void gpio_init(gpio_t *obj, PinName pin) +{ obj->pin = pin; if (pin == (PinName)NC) { return; @@ -145,11 +148,13 @@ #endif } -void gpio_mode(gpio_t *obj, PinMode mode) { +void gpio_mode(gpio_t *obj, PinMode mode) +{ pin_mode(obj->pin, mode); } -inline void gpio_dir(gpio_t *obj, PinDirection direction) { +inline void gpio_dir(gpio_t *obj, PinDirection direction) +{ if (direction == PIN_INPUT) { LL_GPIO_SetPinMode(obj->gpio, obj->ll_pin, LL_GPIO_MODE_INPUT); } else { diff --git a/targets/TARGET_STM/gpio_irq_api.c b/targets/TARGET_STM/gpio_irq_api.c index f9c1f57..522ee94 100644 --- a/targets/TARGET_STM/gpio_irq_api.c +++ b/targets/TARGET_STM/gpio_irq_api.c @@ -43,7 +43,7 @@ typedef struct gpio_channel { uint32_t pin_mask; // bitmask representing which pins are configured for receiving interrupts uint32_t channel_ids[MAX_PIN_LINE]; // mbed "gpio_irq_t gpio_irq" field of instance - GPIO_TypeDef* channel_gpio[MAX_PIN_LINE]; // base address of gpio port group + GPIO_TypeDef *channel_gpio[MAX_PIN_LINE]; // base address of gpio port group uint32_t channel_pin[MAX_PIN_LINE]; // pin number in port group } gpio_channel_t; @@ -168,7 +168,9 @@ gpio_channel_t *gpio_channel; uint32_t gpio_idx; - if (pin == NC) return -1; + if (pin == NC) { + return -1; + } /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); diff --git a/targets/TARGET_STM/hal_tick_16b.c b/targets/TARGET_STM/hal_tick_16b.c index b8c4dc6..32d67c9 100644 --- a/targets/TARGET_STM/hal_tick_16b.c +++ b/targets/TARGET_STM/hal_tick_16b.c @@ -25,7 +25,8 @@ void us_ticker_irq_handler(void); #if defined(TARGET_STM32F0) -void timer_update_irq_handler(void) { +void timer_update_irq_handler(void) +{ #else void timer_irq_handler(void) { @@ -45,7 +46,7 @@ if (__HAL_TIM_GET_FLAG(&TimMasterHandle, TIM_FLAG_CC1) == SET) { if (__HAL_TIM_GET_IT_SOURCE(&TimMasterHandle, TIM_IT_CC1) == SET) { __HAL_TIM_CLEAR_IT(&TimMasterHandle, TIM_IT_CC1); - us_ticker_irq_handler(); + us_ticker_irq_handler(); } } } diff --git a/targets/TARGET_STM/i2c_api.c b/targets/TARGET_STM/i2c_api.c index b757e3b..7ce17c6 100644 --- a/targets/TARGET_STM/i2c_api.c +++ b/targets/TARGET_STM/i2c_api.c @@ -52,14 +52,14 @@ #endif #if DEVICE_I2C_ASYNCH - #define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c)) +#define I2C_S(obj) (struct i2c_s *) (&((obj)->i2c)) #else - #define I2C_S(obj) (struct i2c_s *) (obj) +#define I2C_S(obj) (struct i2c_s *) (obj) #endif /* Family specific description for I2C */ #define I2C_NUM (5) -static I2C_HandleTypeDef* i2c_handles[I2C_NUM]; +static I2C_HandleTypeDef *i2c_handles[I2C_NUM]; /* Timeout values are based on core clock and I2C clock. The BYTE_TIMEOUT is computed as twice the number of cycles it would @@ -75,7 +75,7 @@ #define BYTE_TIMEOUT_US ((SystemCoreClock / obj_s->hz) * 3 * 10) /* Timeout values for flags and events waiting loops. These timeouts are not based on accurate values, they just guarantee that the application will - not remain stuck if the I2C communication is corrupted. + not remain stuck if the I2C communication is corrupted. */ #define FLAG_TIMEOUT ((int)0x1000) @@ -84,7 +84,7 @@ #if defined(I2C1_BASE) static void i2c1_irq(void) { - I2C_HandleTypeDef * handle = i2c_handles[0]; + I2C_HandleTypeDef *handle = i2c_handles[0]; HAL_I2C_EV_IRQHandler(handle); HAL_I2C_ER_IRQHandler(handle); } @@ -92,7 +92,7 @@ #if defined(I2C2_BASE) static void i2c2_irq(void) { - I2C_HandleTypeDef * handle = i2c_handles[1]; + I2C_HandleTypeDef *handle = i2c_handles[1]; HAL_I2C_EV_IRQHandler(handle); HAL_I2C_ER_IRQHandler(handle); } @@ -100,7 +100,7 @@ #if defined(I2C3_BASE) static void i2c3_irq(void) { - I2C_HandleTypeDef * handle = i2c_handles[2]; + I2C_HandleTypeDef *handle = i2c_handles[2]; HAL_I2C_EV_IRQHandler(handle); HAL_I2C_ER_IRQHandler(handle); } @@ -108,7 +108,7 @@ #if defined(I2C4_BASE) static void i2c4_irq(void) { - I2C_HandleTypeDef * handle = i2c_handles[3]; + I2C_HandleTypeDef *handle = i2c_handles[3]; HAL_I2C_EV_IRQHandler(handle); HAL_I2C_ER_IRQHandler(handle); } @@ -116,13 +116,14 @@ #if defined(FMPI2C1_BASE) static void i2c5_irq(void) { - I2C_HandleTypeDef * handle = i2c_handles[4]; + I2C_HandleTypeDef *handle = i2c_handles[4]; HAL_I2C_EV_IRQHandler(handle); HAL_I2C_ER_IRQHandler(handle); } #endif -void i2c_ev_err_enable(i2c_t *obj, uint32_t handler) { +void i2c_ev_err_enable(i2c_t *obj, uint32_t handler) +{ struct i2c_s *obj_s = I2C_S(obj); IRQn_Type irq_event_n = obj_s->event_i2cIRQ; IRQn_Type irq_error_n = obj_s->error_i2cIRQ; @@ -149,7 +150,8 @@ NVIC_EnableIRQ(irq_error_n); } -void i2c_ev_err_disable(i2c_t *obj) { +void i2c_ev_err_disable(i2c_t *obj) +{ struct i2c_s *obj_s = I2C_S(obj); IRQn_Type irq_event_n = obj_s->event_i2cIRQ; IRQn_Type irq_error_n = obj_s->error_i2cIRQ; @@ -196,7 +198,8 @@ return handler; } -void i2c_hw_reset(i2c_t *obj) { +void i2c_hw_reset(i2c_t *obj) +{ int timeout; struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); @@ -251,11 +254,12 @@ * - Write PE=1. */ handle->Instance->CR1 &= ~I2C_CR1_PE; - while(handle->Instance->CR1 & I2C_CR1_PE); + while (handle->Instance->CR1 & I2C_CR1_PE); handle->Instance->CR1 |= I2C_CR1_PE; } -void i2c_init(i2c_t *obj, PinName sda, PinName scl) { +void i2c_init(i2c_t *obj, PinName sda, PinName scl) +{ struct i2c_s *obj_s = I2C_S(obj); @@ -323,12 +327,13 @@ // I2C configuration // Default hz value used for timeout computation - if(!obj_s->hz) - obj_s->hz = 100000; // 100 kHz per default + if (!obj_s->hz) { + obj_s->hz = 100000; // 100 kHz per default + } // Reset to clear pending flags if any i2c_hw_reset(obj); - i2c_frequency(obj, obj_s->hz ); + i2c_frequency(obj, obj_s->hz); #if DEVICE_I2CSLAVE // I2C master by default @@ -413,7 +418,7 @@ #ifdef I2C_ANALOGFILTER_ENABLE /* Enable the Analog I2C Filter */ - HAL_I2CEx_ConfigAnalogFilter(handle,I2C_ANALOGFILTER_ENABLE); + HAL_I2CEx_ConfigAnalogFilter(handle, I2C_ANALOGFILTER_ENABLE); #endif // I2C configuration @@ -429,20 +434,22 @@ obj_s->hz = hz; } -i2c_t *get_i2c_obj(I2C_HandleTypeDef *hi2c){ +i2c_t *get_i2c_obj(I2C_HandleTypeDef *hi2c) +{ /* Aim of the function is to get i2c_s pointer using hi2c pointer */ /* Highly inspired from magical linux kernel's "container_of" */ /* (which was not directly used since not compatible with IAR toolchain) */ struct i2c_s *obj_s; i2c_t *obj; - obj_s = (struct i2c_s *)( (char *)hi2c - offsetof(struct i2c_s,handle)); - obj = (i2c_t *)( (char *)obj_s - offsetof(i2c_t,i2c)); + obj_s = (struct i2c_s *)((char *)hi2c - offsetof(struct i2c_s, handle)); + obj = (i2c_t *)((char *)obj_s - offsetof(i2c_t, i2c)); return (obj); } -void i2c_reset(i2c_t *obj) { +void i2c_reset(i2c_t *obj) +{ struct i2c_s *obj_s = I2C_S(obj); /* As recommended in i2c_api.h, mainly send stop */ i2c_stop(obj); @@ -456,7 +463,8 @@ * There are 2 different IPs version that need to be supported */ #ifdef I2C_IP_VERSION_V1 -int i2c_start(i2c_t *obj) { +int i2c_start(i2c_t *obj) +{ int timeout; struct i2c_s *obj_s = I2C_S(obj); @@ -488,7 +496,8 @@ return 0; } -int i2c_stop(i2c_t *obj) { +int i2c_stop(i2c_t *obj) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_TypeDef *i2c = (I2C_TypeDef *)obj_s->i2c; @@ -498,13 +507,15 @@ /* In case of mixed usage of the APIs (unitary + SYNC) * re-init HAL state */ - if(obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME) - i2c_init(obj, obj_s->sda, obj_s->scl); + if (obj_s->XferOperation != I2C_FIRST_AND_LAST_FRAME) { + i2c_init(obj, obj_s->sda, obj_s->scl); + } return 0; } -int i2c_byte_read(i2c_t *obj, int last) { +int i2c_byte_read(i2c_t *obj, int last) +{ int timeout; struct i2c_s *obj_s = I2C_S(obj); @@ -529,7 +540,8 @@ return (int)handle->Instance->DR; } -int i2c_byte_write(i2c_t *obj, int data) { +int i2c_byte_write(i2c_t *obj, int data) +{ int timeout; struct i2c_s *obj_s = I2C_S(obj); @@ -541,30 +553,31 @@ timeout = FLAG_TIMEOUT; while ((__HAL_I2C_GET_FLAG(handle, I2C_FLAG_TXE) == RESET) && (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_BTF) == RESET) && - (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) == RESET)) { + (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) == RESET)) { if ((timeout--) == 0) { return 2; } } - if (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) != RESET) - { - __HAL_I2C_CLEAR_ADDRFLAG(handle); - } + if (__HAL_I2C_GET_FLAG(handle, I2C_FLAG_ADDR) != RESET) { + __HAL_I2C_CLEAR_ADDRFLAG(handle); + } return 1; } #endif //I2C_IP_VERSION_V1 #ifdef I2C_IP_VERSION_V2 -int i2c_start(i2c_t *obj) { +int i2c_start(i2c_t *obj) +{ struct i2c_s *obj_s = I2C_S(obj); /* This I2C IP doesn't */ obj_s->pending_start = 1; return 0; } -int i2c_stop(i2c_t *obj) { +int i2c_stop(i2c_t *obj) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); int timeout = FLAG_TIMEOUT; @@ -609,7 +622,8 @@ return 0; } -int i2c_byte_read(i2c_t *obj, int last) { +int i2c_byte_read(i2c_t *obj, int last) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); int timeout = FLAG_TIMEOUT; @@ -654,7 +668,8 @@ return data; } -int i2c_byte_write(i2c_t *obj, int data) { +int i2c_byte_write(i2c_t *obj, int data) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); int timeout = FLAG_TIMEOUT; @@ -669,10 +684,10 @@ //* First byte after the start is the address */ tmpreg |= (uint32_t)((uint32_t)data & I2C_CR2_SADD); if (data & 0x01) { - tmpreg |= I2C_CR2_START | I2C_CR2_RD_WRN; + tmpreg |= I2C_CR2_START | I2C_CR2_RD_WRN; } else { - tmpreg |= I2C_CR2_START; - tmpreg &= ~I2C_CR2_RD_WRN; + tmpreg |= I2C_CR2_START; + tmpreg &= ~I2C_CR2_RD_WRN; } /* Disable reload first to use it later */ tmpreg &= ~I2C_CR2_RELOAD; @@ -697,9 +712,9 @@ } /* Enable reload mode as we don't know how many bytes will eb sent */ tmpreg |= I2C_CR2_RELOAD; - /* Set transfer size to 1 */ + /* Set transfer size to 1 */ tmpreg |= (I2C_CR2_NBYTES & (1 << 16)); - /* Set the prepared configuration */ + /* Set the prepared configuration */ handle->Instance->CR2 = tmpreg; /* Prepare next write */ timeout = FLAG_TIMEOUT; @@ -719,7 +734,8 @@ /* * SYNC APIS */ -int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) { +int i2c_read(i2c_t *obj, int address, char *data, int length, int stop) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); int count = I2C_ERROR_BUS_BUSY, ret = 0; @@ -729,37 +745,39 @@ uint32_t op1 = I2C_FIRST_AND_LAST_FRAME; uint32_t op2 = I2C_LAST_FRAME; if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) { - if (stop) + if (stop) { obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; - else + } else { obj_s->XferOperation = I2C_FIRST_FRAME; + } } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || - (obj_s->XferOperation == I2C_NEXT_FRAME)) { - if (stop) + (obj_s->XferOperation == I2C_NEXT_FRAME)) { + if (stop) { obj_s->XferOperation = I2C_LAST_FRAME; - else + } else { obj_s->XferOperation = I2C_NEXT_FRAME; + } } obj_s->event = 0; - /* Activate default IRQ handlers for sync mode - * which would be overwritten in async mode - */ + /* Activate default IRQ handlers for sync mode + * which would be overwritten in async mode + */ i2c_ev_err_enable(obj, i2c_get_irq_handler(obj)); ret = HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation); - if(ret == HAL_OK) { + if (ret == HAL_OK) { timeout = BYTE_TIMEOUT_US * (length + 1); /* transfer started : wait completion or timeout */ - while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) { + while (!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) { wait_us(1); } i2c_ev_err_disable(obj); - if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) { + if ((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) { DEBUG_PRINTF(" TIMEOUT or error in i2c_read\r\n"); /* re-init IP to try and get back in a working state */ i2c_init(obj, obj_s->sda, obj_s->scl); @@ -773,7 +791,8 @@ return count; } -int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) { +int i2c_write(i2c_t *obj, int address, const char *data, int length, int stop) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); int count = I2C_ERROR_BUS_BUSY, ret = 0; @@ -783,40 +802,42 @@ uint32_t op1 = I2C_FIRST_AND_LAST_FRAME; uint32_t op2 = I2C_LAST_FRAME; if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) { - if (stop) + if (stop) { obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; - else + } else { obj_s->XferOperation = I2C_FIRST_FRAME; + } } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || - (obj_s->XferOperation == I2C_NEXT_FRAME)) { - if (stop) + (obj_s->XferOperation == I2C_NEXT_FRAME)) { + if (stop) { obj_s->XferOperation = I2C_LAST_FRAME; - else + } else { obj_s->XferOperation = I2C_NEXT_FRAME; + } } obj_s->event = 0; i2c_ev_err_enable(obj, i2c_get_irq_handler(obj)); - ret = HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation); + ret = HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *) data, length, obj_s->XferOperation); - if(ret == HAL_OK) { + if (ret == HAL_OK) { timeout = BYTE_TIMEOUT_US * (length + 1); /* transfer started : wait completion or timeout */ - while(!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) { + while (!(obj_s->event & I2C_EVENT_ALL) && (--timeout != 0)) { wait_us(1); } i2c_ev_err_disable(obj); - if((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) { + if ((timeout == 0) || (obj_s->event != I2C_EVENT_TRANSFER_COMPLETE)) { DEBUG_PRINTF(" TIMEOUT or error in i2c_write\r\n"); /* re-init IP to try and get back in a working state */ i2c_init(obj, obj_s->sda, obj_s->scl); - } else { + } else { count = length; - } + } } else { DEBUG_PRINTF("ERROR in i2c_read\r\n"); } @@ -824,7 +845,8 @@ return count; } -void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c){ +void HAL_I2C_MasterTxCpltCallback(I2C_HandleTypeDef *hi2c) +{ /* Get object ptr based on handler ptr */ i2c_t *obj = get_i2c_obj(hi2c); struct i2c_s *obj_s = I2C_S(obj); @@ -838,9 +860,8 @@ obj_s->XferOperation = I2C_NEXT_FRAME; } - HAL_I2C_Master_Sequential_Receive_IT(hi2c, obj_s->address, (uint8_t*)obj->rx_buff.buffer , obj->rx_buff.length, obj_s->XferOperation); - } - else + HAL_I2C_Master_Sequential_Receive_IT(hi2c, obj_s->address, (uint8_t *)obj->rx_buff.buffer, obj->rx_buff.length, obj_s->XferOperation); + } else #endif { /* Set event flag */ @@ -848,7 +869,8 @@ } } -void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c){ +void HAL_I2C_MasterRxCpltCallback(I2C_HandleTypeDef *hi2c) +{ /* Get object ptr based on handler ptr */ i2c_t *obj = get_i2c_obj(hi2c); struct i2c_s *obj_s = I2C_S(obj); @@ -857,7 +879,8 @@ obj_s->event = I2C_EVENT_TRANSFER_COMPLETE; } -void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c){ +void HAL_I2C_ErrorCallback(I2C_HandleTypeDef *hi2c) +{ /* Get object ptr based on handler ptr */ i2c_t *obj = get_i2c_obj(hi2c); struct i2c_s *obj_s = I2C_S(obj); @@ -865,8 +888,9 @@ I2C_HandleTypeDef *handle = &(obj_s->handle); uint32_t address = 0; /* Store address to handle it after reset */ - if(obj_s->slave) + if (obj_s->slave) { address = handle->Init.OwnAddress1; + } #endif DEBUG_PRINTF("HAL_I2C_ErrorCallback:%d, index=%d\r\n", (int) hi2c->ErrorCode, obj_s->index); @@ -888,7 +912,8 @@ #if DEVICE_I2CSLAVE /* SLAVE API FUNCTIONS */ -void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) { +void i2c_slave_address(i2c_t *obj, int idx, uint32_t address, uint32_t mask) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); @@ -901,7 +926,8 @@ HAL_I2C_EnableListen_IT(handle); } -void i2c_slave_mode(i2c_t *obj, int enable_slave) { +void i2c_slave_mode(i2c_t *obj, int enable_slave) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); @@ -922,29 +948,32 @@ #define WriteAddressed 3 // the master is writing to this slave (slave = receiver) -void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) { +void HAL_I2C_AddrCallback(I2C_HandleTypeDef *hi2c, uint8_t TransferDirection, uint16_t AddrMatchCode) +{ /* Get object ptr based on handler ptr */ i2c_t *obj = get_i2c_obj(hi2c); struct i2c_s *obj_s = I2C_S(obj); /* Transfer direction in HAL is from Master point of view */ - if(TransferDirection == I2C_DIRECTION_RECEIVE) { + if (TransferDirection == I2C_DIRECTION_RECEIVE) { obj_s->pending_slave_tx_master_rx = 1; } - if(TransferDirection == I2C_DIRECTION_TRANSMIT) { + if (TransferDirection == I2C_DIRECTION_TRANSMIT) { obj_s->pending_slave_rx_maxter_tx = 1; } } -void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *I2cHandle){ +void HAL_I2C_SlaveTxCpltCallback(I2C_HandleTypeDef *I2cHandle) +{ /* Get object ptr based on handler ptr */ i2c_t *obj = get_i2c_obj(I2cHandle); struct i2c_s *obj_s = I2C_S(obj); obj_s->pending_slave_tx_master_rx = 0; } -void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *I2cHandle){ +void HAL_I2C_SlaveRxCpltCallback(I2C_HandleTypeDef *I2cHandle) +{ /* Get object ptr based on handler ptr */ i2c_t *obj = get_i2c_obj(I2cHandle); struct i2c_s *obj_s = I2C_S(obj); @@ -957,23 +986,25 @@ HAL_I2C_EnableListen_IT(hi2c); } -int i2c_slave_receive(i2c_t *obj) { +int i2c_slave_receive(i2c_t *obj) +{ struct i2c_s *obj_s = I2C_S(obj); int retValue = NoData; - if(obj_s->pending_slave_rx_maxter_tx) { - retValue = WriteAddressed; - } + if (obj_s->pending_slave_rx_maxter_tx) { + retValue = WriteAddressed; + } - if(obj_s->pending_slave_tx_master_rx) { - retValue = ReadAddressed; - } + if (obj_s->pending_slave_tx_master_rx) { + retValue = ReadAddressed; + } return (retValue); } -int i2c_slave_read(i2c_t *obj, char *data, int length) { +int i2c_slave_read(i2c_t *obj, char *data, int length) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); int count = 0; @@ -983,22 +1014,23 @@ /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */ ret = HAL_I2C_Slave_Sequential_Receive_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME); - if(ret == HAL_OK) { + if (ret == HAL_OK) { timeout = BYTE_TIMEOUT_US * (length + 1); - while(obj_s->pending_slave_rx_maxter_tx && (--timeout != 0)) { + while (obj_s->pending_slave_rx_maxter_tx && (--timeout != 0)) { wait_us(1); } - if(timeout != 0) { - count = length; - } else { - DEBUG_PRINTF("TIMEOUT or error in i2c_slave_read\r\n"); - } + if (timeout != 0) { + count = length; + } else { + DEBUG_PRINTF("TIMEOUT or error in i2c_slave_read\r\n"); + } } return count; } -int i2c_slave_write(i2c_t *obj, const char *data, int length) { +int i2c_slave_write(i2c_t *obj, const char *data, int length) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); int count = 0; @@ -1008,17 +1040,17 @@ /* Always use I2C_NEXT_FRAME as slave will just adapt to master requests */ ret = HAL_I2C_Slave_Sequential_Transmit_IT(handle, (uint8_t *) data, length, I2C_NEXT_FRAME); - if(ret == HAL_OK) { + if (ret == HAL_OK) { timeout = BYTE_TIMEOUT_US * (length + 1); - while(obj_s->pending_slave_tx_master_rx && (--timeout != 0)) { + while (obj_s->pending_slave_tx_master_rx && (--timeout != 0)) { wait_us(1); } - if(timeout != 0) { - count = length; - } else { - DEBUG_PRINTF("TIMEOUT or error in i2c_slave_write\r\n"); - } + if (timeout != 0) { + count = length; + } else { + DEBUG_PRINTF("TIMEOUT or error in i2c_slave_write\r\n"); + } } return count; @@ -1027,7 +1059,8 @@ #if DEVICE_I2C_ASYNCH /* ASYNCH MASTER API FUNCTIONS */ -void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c){ +void HAL_I2C_AbortCpltCallback(I2C_HandleTypeDef *hi2c) +{ /* Get object ptr based on handler ptr */ i2c_t *obj = get_i2c_obj(hi2c); struct i2c_s *obj_s = I2C_S(obj); @@ -1041,7 +1074,8 @@ obj_s->event = I2C_EVENT_ERROR; } -void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint) { +void i2c_transfer_asynch(i2c_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint32_t address, uint32_t stop, uint32_t handler, uint32_t event, DMAUsage hint) +{ // TODO: DMA usage is currently ignored by this way (void) hint; @@ -1073,41 +1107,43 @@ uint32_t op1 = I2C_FIRST_AND_LAST_FRAME; uint32_t op2 = I2C_LAST_FRAME; if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) { - if (stop) + if (stop) { obj_s->XferOperation = I2C_FIRST_AND_LAST_FRAME; - else + } else { obj_s->XferOperation = I2C_FIRST_FRAME; + } } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || - (obj_s->XferOperation == I2C_NEXT_FRAME)) { - if (stop) + (obj_s->XferOperation == I2C_NEXT_FRAME)) { + if (stop) { obj_s->XferOperation = I2C_LAST_FRAME; - else + } else { obj_s->XferOperation = I2C_NEXT_FRAME; + } } if (tx_length > 0) { - HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, obj_s->XferOperation); + HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *)tx, tx_length, obj_s->XferOperation); } if (rx_length > 0) { - HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t*)rx, rx_length, obj_s->XferOperation); + HAL_I2C_Master_Sequential_Receive_IT(handle, address, (uint8_t *)rx, rx_length, obj_s->XferOperation); } - } - else if (tx_length && rx_length) { + } else if (tx_length && rx_length) { /* Two steps operation, don't modify XferOperation, keep it for next step */ // Trick to remove compiler warning "left and right operands are identical" in some cases uint32_t op1 = I2C_FIRST_AND_LAST_FRAME; uint32_t op2 = I2C_LAST_FRAME; if ((obj_s->XferOperation == op1) || (obj_s->XferOperation == op2)) { - HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_FIRST_FRAME); + HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *)tx, tx_length, I2C_FIRST_FRAME); } else if ((obj_s->XferOperation == I2C_FIRST_FRAME) || - (obj_s->XferOperation == I2C_NEXT_FRAME)) { - HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t*)tx, tx_length, I2C_NEXT_FRAME); + (obj_s->XferOperation == I2C_NEXT_FRAME)) { + HAL_I2C_Master_Sequential_Transmit_IT(handle, address, (uint8_t *)tx, tx_length, I2C_NEXT_FRAME); } } } -uint32_t i2c_irq_handler_asynch(i2c_t *obj) { +uint32_t i2c_irq_handler_asynch(i2c_t *obj) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); @@ -1115,24 +1151,25 @@ HAL_I2C_EV_IRQHandler(handle); HAL_I2C_ER_IRQHandler(handle); - /* Return I2C event status */ + /* Return I2C event status */ return (obj_s->event & obj_s->available_events); } -uint8_t i2c_active(i2c_t *obj) { +uint8_t i2c_active(i2c_t *obj) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); if (handle->State == HAL_I2C_STATE_READY) { return 0; - } - else { + } else { return 1; } } -void i2c_abort_asynch(i2c_t *obj) { +void i2c_abort_asynch(i2c_t *obj) +{ struct i2c_s *obj_s = I2C_S(obj); I2C_HandleTypeDef *handle = &(obj_s->handle); diff --git a/targets/TARGET_STM/lp_ticker.c b/targets/TARGET_STM/lp_ticker.c index e089cd0..b5601fd 100644 --- a/targets/TARGET_STM/lp_ticker.c +++ b/targets/TARGET_STM/lp_ticker.c @@ -40,7 +40,7 @@ LPTIM_HandleTypeDef LptimHandle; -const ticker_info_t* lp_ticker_get_info() +const ticker_info_t *lp_ticker_get_info() { static const ticker_info_t info = { #if MBED_CONF_TARGET_LSE_AVAILABLE @@ -241,10 +241,10 @@ #include "rtc_api_hal.h" -const ticker_info_t* lp_ticker_get_info() +const ticker_info_t *lp_ticker_get_info() { static const ticker_info_t info = { - RTC_CLOCK/4, // RTC_WAKEUPCLOCK_RTCCLK_DIV4 + RTC_CLOCK / 4, // RTC_WAKEUPCLOCK_RTCCLK_DIV4 32 }; return &info; diff --git a/targets/TARGET_STM/mbed_crc_api.c b/targets/TARGET_STM/mbed_crc_api.c index 8ffb0f1..fd113e3 100644 --- a/targets/TARGET_STM/mbed_crc_api.c +++ b/targets/TARGET_STM/mbed_crc_api.c @@ -8,63 +8,63 @@ static CRC_HandleTypeDef current_state; static uint32_t final_xor; -bool hal_crc_is_supported(const crc_mbed_config_t* config) +bool hal_crc_is_supported(const crc_mbed_config_t *config) { - if (config == NULL) { - return false; - } + if (config == NULL) { + return false; + } - if (config->polynomial != POLY_32BIT_ANSI) { - return false; - } + if (config->polynomial != POLY_32BIT_ANSI) { + return false; + } - if (config->width != 32) { - return false; - } + if (config->width != 32) { + return false; + } - if ((config->final_xor != 0xFFFFFFFFU) && (config->final_xor != 0)) { - return false; - } + if ((config->final_xor != 0xFFFFFFFFU) && (config->final_xor != 0)) { + return false; + } - return true; + return true; } -void hal_crc_compute_partial_start(const crc_mbed_config_t* config) +void hal_crc_compute_partial_start(const crc_mbed_config_t *config) { - MBED_ASSERT(hal_crc_is_supported(config)); + MBED_ASSERT(hal_crc_is_supported(config)); - __HAL_RCC_CRC_CLK_ENABLE(); + __HAL_RCC_CRC_CLK_ENABLE(); - final_xor = config->final_xor; + final_xor = config->final_xor; - current_state.Instance = CRC; - current_state.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; - current_state.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE; - current_state.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE; - current_state.Init.InitValue = config->initial_xor; - current_state.Init.CRCLength = CRC_POLYLENGTH_32B; - current_state.Init.InputDataInversionMode = - config->reflect_in ? CRC_INPUTDATA_INVERSION_BYTE - : CRC_INPUTDATA_INVERSION_NONE; - current_state.Init.OutputDataInversionMode = - config->reflect_out ? CRC_OUTPUTDATA_INVERSION_ENABLE - : CRC_OUTPUTDATA_INVERSION_DISABLE; + current_state.Instance = CRC; + current_state.InputDataFormat = CRC_INPUTDATA_FORMAT_BYTES; + current_state.Init.DefaultPolynomialUse = DEFAULT_POLYNOMIAL_ENABLE; + current_state.Init.DefaultInitValueUse = DEFAULT_INIT_VALUE_DISABLE; + current_state.Init.InitValue = config->initial_xor; + current_state.Init.CRCLength = CRC_POLYLENGTH_32B; + current_state.Init.InputDataInversionMode = + config->reflect_in ? CRC_INPUTDATA_INVERSION_BYTE + : CRC_INPUTDATA_INVERSION_NONE; + current_state.Init.OutputDataInversionMode = + config->reflect_out ? CRC_OUTPUTDATA_INVERSION_ENABLE + : CRC_OUTPUTDATA_INVERSION_DISABLE; - HAL_CRC_Init(¤t_state); + HAL_CRC_Init(¤t_state); } void hal_crc_compute_partial(const uint8_t *data, const size_t size) { - if (data && size) { - HAL_CRC_Accumulate(¤t_state, (uint32_t *)data, size); - } + if (data && size) { + HAL_CRC_Accumulate(¤t_state, (uint32_t *)data, size); + } } uint32_t hal_crc_get_result(void) { - const uint32_t result = current_state.Instance->DR; + const uint32_t result = current_state.Instance->DR; - return (final_xor == 0xFFFFFFFFU) ? ~result : result; + return (final_xor == 0xFFFFFFFFU) ? ~result : result; } #endif // DEVICE_CRC diff --git a/targets/TARGET_STM/mbed_rtx.h b/targets/TARGET_STM/mbed_rtx.h index 7692445..bd37f4a 100644 --- a/targets/TARGET_STM/mbed_rtx.h +++ b/targets/TARGET_STM/mbed_rtx.h @@ -126,14 +126,14 @@ #endif // INITIAL_SP #if (defined(__GNUC__) && !defined(__CC_ARM) && !defined(__ARMCC_VERSION) && defined(TWO_RAM_REGIONS)) - extern uint32_t __StackLimit[]; - extern uint32_t __StackTop[]; - extern uint32_t __end__[]; - extern uint32_t __HeapLimit[]; - #define HEAP_START ((unsigned char*)__end__) - #define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START)) - #define ISR_STACK_START ((unsigned char*)__StackLimit) - #define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit)) +extern uint32_t __StackLimit[]; +extern uint32_t __StackTop[]; +extern uint32_t __end__[]; +extern uint32_t __HeapLimit[]; +#define HEAP_START ((unsigned char*)__end__) +#define HEAP_SIZE ((uint32_t)((uint32_t)__HeapLimit - (uint32_t)HEAP_START)) +#define ISR_STACK_START ((unsigned char*)__StackLimit) +#define ISR_STACK_SIZE ((uint32_t)((uint32_t)__StackTop - (uint32_t)__StackLimit)) #endif #endif // MBED_MBED_RTX_H diff --git a/targets/TARGET_STM/nvic_addr.h b/targets/TARGET_STM/nvic_addr.h index 023b5fc..adb75f0 100644 --- a/targets/TARGET_STM/nvic_addr.h +++ b/targets/TARGET_STM/nvic_addr.h @@ -21,16 +21,16 @@ #endif #if defined(__ICCARM__) - #pragma section=".intvec" - #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec")) +#pragma section=".intvec" +#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)__section_begin(".intvec")) #elif defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) - extern uint32_t Load$$LR$$LR_IROM1$$Base[]; - #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base) +extern uint32_t Load$$LR$$LR_IROM1$$Base[]; +#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)Load$$LR$$LR_IROM1$$Base) #elif defined(__GNUC__) - extern uint32_t g_pfnVectors[]; - #define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)g_pfnVectors) +extern uint32_t g_pfnVectors[]; +#define NVIC_FLASH_VECTOR_ADDRESS ((uint32_t)g_pfnVectors) #else - #error "Flash vector address not set for this toolchain" +#error "Flash vector address not set for this toolchain" #endif #ifdef __cplusplus diff --git a/targets/TARGET_STM/pinmap.c b/targets/TARGET_STM/pinmap.c index 5b9a3fa..5c92ad1 100644 --- a/targets/TARGET_STM/pinmap.c +++ b/targets/TARGET_STM/pinmap.c @@ -77,11 +77,11 @@ * But for families like F1, speed only applies to output. */ #if defined (TARGET_STM32F1) -if (mode == STM_PIN_OUTPUT) { + if (mode == STM_PIN_OUTPUT) { #endif - LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_HIGH); + LL_GPIO_SetPinSpeed(gpio, ll_pin, LL_GPIO_SPEED_FREQ_HIGH); #if defined (TARGET_STM32F1) -} + } #endif switch (mode) { @@ -94,7 +94,7 @@ case STM_PIN_ALTERNATE: ll_mode = LL_GPIO_MODE_ALTERNATE; // In case of ALT function, also set he afnum - stm_pin_SetAFPin(gpio, pin, afnum); + stm_pin_SetAFPin(gpio, pin, afnum); break; case STM_PIN_ANALOG: ll_mode = LL_GPIO_MODE_ANALOG; @@ -115,12 +115,12 @@ #endif /* For now by default use Speed HIGH for output or alt modes */ - if ((mode == STM_PIN_OUTPUT) ||(mode == STM_PIN_ALTERNATE)) { - if (STM_PIN_OD(data)) { + if ((mode == STM_PIN_OUTPUT) || (mode == STM_PIN_ALTERNATE)) { + if (STM_PIN_OD(data)) { LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN); - } else { + } else { LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_PUSHPULL); - } + } } stm_pin_PullConfig(gpio, ll_pin, STM_PIN_PUPD(data)); @@ -141,8 +141,7 @@ GPIO_TypeDef *gpio = Set_GPIO_Clock(port_index); uint32_t function = LL_GPIO_GetPinMode(gpio, ll_pin); - if ((function == LL_GPIO_MODE_OUTPUT) || (function == LL_GPIO_MODE_ALTERNATE)) - { + if ((function == LL_GPIO_MODE_OUTPUT) || (function == LL_GPIO_MODE_ALTERNATE)) { if ((mode == OpenDrainNoPull) || (mode == OpenDrainPullUp) || (mode == OpenDrainPullDown)) { LL_GPIO_SetPinOutputType(gpio, ll_pin, LL_GPIO_OUTPUT_OPENDRAIN); } else { diff --git a/targets/TARGET_STM/pwmout_api.c b/targets/TARGET_STM/pwmout_api.c index 552fde0..e94b062 100644 --- a/targets/TARGET_STM/pwmout_api.c +++ b/targets/TARGET_STM/pwmout_api.c @@ -39,7 +39,7 @@ static TIM_HandleTypeDef TimHandle; -void pwmout_init(pwmout_t* obj, PinName pin) +void pwmout_init(pwmout_t *obj, PinName pin) { // Get the peripheral name from the pin and assign it to the object obj->pwm = (PWMName)pinmap_peripheral(pin, PinMap_PWM); @@ -53,7 +53,7 @@ // Enable TIM clock #if defined(TIM1_BASE) - if (obj->pwm == PWM_1){ + if (obj->pwm == PWM_1) { __HAL_RCC_TIM1_CLK_ENABLE(); } #endif @@ -163,13 +163,13 @@ pwmout_period_us(obj, 20000); // 20 ms per default } -void pwmout_free(pwmout_t* obj) +void pwmout_free(pwmout_t *obj) { // Configure GPIO pin_function(obj->pin, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0)); } -void pwmout_write(pwmout_t* obj, float value) +void pwmout_write(pwmout_t *obj, float value) { TIM_OC_InitTypeDef sConfig; int channel = 0; @@ -228,7 +228,7 @@ } } -float pwmout_read(pwmout_t* obj) +float pwmout_read(pwmout_t *obj) { float value = 0; if (obj->period > 0) { @@ -237,17 +237,17 @@ return ((value > (float)1.0) ? (float)(1.0) : (value)); } -void pwmout_period(pwmout_t* obj, float seconds) +void pwmout_period(pwmout_t *obj, float seconds) { pwmout_period_us(obj, seconds * 1000000.0f); } -void pwmout_period_ms(pwmout_t* obj, int ms) +void pwmout_period_ms(pwmout_t *obj, int ms) { pwmout_period_us(obj, ms * 1000); } -void pwmout_period_us(pwmout_t* obj, int us) +void pwmout_period_us(pwmout_t *obj, int us) { TimHandle.Instance = (TIM_TypeDef *)(obj->pwm); RCC_ClkInitTypeDef RCC_ClkInitStruct; @@ -263,14 +263,15 @@ HAL_RCC_GetClockConfig(&RCC_ClkInitStruct, &PclkFreq); /* Parse the pwm / apb mapping table to find the right entry */ - while(pwm_apb_map_table[i].pwm != obj->pwm) { + while (pwm_apb_map_table[i].pwm != obj->pwm) { i++; } - if(pwm_apb_map_table[i].pwm == 0) + if (pwm_apb_map_table[i].pwm == 0) { error("Unknown PWM instance"); + } - if(pwm_apb_map_table[i].pwmoutApb == PWMOUT_ON_APB1) { + if (pwm_apb_map_table[i].pwmoutApb == PWMOUT_ON_APB1) { PclkFreq = HAL_RCC_GetPCLK1Freq(); APBxCLKDivider = RCC_ClkInitStruct.APB1CLKDivider; } else { @@ -295,9 +296,9 @@ while ((TimHandle.Init.Period > 0xFFFF) || (TimHandle.Init.Prescaler > 0xFFFF)) { obj->prescaler = obj->prescaler * 2; if (APBxCLKDivider == RCC_HCLK_DIV1) { - TimHandle.Init.Prescaler = (((PclkFreq) / 1000000) * obj->prescaler) - 1; + TimHandle.Init.Prescaler = (((PclkFreq) / 1000000) * obj->prescaler) - 1; } else { - TimHandle.Init.Prescaler = (((PclkFreq * 2) / 1000000) * obj->prescaler) - 1; + TimHandle.Init.Prescaler = (((PclkFreq * 2) / 1000000) * obj->prescaler) - 1; } TimHandle.Init.Period = (us - 1) / obj->prescaler; /* Period decreases and prescaler increases over loops, so check for @@ -324,17 +325,17 @@ __HAL_TIM_ENABLE(&TimHandle); } -void pwmout_pulsewidth(pwmout_t* obj, float seconds) +void pwmout_pulsewidth(pwmout_t *obj, float seconds) { pwmout_pulsewidth_us(obj, seconds * 1000000.0f); } -void pwmout_pulsewidth_ms(pwmout_t* obj, int ms) +void pwmout_pulsewidth_ms(pwmout_t *obj, int ms) { pwmout_pulsewidth_us(obj, ms * 1000); } -void pwmout_pulsewidth_us(pwmout_t* obj, int us) +void pwmout_pulsewidth_us(pwmout_t *obj, int us) { float value = (float)us / (float)obj->period; pwmout_write(obj, value); diff --git a/targets/TARGET_STM/rtc_api.c b/targets/TARGET_STM/rtc_api.c index 0b4439f..d048add 100644 --- a/targets/TARGET_STM/rtc_api.c +++ b/targets/TARGET_STM/rtc_api.c @@ -46,7 +46,7 @@ HAL_PWR_EnableBkUpAccess(); #if DEVICE_LPTICKER - if ( (rtc_isenabled()) && ((RTC->PRER & RTC_PRER_PREDIV_S) == PREDIV_S_VALUE) ) { + if ((rtc_isenabled()) && ((RTC->PRER & RTC_PRER_PREDIV_S) == PREDIV_S_VALUE)) { #else /* DEVICE_LPTICKER */ if (rtc_isenabled()) { #endif /* DEVICE_LPTICKER */ @@ -259,7 +259,7 @@ int rtc_isenabled(void) { #if !(TARGET_STM32F1) - return ( ((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) && ((RTC->ISR & RTC_ISR_RSF) == RTC_ISR_RSF) ); + return (((RTC->ISR & RTC_ISR_INITS) == RTC_ISR_INITS) && ((RTC->ISR & RTC_ISR_RSF) == RTC_ISR_RSF)); #else /* TARGET_STM32F1 */ return ((RTC->CRL & RTC_CRL_RSF) == RTC_CRL_RSF); #endif /* TARGET_STM32F1 */ @@ -286,9 +286,9 @@ { /* Update HAL state */ RtcHandle.Instance = RTC; - if(__HAL_RTC_WAKEUPTIMER_GET_IT(&RtcHandle, RTC_IT_WUT)) { + if (__HAL_RTC_WAKEUPTIMER_GET_IT(&RtcHandle, RTC_IT_WUT)) { /* Get the status of the Interrupt */ - if((uint32_t)(RTC->CR & RTC_IT_WUT) != (uint32_t)RESET) { + if ((uint32_t)(RTC->CR & RTC_IT_WUT) != (uint32_t)RESET) { /* Clear the WAKEUPTIMER interrupt pending bit */ __HAL_RTC_WAKEUPTIMER_CLEAR_FLAG(&RtcHandle, RTC_FLAG_WUTF); diff --git a/targets/TARGET_STM/serial_api.c b/targets/TARGET_STM/serial_api.c index a3209f1..065418c 100644 --- a/targets/TARGET_STM/serial_api.c +++ b/targets/TARGET_STM/serial_api.c @@ -57,8 +57,7 @@ if ((tx == STDIO_UART_TX) || (rx == STDIO_UART_RX)) { stdio_config = 1; - } - else { + } else { if (uart_tx == pinmap_peripheral(STDIO_UART_TX, PinMap_UART_TX)) { error("Error: new serial object is using same UART as STDIO"); } @@ -206,8 +205,7 @@ #if MBED_CONF_PLATFORM_STDIO_BAUD_RATE obj_s->baudrate = MBED_CONF_PLATFORM_STDIO_BAUD_RATE; // baudrate takes value from platform/mbed_lib.json #endif /* MBED_CONF_PLATFORM_STDIO_BAUD_RATE */ - } - else { + } else { #if MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE obj_s->baudrate = MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE; // baudrate takes value from platform/mbed_lib.json #endif /* MBED_CONF_PLATFORM_DEFAULT_SERIAL_BAUD_RATE */ @@ -370,7 +368,7 @@ obj_s->baudrate = baudrate; #if defined(LPUART1_BASE) - /* Note that LPUART clock source must be in the range [3 x baud rate, 4096 x baud rate], check Ref Manual */ + /* Note that LPUART clock source must be in the range [3 x baud rate, 4096 x baud rate], check Ref Manual */ if (obj_s->uart == LPUART_1) { /* If baudrate is lower than 9600 try to change to LSE */ RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; @@ -384,7 +382,7 @@ HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct); } if (init_uart(obj) == HAL_OK) { - return; + return; } /* Change LPUART clock source and try again */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1; @@ -466,7 +464,7 @@ /* To avoid a target blocking case, let's check for * possible OVERRUN error and discard it */ - if(__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE)) { + if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE)) { __HAL_UART_CLEAR_OREFLAG(huart); } // Check if data is received diff --git a/targets/TARGET_STM/serial_api_hal.h b/targets/TARGET_STM/serial_api_hal.h index c5cea54..1849128 100644 --- a/targets/TARGET_STM/serial_api_hal.h +++ b/targets/TARGET_STM/serial_api_hal.h @@ -47,9 +47,9 @@ */ #if DEVICE_SERIAL_ASYNCH - #define SERIAL_S(obj) (&((obj)->serial)) +#define SERIAL_S(obj) (&((obj)->serial)) #else - #define SERIAL_S(obj) (obj) +#define SERIAL_S(obj) (obj) #endif diff --git a/targets/TARGET_STM/sleep.c b/targets/TARGET_STM/sleep.c index 3dd90a3..5769f3f 100644 --- a/targets/TARGET_STM/sleep.c +++ b/targets/TARGET_STM/sleep.c @@ -64,12 +64,12 @@ // Select HSI ss system clock source as a first step #ifdef RCC_CLOCKTYPE_PCLK2 - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK - | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; #else - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK - | RCC_CLOCKTYPE_PCLK1); + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK + | RCC_CLOCKTYPE_PCLK1); #endif RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_MSI; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; @@ -84,12 +84,12 @@ /**Initializes the CPU, AHB and APB busses clocks */ #ifdef RCC_CLOCKTYPE_PCLK2 - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; #else - RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK - |RCC_CLOCKTYPE_PCLK1); + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK + | RCC_CLOCKTYPE_PCLK1); #endif RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI; RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; @@ -213,7 +213,7 @@ } #endif // Enable IRQs - core_util_critical_section_exit(); + core_util_critical_section_exit(); } #endif diff --git a/targets/TARGET_STM/stm32_assert.h b/targets/TARGET_STM/stm32_assert.h index 45aa52f..ad44f9c 100644 --- a/targets/TARGET_STM/stm32_assert.h +++ b/targets/TARGET_STM/stm32_assert.h @@ -37,7 +37,7 @@ * If expr is true, it returns no value. * @retval None */ - #include "mbed_assert.h" - #define assert_param(expr) MBED_ASSERT(expr) +#include "mbed_assert.h" +#define assert_param(expr) MBED_ASSERT(expr) #endif diff --git a/targets/TARGET_STM/stm_spi_api.c b/targets/TARGET_STM/stm_spi_api.c index b4a71e7..64cd9bd 100644 --- a/targets/TARGET_STM/stm_spi_api.c +++ b/targets/TARGET_STM/stm_spi_api.c @@ -42,15 +42,15 @@ #include "spi_device.h" #if DEVICE_SPI_ASYNCH - #define SPI_INST(obj) ((SPI_TypeDef *)(obj->spi.spi)) +#define SPI_INST(obj) ((SPI_TypeDef *)(obj->spi.spi)) #else - #define SPI_INST(obj) ((SPI_TypeDef *)(obj->spi)) +#define SPI_INST(obj) ((SPI_TypeDef *)(obj->spi)) #endif #if DEVICE_SPI_ASYNCH - #define SPI_S(obj) (( struct spi_s *)(&(obj->spi))) +#define SPI_S(obj) (( struct spi_s *)(&(obj->spi))) #else - #define SPI_S(obj) (( struct spi_s *)(obj)) +#define SPI_S(obj) (( struct spi_s *)(obj)) #endif #ifndef DEBUG_STDIO @@ -176,7 +176,7 @@ if (miso != NC) { handle->Init.Direction = SPI_DIRECTION_2LINES; } else { - handle->Init.Direction = SPI_DIRECTION_1LINE; + handle->Init.Direction = SPI_DIRECTION_1LINE; } handle->Init.CLKPhase = SPI_PHASE_1EDGE; @@ -311,20 +311,22 @@ */ extern int spi_get_clock_freq(spi_t *obj); -static const uint16_t baudrate_prescaler_table[] = {SPI_BAUDRATEPRESCALER_2, - SPI_BAUDRATEPRESCALER_4, - SPI_BAUDRATEPRESCALER_8, - SPI_BAUDRATEPRESCALER_16, - SPI_BAUDRATEPRESCALER_32, - SPI_BAUDRATEPRESCALER_64, - SPI_BAUDRATEPRESCALER_128, - SPI_BAUDRATEPRESCALER_256}; +static const uint16_t baudrate_prescaler_table[] = {SPI_BAUDRATEPRESCALER_2, + SPI_BAUDRATEPRESCALER_4, + SPI_BAUDRATEPRESCALER_8, + SPI_BAUDRATEPRESCALER_16, + SPI_BAUDRATEPRESCALER_32, + SPI_BAUDRATEPRESCALER_64, + SPI_BAUDRATEPRESCALER_128, + SPI_BAUDRATEPRESCALER_256 + }; -void spi_frequency(spi_t *obj, int hz) { +void spi_frequency(spi_t *obj, int hz) +{ struct spi_s *spiobj = SPI_S(obj); int spi_hz = 0; uint8_t prescaler_rank = 0; - uint8_t last_index = (sizeof(baudrate_prescaler_table)/sizeof(baudrate_prescaler_table[0])) - 1; + uint8_t last_index = (sizeof(baudrate_prescaler_table) / sizeof(baudrate_prescaler_table[0])) - 1; SPI_HandleTypeDef *handle = &(spiobj->handle); /* Calculate the spi clock for prescaler_rank 0: SPI_BAUDRATEPRESCALER_2 */ @@ -386,7 +388,7 @@ SPI_HandleTypeDef *handle = &(spiobj->handle); if (handle->Init.Direction == SPI_DIRECTION_1LINE) { - return HAL_SPI_Transmit(handle, (uint8_t*)&value, 1, TIMEOUT_1_BYTE); + return HAL_SPI_Transmit(handle, (uint8_t *)&value, 1, TIMEOUT_1_BYTE); } #if defined(LL_SPI_RX_FIFO_TH_HALF) @@ -441,13 +443,13 @@ } else { /* In case of 1 WIRE only, first handle TX, then Rx */ if (tx_length != 0) { - if (HAL_OK != HAL_SPI_Transmit(handle, (uint8_t*)tx_buffer, tx_length, tx_length*TIMEOUT_1_BYTE)) { + if (HAL_OK != HAL_SPI_Transmit(handle, (uint8_t *)tx_buffer, tx_length, tx_length * TIMEOUT_1_BYTE)) { /* report an error */ total = 0; } } if (rx_length != 0) { - if (HAL_OK != HAL_SPI_Receive(handle, (uint8_t*)rx_buffer, rx_length, rx_length*TIMEOUT_1_BYTE)) { + if (HAL_OK != HAL_SPI_Receive(handle, (uint8_t *)rx_buffer, rx_length, rx_length * TIMEOUT_1_BYTE)) { /* report an error */ total = 0; } @@ -538,18 +540,18 @@ // enable the right hal transfer int rc = 0; - switch(transfer_type) { + switch (transfer_type) { case SPI_TRANSFER_TYPE_TXRX: - rc = HAL_SPI_TransmitReceive_IT(handle, (uint8_t*)tx, (uint8_t*)rx, words); + rc = HAL_SPI_TransmitReceive_IT(handle, (uint8_t *)tx, (uint8_t *)rx, words); break; case SPI_TRANSFER_TYPE_TX: - rc = HAL_SPI_Transmit_IT(handle, (uint8_t*)tx, words); + rc = HAL_SPI_Transmit_IT(handle, (uint8_t *)tx, words); break; case SPI_TRANSFER_TYPE_RX: // the receive function also "transmits" the receive buffer so in order // to guarantee that 0xff is on the line, we explicitly memset it here memset(rx, SPI_FILL_WORD, length); - rc = HAL_SPI_Receive_IT(handle, (uint8_t*)rx, words); + rc = HAL_SPI_Receive_IT(handle, (uint8_t *)rx, words); break; default: length = 0; @@ -578,8 +580,9 @@ bool is16bit = (handle->Init.DataSize == SPI_DATASIZE_16BIT); // don't do anything, if the buffers aren't valid - if (!use_tx && !use_rx) + if (!use_tx && !use_rx) { return; + } // copy the buffers to the SPI object obj->tx_buff.buffer = (void *) tx; @@ -603,8 +606,8 @@ // enable the right hal transfer if (use_tx && use_rx) { // we cannot manage different rx / tx sizes, let's use smaller one - size_t size = (tx_length < rx_length)? tx_length : rx_length; - if(tx_length != rx_length) { + size_t size = (tx_length < rx_length) ? tx_length : rx_length; + if (tx_length != rx_length) { DEBUG_PRINTF("SPI: Full duplex transfer only 1 size: %d\n", size); obj->tx_buff.length = size; obj->rx_buff.length = size; @@ -627,7 +630,7 @@ if (obj->spi.handle.State == HAL_SPI_STATE_READY) { // When HAL SPI is back to READY state, check if there was an error int error = obj->spi.handle.ErrorCode; - if(error != HAL_SPI_ERROR_NONE) { + if (error != HAL_SPI_ERROR_NONE) { // something went wrong and the transfer has definitely completed event = SPI_EVENT_ERROR | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE; @@ -638,10 +641,10 @@ } else { // else we're done event = SPI_EVENT_COMPLETE | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE; - } - // enable the interrupt - NVIC_DisableIRQ(obj->spi.spiIRQ); - NVIC_ClearPendingIRQ(obj->spi.spiIRQ); + } + // enable the interrupt + NVIC_DisableIRQ(obj->spi.spiIRQ); + NVIC_ClearPendingIRQ(obj->spi.spiIRQ); } @@ -654,7 +657,7 @@ SPI_HandleTypeDef *handle = &(spiobj->handle); HAL_SPI_StateTypeDef state = HAL_SPI_GetState(handle); - switch(state) { + switch (state) { case HAL_SPI_STATE_RESET: case HAL_SPI_STATE_READY: case HAL_SPI_STATE_ERROR: diff --git a/targets/TARGET_STM/trng_api.c b/targets/TARGET_STM/trng_api.c index f77f2b3..f85dae2 100644 --- a/targets/TARGET_STM/trng_api.c +++ b/targets/TARGET_STM/trng_api.c @@ -33,7 +33,7 @@ uint32_t dummy; /* We're only supporting a single user of RNG */ - if (core_util_atomic_incr_u8(&users, 1) > 1 ) { + if (core_util_atomic_incr_u8(&users, 1) > 1) { error("Only 1 RNG instance supported\r\n"); } @@ -77,11 +77,11 @@ *output_length = 0; /* Get Random byte */ - while ((*output_length < length) && (ret ==0)) { - if ( HAL_RNG_GenerateRandomNumber(&obj->handle, (uint32_t *)random ) != HAL_OK) { - ret = -1; + while ((*output_length < length) && (ret == 0)) { + if (HAL_RNG_GenerateRandomNumber(&obj->handle, (uint32_t *)random) != HAL_OK) { + ret = -1; } else { - for (uint8_t i =0; (i < 4) && (*output_length < length) ; i++) { + for (uint8_t i = 0; (i < 4) && (*output_length < length) ; i++) { *output++ = random[i]; *output_length += 1; random[i] = 0; @@ -90,11 +90,11 @@ } /* Just be extra sure that we didn't do it wrong */ - if( ( __HAL_RNG_GET_FLAG(&obj->handle, (RNG_FLAG_CECS | RNG_FLAG_SECS)) ) != 0 ) { + if ((__HAL_RNG_GET_FLAG(&obj->handle, (RNG_FLAG_CECS | RNG_FLAG_SECS))) != 0) { ret = -1; } - return( ret ); + return (ret); } #endif diff --git a/targets/TARGET_STM/us_ticker.c b/targets/TARGET_STM/us_ticker.c index b6bb210..db4a9e9 100644 --- a/targets/TARGET_STM/us_ticker.c +++ b/targets/TARGET_STM/us_ticker.c @@ -26,7 +26,7 @@ TIM_HandleTypeDef TimMasterHandle; -const ticker_info_t* us_ticker_get_info() +const ticker_info_t *us_ticker_get_info() { static const ticker_info_t info = { 1000000,