diff --git a/targets/CMakeLists.txt b/targets/CMakeLists.txt
index 9a95cc4..f6442d7 100644
--- a/targets/CMakeLists.txt
+++ b/targets/CMakeLists.txt
@@ -19,6 +19,8 @@
     add_subdirectory(TARGET_NUVOTON)
 elseif("NXP" IN_LIST MBED_TARGET_LABELS)
     add_subdirectory(TARGET_NXP)
+elseif("RENESAS" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_RENESAS)
 elseif("Samsung" IN_LIST MBED_TARGET_LABELS)
     add_subdirectory(TARGET_Samsung)
 elseif("Silicon_Labs" IN_LIST MBED_TARGET_LABELS)
diff --git a/targets/TARGET_RENESAS/CMakeLists.txt b/targets/TARGET_RENESAS/CMakeLists.txt
new file mode 100644
index 0000000..6a1854a
--- /dev/null
+++ b/targets/TARGET_RENESAS/CMakeLists.txt
@@ -0,0 +1,13 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+if ("RZ_A1XX" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_RZ_A1XX)
+elseif("RZ_A2XX" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_RZ_A2XX)
+endif()
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+)
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/CMakeLists.txt b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/CMakeLists.txt
new file mode 100644
index 0000000..1e48384
--- /dev/null
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/CMakeLists.txt
@@ -0,0 +1,37 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+if ("GR_LYCHEE" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_GR_LYCHEE)
+elseif("RZ_A1H" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_RZ_A1H)
+endif()
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+        common
+)
+
+target_sources(mbed-core
+    INTERFACE
+        analogin_api.c
+        can_api.c
+        flash_api.c
+        gpio_api.c
+        gpio_irq_api.c
+        i2c_api.c
+        lp_ticker.c
+        mtu2.c
+        pinmap.c
+        port_api.c
+        pwmout_api.c
+        rtc_api.c
+        serial_api.c
+        sleep.c
+        spi_api.c
+        trng_api.c
+        us_ticker.c
+
+        common/rza_io_regrw.c
+)
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/CMakeLists.txt b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/CMakeLists.txt
new file mode 100644
index 0000000..76d8377
--- /dev/null
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/CMakeLists.txt
@@ -0,0 +1,42 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+if(${MBED_TOOLCHAIN} STREQUAL "ARM")
+    set(LINKER_FILE device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct)
+    set(STARTUP_FILE device/TOOLCHAIN_ARM_STD/startup_RZ_A1LU.S)
+    set(WEAK_HANDLER_FILE device/TOOLCHAIN_ARM_STD/weak_handler.S)
+elseif(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
+    set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/RZA1LU.ld)
+    set(STARTUP_FILE device/TOOLCHAIN_GCC_ARM/startup_RZ1ALU.S)
+    set(WEAK_HANDLER_FILE device/TOOLCHAIN_GCC_ARM/weak_handler.S)
+endif()
+
+set_property(GLOBAL PROPERTY MBED_TARGET_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
+
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+        device
+        device/inc
+        device/inc/iobitmasks
+        device/inc/iodefines
+)
+
+target_sources(mbed-core
+    INTERFACE
+    trng_api_esp32.cpp
+    PeripheralPins.c
+
+    device/RZ_A1_Init.c
+    device/cmsis_nvic.c
+    device/mbed_sf_boot.c
+    device/mmu_RZ_A1LU.c
+    device/nvic_wrapper.c
+    device/os_tick_ostm.c
+    device/system_RZ_A1LU.c
+
+    ${STARTUP_FILE}
+    ${WEAK_HANDLER_FILE}
+)
+
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct
index e4338b0..32bf076 100644
--- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/device/TOOLCHAIN_ARM_STD/MBRZA1LU.sct
@@ -1,4 +1,4 @@
-#! armcc -E
+#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-a9
 ;**************************************************
 ; Copyright (c) 2017 ARM Ltd.  All rights reserved.
 ;**************************************************
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/CMakeLists.txt b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/CMakeLists.txt
new file mode 100644
index 0000000..e05e6ba
--- /dev/null
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/CMakeLists.txt
@@ -0,0 +1,40 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+if(${MBED_TOOLCHAIN} STREQUAL "ARM")
+    set(LINKER_FILE device/TOOLCHAIN_ARM_STD/MBRZA1H.sct)
+    set(STARTUP_FILE device/TOOLCHAIN_ARM_STD/startup_RZ_A1H.S)
+    set(WEAK_HANDLER_FILE device/TOOLCHAIN_ARM_STD/weak_handler.S)
+elseif(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
+    set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/RZA1H.ld)
+    set(STARTUP_FILE device/TOOLCHAIN_GCC_ARM/startup_RZ1AH.S)
+    set(WEAK_HANDLER_FILE device/TOOLCHAIN_GCC_ARM/weak_handler.S)
+endif()
+
+set_property(GLOBAL PROPERTY MBED_TARGET_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
+
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+        device
+        device/inc
+        device/inc/iobitmasks
+        device/inc/iodefines
+)
+
+target_sources(mbed-core
+    INTERFACE
+        PeripheralPins.c
+
+        device/RZ_A1_Init.c
+        device/cmsis_nvic.c
+        device/mbed_sf_boot.c
+        device/mmu_RZ_A1H.c
+        device/nvic_wrapper.c
+        device/os_tick_ostm.c
+        device/system_RZ_A1H.c
+
+        ${STARTUP_FILE}
+        ${WEAK_HANDLER_FILE}
+)
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct
index 5cff188..6b22752 100644
--- a/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct
@@ -1,4 +1,4 @@
-#! armcc -E
+#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-a9
 ;**************************************************
 ; Copyright (c) 2017 ARM Ltd.  All rights reserved.
 ;**************************************************
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A2XX/CMakeLists.txt b/targets/TARGET_RENESAS/TARGET_RZ_A2XX/CMakeLists.txt
new file mode 100644
index 0000000..3793a26
--- /dev/null
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A2XX/CMakeLists.txt
@@ -0,0 +1,40 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+if ("GR_MANGO" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_GR_MANGO)
+endif()
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+        common
+        common/r_cache/inc
+        common/r_octabus/inc
+        r_can/inc
+)
+
+target_sources(mbed-core
+    INTERFACE
+        analogin_api.c
+        can_api.c
+        flash_api.c
+        gpio_api.c
+        gpio_irq_api.c
+        i2c_api.c
+        pinmap.c
+        port_api.c
+        pwmout_api.c
+        rtc_api.c
+        serial_api.c
+        sleep.c
+        spi_api.c
+        us_ticker.c
+
+        common/r_cache/src/lld/r_cache_lld_rza2m.c
+        common/r_octabus/src/lld/r_octabus_lld_rza2m_api.c
+        common/r_octabus/src/lld/r_octabus_memclk_setup.c
+        common/rza_io_regrw.c
+
+        r_can/src/r_can_rz.c
+)
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A2XX/TARGET_GR_MANGO/CMakeLists.txt b/targets/TARGET_RENESAS/TARGET_RZ_A2XX/TARGET_GR_MANGO/CMakeLists.txt
new file mode 100644
index 0000000..8b040ad
--- /dev/null
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A2XX/TARGET_GR_MANGO/CMakeLists.txt
@@ -0,0 +1,42 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+if(${MBED_TOOLCHAIN} STREQUAL "ARM")
+    set(LINKER_FILE device/TOOLCHAIN_ARM_STD/MBRZA1H.sct)
+    set(STARTUP_FILE device/TOOLCHAIN_ARM_STD/startup_RZ_A2M.S)
+    set(WEAK_HANDLER_FILE device/TOOLCHAIN_ARM_STD/weak_handler.S)
+elseif(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
+    set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/RZA2M.ld)
+    set(STARTUP_FILE device/TOOLCHAIN_GCC_ARM/startup_RZA2M.S)
+    set(WEAK_HANDLER_FILE device/TOOLCHAIN_GCC_ARM/weak_handler.S)
+endif()
+
+set_property(GLOBAL PROPERTY MBED_TARGET_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
+
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+        device
+        device/inc
+        device/inc/iodefine
+        device/inc/iodefine/iobitmasks
+        device/inc/iodefine/iodefines
+)
+
+target_sources(mbed-core
+    INTERFACE
+        PeripheralPins.c
+
+        device/RZ_A2_Init.c
+        device/cmsis_nvic.c
+        device/mbed_sf_boot.c
+        device/mmu_RZ_A2M.c
+        device/nvic_wrapper.c
+        device/octaram_init.c
+        device/os_tick_ostm.c
+        device/system_RZ_A2M.c
+
+        ${STARTUP_FILE}
+        ${WEAK_HANDLER_FILE}
+)
diff --git a/targets/TARGET_RENESAS/TARGET_RZ_A2XX/TARGET_GR_MANGO/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct b/targets/TARGET_RENESAS/TARGET_RZ_A2XX/TARGET_GR_MANGO/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct
index 928bf8f..272acea 100644
--- a/targets/TARGET_RENESAS/TARGET_RZ_A2XX/TARGET_GR_MANGO/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct
+++ b/targets/TARGET_RENESAS/TARGET_RZ_A2XX/TARGET_GR_MANGO/device/TOOLCHAIN_ARM_STD/MBRZA1H.sct
@@ -1,4 +1,4 @@
-#! armcc -E
+#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-a9
 ;**************************************************
 ; Copyright (c) 2017-2020 ARM Ltd.  All rights reserved.
 ;**************************************************