diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/CMakeLists.txt index 4066771..983f30b 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/CMakeLists.txt +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/CMakeLists.txt @@ -4,6 +4,7 @@ add_subdirectory(TARGET_MTS_DRAGONFLY_F411RE EXCLUDE_FROM_ALL) add_subdirectory(TARGET_MTS_MDOT_F411RE EXCLUDE_FROM_ALL) add_subdirectory(TARGET_NUCLEO_F411RE EXCLUDE_FROM_ALL) +add_subdirectory(TARGET_BLACKPILL_F411CE EXCLUDE_FROM_ALL) if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM") set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32f411xe.S) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/CMakeLists.txt new file mode 100644 index 0000000..91706d9 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/CMakeLists.txt @@ -0,0 +1,17 @@ +# Copyright (c) 2020 ARM Limited. All rights reserved. +# SPDX-License-Identifier: Apache-2.0 + +add_library(mbed-blackpill-f411ce INTERFACE) + +target_sources(mbed-blackpill-f411ce + INTERFACE + system_clock_override.c + PeripheralPins.c +) + +target_include_directories(mbed-blackpill-f411ce + INTERFACE + . +) + +target_link_libraries(mbed-blackpill-f411ce INTERFACE mbed-stm32f411xe) diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/PeripheralPinMaps.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/PeripheralPinMaps.h new file mode 100644 index 0000000..31c9742 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/PeripheralPinMaps.h @@ -0,0 +1,263 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ + +//============================================================================== +// Notes +// +// - The pins mentioned Px_y_ALTz are alternative possibilities which use other +// HW peripheral instances. You can use them the same way as any other "normal" +// pin (i.e. PwmOut pwm(PA_7_ALT0);). These pins are not displayed on the board +// pinout image on mbed.org. +// +// - The pins which are connected to other components present on the board have +// the comment "Connected to xxx". The pin function may not work properly in this +// case. These pins may not be displayed on the board pinout image on mbed.org. +// Please read the board reference manual and schematic for more information. +// +// - Warning: pins connected to the default STDIO_UART_TX and STDIO_UART_RX pins are commented +// See https://os.mbed.com/teams/ST/wiki/STDIO for more information. +// +//============================================================================== + +#ifndef MBED_PERIPHERALPINMAPS_H +#define MBED_PERIPHERALPINMAPS_H + +#include + +//*** ADC *** + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_ADC[] = { + {PA_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 0, 0)}, // ADC1_IN0 + {PA_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 1, 0)}, // ADC1_IN1 +// {PA_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 2, 0)}, // ADC1_IN2 // Connected to STDIO_UART_TX +// {PA_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC1_IN3 // Connected to STDIO_UART_RX + {PA_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 4, 0)}, // ADC1_IN4 +// {PA_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_IN5 // Connected to LD2 [Green Led] + {PA_6, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 6, 0)}, // ADC1_IN6 + {PA_7, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_IN7 + {PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 8, 0)}, // ADC1_IN8 + {PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_IN9 + {PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_IN10 + {PC_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 11, 0)}, // ADC1_IN11 + {PC_2, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 12, 0)}, // ADC1_IN12 + {PC_3, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 13, 0)}, // ADC1_IN13 + {PC_4, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 14, 0)}, // ADC1_IN14 + {PC_5, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 15, 0)}, // ADC1_IN15 + {NC, NC, 0} +}; + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_ADC_Internal[] = { + {ADC_TEMP, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 16, 0)}, + {ADC_VREF, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 17, 0)}, + {ADC_VBAT, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 18, 0)}, + {NC, NC, 0} +}; + +//*** I2C *** + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_I2C_SDA[] = { + {PB_3, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)}, // Connected to SWO + {PB_4, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)}, + {PB_7, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C3)}, + {PB_9, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_9_ALT0, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF9_I2C2)}, + {PC_9, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, + {NC, NC, 0} +}; + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_I2C_SCL[] = { + //{PA_8, I2C_3, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C3)}, // Connected to MCO + {PB_6, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_8, I2C_1, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C1)}, + {PB_10, I2C_2, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_NOPULL, GPIO_AF4_I2C2)}, + {NC, NC, 0} +}; + +//*** PWM *** + +// TIM5 cannot be used because already used by the us_ticker +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_PWM[] = { + {PA_0, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 +// {PA_0, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 1, 0)}, // TIM5_CH1 + {PA_1, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 +// {PA_1, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 2, 0)}, // TIM5_CH2 +// {PA_2, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 // Connected to STDIO_UART_TX +// {PA_2, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 3, 0)}, // TIM5_CH3 // Connected to STDIO_UART_TX +// {PA_2, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 1, 0)}, // TIM9_CH1 // Connected to STDIO_UART_TX +// {PA_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 4, 0)}, // TIM2_CH4 // Connected to STDIO_UART_RX +// {PA_3, PWM_5, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM5, 4, 0)}, // TIM5_CH4 // Connected to STDIO_UART_RX +// {PA_3, PWM_9, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM9, 2, 0)}, // TIM9_CH2 // Connected to STDIO_UART_RX + {PA_5, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 // Connected to LD2 [Green Led] + {PA_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PA_7, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PA_7_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PA_8, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 0)}, // TIM1_CH1 + {PA_9, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 0)}, // TIM1_CH2 + {PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 + {PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 + {PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1 + {PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {PB_3, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 2, 0)}, // TIM2_CH2 // Connected to SWO + {PB_4, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PB_5, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PB_6, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 1, 0)}, // TIM4_CH1 + {PB_7, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 2, 0)}, // TIM4_CH2 + {PB_8, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 3, 0)}, // TIM4_CH3 + {PB_8_ALT0, PWM_10, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM10, 1, 0)}, // TIM10_CH1 + {PB_9, PWM_4, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM4, 4, 0)}, // TIM4_CH4 + {PB_9_ALT0, PWM_11, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM11, 1, 0)}, // TIM11_CH1 + {PB_10, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 3, 0)}, // TIM2_CH3 + {PB_13, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 1, 1)}, // TIM1_CH1N + {PB_14, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N + {PB_15, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N + {PC_6, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 1, 0)}, // TIM3_CH1 + {PC_7, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 2, 0)}, // TIM3_CH2 + {PC_8, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 + {PC_9, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4 + {NC, NC, 0} +}; + +//*** SERIAL *** + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_UART_TX[] = { + {PA_2, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_TX + {PA_9, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_11, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PA_15, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PB_6, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PC_6, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NC, 0} +}; + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_UART_RX[] = { + {PA_3, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, // Connected to STDIO_UART_RX + {PA_10, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PA_12, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {PB_3, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, // Connected to SWO + {PB_7, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {PC_7, UART_6, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF8_USART6)}, + {NC, NC, 0} +}; + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_UART_RTS[] = { + {PA_1, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_12, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_UART_CTS[] = { + {PA_0, UART_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART2)}, + {PA_11, UART_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF7_USART1)}, + {NC, NC, 0} +}; + +//*** SPI *** + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_SPI_MOSI[] = { + {PA_1, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI4)}, + {PA_7, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_10, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI5)}, + {PB_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_5_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, + {PB_8, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI5)}, + {PB_15, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PC_3, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PC_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, + {NC, NC, 0} +}; + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_SPI_MISO[] = { + {PA_6, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI4)}, + {PA_12, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI5)}, + {PB_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PB_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, + {PB_14, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PC_2, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PC_11, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, + {NC, NC, 0} +}; + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_SPI_SCLK[] = { + {PA_5, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to LD2 [Green Led] + {PB_0, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI5)}, + {PB_3, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, // Connected to SWO + {PB_3_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, // Connected to SWO + {PB_10, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PB_12, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF7_SPI3)}, + {PB_13, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PB_13_ALT0, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI4)}, + {PC_7, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PC_10, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, + {NC, NC, 0} +}; + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_SPI_SSEL[] = { + {PA_4, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_4_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, + {PA_15, SPI_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI1)}, + {PA_15_ALT0, SPI_3, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI3)}, + {PB_1, SPI_5, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI5)}, + {PB_9, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PB_12, SPI_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF5_SPI2)}, + {PB_12_ALT0, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF6_SPI4)}, + {NC, NC, 0} +}; + +//*** USBDEVICE *** + +MSTD_CONSTEXPR_OBJ_11 PinMap PinMap_USB_FS[] = { +// {PA_8, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_SOF + {PA_9, USB_FS, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_VBUS + {PA_10, USB_FS, STM_PIN_DATA(STM_MODE_AF_OD, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_ID + {PA_11, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DM + {PA_12, USB_FS, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF10_OTG_FS)}, // USB_OTG_FS_DP + {NC, NC, 0} +}; + +#define PINMAP_ANALOGIN PinMap_ADC +#define PINMAP_ANALOGIN_INTERNAL PinMap_ADC_Internal +#define PINMAP_I2C_SDA PinMap_I2C_SDA +#define PINMAP_I2C_SCL PinMap_I2C_SCL +#define PINMAP_UART_TX PinMap_UART_TX +#define PINMAP_UART_RX PinMap_UART_RX +#define PINMAP_UART_CTS PinMap_UART_CTS +#define PINMAP_UART_RTS PinMap_UART_RTS +#define PINMAP_SPI_SCLK PinMap_SPI_SCLK +#define PINMAP_SPI_MOSI PinMap_SPI_MOSI +#define PINMAP_SPI_MISO PinMap_SPI_MISO +#define PINMAP_SPI_SSEL PinMap_SPI_SSEL +#define PINMAP_PWM PinMap_PWM + +#endif \ No newline at end of file diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/PeripheralPins.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/PeripheralPins.c new file mode 100644 index 0000000..67ab048 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/PeripheralPins.c @@ -0,0 +1,33 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ + +#include "PeripheralPins.h" +#include "mbed_toolchain.h" +#include "PeripheralPinMaps.h" diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/PinNames.h b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/PinNames.h new file mode 100644 index 0000000..d7243d2 --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/PinNames.h @@ -0,0 +1,204 @@ +/* mbed Microcontroller Library + ******************************************************************************* + * Copyright (c) 2018, STMicroelectronics + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * + * 1. Redistributions of source code must retain the above copyright notice, + * this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright notice, + * this list of conditions and the following disclaimer in the documentation + * and/or other materials provided with the distribution. + * 3. Neither the name of STMicroelectronics nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR + * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER + * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + ******************************************************************************* + */ + +#ifndef MBED_PINNAMES_H +#define MBED_PINNAMES_H + +#include "cmsis.h" +#include "PinNamesTypes.h" + +#ifdef __cplusplus +extern "C" { +#endif + +/* If this macro is defined, then constexpr utility functions for pin-map seach can be used. */ +#define STATIC_PINMAP_READY 1 + +typedef enum { + ALT0 = 0x100, + ALT1 = 0x200, + ALT2 = 0x300, + ALT3 = 0x400 +} ALTx; + +typedef enum { + // Not connected + NC = (int)0xFFFFFFFF, + + PA_0 = 0x00, + PA_1 = 0x01, + PA_1_ALT0 = PA_1 | ALT0, + PA_2 = 0x02, + PA_3 = 0x03, + PA_4 = 0x04, + PA_4_ALT0 = PA_4 | ALT0, + PA_5 = 0x05, + PA_6 = 0x06, + PA_7 = 0x07, + PA_7_ALT0 = PA_7 | ALT0, + PA_7_ALT1 = PA_7 | ALT1, + PA_7_ALT2 = PA_7 | ALT2, + PA_8 = 0x08, + PA_9 = 0x09, + PA_10 = 0x0A, + PA_11 = 0x0B, + PA_12 = 0x0C, + PA_13 = 0x0D, + PA_14 = 0x0E, + PA_15 = 0x0F, + PA_15_ALT0 = PA_15 | ALT0, + + PB_0 = 0x10, + PB_0_ALT0 = PB_0 | ALT0, + PB_0_ALT1 = PB_0 | ALT1, + PB_1 = 0x11, + PB_1_ALT0 = PB_1 | ALT0, + PB_1_ALT1 = PB_1 | ALT1, + PB_2 = 0x12, + PB_3 = 0x13, + PB_3_ALT0 = PB_3 | ALT0, + PB_4 = 0x14, + PB_4_ALT0 = PB_4 | ALT0, + PB_4_ALT1 = PB_4 | ALT1, + PB_5 = 0x15, + PB_5_ALT0 = PB_5 | ALT0, + PB_5_ALT1 = PB_5 | ALT1, + PB_6 = 0x16, + PB_7 = 0x17, + PB_8 = 0x18, + PB_8_ALT0 = PB_8 | ALT0, + PB_8_ALT1 = PB_8 | ALT1, + PB_9 = 0x19, + PB_9_ALT0 = PB_9 | ALT0, + PB_9_ALT1 = PB_9 | ALT1, + PB_10 = 0x1A, + PB_12 = 0x1C, + PB_12_ALT0 = PB_12 | ALT0, + PB_13 = 0x1D, + PB_13_ALT0 = PB_13 | ALT0, + PB_14 = 0x1E, + PB_15 = 0x1F, + + PC_0 = 0x20, + PC_1 = 0x21, + PC_2 = 0x22, + PC_3 = 0x23, + PC_4 = 0x24, + PC_5 = 0x25, + PC_6 = 0x26, + PC_7 = 0x27, + PC_8 = 0x28, + PC_9 = 0x29, + PC_10 = 0x2A, + PC_11 = 0x2B, + PC_12 = 0x2C, + PC_13 = 0x2D, + PC_14 = 0x2E, + PC_15 = 0x2F, + + PD_2 = 0x32, + + PH_0 = 0x70, + PH_1 = 0x71, + + // ADC internal channels + ADC_TEMP = 0xF0, + ADC_VREF = 0xF1, + ADC_VBAT = 0xF2, + + // Arduino connector namings + A0 = PA_0, + A1 = PA_1, + A2 = PA_4, + A3 = PB_0, + A4 = NC, + A5 = NC, + D0 = PA_3, + D1 = PA_2, + D2 = PA_10, + D3 = PB_3, + D4 = PB_5, + D5 = PB_4, + D6 = PB_10, + D7 = PA_8, + D8 = PA_9, + D9 = NC, + D10 = PB_6, + D11 = PA_7, + D12 = PA_6, + D13 = PA_5, + D14 = PB_9, + D15 = PB_8, + + // STDIO for console print +#ifdef MBED_CONF_TARGET_STDIO_UART_TX + CONSOLE_TX = MBED_CONF_TARGET_STDIO_UART_TX, +#else + CONSOLE_TX = PA_2, +#endif +#ifdef MBED_CONF_TARGET_STDIO_UART_RX + CONSOLE_RX = MBED_CONF_TARGET_STDIO_UART_RX, +#else + CONSOLE_RX = PA_3, +#endif + + // Generic signals namings +#define LED1 = PC_13, + // Standardized button names +#define BUTTON1 = USER_BUTTON, + + /**** USB FS pins ****/ + USB_OTG_FS_DM = PA_11, + USB_OTG_FS_DP = PA_12, + USB_OTG_FS_ID = PA_10, + USB_OTG_FS_SOF = PA_8, + USB_OTG_FS_VBUS = PA_9, + + /**** OSCILLATOR pins ****/ + RCC_OSC32_IN = PC_14, + RCC_OSC32_OUT = PC_15, + RCC_OSC_IN = PH_0, + RCC_OSC_OUT = PH_1, + + /**** DEBUG pins ****/ + DEBUG_JTCK_SWCLK = PA_14, + DEBUG_JTDI = PA_15, + DEBUG_JTDO_SWO = PB_3, + DEBUG_JTMS_SWDIO = PA_13, + DEBUG_JTRST = PB_4, + SYS_WKUP = PA_0, + +} PinName; + +#ifdef __cplusplus +} +#endif + +#endif diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/system_clock_override.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/system_clock_override.c new file mode 100644 index 0000000..6fc2b7d --- /dev/null +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/TARGET_BLACKPILL_F411CE/system_clock_override.c @@ -0,0 +1,199 @@ +/* mbed Microcontroller Library + * SPDX-License-Identifier: BSD-3-Clause + ****************************************************************************** + * + * Copyright (c) 2015-2021 STMicroelectronics. + * All rights reserved. + * + * This software component is licensed by ST under BSD 3-Clause license, + * the "License"; You may not use this file except in compliance with the + * License. You may obtain a copy of the License at: + * opensource.org/licenses/BSD-3-Clause + * + ****************************************************************************** + */ + +/** + * This file configures the system clock as follows: + *---------------------------------------------------------------------- + * System clock source | 1- USE_PLL_HSE_XTAL | 2- USE_PLL_HSI + * (external 25 MHz xtal) | (internal 16 MHz) + *---------------------------------------------------------------------- + * USB enabled | NO | YES | NO | YES + *---------------------------------------------------------------------- + * SYSCLK(MHz) | 100 | 96 | 100 | 96 + * AHBCLK (MHz) | 100 | 96 | 100 | 96 + * APB1CLK (MHz) | 50 | 48 | 50 | 48 + * APB2CLK (MHz) | 100 | 96 | 100 | 96 + *---------------------------------------------------------------------- +**/ + +#include "stm32f4xx.h" +#include "mbed_error.h" + +// For clock debugging purpose - output on MCO2 pin(PC9) +#define FREQDEBUG 0 + +// clock source is selected with CLOCK_SOURCE in json config +#define USE_PLL_HSE_EXTC 0x8 // Use external clock (ST Link MCO) +#define USE_PLL_HSE_XTAL 0x4 // Use external xtal (X3 on board - not provided by default) +#define USE_PLL_HSI 0x2 // Use HSI internal clock + +#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC)) +uint8_t SetSysClock_PLL_HSE(uint8_t bypass); +#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ + +#if ((CLOCK_SOURCE) & USE_PLL_HSI) +uint8_t SetSysClock_PLL_HSI(void); +#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */ + + +/** +* @brief Configures the System clock source, PLL Multiplier and Divider factors, +* AHB/APBx prescalers and Flash settings +* @note This function should be called only once the RCC clock configuration +* is reset to the default reset state (done in SystemInit() function). + * @param None + * @retval None + */ + +void SetSysClock(void) +{ +#if ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) + /* 1- Try to start with HSE and external clock */ + if (SetSysClock_PLL_HSE(1) == 0) +#endif + { +#if ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) + /* 2- If fail try to start with HSE and external xtal */ + if (SetSysClock_PLL_HSE(0) == 0) +#endif + { +#if ((CLOCK_SOURCE) & USE_PLL_HSI) + /* 3- If fail start with HSI clock */ + if (SetSysClock_PLL_HSI() == 0) +#endif + { + { + error("SetSysClock failed\n"); + } + } + } + } +#if FREQDEBUG == 1 + /* Output clock on MCO2 pin(PC9) for debugging purpose */ + HAL_RCC_MCOConfig(RCC_MCO2, RCC_MCO2SOURCE_SYSCLK, RCC_MCODIV_4); +#endif +} + +#if ( ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) ) +/******************************************************************************/ +/* PLL (clocked by HSE) used as System clock source */ +/******************************************************************************/ +uint8_t SetSysClock_PLL_HSE(uint8_t bypass) +{ + if(bypass) return 0; // FAIL because it is not supported + + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + /* Get the Clocks configuration according to the internal RCC registers */ + HAL_RCC_GetOscConfig(&RCC_OscInitStruct); + + /* PLL could be already configured by bootlader */ + if (RCC_OscInitStruct.PLL.PLLState != RCC_PLL_ON) { + + // Enable HSE oscillator and activate PLL with HSE as source + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSEState = RCC_HSE_ON; // External 25 MHz xtal on OSC_IN/OSC_OUT + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; + #if (DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLM = 25; // VCO input clock = 1 MHz (25 MHz / 25) + RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 192 MHz (1 MHz * 192) + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;// PLLCLK = 96 MHz (192 / 2) + RCC_OscInitStruct.PLL.PLLQ = 4; // USB clock = 48 MHz (192 / 4, CLOCK_SOURCE_USB = 1) + #else + RCC_OscInitStruct.PLL.PLLM = 12; // VCO input clock = 2.0833 MHz (25 MHz / 12) + RCC_OscInitStruct.PLL.PLLN = 96; // VCO output clock = 200 MHz (2.0833 MHz * 96) + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;// PLLCLK = 100 MHz (200 / 2) + RCC_OscInitStruct.PLL.PLLQ = 4; // USB clock = 50 MHz (200 / 4 -> USB not available) + #endif + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + return 0; // FAIL + } + } + + // Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers + RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; // 100/96 MHz + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; // 100/96 MHz + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; // 50/48 MHz + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; // 100/96 MHz + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) { + return 0; // FAIL + } +#if FREQDEBUG == 1 /* Output clock on MCO1 pin(PA8) for debugging purpose */ + HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSE, RCC_MCODIV_2); // 4 MHz with xtal +#endif + return 1; // OK +} +#endif /* ((CLOCK_SOURCE) & USE_PLL_HSE_XTAL) || ((CLOCK_SOURCE) & USE_PLL_HSE_EXTC) */ + +#if ((CLOCK_SOURCE) & USE_PLL_HSI) +/******************************************************************************/ +/* PLL (clocked by HSI) used as System clock source */ +/******************************************************************************/ +uint8_t SetSysClock_PLL_HSI(void) +{ + RCC_OscInitTypeDef RCC_OscInitStruct; + RCC_ClkInitTypeDef RCC_ClkInitStruct; + + /* The voltage scaling allows optimizing the power consumption when the device is + clocked below the maximum system frequency, to update the voltage scaling value + regarding system frequency refer to product datasheet. */ + __HAL_RCC_PWR_CLK_ENABLE(); + __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2); + + // Enable HSI oscillator and activate PLL with HSI as source + RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSE; + RCC_OscInitStruct.HSIState = RCC_HSI_ON; + RCC_OscInitStruct.HSEState = RCC_HSE_OFF; + RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT; + RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; + RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI; + RCC_OscInitStruct.PLL.PLLM = 8; // VCO input clock = 2 MHz (16 MHz / 8) +#if (DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLN = 192; // VCO output clock = 384 MHz (2 MHz * 192) +#else /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLN = 200; // VCO output clock = 400 MHz (2 MHz * 200) +#endif /* DEVICE_USBDEVICE */ + RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV4; // PLLCLK = 100 MHz or 96 MHz (depending on DEVICE_USBDEVICE) + RCC_OscInitStruct.PLL.PLLQ = 8; // USB clock = 48 MHz (DEVICE_USBDEVICE=1) + if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) { + return 0; // FAIL + } + + /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2 clocks dividers */ + RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2); + RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; + RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; + RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2; + RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1; + if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3) != HAL_OK) { + return 0; // FAIL + } + +#if FREQDEBUG == 1 /* Output clock on MCO1 pin(PA8) for debugging purpose */ + HAL_RCC_MCOConfig(RCC_MCO1, RCC_MCO1SOURCE_HSI, RCC_MCODIV_1); // 16 MHz +#endif + + return 1; // OK +} +#endif /* ((CLOCK_SOURCE) & USE_PLL_HSI) */ diff --git a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/system_clock.c b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/system_clock.c index 56a274a..c940e7c 100644 --- a/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/system_clock.c +++ b/targets/TARGET_STM/TARGET_STM32F4/TARGET_STM32F411xE/system_clock.c @@ -150,7 +150,7 @@ /******************************************************************************/ /* PLL (clocked by HSI) used as System clock source */ /******************************************************************************/ -uint8_t SetSysClock_PLL_HSI(void) +MBED_WEAK uint8_t SetSysClock_PLL_HSI(void) { RCC_OscInitTypeDef RCC_OscInitStruct; RCC_ClkInitTypeDef RCC_ClkInitStruct; diff --git a/targets/targets.json b/targets/targets.json index cbec7aa..0a9c9c5 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -1918,6 +1918,25 @@ "0320" ] }, + "BLACKPILL_F411CE": { + "inherits": [ + "MCU_STM32F411xE" + ], + "macros_add": [ + "HSE_VALUE=25000000U" + ], + "overrides": { + "clock_source": "USE_PLL_HSI | USE_PLL_HSE_XTAL" + }, + "device_has_add": [ + "USBDEVICE" + ], + "bootloader_supported": true, + "detect_code": [ + "0740" + ], + "device_name": "MCU_STM32F411CE" + }, "MCU_STM32F412xE": { "inherits": [ "MCU_STM32F4" diff --git a/targets/upload_method_cfg/BLACKPILL_F411CE.cmake b/targets/upload_method_cfg/BLACKPILL_F411CE.cmake new file mode 100644 index 0000000..78397a4 --- /dev/null +++ b/targets/upload_method_cfg/BLACKPILL_F411CE.cmake @@ -0,0 +1,56 @@ +# Mbed OS upload method configuration file for target BLACKPILL_F411CE. +# To change any of these parameters from their default values, set them in your build script between where you +# include app.cmake and where you add mbed os as a subdirectory. + +# Notes: +# 1. Keep in mind the Blackpill does not contain any on-board debugger, so all upload methods counts with external debugger, usually ST-Link. +# 2. Using the JLINK upload method with your dev board requires converting its ST-LINK into a J-Link. See here for details: https://www.segger.com/products/debug-probes/j-link/models/other-j-links/st-link-on-board/ +# 3. If your target is not natively supported by the pyOCD, then you need install a keil package for family of your target by hands. Type "pyocd pack show" to console and you will see a list of already installed packages. +# If any package for your family is not on the list, then you need install them via command "pyocd pack install stm32f4".Then just type "pyocd pack find STM32f4" or "pyocd pack find STM32f411" and you will see the part name of your target. +# Alternqativly you can type command "pyocd list" whne your board is connected. You will see state of your board. + +# General config parameters +# ------------------------------------------------------------- +set(UPLOAD_METHOD_DEFAULT MBED) + +# Config options for MBED +# ------------------------------------------------------------- + +set(MBED_UPLOAD_ENABLED TRUE) +set(MBED_RESET_BAUDRATE 115200) + +# Config options for JLINK +# ------------------------------------------------------------- + +set(JLINK_UPLOAD_ENABLED TRUE) +set(JLINK_CPU_NAME STM32F411CE) +set(JLINK_CLOCK_SPEED 4000) +set(JLINK_UPLOAD_INTERFACE SWD) + +# Config options for PYOCD +# ------------------------------------------------------------- + +set(PYOCD_UPLOAD_ENABLED TRUE) +set(PYOCD_TARGET_NAME STM32F411CE) +set(PYOCD_CLOCK_SPEED 4000k) + +# Config options for OPENOCD +# ------------------------------------------------------------- + +set(OPENOCD_UPLOAD_ENABLED TRUE) +set(OPENOCD_CHIP_CONFIG_COMMANDS + -f ${OpenOCD_SCRIPT_DIR}/board/st_nucleo_f4.cfg) + +# Config options for STM32Cube +# ------------------------------------------------------------- + +set(STM32CUBE_UPLOAD_ENABLED TRUE) +set(STM32CUBE_CONNECT_COMMAND -c port=SWD reset=HWrst) +set(STM32CUBE_GDBSERVER_ARGS --swd) + +# Config options for stlink +# ------------------------------------------------------------- + +set(STLINK_UPLOAD_ENABLED TRUE) +set(STLINK_LOAD_ADDRESS 0x8000000) +set(STLINK_ARGS --connect-under-reset)