diff --git a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M0/irq_cm0.S b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M0/irq_cm0.S
index 602a818..a822002 100644
--- a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M0/irq_cm0.S
+++ b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M0/irq_cm0.S
@@ -24,9 +24,9 @@
 ; */
 
 
-                IF       :LNOT::DEF:RTX_STACK_CHECK
+#ifndef RTX_STACK_CHECK
 RTX_STACK_CHECK EQU      0
-                ENDIF
+#endif
 
 I_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset
 TCB_SP_OFS      EQU      56                     ; TCB.SP offset
diff --git a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M0P/irq_cm0.S b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M0P/irq_cm0.S
index 602a818..a822002 100644
--- a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M0P/irq_cm0.S
+++ b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M0P/irq_cm0.S
@@ -24,9 +24,9 @@
 ; */
 
 
-                IF       :LNOT::DEF:RTX_STACK_CHECK
+#ifndef RTX_STACK_CHECK
 RTX_STACK_CHECK EQU      0
-                ENDIF
+#endif
 
 I_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset
 TCB_SP_OFS      EQU      56                     ; TCB.SP offset
diff --git a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S
index d7bfd99..6d932be 100644
--- a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S
+++ b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M23/irq_armv8mbl.S
@@ -24,13 +24,13 @@
 ; */
 
 
-                IF       :LNOT::DEF:RTX_STACK_CHECK
+#ifndef RTX_STACK_CHECK
 RTX_STACK_CHECK EQU      0
-                ENDIF
+#endif
 
-                IF       :LNOT::DEF:DOMAIN_NS
+#ifndef DOMAIN_NS
 DOMAIN_NS       EQU      0
-                ENDIF
+#endif
 
 I_T_RUN_OFS     EQU      20                     ; osRtxInfo.thread.run offset
 TCB_SM_OFS      EQU      48                     ; TCB.stack_mem offset
diff --git a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M3/irq_cm3.S b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M3/irq_cm3.S
index 88f5457..0c8148f 100644
--- a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M3/irq_cm3.S
+++ b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M3/irq_cm3.S
@@ -24,9 +24,9 @@
 ; */
 
 
-                IF       :LNOT::DEF:RTX_STACK_CHECK
+#ifndef RTX_STACK_CHECK
 RTX_STACK_CHECK EQU      0
-                ENDIF
+#endif
 
                 IF       ({FPU}="FPv4-SP")
 FPU_USED        EQU      1
diff --git a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S
index 984dd2d..dd967ed 100644
--- a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S
+++ b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_M33/irq_armv8mml.S
@@ -24,13 +24,13 @@
 ; */
 
 
-                IF       :LNOT::DEF:RTX_STACK_CHECK
+#ifndef RTX_STACK_CHECK
 RTX_STACK_CHECK EQU      0
-                ENDIF
+#endif
 
-                IF       :LNOT::DEF:DOMAIN_NS
+#ifndef DOMAIN_NS
 DOMAIN_NS       EQU      0
-                ENDIF
+#endif
 
                 IF       ({FPU}="FPv5-SP") || ({FPU}="FPv5_D16")
 FPU_USED        EQU      1
diff --git a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_RTOS_M4_M7/irq_cm4f.S b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_RTOS_M4_M7/irq_cm4f.S
index 88f5457..0c8148f 100644
--- a/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_RTOS_M4_M7/irq_cm4f.S
+++ b/cmsis/CMSIS_5/CMSIS/RTOS2/RTX/Source/TOOLCHAIN_ARM/TARGET_RTOS_M4_M7/irq_cm4f.S
@@ -24,9 +24,9 @@
 ; */
 
 
-                IF       :LNOT::DEF:RTX_STACK_CHECK
+#ifndef RTX_STACK_CHECK
 RTX_STACK_CHECK EQU      0
-                ENDIF
+#endif
 
                 IF       ({FPU}="FPv4-SP")
 FPU_USED        EQU      1