diff --git a/targets/TARGET_STM/TARGET_STM32F0/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F0/CMakeLists.txt
index 58d9b92..5be0e02 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/CMakeLists.txt
+++ b/targets/TARGET_STM/TARGET_STM32F0/CMakeLists.txt
@@ -3,83 +3,29 @@
 
 if("STM32F091xC" IN_LIST MBED_TARGET_LABELS)
     add_subdirectory(TARGET_STM32F091xC)
-elseif("NUCLEO_F070RB" IN_LIST MBED_TARGET_LABELS)
-    add_subdirectory(TARGET_NUCLEO_F070RB)
-elseif("NUCLEO_F072RB" IN_LIST MBED_TARGET_LABELS)
-    add_subdirectory(TARGET_NUCLEO_F072RB)
+elseif("STM32F072xB" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_STM32F072xB)
+elseif("STM32F070xB" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_STM32F070xB)
+elseif("STM32F030x8" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_STM32F030x8)
 endif()
 
+add_subdirectory(STM32Cube_FW)
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+)
+
 target_sources(mbed-core
     INTERFACE
         analogin_device.c
         analogout_device.c
+        cmsis_nvic.c
         flash_api.c
         gpio_irq_device.c
         pwmout_device.c
         serial_device.c
         spi_api.c
-
-        device/stm32f0xx_hal.c
-        device/stm32f0xx_hal_adc.c
-        device/stm32f0xx_hal_adc_ex.c
-        device/stm32f0xx_hal_can.c
-        device/stm32f0xx_hal_cec.c
-        device/stm32f0xx_hal_comp.c
-        device/stm32f0xx_hal_cortex.c
-        device/stm32f0xx_hal_crc.c
-        device/stm32f0xx_hal_crc_ex.c
-        device/stm32f0xx_hal_dac.c
-        device/stm32f0xx_hal_dac_ex.c
-        device/stm32f0xx_hal_dma.c
-        device/stm32f0xx_hal_flash.c
-        device/stm32f0xx_hal_flash_ex.c
-        device/stm32f0xx_hal_gpio.c
-        device/stm32f0xx_hal_i2c.c
-        device/stm32f0xx_hal_i2c_ex.c
-        device/stm32f0xx_hal_i2s.c
-        device/stm32f0xx_hal_irda.c
-        device/stm32f0xx_hal_iwdg.c
-        device/stm32f0xx_hal_pcd.c
-        device/stm32f0xx_hal_pcd_ex.c
-        device/stm32f0xx_hal_pwr.c
-        device/stm32f0xx_hal_pwr_ex.c
-        device/stm32f0xx_hal_rcc.c
-        device/stm32f0xx_hal_rcc_ex.c
-        device/stm32f0xx_hal_rtc.c
-        device/stm32f0xx_hal_rtc_ex.c
-        device/stm32f0xx_hal_smartcard.c
-        device/stm32f0xx_hal_smartcard_ex.c
-        device/stm32f0xx_hal_smbus.c
-        device/stm32f0xx_hal_spi.c
-        device/stm32f0xx_hal_spi_ex.c
-        device/stm32f0xx_hal_tim.c
-        device/stm32f0xx_hal_tim_ex.c
-        device/stm32f0xx_hal_tsc.c
-        device/stm32f0xx_hal_uart.c
-        device/stm32f0xx_hal_uart_ex.c
-        device/stm32f0xx_hal_usart.c
-        device/stm32f0xx_hal_wwdg.c
-        device/stm32f0xx_ll_adc.c
-        device/stm32f0xx_ll_comp.c
-        device/stm32f0xx_ll_crc.c
-        device/stm32f0xx_ll_crs.c
-        device/stm32f0xx_ll_dac.c
-        device/stm32f0xx_ll_dma.c
-        device/stm32f0xx_ll_exti.c
-        device/stm32f0xx_ll_gpio.c
-        device/stm32f0xx_ll_i2c.c
-        device/stm32f0xx_ll_pwr.c
-        device/stm32f0xx_ll_rcc.c
-        device/stm32f0xx_ll_rtc.c
-        device/stm32f0xx_ll_spi.c
-        device/stm32f0xx_ll_tim.c
-        device/stm32f0xx_ll_usart.c
-        device/stm32f0xx_ll_utils.c
-        device/system_stm32f0xx.c
-)
-
-target_include_directories(mbed-core
-    INTERFACE
-        .
-        device
 )
diff --git a/targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/CMakeLists.txt
new file mode 100644
index 0000000..6394b93
--- /dev/null
+++ b/targets/TARGET_STM/TARGET_STM32F0/STM32Cube_FW/CMakeLists.txt
@@ -0,0 +1,75 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+target_sources(mbed-core
+    INTERFACE
+        STM32F0xx_HAL_Driver/Legacy/stm32f0xx_hal_can_legacy.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_adc.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_adc_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_can.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_cec.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_comp.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_cortex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_crc.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_crc_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_dac.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_dac_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_dma.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_exti.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_flash.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_flash_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_gpio.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_i2c.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_i2c_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_i2s.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_irda.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_iwdg.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_pcd.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_pcd_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_pwr.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_pwr_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_rcc.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_rcc_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_rtc.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_rtc_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_smartcard.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_smartcard_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_smbus.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_spi.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_spi_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_tim.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_tim_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_tsc.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_uart.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_uart_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_usart.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_usart_ex.c
+        STM32F0xx_HAL_Driver/stm32f0xx_hal_wwdg.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_adc.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_comp.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_crc.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_crs.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_dac.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_dma.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_exti.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_gpio.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_i2c.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_pwr.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_rcc.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_rtc.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_spi.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_tim.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_usart.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_usb.c
+        STM32F0xx_HAL_Driver/stm32f0xx_ll_utils.c
+        system_stm32f0xx.c
+)
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+        CMSIS
+        STM32F0xx_HAL_Driver
+        STM32F0xx_HAL_Driver/Legacy
+)
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/CMakeLists.txt
new file mode 100644
index 0000000..ddd8390
--- /dev/null
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/CMakeLists.txt
@@ -0,0 +1,22 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
+    set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32f030x8.S)
+    set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32f030x8.ld)
+elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
+    set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32f030x8.S)
+    set(LINKER_FILE TOOLCHAIN_ARM/stm32f030x8.sct)
+endif()
+
+set_property(GLOBAL PROPERTY MBED_TARGET_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
+
+target_sources(mbed-core
+    INTERFACE
+        ${STARTUP_FILE}
+)
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+)
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/TOOLCHAIN_ARM/stm32f030x8.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/TOOLCHAIN_ARM/stm32f030x8.sct
index 25f4f5f..cf04d70 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/TOOLCHAIN_ARM/stm32f030x8.sct
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/TOOLCHAIN_ARM/stm32f030x8.sct
@@ -1,4 +1,4 @@
-#! armcc -E
+#! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m0
 ; Scatter-Loading Description File
 ;
 ; SPDX-License-Identifier: BSD-3-Clause
@@ -15,6 +15,8 @@
 ;*
 ;******************************************************************************
 
+#include "../cmsis_nvic.h"
+
 #if !defined(MBED_APP_START)
   #define MBED_APP_START  MBED_ROM_START
 #endif
@@ -33,7 +35,6 @@
 #endif
 
 /* Round up VECTORS_SIZE to 8 bytes */
-#define NVIC_NUM_VECTORS 45
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
 
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/TOOLCHAIN_GCC_ARM/stm32f030x8.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/TOOLCHAIN_GCC_ARM/stm32f030x8.ld
index e216edb..5f47993 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/TOOLCHAIN_GCC_ARM/stm32f030x8.ld
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/TOOLCHAIN_GCC_ARM/stm32f030x8.ld
@@ -15,6 +15,8 @@
  ******************************************************************************
 */
 
+#include "../cmsis_nvic.h"
+
 
 #if !defined(MBED_APP_START)
   #define MBED_APP_START  MBED_ROM_START
@@ -31,7 +33,6 @@
 #endif
 
 /* Round up VECTORS_SIZE to 8 bytes */
-#define NVIC_NUM_VECTORS 45
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
 
 MEMORY
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/cmsis_nvic.h
index f971c7c..17f76e5 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F030x8/cmsis_nvic.h
@@ -34,19 +34,6 @@
 #endif
 
 #define NVIC_NUM_VECTORS        45
-#define NVIC_USER_IRQ_OFFSET  16
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
-uint32_t NVIC_GetVector(IRQn_Type IRQn);
-
-#ifdef __cplusplus
-}
-#endif
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
 
 #endif
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/CMakeLists.txt
index 7f82a1a..314377e 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/CMakeLists.txt
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/CMakeLists.txt
@@ -1,26 +1,27 @@
 # Copyright (c) 2020 ARM Limited. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 
+if("NUCLEO_F070RB" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_NUCLEO_F070RB)
+endif()
+
 if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
-    set(STARTUP_FILE device/TOOLCHAIN_GCC_ARM/startup_stm32f070xb.S)
-    set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/STM32F070XB.ld)
+    set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32f070xb.S)
+    set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32f070xb.ld)
 elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
-    set(STARTUP_FILE device/TOOLCHAIN_ARM/startup_stm32f070xb.S)
-    set(LINKER_FILE device/TOOLCHAIN_ARM/stm32f070xb.sct)
+    set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32f070xb.S)
+    set(LINKER_FILE TOOLCHAIN_ARM/stm32f070xb.sct)
 endif()
 
 set_property(GLOBAL PROPERTY MBED_TARGET_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
 
 target_sources(mbed-core
     INTERFACE
-        PeripheralPins.c
-        device/system_clock.c
-        device/cmsis_nvic.c
+        system_clock.c
         ${STARTUP_FILE}
 )
 
 target_include_directories(mbed-core
     INTERFACE
         .
-        device
 )
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TARGET_NUCLEO_F070RB/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TARGET_NUCLEO_F070RB/CMakeLists.txt
new file mode 100644
index 0000000..118fbc1
--- /dev/null
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TARGET_NUCLEO_F070RB/CMakeLists.txt
@@ -0,0 +1,12 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+target_sources(mbed-core
+    INTERFACE
+        PeripheralPins.c
+)
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+)
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TOOLCHAIN_ARM/stm32f070xb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TOOLCHAIN_ARM/stm32f070xb.sct
index 2048af2..cf04d70 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TOOLCHAIN_ARM/stm32f070xb.sct
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TOOLCHAIN_ARM/stm32f070xb.sct
@@ -1,5 +1,4 @@
 #! armclang -E --target=arm-arm-none-eabi -x c -mcpu=cortex-m0
-
 ; Scatter-Loading Description File
 ;
 ; SPDX-License-Identifier: BSD-3-Clause
@@ -16,6 +15,8 @@
 ;*
 ;******************************************************************************
 
+#include "../cmsis_nvic.h"
+
 #if !defined(MBED_APP_START)
   #define MBED_APP_START  MBED_ROM_START
 #endif
@@ -34,7 +35,6 @@
 #endif
 
 /* Round up VECTORS_SIZE to 8 bytes */
-#define NVIC_NUM_VECTORS 48
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
 
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TOOLCHAIN_GCC_ARM/STM32F070XB.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TOOLCHAIN_GCC_ARM/STM32F070XB.ld
index 6c457a5..5f47993 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TOOLCHAIN_GCC_ARM/STM32F070XB.ld
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/TOOLCHAIN_GCC_ARM/STM32F070XB.ld
@@ -15,6 +15,8 @@
  ******************************************************************************
 */
 
+#include "../cmsis_nvic.h"
+
 
 #if !defined(MBED_APP_START)
   #define MBED_APP_START  MBED_ROM_START
@@ -31,7 +33,6 @@
 #endif
 
 /* Round up VECTORS_SIZE to 8 bytes */
-#define NVIC_NUM_VECTORS 48
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
 
 MEMORY
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/cmsis_nvic.h
index 2db542e..5c34bc9 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F070xB/cmsis_nvic.h
@@ -34,19 +34,6 @@
 #endif
 
 #define NVIC_NUM_VECTORS        48
-#define NVIC_USER_IRQ_OFFSET  16
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
-uint32_t NVIC_GetVector(IRQn_Type IRQn);
-
-#ifdef __cplusplus
-}
-#endif
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
 
 #endif
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/CMakeLists.txt
index 0bb99ed..235b092 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/CMakeLists.txt
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/CMakeLists.txt
@@ -1,26 +1,27 @@
 # Copyright (c) 2020 ARM Limited. All rights reserved.
 # SPDX-License-Identifier: Apache-2.0
 
+if("NUCLEO_F072RB" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_NUCLEO_F072RB)
+endif()
+
 if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
-    set(STARTUP_FILE device/TOOLCHAIN_GCC_ARM/startup_stm32f072xb.S)
-    set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/STM32F072XB.ld)
+    set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32f072xb.S)
+    set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32f072xb.ld)
 elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
-    set(STARTUP_FILE device/TOOLCHAIN_ARM/startup_stm32f072xb.S)
-    set(LINKER_FILE device/TOOLCHAIN_ARM/stm32f072xb.sct)
+    set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32f072xb.S)
+    set(LINKER_FILE TOOLCHAIN_ARM/stm32f072xb.sct)
 endif()
 
 set_property(GLOBAL PROPERTY MBED_TARGET_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
 
 target_sources(mbed-core
     INTERFACE
-        PeripheralPins.c
-        device/system_clock.c
-        device/cmsis_nvic.c
+        system_clock.c
         ${STARTUP_FILE}
 )
 
 target_include_directories(mbed-core
     INTERFACE
         .
-        device
 )
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TARGET_NUCLEO_F072RB/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TARGET_NUCLEO_F072RB/CMakeLists.txt
new file mode 100644
index 0000000..118fbc1
--- /dev/null
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TARGET_NUCLEO_F072RB/CMakeLists.txt
@@ -0,0 +1,12 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+target_sources(mbed-core
+    INTERFACE
+        PeripheralPins.c
+)
+
+target_include_directories(mbed-core
+    INTERFACE
+        .
+)
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TOOLCHAIN_ARM/stm32f072xb.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TOOLCHAIN_ARM/stm32f072xb.sct
index f936fff..9f7057f 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TOOLCHAIN_ARM/stm32f072xb.sct
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TOOLCHAIN_ARM/stm32f072xb.sct
@@ -15,6 +15,8 @@
 ;*
 ;******************************************************************************
 
+#include "../cmsis_nvic.h"
+
 #if !defined(MBED_APP_START)
   #define MBED_APP_START  MBED_ROM_START
 #endif
@@ -33,7 +35,6 @@
 #endif
 
 /* Round up VECTORS_SIZE to 8 bytes */
-#define NVIC_NUM_VECTORS 48
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
 
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TOOLCHAIN_GCC_ARM/STM32F072XB.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TOOLCHAIN_GCC_ARM/STM32F072XB.ld
index 6c457a5..5f47993 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TOOLCHAIN_GCC_ARM/STM32F072XB.ld
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/TOOLCHAIN_GCC_ARM/STM32F072XB.ld
@@ -15,6 +15,8 @@
  ******************************************************************************
 */
 
+#include "../cmsis_nvic.h"
+
 
 #if !defined(MBED_APP_START)
   #define MBED_APP_START  MBED_ROM_START
@@ -31,7 +33,6 @@
 #endif
 
 /* Round up VECTORS_SIZE to 8 bytes */
-#define NVIC_NUM_VECTORS 48
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
 
 MEMORY
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/cmsis_nvic.h
index 1195497..47c4606 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F072xB/cmsis_nvic.h
@@ -34,19 +34,6 @@
 #endif
 
 #define NVIC_NUM_VECTORS        48
-#define NVIC_USER_IRQ_OFFSET  16
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
-uint32_t NVIC_GetVector(IRQn_Type IRQn);
-
-#ifdef __cplusplus
-}
-#endif
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
 
 #endif
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/CMakeLists.txt b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/CMakeLists.txt
index a5a701d..bb86934 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/CMakeLists.txt
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/CMakeLists.txt
@@ -6,24 +6,22 @@
 endif()
 
 if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
-    set(STARTUP_FILE device/TOOLCHAIN_GCC_ARM/startup_stm32f091xc.S)
-    set(LINKER_FILE device/TOOLCHAIN_GCC_ARM/STM32F091XC.ld)
+    set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32f091xc.S)
+    set(LINKER_FILE TOOLCHAIN_GCC_ARM/stm32f091xc.ld)
 elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
-    set(STARTUP_FILE device/TOOLCHAIN_ARM/startup_stm32f091xc.S)
-    set(LINKER_FILE device/TOOLCHAIN_ARM/stm32f091rc.sct)
+    set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32f091xc.S)
+    set(LINKER_FILE TOOLCHAIN_ARM/stm32f091xc.sct)
 endif()
 
 set_property(GLOBAL PROPERTY MBED_TARGET_LINKER_FILE ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
 
 target_sources(mbed-core
     INTERFACE
-        device/cmsis_nvic.c
-        device/system_clock.c
+        system_clock.c
         ${STARTUP_FILE}
 )
 
 target_include_directories(mbed-core
     INTERFACE
         .
-        device
 )
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/TOOLCHAIN_ARM/stm32f091xc.sct b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/TOOLCHAIN_ARM/stm32f091xc.sct
index 1e01a3a..cf04d70 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/TOOLCHAIN_ARM/stm32f091xc.sct
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/TOOLCHAIN_ARM/stm32f091xc.sct
@@ -15,6 +15,8 @@
 ;*
 ;******************************************************************************
 
+#include "../cmsis_nvic.h"
+
 #if !defined(MBED_APP_START)
   #define MBED_APP_START  MBED_ROM_START
 #endif
@@ -33,7 +35,6 @@
 #endif
 
 /* Round up VECTORS_SIZE to 8 bytes */
-#define NVIC_NUM_VECTORS 47
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) AND ~7)
 
 LR_IROM1  MBED_APP_START  MBED_APP_SIZE  {
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/TOOLCHAIN_GCC_ARM/STM32F091XC.ld b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/TOOLCHAIN_GCC_ARM/STM32F091XC.ld
index a07e75f..5f47993 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/TOOLCHAIN_GCC_ARM/STM32F091XC.ld
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/TOOLCHAIN_GCC_ARM/STM32F091XC.ld
@@ -15,6 +15,8 @@
  ******************************************************************************
 */
 
+#include "../cmsis_nvic.h"
+
 
 #if !defined(MBED_APP_START)
   #define MBED_APP_START  MBED_ROM_START
@@ -31,7 +33,6 @@
 #endif
 
 /* Round up VECTORS_SIZE to 8 bytes */
-#define NVIC_NUM_VECTORS 47
 #define VECTORS_SIZE  (((NVIC_NUM_VECTORS * 4) + 7) & 0xFFFFFFF8)
 
 MEMORY
diff --git a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/cmsis_nvic.h b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/cmsis_nvic.h
index 06090bb..df4f73e 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/cmsis_nvic.h
+++ b/targets/TARGET_STM/TARGET_STM32F0/TARGET_STM32F091xC/cmsis_nvic.h
@@ -34,19 +34,6 @@
 #endif
 
 #define NVIC_NUM_VECTORS        47
-#define NVIC_USER_IRQ_OFFSET  16
-
-#include "cmsis.h"
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
-uint32_t NVIC_GetVector(IRQn_Type IRQn);
-
-#ifdef __cplusplus
-}
-#endif
+#define NVIC_RAM_VECTOR_ADDRESS MBED_RAM_START
 
 #endif
diff --git a/targets/TARGET_STM/TARGET_STM32F0/cmsis.h b/targets/TARGET_STM/TARGET_STM32F0/cmsis.h
index 2089764..64d8d8f 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/cmsis.h
+++ b/targets/TARGET_STM/TARGET_STM32F0/cmsis.h
@@ -19,4 +19,15 @@
 #include "stm32f0xx.h"
 #include "cmsis_nvic.h"
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
+uint32_t NVIC_GetVector(IRQn_Type IRQn);
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif
diff --git a/targets/TARGET_STM/TARGET_STM32F0/cmsis_nvic.c b/targets/TARGET_STM/TARGET_STM32F0/cmsis_nvic.c
index d2c3657..0124d0e 100644
--- a/targets/TARGET_STM/TARGET_STM32F0/cmsis_nvic.c
+++ b/targets/TARGET_STM/TARGET_STM32F0/cmsis_nvic.c
@@ -1,37 +1,22 @@
 /* mbed Microcontroller Library
- * CMSIS-style functionality to support dynamic vectors
- *******************************************************************************
- * Copyright (c) 2015, STMicroelectronics
+ * SPDX-License-Identifier: BSD-3-Clause
+ ******************************************************************************
+ *
+ * Copyright (c) 2015-2020 STMicroelectronics.
  * All rights reserved.
  *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
+ * This software component is licensed by ST under BSD 3-Clause license,
+ * the "License"; You may not use this file except in compliance with the
+ * License. You may obtain a copy of the License at:
+ *                        opensource.org/licenses/BSD-3-Clause
  *
- * 1. Redistributions of source code must retain the above copyright notice,
- *    this list of conditions and the following disclaimer.
- * 2. Redistributions in binary form must reproduce the above copyright notice,
- *    this list of conditions and the following disclaimer in the documentation
- *    and/or other materials provided with the distribution.
- * 3. Neither the name of STMicroelectronics nor the names of its contributors
- *    may be used to endorse or promote products derived from this software
- *    without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
- * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
- * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
- * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
- * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
- * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
- * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- *******************************************************************************
+ ******************************************************************************
  */
-#include "cmsis_nvic.h"
 
-#define NVIC_RAM_VECTOR_ADDRESS   (0x20000000)  // Vectors positioned at start of RAM
-#define NVIC_FLASH_VECTOR_ADDRESS (0x08000000)  // Initial vector position in flash
+#include "cmsis.h"
+#include "nvic_addr.h"
+
+#define NVIC_USER_IRQ_OFFSET  16
 
 void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
     int i;