Tegra194: add SE support to generate SHA256 of TZRAM
The BL3-1 firmware code is stored in TZSRAM on Tegra194 platforms. This
memory loses power when we enter System Suspend and so its contents are
stored to TZDRAM, before entry. This opens up an attack vector where the
TZDRAM contents might be tampered with when we are in the System Suspend
mode. To mitigate this attack the SE engine calculates the hash of entire
TZSRAM and stores it in PMC scratch, before we copy data to TZDRAM. The
WB0 code will validate the TZDRAM and match the hash with the one in PMC
scratch.

This patch adds driver for the SE engine, with APIs to calculate the hash
and store to PMC scratch registers.

Change-Id: I04cc0eb7f54c69d64b6c34fc2ff62e4cfbdd43b2
Signed-off-by: Jeetesh Burman <jburman@nvidia.com>
1 parent 2ac7b22 commit 029dd14e72c0a7147ef326ae5cd24d77546b2094
@Jeetesh Burman Jeetesh Burman authored on 6 Jul 2018
Varun Wadekar committed on 11 Mar 2020
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plat/nvidia/tegra/include/t194/tegra_def.h
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plat/nvidia/tegra/soc/t194/drivers/include/se.h
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plat/nvidia/tegra/soc/t194/drivers/se/se.c
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plat/nvidia/tegra/soc/t194/drivers/se/se_private.h
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plat/nvidia/tegra/soc/t194/plat_psci_handlers.c