Fix topology description of cpus for DynamIQ based FVP

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LuminaSensum / arm-trusted-firmware

Browse code Fix topology description of cpus for DynamIQ based FVP DynamIQ based designs have upto 8 CPUs in each cluster. This patch fixes the device tree node which describes the topology of the CPU for DynamIQ FVP Model. Change-Id: I7146bc79029ce38314026d4853e5b6406863725c Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com> WIP_v2.3-LS master v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3
1 parent 572fcdd commit 0ad5b318f7e8e7ff35b5e607e3d11c31efeb3872 Madhukar Pappireddy authored on 13 Feb 2020

Browse code

DynamIQ based designs have upto 8 CPUs in each cluster. This
patch fixes the device tree node which describes the topology
of the CPU for DynamIQ FVP Model.

Change-Id: I7146bc79029ce38314026d4853e5b6406863725c
Signed-off-by: Madhukar Pappireddy <madhukar.pappireddy@arm.com>

WIP_v2.3-LS master v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3

1 parent 572fcdd commit 0ad5b318f7e8e7ff35b5e607e3d11c31efeb3872

Madhukar Pappireddy authored on 13 Feb 2020

Patch

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Ignore Space Show notes View fdts/fvp-base-gicv3-psci-common.dtsi

Ignore Space Show notes View fdts/fvp-base-gicv3-psci-dynamiq-2t.dts

Ignore Space Show notes View fdts/fvp-base-gicv3-psci-dynamiq-common.dtsi 0 → 100644

Ignore Space Show notes View fdts/fvp-base-gicv3-psci-dynamiq.dts

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