zynqmp: pm: Add CLK_SET_RATE_PARENT in gem clock node

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Browse code zynqmp: pm: Add CLK_SET_RATE_PARENT in gem clock node Existing implementation does not allow to change the value of the DIV1 because DIV2 does not have SET_RATE_PARENT flag. This causes DIV1 value to be fixed and only value of DIV2 will be adjusted according to required clock rate. Signed-off-by: Ravi Patel <ravi.patel@xilinx.com> Signed-off-by: Jolly Shah <jolly.shah@xilinx.com> Change-Id: Ic6c4ca091bf0c5dc91ebddf86621c82c705dc87b WIP_v2.3-LS master v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3
1 parent 74cf215 commit 138cde662f99f8659be554810d8b8e2d9b1ba7ac Ravi Patel authored on 15 Mar 2019 Jolly Shah committed on 14 Jan 2020

Browse code

Existing implementation does not allow to change the value of the
DIV1 because DIV2 does not have SET_RATE_PARENT flag.
This causes DIV1 value to be fixed and only value of DIV2 will be
adjusted according to required clock rate.

Signed-off-by: Ravi Patel <ravi.patel@xilinx.com>
Signed-off-by: Jolly Shah <jolly.shah@xilinx.com>
Change-Id: Ic6c4ca091bf0c5dc91ebddf86621c82c705dc87b

WIP_v2.3-LS master v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3

1 parent 74cf215 commit 138cde662f99f8659be554810d8b8e2d9b1ba7ac

Ravi Patel authored on 15 Mar 2019

Jolly Shah committed on 14 Jan 2020

Patch

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