Add barriers to handle Secure Timer interrupts correctly
This patch adds instruction synchronization barriers around the code which
handles the timer interrupt in the TSP. This ensures that the interrupt is not
acknowledged after or EOIed before it is deactivated at the peripheral.

Change-Id: Ie2f01f4f2e5c032ba61c7014d09ad86a3c5a0b97
1 parent 8be9e39 commit 196231425e14afa6ae8c7c2693a99ba206b8d91e
@Achin Gupta Achin Gupta authored on 17 Jun 2014
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bl32/tsp/tsp_timer.c