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ddr: a80x0: add DDR 32-bit ECC mode support
Change a topology map from internal database
to SPD based for 32bit bus width mode

Change-Id: I803166893ddc2fd916fc8a1c27fffd34b6ec0c72
Signed-off-by: Alex Leibovich <alexl@marvell.com>
master v2.4-LS
1 parent 615d859 commit 32b3b99918ec2b1d3d490a7f7151d4d1af76518f
@Alex Leibovich Alex Leibovich authored on 10 Mar 2019
Marcin Wojtas committed on 6 Jun 2020
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plat/marvell/armada/a8k/a80x0/board/dram_port.c