A5DS: Correct system freq, Cache Writeback Granule

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LuminaSensum / arm-trusted-firmware

Browse code A5DS: Correct system freq, Cache Writeback Granule Correct the system, timer and uart frequencies to successfully run the stack on FPGA Correct Cortex-A5MPcore to 8 word granularity for Cache writeback Change-Id: I2c59c26b7dca440791ad39f2297c68ae513da7b6 Signed-off-by: Avinash Mehta <avinash.mehta@arm.com> WIP_v2.3-LS master v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3
1 parent 86ed895 commit 786890caaeb3e3d01a3a5986a4e4af104c510e62 Avinash Mehta authored on 18 Dec 2019

Browse code

Correct the system, timer and uart frequencies to successfully run
the stack on FPGA
Correct Cortex-A5MPcore to 8 word granularity for Cache writeback

Change-Id: I2c59c26b7dca440791ad39f2297c68ae513da7b6
Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>

WIP_v2.3-LS master v2.4-LS v2.3-rc2 v2.3-rc1 v2.3-rc0 v2.3

1 parent 86ed895 commit 786890caaeb3e3d01a3a5986a4e4af104c510e62

Avinash Mehta authored on 18 Dec 2019

Patch

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