Tegra186: disable PROGRAMMABLE_RESET_ADDRESS
This patch disables the code to program reset vector for secondary CPUs to a different entry point, than cold boot. The cold boot entry point has the ability to differentiate between a cold boot and a warm boot, that is controlled by the PROGRAMMABLE_RESET_ADDRESS macro. By reusing the same entry point, we can lock the CPU reset vector during cold boot. Change-Id: Iad400841d57c139469e1d29b5d467197e11958c4 Signed-off-by: Varun Wadekar <vwadekar@nvidia.com> |
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plat/nvidia/tegra/include/t186/tegra186_private.h |
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plat/nvidia/tegra/soc/t186/plat_psci_handlers.c |
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plat/nvidia/tegra/soc/t186/plat_secondary.c |
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plat/nvidia/tegra/soc/t186/plat_trampoline.S |
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plat/nvidia/tegra/soc/t186/platform_t186.mk |
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