Merge changes from topic "tegra-downstream-01202020" into integration
* changes: Tegra194: mce: remove unused NVG functions Tegra194: support for NVG interface v6.6 Tegra194: smmu: add PCIE0R1 mc reg to system suspend save list Tegra194: enable driver for general purpose DMA engine Tegra194: access XUSB_PADCTL registers on Si/FPGA platforms Tegra194: organize the memory/mmio map to make it linear Tegra194: memctrl: enable mc sid OVERRIDE for PCIE0R1 Tegra194: support for boot params wider than 32-bits Tegra194: memctrl: set reorder depth limit for PCIE blocks Tegra194: memctrl: program MC_TXN_OVERRIDE reg for PTCR, MPCORE and MIU Tegra194: memctrl: set CGID_TAG_ADR instead of CGID_TAG_DEFAULT Tegra194: memctrl: update mss reprogramming as HW PROD settings Tegra194: memctrl: Disable PVARDC coalescer Tegra194: memctrl: force seswr/rd transactions as passsthru & coherent Tegra194: Request CG7 from last core in cluster Tegra194: toggle SE clock during context save/restore Tegra: bpmp: fix header file paths |
---|
plat/nvidia/tegra/common/drivers/bpmp_ipc/intf.c |
---|
plat/nvidia/tegra/common/drivers/bpmp_ipc/ivc.c |
---|
plat/nvidia/tegra/include/t194/tegra_def.h |
---|
plat/nvidia/tegra/include/t194/tegra_mc_def.h |
---|
plat/nvidia/tegra/soc/t194/drivers/include/mce_private.h |
---|
plat/nvidia/tegra/soc/t194/drivers/include/t194_nvg.h |
---|
plat/nvidia/tegra/soc/t194/drivers/mce/nvg.c |
---|
plat/nvidia/tegra/soc/t194/drivers/se/se.c |
---|
plat/nvidia/tegra/soc/t194/plat_memctrl.c |
---|
plat/nvidia/tegra/soc/t194/plat_psci_handlers.c |
---|
plat/nvidia/tegra/soc/t194/plat_setup.c |
---|
plat/nvidia/tegra/soc/t194/plat_smmu.c |
---|
plat/nvidia/tegra/soc/t194/plat_trampoline.S |
---|
plat/nvidia/tegra/soc/t194/platform_t194.mk |
---|